diff --git a/README.md b/README.md index d19740f..e5d5c16 100644 --- a/README.md +++ b/README.md @@ -4,11 +4,13 @@ The [PDP-1 Core running Spacewar!](https://www.analogue.co/developer/spacewar) on the [Analogue Pocket](https://www.analogue.co/pocket) via [openFPGA](https://www.analogue.co/developer). * Uses the original tape program file of Spacewar! v3.1 1962 * Supports Sleep/Wake and Memories (beta) -* All colors are assigned via an updatable LUT -* Main sense switches are set via an updatable config file +* All colors are assigned via an updatable LUT in the core settings menu +* Main sense switches are adjustable in the core settings menu ## Installation -To play Spacewar on your Pocket, please use [this guide](https://www.analogue.co/support/resource/how-to-play-spacewar-on-analogue-pocket). +Requires Analogue OS v1.1 beta 2 (B_4) or newer. + +To update and play Spacewar on your Pocket, please use [this guide](https://www.analogue.co/support/resource/how-to-play-spacewar-on-analogue-pocket). ## Credits This core is released under the [MIT License](https://github.com/spacemen3/PDP-1/blob/main/LICENSE). diff --git a/dist/Assets/pdp1/Spacemen3.PDP1/Colour_LUT.clut b/dist/Assets/pdp1/Spacemen3.PDP1/Default_LUT.clut similarity index 100% rename from dist/Assets/pdp1/Spacemen3.PDP1/Colour_LUT.clut rename to dist/Assets/pdp1/Spacemen3.PDP1/Default_LUT.clut diff --git a/dist/Assets/pdp1/Spacemen3.PDP1/Ghost_LUT.clut b/dist/Assets/pdp1/Spacemen3.PDP1/Ghost_LUT.clut new file mode 100644 index 0000000..6f46599 Binary files /dev/null and b/dist/Assets/pdp1/Spacemen3.PDP1/Ghost_LUT.clut differ diff --git a/dist/Assets/pdp1/Spacemen3.PDP1/Kpro_LUT.clut b/dist/Assets/pdp1/Spacemen3.PDP1/Kpro_LUT.clut new file mode 100644 index 0000000..8c7b972 Binary files /dev/null and b/dist/Assets/pdp1/Spacemen3.PDP1/Kpro_LUT.clut differ diff --git a/dist/Assets/pdp1/Spacemen3.PDP1/Pink_LUT.clut b/dist/Assets/pdp1/Spacemen3.PDP1/Pink_LUT.clut new file mode 100644 index 0000000..fdbdb4e Binary files /dev/null and b/dist/Assets/pdp1/Spacemen3.PDP1/Pink_LUT.clut differ diff --git a/dist/Assets/pdp1/Spacemen3.PDP1/config.cfg b/dist/Assets/pdp1/Spacemen3.PDP1/config.cfg deleted file mode 100644 index 3146bfe..0000000 Binary files a/dist/Assets/pdp1/Spacemen3.PDP1/config.cfg and /dev/null differ diff --git a/dist/Cores/Spacemen3.PDP1/bitstream.rbf_r b/dist/Cores/Spacemen3.PDP1/bitstream.rbf_r index 50b9965..42e991a 100644 Binary files a/dist/Cores/Spacemen3.PDP1/bitstream.rbf_r and b/dist/Cores/Spacemen3.PDP1/bitstream.rbf_r differ diff --git a/dist/Cores/Spacemen3.PDP1/core.json b/dist/Cores/Spacemen3.PDP1/core.json index bf8dc04..a078a8f 100644 --- a/dist/Cores/Spacemen3.PDP1/core.json +++ b/dist/Cores/Spacemen3.PDP1/core.json @@ -8,7 +8,7 @@ "author": "Spacemen3", "url": "https://github.com/spacemen3/PDP-1", "version": "v3.1 - Sep. 24, 1962", - "date_release": "2022-07-23" + "date_release": "2022-08-19" }, "framework": { "target_product": "Analogue Pocket", @@ -31,4 +31,4 @@ } ] } -} \ No newline at end of file +} diff --git a/dist/Cores/Spacemen3.PDP1/data.json b/dist/Cores/Spacemen3.PDP1/data.json index c5dc523..fa7bbdb 100644 --- a/dist/Cores/Spacemen3.PDP1/data.json +++ b/dist/Cores/Spacemen3.PDP1/data.json @@ -6,7 +6,7 @@ "name": "RIM", "id": 101, "required": true, - "parameters": 3, + "parameters": 2, "filename": "spacewar3.1.bin", "size_exact": 0, "size_maximum": 131072, @@ -17,21 +17,14 @@ "id": 102, "required": true, "parameters": 3, - "filename": "Colour_LUT.clut", - "size_exact": 0, - "size_maximum": 131072, - "address": "0x10000000" - }, - { - "name": "Config", - "id": 103, - "required": true, - "parameters": 3, - "filename": "config.cfg", + "filename": "Default_LUT.clut", "size_exact": 0, "size_maximum": 131072, - "address": "0x40000000" + "address": "0x10000000", + "extensions": [ + "clut" + ] } ] } -} \ No newline at end of file +} diff --git a/dist/Cores/Spacemen3.PDP1/info.txt b/dist/Cores/Spacemen3.PDP1/info.txt new file mode 100644 index 0000000..ce4f3ca --- /dev/null +++ b/dist/Cores/Spacemen3.PDP1/info.txt @@ -0,0 +1,13 @@ +In 1962, the first digital video game, Spacewar! debuted on an early computer released in 1959 called the PDP-1 at MIT. + +The beginning of video games. + +Spacewar! set forth and established the fundamental characteristics and philosophical approaches that would define and serve as the earliest guidelines of what a video game is. + +Inspired by science fiction literature and cinema. Driven by creatively pushing technology to its limits. + +A new medium and art form was born. + +SpaceWar! was released on a computer produced in 1959 called the PDP-1. Spacewar! is arguably the first digital video game ever created. + +PDP-1 has been painstakingly recreated with the public domain open source code for openFPGA by Spacemen3. So it can be preserved, studied and played forever without compromises. diff --git a/dist/Cores/Spacemen3.PDP1/input.json b/dist/Cores/Spacemen3.PDP1/input.json index 90fa984..ebefa9e 100644 --- a/dist/Cores/Spacemen3.PDP1/input.json +++ b/dist/Cores/Spacemen3.PDP1/input.json @@ -4,64 +4,24 @@ "controllers": [ { "type": "default", - "map_analog_to_dpad": true, "mappings": [ { - "D-Pad Up": "pad1_d_up" + "id": 0, + "name": "Shoot Missile", + "key": "pad_btn_a" }, { - "D-Pad Down": "pad1_d_down" + "id": 1, + "name": "Thrust", + "key": "pad_btn_b" }, { - "D-Pad Left": "pad1_d_left" - }, - { - "D-Pad Right": "pad1_d_right" - }, - { - "A": "pad1_btn_b" - }, - { - "B": "pad1_btn_a" - }, - { - "Start": "pad1_btn_start" - }, - { - "Select": "pad1_btn_back" - } - ] - }, - { - "type": "default", - "map_analog_to_dpad": true, - "mappings": [ - { - "D-Pad Up": "key1_scan_E048" - }, - { - "D-Pad Down": "key1_scan_E050" - }, - { - "D-Pad Left": "key1_scan_E04B" - }, - { - "D-Pad Right": "key1_scan_E04D" - }, - { - "A": "key1_scan_002D" - }, - { - "B": "key1_scan_002C" - }, - { - "Start": "key1_scan_001F" - }, - { - "Select": "key1_scan_001E" + "id": 2, + "name": "Warp", + "key": "pad_btn_y" } ] } ] } -} \ No newline at end of file +} diff --git a/dist/Cores/Spacemen3.PDP1/interact.json b/dist/Cores/Spacemen3.PDP1/interact.json index 7ae6b59..e190023 100644 --- a/dist/Cores/Spacemen3.PDP1/interact.json +++ b/dist/Cores/Spacemen3.PDP1/interact.json @@ -2,86 +2,110 @@ "interact": { "magic": "APF_VER_1", "variables": [ - { - "name": "Demo 32bit", - "id": 0, - "type": "number_u32", - "editable": true, + { + "name": "Trails", + "id": 1, + "type": "slider_u32", + "enabled": true, + "persist": true, "address": "0x40000004", + "defaultval": 7, + "mask": "0xffffff00", "graphical": { - "default": 0, + "signed": false, "min": 0, "max": 7, "adjust_small": 1, - "adjust_large": 1, - "style": "bar" + "adjust_large": 1 } }, - { - "name": "Magnify Ships", - "id": 0, - "type": "radio", - "group": 100, - "editable": true, + { + "name": "Ship Mag", + "id": 2, + "type": "check", + "enabled": true, + "persist": true, "address": "0x40000000", - "value": 1 - } + "defaultval": 1, + "value": "0x1", + "mask": "0xFFFFFFFE" + }, - { - "name": "Blur On", - "id": 0, - "type": "radio", - "group": 100, - "editable": true, - "address": "0x40000008", - "value": 1 - } - }, - { - "name": "Radio test2", + { + "name": "Trail Blur", "id": 3, - "type": "radio", - "group": 100, - "editable": true, - "address": "0x00F0000A", - "value": 92 + "type": "check", + "enabled": true, + "group": 101, + "persist": true, + "address": "0x40000008", + "defaultval": 0, + "value": "0x1", + "mask": "0xFFFFFFFE" }, - { - "name": "Checkbox test", + { + "name": "Black Hole Off", "id": 4, "type": "check", - "editable": true, - "address": "0x00F00010", - "value": 64, - "value_unchecked": 128 - + "enabled": true, + "group": 102, + "persist": true, + "address": "0x4000000C", + "defaultval": 0, + "value": "0x20", + "mask": "0xFFFFFFDF" }, - { - "name": "Button test", + { + "name": "Black Hole Kills", "id": 5, - "type": "button", - "editable": true, - "address": "0x00F00014", - "value": 64 - } - ], - "messages": [ - { - "id": 0, - "text": "Unknown error. Please reset core" + "type": "check", + "enabled": true, + "group": 103, + "persist": true, + "address": "0x4000000C", + "defaultval": 0, + "value": "0x10", + "mask": "0xFFFFFFEF" }, - { - "id": 1, - "text": "Corrupt header. Will not pass BIOS check to boot." + { + "name": "Background Off", + "id": 6, + "type": "check", + "enabled": true, + "group": 104, + "persist": true, + "address": "0x4000000C", + "defaultval": 0, + "value": "0x8", + "mask": "0xFFFFFFF7" }, - { - "id": 2, - "text": "Unsupported mapper or MBC type." + { + "name": "Low Gravity", + "id": 8, + "type": "check", + "enabled": true, + "group": 106, + "persist": true, + "address": "0x4000000C", + "defaultval": 0, + "value": "0x2", + "mask": "0xFFFFFFFD" }, - { - "id": 3, - "text": "Generic unhelpful error message." + { + "name": "Ang. Momentum", + "id": 9, + "type": "check", + "enabled": true, + "group": 107, + "persist": true, + "address": "0x4000000C", + "defaultval": 0, + "value": "0x1", + "mask": "0xFFFFFFFE" } + ], + "messages": [ + ] } -} \ No newline at end of file +} diff --git a/dist/Cores/Spacemen3.PDP1/program.bin b/dist/Cores/Spacemen3.PDP1/program.bin deleted file mode 100644 index 6d17cf9..0000000 Binary files a/dist/Cores/Spacemen3.PDP1/program.bin and /dev/null differ diff --git a/dist/Platforms/pdp1.json b/dist/Platforms/pdp1.json index 13ff798..0de952c 100644 --- a/dist/Platforms/pdp1.json +++ b/dist/Platforms/pdp1.json @@ -1,7 +1,8 @@ { - "platform": { - "name": "PDP-1: Spacewar!", - "manufacturer": "Digital Equipment Corporation", - "year": 1959 - } -} \ No newline at end of file + "platform": { + "category": "Computer", + "name": "PDP-1: Spacewar!", + "year": 1959, + "manufacturer": "Digital Equipment Corporation" + } +} diff --git a/src/ap_core.qsf b/src/ap_core.qsf index 806cc21..b059507 100644 --- a/src/ap_core.qsf +++ b/src/ap_core.qsf @@ -736,7 +736,7 @@ set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top # --------------------------- set_global_assignment -name NUM_PARALLEL_PROCESSORS ALL set_global_assignment -name FLOW_ENABLE_RTL_VIEWER ON -set_global_assignment -name OPTIMIZATION_MODE "HIGH PERFORMANCE EFFORT" +set_global_assignment -name OPTIMIZATION_MODE BALANCED set_global_assignment -name ALLOW_REGISTER_MERGING OFF set_global_assignment -name ALLOW_REGISTER_DUPLICATION OFF set_global_assignment -name ALLOW_ANY_RAM_SIZE_FOR_RECOGNITION ON @@ -774,5 +774,337 @@ set_global_assignment -name QIP_FILE taperam.qip set_global_assignment -name QIP_FILE rendram.qip set_global_assignment -name QIP_FILE linebuf.qip set_global_assignment -name QIP_FILE BRAM_DUAL_PORT_CLOCK.qip +set_global_assignment -name SLD_NODE_CREATOR_ID 110 -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_ENTITY_NAME sld_signaltap -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_clk -to "core_top:ic|clk_74a" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[0] -to "core_top:ic|bridge_addr[0]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[1] -to "core_top:ic|bridge_addr[10]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[2] -to "core_top:ic|bridge_addr[11]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[3] -to "core_top:ic|bridge_addr[12]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[4] -to "core_top:ic|bridge_addr[13]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[5] -to "core_top:ic|bridge_addr[14]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[6] -to "core_top:ic|bridge_addr[15]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[7] -to "core_top:ic|bridge_addr[16]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[8] -to "core_top:ic|bridge_addr[17]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[9] -to "core_top:ic|bridge_addr[18]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[10] -to "core_top:ic|bridge_addr[19]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[11] -to "core_top:ic|bridge_addr[1]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[12] -to "core_top:ic|bridge_addr[20]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[13] -to "core_top:ic|bridge_addr[21]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[14] -to "core_top:ic|bridge_addr[22]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[15] -to "core_top:ic|bridge_addr[23]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[16] -to "core_top:ic|bridge_addr[24]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[17] -to "core_top:ic|bridge_addr[25]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[18] -to "core_top:ic|bridge_addr[26]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[19] -to "core_top:ic|bridge_addr[27]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[20] -to "core_top:ic|bridge_addr[28]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[21] -to "core_top:ic|bridge_addr[29]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[22] -to "core_top:ic|bridge_addr[2]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[23] -to "core_top:ic|bridge_addr[30]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[24] -to "core_top:ic|bridge_addr[31]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[25] -to "core_top:ic|bridge_addr[3]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[26] -to "core_top:ic|bridge_addr[4]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[27] -to "core_top:ic|bridge_addr[5]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[28] -to "core_top:ic|bridge_addr[6]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[29] -to "core_top:ic|bridge_addr[7]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[30] -to "core_top:ic|bridge_addr[8]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[31] -to "core_top:ic|bridge_addr[9]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[32] -to "core_top:ic|bridge_addr_buf[0]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[33] -to "core_top:ic|bridge_addr_buf[10]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[34] -to "core_top:ic|bridge_addr_buf[11]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[35] -to "core_top:ic|bridge_addr_buf[12]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[36] -to "core_top:ic|bridge_addr_buf[13]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[37] -to "core_top:ic|bridge_addr_buf[14]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[38] -to "core_top:ic|bridge_addr_buf[15]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[39] -to "core_top:ic|bridge_addr_buf[16]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[40] -to "core_top:ic|bridge_addr_buf[17]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[41] -to "core_top:ic|bridge_addr_buf[18]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[42] -to "core_top:ic|bridge_addr_buf[19]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[43] -to "core_top:ic|bridge_addr_buf[1]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[44] -to "core_top:ic|bridge_addr_buf[20]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[45] -to "core_top:ic|bridge_addr_buf[21]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[46] -to "core_top:ic|bridge_addr_buf[22]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[47] -to "core_top:ic|bridge_addr_buf[23]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[48] -to "core_top:ic|bridge_addr_buf[24]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[49] -to "core_top:ic|bridge_addr_buf[25]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[50] -to "core_top:ic|bridge_addr_buf[26]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[51] -to "core_top:ic|bridge_addr_buf[27]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[52] -to "core_top:ic|bridge_addr_buf[28]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[53] -to "core_top:ic|bridge_addr_buf[29]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[54] -to "core_top:ic|bridge_addr_buf[2]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[55] -to "core_top:ic|bridge_addr_buf[30]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[56] -to "core_top:ic|bridge_addr_buf[31]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[57] -to "core_top:ic|bridge_addr_buf[3]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[58] -to "core_top:ic|bridge_addr_buf[4]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[59] -to "core_top:ic|bridge_addr_buf[5]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[60] -to "core_top:ic|bridge_addr_buf[6]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[61] -to "core_top:ic|bridge_addr_buf[7]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[62] -to "core_top:ic|bridge_addr_buf[8]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[63] -to "core_top:ic|bridge_addr_buf[9]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[64] -to "core_top:ic|bridge_rd" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[65] -to "core_top:ic|bridge_rd_data[0]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[66] -to "core_top:ic|bridge_rd_data[10]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[67] -to "core_top:ic|bridge_rd_data[11]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[68] -to "core_top:ic|bridge_rd_data[12]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[69] -to "core_top:ic|bridge_rd_data[13]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[70] -to "core_top:ic|bridge_rd_data[14]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[71] -to "core_top:ic|bridge_rd_data[15]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[72] -to "core_top:ic|bridge_rd_data[16]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[73] -to "core_top:ic|bridge_rd_data[17]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[74] -to "core_top:ic|bridge_rd_data[18]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[75] -to "core_top:ic|bridge_rd_data[19]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[76] -to "core_top:ic|bridge_rd_data[1]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[77] -to "core_top:ic|bridge_rd_data[20]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[78] -to "core_top:ic|bridge_rd_data[21]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[79] -to "core_top:ic|bridge_rd_data[22]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[80] -to "core_top:ic|bridge_rd_data[23]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[81] -to "core_top:ic|bridge_rd_data[24]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[82] -to "core_top:ic|bridge_rd_data[25]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[83] -to "core_top:ic|bridge_rd_data[26]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[84] -to "core_top:ic|bridge_rd_data[27]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[85] -to "core_top:ic|bridge_rd_data[28]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[86] -to "core_top:ic|bridge_rd_data[29]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[87] -to "core_top:ic|bridge_rd_data[2]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[88] -to "core_top:ic|bridge_rd_data[30]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[89] -to "core_top:ic|bridge_rd_data[31]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[90] -to "core_top:ic|bridge_rd_data[3]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[91] -to "core_top:ic|bridge_rd_data[4]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[92] -to "core_top:ic|bridge_rd_data[5]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[93] -to "core_top:ic|bridge_rd_data[6]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[94] -to "core_top:ic|bridge_rd_data[7]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[95] -to "core_top:ic|bridge_rd_data[8]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[96] -to "core_top:ic|bridge_rd_data[9]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[97] -to "core_top:ic|bridge_wr" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[98] -to "core_top:ic|bridge_wr_data[0]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[99] -to "core_top:ic|bridge_wr_data[10]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[100] -to "core_top:ic|bridge_wr_data[11]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[101] -to "core_top:ic|bridge_wr_data[12]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[102] -to "core_top:ic|bridge_wr_data[13]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[103] -to "core_top:ic|bridge_wr_data[14]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[104] -to "core_top:ic|bridge_wr_data[15]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[105] -to "core_top:ic|bridge_wr_data[16]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[106] -to "core_top:ic|bridge_wr_data[17]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[107] -to "core_top:ic|bridge_wr_data[18]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[108] -to "core_top:ic|bridge_wr_data[19]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[109] -to "core_top:ic|bridge_wr_data[1]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[110] -to "core_top:ic|bridge_wr_data[20]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[111] -to "core_top:ic|bridge_wr_data[21]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[112] -to "core_top:ic|bridge_wr_data[22]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[113] -to "core_top:ic|bridge_wr_data[23]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[114] -to "core_top:ic|bridge_wr_data[24]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[115] -to "core_top:ic|bridge_wr_data[25]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[116] -to "core_top:ic|bridge_wr_data[26]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[117] -to "core_top:ic|bridge_wr_data[27]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[118] -to "core_top:ic|bridge_wr_data[28]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[119] -to "core_top:ic|bridge_wr_data[29]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[120] -to "core_top:ic|bridge_wr_data[2]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[121] -to "core_top:ic|bridge_wr_data[30]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[122] -to "core_top:ic|bridge_wr_data[31]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[123] -to "core_top:ic|bridge_wr_data[3]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[124] -to "core_top:ic|bridge_wr_data[4]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[125] -to "core_top:ic|bridge_wr_data[5]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[126] -to "core_top:ic|bridge_wr_data[6]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[127] -to "core_top:ic|bridge_wr_data[7]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[128] -to "core_top:ic|bridge_wr_data[8]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[129] -to "core_top:ic|bridge_wr_data[9]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[130] -to "core_top:ic|sense_switches[0]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[131] -to "core_top:ic|sense_switches[1]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[132] -to "core_top:ic|sense_switches[2]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[133] -to "core_top:ic|sense_switches[3]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[134] -to "core_top:ic|sense_switches[4]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[135] -to "core_top:ic|sense_switches[5]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[0] -to "core_top:ic|bridge_addr[0]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[1] -to "core_top:ic|bridge_addr[10]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[2] -to "core_top:ic|bridge_addr[11]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[3] -to "core_top:ic|bridge_addr[12]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[4] -to "core_top:ic|bridge_addr[13]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[5] -to "core_top:ic|bridge_addr[14]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[6] -to "core_top:ic|bridge_addr[15]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[7] -to "core_top:ic|bridge_addr[16]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[8] -to "core_top:ic|bridge_addr[17]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[9] -to "core_top:ic|bridge_addr[18]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[10] -to "core_top:ic|bridge_addr[19]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[11] -to "core_top:ic|bridge_addr[1]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[12] -to "core_top:ic|bridge_addr[20]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[13] -to "core_top:ic|bridge_addr[21]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[14] -to "core_top:ic|bridge_addr[22]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[15] -to "core_top:ic|bridge_addr[23]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[16] -to "core_top:ic|bridge_addr[24]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[17] -to "core_top:ic|bridge_addr[25]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[18] -to "core_top:ic|bridge_addr[26]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[19] -to "core_top:ic|bridge_addr[27]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[20] -to "core_top:ic|bridge_addr[28]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[21] -to "core_top:ic|bridge_addr[29]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[22] -to "core_top:ic|bridge_addr[2]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[23] -to "core_top:ic|bridge_addr[30]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[24] -to "core_top:ic|bridge_addr[31]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[25] -to "core_top:ic|bridge_addr[3]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[26] -to "core_top:ic|bridge_addr[4]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[27] -to "core_top:ic|bridge_addr[5]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[28] -to "core_top:ic|bridge_addr[6]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[29] -to "core_top:ic|bridge_addr[7]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[30] -to "core_top:ic|bridge_addr[8]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[31] -to "core_top:ic|bridge_addr[9]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[32] -to "core_top:ic|bridge_addr_buf[0]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[33] -to "core_top:ic|bridge_addr_buf[10]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[34] -to "core_top:ic|bridge_addr_buf[11]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[35] -to "core_top:ic|bridge_addr_buf[12]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[36] -to "core_top:ic|bridge_addr_buf[13]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[37] -to "core_top:ic|bridge_addr_buf[14]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[38] -to "core_top:ic|bridge_addr_buf[15]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[39] -to "core_top:ic|bridge_addr_buf[16]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[40] -to "core_top:ic|bridge_addr_buf[17]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[41] -to "core_top:ic|bridge_addr_buf[18]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[42] -to "core_top:ic|bridge_addr_buf[19]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[43] -to "core_top:ic|bridge_addr_buf[1]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[44] -to "core_top:ic|bridge_addr_buf[20]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[45] -to "core_top:ic|bridge_addr_buf[21]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[46] -to "core_top:ic|bridge_addr_buf[22]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[47] -to "core_top:ic|bridge_addr_buf[23]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[48] -to "core_top:ic|bridge_addr_buf[24]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[49] -to "core_top:ic|bridge_addr_buf[25]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[50] -to "core_top:ic|bridge_addr_buf[26]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[51] -to "core_top:ic|bridge_addr_buf[27]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[52] -to "core_top:ic|bridge_addr_buf[28]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[53] -to "core_top:ic|bridge_addr_buf[29]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[54] -to "core_top:ic|bridge_addr_buf[2]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[55] -to "core_top:ic|bridge_addr_buf[30]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[56] -to "core_top:ic|bridge_addr_buf[31]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[57] -to "core_top:ic|bridge_addr_buf[3]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[58] -to "core_top:ic|bridge_addr_buf[4]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[59] -to "core_top:ic|bridge_addr_buf[5]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[60] -to "core_top:ic|bridge_addr_buf[6]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[61] -to "core_top:ic|bridge_addr_buf[7]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[62] -to "core_top:ic|bridge_addr_buf[8]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[63] -to "core_top:ic|bridge_addr_buf[9]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[64] -to "core_top:ic|bridge_rd" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[65] -to "core_top:ic|bridge_rd_data[0]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[66] -to "core_top:ic|bridge_rd_data[10]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[67] -to "core_top:ic|bridge_rd_data[11]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[68] -to "core_top:ic|bridge_rd_data[12]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[69] -to "core_top:ic|bridge_rd_data[13]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[70] -to "core_top:ic|bridge_rd_data[14]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[71] -to "core_top:ic|bridge_rd_data[15]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[72] -to "core_top:ic|bridge_rd_data[16]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[73] -to "core_top:ic|bridge_rd_data[17]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[74] -to "core_top:ic|bridge_rd_data[18]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[75] -to "core_top:ic|bridge_rd_data[19]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[76] -to "core_top:ic|bridge_rd_data[1]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[77] -to "core_top:ic|bridge_rd_data[20]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[78] -to "core_top:ic|bridge_rd_data[21]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[79] -to "core_top:ic|bridge_rd_data[22]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[80] -to "core_top:ic|bridge_rd_data[23]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[81] -to "core_top:ic|bridge_rd_data[24]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[82] -to "core_top:ic|bridge_rd_data[25]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[83] -to "core_top:ic|bridge_rd_data[26]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[84] -to "core_top:ic|bridge_rd_data[27]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[85] -to "core_top:ic|bridge_rd_data[28]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[86] -to "core_top:ic|bridge_rd_data[29]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[87] -to "core_top:ic|bridge_rd_data[2]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[88] -to "core_top:ic|bridge_rd_data[30]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[89] -to "core_top:ic|bridge_rd_data[31]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[90] -to "core_top:ic|bridge_rd_data[3]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[91] -to "core_top:ic|bridge_rd_data[4]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[92] -to "core_top:ic|bridge_rd_data[5]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[93] -to "core_top:ic|bridge_rd_data[6]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[94] -to "core_top:ic|bridge_rd_data[7]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[95] -to "core_top:ic|bridge_rd_data[8]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[96] -to "core_top:ic|bridge_rd_data[9]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[97] -to "core_top:ic|bridge_wr" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[98] -to "core_top:ic|bridge_wr_data[0]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[99] -to "core_top:ic|bridge_wr_data[10]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[100] -to "core_top:ic|bridge_wr_data[11]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[101] -to "core_top:ic|bridge_wr_data[12]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[102] -to "core_top:ic|bridge_wr_data[13]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[103] -to "core_top:ic|bridge_wr_data[14]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[104] -to "core_top:ic|bridge_wr_data[15]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[105] -to "core_top:ic|bridge_wr_data[16]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[106] -to "core_top:ic|bridge_wr_data[17]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[107] -to "core_top:ic|bridge_wr_data[18]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[108] -to "core_top:ic|bridge_wr_data[19]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[109] -to "core_top:ic|bridge_wr_data[1]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[110] -to "core_top:ic|bridge_wr_data[20]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[111] -to "core_top:ic|bridge_wr_data[21]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[112] -to "core_top:ic|bridge_wr_data[22]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[113] -to "core_top:ic|bridge_wr_data[23]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[114] -to "core_top:ic|bridge_wr_data[24]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[115] -to "core_top:ic|bridge_wr_data[25]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[116] -to "core_top:ic|bridge_wr_data[26]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[117] -to "core_top:ic|bridge_wr_data[27]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[118] -to "core_top:ic|bridge_wr_data[28]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[119] -to "core_top:ic|bridge_wr_data[29]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[120] -to "core_top:ic|bridge_wr_data[2]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[121] -to "core_top:ic|bridge_wr_data[30]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[122] -to "core_top:ic|bridge_wr_data[31]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[123] -to "core_top:ic|bridge_wr_data[3]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[124] -to "core_top:ic|bridge_wr_data[4]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[125] -to "core_top:ic|bridge_wr_data[5]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[126] -to "core_top:ic|bridge_wr_data[6]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[127] -to "core_top:ic|bridge_wr_data[7]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[128] -to "core_top:ic|bridge_wr_data[8]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[129] -to "core_top:ic|bridge_wr_data[9]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[130] -to "core_top:ic|sense_switches[0]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[131] -to "core_top:ic|sense_switches[1]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[132] -to "core_top:ic|sense_switches[2]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[133] -to "core_top:ic|sense_switches[3]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[134] -to "core_top:ic|sense_switches[4]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[135] -to "core_top:ic|sense_switches[5]" -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_RAM_BLOCK_TYPE=AUTO" -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_DATA_BITS=136" -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_BITS=136" -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_STORAGE_QUALIFIER_BITS=136" -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_NODE_INFO=805334528" -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_POWER_UP_TRIGGER=0" -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_INVERSION_MASK=000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000" -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_INVERSION_MASK_LENGTH=429" -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_STORAGE_QUALIFIER_INVERSION_MASK_LENGTH=0" -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_SEGMENT_SIZE=128" -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_ATTRIBUTE_MEM_MODE=OFF" -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_STATE_FLOW_USE_GENERATED=0" -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_STATE_BITS=11" -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_BUFFER_FULL_STOP=1" -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_CURRENT_RESOURCE_WIDTH=1" -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_INCREMENTAL_ROUTING=1" -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[0] -to auto_signaltap_0|vcc -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[1] -to auto_signaltap_0|gnd -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[2] -to auto_signaltap_0|vcc -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[3] -to auto_signaltap_0|gnd -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[4] -to auto_signaltap_0|gnd -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[5] -to auto_signaltap_0|gnd -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[6] -to auto_signaltap_0|vcc -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[7] -to auto_signaltap_0|gnd -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[8] -to auto_signaltap_0|vcc -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[9] -to auto_signaltap_0|vcc -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[10] -to auto_signaltap_0|gnd -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[11] -to auto_signaltap_0|vcc -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[12] -to auto_signaltap_0|vcc -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[13] -to auto_signaltap_0|gnd -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[14] -to auto_signaltap_0|vcc -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[15] -to auto_signaltap_0|vcc -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[16] -to auto_signaltap_0|vcc -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[17] -to auto_signaltap_0|gnd -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[18] -to auto_signaltap_0|gnd -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[19] -to auto_signaltap_0|gnd -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[20] -to auto_signaltap_0|vcc -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[21] -to auto_signaltap_0|gnd -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[22] -to auto_signaltap_0|vcc -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[23] -to auto_signaltap_0|gnd -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[24] -to auto_signaltap_0|gnd -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[25] -to auto_signaltap_0|vcc -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[26] -to auto_signaltap_0|gnd -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[27] -to auto_signaltap_0|vcc -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[28] -to auto_signaltap_0|vcc -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[29] -to auto_signaltap_0|gnd -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[30] -to auto_signaltap_0|gnd -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[31] -to auto_signaltap_0|vcc -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_LEVEL=1" -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_SAMPLE_DEPTH=128" -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_IN_ENABLED=0" -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_PIPELINE=0" -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_RAM_PIPELINE=0" -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_COUNTER_PIPELINE=0" -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_ADVANCED_TRIGGER_ENTITY=basic,1," -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_LEVEL_PIPELINE=1" -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_ENABLE_ADVANCED_TRIGGER=0" -section_id auto_signaltap_0 set_global_assignment -name SLD_FILE db/stp1_auto_stripped.stp set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top \ No newline at end of file diff --git a/src/apf/apf_top.v b/src/apf/apf_top.v index df7ac28..3a41b80 100644 --- a/src/apf/apf_top.v +++ b/src/apf/apf_top.v @@ -8,7 +8,11 @@ // laws, including, but not limited to, U.S. copyright law. All rights are // reserved. By using the APF code you are agreeing to the terms of the End User // License Agreement (“EULA”) located at [https://www.analogue.link/pocket-eula] -// and incorporated herein by reference. +// and incorporated herein by reference. To the extent any use of the APF requires +// application of the MIT License or the GNU General Public License and terms of +// this APF Software License Agreement and EULA are inconsistent with such license, +// the applicable terms of the MIT License or the GNU General Public License, as +// applicable, will prevail. // THE SOFTWARE IS PROVIDED "AS-IS" AND WE EXPRESSLY DISCLAIM ANY IMPLIED // WARRANTIES TO THE FULLEST EXTENT PROVIDED BY LAW, INCLUDING BUT NOT LIMITED TO, @@ -33,15 +37,14 @@ // 6515C - Analogue Pocket main unit // SOCRATES FPGA // -// 2022-06-28 Analogue +// 2022-08-17 Analogue /*The PDP-1 Core running Spacewar! on the Analogue Pocket via openFPGA Uses the original tape program file of Spacewar! v3.1 1962 Supports Sleep/Wake and Memories (beta) -All colors are assigned via an updatable LUT -Main sense switches are set via an updatable config file */ +Supports interact menu with various options */ `default_nettype none diff --git a/src/apf/build_id.mif b/src/apf/build_id.mif index 97ebd45..4daebfc 100644 --- a/src/apf/build_id.mif +++ b/src/apf/build_id.mif @@ -9,8 +9,8 @@ DATA_RADIX = HEX; CONTENT BEGIN - 0E0 : 20220805; - 0E1 : 00203916; - 0E2 : b01add52; + 0E0 : 20220817; + 0E1 : 00181050; + 0E2 : dd5d9728; END; diff --git a/src/apf/common.v b/src/apf/common.v index f010e8d..de4a22f 100644 --- a/src/apf/common.v +++ b/src/apf/common.v @@ -8,7 +8,11 @@ // laws, including, but not limited to, U.S. copyright law. All rights are // reserved. By using the APF code you are agreeing to the terms of the End User // License Agreement (“EULA”) located at [https://www.analogue.link/pocket-eula] -// and incorporated herein by reference. +// and incorporated herein by reference. To the extent any use of the APF requires +// application of the MIT License or the GNU General Public License and terms of +// this APF Software License Agreement and EULA are inconsistent with such license, +// the applicable terms of the MIT License or the GNU General Public License, as +// applicable, will prevail. // THE SOFTWARE IS PROVIDED "AS-IS" AND WE EXPRESSLY DISCLAIM ANY IMPLIED // WARRANTIES TO THE FULLEST EXTENT PROVIDED BY LAW, INCLUDING BUT NOT LIMITED TO, @@ -149,4 +153,4 @@ always @(posedge b_clk) begin b_dout <= mem[b_addr]; end -endmodule \ No newline at end of file +endmodule diff --git a/src/apf/io_bridge_peripheral.v b/src/apf/io_bridge_peripheral.v index 74597b6..683589d 100644 --- a/src/apf/io_bridge_peripheral.v +++ b/src/apf/io_bridge_peripheral.v @@ -8,7 +8,11 @@ // laws, including, but not limited to, U.S. copyright law. All rights are // reserved. By using the APF code you are agreeing to the terms of the End User // License Agreement (“EULA”) located at [https://www.analogue.link/pocket-eula] -// and incorporated herein by reference. +// and incorporated herein by reference. To the extent any use of the APF requires +// application of the MIT License or the GNU General Public License and terms of +// this APF Software License Agreement and EULA are inconsistent with such license, +// the applicable terms of the MIT License or the GNU General Public License, as +// applicable, will prevail. // THE SOFTWARE IS PROVIDED "AS-IS" AND WE EXPRESSLY DISCLAIM ANY IMPLIED // WARRANTIES TO THE FULLEST EXTENT PROVIDED BY LAW, INCLUDING BUT NOT LIMITED TO, diff --git a/src/apf/io_pad_controller.v b/src/apf/io_pad_controller.v index 26e4c2e..b6f9169 100644 --- a/src/apf/io_pad_controller.v +++ b/src/apf/io_pad_controller.v @@ -8,7 +8,11 @@ // laws, including, but not limited to, U.S. copyright law. All rights are // reserved. By using the APF code you are agreeing to the terms of the End User // License Agreement (“EULA”) located at [https://www.analogue.link/pocket-eula] -// and incorporated herein by reference. +// and incorporated herein by reference. To the extent any use of the APF requires +// application of the MIT License or the GNU General Public License and terms of +// this APF Software License Agreement and EULA are inconsistent with such license, +// the applicable terms of the MIT License or the GNU General Public License, as +// applicable, will prevail. // THE SOFTWARE IS PROVIDED "AS-IS" AND WE EXPRESSLY DISCLAIM ANY IMPLIED // WARRANTIES TO THE FULLEST EXTENT PROVIDED BY LAW, INCLUDING BUT NOT LIMITED TO, @@ -31,7 +35,7 @@ // FULLEST EXTENT PERMITTED BY APPLICABLE LAW. // // pad controller -// 2020-08-10 Analogue - started +// 2020-08-17 Analogue // module io_pad_controller ( diff --git a/src/core/PDP-1/cpu.v b/src/core/PDP-1/cpu.v index 68edc08..216c2a0 100644 --- a/src/core/PDP-1/cpu.v +++ b/src/core/PDP-1/cpu.v @@ -207,6 +207,7 @@ task execute_instruction; input [0:0] indirect_addr; input [17:0] instruction; input [17:0] operand; + reg [5:0] sense_switches_select; begin PREV_IR <= IR; @@ -424,7 +425,8 @@ begin +------------------------------------- invert skip */ i_skp: - begin + begin + sense_switches_select = sense_switches >> instruction[5:3] - 1; SKIP_FLAG = ( (instruction[6] && AC == 0) /* Skip on ZERO Accumulator (sza) */ || (instruction[7] && AC[17] == 0) /* Skip on Plus Accumulator (spa) */ @@ -435,8 +437,11 @@ begin || (|instruction[2:0] && ~&instruction[2:0] && PF[instruction[2:0]] == 0) /* Skip on ZERO Program Flag (szf) */ || (instruction[2:0] == 3'b111 && PF == 0) /* Skip on ZERO Program Flag all (szf) */ - || (|instruction[5:3] && ~&instruction[5:3] && sense_switches[instruction[5:3]] == 0) /* Skip on ZERO Switch addr 1-6 (szs) */ - || (instruction[5:3] == 3'b111 && sense_switches == 0) /* Skip on ZERO Switch addr 7 (szs) */ + || ( |instruction[5:3] && + ~&instruction[5:3] && + sense_switches_select[0] == 0) + //((sense_switches[instruction[5:3]]) == 0)) /* Skip on ZERO Switch addr 1-6 (szs) */ + || (instruction[5:3] == 3'b111 && sense_switches == 0) /* Skip on ZERO Switch addr 7 (szs) */ ); if (instruction[12] ^ SKIP_FLAG) /* If 6-th bit (DEC notation) is 1 and skip flag 0, or vice-versa */ diff --git a/src/core/PDP-1/pdp1_vga_crt.v b/src/core/PDP-1/pdp1_vga_crt.v index 8502e13..df73485 100644 --- a/src/core/PDP-1/pdp1_vga_crt.v +++ b/src/core/PDP-1/pdp1_vga_crt.v @@ -292,7 +292,20 @@ module pdp1_vga_crt ( localparam startline = 12'd12; // the line DE starts on, because we need to preroll for the first line buffer to fill localparam cv_lowbit = 'd4; // lowest bit to check on the vertical counter - wire [9:0] phos_dim = ({6'h0, trail_len} + 10'h1); //calculate trail length + // trail length + reg [9:0] phos_dim; + always + case(trail_len[2:0]) + 3'h0 : phos_dim <= 10'h3fe; + 3'h1 : phos_dim <= 10'd64; + 3'h2 : phos_dim <= 10'd32; + 3'h3 : phos_dim <= 10'd16; + 3'h4 : phos_dim <= 10'd8; + 3'h5 : phos_dim <= 10'd4; + 3'h6 : phos_dim <= 10'd2; + 3'h7 : phos_dim <= 10'd1; + endcase + localparam phos_full = 10'h3ff; // maximum brightness wire [31:0] pa_out [numbuffs-1:0]; // bram port A out @@ -493,7 +506,13 @@ module pdp1_vga_crt ( // do phosphor dim, but only if we are marked "rendered" and we have not hit 0 // also, the first step is always 1 so that we will see the blue for 2 full frames, to prevent it flickering if it is being redrawn 6'b1xx_0x1 : begin - pb_in[j] <= {1'b0, pa_out[j][30], (pa_out[j][29:20] - (&pa_out[j][29:20] ? 10'h1 : phos_dim)), pa_out[j][19:0]}; + pb_in[j][31:30] <= {1'b0, pa_out[j][30]}; + pb_in[j][19:0] <= pa_out[j][19:0]; + casex({&pa_out[j][29:20], 1'b0, pa_out[j][29:20]} - {1'b0, phos_dim}) + 12'b1xxx_xxxx_xxxx : pb_in[j][29:20] <= 10'h3fe; // subtract 1 on the first go + 12'b00xx_xxxx_xxxx : pb_in[j][29:20] <= (pa_out[j][29:20] - phos_dim); // no underflow + 12'b01xx_xxxx_xxxx : pb_in[j][29:20] <= 10'h0; // underflow + endcase pb_wren[j] <= 1'b1; end @@ -758,4 +777,4 @@ module pdp1_vga_crt ( endmodule - + \ No newline at end of file diff --git a/src/core/core_top.v b/src/core/core_top.v index 18f20ce..ac766a0 100644 --- a/src/core/core_top.v +++ b/src/core/core_top.v @@ -292,6 +292,8 @@ wire [17:0] IR_OUT; reg [7:0] IOSTA_IN; wire [7:0] IOSTA_OUT; +reg [31:0] fuctions_bridge_rd_data; + reg [17:0] AC_OUT_REG; @@ -354,7 +356,9 @@ always @(*) begin 32'hF8xxxxxx: begin bridge_rd_data <= cmd_bridge_rd_data; end - + 32'h4000xxxx: begin + bridge_rd_data <= fuctions_bridge_rd_data; + end default : begin bridge_rd_data <= bridge_rd_data_buf; @@ -422,6 +426,17 @@ always @(posedge clk_74a or negedge reset_internal_n) begin end end +always @(posedge clk_74a) begin + if (bridge_rd) begin + case (bridge_addr[15:0]) + 16'h00 : fuctions_bridge_rd_data <= mag_ships; + 16'h04 : fuctions_bridge_rd_data <= trail_len; + 16'h08 : fuctions_bridge_rd_data <= blur_on; + 16'h0C : fuctions_bridge_rd_data <= sense_switches; + endcase + end +end + // bridge data slot access wire [9:0] datatable_addr; @@ -603,7 +618,7 @@ pdp1_vga_crt type30_crt( .pixel_type (pixel_type), .mag_ships (mag_ships), // 1 = render ships in full resolution (no jaggies) 0 = scaled - .trail_len (trail_len), // trail lengths. 0 = longest, 7 = shortest + .trail_len ((trail_len)), // trail lengths. 0 = longest, 7 = shortest .blur_on (blur_on), // 1 = turn blurring on, 0 = turn it off .clk_74a (clk_74a), diff --git a/src/core/stp1.stp b/src/core/stp1.stp index 10c0a7c..131a68b 100644 --- a/src/core/stp1.stp +++ b/src/core/stp1.stp @@ -1,5 +1,6 @@ + @@ -140,6 +141,913 @@
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 1111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111 + 1111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111 + + + + + + + + + + + + + + + + + + + + @@ -152,11 +1060,4 @@ - - - - - - - diff --git a/src/output_files/ap_core.cdf b/src/output_files/ap_core.cdf index 32453eb..69138c9 100644 --- a/src/output_files/ap_core.cdf +++ b/src/output_files/ap_core.cdf @@ -4,7 +4,7 @@ JedecChain; DefaultMfr(6E); P ActionCode(Cfg) - Device PartName(5CEBA4F23) Path("F:/Ananlogue/[Analogue] PDP-1 Core/src/output_files/") File("ap_core.sof") MfrSpec(OpMask(1)); + Device PartName(5CEBA4F23) Path("F:/Analogue/[Analogue] PDP-1 Core/src/output_files/") File("ap_core.sof") MfrSpec(OpMask(1)); ChainEnd; diff --git a/src/output_files/ap_core.jdi b/src/output_files/ap_core.jdi index 94b75f0..3851897 100644 --- a/src/output_files/ap_core.jdi +++ b/src/output_files/ap_core.jdi @@ -1,8 +1,82 @@ - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/output_files/ap_core.rbf b/src/output_files/ap_core.rbf index 6f521fd..3469f50 100644 Binary files a/src/output_files/ap_core.rbf and b/src/output_files/ap_core.rbf differ diff --git a/src/output_files/ap_core.sld b/src/output_files/ap_core.sld index f7d3ed7..9fbd92d 100644 --- a/src/output_files/ap_core.sld +++ b/src/output_files/ap_core.sld @@ -1 +1,9 @@ - + + + + + + + + + diff --git a/src/output_files/bitstream.rbf_r b/src/output_files/bitstream.rbf_r index 50b9965..42e991a 100644 Binary files a/src/output_files/bitstream.rbf_r and b/src/output_files/bitstream.rbf_r differ diff --git a/src/output_files/run.bat b/src/output_files/run.bat index ee02c3b..f3729a7 100644 --- a/src/output_files/run.bat +++ b/src/output_files/run.bat @@ -1,2 +1,3 @@ reverse_bits.exe ap_core.rbf bitstream.rbf_r -copy /y bitstream.rbf_r "H:\Cores\Spacemen3.PDP1" \ No newline at end of file +copy /y bitstream.rbf_r "H:\Cores\Spacemen3.PDP1\bitstream.rbf_r" +copy /y bitstream.rbf_r "..\..\dist\Cores\Spacemen3.PDP1\bitstream.rbf_r" \ No newline at end of file diff --git a/src/rendram.qip b/src/rendram.qip index a097f50..886b750 100644 --- a/src/rendram.qip +++ b/src/rendram.qip @@ -1,5 +1,5 @@ set_global_assignment -name IP_TOOL_NAME "RAM: 2-PORT" -set_global_assignment -name IP_TOOL_VERSION "18.1" +set_global_assignment -name IP_TOOL_VERSION "20.1" set_global_assignment -name IP_GENERATED_DEVICE_FAMILY "{Cyclone V}" set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) "rendram.v"] set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "rendram_bb.v"] diff --git a/src/rendram.v b/src/rendram.v index e344a72..6d61919 100644 --- a/src/rendram.v +++ b/src/rendram.v @@ -14,13 +14,13 @@ // ************************************************************ // THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE! // -// 18.1.0 Build 625 09/12/2018 SJ Lite Edition +// 20.1.1 Build 720 11/11/2020 SJ Standard Edition // ************************************************************ -//Copyright (C) 2018 Intel Corporation. All rights reserved. +//Copyright (C) 2020 Intel Corporation. All rights reserved. //Your use of Intel Corporation's design tools, logic functions -//and other software and tools, and its AMPP partner logic +//and other software and tools, and any partner logic //functions, and any output files from any of the foregoing //(including device programming or simulation files), and any //associated documentation or information are expressly subject @@ -30,7 +30,8 @@ //agreement, including, without limitation, that your use is for //the sole purpose of programming logic devices manufactured by //Intel and sold by Intel or its authorized distributors. Please -//refer to the applicable agreement for further details. +//refer to the applicable agreement for further details, at +//https://fpgasoftware.intel.com/eula. // synopsys translate_off diff --git a/src/rendram_bb.v b/src/rendram_bb.v index 077df05..13682dd 100644 --- a/src/rendram_bb.v +++ b/src/rendram_bb.v @@ -14,12 +14,12 @@ // ************************************************************ // THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE! // -// 18.1.0 Build 625 09/12/2018 SJ Lite Edition +// 20.1.1 Build 720 11/11/2020 SJ Standard Edition // ************************************************************ -//Copyright (C) 2018 Intel Corporation. All rights reserved. +//Copyright (C) 2020 Intel Corporation. All rights reserved. //Your use of Intel Corporation's design tools, logic functions -//and other software and tools, and its AMPP partner logic +//and other software and tools, and any partner logic //functions, and any output files from any of the foregoing //(including device programming or simulation files), and any //associated documentation or information are expressly subject @@ -29,7 +29,8 @@ //agreement, including, without limitation, that your use is for //the sole purpose of programming logic devices manufactured by //Intel and sold by Intel or its authorized distributors. Please -//refer to the applicable agreement for further details. +//refer to the applicable agreement for further details, at +//https://fpgasoftware.intel.com/eula. module rendram ( address_a,