diff --git a/src/plugins/intel_cpu/src/dnnl_extension_utils.cpp b/src/plugins/intel_cpu/src/dnnl_extension_utils.cpp index 61726919eae7b4..650f653f580887 100644 --- a/src/plugins/intel_cpu/src/dnnl_extension_utils.cpp +++ b/src/plugins/intel_cpu/src/dnnl_extension_utils.cpp @@ -65,7 +65,7 @@ memory::data_type DnnlExtensionUtils::IEPrecisionToDataType(const InferenceEngin case InferenceEngine::Precision::UNSPECIFIED: return memory::data_type::undef; default: { - return memory::data_type::undef; + OPENVINO_THROW("The plugin does not support ", prec.name()); } } } diff --git a/src/plugins/intel_cpu/src/graph.cpp b/src/plugins/intel_cpu/src/graph.cpp index ae56629bb5b1b5..c14e255efbda0a 100644 --- a/src/plugins/intel_cpu/src/graph.cpp +++ b/src/plugins/intel_cpu/src/graph.cpp @@ -201,6 +201,7 @@ void Graph::Replicate(const std::shared_ptr &model) { }); }; +#if 0 auto find_input_port_prec = [&](const std::string& name) -> ov::element::Type_t { for (auto& it : model->inputs()) { auto port_name = get_port_name(it, is_legacy_api); @@ -213,11 +214,11 @@ void Graph::Replicate(const std::shared_ptr &model) { OPENVINO_THROW("Cannot find input port with name: ", name); }; // change precision for input/output nodes to avoid extra data conversion when set input/output blobs - // for (auto &input : inputNodesMap) { - // auto prec = InferenceEngine::details::convertPrecision(find_input_port_prec(input.first)); - // const auto precToSet = normalizeToSupportedPrecision(prec); - // input.second->setOriginalOutputPrecisionAtPort(0, precToSet); - //} + for (auto& input : inputNodesMap) { + auto prec = InferenceEngine::details::convertPrecision(find_input_port_prec(input.first)); + const auto precToSet = normalizeToSupportedPrecision(prec); + input.second->setOriginalOutputPrecisionAtPort(0, precToSet); + } auto find_output_port_prec = [&](const std::string& name) -> ov::element::Type_t { for (auto& it : model->outputs()) { @@ -230,11 +231,12 @@ void Graph::Replicate(const std::shared_ptr &model) { } OPENVINO_THROW("Cannot find output port with name: ", name); }; - // for (auto &output : outputNodesMap) { - // auto prec = InferenceEngine::details::convertPrecision(find_output_port_prec(output.first)); - // const auto precToSet = normalizeToSupportedPrecision(prec); - // output.second->setOriginalInputPrecisionAtPort(0, precToSet); - //} + for (auto &output : outputNodesMap) { + auto prec = InferenceEngine::details::convertPrecision(find_output_port_prec(output.first)); + const auto precToSet = normalizeToSupportedPrecision(prec); + output.second->setOriginalInputPrecisionAtPort(0, precToSet); + } +#endif // enforce must be performed after inputs and outputs info are taken into account EnforceInferencePrecision(); // also we need to change input/output precisions for consumers/producers to avoid inserting reorder @@ -446,11 +448,16 @@ void Graph::CreatePrimitivesAndExecConstants() const { } static bool isReorderAvailable(const MemoryDescPtr& parentDesc, const MemoryDescPtr& childDesc, const dnnl::engine& eng) { - auto definedParentDesc = parentDesc->isDefined() ? parentDesc : MemoryDescUtils::makeDummyDesc(*parentDesc); - memory::desc srcMemDesc = MemoryDescUtils::convertToDnnlMemoryDesc(definedParentDesc)->getDnnlDesc(); - - auto definedChildDesc = childDesc->isDefined() ? childDesc : MemoryDescUtils::makeDummyDesc(*childDesc); - memory::desc dstMemDesc = MemoryDescUtils::convertToDnnlMemoryDesc(definedChildDesc)->getDnnlDesc(); + memory::desc srcMemDesc, dstMemDesc; + try { + auto definedParentDesc = parentDesc->isDefined() ? parentDesc : MemoryDescUtils::makeDummyDesc(*parentDesc); + memory::desc srcMemDesc = MemoryDescUtils::convertToDnnlMemoryDesc(definedParentDesc)->getDnnlDesc(); + + auto definedChildDesc = childDesc->isDefined() ? childDesc : MemoryDescUtils::makeDummyDesc(*childDesc); + memory::desc dstMemDesc = MemoryDescUtils::convertToDnnlMemoryDesc(definedChildDesc)->getDnnlDesc(); + } catch (ov::Exception&) { + return false; + } dnnl::primitive_attr attr; @@ -503,7 +510,7 @@ void Graph::InitEdges() { numberOfEdges--; }; -#if 0 +#if 1 { static std::mutex _lock; std::lock_guard guard(_lock); @@ -591,7 +598,7 @@ void Graph::InitEdges() { updateEdge(i); } } -#if 0 +#if 1 { static std::mutex _lock; std::lock_guard guard(_lock); diff --git a/src/plugins/intel_cpu/src/node.cpp b/src/plugins/intel_cpu/src/node.cpp index e8fe6b89a00afc..4070d7f3d5e7ba 100644 --- a/src/plugins/intel_cpu/src/node.cpp +++ b/src/plugins/intel_cpu/src/node.cpp @@ -1242,7 +1242,7 @@ std::vector Node::getInputPrecisions() const { for (size_t i = 0; i < getParentEdges().size(); i++) { auto parentEdge = getParentEdgeAt(i); if (parentEdge && parentEdge->getStatus() == Edge::Status::Validated) { - inputPrecisions.emplace_back(DnnlExtensionUtils::DataTypeToIEPrecision((parentEdge->getMemoryPtr()->getDataType()))); + inputPrecisions.emplace_back(parentEdge->getMemoryPtr()->getDesc().getPrecision()); } } return inputPrecisions; @@ -1253,7 +1253,7 @@ std::vector Node::getOutputPrecisions() const { for (size_t i = 0; i < getChildEdges().size(); i++) { auto childEdge = getChildEdgeAt(i); if (childEdge && childEdge->getStatus() == Edge::Status::Validated) { - outputPrecisions.emplace_back(DnnlExtensionUtils::DataTypeToIEPrecision((childEdge->getMemoryPtr()->getDataType()))); + outputPrecisions.emplace_back(childEdge->getMemoryPtr()->getDesc().getPrecision()); } } return outputPrecisions; diff --git a/src/plugins/intel_cpu/src/nodes/input.cpp b/src/plugins/intel_cpu/src/nodes/input.cpp index f8ac5501ce8c55..2f9bb1b1e35a09 100644 --- a/src/plugins/intel_cpu/src/nodes/input.cpp +++ b/src/plugins/intel_cpu/src/nodes/input.cpp @@ -482,9 +482,9 @@ void Input::initSupportedPdDefault() { if (getType() == Type::Input || getType() == Type::MemoryInput) { auto precision = getOriginalOutputPrecisionAtPort(0); - if (precision == Precision::U16 || isMeanImage) { - precision = Precision::FP32; - } + // if (precision == Precision::U16 || isMeanImage) { + // precision = Precision::FP32; + //} outPortConfs.push_back({LayoutType::ncsp, precision}); if (!getParentEdges().empty()) { @@ -492,7 +492,7 @@ void Input::initSupportedPdDefault() { } } else if (getType() == Type::Output) { auto precision = getOriginalInputPrecisionAtPort(0); - if (precision == Precision::U16) precision = Precision::FP32; + // if (precision == Precision::U16) precision = Precision::FP32; inPortConfs.push_back({LayoutType::ncsp, precision}); } diff --git a/src/plugins/intel_cpu/src/utils/cpu_utils.hpp b/src/plugins/intel_cpu/src/utils/cpu_utils.hpp index c525d498f5c31f..aecdf6080e42ba 100644 --- a/src/plugins/intel_cpu/src/utils/cpu_utils.hpp +++ b/src/plugins/intel_cpu/src/utils/cpu_utils.hpp @@ -91,7 +91,7 @@ inline bool isEmptyTensorDesc(const InferenceEngine::TensorDesc &td) { return std::any_of(dims.begin(), dims.end(), [](size_t dim) { return dim == 0; } ); } -#if 0 +#if 1 /** * @brief Return precision to which given precision must be converted to be supported in plug-in * @param precision diff --git a/src/plugins/intel_cpu/tests/functional/shared_tests_instances/skip_tests_config.cpp b/src/plugins/intel_cpu/tests/functional/shared_tests_instances/skip_tests_config.cpp index 64db4338e63262..558539a096c3c0 100644 --- a/src/plugins/intel_cpu/tests/functional/shared_tests_instances/skip_tests_config.cpp +++ b/src/plugins/intel_cpu/tests/functional/shared_tests_instances/skip_tests_config.cpp @@ -217,6 +217,9 @@ std::vector disabledTestPatterns() { R"(.*smoke_TopK/TopKLayerTest.Inference.*_k=21_.*_sort=value_modelType=f16_trgDev=CPU.*)", // Issue: 121228 R"(smoke_TestsDFT_(1|2|3|4)d/DFTLayerTest.Inference.*bf16.*)", + // Issue: 121363 + R"(.*smoke_Constant/ConstantLayerTest.*_dataPRC=(u4|u16|u32|i4|i16|f64).*)", + R"(.*smoke_Constant_with_negative_values/ConstantLayerTest.*_dataPRC=(u4|u16|u32|i4|i16|f64).*)", }; #if defined(__APPLE__) && defined(OPENVINO_ARCH_ARM64) // Issue: 120950