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I think RISC-V is similar to Intel in this regard than ARM. If agreed, it is better to create an ECR to update as "On Intel and RISC-V platforms, if the _CCA object is not supplied, the OSPM will assume the devices are hardware cache coherent. ". With that, the requirement can be removed from BRS?
The text was updated successfully, but these errors were encountered:
I think RISC-V is similar to Intel in this regard than ARM. If agreed, it is better to create an ECR to update as "On Intel and RISC-V platforms, if the _CCA object is not supplied, the OSPM will assume the devices are hardware cache coherent. ". With that, the requirement can be removed from BRS?
The text was updated successfully, but these errors were encountered: