diff --git a/.github/verible.waiver b/.github/verible.waiver
deleted file mode 100644
index 1ad2c94..0000000
--- a/.github/verible.waiver
+++ /dev/null
@@ -1,6 +0,0 @@
-# Copyright 2024 ETH Zurich and University of Bologna.
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-waive --rule=explicit-parameter-storage-type --location="src/memory_island_core.sv" --line=43
-waive --rule=explicit-parameter-storage-type --location="src/axi_memory_island_wrap.sv" --line=59
diff --git a/.github/workflows/lint.yml b/.github/workflows/lint.yml
index f70f3fd..df2a7dd 100644
--- a/.github/workflows/lint.yml
+++ b/.github/workflows/lint.yml
@@ -24,6 +24,6 @@ jobs:
             ./src
             ./test
           exclude_paths:
-          extra_args: "--waiver_files .github/verible.waiver --rules=-interface-name-style --lint_fatal --parse_fatal"
+          extra_args: "--rules=-interface-name-style --lint_fatal --parse_fatal"
           github_token: ${{ secrets.GITHUB_TOKEN }}
           reviewdog_reporter: github-check
diff --git a/src/axi_memory_island_wrap.sv b/src/axi_memory_island_wrap.sv
index f3d2371..053e556 100644
--- a/src/axi_memory_island_wrap.sv
+++ b/src/axi_memory_island_wrap.sv
@@ -56,6 +56,7 @@ module axi_memory_island_wrap #(
   parameter int unsigned NarrowExtraBF        = 1,
   /// Words per memory bank. (Total number of banks is (WideWidth/NarrowWidth)*NumWideBanks)
   parameter int unsigned WordsPerBank         = 1024,
+  // verilog_lint: waive explicit-parameter-storage-type
   parameter              MemorySimInit        = "none"
 ) (
   input  logic                               clk_i,
diff --git a/src/memory_island_core.sv b/src/memory_island_core.sv
index b113673..6c4907d 100644
--- a/src/memory_island_core.sv
+++ b/src/memory_island_core.sv
@@ -40,6 +40,7 @@ module memory_island_core #(
   parameter int unsigned SpillReqBank         = 0,
   parameter int unsigned SpillRspBank         = 0,
 
+  // verilog_lint: waive explicit-parameter-storage-type
   parameter              MemorySimInit        = "none",
 
   /// Relinquish narrow priority after x cycles, 0 for never. Requires SpillNarrowReqRouted==0.