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expander.rules
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expander.rules
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(rules PCB xyab
(snap_angle
fortyfive_degree
)
(autoroute_settings
(fanout off)
(autoroute on)
(postroute on)
(vias on)
(via_costs 50)
(plane_via_costs 5)
(start_ripup_costs 100)
(start_pass_no 3830)
(layer_rule F.Cu
(active on)
(preferred_direction vertical)
(preferred_direction_trace_costs 1.0)
(against_preferred_direction_trace_costs 4.0)
)
(layer_rule B.Cu
(active on)
(preferred_direction horizontal)
(preferred_direction_trace_costs 1.0)
(against_preferred_direction_trace_costs 1.3)
)
)
(rule
(width 254.0)
(clear 200.2)
(clear 127.0 (type smd_to_turn_gap))
(clear 50.0 (type smd_smd))
)
(padstack "Via[0-1]_800:400_um"
(shape
(circle F.Cu 800.0 0.0 0.0)
)
(shape
(circle B.Cu 800.0 0.0 0.0)
)
(attach off)
)
(via
"Via[0-1]_800:400_um" "Via[0-1]_800:400_um" default
)
(via
"Via[0-1]_800:400_um-kicad_default" "Via[0-1]_800:400_um" "kicad_default"
)
(via
"Via[0-1]_800:400_um-Power" "Via[0-1]_800:400_um" Power
)
(via_rule
default "Via[0-1]_800:400_um"
)
(via_rule
"kicad_default" "Via[0-1]_800:400_um-kicad_default"
)
(via_rule
Power "Via[0-1]_800:400_um-Power"
)
(class default
(clearance_class default)
(via_rule default)
(rule
(width 254.0)
)
(circuit
(use_layer F.Cu B.Cu)
)
)
(class "kicad_default"
"Net-(C1-Pad2)" "Net-(D1-Pad2)" "Net-(D1-Pad1)" "Net-(D3-Pad2)" "Net-(D3-Pad1)" RX MOSI TX
CS CLK "/_MIDIIN2" "/_MIDIIN1" "/_MIDIOUT" "Net-(J6-PadT)" "Net-(J7-PadT)" "Net-(J8-PadT)"
DACX DACB DACA DACY "Net-(J1-Pad16)" "Net-(J1-Pad15)" "Net-(J1-Pad13)" "Net-(J1-Pad9)"
"Net-(J1-Pad8)" "Net-(C10-Pad2)" "Net-(C10-Pad1)" "Net-(C11-Pad2)" "Net-(C11-Pad1)" "Net-(C12-Pad2)" "Net-(C12-Pad1)" "Net-(C13-Pad2)"
"Net-(C13-Pad1)" DM DP "Net-(R2-Pad2)" "Net-(R3-Pad2)" "Net-(J2-PadT)" "Net-(J5-PadT)" "Net-(J9-Pad1)"
"Net-(J2-PadTN)" "Net-(D5-Pad2)" "Net-(D5-Pad1)" "Net-(D7-Pad2)" "Net-(D7-Pad1)" N4 P4 N3
P3 N2 P2 N1 P1
(clearance_class "kicad_default")
(via_rule kicad_default)
(rule
(width 254.0)
)
(circuit
(use_layer F.Cu B.Cu)
)
)
(class Power
GND +12V "-12V" +5V +3V3 VREF +12VB "-12VB"
(clearance_class Power)
(via_rule Power)
(rule
(width 406.4)
)
(circuit
(use_layer F.Cu B.Cu)
)
)
)