src_files.yml

# Copyright 2019 ETH Zurich and University of Bologna.
# Solderpad Hardware License, Version 0.51, see LICENSE for details.
# SPDX-License-Identifier: SHL-0.51
fpnew:
  incdirs: [
    ../common_cells/include,
  ]
  files: [
    src/fpnew_pkg.sv,
    src/fpnew_cast_multi.sv,
    src/fpnew_classifier.sv,
    vendor/opene906/E906_RTL_FACTORY/gen_rtl/clk/rtl/gated_clk_cell.v,
    vendor/opene906/E906_RTL_FACTORY/gen_rtl/fdsu/rtl/pa_fdsu_ctrl.v,
    vendor/opene906/E906_RTL_FACTORY/gen_rtl/fdsu/rtl/pa_fdsu_ff1.v,
    vendor/opene906/E906_RTL_FACTORY/gen_rtl/fdsu/rtl/pa_fdsu_pack_single.v,
    vendor/opene906/E906_RTL_FACTORY/gen_rtl/fdsu/rtl/pa_fdsu_prepare.v,
    vendor/opene906/E906_RTL_FACTORY/gen_rtl/fdsu/rtl/pa_fdsu_round_single.v,
    vendor/opene906/E906_RTL_FACTORY/gen_rtl/fdsu/rtl/pa_fdsu_special.v,
    vendor/opene906/E906_RTL_FACTORY/gen_rtl/fdsu/rtl/pa_fdsu_srt_single.v,
    vendor/opene906/E906_RTL_FACTORY/gen_rtl/fdsu/rtl/pa_fdsu_top.v,
    vendor/opene906/E906_RTL_FACTORY/gen_rtl/fpu/rtl/pa_fpu_dp.v,
    vendor/opene906/E906_RTL_FACTORY/gen_rtl/fpu/rtl/pa_fpu_frbus.v,
    vendor/opene906/E906_RTL_FACTORY/gen_rtl/fpu/rtl/pa_fpu_src_type.v,
    src/fpnew_divsqrt_th_32.sv,
    src/fpnew_divsqrt_multi.sv,
    src/fpnew_fma.sv,
    src/fpnew_fma_multi.sv,
    src/fpnew_noncomp.sv,
    src/fpnew_opgroup_block.sv,
    src/fpnew_opgroup_fmt_slice.sv,
    src/fpnew_opgroup_multifmt_slice.sv,
    src/fpnew_rounding.sv,
    src/fpnew_top.sv,
  ]