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[BUG] do-not-care in case #2622

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likeamahoney opened this issue Nov 20, 2024 · 2 comments
Closed
1 task done

[BUG] do-not-care in case #2622

likeamahoney opened this issue Nov 20, 2024 · 2 comments
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Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system

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@likeamahoney
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Is there an existing CVA6 bug for this?

  • I have searched the existing bug issues

Bug Description

Hi! Here an example of do-not-care symbol usage inside a case operator.

But for handling do-not-care values in SystemVerilog LRM (as mentioned in 12.5.1 section) it is recommended to use a casez or casex operators. I suppose it is need to be changed on casex type according to LRM.
@likeamahoney likeamahoney added the Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system label Nov 20, 2024
@JeanRochCoulon
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@ASintzoff

@likeamahoney
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Sorry, I misunderstood the LRM 2017 and also reread the 2023 standard, which explains the case inside operator usage better. inside allows to use do-not-care ? values in case.

I will close the issue.

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@JeanRochCoulon @likeamahoney