Enable spike check

openhwgroup · Oct 11, 2024 · 4210fc2 · 4210fc2
1 parent 25a9376
commit 4210fc2
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Showing 15 changed files with 22 additions and 71 deletions.
diff --git a/core/include/cv32a60x_config_pkg.sv b/core/include/cv32a60x_config_pkg.sv
@@ -58,7 +58,7 @@ package cva6_config_pkg;
   localparam CVA6ConfigNrStorePipeRegs = 0;
   localparam CVA6ConfigNrLoadBufEntries = 2;
 
-  localparam CVA6ConfigRASDepth = 2;
+  localparam CVA6ConfigRASDepth = 0;
   localparam CVA6ConfigBTBEntries = 0;
   localparam CVA6ConfigBHTEntries = 0;
 

diff --git a/ve b/ve
diff --git a/veri b/veri
diff --git a/verif/core-v-verif b/verif/core-v-verif
diff --git a/verif/env/uvme/cov/uvme_axi_ext_covg.sv b/verif/env/uvme/cov/uvme_axi_ext_covg.sv
@@ -191,7 +191,7 @@ endclass : uvme_axi_ext_covg_c
 function uvme_axi_ext_covg_c::new(string name="uvme_axi_ext_covg", uvm_component parent=null);
 
    super.new(name, parent);
-   $display("uvme_axi_ext_covg_c is running here");
+
 endfunction : new
 
 function void uvme_axi_ext_covg_c::build_phase(uvm_phase phase);
@@ -243,8 +243,6 @@ endtask : run_phase
 task uvme_axi_ext_covg_c::get_aw_item();
 
    uvma_axi_transaction_c  aw_item;
-   $display("get_aw_item started");
-   $display("uvme_axi_cov_aw_req_fifo : %p",uvme_axi_cov_aw_req_fifo.size());
    uvme_axi_cov_aw_req_fifo.get(aw_item);
    `uvm_info(get_type_name(), $sformatf("WRITE REQ ITEM DETECTED"), UVM_HIGH)
    aw_trs_fifo = new [aw_trs_fifo.size()+1] (aw_trs_fifo);
@@ -267,7 +265,6 @@ endtask : get_ar_item
 task uvme_axi_ext_covg_c::get_b_item();
 
    uvma_axi_transaction_c  b_item;
-   $display("get_b_item started");
    uvme_axi_cov_b_resp_fifo.get(b_item);
    `uvm_info(get_type_name(), $sformatf("WRITE RESP ITEM DETECTED"), UVM_HIGH)
    foreach(aw_trs_fifo[i]) begin

diff --git a/verif/env/uvme/uvme_cva6_cfg.sv b/verif/env/uvme/uvme_cva6_cfg.sv
@@ -33,7 +33,7 @@ class uvme_cva6_cfg_c extends uvma_core_cntrl_cfg_c;
 
    rand bit                      scoreboard_enabled;
    rand bit                      tandem_enabled;
-   rand bit                      cov_model_enabled ; //Temp edit
+   rand bit                      cov_model_enabled;
    rand bit                      trn_log_enabled;
    rand int unsigned             sys_clk_period;
 

diff --git a/verif/env/uvme/uvme_cva6_env.sv b/verif/env/uvme/uvme_cva6_env.sv
@@ -374,7 +374,6 @@ task uvme_cva6_env_c::run_phase(uvm_phase phase);
       begin
          if(cfg.axi_cfg.is_active == UVM_ACTIVE) begin
             uvma_axi_vseq_c  axi_vseq;
-            $display("axi_vseq start");
             axi_vseq = uvma_axi_vseq_c::type_id::create("axi_vseq");
             axi_vseq.start(axi_agent.vsequencer);
          end

diff --git a/verif/env/uvme/uvme_cva6_pkg.sv b/verif/env/uvme/uvme_cva6_pkg.sv
@@ -57,7 +57,7 @@ package uvme_cva6_pkg;
 
    import "DPI-C" function void read_elf(input string filename);
    import "DPI-C" function byte get_section(output longint address, output longint len);
-   import "DPI-C" context function void read_section_sv(input longint address, inout byte buffer[]); 
+   import "DPI-C" context function void read_section_sv(input longint address, inout byte buffer[]);
 
   // Default legal opcode and funct7 for RV32I instructions
   bit [6:0]  legal_i_opcode[$] = '{7'b0000011,

diff --git a/verif/env/uvme/uvme_cva6_sb.sv b/verif/env/uvme/uvme_cva6_sb.sv
@@ -323,7 +323,7 @@ endfunction : check_mepc
 function bit [XLEN:0] uvme_cva6_sb_c::check_mcycle_h(uvma_isacov_instr_c instr, uvma_isacov_instr_c instr_prev, int cycle_count);
 
    // Check mcycle value after a CSR read
-   if (instr_prev == null) return 32'd0; // ToDo: Temp fix
+   if (instr_prev == null) return 32'd0;
 
    write_in_mcycle  = (instr_prev.is_csr_write() && instr_prev.csr_val == 12'hb00) ? 1 : 0;
    if (cfg.xlen == 32) begin

diff --git a/verif/env/uvme/vseq/uvme_axi_fw_preload_seq.sv b/verif/env/uvme/vseq/uvme_axi_fw_preload_seq.sv
@@ -48,11 +48,8 @@ task uvme_axi_fw_preload_seq_c::body();
 
    void'(uvcl.get_arg_value("+elf_file=", binary));
 
-
    if (binary != "") begin
-      $display("binary string 001: %s",binary);
       read_elf(binary);
-      $display("binary string: %s",binary);
       wait(p_sequencer.cntxt.axi_vi.clk);
       // while there are more sections to process
       while (get_section(address, len)) begin

diff --git a/verif/sim/Makefile b/verif/sim/Makefile
@@ -355,16 +355,14 @@ questa_uvm_comp:
 
 questa_uvm_run:
 	@echo "[QUESTA] Running Model"
-	echo $(elf)
 	vsim -64  \
 	  $(COMMON_RUN_UVM_FLAGS) \
 	  -sv_lib $(SPIKE_INSTALL_DIR)/lib/libyaml-cpp \
 	  -sv_lib $(SPIKE_INSTALL_DIR)/lib/libriscv \
 	  -sv_lib $(SPIKE_INSTALL_DIR)/lib/libfesvr \
 	  -sv_lib $(SPIKE_INSTALL_DIR)/lib/libdisasm \
 	  -sv_lib $(QUESTASIM_HOME)/uvm-1.2/linux_x86_64/uvm_dpi \
-		-c -do "add wave -position insertpoint sim:/uvmt_cva6_tb/cva6_dut_wrap/cva6_tb_wrapper_i/i_cva6/gen_cache_wt/i_cache_subsystem/i_adapter/*" \
-		-do "run -all; " \
+		-c -do "run -all; " \
 		-work $(VSIM_WORK_DIR) -t 1ns \
 		-suppress vsim-8451 \
 		-suppress 3829 -suppress vsim-8386\

diff --git a/verif/sim/cva6.py b/verif/sim/cva6.py
@@ -1174,8 +1174,8 @@ def check_spike_version():
 
   logging.info(f"Spike Version: {user_spike_stderr_string}")
 
-  #if user_spike_stderr_string != spike_version:
-  #  incorrect_version_exit("Spike", user_spike_stderr_string, spike_version)
+  if user_spike_stderr_string != spike_version:
+    incorrect_version_exit("Spike", user_spike_stderr_string, spike_version)
 
 
 def check_verilator_version():

diff --git a/verif/tb/uvmt/cva6_tb_wrapper.sv b/verif/tb/uvmt/cva6_tb_wrapper.sv
@@ -37,7 +37,7 @@ import uvm_pkg::*;
 import "DPI-C" function void read_elf(input string filename);
 import "DPI-C" function byte read_symbol(input string symbol_name, inout longint unsigned address);
 import "DPI-C" function byte get_section(output longint address, output longint len);
-import "DPI-C" context function void read_section_sv(input longint address, inout byte buffer[]); // ToDo: Temp fix
+import "DPI-C" context function void read_section_sv(input longint address, inout byte buffer[]);
 `endif
 
 module cva6_tb_wrapper import uvmt_cva6_pkg::*; #(

diff --git a/verif/tb/uvmt/uvmt_cva6_macros.sv b/verif/tb/uvmt/uvmt_cva6_macros.sv
@@ -19,12 +19,6 @@
 `ifndef __UVMT_CVA6_MACROS_SV__
 `define __UVMT_CVA6_MACROS_SV__
 
-
-
-//#####################################################################################################################################
-//Temp edit
-//#####################################################################################################################################
-
 // Assign for RVFI CSR interface
 `define RVFI_CSR_ASSIGN(csr_name) \
    for (genvar i = 0; i < RVFI_NRET; i++) begin : rvfi_csr_if_blk_``csr_name``\
@@ -56,5 +50,5 @@ uvm_config_db#(virtual uvma_rvfi_csr_if)::set(.cntxt(null), \
                                               .inst_name("*"), \
                                               .field_name({"csr_", `"csr_name`", "_vif", $sformatf("%0d", ``idx``)}), \
                                               .value(rvfi_csr_if_blk_``csr_name``[``idx``].rvfi_csr_``csr_name``_if)); \
- 
+
 `endif // __UVMT_CVA6_MACROS_SV__
diff --git a/verif/tb/uvmt/uvmt_cva6_tb.sv b/verif/tb/uvmt/uvmt_cva6_tb.sv
@@ -71,12 +71,8 @@ module uvmt_cva6_tb;
 
    uvmt_axi_switch_intf         axi_switch_vif();
    uvme_cva6_core_cntrl_if      core_cntrl_if();
-   // uvma_rvfi_instr_if #(
-   //   uvme_cva6_pkg::ILEN,
-   //   uvme_cva6_pkg::XLEN
-   // ) rvfi_instr_if [RVFI_NRET-1:0] ();
 
-   for (genvar i = 0; i < RVFI_NRET; i++) begin : rvfi_instr_if //ToDo: Temp edit
+   for (genvar i = 0; i < RVFI_NRET; i++) begin : rvfi_instr_if
       uvma_rvfi_instr_if #(
         uvme_cva6_pkg::ILEN,
         uvme_cva6_pkg::XLEN
@@ -103,15 +99,15 @@ module uvmt_cva6_tb;
       .rvfi_mem_rdata (rvfi_if.rvfi_o[i].mem_rdata),
       .rvfi_mem_rmask (rvfi_if.rvfi_o[i].mem_rmask),
       .rvfi_mem_wdata (rvfi_if.rvfi_o[i].mem_wdata),
-      .rvfi_mem_wmask (rvfi_if.rvfi_o[i].mem_wmask)
-// Temp edit Additional pins
-      // .rvfi_rd2_wdata (rvfi_if.rvfi_o[i].rd2_wdata ),
-      // .rvfi_rd2_addr  (rvfi_if.rvfi_o[i].rd2_addr  ),
-      // .rvfi_rs3_rdata (rvfi_if.rvfi_o[i].rs3_rdata ),
-      // .rvfi_rs3_addr  (rvfi_if.rvfi_o[i].rs3_addr  ),
-      // .rvfi_nmip      (rvfi_if.rvfi_o[i].nmip      ),
-      // .rvfi_dbg_mode  (rvfi_if.rvfi_o[i].dbg_mode  ),
-      // .rvfi_dbg       (rvfi_if.rvfi_o[i].dbg       )
+      .rvfi_mem_wmask (rvfi_if.rvfi_o[i].mem_wmask),
+
+      .rvfi_rd2_wdata (                           ),
+      .rvfi_rd2_addr  (                           ),
+      .rvfi_rs3_rdata (                           ),
+      .rvfi_rs3_addr  (                           ),
+      .rvfi_nmip      (                           ),
+      .rvfi_dbg_mode  (                           ),
+      .rvfi_dbg       (                           )
       );
    end
 
@@ -123,7 +119,7 @@ module uvmt_cva6_tb;
         .rvfi_csr_wmask (rvfi_if.rvfi_o[i].mem_wmask),
         .rvfi_csr_rdata (rvfi_if.rvfi_o[i].mem_rdata),
         .rvfi_csr_wdata (rvfi_if.rvfi_o[i].mem_wdata)
-      ); //ToDo: Temp edit
+      );
    end
     uvmt_default_inputs_intf         default_inputs_vif();
 
@@ -173,32 +169,6 @@ module uvmt_cva6_tb;
                     .rvfi_csr_o(rvfi_if.rvfi_csr_o)
                     );
 
-   // for (genvar i = 0; i < RVFI_NRET; i++) begin
-   //    assign  rvfi_instr_if[i].clk            = clknrst_if.clk;
-   //    assign  rvfi_instr_if[i].reset_n        = clknrst_if.reset_n;
-   //    assign  rvfi_instr_if[i].rvfi_valid     = rvfi_if.rvfi_o[i].valid;
-   //    assign  rvfi_instr_if[i].rvfi_order     = rvfi_if.rvfi_o[i].order;
-   //    assign  rvfi_instr_if[i].rvfi_insn      = rvfi_if.rvfi_o[i].insn;
-   //    assign  rvfi_instr_if[i].rvfi_trap      = (rvfi_if.rvfi_o[i].trap | (rvfi_if.rvfi_o[i].cause << 1));
-   //    assign  rvfi_instr_if[i].rvfi_halt      = rvfi_if.rvfi_o[i].halt;
-   //    assign  rvfi_instr_if[i].rvfi_intr      = rvfi_if.rvfi_o[i].intr;
-   //    assign  rvfi_instr_if[i].rvfi_mode      = rvfi_if.rvfi_o[i].mode;
-   //    assign  rvfi_instr_if[i].rvfi_ixl       = rvfi_if.rvfi_o[i].ixl;
-   //    assign  rvfi_instr_if[i].rvfi_pc_rdata  = rvfi_if.rvfi_o[i].pc_rdata;
-   //    assign  rvfi_instr_if[i].rvfi_pc_wdata  = rvfi_if.rvfi_o[i].pc_wdata;
-   //    assign  rvfi_instr_if[i].rvfi_rs1_addr  = rvfi_if.rvfi_o[i].rs1_addr;
-   //    assign  rvfi_instr_if[i].rvfi_rs1_rdata = rvfi_if.rvfi_o[i].rs1_rdata;
-   //    assign  rvfi_instr_if[i].rvfi_rs2_addr  = rvfi_if.rvfi_o[i].rs2_addr;
-   //    assign  rvfi_instr_if[i].rvfi_rs2_rdata = rvfi_if.rvfi_o[i].rs2_rdata;
-   //    assign  rvfi_instr_if[i].rvfi_rd1_addr  = rvfi_if.rvfi_o[i].rd_addr;
-   //    assign  rvfi_instr_if[i].rvfi_rd1_wdata = rvfi_if.rvfi_o[i].rd_wdata;
-   //    assign  rvfi_instr_if[i].rvfi_mem_addr  = rvfi_if.rvfi_o[i].mem_addr;
-   //    assign  rvfi_instr_if[i].rvfi_mem_rdata = rvfi_if.rvfi_o[i].mem_rdata;
-   //    assign  rvfi_instr_if[i].rvfi_mem_rmask = rvfi_if.rvfi_o[i].mem_rmask;
-   //    assign  rvfi_instr_if[i].rvfi_mem_wdata = rvfi_if.rvfi_o[i].mem_wdata;
-   //    assign  rvfi_instr_if[i].rvfi_mem_wmask = rvfi_if.rvfi_o[i].mem_wmask;
-   // end
-
    `RVFI_CSR_ASSIGN(fflags)
    `RVFI_CSR_ASSIGN(frm)
    `RVFI_CSR_ASSIGN(fcsr)
@@ -478,7 +448,6 @@ module uvmt_cva6_tb;
          $display("    ----------------------------------------------------------");
       end
       else begin
-
          $display("    FFFFFFFF   AAAAAA   IIIIII  LL        EEEEEEEE  DDDDDDD       ");
          $display("    FF        AA    AA    II    LL        EE        DD    DD      ");
          $display("    FF        AA    AA    II    LL        EE        DD    DD      ");
@@ -487,7 +456,6 @@ module uvmt_cva6_tb;
          $display("    FF        AA    AA    II    LL        EE        DD    DD      ");
          $display("    FF        AA    AA  IIIIII  LLLLLLLL  EEEEEEEE  DDDDDDD       ");
          $display("    ----------------------------------------------------------");
-
          if (sim_finished == 0) begin
             $display("                   SIMULATION FAILED - ABORTED              ");
          end