CV32E40Pv2 Verification update #2385
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Signed-off-by: dd-baoshan <[email protected]>
…s_WW08 Prevent code space corruption due to post incr load store
…fig. This code is unreachable in all conf we verify in v2. Signed-off-by: Bee Nee Lim <[email protected]>
move one line of code coverage waiver to exclusion file applicable for all config. This code is unreachable in all config we verify in v2.
Signed-off-by: Bee Nee Lim <[email protected]>
Update tb files: Separate RISCV Architecture Test for config pulp and pulp_fpu
Signed-off-by: Bee Nee Lim <[email protected]>
Bring up RISCOF test on CFG_P_F1, CFG_P_F2.
Signed-off-by: Bee Nee Lim <[email protected]>
Bring up RISCOF test on CFG_P, F0, F1, F2.
Signed-off-by: Bee Nee Lim <[email protected]>
Add code coverage waiver for CFG_P_F0, after review
…ected stream Signed-off-by: dd-baoshan <[email protected]>
Signed-off-by: dd-baoshan <[email protected]>
…es for fp cov usage; Update F-ext cov to optimize and fix some of the uncovered cp or cross; Update Zfinx cov to use new marcro define Signed-off-by: dd-baoshan <[email protected]>
Signed-off-by: dd-baoshan <[email protected]>
…s_WW09 Cv32e40p/bsm update tb files ww09
…nal defines for zfinx cov usage; Update zfinx to optimize and fix some of the uncovered cp or cross; Update coverage option at_least and weight for both f and zfinx Signed-off-by: dd-baoshan <[email protected]>
… f and zfinx cg Signed-off-by: dd-baoshan <[email protected]>
Signed-off-by: dd-baoshan <[email protected]>
…s_WW09 Update macro file: F2F and MV are not supported in zfinx. Add additio…
…_pulp_cfg_waiver.do Signed-off-by: Bee Nee Lim <[email protected]>
Move waiver that is applicable to pulp config only to cv32e40pv2_code_pulp_cfg_waiver.do
…nal coverage mapping Signed-off-by: dd-baoshan <[email protected]>
…s_WW10 Clean-up/Updates done on dvplan which some of them related to functio…
First batch of DV Plans annotations
updated columns with new info required by Mike & name changes
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cv32e40p/tb/uvmt/uvmt_cv32e40p_tb_ifs.sv has become very large, containing eight SV-interfaces and several of these interfaces support complex logic. I think it is time to consider refactoring this file into two or more files. Issue #2386 has been created to discuss this.
In the meantime, the rest of this pull-request looks good and a local CI regression passes, so I am approving this PR.
Yes, the comment was great! Thanks for adding it. I will close #2382 |
Let's discuss at our next weekly meeting. |
Hi @mike I think weekly's are not technical meetings. And this question from Xavier looks rather technical to me. Thanks. |
I have opened #2388 to discuss this topic. |
This pull request contains the past two weeks efforts on CV32E40Pv2 verification done by @dd-baoshan, @dd-BeeNee and I.
Main parts of this PR are waivers after coverage analysis, RISCOF architecture-tests bring up for all configurations and a first batch of updates for DV plans annotation.
On other specific topics, commit c68ac90 from @dd-baoshan adds a comment on how illegal instructions are generated (related to issue #2382). @MikeOpenHWGroup please tell us if this comment block is sufficient enough.
Regarding DV plan annotation, the first batch targets plans of XPULP (non-hwloop) instructions. As you participated in the first round of reviews, @MikeOpenHWGroup and @MarioOpenHWGroup can you have a look and tell me if the way I did the annotation seems fine to you ? Please note that the file mentionned in the DV Plan that describes UVM TB plusargs is still a WIP, I will push it as soon as possible.
I also had a quick discussion with Mike on how to update v1 coverage links in DV plans for v2 TB and keeping track as well of history, and I agree we should open an issue to discuss it