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psxbios.c
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psxbios.c
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/***************************************************************************
* Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
***************************************************************************/
/*
* Internal emulated HLE BIOS.
*/
#include <stdlib.h>
#include <stdio.h>
#include <string.h>
#include <stdarg.h>
#include <ctype.h>
#include <gccore.h>
extern char mcd1Written;
extern char mcd2Written;
#include "psxbios.h"
#include "psxhw.h"
//We try to emulate bios :) HELP US :P
char *biosA0n[256] = {
// 0x00
"open", "lseek", "read", "write",
"close", "ioctl", "exit", "sys_a0_07",
"getc", "putc", "todigit", "atof",
"strtoul", "strtol", "abs", "labs",
// 0x10
"atoi", "atol", "atob", "setjmp",
"longjmp", "strcat", "strncat", "strcmp",
"strncmp", "strcpy", "strncpy", "strlen",
"index", "rindex", "strchr", "strrchr",
// 0x20
"strpbrk", "strspn", "strcspn", "strtok",
"strstr", "toupper", "tolower", "bcopy",
"bzero", "bcmp", "memcpy", "memset",
"memmove", "memcmp", "memchr", "rand",
// 0x30
"srand", "qsort", "strtod", "malloc",
"free", "lsearch", "bsearch", "calloc",
"realloc", "InitHeap", "_exit", "getchar",
"putchar", "gets", "puts", "printf",
// 0x40
"sys_a0_40", "LoadTest", "Load", "Exec",
"FlushCache", "InstallInterruptHandler", "GPU_dw", "mem2vram",
"SendGPUStatus", "GPU_cw", "GPU_cwb", "SendPackets",
"sys_a0_4c", "GetGPUStatus", "GPU_sync", "sys_a0_4f",
// 0x50
"sys_a0_50", "LoadExec", "GetSysSp", "sys_a0_53",
"_96_init()", "_bu_init()", "_96_remove()", "sys_a0_57",
"sys_a0_58", "sys_a0_59", "sys_a0_5a", "dev_tty_init",
"dev_tty_open", "sys_a0_5d", "dev_tty_ioctl","dev_cd_open",
// 0x60
"dev_cd_read", "dev_cd_close", "dev_cd_firstfile", "dev_cd_nextfile",
"dev_cd_chdir", "dev_card_open", "dev_card_read", "dev_card_write",
"dev_card_close", "dev_card_firstfile", "dev_card_nextfile","dev_card_erase",
"dev_card_undelete","dev_card_format", "dev_card_rename", "dev_card_6f",
// 0x70
"_bu_init", "_96_init", "_96_remove", "sys_a0_73",
"sys_a0_74", "sys_a0_75", "sys_a0_76", "sys_a0_77",
"_96_CdSeekL", "sys_a0_79", "sys_a0_7a", "sys_a0_7b",
"_96_CdGetStatus", "sys_a0_7d", "_96_CdRead", "sys_a0_7f",
// 0x80
"sys_a0_80", "sys_a0_81", "sys_a0_82", "sys_a0_83",
"sys_a0_84", "_96_CdStop", "sys_a0_86", "sys_a0_87",
"sys_a0_88", "sys_a0_89", "sys_a0_8a", "sys_a0_8b",
"sys_a0_8c", "sys_a0_8d", "sys_a0_8e", "sys_a0_8f",
// 0x90
"sys_a0_90", "sys_a0_91", "sys_a0_92", "sys_a0_93",
"sys_a0_94", "sys_a0_95", "AddCDROMDevice", "AddMemCardDevide",
"DisableKernelIORedirection", "EnableKernelIORedirection", "sys_a0_9a", "sys_a0_9b",
"SetConf", "GetConf", "sys_a0_9e", "SetMem",
// 0xa0
"_boot", "SystemError", "EnqueueCdIntr", "DequeueCdIntr",
"sys_a0_a4", "ReadSector", "get_cd_status", "bufs_cb_0",
"bufs_cb_1", "bufs_cb_2", "bufs_cb_3", "_card_info",
"_card_load", "_card_auto", "bufs_cd_4", "sys_a0_af",
// 0xb0
"sys_a0_b0", "sys_a0_b1", "do_a_long_jmp", "sys_a0_b3",
"?? sub_function",
};
char *biosB0n[256] = {
// 0x00
"SysMalloc", "sys_b0_01", "sys_b0_02", "sys_b0_03",
"sys_b0_04", "sys_b0_05", "sys_b0_06", "DeliverEvent",
"OpenEvent", "CloseEvent", "WaitEvent", "TestEvent",
"EnableEvent", "DisableEvent", "OpenTh", "CloseTh",
// 0x10
"ChangeTh", "sys_b0_11", "InitPAD", "StartPAD",
"StopPAD", "PAD_init", "PAD_dr", "ReturnFromExecption",
"ResetEntryInt", "HookEntryInt", "sys_b0_1a", "sys_b0_1b",
"sys_b0_1c", "sys_b0_1d", "sys_b0_1e", "sys_b0_1f",
// 0x20
"UnDeliverEvent", "sys_b0_21", "sys_b0_22", "sys_b0_23",
"sys_b0_24", "sys_b0_25", "sys_b0_26", "sys_b0_27",
"sys_b0_28", "sys_b0_29", "sys_b0_2a", "sys_b0_2b",
"sys_b0_2c", "sys_b0_2d", "sys_b0_2e", "sys_b0_2f",
// 0x30
"sys_b0_30", "sys_b0_31", "open", "lseek",
"read", "write", "close", "ioctl",
"exit", "sys_b0_39", "getc", "putc",
"getchar", "putchar", "gets", "puts",
// 0x40
"cd", "format", "firstfile", "nextfile",
"rename", "delete", "undelete", "AddDevice",
"RemoteDevice", "PrintInstalledDevices", "InitCARD", "StartCARD",
"StopCARD", "sys_b0_4d", "_card_write", "_card_read",
// 0x50
"_new_card", "Krom2RawAdd", "sys_b0_52", "sys_b0_53",
"_get_errno", "_get_error", "GetC0Table", "GetB0Table",
"_card_chan", "sys_b0_59", "sys_b0_5a", "ChangeClearPAD",
"_card_status", "_card_wait",
};
char *biosC0n[256] = {
// 0x00
"InitRCnt", "InitException", "SysEnqIntRP", "SysDeqIntRP",
"get_free_EvCB_slot", "get_free_TCB_slot", "ExceptionHandler", "InstallExeptionHandler",
"SysInitMemory", "SysInitKMem", "ChangeClearRCnt", "SystemError",
"InitDefInt", "sys_c0_0d", "sys_c0_0e", "sys_c0_0f",
// 0x10
"sys_c0_10", "sys_c0_11", "InstallDevices", "FlushStfInOutPut",
"sys_c0_14", "_cdevinput", "_cdevscan", "_circgetc",
"_circputc", "ioabort", "sys_c0_1a", "KernelRedirect",
"PatchAOTable",
};
//#define r0 (psxRegs.GPR.n.r0)
#define at (psxRegs.GPR.n.at)
#define v0 (psxRegs.GPR.n.v0)
#define v1 (psxRegs.GPR.n.v1)
#define a0 (psxRegs.GPR.n.a0)
#define a1 (psxRegs.GPR.n.a1)
#define a2 (psxRegs.GPR.n.a2)
#define a3 (psxRegs.GPR.n.a3)
#define t0 (psxRegs.GPR.n.t0)
#define t1 (psxRegs.GPR.n.t1)
#define t2 (psxRegs.GPR.n.t2)
#define t3 (psxRegs.GPR.n.t3)
#define t4 (psxRegs.GPR.n.t4)
#define t5 (psxRegs.GPR.n.t5)
#define t6 (psxRegs.GPR.n.t6)
#define t7 (psxRegs.GPR.n.t7)
#define s0 (psxRegs.GPR.n.s0)
#define s1 (psxRegs.GPR.n.s1)
#define s2 (psxRegs.GPR.n.s2)
#define s3 (psxRegs.GPR.n.s3)
#define s4 (psxRegs.GPR.n.s4)
#define s5 (psxRegs.GPR.n.s5)
#define s6 (psxRegs.GPR.n.s6)
#define s7 (psxRegs.GPR.n.s7)
#define t8 (psxRegs.GPR.n.t6)
#define t9 (psxRegs.GPR.n.t7)
#define k0 (psxRegs.GPR.n.k0)
#define k1 (psxRegs.GPR.n.k1)
#define gp (psxRegs.GPR.n.gp)
#define sp (psxRegs.GPR.n.sp)
#define fp (psxRegs.GPR.n.s8)
#define ra (psxRegs.GPR.n.ra)
#define pc0 (psxRegs.pc)
#define SANE_PSXM(mem) ((u8*)(psxMemRLUT[(mem) >> 16] + ((mem) & 0xffff)))
#define Ra0 ((char*)SANE_PSXM(a0))
#define Ra1 ((char*)SANE_PSXM(a1))
#define Ra2 ((char*)SANE_PSXM(a2))
#define Ra3 ((char*)SANE_PSXM(a3))
#define Rv0 ((char*)SANE_PSXM(v0))
#define Rsp ((char*)SANE_PSXM(sp))
typedef struct _malloc_chunk {
unsigned long stat;
unsigned long size;
struct _malloc_chunk *fd;
struct _malloc_chunk *bk;
} malloc_chunk;
#define INUSE 0x1
typedef struct {
u32 desc;
s32 status;
s32 mode;
u32 fhandler;
} EvCB[32];
#define EvStUNUSED 0x0000
#define EvStWAIT 0x1000
#define EvStACTIVE 0x2000
#define EvStALREADY 0x4000
#define EvMdINTR 0x1000
#define EvMdNOINTR 0x2000
/*
typedef struct {
long next;
long func1;
long func2;
long pad;
} SysRPst;
*/
typedef struct {
s32 status;
s32 mode;
u32 reg[32];
u32 func;
} TCB;
typedef struct {
u32 _pc0;
u32 gp0;
u32 t_addr;
u32 t_size;
u32 d_addr;
u32 d_size;
u32 b_addr;
u32 b_size;
u32 S_addr;
u32 s_size;
u32 _sp,_fp,_gp,ret,base;
} EXEC;
struct DIRENTRY {
char name[20];
long attr;
long size;
struct DIRENTRY *next;
long head;
char system[4];
};
typedef struct {
char name[32];
u32 mode;
u32 offset;
u32 size;
u32 mcfile;
} FileDesc;
static u32 *jmp_int = NULL;
static int *pad_buf = NULL;
static char *pad_buf1,*pad_buf2;//shadow add
static int pad_buf1len,pad_buf2len;//shadow add
static u32 regs[35];
static EvCB *Event;
static EvCB *HwEV; // 0xf0
static EvCB *EvEV; // 0xf1
static EvCB *RcEV; // 0xf2
static EvCB *UeEV; // 0xf3
static EvCB *SwEV; // 0xf4
static EvCB *ThEV; // 0xff
static u32 *heap_addr = NULL;
static u32 SysIntRP[8];
static int CardState = -1;
static TCB Thread[8];
static int CurThread = 0;
static FileDesc FDesc[32];
static __inline void softCall(u32 pc) {
pc0 = pc;
ra = 0x80001000;
while (pc0 != 0x80001000) psxCpu->ExecuteBlock();
}
static __inline void softCall2(u32 pc) {
u32 sra = ra;
pc0 = pc;
ra = 0x80001000;
while (pc0 != 0x80001000) psxCpu->ExecuteBlock();
ra = sra;
}
static __inline void DeliverEvent(u32 ev, u32 spec) {
if (Event[ev][spec].status != SWAP32(EvStACTIVE)) return;
// Event[ev][spec].status = SWAP32(EvStALREADY);
if (Event[ev][spec].mode == SWAP32(EvMdINTR)) {
softCall2(SWAP32(Event[ev][spec].fhandler));
} else Event[ev][spec].status = SWAP32(EvStALREADY);
}
/* *
// *
// *
// System calls A0 */
void psxBios_abs() { // 0x0e
v0 = abs(a0);
pc0 = ra;
}
void psxBios_labs() { // 0x0f
v0 = labs(a0);
pc0 = ra;
}
void psxBios_atoi() { // 0x10
v0 = atoi((char *)Ra0);
pc0 = ra;
}
void psxBios_atol() { // 0x11
v0 = atoi((char *)Ra0);
pc0 = ra;
}
void psxBios_setjmp() { // 13
u32 *jmp_buf= (u32*)Ra0;
int i;
#ifdef PSXBIOS_LOG
PSXBIOS_LOG("psxBios_%s\n", biosA0n[0x13]);
#endif
jmp_buf[0] = SWAP32(ra);
jmp_buf[1] = SWAP32(sp);
jmp_buf[2] = SWAP32(fp);
for (i=0; i<8; i++) // s0-s7
jmp_buf[3+i] = SWAP32(psxRegs.GPR.r[16+i]);
jmp_buf[11] = SWAP32(gp);
v0 = 0; pc0 = ra;
}
void psxBios_longjmp() { //14
u32 *jmp_buf= (u32*)Ra0;
int i;
#ifdef PSXBIOS_LOG
PSXBIOS_LOG("psxBios_%s\n", biosA0n[0x14]);
#endif
ra = SWAP32(jmp_buf[0]); /* ra */
sp = SWAP32(jmp_buf[1]); /* sp */
fp = SWAP32(jmp_buf[2]); /* fp */
for (i=0; i<8; i++) // s0-s7
psxRegs.GPR.r[16+i] = SWAP32(jmp_buf[3+i]);
gp = SWAP32(jmp_buf[11]); /* gp */
v0 = a1; pc0 = ra;
}
void psxBios_strcat() { // 0x15
#ifdef PSXBIOS_LOG
PSXBIOS_LOG("psxBios_%s: %s, %s\n", biosA0n[0x15], Ra0, Ra1);
#endif
strcat(Ra0, Ra1);
v0 = a0; pc0 = ra;
}
/*0x16*/void psxBios_strncat() { strncat(Ra0, Ra1, a2); v0 = a0; pc0 = ra;}
void psxBios_strcmp() { // 0x17
#ifdef PSXBIOS_LOG
PSXBIOS_LOG("psxBios_%s: %s (%lx), %s (%lx)\n", biosA0n[0x17], Ra0, a0, Ra1, a1);
#endif
v0 = strcmp(Ra0, Ra1);
pc0 = ra;
}
void psxBios_strncmp() { // 0x18
#ifdef PSXBIOS_LOG
PSXBIOS_LOG("psxBios_%s: %s (%lx), %s (%lx), %d\n", biosA0n[0x18], Ra0, a0, Ra1, a1, a2);
#endif
v0 = strncmp(Ra0, Ra1, a2);
pc0 = ra;
}
/*0x19*/void psxBios_strcpy() { strcpy(Ra0, Ra1); v0 = a0; pc0 = ra;}
/*0x1a*/void psxBios_strncpy() { strncpy(Ra0, Ra1, a2); v0 = a0; pc0 = ra;}
/*0x1b*/void psxBios_strlen() { v0 = strlen(Ra0); pc0 = ra;}
void psxBios_index() { // 0x1c
char *pcA0 = (char *)Ra0;
char *pcRet = strchr(pcA0, a1);
if(pcRet)
v0 = a0 + pcRet - pcA0;
else
v0 = 0;
pc0 = ra;
}
void psxBios_rindex() { // 0x1d
char *pcA0 = (char *)Ra0;
char *pcRet = strrchr(pcA0, a1);
if(pcRet)
v0 = a0 + pcRet - pcA0;
else
v0 = 0;
pc0 = ra;
}
void psxBios_strchr() { // 0x1e
char *pcA0 = (char *)Ra0;
char *pcRet = strchr(pcA0, a1);
if(pcRet)
v0 = a0 + pcRet - pcA0;
else
v0 = 0;
pc0 = ra;
}
void psxBios_strrchr() { // 0x1f
char *pcA0 = (char *)Ra0;
char *pcRet = strrchr(pcA0, a1);
if(pcRet)
v0 = a0 + pcRet - pcA0;
else
v0 = 0;
pc0 = ra;
}
void psxBios_strpbrk() { // 0x20
char *pcA0 = (char *)Ra0;
char *pcRet = strpbrk(pcA0, (char *)Ra1);
if(pcRet)
v0 = a0 + pcRet - pcA0;
else
v0 = 0;
pc0 = ra;
}
void psxBios_strspn() { v0 = strspn ((char *)Ra0, (char *)Ra1); pc0 = ra;}/*21*/
void psxBios_strcspn() { v0 = strcspn((char *)Ra0, (char *)Ra1); pc0 = ra;}/*22*/
void psxBios_strtok() { // 0x23
char *pcA0 = (char *)Ra0;
char *pcRet = strtok(pcA0, (char *)Ra1);
if(pcRet)
v0 = a0 + pcRet - pcA0;
else
v0 = 0;
pc0 = ra;
}
void psxBios_strstr() { // 0x24
char *pcA0 = (char *)Ra0;
char *pcRet = strstr(pcA0, (char *)Ra1);
if(pcRet)
v0 = a0 + pcRet - pcA0;
else
v0 = 0;
pc0 = ra;
}
/*0x25*/void psxBios_toupper() {v0 = toupper(a0); pc0 = ra;}
/*0x26*/void psxBios_tolower() {v0 = tolower(a0); pc0 = ra;}
/*0x27*/void psxBios_bcopy() {memcpy(Ra1,Ra0,a2); pc0=ra;}
/*0x28*/void psxBios_bzero() {memset(Ra0,0,a1); pc0=ra;}
/*0x29*/void psxBios_bcmp() {v0 = memcmp(Ra0,Ra1,a2); pc0=ra; }
/*0x2a*/void psxBios_memcpy() {memcpy(Ra0, Ra1, a2); v0 = a0; pc0 = ra;}
/*0x2b*/void psxBios_memset() {memset(Ra0, a1, a2); v0 = a0; pc0 = ra;}
/*0x2c*/void psxBios_memmove() {memmove(Ra0, Ra1, a2); v0 = a0; pc0 = ra;}
/*0x2d*/void psxBios_memcmp() {v0 = memcmp(Ra0, Ra1, a2); pc0 = ra;}
void psxBios_memchr() { // 2e
void *ret = memchr(Ra0, a1, a2);
if (ret != NULL) v0 = (u32)((char*)ret - Ra0) + a0;
else v0 = 0;
pc0 = ra;
}
void psxBios_rand() { // 2f
v0 = 1+(int) (32767.0*rand()/(RAND_MAX+1.0));
pc0 = ra;
}
void psxBios_srand() { // 30
srand(a0); pc0 = ra;
}
void psxBios_malloc() { // 33
malloc_chunk *chunk;
malloc_chunk *fd;
#ifdef PSXBIOS_LOG
PSXBIOS_LOG("psxBios_%s\n", biosA0n[0x33]);
#endif
chunk = (malloc_chunk *)heap_addr;
if (chunk == NULL) { v0 = 0; return; }
for (; ((a0 > SWAP32(chunk->size)) || chunk->stat == SWAP32(INUSE)) || (chunk->fd != NULL); chunk = (malloc_chunk *)SWAP32((unsigned long)chunk->fd));
//printf ("chunk %lx\n",chunk->size);
/* split free chunk */
fd = chunk + sizeof(malloc_chunk) + a0;
fd->stat = SWAP32(chunk->stat);
fd->size = SWAP32(chunk->size - a0);
fd->fd = (malloc_chunk *)SWAP32((unsigned long)chunk->fd);
fd->bk = (malloc_chunk *)SWAP32((unsigned long)chunk);
/* set new chunk */
chunk->stat = SWAP32(INUSE);
chunk->size = SWAP32(a0);
chunk->fd = (malloc_chunk *)SWAP32((unsigned long)fd);
v0 = ((unsigned long)chunk - (unsigned long)psxM) + sizeof(malloc_chunk);
v0|= 0x80000000;
// printf ("malloc %lx,%lx\n", v0, a0);
pc0 = ra;
}
void psxBios_InitHeap() { // 39
malloc_chunk *chunk;
#ifdef PSXBIOS_LOG
PSXBIOS_LOG("psxBios_%s\n", biosA0n[0x39]);
#endif
heap_addr = (u32*)Ra0;
chunk = (malloc_chunk *)heap_addr;
chunk->stat = 0;
if (((a0 & 0x1fffff) + a1)>= 0x200000) chunk->size = SWAP32(0x1ffffc - (a0 & 0x1fffff));
else chunk->size = SWAP32(a1);
chunk->fd = NULL;
chunk->bk = NULL;
//SysPrintf("InitHeap %lx,%lx : %lx\n",a0,a1,SWAP32(chunk->size));
pc0 = ra;
}
void psxBios_getchar(){ v0 = getchar(); pc0=ra;} //0x3b
void psxBios_printf() { // 3f
char tmp[1024];
char tmp2[1024];
unsigned long save[4];
char *ptmp = tmp;
int n=1, i=0, j, t;
memcpy(save, (char*)SANE_PSXM(sp), 4*4);
psxMu32ref(sp) = SWAP32((u32)a0);
psxMu32ref(sp + 4) = SWAP32((u32)a1);
psxMu32ref(sp + 8) = SWAP32((u32)a2);
psxMu32ref(sp + 12) = SWAP32((u32)a3);
while (Ra0[i]) {
switch (Ra0[i]) {
case '%':
j = 0;
tmp2[j++] = '%';
_start:
switch (Ra0[++i]) {
case '.':
case 'l':
tmp2[j++] = Ra0[i]; goto _start;
default:
if (Ra0[i] >= '0' && Ra0[i] <= '9') {
tmp2[j++] = Ra0[i];
goto _start;
}
break;
}
tmp2[j++] = Ra0[i];
tmp2[j] = 0;
switch (Ra0[i]) {
case 'f': case 'F':
t = sp + n * 4;
ptmp+= sprintf(ptmp, tmp2, (float)psxMu32(t)); n++; break;
case 'a': case 'A':
case 'e': case 'E':
case 'g': case 'G':
t = sp + n * 4;
ptmp+= sprintf(ptmp, tmp2, (double)psxMu32(t)); n++; break;
case 'p':
case 'i':
case 'd': case 'D':
case 'o': case 'O':
case 'x': case 'X':
t = sp + n * 4;
ptmp+= sprintf(ptmp, tmp2, (unsigned int)psxMu32(t)); n++; break;
case 'c':
t = sp + n * 4;
ptmp+= sprintf(ptmp, tmp2, (unsigned char)psxMu32(t)); n++; break;
case 's':
t = sp + n * 4;
ptmp+= sprintf(ptmp, tmp2, (char*)PSXM(psxMu32(t))); n++; break;
case '%':
*ptmp++ = Ra0[i]; break;
}
i++;
break;
default:
*ptmp++ = Ra0[i++];
}
}
*ptmp = 0;
memcpy((char*)SANE_PSXM(sp), save, 4*4);
//SysPrintf(tmp);
pc0 = ra;
}
/*
* long Load(char *name, struct EXEC *header);
*/
void psxBios_Load() { // 42
EXE_HEADER eheader;
#ifdef PSXBIOS_LOG
PSXBIOS_LOG("psxBios_%s: %s, %x\n", biosA0n[0x42], Ra0, a1);
#endif
if (LoadCdromFile(Ra0, &eheader) == 0) {
memcpy(Ra1, ((char*)&eheader)+16, sizeof(EXEC));
v0 = 1;
} else v0 = 0;
pc0 = ra;
}
/*
* int Exec(struct EXEC *header , int argc , char **argv);
*/
void psxBios_Exec() { // 43
EXEC *header = (EXEC*)Ra0;
u32 tmp;
#ifdef PSXBIOS_LOG
PSXBIOS_LOG("psxBios_%s: %x, %x, %x\n", biosA0n[0x43], a0, a1, a2);
#endif
header->_sp = SWAP32(sp);
header->_fp = SWAP32(fp);
header->_sp = SWAP32(sp);
header->_gp = SWAP32(gp);
header->ret = SWAP32(ra);
header->base = SWAP32(s0);
if (header->S_addr != 0) {
tmp = SWAP32(header->S_addr) + SWAP32(header->s_size);
sp = tmp;
fp = sp;
}
gp = SWAP32(header->gp0);
s0 = a0;
a0 = a1;
a1 = a2;
ra = 0x8000;
pc0 = SWAP32(header->_pc0);
}
void psxBios_FlushCache() { // 44
#ifdef PSXBIOS_LOG
PSXBIOS_LOG("psxBios_%s\n", biosA0n[0x44]);
#endif
pc0 = ra;
}
void psxBios_GPU_dw() { // 0x46
int size;
long *ptr;
#ifdef PSXBIOS_LOG
PSXBIOS_LOG("psxBios_%s\n", biosA0n[0x46]);
#endif
GPU_writeData(0xa0000000);
GPU_writeData((a1<<16)|(a0&0xffff));
GPU_writeData((a3<<16)|(a2&0xffff));
size = (a2*a3+1)/2;
ptr = (long*)PSXM(Rsp[4]); //that is correct?
do {
GPU_writeData(SWAP32(*ptr));
ptr++;
} while(--size);
pc0 = ra;
}
void psxBios_mem2vram() { // 0x47
int size;
GPU_writeData(0xa0000000);
GPU_writeData((a1<<16)|(a0&0xffff));
GPU_writeData((a3<<16)|(a2&0xffff));
size = (a2*a3+1)/2;
GPU_writeStatus(0x04000002);
psxHwWrite32(0x1f8010f4,0);
psxHwWrite32(0x1f8010f0,psxHwRead32(0x1f8010f0)|0x800);
psxHwWrite32(0x1f8010a0,(unsigned long)Rsp[4]);//might have a buggy...
psxHwWrite32(0x1f8010a4,((size/16)<<16)|16);
psxHwWrite32(0x1f8010a8,0x01000201);
pc0 = ra;
}
void psxBios_SendGPU() { // 0x48
GPU_writeStatus(a0);
pc0 = ra;
}
void psxBios_GPU_cw() { // 0x49
GPU_writeData(a0);
pc0 = ra;
}
void psxBios_GPU_cwb() { // 0x4a
long *ptr = (long*)Ra0;
int size = a1;
while(size--) {
GPU_writeData(SWAP32(*ptr));
ptr++;
}
pc0 = ra;
}
void psxBios_GPU_SendPackets() { //4b:
GPU_writeStatus(0x04000002);
psxHwWrite32(0x1f8010f4,0);
psxHwWrite32(0x1f8010f0,psxHwRead32(0x1f8010f0)|0x800);
psxHwWrite32(0x1f8010a0,a0);
psxHwWrite32(0x1f8010a4,0);
psxHwWrite32(0x1f8010a8,0x010000401);
pc0 = ra;
}
void psxBios_sys_a0_4c() { // 0x4c GPU relate
psxHwWrite32(0x1f8010a8,0x00000401);
GPU_writeData(0x0400000);
GPU_writeData(0x0200000);
GPU_writeData(0x0100000);
pc0 = ra;
}
void psxBios_GPU_GetGPUStatus() { // 0x4d
v0 = GPU_readStatus();
pc0 = ra;
}
#undef s_addr
void psxBios_LoadExec() { // 51
EXEC *header = (EXEC*)PSXM(0xf000);
u32 s_addr, s_size;
#ifdef PSXBIOS_LOG
PSXBIOS_LOG("psxBios_%s: %s: %x,%x\n", biosA0n[0x51], Ra0, a1, a2);
#endif
s_addr = a1; s_size = a2;
a1 = 0xf000;
psxBios_Load();
header->S_addr = SWAP32(s_addr);
header->s_size = SWAP32(s_size);
a0 = 0xf000; a1 = 0; a2 = 0;
psxBios_Exec();
}
void psxBios__bu_init() { // 70
#ifdef PSXBIOS_LOG
PSXBIOS_LOG("psxBios_%s\n", biosA0n[0x70]);
#endif
DeliverEvent(0x11, 0x2); // 0xf0000011, 0x0004
DeliverEvent(0x81, 0x2); // 0xf4000001, 0x0004
pc0 = ra;
}
void psxBios__96_init() { // 71
#ifdef PSXBIOS_LOG
PSXBIOS_LOG("psxBios_%s\n", biosA0n[0x71]);
#endif
pc0 = ra;
}
void psxBios__96_remove() { // 72
#ifdef PSXBIOS_LOG
PSXBIOS_LOG("psxBios_%s\n", biosA0n[0x72]);
#endif
pc0 = ra;
}
void psxBios__card_info() { // ab
#ifdef PSXBIOS_LOG
PSXBIOS_LOG("psxBios_%s: %x\n", biosA0n[0xab], a0);
#endif
// DeliverEvent(0x11, 0x2); // 0xf0000011, 0x0004
DeliverEvent(0x81, 0x2); // 0xf4000001, 0x0004
v0 = 1; pc0 = ra;
}
void psxBios__card_load() { // ac
#ifdef PSXBIOS_LOG
PSXBIOS_LOG("psxBios_%s: %x\n", biosA0n[0xac], a0);
#endif
// DeliverEvent(0x11, 0x2); // 0xf0000011, 0x0004
DeliverEvent(0x81, 0x2); // 0xf4000001, 0x0004
v0 = 1; pc0 = ra;
}
/* System calls B0 */
void psxBios_SetRCnt() { // 02
#ifdef PSXBIOS_LOG
PSXBIOS_LOG("psxBios_%s\n", biosB0n[0x02]);
#endif
a0&= 0x3;
if (a0 != 3) {
unsigned long mode=0;
psxRcntWtarget(a0, a1);
if (a2&0x1000) mode|= 0x050; // Interrupt Mode
if (a2&0x0100) mode|= 0x008; // Count to 0xffff
if (a2&0x0010) mode|= 0x001; // Timer stop mode
if (a0 == 2) { if (a2&0x0001) mode|= 0x200; } // System Clock mode
else { if (a2&0x0001) mode|= 0x100; } // System Clock mode
psxRcntWmode(a0, mode);
}
pc0 = ra;
}
void psxBios_GetRCnt() { // 03
#ifdef PSXBIOS_LOG
PSXBIOS_LOG("psxBios_%s\n", biosB0n[0x03]);
#endif
a0&= 0x3;
if (a0 != 3) v0 = psxRcntRcount(a0);
else v0 = 0;
pc0 = ra;
}
void psxBios_StartRCnt() { // 04
#ifdef PSXBIOS_LOG
PSXBIOS_LOG("psxBios_%s\n", biosB0n[0x04]);
#endif
a0&= 0x3;
if (a0 != 3) psxHu32ref(0x1074)|= SWAP32((u32)((1<<(a0+4))));
else psxHu32ref(0x1074)|= SWAPu32(0x1);
v0 = 1; pc0 = ra;
}
void psxBios_StopRCnt() { // 05
#ifdef PSXBIOS_LOG
PSXBIOS_LOG("psxBios_%s\n", biosB0n[0x05]);
#endif
a0&= 0x3;
if (a0 != 3) psxHu32ref(0x1074)&= SWAP32((u32)(~(1<<(a0+4))));
else psxHu32ref(0x1074)&= SWAPu32(~0x1);
pc0 = ra;
}
void psxBios_ResetRCnt() { // 06
#ifdef PSXBIOS_LOG
PSXBIOS_LOG("psxBios_%s\n", biosB0n[0x06]);
#endif
a0&= 0x3;
if (a0 != 3) {
psxRcntWmode(a0, 0);
psxRcntWtarget(a0, 0);
psxRcntWcount(a0, 0);
}
pc0 = ra;
}
/* gets ev for use with Event */
#define GetEv() \
ev = (a0 >> 24) & 0xf; \
if (ev == 0xf) ev = 0x5; \
ev*= 32; \
ev+= a0&0x1f;
/* gets spec for use with Event */
#define GetSpec() \
spec = 0; \
switch (a1) { \
case 0x0301: spec = 16; break; \
case 0x0302: spec = 17; break; \
default: \
for (i=0; i<16; i++) if (a1 & (1 << i)) { spec = i; break; } \
break; \
}
void psxBios_DeliverEvent() { // 07
int ev, spec;
int i;
GetEv();
GetSpec();
#ifdef PSXBIOS_LOG
PSXBIOS_LOG("psxBios_%s %x,%x\n", biosB0n[0x07], ev, spec);
#endif
DeliverEvent(ev, spec);
pc0 = ra;
}
void psxBios_OpenEvent() { // 08
int ev, spec;
int i;
GetEv();
GetSpec();
#ifdef PSXBIOS_LOG
PSXBIOS_LOG("psxBios_%s %x,%x (class:%lx, spec:%lx, mode:%lx, func:%lx)\n", biosB0n[0x08], ev, spec, a0, a1, a2, a3);
#endif
Event[ev][spec].status = SWAP32(EvStWAIT);
Event[ev][spec].mode = SWAP32(a2);
Event[ev][spec].fhandler = SWAP32(a3);
v0 = ev | (spec << 8);
pc0 = ra;
}
void psxBios_CloseEvent() { // 09
int ev, spec;
ev = a0 & 0xff;
spec = (a0 >> 8) & 0xff;
#ifdef PSXBIOS_LOG
PSXBIOS_LOG("psxBios_%s %x,%x\n", biosB0n[0x09], ev, spec);
#endif
Event[ev][spec].status = SWAP32(EvStUNUSED);
v0 = 1; pc0 = ra;
}
void psxBios_WaitEvent() { // 0a
int ev, spec;
ev = a0 & 0xff;
spec = (a0 >> 8) & 0xff;
#ifdef PSXBIOS_LOG
PSXBIOS_LOG("psxBios_%s %x,%x\n", biosB0n[0x0a], ev, spec);
#endif
Event[ev][spec].status = SWAP32(EvStACTIVE);
v0 = 1; pc0 = ra;
}
void psxBios_TestEvent() { // 0b
int ev, spec;