From d13848fe0b9f5ffa732c38eb0fdc27d5651f2bf0 Mon Sep 17 00:00:00 2001
From: Neta London <neta.london@gmail.com>
Date: Sun, 11 Feb 2024 17:57:43 +0200
Subject: [PATCH 1/2] Fix check for wrapping sub-bus

---
 simulator/src/chip/chip.tsx | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/simulator/src/chip/chip.tsx b/simulator/src/chip/chip.tsx
index 004d98ab9..efd91eab9 100644
--- a/simulator/src/chip/chip.tsx
+++ b/simulator/src/chip/chip.tsx
@@ -414,7 +414,7 @@ export class Chip {
     }
 
     // Wrap the chipPin in an OutBus when the part side is dimensioned
-    if (to.start > 0 || to.width !== chipPin.width) {
+    if (to.start > 0 || to.width !== partPin.width) {
       chipPin = new OutSubBus(chipPin, to.start, to.width);
     }
 
@@ -433,7 +433,7 @@ export class Chip {
     from.width ??= chipPin.width;
 
     // Wrap the partPin in an InBus when the part side is dimensioned
-    if (to.start > 0 || to.width !== chipPin.width) {
+    if (to.start > 0 || to.width !== partPin.width) {
       partPin = new InSubBus(partPin, to.start, to.width);
     }
 

From b7f40f39a2c7a29be095d895f026b28ebf8ba4df Mon Sep 17 00:00:00 2001
From: Neta London <neta.london@gmail.com>
Date: Sun, 11 Feb 2024 18:58:18 +0200
Subject: [PATCH 2/2] Add test

---
 simulator/src/chip/chip.test.ts | 40 ++++++++++++++++++++++++++++-----
 1 file changed, 35 insertions(+), 5 deletions(-)

diff --git a/simulator/src/chip/chip.test.ts b/simulator/src/chip/chip.test.ts
index e7a6fae27..8af173159 100644
--- a/simulator/src/chip/chip.test.ts
+++ b/simulator/src/chip/chip.test.ts
@@ -1,4 +1,9 @@
 /* eslint-disable @typescript-eslint/no-non-null-assertion */
+import { bin } from "../util/twos.js";
+import { And, Mux16, Not, Not16, Or, Xor } from "./builtins/index.js";
+import { Nand } from "./builtins/logic/nand.js";
+import { Bit, PC } from "./builtins/sequential/bit.js";
+import { DFF } from "./builtins/sequential/dff.js";
 import {
   Bus,
   Chip,
@@ -11,12 +16,7 @@ import {
   parseToPin,
   printChip,
 } from "./chip.js";
-import { Nand } from "./builtins/logic/nand.js";
-import { And, Mux16, Not, Not16, Or, Xor } from "./builtins/index.js";
-import { bin } from "../util/twos.js";
-import { DFF } from "./builtins/sequential/dff.js";
 import { Clock } from "./clock.js";
-import { Bit, PC } from "./builtins/sequential/bit.js";
 
 describe("Chip", () => {
   it("parses toPin", () => {
@@ -228,6 +228,36 @@ describe("Chip", () => {
       expect(notPart.in().busVoltage).toBe(0b1);
     });
 
+    it("wires SubBus in[0]=a", () => {
+      const chip = new Chip(["a", "b"], ["out[3]"]);
+      const not3 = new Not3();
+
+      // Not3(in[0]=a, in[1]=b, in[2]=b, out=out)
+      chip.wire(not3, [
+        {
+          from: { name: "a", start: 0, width: undefined },
+          to: { name: "in", start: 0, width: 1 },
+        },
+        {
+          from: { name: "b", start: 0, width: undefined },
+          to: { name: "in", start: 1, width: 1 },
+        },
+        {
+          from: { name: "b", start: 0, width: undefined },
+          to: { name: "in", start: 2, width: 1 },
+        },
+        {
+          from: { name: "out", start: 0, width: undefined },
+          to: { name: "out", start: 0, width: undefined },
+        },
+      ]);
+
+      chip.in("b")!.busVoltage = 1;
+      chip.in("a")!.busVoltage = 0;
+      chip.eval();
+      expect(chip.out().busVoltage).toBe(0b001);
+    });
+
     it("wires SubBus out=out[1]", () => {
       const threeChip = new (class ThreeChip extends Chip {
         constructor() {