diff --git a/about/index.html b/about/index.html index 90dacf8c5..8b1f6a528 100644 --- a/about/index.html +++ b/about/index.html @@ -1 +1 @@ -NAND2Tetris
\ No newline at end of file +NAND2Tetris
\ No newline at end of file diff --git a/asm/index.html b/asm/index.html index 90dacf8c5..8b1f6a528 100644 --- a/asm/index.html +++ b/asm/index.html @@ -1 +1 @@ -NAND2Tetris
\ No newline at end of file +NAND2Tetris
\ No newline at end of file diff --git a/asset-manifest.json b/asset-manifest.json index 48b7c417b..62786cca7 100644 --- a/asset-manifest.json +++ b/asset-manifest.json @@ -1,8 +1,8 @@ { "files": { "main.css": "/web-ide/static/css/main.9d762a7f.css", - "main.js": "/web-ide/static/js/main.66e9b6eb.js", - "static/js/288.1852c135.chunk.js": "/web-ide/static/js/288.1852c135.chunk.js", + "main.js": "/web-ide/static/js/main.9984f23c.js", + "static/js/288.3bdeec9c.chunk.js": "/web-ide/static/js/288.3bdeec9c.chunk.js", "static/js/297.2c45dab0.chunk.js": "/web-ide/static/js/297.2c45dab0.chunk.js", "static/js/269.1e46835e.chunk.js": "/web-ide/static/js/269.1e46835e.chunk.js", "static/js/608.6d63ee31.chunk.js": "/web-ide/static/js/608.6d63ee31.chunk.js", @@ -17,7 +17,7 @@ "static/css/34.2a1f584b.chunk.css": "/web-ide/static/css/34.2a1f584b.chunk.css", "static/js/34.9f280457.chunk.js": "/web-ide/static/js/34.9f280457.chunk.js", "static/css/598.4a56c158.chunk.css": "/web-ide/static/css/598.4a56c158.chunk.css", - "static/js/598.beb31f34.chunk.js": "/web-ide/static/js/598.beb31f34.chunk.js", + "static/js/598.183c6bb5.chunk.js": "/web-ide/static/js/598.183c6bb5.chunk.js", "static/css/408.4548b55f.chunk.css": "/web-ide/static/css/408.4548b55f.chunk.css", "static/js/408.e6e0ca78.chunk.js": "/web-ide/static/js/408.e6e0ca78.chunk.js", "static/js/614.12dbb7c0.chunk.js": "/web-ide/static/js/614.12dbb7c0.chunk.js", @@ -33,6 +33,6 @@ }, "entrypoints": [ "static/css/main.9d762a7f.css", - "static/js/main.66e9b6eb.js" + "static/js/main.9984f23c.js" ] } \ No newline at end of file diff --git a/bitmap/index.html b/bitmap/index.html index 90dacf8c5..8b1f6a528 100644 --- a/bitmap/index.html +++ b/bitmap/index.html @@ -1 +1 @@ -NAND2Tetris
\ No newline at end of file +NAND2Tetris
\ No newline at end of file diff --git a/chip/index.html b/chip/index.html index 90dacf8c5..8b1f6a528 100644 --- a/chip/index.html +++ b/chip/index.html @@ -1 +1 @@ -NAND2Tetris
\ No newline at end of file +NAND2Tetris
\ No newline at end of file diff --git a/compiler/index.html b/compiler/index.html index 90dacf8c5..8b1f6a528 100644 --- a/compiler/index.html +++ b/compiler/index.html @@ -1 +1 @@ -NAND2Tetris
\ No newline at end of file +NAND2Tetris
\ No newline at end of file diff --git a/cpu/index.html b/cpu/index.html index 90dacf8c5..8b1f6a528 100644 --- a/cpu/index.html +++ b/cpu/index.html @@ -1 +1 @@ -NAND2Tetris
\ No newline at end of file +NAND2Tetris
\ No newline at end of file diff --git a/guide/index.html b/guide/index.html index 90dacf8c5..8b1f6a528 100644 --- a/guide/index.html +++ b/guide/index.html @@ -1 +1 @@ -NAND2Tetris
\ No newline at end of file +NAND2Tetris
\ No newline at end of file diff --git a/index.html b/index.html index 90dacf8c5..8b1f6a528 100644 --- a/index.html +++ b/index.html @@ -1 +1 @@ -NAND2Tetris
\ No newline at end of file +NAND2Tetris
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the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/Not.hdl\n/**\n * Not gate:\n * if (in) out = 0, else out = 1\n */\nCHIP Not {\n IN in;\n OUT out;\n\n PARTS:\n //// Replace this comment with your code.\n}',"Not.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/Not.tst\n\noutput-list in out;\n\nset in 0,\neval,\noutput;\n\nset in 1,\neval,\noutput;',"Not.cmp":"|in |out|\n| 0 | 1 |\n| 1 | 0 |"},And:{"And.hdl":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/And.hdl\n/**\n * And gate:\n * if (a and b) out = 1, else out = 0 \n */\nCHIP And {\n IN a, b;\n OUT out;\n \n PARTS:\n //// Replace this comment with your code.\n}',"And.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/And.tst\n\noutput-list a b out;\n\nset a 0,\nset b 0,\neval,\noutput;\n\nset a 0,\nset b 1,\neval,\noutput;\n\nset a 1,\nset b 0,\neval,\noutput;\n\nset a 1,\nset b 1,\neval,\noutput;',"And.cmp":"| a | b |out|\n| 0 | 0 | 0 |\n| 0 | 1 | 0 |\n| 1 | 0 | 0 |\n| 1 | 1 | 1 |"},Or:{"Or.hdl":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/Or.hdl\n/**\n * Or gate:\n * if (a or b) out = 1, else out = 0 \n */\nCHIP Or {\n IN a, b;\n OUT out;\n\n PARTS:\n //// Replace this comment with your code.\n}',"Or.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/Or.tst\n\noutput-list a b out;\n\nset a 0,\nset b 0,\neval,\noutput;\n\nset a 0,\nset b 1,\neval,\noutput;\n\nset a 1,\nset b 0,\neval,\noutput;\n\nset a 1,\nset b 1,\neval,\noutput;',"Or.cmp":"| a | b |out|\n| 0 | 0 | 0 |\n| 0 | 1 | 1 |\n| 1 | 0 | 1 |\n| 1 | 1 | 1 |"},Xor:{"Xor.hdl":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/Xor.hdl\n/**\n * Exclusive-or gate:\n * if ((a and Not(b)) or (Not(a) and b)) out = 1, else out = 0\n */\nCHIP Xor {\n IN a, b;\n OUT out;\n\n PARTS:\n //// Replace this comment with your code.\n}',"Xor.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/Xor.tst\n\noutput-list a b out;\n\nset a 0,\nset b 0,\neval,\noutput;\n\nset a 0,\nset b 1,\neval,\noutput;\n\nset a 1,\nset b 0,\neval,\noutput;\n\nset a 1,\nset b 1,\neval,\noutput;',"Xor.cmp":"| a | b |out|\n| 0 | 0 | 0 |\n| 0 | 1 | 1 |\n| 1 | 0 | 1 |\n| 1 | 1 | 0 |"},Mux:{"Mux.hdl":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/Mux.hdl\n/** \n * Multiplexor:\n * if (sel = 0) out = a, else out = b\n */\nCHIP Mux {\n IN a, b, sel;\n OUT out;\n\n PARTS:\n //// Replace this comment with your code.\n}',"Mux.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/Mux.tst\n\noutput-list a b sel out;\n\nset a 0,\nset b 0,\nset sel 0,\neval,\noutput;\n\nset sel 1,\neval,\noutput;\n\nset a 0,\nset b 1,\nset sel 0,\neval,\noutput;\n\nset sel 1,\neval,\noutput;\n\nset a 1,\nset b 0,\nset sel 0,\neval,\noutput;\n\nset sel 1,\neval,\noutput;\n\nset a 1,\nset b 1,\nset sel 0,\neval,\noutput;\n\nset sel 1,\neval,\noutput;',"Mux.cmp":"| a | b |sel|out|\n| 0 | 0 | 0 | 0 |\n| 0 | 0 | 1 | 0 |\n| 0 | 1 | 0 | 0 |\n| 0 | 1 | 1 | 1 |\n| 1 | 0 | 0 | 1 |\n| 1 | 0 | 1 | 0 |\n| 1 | 1 | 0 | 1 |\n| 1 | 1 | 1 | 1 |"},DMux:{"DMux.hdl":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/DMux.hdl\n/**\n * Demultiplexor:\n * [a, b] = [in, 0] if sel = 0\n * [0, in] if sel = 1\n */\nCHIP DMux {\n IN in, sel;\n OUT a, b;\n\n PARTS:\n //// Replace this comment with your code.\n}',"DMux.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/DMux.tst\n\noutput-list in sel a b;\n\nset in 0,\nset sel 0,\neval,\noutput;\n\nset sel 1,\neval,\noutput;\n\nset in 1,\nset sel 0,\neval,\noutput;\n\nset sel 1,\neval,\noutput;',"DMux.cmp":"|in |sel| a | b |\n| 0 | 0 | 0 | 0 |\n| 0 | 1 | 0 | 0 |\n| 1 | 0 | 1 | 0 |\n| 1 | 1 | 0 | 1 |"},Not16:{"Not16.hdl":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/01/Not16.hdl\n/**\n * 16-bit Not gate:\n * for i = 0, ..., 15:\n * out[i] = Not(a[i])\n */\nCHIP Not16 {\n IN in[16];\n OUT out[16];\n\n PARTS:\n //// Replace this comment with your code.\n}',"Not16.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/Not16.tst\n\noutput-list in%B1.16.1 out%B1.16.1;\n\nset in %B0000000000000000,\neval,\noutput;\n\nset in %B1111111111111111,\neval,\noutput;\n\nset in %B1010101010101010,\neval,\noutput;\n\nset in %B0011110011000011,\neval,\noutput;\n\nset in %B0001001000110100,\neval,\noutput;',"Not16.cmp":"| in | out |\n| 0000000000000000 | 1111111111111111 |\n| 1111111111111111 | 0000000000000000 |\n| 1010101010101010 | 0101010101010101 |\n| 0011110011000011 | 1100001100111100 |\n| 0001001000110100 | 1110110111001011 |"},And16:{"And16.hdl":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/And16.hdl\n/**\n * 16-bit And gate:\n * for i = 0, ..., 15:\n * out[i] = a[i] And b[i] \n */\nCHIP And16 {\n IN a[16], b[16];\n OUT out[16];\n\n PARTS:\n //// Replace this comment with your code.\n}',"And16.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/And16.tst\n\noutput-list a%B1.16.1 b%B1.16.1 out%B1.16.1;\n\nset a %B0000000000000000,\nset b %B0000000000000000,\neval,\noutput;\n\nset a %B0000000000000000,\nset b %B1111111111111111,\neval,\noutput;\n\nset a %B1111111111111111,\nset b %B1111111111111111,\neval,\noutput;\n\nset a %B1010101010101010,\nset b %B0101010101010101,\neval,\noutput;\n\nset a %B0011110011000011,\nset b %B0000111111110000,\neval,\noutput;\n\nset a %B0001001000110100,\nset b %B1001100001110110,\neval,\noutput;',"And16.cmp":"| a | b | out |\n| 0000000000000000 | 0000000000000000 | 0000000000000000 |\n| 0000000000000000 | 1111111111111111 | 0000000000000000 |\n| 1111111111111111 | 1111111111111111 | 1111111111111111 |\n| 1010101010101010 | 0101010101010101 | 0000000000000000 |\n| 0011110011000011 | 0000111111110000 | 0000110011000000 |\n| 0001001000110100 | 1001100001110110 | 0001000000110100 |"},Or16:{"Or16.hdl":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/Or16.hdl\n/**\n * 16-bit Or gate:\n * for i = 0, ..., 15:\n * out[i] = a[i] Or b[i] \n */\nCHIP Or16 {\n IN a[16], b[16];\n OUT out[16];\n\n PARTS:\n //// Replace this comment with your code.\n}',"Or16.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/Or16.tst\n\noutput-list a%B1.16.1 b%B1.16.1 out%B1.16.1;\n\nset a %B0000000000000000,\nset b %B0000000000000000,\neval,\noutput;\n\nset a %B0000000000000000,\nset b %B1111111111111111,\neval,\noutput;\n\nset a %B1111111111111111,\nset b %B1111111111111111,\neval,\noutput;\n\nset a %B1010101010101010,\nset b %B0101010101010101,\neval,\noutput;\n\nset a %B0011110011000011,\nset b %B0000111111110000,\neval,\noutput;\n\nset a %B0001001000110100,\nset b %B1001100001110110,\neval,\noutput;',"Or16.cmp":"| a | b | out |\n| 0000000000000000 | 0000000000000000 | 0000000000000000 |\n| 0000000000000000 | 1111111111111111 | 1111111111111111 |\n| 1111111111111111 | 1111111111111111 | 1111111111111111 |\n| 1010101010101010 | 0101010101010101 | 1111111111111111 |\n| 0011110011000011 | 0000111111110000 | 0011111111110011 |\n| 0001001000110100 | 1001100001110110 | 1001101001110110 |"},Mux16:{"Mux16.hdl":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/Mux16.hdl\n/**\n * 16-bit multiplexor: \n * for i = 0, ..., 15:\n * if (sel = 0) out[i] = a[i], else out[i] = b[i]\n */\nCHIP Mux16 {\n IN a[16], b[16], sel;\n OUT out[16];\n\n PARTS:\n //// Replace this comment with your code.\n}',"Mux16.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/Mux16.tst\n\noutput-list a%B1.16.1 b%B1.16.1 sel out%B1.16.1;\n\nset a 0,\nset b 0,\nset sel 0,\neval,\noutput;\n\nset sel 1,\neval,\noutput;\n\nset a %B0000000000000000,\nset b %B0001001000110100,\nset sel 0,\neval,\noutput;\n\nset sel 1,\neval,\noutput;\n\nset a %B1001100001110110,\nset b %B0000000000000000,\nset sel 0,\neval,\noutput;\n\nset sel 1,\neval,\noutput;\n\nset a %B1010101010101010,\nset b %B0101010101010101,\nset sel 0,\neval,\noutput;\n\nset sel 1,\neval,\noutput;',"Mux16.cmp":"| a | b |sel| out |\n| 0000000000000000 | 0000000000000000 | 0 | 0000000000000000 |\n| 0000000000000000 | 0000000000000000 | 1 | 0000000000000000 |\n| 0000000000000000 | 0001001000110100 | 0 | 0000000000000000 |\n| 0000000000000000 | 0001001000110100 | 1 | 0001001000110100 |\n| 1001100001110110 | 0000000000000000 | 0 | 1001100001110110 |\n| 1001100001110110 | 0000000000000000 | 1 | 0000000000000000 |\n| 1010101010101010 | 0101010101010101 | 0 | 1010101010101010 |\n| 1010101010101010 | 0101010101010101 | 1 | 0101010101010101 |"},Mux4Way16:{"Mux4Way16.hdl":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/Mux4Way16.hdl\n/**\n * 4-way 16-bit multiplexor:\n * out = a if sel = 00\n * b if sel = 01\n * c if sel = 10\n * d if sel = 11\n */\nCHIP Mux4Way16 {\n IN a[16], b[16], c[16], d[16], sel[2];\n OUT out[16];\n \n PARTS:\n //// Replace this comment with your code.\n}',"Mux4Way16.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/Mux4Way16.tst\n\noutput-list a%B1.16.1 b%B1.16.1 c%B1.16.1 d%B1.16.1 sel%B2.2.2 out%B1.16.1;\n\nset a 0,\nset b 0,\nset c 0,\nset d 0,\nset sel 0,\neval,\noutput;\n\nset sel 1,\neval,\noutput;\n\nset sel 2,\neval,\noutput;\n\nset sel 3,\neval,\noutput;\n\nset a %B0001001000110100,\nset b %B1001100001110110,\nset c %B1010101010101010,\nset d %B0101010101010101,\nset sel 0,\neval,\noutput;\n\nset sel 1,\neval,\noutput;\n\nset sel 2,\neval,\noutput;\n\nset sel 3,\neval,\noutput;',"Mux4Way16.cmp":"| a | b | c | d | sel | out |\n| 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 00 | 0000000000000000 |\n| 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 01 | 0000000000000000 |\n| 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 10 | 0000000000000000 |\n| 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 11 | 0000000000000000 |\n| 0001001000110100 | 1001100001110110 | 1010101010101010 | 0101010101010101 | 00 | 0001001000110100 |\n| 0001001000110100 | 1001100001110110 | 1010101010101010 | 0101010101010101 | 01 | 1001100001110110 |\n| 0001001000110100 | 1001100001110110 | 1010101010101010 | 0101010101010101 | 10 | 1010101010101010 |\n| 0001001000110100 | 1001100001110110 | 1010101010101010 | 0101010101010101 | 11 | 0101010101010101 ||"},Mux8Way16:{"Mux8Way16.hdl":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/Mux8Way16.hdl\n/**\n * 8-way 16-bit multiplexor:\n * out = a if sel = 000\n * b if sel = 001\n * c if sel = 010\n * d if sel = 011\n * e if sel = 100\n * f if sel = 101\n * g if sel = 110\n * h if sel = 111\n */\nCHIP Mux8Way16 {\n IN a[16], b[16], c[16], d[16],\n e[16], f[16], g[16], h[16],\n sel[3];\n OUT out[16];\n\n PARTS:\n //// Replace this comment with your code.\n}',"Mux8Way16.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/Mux8Way16.tst\n\noutput-list a%B1.16.1 b%B1.16.1 c%B1.16.1 d%B1.16.1 e%B1.16.1 f%B1.16.1 g%B1.16.1 h%B1.16.1 sel%B2.3.2 out%B1.16.1;\n\nset a 0,\nset b 0,\nset c 0,\nset d 0,\nset e 0,\nset f 0,\nset g 0,\nset h 0,\nset sel 0,\neval,\noutput;\n\nset sel 1,\neval,\noutput;\n\nset sel 2,\neval,\noutput;\n\nset sel 3,\neval,\noutput;\n\nset sel 4,\neval,\noutput;\n\nset sel 5,\neval,\noutput;\n\nset sel 6,\neval,\noutput;\n\nset sel 7,\neval,\noutput;\n\nset a %B0001001000110100,\nset b %B0010001101000101,\nset c %B0011010001010110,\nset d %B0100010101100111,\nset e %B0101011001111000,\nset f %B0110011110001001,\nset g %B0111100010011010,\nset h %B1000100110101011,\nset sel 0,\neval,\noutput;\n\nset sel 1,\neval,\noutput;\n\nset sel 2,\neval,\noutput;\n\nset sel 3,\neval,\noutput;\n\nset sel 4,\neval,\noutput;\n\nset sel 5,\neval,\noutput;\n\nset sel 6,\neval,\noutput;\n\nset sel 7,\neval,\noutput;',"Mux8Way16.cmp":"| a | b | c | d | e | f | g | h | sel | out |\n| 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 000 | 0000000000000000 |\n| 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 001 | 0000000000000000 |\n| 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 010 | 0000000000000000 |\n| 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 011 | 0000000000000000 |\n| 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 100 | 0000000000000000 |\n| 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 101 | 0000000000000000 |\n| 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 110 | 0000000000000000 |\n| 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 111 | 0000000000000000 |\n| 0001001000110100 | 0010001101000101 | 0011010001010110 | 0100010101100111 | 0101011001111000 | 0110011110001001 | 0111100010011010 | 1000100110101011 | 000 | 0001001000110100 |\n| 0001001000110100 | 0010001101000101 | 0011010001010110 | 0100010101100111 | 0101011001111000 | 0110011110001001 | 0111100010011010 | 1000100110101011 | 001 | 0010001101000101 |\n| 0001001000110100 | 0010001101000101 | 0011010001010110 | 0100010101100111 | 0101011001111000 | 0110011110001001 | 0111100010011010 | 1000100110101011 | 010 | 0011010001010110 |\n| 0001001000110100 | 0010001101000101 | 0011010001010110 | 0100010101100111 | 0101011001111000 | 0110011110001001 | 0111100010011010 | 1000100110101011 | 011 | 0100010101100111 |\n| 0001001000110100 | 0010001101000101 | 0011010001010110 | 0100010101100111 | 0101011001111000 | 0110011110001001 | 0111100010011010 | 1000100110101011 | 100 | 0101011001111000 |\n| 0001001000110100 | 0010001101000101 | 0011010001010110 | 0100010101100111 | 0101011001111000 | 0110011110001001 | 0111100010011010 | 1000100110101011 | 101 | 0110011110001001 |\n| 0001001000110100 | 0010001101000101 | 0011010001010110 | 0100010101100111 | 0101011001111000 | 0110011110001001 | 0111100010011010 | 1000100110101011 | 110 | 0111100010011010 |\n| 0001001000110100 | 0010001101000101 | 0011010001010110 | 0100010101100111 | 0101011001111000 | 0110011110001001 | 0111100010011010 | 1000100110101011 | 111 | 1000100110101011 |"},DMux4Way:{"DMux4Way.hdl":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/DMux4Way.hdl\n/**\n * 4-way demultiplexor:\n * [a, b, c, d] = [in, 0, 0, 0] if sel = 00\n * [0, in, 0, 0] if sel = 01\n * [0, 0, in, 0] if sel = 10\n * [0, 0, 0, in] if sel = 11\n */\nCHIP DMux4Way {\n IN in, sel[2];\n OUT a, b, c, d;\n\n PARTS:\n //// Replace this comment with your code.\n}',"DMux4Way.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/DMux4Way.tst\n\noutput-list in sel%B2.2.2 a b c d;\n\nset in 0,\nset sel %B00,\neval,\noutput;\n\nset sel %B01,\neval,\noutput;\n\nset sel %B10,\neval,\noutput;\n\nset sel %B11,\neval,\noutput;\n\nset in 1,\nset sel %B00,\neval,\noutput;\n\nset sel %B01,\neval,\noutput;\n\nset sel %B10,\neval,\noutput;\n\nset sel %B11,\neval,\noutput;',"DMux4Way.cmp":"|in | sel | a | b | c | d |\n| 0 | 00 | 0 | 0 | 0 | 0 |\n| 0 | 01 | 0 | 0 | 0 | 0 |\n| 0 | 10 | 0 | 0 | 0 | 0 |\n| 0 | 11 | 0 | 0 | 0 | 0 |\n| 1 | 00 | 1 | 0 | 0 | 0 |\n| 1 | 01 | 0 | 1 | 0 | 0 |\n| 1 | 10 | 0 | 0 | 1 | 0 |\n| 1 | 11 | 0 | 0 | 0 | 1 |"},DMux8Way:{"DMux8Way.hdl":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/DMux8Way.hdl\n/**\n * 8-way demultiplexor:\n * [a, b, c, d, e, f, g, h] = [in, 0, 0, 0, 0, 0, 0, 0] if sel = 000\n * [0, in, 0, 0, 0, 0, 0, 0] if sel = 001\n * [0, 0, in, 0, 0, 0, 0, 0] if sel = 010\n * [0, 0, 0, in, 0, 0, 0, 0] if sel = 011\n * [0, 0, 0, 0, in, 0, 0, 0] if sel = 100\n * [0, 0, 0, 0, 0, in, 0, 0] if sel = 101\n * [0, 0, 0, 0, 0, 0, in, 0] if sel = 110\n * [0, 0, 0, 0, 0, 0, 0, in] if sel = 111\n */\nCHIP DMux8Way {\n IN in, sel[3];\n OUT a, b, c, d, e, f, g, h;\n\n PARTS:\n //// Replace this comment with your code.\n}',"DMux8Way.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/DMux8Way.tst\n\noutput-list in sel%B2.3.2 a b c d e f g h;\n\nset in 0,\nset sel %B000,\neval,\noutput;\n\nset sel %B001,\neval,\noutput;\n\nset sel %B010,\neval,\noutput;\n\nset sel %B011,\neval,\noutput;\n\nset sel %B100,\neval,\noutput;\n\nset sel %B101,\neval,\noutput;\n\nset sel %B110,\neval,\noutput;\n\nset sel %B111,\neval,\noutput;\n\nset in 1,\nset sel %B000,\neval,\noutput;\n\nset sel %B001,\neval,\noutput;\n\nset sel %B010,\neval,\noutput;\n\nset sel %B011,\neval,\noutput;\n\nset sel %B100,\neval,\noutput;\n\nset sel %B101,\neval,\noutput;\n\nset sel %B110,\neval,\noutput;\n\nset sel %B111,\neval,\noutput;',"DMux8Way.cmp":"|in | sel | a | b | c | d | e | f | g | h |\n| 0 | 000 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |\n| 0 | 001 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |\n| 0 | 010 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |\n| 0 | 011 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |\n| 0 | 100 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |\n| 0 | 101 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |\n| 0 | 110 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |\n| 0 | 111 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |\n| 1 | 000 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |\n| 1 | 001 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 |\n| 1 | 010 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 |\n| 1 | 011 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 |\n| 1 | 100 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 |\n| 1 | 101 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |\n| 1 | 110 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 |\n| 1 | 111 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |"},Or8Way:{"Or8Way.hdl":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/Or8Way.hdl\n/**\n * 8-way Or gate: \n * out = in[0] Or in[1] Or ... Or in[7]\n */\nCHIP Or8Way {\n IN in[8];\n OUT out;\n\n PARTS:\n //// Replace this comment with your code.\n}',"Or8Way.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/Or8Way.tst\n\noutput-list in%B2.8.2 out;\n\nset in %B00000000,\neval,\noutput;\n\nset in %B11111111,\neval,\noutput;\n\nset in %B00010000,\neval,\noutput;\n\nset in %B00000001,\neval,\noutput;\n\nset in %B00100110,\neval,\noutput;',"Or8Way.cmp":"| in |out|\n| 00000000 | 0 |\n| 11111111 | 1 |\n| 00010000 | 1 |\n| 00000001 | 1 |\n| 00100110 | 1 |"}},k={Nand:'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/Nand.hdl\n/**\n * Nand gate:\n * if (a and b) out = 0, else out = 1 \n */\nCHIP Nand {\n IN a, b;\n OUT out;\n \n PARTS:\n BUILTIN Nand;\n}'};async function h(n){await n.pushd("/projects/01"),await(0,r.cL)(n,l),await n.popd()}async function B(n){await n.pushd("/projects/01"),await c(n,l,".tst"),await c(n,l,".cmp"),await n.popd()}const m={HalfAdder:{"HalfAdder.hdl":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/2/HalfAdder.hdl\n/**\n * Computes the sum of two bits.\n */\nCHIP HalfAdder {\n IN a, b; // 1-bit inputs\n OUT sum, // Right bit of a + b \n carry; // Left bit of a + b\n\n PARTS:\n //// Replace this comment with your code.\n}',"HalfAdder.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/2/HalfAdder.tst\n\noutput-list a b sum carry;\n\nset a 0,\nset b 0,\neval,\noutput;\n\nset a 0,\nset b 1,\neval,\noutput;\n\nset a 1,\nset b 0,\neval,\noutput;\n\nset a 1,\nset b 1,\neval,\noutput;',"HalfAdder.cmp":"| a | b |sum|car|\n| 0 | 0 | 0 | 0 |\n| 0 | 1 | 1 | 0 |\n| 1 | 0 | 1 | 0 |\n| 1 | 1 | 0 | 1 |"},FullAdder:{"FullAdder.hdl":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/2/FullAdder.hdl\n/**\n * Computes the sum of three bits.\n */\nCHIP FullAdder {\n IN a, b, c; // 1-bit inputs\n OUT sum, // Right bit of a + b + c\n carry; // Left bit of a + b + c\n\n PARTS:\n //// Replace this comment with your code.\n}',"FullAdder.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/2/FullAdder.tst\n\noutput-list a b c sum carry%B2.1.2;\n\nset a 0,\nset b 0,\nset c 0,\neval,\noutput;\n\nset c 1,\neval,\noutput;\n\nset b 1,\nset c 0,\neval,\noutput;\n\nset c 1,\neval,\noutput;\n\nset a 1,\nset b 0,\nset c 0,\neval,\noutput;\n\nset c 1,\neval,\noutput;\n\nset b 1,\nset c 0,\neval,\noutput;\n\nset c 1,\neval,\noutput;',"FullAdder.cmp":"| a | b | c |sum|carry|\n| 0 | 0 | 0 | 0 | 0 |\n| 0 | 0 | 1 | 1 | 0 |\n| 0 | 1 | 0 | 1 | 0 |\n| 0 | 1 | 1 | 0 | 1 |\n| 1 | 0 | 0 | 1 | 0 |\n| 1 | 0 | 1 | 0 | 1 |\n| 1 | 1 | 0 | 0 | 1 |\n| 1 | 1 | 1 | 1 | 1 |"},Add16:{"Add16.hdl":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/2/Add16.hdl\n/**\n * 16-bit adder: Adds two 16-bit two\'s complement values.\n * The most significant carry bit is ignored.\n */\nCHIP Add16 {\n IN a[16], b[16];\n OUT out[16];\n\n PARTS:\n //// Replace this comment with your code.\n}',"Add16.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/2/Add16.tst\n\noutput-list a%B1.16.1 b%B1.16.1 out%B1.16.1;\n\nset a %B0000000000000000,\nset b %B0000000000000000,\neval,\noutput;\n\nset a %B0000000000000000,\nset b %B1111111111111111,\neval,\noutput;\n\nset a %B1111111111111111,\nset b %B1111111111111111,\neval,\noutput;\n\nset a %B1010101010101010,\nset b %B0101010101010101,\neval,\noutput;\n\nset a %B0011110011000011,\nset b %B0000111111110000,\neval,\noutput;\n\nset a %B0001001000110100,\nset b %B1001100001110110,\neval,\noutput;',"Add16.cmp":"| a | b | out |\n| 0000000000000000 | 0000000000000000 | 0000000000000000 |\n| 0000000000000000 | 1111111111111111 | 1111111111111111 |\n| 1111111111111111 | 1111111111111111 | 1111111111111110 |\n| 1010101010101010 | 0101010101010101 | 1111111111111111 |\n| 0011110011000011 | 0000111111110000 | 0100110010110011 |\n| 0001001000110100 | 1001100001110110 | 1010101010101010 |"},Inc16:{"Inc16.hdl":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/2/Inc16.hdl\n/**\n * 16-bit incrementer:\n * out = in + 1\n */\nCHIP Inc16 {\n IN in[16];\n OUT out[16];\n\n PARTS:\n //// Replace this comment with your code.\n}',"Inc16.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/2/Inc16.tst\n\noutput-list in%B1.16.1 out%B1.16.1;\n\nset in %B0000000000000000, // in = 0\neval,\noutput;\n\nset in %B1111111111111111, // in = -1\neval,\noutput;\n\nset in %B0000000000000101, // in = 5\neval,\noutput;\n\nset in %B1111111111111011, // in = -5\neval,\noutput;',"Inc16.cmp":"| in | out |\n| 0000000000000000 | 0000000000000001 |\n| 1111111111111111 | 0000000000000000 |\n| 0000000000000101 | 0000000000000110 |\n| 1111111111111011 | 1111111111111100 |\n"},ALU:{"ALU.hdl":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/2/ALU.hdl\n/**\n * ALU (Arithmetic Logic Unit):\n * Computes out = one of the following functions:\n * 0, 1, -1,\n * x, y, !x, !y, -x, -y,\n * x + 1, y + 1, x - 1, y - 1,\n * x + y, x - y, y - x,\n * x & y, x | y\n * on the 16-bit inputs x, y,\n * according to the input bits zx, nx, zy, ny, f, no.\n * In addition, computes the two output bits:\n * if (out == 0) zr = 1, else zr = 0\n * if (out < 0) ng = 1, else ng = 0\n */\n// Implementation: Manipulates the x and y inputs\n// and operates on the resulting values, as follows:\n// if (zx == 1) sets x = 0 // 16-bit constant\n// if (nx == 1) sets x = !x // bitwise not\n// if (zy == 1) sets y = 0 // 16-bit constant\n// if (ny == 1) sets y = !y // bitwise not\n// if (f == 1) sets out = x + y // integer 2\'s complement addition\n// if (f == 0) sets out = x & y // bitwise and\n// if (no == 1) sets out = !out // bitwise not\n\nCHIP ALU {\n IN \n x[16], y[16], // 16-bit inputs \n zx, // zero the x input?\n nx, // negate the x input?\n zy, // zero the y input?\n ny, // negate the y input?\n f, // compute (out = x + y) or (out = x & y)?\n no; // negate the out output?\n OUT \n out[16], // 16-bit output\n zr, // if (out == 0) equals 1, else 0\n ng; // if (out < 0) equals 1, else 0\n\n PARTS:\n //// Replace this comment with your code.\n}',"ALU.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/2/ALU.tst\n\noutput-list x%B1.16.1 y%B1.16.1 zx nx zy ny f no out zr ng;\n\nset x %B0000000000000000, // x = 0\nset y %B1111111111111111; // y = -1\n\n// Compute 0\nset zx 1,\nset nx 0,\nset zy 1,\nset ny 0,\nset f 1,\nset no 0,\neval,\noutput;\n\n// Compute 1\nset zx 1,\nset nx 1,\nset zy 1,\nset ny 1,\nset f 1,\nset no 1,\neval,\noutput;\n\n// Compute -1\nset zx 1,\nset nx 1,\nset zy 1,\nset ny 0,\nset f 1,\nset no 0,\neval,\noutput;\n\n// Compute x\nset zx 0,\nset nx 0,\nset zy 1,\nset ny 1,\nset f 0,\nset no 0,\neval,\noutput;\n\n// Compute y\nset zx 1,\nset nx 1,\nset zy 0,\nset ny 0,\nset f 0,\nset no 0,\neval,\noutput;\n\n// Compute !x\nset zx 0,\nset nx 0,\nset zy 1,\nset ny 1,\nset f 0,\nset no 1,\neval,\noutput;\n\n// Compute !y\nset zx 1,\nset nx 1,\nset zy 0,\nset ny 0,\nset f 0,\nset no 1,\neval,\noutput;\n\n// Compute -x\nset zx 0,\nset nx 0,\nset zy 1,\nset ny 1,\nset f 1,\nset no 1,\neval,\noutput;\n\n// Compute -y\nset zx 1,\nset nx 1,\nset zy 0,\nset ny 0,\nset f 1,\nset no 1,\neval,\noutput;\n\n// Compute x + 1\nset zx 0,\nset nx 1,\nset zy 1,\nset ny 1,\nset f 1,\nset no 1,\neval,\noutput;\n\n// Compute y + 1\nset zx 1,\nset nx 1,\nset zy 0,\nset ny 1,\nset f 1,\nset no 1,\neval,\noutput;\n\n// Compute x - 1\nset zx 0,\nset nx 0,\nset zy 1,\nset ny 1,\nset f 1,\nset no 0,\neval,\noutput;\n\n// Compute y - 1\nset zx 1,\nset nx 1,\nset zy 0,\nset ny 0,\nset f 1,\nset no 0,\neval,\noutput;\n\n// Compute x + y\nset zx 0,\nset nx 0,\nset zy 0,\nset ny 0,\nset f 1,\nset no 0,\neval,\noutput;\n\n// Compute x - y\nset zx 0,\nset nx 1,\nset zy 0,\nset ny 0,\nset f 1,\nset no 1,\neval,\noutput;\n\n// Compute y - x\nset zx 0,\nset nx 0,\nset zy 0,\nset ny 1,\nset f 1,\nset no 1,\neval,\noutput;\n\n// Compute x & y\nset zx 0,\nset nx 0,\nset zy 0,\nset ny 0,\nset f 0,\nset no 0,\neval,\noutput;\n\n// Compute x | y\nset zx 0,\nset nx 1,\nset zy 0,\nset ny 1,\nset f 0,\nset no 1,\neval,\noutput;\n\nset x %B000000000010001, // x = 17\nset y %B000000000000011; // y = 3\n\n// Compute 0\nset zx 1,\nset nx 0,\nset zy 1,\nset ny 0,\nset f 1,\nset no 0,\neval,\noutput;\n\n// Compute 1\nset zx 1,\nset nx 1,\nset zy 1,\nset ny 1,\nset f 1,\nset no 1,\neval,\noutput;\n\n// Compute -1\nset zx 1,\nset nx 1,\nset zy 1,\nset ny 0,\nset f 1,\nset no 0,\neval,\noutput;\n\n// Compute x\nset zx 0,\nset nx 0,\nset zy 1,\nset ny 1,\nset f 0,\nset no 0,\neval,\noutput;\n\n// Compute y\nset zx 1,\nset nx 1,\nset zy 0,\nset ny 0,\nset f 0,\nset no 0,\neval,\noutput;\n\n// Compute !x\nset zx 0,\nset nx 0,\nset zy 1,\nset ny 1,\nset f 0,\nset no 1,\neval,\noutput;\n\n// Compute !y\nset zx 1,\nset nx 1,\nset zy 0,\nset ny 0,\nset f 0,\nset no 1,\neval,\noutput;\n\n// Compute -x\nset zx 0,\nset nx 0,\nset zy 1,\nset ny 1,\nset f 1,\nset no 1,\neval,\noutput;\n\n// Compute -y\nset zx 1,\nset nx 1,\nset zy 0,\nset ny 0,\nset f 1,\nset no 1,\neval,\noutput;\n\n// Compute x + 1\nset zx 0,\nset nx 1,\nset zy 1,\nset ny 1,\nset f 1,\nset no 1,\neval,\noutput;\n\n// Compute y + 1\nset zx 1,\nset nx 1,\nset zy 0,\nset ny 1,\nset f 1,\nset no 1,\neval,\noutput;\n\n// Compute x - 1\nset zx 0,\nset nx 0,\nset zy 1,\nset ny 1,\nset f 1,\nset no 0,\neval,\noutput;\n\n// Compute y - 1\nset zx 1,\nset nx 1,\nset zy 0,\nset ny 0,\nset f 1,\nset no 0,\neval,\noutput;\n\n// Compute x + y\nset zx 0,\nset nx 0,\nset zy 0,\nset ny 0,\nset f 1,\nset no 0,\neval,\noutput;\n\n// Compute x - y\nset zx 0,\nset nx 1,\nset zy 0,\nset ny 0,\nset f 1,\nset no 1,\neval,\noutput;\n\n// Compute y - x\nset zx 0,\nset nx 0,\nset zy 0,\nset ny 1,\nset f 1,\nset no 1,\neval,\noutput;\n\n// Compute x & y\nset zx 0,\nset nx 0,\nset zy 0,\nset ny 0,\nset f 0,\nset no 0,\neval,\noutput;\n\n// Compute x | y\nset zx 0,\nset nx 1,\nset zy 0,\nset ny 1,\nset f 0,\nset no 1,\neval,\noutput;',"ALU.cmp":"| x | y |zx |nx |zy |ny | f |no | out |zr |ng |\n| 0000000000000000 | 1111111111111111 | 1 | 0 | 1 | 0 | 1 | 0 | 0000000000000000 | 1 | 0 |\n| 0000000000000000 | 1111111111111111 | 1 | 1 | 1 | 1 | 1 | 1 | 0000000000000001 | 0 | 0 |\n| 0000000000000000 | 1111111111111111 | 1 | 1 | 1 | 0 | 1 | 0 | 1111111111111111 | 0 | 1 |\n| 0000000000000000 | 1111111111111111 | 0 | 0 | 1 | 1 | 0 | 0 | 0000000000000000 | 1 | 0 |\n| 0000000000000000 | 1111111111111111 | 1 | 1 | 0 | 0 | 0 | 0 | 1111111111111111 | 0 | 1 |\n| 0000000000000000 | 1111111111111111 | 0 | 0 | 1 | 1 | 0 | 1 | 1111111111111111 | 0 | 1 |\n| 0000000000000000 | 1111111111111111 | 1 | 1 | 0 | 0 | 0 | 1 | 0000000000000000 | 1 | 0 |\n| 0000000000000000 | 1111111111111111 | 0 | 0 | 1 | 1 | 1 | 1 | 0000000000000000 | 1 | 0 |\n| 0000000000000000 | 1111111111111111 | 1 | 1 | 0 | 0 | 1 | 1 | 0000000000000001 | 0 | 0 |\n| 0000000000000000 | 1111111111111111 | 0 | 1 | 1 | 1 | 1 | 1 | 0000000000000001 | 0 | 0 |\n| 0000000000000000 | 1111111111111111 | 1 | 1 | 0 | 1 | 1 | 1 | 0000000000000000 | 1 | 0 |\n| 0000000000000000 | 1111111111111111 | 0 | 0 | 1 | 1 | 1 | 0 | 1111111111111111 | 0 | 1 |\n| 0000000000000000 | 1111111111111111 | 1 | 1 | 0 | 0 | 1 | 0 | 1111111111111110 | 0 | 1 |\n| 0000000000000000 | 1111111111111111 | 0 | 0 | 0 | 0 | 1 | 0 | 1111111111111111 | 0 | 1 |\n| 0000000000000000 | 1111111111111111 | 0 | 1 | 0 | 0 | 1 | 1 | 0000000000000001 | 0 | 0 |\n| 0000000000000000 | 1111111111111111 | 0 | 0 | 0 | 1 | 1 | 1 | 1111111111111111 | 0 | 1 |\n| 0000000000000000 | 1111111111111111 | 0 | 0 | 0 | 0 | 0 | 0 | 0000000000000000 | 1 | 0 |\n| 0000000000000000 | 1111111111111111 | 0 | 1 | 0 | 1 | 0 | 1 | 1111111111111111 | 0 | 1 |\n| 0000000000010001 | 0000000000000011 | 1 | 0 | 1 | 0 | 1 | 0 | 0000000000000000 | 1 | 0 |\n| 0000000000010001 | 0000000000000011 | 1 | 1 | 1 | 1 | 1 | 1 | 0000000000000001 | 0 | 0 |\n| 0000000000010001 | 0000000000000011 | 1 | 1 | 1 | 0 | 1 | 0 | 1111111111111111 | 0 | 1 |\n| 0000000000010001 | 0000000000000011 | 0 | 0 | 1 | 1 | 0 | 0 | 0000000000010001 | 0 | 0 |\n| 0000000000010001 | 0000000000000011 | 1 | 1 | 0 | 0 | 0 | 0 | 0000000000000011 | 0 | 0 |\n| 0000000000010001 | 0000000000000011 | 0 | 0 | 1 | 1 | 0 | 1 | 1111111111101110 | 0 | 1 |\n| 0000000000010001 | 0000000000000011 | 1 | 1 | 0 | 0 | 0 | 1 | 1111111111111100 | 0 | 1 |\n| 0000000000010001 | 0000000000000011 | 0 | 0 | 1 | 1 | 1 | 1 | 1111111111101111 | 0 | 1 |\n| 0000000000010001 | 0000000000000011 | 1 | 1 | 0 | 0 | 1 | 1 | 1111111111111101 | 0 | 1 |\n| 0000000000010001 | 0000000000000011 | 0 | 1 | 1 | 1 | 1 | 1 | 0000000000010010 | 0 | 0 |\n| 0000000000010001 | 0000000000000011 | 1 | 1 | 0 | 1 | 1 | 1 | 0000000000000100 | 0 | 0 |\n| 0000000000010001 | 0000000000000011 | 0 | 0 | 1 | 1 | 1 | 0 | 0000000000010000 | 0 | 0 |\n| 0000000000010001 | 0000000000000011 | 1 | 1 | 0 | 0 | 1 | 0 | 0000000000000010 | 0 | 0 |\n| 0000000000010001 | 0000000000000011 | 0 | 0 | 0 | 0 | 1 | 0 | 0000000000010100 | 0 | 0 |\n| 0000000000010001 | 0000000000000011 | 0 | 1 | 0 | 0 | 1 | 1 | 0000000000001110 | 0 | 0 |\n| 0000000000010001 | 0000000000000011 | 0 | 0 | 0 | 1 | 1 | 1 | 1111111111110010 | 0 | 1 |\n| 0000000000010001 | 0000000000000011 | 0 | 0 | 0 | 0 | 0 | 0 | 0000000000000001 | 0 | 0 |\n| 0000000000010001 | 0000000000000011 | 0 | 1 | 0 | 1 | 0 | 1 | 0000000000010011 | 0 | 0 |","ALU-basic.tst":"// This file is part of www.nand2tetris.org\n// and the book \"The Elements of Computing Systems\"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/2/ALU-basic.tst\n\n// Tests the basic version of the ALU chip.\n// DOES NOT replace the final test provided by ALU.tst.\n// Specifically: Tests the ALU logic that computes the 'out' output;\n// The 'zr' and 'ng' output bits are ignored.\n\noutput-list x%B1.16.1 y%B1.16.1 zx nx zy ny f no out%B1.16.1;\n\nset x %B0000000000000000,\nset y %B1111111111111111,\n\nset zx 1,\nset nx 0,\nset zy 1,\nset ny 0,\nset f 1,\nset no 0,\neval,\noutput;\n\nset zx 1,\nset nx 1,\nset zy 1,\nset ny 1,\nset f 1,\nset no 1,\neval,\noutput;\n\nset zx 1,\nset nx 1,\nset zy 1,\nset ny 0,\nset f 1,\nset no 0,\neval,\noutput;\n\nset zx 0,\nset nx 0,\nset zy 1,\nset ny 1,\nset f 0,\nset no 0,\neval,\noutput;\n\nset zx 1,\nset nx 1,\nset zy 0,\nset ny 0,\nset f 0,\nset no 0,\neval,\noutput;\n\nset zx 0,\nset nx 0,\nset zy 1,\nset ny 1,\nset f 0,\nset no 1,\neval,\noutput;\n\nset zx 1,\nset nx 1,\nset zy 0,\nset ny 0,\nset f 0,\nset no 1,\neval,\noutput;\n\nset zx 0,\nset nx 0,\nset zy 1,\nset ny 1,\nset f 1,\nset no 1,\neval,\noutput;\n\nset zx 1,\nset nx 1,\nset zy 0,\nset ny 0,\nset f 1,\nset no 1,\neval,\noutput;\n\nset zx 0,\nset nx 1,\nset zy 1,\nset ny 1,\nset f 1,\nset no 1,\neval,\noutput;\n\nset zx 1,\nset nx 1,\nset zy 0,\nset ny 1,\nset f 1,\nset no 1,\neval,\noutput;\n\nset zx 0,\nset nx 0,\nset zy 1,\nset ny 1,\nset f 1,\nset no 0,\neval,\noutput;\n\nset zx 1,\nset nx 1,\nset zy 0,\nset ny 0,\nset f 1,\nset no 0,\neval,\noutput;\n\nset zx 0,\nset nx 0,\nset zy 0,\nset ny 0,\nset f 1,\nset no 0,\neval,\noutput;\n\nset zx 0,\nset nx 1,\nset zy 0,\nset ny 0,\nset f 1,\nset no 1,\neval,\noutput;\n\nset zx 0,\nset nx 0,\nset zy 0,\nset ny 1,\nset f 1,\nset no 1,\neval,\noutput;\n\nset zx 0,\nset nx 0,\nset zy 0,\nset ny 0,\nset f 0,\nset no 0,\neval,\noutput;\n\nset zx 0,\nset nx 1,\nset zy 0,\nset ny 1,\nset f 0,\nset no 1,\neval,\noutput;\n\nset x %B101101110100000,\nset y %B001111011010010,\n\nset zx 1,\nset nx 0,\nset zy 1,\nset ny 0,\nset f 1,\nset no 0,\neval,\noutput;\n\nset zx 1,\nset nx 1,\nset zy 1,\nset ny 1,\nset f 1,\nset no 1,\neval,\noutput;\n\nset zx 1,\nset nx 1,\nset zy 1,\nset ny 0,\nset f 1,\nset no 0,\neval,\noutput;\n\nset zx 0,\nset nx 0,\nset zy 1,\nset ny 1,\nset f 0,\nset no 0,\neval,\noutput;\n\nset zx 1,\nset nx 1,\nset zy 0,\nset ny 0,\nset f 0,\nset no 0,\neval,\noutput;\n\nset zx 0,\nset nx 0,\nset zy 1,\nset ny 1,\nset f 0,\nset no 1,\neval,\noutput;\n\nset zx 1,\nset nx 1,\nset zy 0,\nset ny 0,\nset f 0,\nset no 1,\neval,\noutput;\n\nset zx 0,\nset nx 0,\nset zy 1,\nset ny 1,\nset f 1,\nset no 1,\neval,\noutput;\n\nset zx 1,\nset nx 1,\nset zy 0,\nset ny 0,\nset f 1,\nset no 1,\neval,\noutput;\n\nset zx 0,\nset nx 1,\nset zy 1,\nset ny 1,\nset f 1,\nset no 1,\neval,\noutput;\n\nset zx 1,\nset nx 1,\nset zy 0,\nset ny 1,\nset f 1,\nset no 1,\neval,\noutput;\n\nset zx 0,\nset nx 0,\nset zy 1,\nset ny 1,\nset f 1,\nset no 0,\neval,\noutput;\n\nset zx 1,\nset nx 1,\nset zy 0,\nset ny 0,\nset f 1,\nset no 0,\neval,\noutput;\n\nset zx 0,\nset nx 0,\nset zy 0,\nset ny 0,\nset f 1,\nset no 0,\neval,\noutput;\n\nset zx 0,\nset nx 1,\nset zy 0,\nset ny 0,\nset f 1,\nset no 1,\neval,\noutput;\n\nset zx 0,\nset nx 0,\nset zy 0,\nset ny 1,\nset f 1,\nset no 1,\neval,\noutput;\n\nset zx 0,\nset nx 0,\nset zy 0,\nset ny 0,\nset f 0,\nset no 0,\neval,\noutput;\n\nset zx 0,\nset nx 1,\nset zy 0,\nset ny 1,\nset f 0,\nset no 1,\neval,\noutput;","ALU-basic.cmp":"| x | y |zx |nx |zy |ny | f |no | out |\n| 0000000000000000 | 1111111111111111 | 1 | 0 | 1 | 0 | 1 | 0 | 0000000000000000 |\n| 0000000000000000 | 1111111111111111 | 1 | 1 | 1 | 1 | 1 | 1 | 0000000000000001 |\n| 0000000000000000 | 1111111111111111 | 1 | 1 | 1 | 0 | 1 | 0 | 1111111111111111 |\n| 0000000000000000 | 1111111111111111 | 0 | 0 | 1 | 1 | 0 | 0 | 0000000000000000 |\n| 0000000000000000 | 1111111111111111 | 1 | 1 | 0 | 0 | 0 | 0 | 1111111111111111 |\n| 0000000000000000 | 1111111111111111 | 0 | 0 | 1 | 1 | 0 | 1 | 1111111111111111 |\n| 0000000000000000 | 1111111111111111 | 1 | 1 | 0 | 0 | 0 | 1 | 0000000000000000 |\n| 0000000000000000 | 1111111111111111 | 0 | 0 | 1 | 1 | 1 | 1 | 0000000000000000 |\n| 0000000000000000 | 1111111111111111 | 1 | 1 | 0 | 0 | 1 | 1 | 0000000000000001 |\n| 0000000000000000 | 1111111111111111 | 0 | 1 | 1 | 1 | 1 | 1 | 0000000000000001 |\n| 0000000000000000 | 1111111111111111 | 1 | 1 | 0 | 1 | 1 | 1 | 0000000000000000 |\n| 0000000000000000 | 1111111111111111 | 0 | 0 | 1 | 1 | 1 | 0 | 1111111111111111 |\n| 0000000000000000 | 1111111111111111 | 1 | 1 | 0 | 0 | 1 | 0 | 1111111111111110 |\n| 0000000000000000 | 1111111111111111 | 0 | 0 | 0 | 0 | 1 | 0 | 1111111111111111 |\n| 0000000000000000 | 1111111111111111 | 0 | 1 | 0 | 0 | 1 | 1 | 0000000000000001 |\n| 0000000000000000 | 1111111111111111 | 0 | 0 | 0 | 1 | 1 | 1 | 1111111111111111 |\n| 0000000000000000 | 1111111111111111 | 0 | 0 | 0 | 0 | 0 | 0 | 0000000000000000 |\n| 0000000000000000 | 1111111111111111 | 0 | 1 | 0 | 1 | 0 | 1 | 1111111111111111 |\n| 0101101110100000 | 0001111011010010 | 1 | 0 | 1 | 0 | 1 | 0 | 0000000000000000 |\n| 0101101110100000 | 0001111011010010 | 1 | 1 | 1 | 1 | 1 | 1 | 0000000000000001 |\n| 0101101110100000 | 0001111011010010 | 1 | 1 | 1 | 0 | 1 | 0 | 1111111111111111 |\n| 0101101110100000 | 0001111011010010 | 0 | 0 | 1 | 1 | 0 | 0 | 0101101110100000 |\n| 0101101110100000 | 0001111011010010 | 1 | 1 | 0 | 0 | 0 | 0 | 0001111011010010 |\n| 0101101110100000 | 0001111011010010 | 0 | 0 | 1 | 1 | 0 | 1 | 1010010001011111 |\n| 0101101110100000 | 0001111011010010 | 1 | 1 | 0 | 0 | 0 | 1 | 1110000100101101 |\n| 0101101110100000 | 0001111011010010 | 0 | 0 | 1 | 1 | 1 | 1 | 1010010001100000 |\n| 0101101110100000 | 0001111011010010 | 1 | 1 | 0 | 0 | 1 | 1 | 1110000100101110 |\n| 0101101110100000 | 0001111011010010 | 0 | 1 | 1 | 1 | 1 | 1 | 0101101110100001 |\n| 0101101110100000 | 0001111011010010 | 1 | 1 | 0 | 1 | 1 | 1 | 0001111011010011 |\n| 0101101110100000 | 0001111011010010 | 0 | 0 | 1 | 1 | 1 | 0 | 0101101110011111 |\n| 0101101110100000 | 0001111011010010 | 1 | 1 | 0 | 0 | 1 | 0 | 0001111011010001 |\n| 0101101110100000 | 0001111011010010 | 0 | 0 | 0 | 0 | 1 | 0 | 0111101001110010 |\n| 0101101110100000 | 0001111011010010 | 0 | 1 | 0 | 0 | 1 | 1 | 0011110011001110 |\n| 0101101110100000 | 0001111011010010 | 0 | 0 | 0 | 1 | 1 | 1 | 1100001100110010 |\n| 0101101110100000 | 0001111011010010 | 0 | 0 | 0 | 0 | 0 | 0 | 0001101010000000 |\n| 0101101110100000 | 0001111011010010 | 0 | 1 | 0 | 1 | 0 | 1 | 0101111111110010 |"}},v={};async function f(n){await n.pushd("/projects/02"),await(0,r.cL)(n,m),await n.popd()}async function M(n){await n.pushd("/projects/02"),await c(n,m,".tst"),await c(n,m,".cmp"),await n.popd()}const y='// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/3/b/RAM16K.hdl\n/**\n * Memory of 16K 16-bit registers.\n * If load is asserted, the value of the register selected by\n * address is set to in; Otherwise, the value does not change.\n * The value of the selected register is emitted by out.\n */\nCHIP RAM16K {\n IN in[16], load, address[14];\n OUT out[16];\n\n PARTS:\n //// Replace this comment with your code.\n}',R={Bit:{"Bit.hdl":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/3/a/Bit.hdl\n/**\n * 1-bit register:\n * If load is asserted, the register\'s value is set to in;\n * Otherwise, the register maintains its current value:\n * if (load(t)) out(t+1) = in(t), else out(t+1) = out(t)\n */\nCHIP Bit {\n IN in, load;\n OUT out;\n\n PARTS:\n //// Replace this comment with your code.\n}',"Bit.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/3/a/Bit.tst\n\noutput-list time%S1.4.1 in load%B1.1.2 out;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;',"Bit.cmp":"| time |in |load|out|\n| 0+ | 0 | 0 | 0 |\n| 1 | 0 | 0 | 0 |\n| 1+ | 0 | 1 | 0 |\n| 2 | 0 | 1 | 0 |\n| 2+ | 1 | 0 | 0 |\n| 3 | 1 | 0 | 0 |\n| 3+ | 1 | 1 | 0 |\n| 4 | 1 | 1 | 1 |\n| 4+ | 0 | 0 | 1 |\n| 5 | 0 | 0 | 1 |\n| 5+ | 1 | 0 | 1 |\n| 6 | 1 | 0 | 1 |\n| 6+ | 0 | 1 | 1 |\n| 7 | 0 | 1 | 0 |\n| 7+ | 1 | 1 | 0 |\n| 8 | 1 | 1 | 1 |\n| 8+ | 0 | 0 | 1 |\n| 9 | 0 | 0 | 1 |\n| 9+ | 0 | 0 | 1 |\n| 10 | 0 | 0 | 1 |\n| 10+ | 0 | 0 | 1 |\n| 11 | 0 | 0 | 1 |\n| 11+ | 0 | 0 | 1 |\n| 12 | 0 | 0 | 1 |\n| 12+ | 0 | 0 | 1 |\n| 13 | 0 | 0 | 1 |\n| 13+ | 0 | 0 | 1 |\n| 14 | 0 | 0 | 1 |\n| 14+ | 0 | 0 | 1 |\n| 15 | 0 | 0 | 1 |\n| 15+ | 0 | 0 | 1 |\n| 16 | 0 | 0 | 1 |\n| 16+ | 0 | 0 | 1 |\n| 17 | 0 | 0 | 1 |\n| 17+ | 0 | 0 | 1 |\n| 18 | 0 | 0 | 1 |\n| 18+ | 0 | 0 | 1 |\n| 19 | 0 | 0 | 1 |\n| 19+ | 0 | 0 | 1 |\n| 20 | 0 | 0 | 1 |\n| 20+ | 0 | 0 | 1 |\n| 21 | 0 | 0 | 1 |\n| 21+ | 0 | 0 | 1 |\n| 22 | 0 | 0 | 1 |\n| 22+ | 0 | 0 | 1 |\n| 23 | 0 | 0 | 1 |\n| 23+ | 0 | 0 | 1 |\n| 24 | 0 | 0 | 1 |\n| 24+ | 0 | 0 | 1 |\n| 25 | 0 | 0 | 1 |\n| 25+ | 0 | 0 | 1 |\n| 26 | 0 | 0 | 1 |\n| 26+ | 0 | 0 | 1 |\n| 27 | 0 | 0 | 1 |\n| 27+ | 0 | 0 | 1 |\n| 28 | 0 | 0 | 1 |\n| 28+ | 0 | 0 | 1 |\n| 29 | 0 | 0 | 1 |\n| 29+ | 0 | 0 | 1 |\n| 30 | 0 | 0 | 1 |\n| 30+ | 0 | 0 | 1 |\n| 31 | 0 | 0 | 1 |\n| 31+ | 0 | 0 | 1 |\n| 32 | 0 | 0 | 1 |\n| 32+ | 0 | 0 | 1 |\n| 33 | 0 | 0 | 1 |\n| 33+ | 0 | 0 | 1 |\n| 34 | 0 | 0 | 1 |\n| 34+ | 0 | 0 | 1 |\n| 35 | 0 | 0 | 1 |\n| 35+ | 0 | 0 | 1 |\n| 36 | 0 | 0 | 1 |\n| 36+ | 0 | 0 | 1 |\n| 37 | 0 | 0 | 1 |\n| 37+ | 0 | 0 | 1 |\n| 38 | 0 | 0 | 1 |\n| 38+ | 0 | 0 | 1 |\n| 39 | 0 | 0 | 1 |\n| 39+ | 0 | 0 | 1 |\n| 40 | 0 | 0 | 1 |\n| 40+ | 0 | 0 | 1 |\n| 41 | 0 | 0 | 1 |\n| 41+ | 0 | 0 | 1 |\n| 42 | 0 | 0 | 1 |\n| 42+ | 0 | 0 | 1 |\n| 43 | 0 | 0 | 1 |\n| 43+ | 0 | 0 | 1 |\n| 44 | 0 | 0 | 1 |\n| 44+ | 0 | 0 | 1 |\n| 45 | 0 | 0 | 1 |\n| 45+ | 0 | 0 | 1 |\n| 46 | 0 | 0 | 1 |\n| 46+ | 0 | 0 | 1 |\n| 47 | 0 | 0 | 1 |\n| 47+ | 0 | 0 | 1 |\n| 48 | 0 | 0 | 1 |\n| 48+ | 0 | 0 | 1 |\n| 49 | 0 | 0 | 1 |\n| 49+ | 0 | 0 | 1 |\n| 50 | 0 | 0 | 1 |\n| 50+ | 0 | 0 | 1 |\n| 51 | 0 | 0 | 1 |\n| 51+ | 0 | 0 | 1 |\n| 52 | 0 | 0 | 1 |\n| 52+ | 0 | 0 | 1 |\n| 53 | 0 | 0 | 1 |\n| 53+ | 0 | 0 | 1 |\n| 54 | 0 | 0 | 1 |\n| 54+ | 0 | 0 | 1 |\n| 55 | 0 | 0 | 1 |\n| 55+ | 0 | 0 | 1 |\n| 56 | 0 | 0 | 1 |\n| 56+ | 0 | 0 | 1 |\n| 57 | 0 | 0 | 1 |\n| 57+ | 0 | 1 | 1 |\n| 58 | 0 | 1 | 0 |\n| 58+ | 1 | 0 | 0 |\n| 59 | 1 | 0 | 0 |\n| 59+ | 1 | 0 | 0 |\n| 60 | 1 | 0 | 0 |\n| 60+ | 1 | 0 | 0 |\n| 61 | 1 | 0 | 0 |\n| 61+ | 1 | 0 | 0 |\n| 62 | 1 | 0 | 0 |\n| 62+ | 1 | 0 | 0 |\n| 63 | 1 | 0 | 0 |\n| 63+ | 1 | 0 | 0 |\n| 64 | 1 | 0 | 0 |\n| 64+ | 1 | 0 | 0 |\n| 65 | 1 | 0 | 0 |\n| 65+ | 1 | 0 | 0 |\n| 66 | 1 | 0 | 0 |\n| 66+ | 1 | 0 | 0 |\n| 67 | 1 | 0 | 0 |\n| 67+ | 1 | 0 | 0 |\n| 68 | 1 | 0 | 0 |\n| 68+ | 1 | 0 | 0 |\n| 69 | 1 | 0 | 0 |\n| 69+ | 1 | 0 | 0 |\n| 70 | 1 | 0 | 0 |\n| 70+ | 1 | 0 | 0 |\n| 71 | 1 | 0 | 0 |\n| 71+ | 1 | 0 | 0 |\n| 72 | 1 | 0 | 0 |\n| 72+ | 1 | 0 | 0 |\n| 73 | 1 | 0 | 0 |\n| 73+ | 1 | 0 | 0 |\n| 74 | 1 | 0 | 0 |\n| 74+ | 1 | 0 | 0 |\n| 75 | 1 | 0 | 0 |\n| 75+ | 1 | 0 | 0 |\n| 76 | 1 | 0 | 0 |\n| 76+ | 1 | 0 | 0 |\n| 77 | 1 | 0 | 0 |\n| 77+ | 1 | 0 | 0 |\n| 78 | 1 | 0 | 0 |\n| 78+ | 1 | 0 | 0 |\n| 79 | 1 | 0 | 0 |\n| 79+ | 1 | 0 | 0 |\n| 80 | 1 | 0 | 0 |\n| 80+ | 1 | 0 | 0 |\n| 81 | 1 | 0 | 0 |\n| 81+ | 1 | 0 | 0 |\n| 82 | 1 | 0 | 0 |\n| 82+ | 1 | 0 | 0 |\n| 83 | 1 | 0 | 0 |\n| 83+ | 1 | 0 | 0 |\n| 84 | 1 | 0 | 0 |\n| 84+ | 1 | 0 | 0 |\n| 85 | 1 | 0 | 0 |\n| 85+ | 1 | 0 | 0 |\n| 86 | 1 | 0 | 0 |\n| 86+ | 1 | 0 | 0 |\n| 87 | 1 | 0 | 0 |\n| 87+ | 1 | 0 | 0 |\n| 88 | 1 | 0 | 0 |\n| 88+ | 1 | 0 | 0 |\n| 89 | 1 | 0 | 0 |\n| 89+ | 1 | 0 | 0 |\n| 90 | 1 | 0 | 0 |\n| 90+ | 1 | 0 | 0 |\n| 91 | 1 | 0 | 0 |\n| 91+ | 1 | 0 | 0 |\n| 92 | 1 | 0 | 0 |\n| 92+ | 1 | 0 | 0 |\n| 93 | 1 | 0 | 0 |\n| 93+ | 1 | 0 | 0 |\n| 94 | 1 | 0 | 0 |\n| 94+ | 1 | 0 | 0 |\n| 95 | 1 | 0 | 0 |\n| 95+ | 1 | 0 | 0 |\n| 96 | 1 | 0 | 0 |\n| 96+ | 1 | 0 | 0 |\n| 97 | 1 | 0 | 0 |\n| 97+ | 1 | 0 | 0 |\n| 98 | 1 | 0 | 0 |\n| 98+ | 1 | 0 | 0 |\n| 99 | 1 | 0 | 0 |\n| 99+ | 1 | 0 | 0 |\n| 100 | 1 | 0 | 0 |\n| 100+ | 1 | 0 | 0 |\n| 101 | 1 | 0 | 0 |\n| 101+ | 1 | 0 | 0 |\n| 102 | 1 | 0 | 0 |\n| 102+ | 1 | 0 | 0 |\n| 103 | 1 | 0 | 0 |\n| 103+ | 1 | 0 | 0 |\n| 104 | 1 | 0 | 0 |\n| 104+ | 1 | 0 | 0 |\n| 105 | 1 | 0 | 0 |\n| 105+ | 1 | 0 | 0 |\n| 106 | 1 | 0 | 0 |\n| 106+ | 1 | 0 | 0 |\n| 107 | 1 | 0 | 0 |"},Register:{"Register.hdl":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/3/a/Register.hdl\n/**\n * 16-bit register:\n * If load is asserted, the register\'s value is set to in;\n * Otherwise, the register maintains its current value:\n * if (load(t)) out(t+1) = int(t), else out(t+1) = out(t)\n */\nCHIP Register {\n IN in[16], load;\n OUT out[16];\n\n PARTS:\n //// Replace this comment with your code.\n}',"Register.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/3/a/Register.tst\n\noutput-list time%S1.3.1 in%D1.6.1 load%B2.1.1 out%D1.6.1;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in -32123,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 11111,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in -32123,\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in -32123,\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in -32123,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 12345,\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B0000000000000001,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B0000000000000010,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B0000000000000100,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B0000000000001000,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B0000000000010000,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B0000000000100000,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B0000000001000000,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B0000000010000000,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B0000000100000000,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B0000001000000000,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B0000010000000000,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B0000100000000000,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B0001000000000000,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B0010000000000000,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B0100000000000000,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B1000000000000000,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B1111111111111110,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B1111111111111101,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B1111111111111011,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B1111111111110111,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B1111111111101111,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B1111111111011111,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B1111111110111111,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B1111111101111111,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B1111111011111111,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B1111110111111111,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B1111101111111111,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B1111011111111111,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B1110111111111111,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B1101111111111111,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B1011111111111111,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B0111111111111111,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;',"Register.cmp":"|time | in |load| out |\n| 0+ | 0 | 0 | 0 |\n| 1 | 0 | 0 | 0 |\n| 1+ | 0 | 1 | 0 |\n| 2 | 0 | 1 | 0 |\n| 2+ | -32123 | 0 | 0 |\n| 3 | -32123 | 0 | 0 |\n| 3+ | 11111 | 0 | 0 |\n| 4 | 11111 | 0 | 0 |\n| 4+ | -32123 | 1 | 0 |\n| 5 | -32123 | 1 | -32123 |\n| 5+ | -32123 | 1 | -32123 |\n| 6 | -32123 | 1 | -32123 |\n| 6+ | -32123 | 0 | -32123 |\n| 7 | -32123 | 0 | -32123 |\n| 7+ | 12345 | 1 | -32123 |\n| 8 | 12345 | 1 | 12345 |\n| 8+ | 0 | 0 | 12345 |\n| 9 | 0 | 0 | 12345 |\n| 9+ | 0 | 1 | 12345 |\n| 10 | 0 | 1 | 0 |\n| 10+ | 1 | 0 | 0 |\n| 11 | 1 | 0 | 0 |\n| 11+ | 1 | 1 | 0 |\n| 12 | 1 | 1 | 1 |\n| 12+ | 2 | 0 | 1 |\n| 13 | 2 | 0 | 1 |\n| 13+ | 2 | 1 | 1 |\n| 14 | 2 | 1 | 2 |\n| 14+ | 4 | 0 | 2 |\n| 15 | 4 | 0 | 2 |\n| 15+ | 4 | 1 | 2 |\n| 16 | 4 | 1 | 4 |\n| 16+ | 8 | 0 | 4 |\n| 17 | 8 | 0 | 4 |\n| 17+ | 8 | 1 | 4 |\n| 18 | 8 | 1 | 8 |\n| 18+ | 16 | 0 | 8 |\n| 19 | 16 | 0 | 8 |\n| 19+ | 16 | 1 | 8 |\n| 20 | 16 | 1 | 16 |\n| 20+ | 32 | 0 | 16 |\n| 21 | 32 | 0 | 16 |\n| 21+ | 32 | 1 | 16 |\n| 22 | 32 | 1 | 32 |\n| 22+ | 64 | 0 | 32 |\n| 23 | 64 | 0 | 32 |\n| 23+ | 64 | 1 | 32 |\n| 24 | 64 | 1 | 64 |\n| 24+ | 128 | 0 | 64 |\n| 25 | 128 | 0 | 64 |\n| 25+ | 128 | 1 | 64 |\n| 26 | 128 | 1 | 128 |\n| 26+ | 256 | 0 | 128 |\n| 27 | 256 | 0 | 128 |\n| 27+ | 256 | 1 | 128 |\n| 28 | 256 | 1 | 256 |\n| 28+ | 512 | 0 | 256 |\n| 29 | 512 | 0 | 256 |\n| 29+ | 512 | 1 | 256 |\n| 30 | 512 | 1 | 512 |\n| 30+ | 1024 | 0 | 512 |\n| 31 | 1024 | 0 | 512 |\n| 31+ | 1024 | 1 | 512 |\n| 32 | 1024 | 1 | 1024 |\n| 32+ | 2048 | 0 | 1024 |\n| 33 | 2048 | 0 | 1024 |\n| 33+ | 2048 | 1 | 1024 |\n| 34 | 2048 | 1 | 2048 |\n| 34+ | 4096 | 0 | 2048 |\n| 35 | 4096 | 0 | 2048 |\n| 35+ | 4096 | 1 | 2048 |\n| 36 | 4096 | 1 | 4096 |\n| 36+ | 8192 | 0 | 4096 |\n| 37 | 8192 | 0 | 4096 |\n| 37+ | 8192 | 1 | 4096 |\n| 38 | 8192 | 1 | 8192 |\n| 38+ | 16384 | 0 | 8192 |\n| 39 | 16384 | 0 | 8192 |\n| 39+ | 16384 | 1 | 8192 |\n| 40 | 16384 | 1 | 16384 |\n| 40+ | -32768 | 0 | 16384 |\n| 41 | -32768 | 0 | 16384 |\n| 41+ | -32768 | 1 | 16384 |\n| 42 | -32768 | 1 | -32768 |\n| 42+ | -2 | 0 | -32768 |\n| 43 | -2 | 0 | -32768 |\n| 43+ | -2 | 1 | -32768 |\n| 44 | -2 | 1 | -2 |\n| 44+ | -3 | 0 | -2 |\n| 45 | -3 | 0 | -2 |\n| 45+ | -3 | 1 | -2 |\n| 46 | -3 | 1 | -3 |\n| 46+ | -5 | 0 | -3 |\n| 47 | -5 | 0 | -3 |\n| 47+ | -5 | 1 | -3 |\n| 48 | -5 | 1 | -5 |\n| 48+ | -9 | 0 | -5 |\n| 49 | -9 | 0 | -5 |\n| 49+ | -9 | 1 | -5 |\n| 50 | -9 | 1 | -9 |\n| 50+ | -17 | 0 | -9 |\n| 51 | -17 | 0 | -9 |\n| 51+ | -17 | 1 | -9 |\n| 52 | -17 | 1 | -17 |\n| 52+ | -33 | 0 | -17 |\n| 53 | -33 | 0 | -17 |\n| 53+ | -33 | 1 | -17 |\n| 54 | -33 | 1 | -33 |\n| 54+ | -65 | 0 | -33 |\n| 55 | -65 | 0 | -33 |\n| 55+ | -65 | 1 | -33 |\n| 56 | -65 | 1 | -65 |\n| 56+ | -129 | 0 | -65 |\n| 57 | -129 | 0 | -65 |\n| 57+ | -129 | 1 | -65 |\n| 58 | -129 | 1 | -129 |\n| 58+ | -257 | 0 | -129 |\n| 59 | -257 | 0 | -129 |\n| 59+ | -257 | 1 | -129 |\n| 60 | -257 | 1 | -257 |\n| 60+ | -513 | 0 | -257 |\n| 61 | -513 | 0 | -257 |\n| 61+ | -513 | 1 | -257 |\n| 62 | -513 | 1 | -513 |\n| 62+ | -1025 | 0 | -513 |\n| 63 | -1025 | 0 | -513 |\n| 63+ | -1025 | 1 | -513 |\n| 64 | -1025 | 1 | -1025 |\n| 64+ | -2049 | 0 | -1025 |\n| 65 | -2049 | 0 | -1025 |\n| 65+ | -2049 | 1 | -1025 |\n| 66 | -2049 | 1 | -2049 |\n| 66+ | -4097 | 0 | -2049 |\n| 67 | -4097 | 0 | -2049 |\n| 67+ | -4097 | 1 | -2049 |\n| 68 | -4097 | 1 | -4097 |\n| 68+ | -8193 | 0 | -4097 |\n| 69 | -8193 | 0 | -4097 |\n| 69+ | -8193 | 1 | -4097 |\n| 70 | -8193 | 1 | -8193 |\n| 70+ | -16385 | 0 | -8193 |\n| 71 | -16385 | 0 | -8193 |\n| 71+ | -16385 | 1 | -8193 |\n| 72 | -16385 | 1 | -16385 |\n| 72+ | 32767 | 0 | -16385 |\n| 73 | 32767 | 0 | -16385 |\n| 73+ | 32767 | 1 | -16385 |\n| 74 | 32767 | 1 | 32767 |"},PC:{"PC.hdl":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/3/a/PC.hdl\n/**\n * A 16-bit counter.\n * if reset(t): out(t+1) = 0\n * else if load(t): out(t+1) = in(t)\n * else if inc(t): out(t+1) = out(t) + 1\n * else out(t+1) = out(t)\n */\nCHIP PC {\n IN in[16], reset, load, inc;\n OUT out[16];\n \n PARTS:\n //// Replace this comment with your code.\n}',"PC.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/03/a/PC.tst\n\noutput-list time%S1.3.1 in%D1.6.1 reset%B2.1.2 load%B2.1.2 inc%B2.1.2 out%D1.6.1;\n\nset in 0,\nset reset 0,\nset load 0,\nset inc 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset inc 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in -32123,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\ntick,\noutput;\n\ntock,\noutput;\n\nset in 12345,\nset load 1,\nset inc 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset reset 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset reset 0,\nset inc 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset reset 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset reset 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset reset 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset reset 0,\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 0,\nset inc 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 22222,\nset reset 1,\nset inc 0,\ntick,\noutput;\n\ntock,\noutput;',"PC.cmp":"|time | in |reset|load | inc | out |\n| 0+ | 0 | 0 | 0 | 0 | 0 |\n| 1 | 0 | 0 | 0 | 0 | 0 |\n| 1+ | 0 | 0 | 0 | 1 | 0 |\n| 2 | 0 | 0 | 0 | 1 | 1 |\n| 2+ | -32123 | 0 | 0 | 1 | 1 |\n| 3 | -32123 | 0 | 0 | 1 | 2 |\n| 3+ | -32123 | 0 | 1 | 1 | 2 |\n| 4 | -32123 | 0 | 1 | 1 | -32123 |\n| 4+ | -32123 | 0 | 0 | 1 | -32123 |\n| 5 | -32123 | 0 | 0 | 1 | -32122 |\n| 5+ | -32123 | 0 | 0 | 1 | -32122 |\n| 6 | -32123 | 0 | 0 | 1 | -32121 |\n| 6+ | 12345 | 0 | 1 | 0 | -32121 |\n| 7 | 12345 | 0 | 1 | 0 | 12345 |\n| 7+ | 12345 | 1 | 1 | 0 | 12345 |\n| 8 | 12345 | 1 | 1 | 0 | 0 |\n| 8+ | 12345 | 0 | 1 | 1 | 0 |\n| 9 | 12345 | 0 | 1 | 1 | 12345 |\n| 9+ | 12345 | 1 | 1 | 1 | 12345 |\n| 10 | 12345 | 1 | 1 | 1 | 0 |\n| 10+ | 12345 | 0 | 0 | 1 | 0 |\n| 11 | 12345 | 0 | 0 | 1 | 1 |\n| 11+ | 12345 | 1 | 0 | 1 | 1 |\n| 12 | 12345 | 1 | 0 | 1 | 0 |\n| 12+ | 0 | 0 | 1 | 1 | 0 |\n| 13 | 0 | 0 | 1 | 1 | 0 |\n| 13+ | 0 | 0 | 0 | 1 | 0 |\n| 14 | 0 | 0 | 0 | 1 | 1 |\n| 14+ | 22222 | 1 | 0 | 0 | 1 |\n| 15 | 22222 | 1 | 0 | 0 | 0 |"},RAM8:{"RAM8.hdl":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/3/a/RAM8.hdl\n/**\n * Memory of eight 16-bit registers.\n * If load is asserted, the value of the register selected by\n * address is set to in; Otherwise, the value does not change.\n * The value of the selected register is emitted by out.\n */\nCHIP RAM8 {\n IN in[16], load, address[3];\n OUT out[16];\n\n PARTS:\n //// Replace this comment with your code.\n}',"RAM8.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/3/a/RAM8.tst\n\noutput-list time%S1.3.1 in%D1.6.1 load%B2.1.1 address%D3.1.3 out%D1.6.1;\n\nset in 0,\nset load 0,\nset address 0,\ntick,\noutput;\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\ntock,\noutput;\n\nset in 11111,\nset load 0,\ntick,\noutput;\ntock,\noutput;\n\nset load 1,\nset address 1,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address 0,\ntick,\noutput;\ntock,\noutput;\n\nset in 3333,\nset address 3,\ntick,\noutput;\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\ntick,\noutput;\ntock,\noutput;\n\nset address 1,\neval,\noutput;\n\nset in 7777,\ntick,\noutput;\ntock,\noutput;\n\nset load 1,\nset address 7,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\ntick,\noutput;\ntock,\noutput;\n\nset address 3,\neval,\noutput;\n\nset address 7,\neval,\noutput;\n\nset load 0,\nset address 0,\ntick,\noutput;\ntock,\noutput;\nset address 1,\neval,\noutput;\nset address 2,\neval,\noutput;\nset address 3,\neval,\noutput;\nset address 4,\neval,\noutput;\nset address 5,\neval,\noutput;\nset address 6,\neval,\noutput;\nset address 7,\neval,\noutput;\n\nset load 1,\nset in %B0101010101010101,\nset address 0,\ntick,\noutput;\ntock,\noutput;\nset address 1,\ntick,\noutput,\ntock,\noutput;\nset address 2,\ntick,\noutput,\ntock,\noutput;\nset address 3,\ntick,\noutput,\ntock,\noutput;\nset address 4,\ntick,\noutput,\ntock,\noutput;\nset address 5,\ntick,\noutput,\ntock,\noutput;\nset address 6,\ntick,\noutput,\ntock,\noutput;\nset address 7,\ntick,\noutput,\ntock,\noutput;\n\nset load 0,\nset address 0,\ntick,\noutput;\ntock,\noutput;\nset address 1,\neval,\noutput;\nset address 2,\neval,\noutput;\nset address 3,\neval,\noutput;\nset address 4,\neval,\noutput;\nset address 5,\neval,\noutput;\nset address 6,\neval,\noutput;\nset address 7,\neval,\noutput;\n\nset load 1,\nset address 0,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address 0,\ntick,\noutput;\ntock,\noutput;\nset address 1,\neval,\noutput;\nset address 2,\neval,\noutput;\nset address 3,\neval,\noutput;\nset address 4,\neval,\noutput;\nset address 5,\neval,\noutput;\nset address 6,\neval,\noutput;\nset address 7,\neval,\noutput;\n\nset load 1,\nset address 0,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address 1,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address 0,\ntick,\noutput;\ntock,\noutput;\nset address 1,\neval,\noutput;\nset address 2,\neval,\noutput;\nset address 3,\neval,\noutput;\nset address 4,\neval,\noutput;\nset address 5,\neval,\noutput;\nset address 6,\neval,\noutput;\nset address 7,\neval,\noutput;\n\nset load 1,\nset address 1,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address 2,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address 0,\ntick,\noutput;\ntock,\noutput;\nset address 1,\neval,\noutput;\nset address 2,\neval,\noutput;\nset address 3,\neval,\noutput;\nset address 4,\neval,\noutput;\nset address 5,\neval,\noutput;\nset address 6,\neval,\noutput;\nset address 7,\neval,\noutput;\n\nset load 1,\nset address 2,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address 3,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address 0,\ntick,\noutput;\ntock,\noutput;\nset address 1,\neval,\noutput;\nset address 2,\neval,\noutput;\nset address 3,\neval,\noutput;\nset address 4,\neval,\noutput;\nset address 5,\neval,\noutput;\nset address 6,\neval,\noutput;\nset address 7,\neval,\noutput;\n\nset load 1,\nset address 3,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address 4,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address 0,\ntick,\noutput;\ntock,\noutput;\nset address 1,\neval,\noutput;\nset address 2,\neval,\noutput;\nset address 3,\neval,\noutput;\nset address 4,\neval,\noutput;\nset address 5,\neval,\noutput;\nset address 6,\neval,\noutput;\nset address 7,\neval,\noutput;\n\nset load 1,\nset address 4,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address 5,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address 0,\ntick,\noutput;\ntock,\noutput;\nset address 1,\neval,\noutput;\nset address 2,\neval,\noutput;\nset address 3,\neval,\noutput;\nset address 4,\neval,\noutput;\nset address 5,\neval,\noutput;\nset address 6,\neval,\noutput;\nset address 7,\neval,\noutput;\n\nset load 1,\nset address 5,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address 6,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address 0,\ntick,\noutput;\ntock,\noutput;\nset address 1,\neval,\noutput;\nset address 2,\neval,\noutput;\nset address 3,\neval,\noutput;\nset address 4,\neval,\noutput;\nset address 5,\neval,\noutput;\nset address 6,\neval,\noutput;\nset address 7,\neval,\noutput;\n\nset load 1,\nset address 6,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address 7,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address 0,\ntick,\noutput;\ntock,\noutput;\nset address 1,\neval,\noutput;\nset address 2,\neval,\noutput;\nset address 3,\neval,\noutput;\nset address 4,\neval,\noutput;\nset address 5,\neval,\noutput;\nset address 6,\neval,\noutput;\nset address 7,\neval,\noutput;\n\nset load 1,\nset address 7,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\n\nset load 0,\nset address 0,\ntick,\noutput;\ntock,\noutput;\nset address 1,\neval,\noutput;\nset address 2,\neval,\noutput;\nset address 3,\neval,\noutput;\nset address 4,\neval,\noutput;\nset address 5,\neval,\noutput;\nset address 6,\neval,\noutput;\nset address 7,\neval,\noutput;\n',"RAM8.cmp":"|time | in |load|address| out |\n| 0+ | 0 | 0 | 0 | 0 |\n| 1 | 0 | 0 | 0 | 0 |\n| 1+ | 0 | 1 | 0 | 0 |\n| 2 | 0 | 1 | 0 | 0 |\n| 2+ | 11111 | 0 | 0 | 0 |\n| 3 | 11111 | 0 | 0 | 0 |\n| 3+ | 11111 | 1 | 1 | 0 |\n| 4 | 11111 | 1 | 1 | 11111 |\n| 4+ | 11111 | 0 | 0 | 0 |\n| 5 | 11111 | 0 | 0 | 0 |\n| 5+ | 3333 | 0 | 3 | 0 |\n| 6 | 3333 | 0 | 3 | 0 |\n| 6+ | 3333 | 1 | 3 | 0 |\n| 7 | 3333 | 1 | 3 | 3333 |\n| 7+ | 3333 | 0 | 3 | 3333 |\n| 8 | 3333 | 0 | 3 | 3333 |\n| 8 | 3333 | 0 | 1 | 11111 |\n| 8+ | 7777 | 0 | 1 | 11111 |\n| 9 | 7777 | 0 | 1 | 11111 |\n| 9+ | 7777 | 1 | 7 | 0 |\n| 10 | 7777 | 1 | 7 | 7777 |\n| 10+ | 7777 | 0 | 7 | 7777 |\n| 11 | 7777 | 0 | 7 | 7777 |\n| 11 | 7777 | 0 | 3 | 3333 |\n| 11 | 7777 | 0 | 7 | 7777 |\n| 11+ | 7777 | 0 | 0 | 0 |\n| 12 | 7777 | 0 | 0 | 0 |\n| 12 | 7777 | 0 | 1 | 11111 |\n| 12 | 7777 | 0 | 2 | 0 |\n| 12 | 7777 | 0 | 3 | 3333 |\n| 12 | 7777 | 0 | 4 | 0 |\n| 12 | 7777 | 0 | 5 | 0 |\n| 12 | 7777 | 0 | 6 | 0 |\n| 12 | 7777 | 0 | 7 | 7777 |\n| 12+ | 21845 | 1 | 0 | 0 |\n| 13 | 21845 | 1 | 0 | 21845 |\n| 13+ | 21845 | 1 | 1 | 11111 |\n| 14 | 21845 | 1 | 1 | 21845 |\n| 14+ | 21845 | 1 | 2 | 0 |\n| 15 | 21845 | 1 | 2 | 21845 |\n| 15+ | 21845 | 1 | 3 | 3333 |\n| 16 | 21845 | 1 | 3 | 21845 |\n| 16+ | 21845 | 1 | 4 | 0 |\n| 17 | 21845 | 1 | 4 | 21845 |\n| 17+ | 21845 | 1 | 5 | 0 |\n| 18 | 21845 | 1 | 5 | 21845 |\n| 18+ | 21845 | 1 | 6 | 0 |\n| 19 | 21845 | 1 | 6 | 21845 |\n| 19+ | 21845 | 1 | 7 | 7777 |\n| 20 | 21845 | 1 | 7 | 21845 |\n| 20+ | 21845 | 0 | 0 | 21845 |\n| 21 | 21845 | 0 | 0 | 21845 |\n| 21 | 21845 | 0 | 1 | 21845 |\n| 21 | 21845 | 0 | 2 | 21845 |\n| 21 | 21845 | 0 | 3 | 21845 |\n| 21 | 21845 | 0 | 4 | 21845 |\n| 21 | 21845 | 0 | 5 | 21845 |\n| 21 | 21845 | 0 | 6 | 21845 |\n| 21 | 21845 | 0 | 7 | 21845 |\n| 21+ | -21846 | 1 | 0 | 21845 |\n| 22 | -21846 | 1 | 0 | -21846 |\n| 22+ | -21846 | 0 | 0 | -21846 |\n| 23 | -21846 | 0 | 0 | -21846 |\n| 23 | -21846 | 0 | 1 | 21845 |\n| 23 | -21846 | 0 | 2 | 21845 |\n| 23 | -21846 | 0 | 3 | 21845 |\n| 23 | -21846 | 0 | 4 | 21845 |\n| 23 | -21846 | 0 | 5 | 21845 |\n| 23 | -21846 | 0 | 6 | 21845 |\n| 23 | -21846 | 0 | 7 | 21845 |\n| 23+ | 21845 | 1 | 0 | -21846 |\n| 24 | 21845 | 1 | 0 | 21845 |\n| 24+ | -21846 | 1 | 1 | 21845 |\n| 25 | -21846 | 1 | 1 | -21846 |\n| 25+ | -21846 | 0 | 0 | 21845 |\n| 26 | -21846 | 0 | 0 | 21845 |\n| 26 | -21846 | 0 | 1 | -21846 |\n| 26 | -21846 | 0 | 2 | 21845 |\n| 26 | -21846 | 0 | 3 | 21845 |\n| 26 | -21846 | 0 | 4 | 21845 |\n| 26 | -21846 | 0 | 5 | 21845 |\n| 26 | -21846 | 0 | 6 | 21845 |\n| 26 | -21846 | 0 | 7 | 21845 |\n| 26+ | 21845 | 1 | 1 | -21846 |\n| 27 | 21845 | 1 | 1 | 21845 |\n| 27+ | -21846 | 1 | 2 | 21845 |\n| 28 | -21846 | 1 | 2 | -21846 |\n| 28+ | -21846 | 0 | 0 | 21845 |\n| 29 | -21846 | 0 | 0 | 21845 |\n| 29 | -21846 | 0 | 1 | 21845 |\n| 29 | -21846 | 0 | 2 | -21846 |\n| 29 | -21846 | 0 | 3 | 21845 |\n| 29 | -21846 | 0 | 4 | 21845 |\n| 29 | -21846 | 0 | 5 | 21845 |\n| 29 | -21846 | 0 | 6 | 21845 |\n| 29 | -21846 | 0 | 7 | 21845 |\n| 29+ | 21845 | 1 | 2 | -21846 |\n| 30 | 21845 | 1 | 2 | 21845 |\n| 30+ | -21846 | 1 | 3 | 21845 |\n| 31 | -21846 | 1 | 3 | -21846 |\n| 31+ | -21846 | 0 | 0 | 21845 |\n| 32 | -21846 | 0 | 0 | 21845 |\n| 32 | -21846 | 0 | 1 | 21845 |\n| 32 | -21846 | 0 | 2 | 21845 |\n| 32 | -21846 | 0 | 3 | -21846 |\n| 32 | -21846 | 0 | 4 | 21845 |\n| 32 | -21846 | 0 | 5 | 21845 |\n| 32 | -21846 | 0 | 6 | 21845 |\n| 32 | -21846 | 0 | 7 | 21845 |\n| 32+ | 21845 | 1 | 3 | -21846 |\n| 33 | 21845 | 1 | 3 | 21845 |\n| 33+ | -21846 | 1 | 4 | 21845 |\n| 34 | -21846 | 1 | 4 | -21846 |\n| 34+ | -21846 | 0 | 0 | 21845 |\n| 35 | -21846 | 0 | 0 | 21845 |\n| 35 | -21846 | 0 | 1 | 21845 |\n| 35 | -21846 | 0 | 2 | 21845 |\n| 35 | -21846 | 0 | 3 | 21845 |\n| 35 | -21846 | 0 | 4 | -21846 |\n| 35 | -21846 | 0 | 5 | 21845 |\n| 35 | -21846 | 0 | 6 | 21845 |\n| 35 | -21846 | 0 | 7 | 21845 |\n| 35+ | 21845 | 1 | 4 | -21846 |\n| 36 | 21845 | 1 | 4 | 21845 |\n| 36+ | -21846 | 1 | 5 | 21845 |\n| 37 | -21846 | 1 | 5 | -21846 |\n| 37+ | -21846 | 0 | 0 | 21845 |\n| 38 | -21846 | 0 | 0 | 21845 |\n| 38 | -21846 | 0 | 1 | 21845 |\n| 38 | -21846 | 0 | 2 | 21845 |\n| 38 | -21846 | 0 | 3 | 21845 |\n| 38 | -21846 | 0 | 4 | 21845 |\n| 38 | -21846 | 0 | 5 | -21846 |\n| 38 | -21846 | 0 | 6 | 21845 |\n| 38 | -21846 | 0 | 7 | 21845 |\n| 38+ | 21845 | 1 | 5 | -21846 |\n| 39 | 21845 | 1 | 5 | 21845 |\n| 39+ | -21846 | 1 | 6 | 21845 |\n| 40 | -21846 | 1 | 6 | -21846 |\n| 40+ | -21846 | 0 | 0 | 21845 |\n| 41 | -21846 | 0 | 0 | 21845 |\n| 41 | -21846 | 0 | 1 | 21845 |\n| 41 | -21846 | 0 | 2 | 21845 |\n| 41 | -21846 | 0 | 3 | 21845 |\n| 41 | -21846 | 0 | 4 | 21845 |\n| 41 | -21846 | 0 | 5 | 21845 |\n| 41 | -21846 | 0 | 6 | -21846 |\n| 41 | -21846 | 0 | 7 | 21845 |\n| 41+ | 21845 | 1 | 6 | -21846 |\n| 42 | 21845 | 1 | 6 | 21845 |\n| 42+ | -21846 | 1 | 7 | 21845 |\n| 43 | -21846 | 1 | 7 | -21846 |\n| 43+ | -21846 | 0 | 0 | 21845 |\n| 44 | -21846 | 0 | 0 | 21845 |\n| 44 | -21846 | 0 | 1 | 21845 |\n| 44 | -21846 | 0 | 2 | 21845 |\n| 44 | -21846 | 0 | 3 | 21845 |\n| 44 | -21846 | 0 | 4 | 21845 |\n| 44 | -21846 | 0 | 5 | 21845 |\n| 44 | -21846 | 0 | 6 | 21845 |\n| 44 | -21846 | 0 | 7 | -21846 |\n| 44+ | 21845 | 1 | 7 | -21846 |\n| 45 | 21845 | 1 | 7 | 21845 |\n| 45+ | 21845 | 0 | 0 | 21845 |\n| 46 | 21845 | 0 | 0 | 21845 |\n| 46 | 21845 | 0 | 1 | 21845 |\n| 46 | 21845 | 0 | 2 | 21845 |\n| 46 | 21845 | 0 | 3 | 21845 |\n| 46 | 21845 | 0 | 4 | 21845 |\n| 46 | 21845 | 0 | 5 | 21845 |\n| 46 | 21845 | 0 | 6 | 21845 |\n| 46 | 21845 | 0 | 7 | 21845 |"},RAM64:{"RAM64.hdl":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/3/a/RAM64.hdl\n/**\n * Memory of sixty four 16-bit registers.\n * If load is asserted, the value of the register selected by\n * address is set to in; Otherwise, the value does not change.\n * The value of the selected register is emitted by out.\n */\nCHIP RAM64 {\n IN in[16], load, address[6];\n OUT out[16];\n\n PARTS:\n //// Replace this comment with your code.\n}',"RAM64.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/3/a/RAM64.tst\n\noutput-list time%S1.3.1 in%D1.6.1 load%B2.1.1 address%D2.3.2 out%D1.6.1;\n\nset in 0,\nset load 0,\nset address 0,\ntick,\noutput;\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\ntock,\noutput;\n\nset in 1313,\nset load 0,\ntick,\noutput;\ntock,\noutput;\n\nset load 1,\nset address 13,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address 0,\ntick,\noutput;\ntock,\noutput;\n\nset in 4747,\nset address 47,\ntick,\noutput;\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\ntick,\noutput;\ntock,\noutput;\n\nset address 13,\neval,\noutput;\n\nset in 6363,\ntick,\noutput;\ntock,\noutput;\n\nset load 1,\nset address 63,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\ntick,\noutput;\ntock,\noutput;\n\nset address 47,\neval,\noutput;\n\nset address 63,\neval,\noutput;\n\n\nset load 0,\nset address %B101000,\ntick,\noutput;\ntock,\noutput;\nset address %B101001,\neval,\noutput;\nset address %B101010,\neval,\noutput;\nset address %B101011,\neval,\noutput;\nset address %B101100,\neval,\noutput;\nset address %B101101,\neval,\noutput;\nset address %B101110,\neval,\noutput;\nset address %B101111,\neval,\noutput;\n\nset load 1,\nset in %B0101010101010101,\nset address %B101000,\ntick,\noutput;\ntock,\noutput;\nset address %B101001,\ntick,\noutput,\ntock,\noutput;\nset address %B101010,\ntick,\noutput,\ntock,\noutput;\nset address %B101011,\ntick,\noutput,\ntock,\noutput;\nset address %B101100,\ntick,\noutput,\ntock,\noutput;\nset address %B101101,\ntick,\noutput,\ntock,\noutput;\nset address %B101110,\ntick,\noutput,\ntock,\noutput;\nset address %B101111,\ntick,\noutput,\ntock,\noutput;\n\nset load 0,\nset address %B101000,\ntick,\noutput;\ntock,\noutput;\nset address %B101001,\neval,\noutput;\nset address %B101010,\neval,\noutput;\nset address %B101011,\neval,\noutput;\nset address %B101100,\neval,\noutput;\nset address %B101101,\neval,\noutput;\nset address %B101110,\neval,\noutput;\nset address %B101111,\neval,\noutput;\n\nset load 1,\nset address %B101000,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B101000,\ntick,\noutput;\ntock,\noutput;\nset address %B101001,\neval,\noutput;\nset address %B101010,\neval,\noutput;\nset address %B101011,\neval,\noutput;\nset address %B101100,\neval,\noutput;\nset address %B101101,\neval,\noutput;\nset address %B101110,\neval,\noutput;\nset address %B101111,\neval,\noutput;\n\nset load 1,\nset address %B101000,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B101001,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B101000,\ntick,\noutput;\ntock,\noutput;\nset address %B101001,\neval,\noutput;\nset address %B101010,\neval,\noutput;\nset address %B101011,\neval,\noutput;\nset address %B101100,\neval,\noutput;\nset address %B101101,\neval,\noutput;\nset address %B101110,\neval,\noutput;\nset address %B101111,\neval,\noutput;\n\nset load 1,\nset address %B101001,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B101010,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B101000,\ntick,\noutput;\ntock,\noutput;\nset address %B101001,\neval,\noutput;\nset address %B101010,\neval,\noutput;\nset address %B101011,\neval,\noutput;\nset address %B101100,\neval,\noutput;\nset address %B101101,\neval,\noutput;\nset address %B101110,\neval,\noutput;\nset address %B101111,\neval,\noutput;\n\nset load 1,\nset address %B101010,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B101011,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B101000,\ntick,\noutput;\ntock,\noutput;\nset address %B101001,\neval,\noutput;\nset address %B101010,\neval,\noutput;\nset address %B101011,\neval,\noutput;\nset address %B101100,\neval,\noutput;\nset address %B101101,\neval,\noutput;\nset address %B101110,\neval,\noutput;\nset address %B101111,\neval,\noutput;\n\nset load 1,\nset address %B101011,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B101100,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B101000,\ntick,\noutput;\ntock,\noutput;\nset address %B101001,\neval,\noutput;\nset address %B101010,\neval,\noutput;\nset address %B101011,\neval,\noutput;\nset address %B101100,\neval,\noutput;\nset address %B101101,\neval,\noutput;\nset address %B101110,\neval,\noutput;\nset address %B101111,\neval,\noutput;\n\nset load 1,\nset address %B101100,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B101101,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B101000,\ntick,\noutput;\ntock,\noutput;\nset address %B101001,\neval,\noutput;\nset address %B101010,\neval,\noutput;\nset address %B101011,\neval,\noutput;\nset address %B101100,\neval,\noutput;\nset address %B101101,\neval,\noutput;\nset address %B101110,\neval,\noutput;\nset address %B101111,\neval,\noutput;\n\nset load 1,\nset address %B101101,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B101110,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B101000,\ntick,\noutput;\ntock,\noutput;\nset address %B101001,\neval,\noutput;\nset address %B101010,\neval,\noutput;\nset address %B101011,\neval,\noutput;\nset address %B101100,\neval,\noutput;\nset address %B101101,\neval,\noutput;\nset address %B101110,\neval,\noutput;\nset address %B101111,\neval,\noutput;\n\nset load 1,\nset address %B101110,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B101111,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B101000,\ntick,\noutput;\ntock,\noutput;\nset address %B101001,\neval,\noutput;\nset address %B101010,\neval,\noutput;\nset address %B101011,\neval,\noutput;\nset address %B101100,\neval,\noutput;\nset address %B101101,\neval,\noutput;\nset address %B101110,\neval,\noutput;\nset address %B101111,\neval,\noutput;\n\nset load 1,\nset address %B101111,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\n\nset load 0,\nset address %B101000,\ntick,\noutput;\ntock,\noutput;\nset address %B101001,\neval,\noutput;\nset address %B101010,\neval,\noutput;\nset address %B101011,\neval,\noutput;\nset address %B101100,\neval,\noutput;\nset address %B101101,\neval,\noutput;\nset address %B101110,\neval,\noutput;\nset address %B101111,\neval,\noutput;\n\n\nset load 0,\nset address %B000101,\ntick,\noutput;\ntock,\noutput;\nset address %B001101,\neval,\noutput;\nset address %B010101,\neval,\noutput;\nset address %B011101,\neval,\noutput;\nset address %B100101,\neval,\noutput;\nset address %B101101,\neval,\noutput;\nset address %B110101,\neval,\noutput;\nset address %B111101,\neval,\noutput;\n\nset load 1,\nset in %B0101010101010101,\nset address %B000101,\ntick,\noutput;\ntock,\noutput;\nset address %B001101,\ntick,\noutput,\ntock,\noutput;\nset address %B010101,\ntick,\noutput,\ntock,\noutput;\nset address %B011101,\ntick,\noutput,\ntock,\noutput;\nset address %B100101,\ntick,\noutput,\ntock,\noutput;\nset address %B101101,\ntick,\noutput,\ntock,\noutput;\nset address %B110101,\ntick,\noutput,\ntock,\noutput;\nset address %B111101,\ntick,\noutput,\ntock,\noutput;\n\nset load 0,\nset address %B000101,\ntick,\noutput;\ntock,\noutput;\nset address %B001101,\neval,\noutput;\nset address %B010101,\neval,\noutput;\nset address %B011101,\neval,\noutput;\nset address %B100101,\neval,\noutput;\nset address %B101101,\neval,\noutput;\nset address %B110101,\neval,\noutput;\nset address %B111101,\neval,\noutput;\n\nset load 1,\nset address %B000101,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B000101,\ntick,\noutput;\ntock,\noutput;\nset address %B001101,\neval,\noutput;\nset address %B010101,\neval,\noutput;\nset address %B011101,\neval,\noutput;\nset address %B100101,\neval,\noutput;\nset address %B101101,\neval,\noutput;\nset address %B110101,\neval,\noutput;\nset address %B111101,\neval,\noutput;\n\nset load 1,\nset address %B000101,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B001101,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B000101,\ntick,\noutput;\ntock,\noutput;\nset address %B001101,\neval,\noutput;\nset address %B010101,\neval,\noutput;\nset address %B011101,\neval,\noutput;\nset address %B100101,\neval,\noutput;\nset address %B101101,\neval,\noutput;\nset address %B110101,\neval,\noutput;\nset address %B111101,\neval,\noutput;\n\nset load 1,\nset address %B001101,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B010101,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B000101,\ntick,\noutput;\ntock,\noutput;\nset address %B001101,\neval,\noutput;\nset address %B010101,\neval,\noutput;\nset address %B011101,\neval,\noutput;\nset address %B100101,\neval,\noutput;\nset address %B101101,\neval,\noutput;\nset address %B110101,\neval,\noutput;\nset address %B111101,\neval,\noutput;\n\nset load 1,\nset address %B010101,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B011101,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B000101,\ntick,\noutput;\ntock,\noutput;\nset address %B001101,\neval,\noutput;\nset address %B010101,\neval,\noutput;\nset address %B011101,\neval,\noutput;\nset address %B100101,\neval,\noutput;\nset address %B101101,\neval,\noutput;\nset address %B110101,\neval,\noutput;\nset address %B111101,\neval,\noutput;\n\nset load 1,\nset address %B011101,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B100101,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B000101,\ntick,\noutput;\ntock,\noutput;\nset address %B001101,\neval,\noutput;\nset address %B010101,\neval,\noutput;\nset address %B011101,\neval,\noutput;\nset address %B100101,\neval,\noutput;\nset address %B101101,\neval,\noutput;\nset address %B110101,\neval,\noutput;\nset address %B111101,\neval,\noutput;\n\nset load 1,\nset address %B100101,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B101101,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B000101,\ntick,\noutput;\ntock,\noutput;\nset address %B001101,\neval,\noutput;\nset address %B010101,\neval,\noutput;\nset address %B011101,\neval,\noutput;\nset address %B100101,\neval,\noutput;\nset address %B101101,\neval,\noutput;\nset address %B110101,\neval,\noutput;\nset address %B111101,\neval,\noutput;\n\nset load 1,\nset address %B101101,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B110101,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B000101,\ntick,\noutput;\ntock,\noutput;\nset address %B001101,\neval,\noutput;\nset address %B010101,\neval,\noutput;\nset address %B011101,\neval,\noutput;\nset address %B100101,\neval,\noutput;\nset address %B101101,\neval,\noutput;\nset address %B110101,\neval,\noutput;\nset address %B111101,\neval,\noutput;\n\nset load 1,\nset address %B110101,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B111101,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B000101,\ntick,\noutput;\ntock,\noutput;\nset address %B001101,\neval,\noutput;\nset address %B010101,\neval,\noutput;\nset address %B011101,\neval,\noutput;\nset address %B100101,\neval,\noutput;\nset address %B101101,\neval,\noutput;\nset address %B110101,\neval,\noutput;\nset address %B111101,\neval,\noutput;\n\nset load 1,\nset address %B111101,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\n\nset load 0,\nset address %B000101,\ntick,\noutput;\ntock,\noutput;\nset address %B001101,\neval,\noutput;\nset address %B010101,\neval,\noutput;\nset address %B011101,\neval,\noutput;\nset address %B100101,\neval,\noutput;\nset address %B101101,\neval,\noutput;\nset address %B110101,\neval,\noutput;\nset address %B111101,\neval,\noutput;',"RAM64.cmp":"|time | in |load|address| out |\n| 0+ | 0 | 0 | 0 | 0 |\n| 1 | 0 | 0 | 0 | 0 |\n| 1+ | 0 | 1 | 0 | 0 |\n| 2 | 0 | 1 | 0 | 0 |\n| 2+ | 1313 | 0 | 0 | 0 |\n| 3 | 1313 | 0 | 0 | 0 |\n| 3+ | 1313 | 1 | 13 | 0 |\n| 4 | 1313 | 1 | 13 | 1313 |\n| 4+ | 1313 | 0 | 0 | 0 |\n| 5 | 1313 | 0 | 0 | 0 |\n| 5+ | 4747 | 0 | 47 | 0 |\n| 6 | 4747 | 0 | 47 | 0 |\n| 6+ | 4747 | 1 | 47 | 0 |\n| 7 | 4747 | 1 | 47 | 4747 |\n| 7+ | 4747 | 0 | 47 | 4747 |\n| 8 | 4747 | 0 | 47 | 4747 |\n| 8 | 4747 | 0 | 13 | 1313 |\n| 8+ | 6363 | 0 | 13 | 1313 |\n| 9 | 6363 | 0 | 13 | 1313 |\n| 9+ | 6363 | 1 | 63 | 0 |\n| 10 | 6363 | 1 | 63 | 6363 |\n| 10+ | 6363 | 0 | 63 | 6363 |\n| 11 | 6363 | 0 | 63 | 6363 |\n| 11 | 6363 | 0 | 47 | 4747 |\n| 11 | 6363 | 0 | 63 | 6363 |\n| 11+ | 6363 | 0 | 40 | 0 |\n| 12 | 6363 | 0 | 40 | 0 |\n| 12 | 6363 | 0 | 41 | 0 |\n| 12 | 6363 | 0 | 42 | 0 |\n| 12 | 6363 | 0 | 43 | 0 |\n| 12 | 6363 | 0 | 44 | 0 |\n| 12 | 6363 | 0 | 45 | 0 |\n| 12 | 6363 | 0 | 46 | 0 |\n| 12 | 6363 | 0 | 47 | 4747 |\n| 12+ | 21845 | 1 | 40 | 0 |\n| 13 | 21845 | 1 | 40 | 21845 |\n| 13+ | 21845 | 1 | 41 | 0 |\n| 14 | 21845 | 1 | 41 | 21845 |\n| 14+ | 21845 | 1 | 42 | 0 |\n| 15 | 21845 | 1 | 42 | 21845 |\n| 15+ | 21845 | 1 | 43 | 0 |\n| 16 | 21845 | 1 | 43 | 21845 |\n| 16+ | 21845 | 1 | 44 | 0 |\n| 17 | 21845 | 1 | 44 | 21845 |\n| 17+ | 21845 | 1 | 45 | 0 |\n| 18 | 21845 | 1 | 45 | 21845 |\n| 18+ | 21845 | 1 | 46 | 0 |\n| 19 | 21845 | 1 | 46 | 21845 |\n| 19+ | 21845 | 1 | 47 | 4747 |\n| 20 | 21845 | 1 | 47 | 21845 |\n| 20+ | 21845 | 0 | 40 | 21845 |\n| 21 | 21845 | 0 | 40 | 21845 |\n| 21 | 21845 | 0 | 41 | 21845 |\n| 21 | 21845 | 0 | 42 | 21845 |\n| 21 | 21845 | 0 | 43 | 21845 |\n| 21 | 21845 | 0 | 44 | 21845 |\n| 21 | 21845 | 0 | 45 | 21845 |\n| 21 | 21845 | 0 | 46 | 21845 |\n| 21 | 21845 | 0 | 47 | 21845 |\n| 21+ | -21846 | 1 | 40 | 21845 |\n| 22 | -21846 | 1 | 40 | -21846 |\n| 22+ | -21846 | 0 | 40 | -21846 |\n| 23 | -21846 | 0 | 40 | -21846 |\n| 23 | -21846 | 0 | 41 | 21845 |\n| 23 | -21846 | 0 | 42 | 21845 |\n| 23 | -21846 | 0 | 43 | 21845 |\n| 23 | -21846 | 0 | 44 | 21845 |\n| 23 | -21846 | 0 | 45 | 21845 |\n| 23 | -21846 | 0 | 46 | 21845 |\n| 23 | -21846 | 0 | 47 | 21845 |\n| 23+ | 21845 | 1 | 40 | -21846 |\n| 24 | 21845 | 1 | 40 | 21845 |\n| 24+ | -21846 | 1 | 41 | 21845 |\n| 25 | -21846 | 1 | 41 | -21846 |\n| 25+ | -21846 | 0 | 40 | 21845 |\n| 26 | -21846 | 0 | 40 | 21845 |\n| 26 | -21846 | 0 | 41 | -21846 |\n| 26 | -21846 | 0 | 42 | 21845 |\n| 26 | -21846 | 0 | 43 | 21845 |\n| 26 | -21846 | 0 | 44 | 21845 |\n| 26 | -21846 | 0 | 45 | 21845 |\n| 26 | -21846 | 0 | 46 | 21845 |\n| 26 | -21846 | 0 | 47 | 21845 |\n| 26+ | 21845 | 1 | 41 | -21846 |\n| 27 | 21845 | 1 | 41 | 21845 |\n| 27+ | -21846 | 1 | 42 | 21845 |\n| 28 | -21846 | 1 | 42 | -21846 |\n| 28+ | -21846 | 0 | 40 | 21845 |\n| 29 | -21846 | 0 | 40 | 21845 |\n| 29 | -21846 | 0 | 41 | 21845 |\n| 29 | -21846 | 0 | 42 | -21846 |\n| 29 | -21846 | 0 | 43 | 21845 |\n| 29 | -21846 | 0 | 44 | 21845 |\n| 29 | -21846 | 0 | 45 | 21845 |\n| 29 | -21846 | 0 | 46 | 21845 |\n| 29 | -21846 | 0 | 47 | 21845 |\n| 29+ | 21845 | 1 | 42 | -21846 |\n| 30 | 21845 | 1 | 42 | 21845 |\n| 30+ | -21846 | 1 | 43 | 21845 |\n| 31 | -21846 | 1 | 43 | -21846 |\n| 31+ | -21846 | 0 | 40 | 21845 |\n| 32 | -21846 | 0 | 40 | 21845 |\n| 32 | -21846 | 0 | 41 | 21845 |\n| 32 | -21846 | 0 | 42 | 21845 |\n| 32 | -21846 | 0 | 43 | -21846 |\n| 32 | -21846 | 0 | 44 | 21845 |\n| 32 | -21846 | 0 | 45 | 21845 |\n| 32 | -21846 | 0 | 46 | 21845 |\n| 32 | -21846 | 0 | 47 | 21845 |\n| 32+ | 21845 | 1 | 43 | -21846 |\n| 33 | 21845 | 1 | 43 | 21845 |\n| 33+ | -21846 | 1 | 44 | 21845 |\n| 34 | -21846 | 1 | 44 | -21846 |\n| 34+ | -21846 | 0 | 40 | 21845 |\n| 35 | -21846 | 0 | 40 | 21845 |\n| 35 | -21846 | 0 | 41 | 21845 |\n| 35 | -21846 | 0 | 42 | 21845 |\n| 35 | -21846 | 0 | 43 | 21845 |\n| 35 | -21846 | 0 | 44 | -21846 |\n| 35 | -21846 | 0 | 45 | 21845 |\n| 35 | -21846 | 0 | 46 | 21845 |\n| 35 | -21846 | 0 | 47 | 21845 |\n| 35+ | 21845 | 1 | 44 | -21846 |\n| 36 | 21845 | 1 | 44 | 21845 |\n| 36+ | -21846 | 1 | 45 | 21845 |\n| 37 | -21846 | 1 | 45 | -21846 |\n| 37+ | -21846 | 0 | 40 | 21845 |\n| 38 | -21846 | 0 | 40 | 21845 |\n| 38 | -21846 | 0 | 41 | 21845 |\n| 38 | -21846 | 0 | 42 | 21845 |\n| 38 | -21846 | 0 | 43 | 21845 |\n| 38 | -21846 | 0 | 44 | 21845 |\n| 38 | -21846 | 0 | 45 | -21846 |\n| 38 | -21846 | 0 | 46 | 21845 |\n| 38 | -21846 | 0 | 47 | 21845 |\n| 38+ | 21845 | 1 | 45 | -21846 |\n| 39 | 21845 | 1 | 45 | 21845 |\n| 39+ | -21846 | 1 | 46 | 21845 |\n| 40 | -21846 | 1 | 46 | -21846 |\n| 40+ | -21846 | 0 | 40 | 21845 |\n| 41 | -21846 | 0 | 40 | 21845 |\n| 41 | -21846 | 0 | 41 | 21845 |\n| 41 | -21846 | 0 | 42 | 21845 |\n| 41 | -21846 | 0 | 43 | 21845 |\n| 41 | -21846 | 0 | 44 | 21845 |\n| 41 | -21846 | 0 | 45 | 21845 |\n| 41 | -21846 | 0 | 46 | -21846 |\n| 41 | -21846 | 0 | 47 | 21845 |\n| 41+ | 21845 | 1 | 46 | -21846 |\n| 42 | 21845 | 1 | 46 | 21845 |\n| 42+ | -21846 | 1 | 47 | 21845 |\n| 43 | -21846 | 1 | 47 | -21846 |\n| 43+ | -21846 | 0 | 40 | 21845 |\n| 44 | -21846 | 0 | 40 | 21845 |\n| 44 | -21846 | 0 | 41 | 21845 |\n| 44 | -21846 | 0 | 42 | 21845 |\n| 44 | -21846 | 0 | 43 | 21845 |\n| 44 | -21846 | 0 | 44 | 21845 |\n| 44 | -21846 | 0 | 45 | 21845 |\n| 44 | -21846 | 0 | 46 | 21845 |\n| 44 | -21846 | 0 | 47 | -21846 |\n| 44+ | 21845 | 1 | 47 | -21846 |\n| 45 | 21845 | 1 | 47 | 21845 |\n| 45+ | 21845 | 0 | 40 | 21845 |\n| 46 | 21845 | 0 | 40 | 21845 |\n| 46 | 21845 | 0 | 41 | 21845 |\n| 46 | 21845 | 0 | 42 | 21845 |\n| 46 | 21845 | 0 | 43 | 21845 |\n| 46 | 21845 | 0 | 44 | 21845 |\n| 46 | 21845 | 0 | 45 | 21845 |\n| 46 | 21845 | 0 | 46 | 21845 |\n| 46 | 21845 | 0 | 47 | 21845 |\n| 46+ | 21845 | 0 | 5 | 0 |\n| 47 | 21845 | 0 | 5 | 0 |\n| 47 | 21845 | 0 | 13 | 1313 |\n| 47 | 21845 | 0 | 21 | 0 |\n| 47 | 21845 | 0 | 29 | 0 |\n| 47 | 21845 | 0 | 37 | 0 |\n| 47 | 21845 | 0 | 45 | 21845 |\n| 47 | 21845 | 0 | 53 | 0 |\n| 47 | 21845 | 0 | 61 | 0 |\n| 47+ | 21845 | 1 | 5 | 0 |\n| 48 | 21845 | 1 | 5 | 21845 |\n| 48+ | 21845 | 1 | 13 | 1313 |\n| 49 | 21845 | 1 | 13 | 21845 |\n| 49+ | 21845 | 1 | 21 | 0 |\n| 50 | 21845 | 1 | 21 | 21845 |\n| 50+ | 21845 | 1 | 29 | 0 |\n| 51 | 21845 | 1 | 29 | 21845 |\n| 51+ | 21845 | 1 | 37 | 0 |\n| 52 | 21845 | 1 | 37 | 21845 |\n| 52+ | 21845 | 1 | 45 | 21845 |\n| 53 | 21845 | 1 | 45 | 21845 |\n| 53+ | 21845 | 1 | 53 | 0 |\n| 54 | 21845 | 1 | 53 | 21845 |\n| 54+ | 21845 | 1 | 61 | 0 |\n| 55 | 21845 | 1 | 61 | 21845 |\n| 55+ | 21845 | 0 | 5 | 21845 |\n| 56 | 21845 | 0 | 5 | 21845 |\n| 56 | 21845 | 0 | 13 | 21845 |\n| 56 | 21845 | 0 | 21 | 21845 |\n| 56 | 21845 | 0 | 29 | 21845 |\n| 56 | 21845 | 0 | 37 | 21845 |\n| 56 | 21845 | 0 | 45 | 21845 |\n| 56 | 21845 | 0 | 53 | 21845 |\n| 56 | 21845 | 0 | 61 | 21845 |\n| 56+ | -21846 | 1 | 5 | 21845 |\n| 57 | -21846 | 1 | 5 | -21846 |\n| 57+ | -21846 | 0 | 5 | -21846 |\n| 58 | -21846 | 0 | 5 | -21846 |\n| 58 | -21846 | 0 | 13 | 21845 |\n| 58 | -21846 | 0 | 21 | 21845 |\n| 58 | -21846 | 0 | 29 | 21845 |\n| 58 | -21846 | 0 | 37 | 21845 |\n| 58 | -21846 | 0 | 45 | 21845 |\n| 58 | -21846 | 0 | 53 | 21845 |\n| 58 | -21846 | 0 | 61 | 21845 |\n| 58+ | 21845 | 1 | 5 | -21846 |\n| 59 | 21845 | 1 | 5 | 21845 |\n| 59+ | -21846 | 1 | 13 | 21845 |\n| 60 | -21846 | 1 | 13 | -21846 |\n| 60+ | -21846 | 0 | 5 | 21845 |\n| 61 | -21846 | 0 | 5 | 21845 |\n| 61 | -21846 | 0 | 13 | -21846 |\n| 61 | -21846 | 0 | 21 | 21845 |\n| 61 | -21846 | 0 | 29 | 21845 |\n| 61 | -21846 | 0 | 37 | 21845 |\n| 61 | -21846 | 0 | 45 | 21845 |\n| 61 | -21846 | 0 | 53 | 21845 |\n| 61 | -21846 | 0 | 61 | 21845 |\n| 61+ | 21845 | 1 | 13 | -21846 |\n| 62 | 21845 | 1 | 13 | 21845 |\n| 62+ | -21846 | 1 | 21 | 21845 |\n| 63 | -21846 | 1 | 21 | -21846 |\n| 63+ | -21846 | 0 | 5 | 21845 |\n| 64 | -21846 | 0 | 5 | 21845 |\n| 64 | -21846 | 0 | 13 | 21845 |\n| 64 | -21846 | 0 | 21 | -21846 |\n| 64 | -21846 | 0 | 29 | 21845 |\n| 64 | -21846 | 0 | 37 | 21845 |\n| 64 | -21846 | 0 | 45 | 21845 |\n| 64 | -21846 | 0 | 53 | 21845 |\n| 64 | -21846 | 0 | 61 | 21845 |\n| 64+ | 21845 | 1 | 21 | -21846 |\n| 65 | 21845 | 1 | 21 | 21845 |\n| 65+ | -21846 | 1 | 29 | 21845 |\n| 66 | -21846 | 1 | 29 | -21846 |\n| 66+ | -21846 | 0 | 5 | 21845 |\n| 67 | -21846 | 0 | 5 | 21845 |\n| 67 | -21846 | 0 | 13 | 21845 |\n| 67 | -21846 | 0 | 21 | 21845 |\n| 67 | -21846 | 0 | 29 | -21846 |\n| 67 | -21846 | 0 | 37 | 21845 |\n| 67 | -21846 | 0 | 45 | 21845 |\n| 67 | -21846 | 0 | 53 | 21845 |\n| 67 | -21846 | 0 | 61 | 21845 |\n| 67+ | 21845 | 1 | 29 | -21846 |\n| 68 | 21845 | 1 | 29 | 21845 |\n| 68+ | -21846 | 1 | 37 | 21845 |\n| 69 | -21846 | 1 | 37 | -21846 |\n| 69+ | -21846 | 0 | 5 | 21845 |\n| 70 | -21846 | 0 | 5 | 21845 |\n| 70 | -21846 | 0 | 13 | 21845 |\n| 70 | -21846 | 0 | 21 | 21845 |\n| 70 | -21846 | 0 | 29 | 21845 |\n| 70 | -21846 | 0 | 37 | -21846 |\n| 70 | -21846 | 0 | 45 | 21845 |\n| 70 | -21846 | 0 | 53 | 21845 |\n| 70 | -21846 | 0 | 61 | 21845 |\n| 70+ | 21845 | 1 | 37 | -21846 |\n| 71 | 21845 | 1 | 37 | 21845 |\n| 71+ | -21846 | 1 | 45 | 21845 |\n| 72 | -21846 | 1 | 45 | -21846 |\n| 72+ | -21846 | 0 | 5 | 21845 |\n| 73 | -21846 | 0 | 5 | 21845 |\n| 73 | -21846 | 0 | 13 | 21845 |\n| 73 | -21846 | 0 | 21 | 21845 |\n| 73 | -21846 | 0 | 29 | 21845 |\n| 73 | -21846 | 0 | 37 | 21845 |\n| 73 | -21846 | 0 | 45 | -21846 |\n| 73 | -21846 | 0 | 53 | 21845 |\n| 73 | -21846 | 0 | 61 | 21845 |\n| 73+ | 21845 | 1 | 45 | -21846 |\n| 74 | 21845 | 1 | 45 | 21845 |\n| 74+ | -21846 | 1 | 53 | 21845 |\n| 75 | -21846 | 1 | 53 | -21846 |\n| 75+ | -21846 | 0 | 5 | 21845 |\n| 76 | -21846 | 0 | 5 | 21845 |\n| 76 | -21846 | 0 | 13 | 21845 |\n| 76 | -21846 | 0 | 21 | 21845 |\n| 76 | -21846 | 0 | 29 | 21845 |\n| 76 | -21846 | 0 | 37 | 21845 |\n| 76 | -21846 | 0 | 45 | 21845 |\n| 76 | -21846 | 0 | 53 | -21846 |\n| 76 | -21846 | 0 | 61 | 21845 |\n| 76+ | 21845 | 1 | 53 | -21846 |\n| 77 | 21845 | 1 | 53 | 21845 |\n| 77+ | -21846 | 1 | 61 | 21845 |\n| 78 | -21846 | 1 | 61 | -21846 |\n| 78+ | -21846 | 0 | 5 | 21845 |\n| 79 | -21846 | 0 | 5 | 21845 |\n| 79 | -21846 | 0 | 13 | 21845 |\n| 79 | -21846 | 0 | 21 | 21845 |\n| 79 | -21846 | 0 | 29 | 21845 |\n| 79 | -21846 | 0 | 37 | 21845 |\n| 79 | -21846 | 0 | 45 | 21845 |\n| 79 | -21846 | 0 | 53 | 21845 |\n| 79 | -21846 | 0 | 61 | -21846 |\n| 79+ | 21845 | 1 | 61 | -21846 |\n| 80 | 21845 | 1 | 61 | 21845 |\n| 80+ | 21845 | 0 | 5 | 21845 |\n| 81 | 21845 | 0 | 5 | 21845 |\n| 81 | 21845 | 0 | 13 | 21845 |\n| 81 | 21845 | 0 | 21 | 21845 |\n| 81 | 21845 | 0 | 29 | 21845 |\n| 81 | 21845 | 0 | 37 | 21845 |\n| 81 | 21845 | 0 | 45 | 21845 |\n| 81 | 21845 | 0 | 53 | 21845 |\n| 81 | 21845 | 0 | 61 | 21845 |"},RAM512:{"RAM512.hdl":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/3/b/RAM512.hdl\n/**\n * Memory of 512 16-bit registers.\n * If load is asserted, the value of the register selected by\n * address is set to in; Otherwise, the value does not change.\n * The value of the selected register is emitted by out.\n */\nCHIP RAM512 {\n IN in[16], load, address[9];\n OUT out[16];\n\n PARTS:\n //// Replace this comment with your code.\n}',"RAM512.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/3/b/RAM512.tst\n\noutput-list time%S1.3.1 in%D1.6.1 load%B2.1.1 address%D2.3.2 out%D1.6.1;\n\nset in 0,\nset load 0,\nset address 0,\ntick,\noutput;\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\ntock,\noutput;\n\nset in 13099,\nset load 0,\ntick,\noutput;\ntock,\noutput;\n\nset load 1,\nset address 130,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address 0,\ntick,\noutput;\ntock,\noutput;\n\nset in 4729,\nset address 472,\ntick,\noutput;\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\ntick,\noutput;\ntock,\noutput;\n\nset address 130,\neval,\noutput;\n\nset in 5119,\ntick,\noutput;\ntock,\noutput;\n\nset load 1,\nset address 511,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\ntick,\noutput;\ntock,\noutput;\n\nset address 472,\neval,\noutput;\n\nset address 511,\neval,\noutput;\n\n\nset load 0,\nset address %B010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B010101001,\neval,\noutput;\nset address %B010101010,\neval,\noutput;\nset address %B010101011,\neval,\noutput;\nset address %B010101100,\neval,\noutput;\nset address %B010101101,\neval,\noutput;\nset address %B010101110,\neval,\noutput;\nset address %B010101111,\neval,\noutput;\n\nset load 1,\nset in %B0101010101010101,\nset address %B010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B010101001,\ntick,\noutput,\ntock,\noutput;\nset address %B010101010,\ntick,\noutput,\ntock,\noutput;\nset address %B010101011,\ntick,\noutput,\ntock,\noutput;\nset address %B010101100,\ntick,\noutput,\ntock,\noutput;\nset address %B010101101,\ntick,\noutput,\ntock,\noutput;\nset address %B010101110,\ntick,\noutput,\ntock,\noutput;\nset address %B010101111,\ntick,\noutput,\ntock,\noutput;\n\nset load 0,\nset address %B010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B010101001,\neval,\noutput;\nset address %B010101010,\neval,\noutput;\nset address %B010101011,\neval,\noutput;\nset address %B010101100,\neval,\noutput;\nset address %B010101101,\neval,\noutput;\nset address %B010101110,\neval,\noutput;\nset address %B010101111,\neval,\noutput;\n\nset load 1,\nset address %B010101000,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B010101001,\neval,\noutput;\nset address %B010101010,\neval,\noutput;\nset address %B010101011,\neval,\noutput;\nset address %B010101100,\neval,\noutput;\nset address %B010101101,\neval,\noutput;\nset address %B010101110,\neval,\noutput;\nset address %B010101111,\neval,\noutput;\n\nset load 1,\nset address %B010101000,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B010101001,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B010101001,\neval,\noutput;\nset address %B010101010,\neval,\noutput;\nset address %B010101011,\neval,\noutput;\nset address %B010101100,\neval,\noutput;\nset address %B010101101,\neval,\noutput;\nset address %B010101110,\neval,\noutput;\nset address %B010101111,\neval,\noutput;\n\nset load 1,\nset address %B010101001,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B010101010,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B010101001,\neval,\noutput;\nset address %B010101010,\neval,\noutput;\nset address %B010101011,\neval,\noutput;\nset address %B010101100,\neval,\noutput;\nset address %B010101101,\neval,\noutput;\nset address %B010101110,\neval,\noutput;\nset address %B010101111,\neval,\noutput;\n\nset load 1,\nset address %B010101010,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B010101011,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B010101001,\neval,\noutput;\nset address %B010101010,\neval,\noutput;\nset address %B010101011,\neval,\noutput;\nset address %B010101100,\neval,\noutput;\nset address %B010101101,\neval,\noutput;\nset address %B010101110,\neval,\noutput;\nset address %B010101111,\neval,\noutput;\n\nset load 1,\nset address %B010101011,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B010101100,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B010101001,\neval,\noutput;\nset address %B010101010,\neval,\noutput;\nset address %B010101011,\neval,\noutput;\nset address %B010101100,\neval,\noutput;\nset address %B010101101,\neval,\noutput;\nset address %B010101110,\neval,\noutput;\nset address %B010101111,\neval,\noutput;\n\nset load 1,\nset address %B010101100,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B010101101,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B010101001,\neval,\noutput;\nset address %B010101010,\neval,\noutput;\nset address %B010101011,\neval,\noutput;\nset address %B010101100,\neval,\noutput;\nset address %B010101101,\neval,\noutput;\nset address %B010101110,\neval,\noutput;\nset address %B010101111,\neval,\noutput;\n\nset load 1,\nset address %B010101101,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B010101110,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B010101001,\neval,\noutput;\nset address %B010101010,\neval,\noutput;\nset address %B010101011,\neval,\noutput;\nset address %B010101100,\neval,\noutput;\nset address %B010101101,\neval,\noutput;\nset address %B010101110,\neval,\noutput;\nset address %B010101111,\neval,\noutput;\n\nset load 1,\nset address %B010101110,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B010101111,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B010101001,\neval,\noutput;\nset address %B010101010,\neval,\noutput;\nset address %B010101011,\neval,\noutput;\nset address %B010101100,\neval,\noutput;\nset address %B010101101,\neval,\noutput;\nset address %B010101110,\neval,\noutput;\nset address %B010101111,\neval,\noutput;\n\nset load 1,\nset address %B010101111,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\n\nset load 0,\nset address %B010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B010101001,\neval,\noutput;\nset address %B010101010,\neval,\noutput;\nset address %B010101011,\neval,\noutput;\nset address %B010101100,\neval,\noutput;\nset address %B010101101,\neval,\noutput;\nset address %B010101110,\neval,\noutput;\nset address %B010101111,\neval,\noutput;\n\n\nset load 0,\nset address %B000101010,\ntick,\noutput;\ntock,\noutput;\nset address %B001101010,\neval,\noutput;\nset address %B010101010,\neval,\noutput;\nset address %B011101010,\neval,\noutput;\nset address %B100101010,\neval,\noutput;\nset address %B101101010,\neval,\noutput;\nset address %B110101010,\neval,\noutput;\nset address %B111101010,\neval,\noutput;\n\nset load 1,\nset in %B0101010101010101,\nset address %B000101010,\ntick,\noutput;\ntock,\noutput;\nset address %B001101010,\ntick,\noutput,\ntock,\noutput;\nset address %B010101010,\ntick,\noutput,\ntock,\noutput;\nset address %B011101010,\ntick,\noutput,\ntock,\noutput;\nset address %B100101010,\ntick,\noutput,\ntock,\noutput;\nset address %B101101010,\ntick,\noutput,\ntock,\noutput;\nset address %B110101010,\ntick,\noutput,\ntock,\noutput;\nset address %B111101010,\ntick,\noutput,\ntock,\noutput;\n\nset load 0,\nset address %B000101010,\ntick,\noutput;\ntock,\noutput;\nset address %B001101010,\neval,\noutput;\nset address %B010101010,\neval,\noutput;\nset address %B011101010,\neval,\noutput;\nset address %B100101010,\neval,\noutput;\nset address %B101101010,\neval,\noutput;\nset address %B110101010,\neval,\noutput;\nset address %B111101010,\neval,\noutput;\n\nset load 1,\nset address %B000101010,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B000101010,\ntick,\noutput;\ntock,\noutput;\nset address %B001101010,\neval,\noutput;\nset address %B010101010,\neval,\noutput;\nset address %B011101010,\neval,\noutput;\nset address %B100101010,\neval,\noutput;\nset address %B101101010,\neval,\noutput;\nset address %B110101010,\neval,\noutput;\nset address %B111101010,\neval,\noutput;\n\nset load 1,\nset address %B000101010,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B001101010,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B000101010,\ntick,\noutput;\ntock,\noutput;\nset address %B001101010,\neval,\noutput;\nset address %B010101010,\neval,\noutput;\nset address %B011101010,\neval,\noutput;\nset address %B100101010,\neval,\noutput;\nset address %B101101010,\neval,\noutput;\nset address %B110101010,\neval,\noutput;\nset address %B111101010,\neval,\noutput;\n\nset load 1,\nset address %B001101010,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B010101010,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B000101010,\ntick,\noutput;\ntock,\noutput;\nset address %B001101010,\neval,\noutput;\nset address %B010101010,\neval,\noutput;\nset address %B011101010,\neval,\noutput;\nset address %B100101010,\neval,\noutput;\nset address %B101101010,\neval,\noutput;\nset address %B110101010,\neval,\noutput;\nset address %B111101010,\neval,\noutput;\n\nset load 1,\nset address %B010101010,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B011101010,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B000101010,\ntick,\noutput;\ntock,\noutput;\nset address %B001101010,\neval,\noutput;\nset address %B010101010,\neval,\noutput;\nset address %B011101010,\neval,\noutput;\nset address %B100101010,\neval,\noutput;\nset address %B101101010,\neval,\noutput;\nset address %B110101010,\neval,\noutput;\nset address %B111101010,\neval,\noutput;\n\nset load 1,\nset address %B011101010,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B100101010,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B000101010,\ntick,\noutput;\ntock,\noutput;\nset address %B001101010,\neval,\noutput;\nset address %B010101010,\neval,\noutput;\nset address %B011101010,\neval,\noutput;\nset address %B100101010,\neval,\noutput;\nset address %B101101010,\neval,\noutput;\nset address %B110101010,\neval,\noutput;\nset address %B111101010,\neval,\noutput;\n\nset load 1,\nset address %B100101010,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B101101010,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B000101010,\ntick,\noutput;\ntock,\noutput;\nset address %B001101010,\neval,\noutput;\nset address %B010101010,\neval,\noutput;\nset address %B011101010,\neval,\noutput;\nset address %B100101010,\neval,\noutput;\nset address %B101101010,\neval,\noutput;\nset address %B110101010,\neval,\noutput;\nset address %B111101010,\neval,\noutput;\n\nset load 1,\nset address %B101101010,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B110101010,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B000101010,\ntick,\noutput;\ntock,\noutput;\nset address %B001101010,\neval,\noutput;\nset address %B010101010,\neval,\noutput;\nset address %B011101010,\neval,\noutput;\nset address %B100101010,\neval,\noutput;\nset address %B101101010,\neval,\noutput;\nset address %B110101010,\neval,\noutput;\nset address %B111101010,\neval,\noutput;\n\nset load 1,\nset address %B110101010,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B111101010,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B000101010,\ntick,\noutput;\ntock,\noutput;\nset address %B001101010,\neval,\noutput;\nset address %B010101010,\neval,\noutput;\nset address %B011101010,\neval,\noutput;\nset address %B100101010,\neval,\noutput;\nset address %B101101010,\neval,\noutput;\nset address %B110101010,\neval,\noutput;\nset address %B111101010,\neval,\noutput;\n\nset load 1,\nset address %B111101010,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\n\nset load 0,\nset address %B000101010,\ntick,\noutput;\ntock,\noutput;\nset address %B001101010,\neval,\noutput;\nset address %B010101010,\neval,\noutput;\nset address %B011101010,\neval,\noutput;\nset address %B100101010,\neval,\noutput;\nset address %B101101010,\neval,\noutput;\nset address %B110101010,\neval,\noutput;\nset address %B111101010,\neval,\noutput;\n',"RAM512.cmp":"|time | in |load|address| out |\n| 0+ | 0 | 0 | 0 | 0 |\n| 1 | 0 | 0 | 0 | 0 |\n| 1+ | 0 | 1 | 0 | 0 |\n| 2 | 0 | 1 | 0 | 0 |\n| 2+ | 13099 | 0 | 0 | 0 |\n| 3 | 13099 | 0 | 0 | 0 |\n| 3+ | 13099 | 1 | 130 | 0 |\n| 4 | 13099 | 1 | 130 | 13099 |\n| 4+ | 13099 | 0 | 0 | 0 |\n| 5 | 13099 | 0 | 0 | 0 |\n| 5+ | 4729 | 0 | 472 | 0 |\n| 6 | 4729 | 0 | 472 | 0 |\n| 6+ | 4729 | 1 | 472 | 0 |\n| 7 | 4729 | 1 | 472 | 4729 |\n| 7+ | 4729 | 0 | 472 | 4729 |\n| 8 | 4729 | 0 | 472 | 4729 |\n| 8 | 4729 | 0 | 130 | 13099 |\n| 8+ | 5119 | 0 | 130 | 13099 |\n| 9 | 5119 | 0 | 130 | 13099 |\n| 9+ | 5119 | 1 | 511 | 0 |\n| 10 | 5119 | 1 | 511 | 5119 |\n| 10+ | 5119 | 0 | 511 | 5119 |\n| 11 | 5119 | 0 | 511 | 5119 |\n| 11 | 5119 | 0 | 472 | 4729 |\n| 11 | 5119 | 0 | 511 | 5119 |\n| 11+ | 5119 | 0 | 168 | 0 |\n| 12 | 5119 | 0 | 168 | 0 |\n| 12 | 5119 | 0 | 169 | 0 |\n| 12 | 5119 | 0 | 170 | 0 |\n| 12 | 5119 | 0 | 171 | 0 |\n| 12 | 5119 | 0 | 172 | 0 |\n| 12 | 5119 | 0 | 173 | 0 |\n| 12 | 5119 | 0 | 174 | 0 |\n| 12 | 5119 | 0 | 175 | 0 |\n| 12+ | 21845 | 1 | 168 | 0 |\n| 13 | 21845 | 1 | 168 | 21845 |\n| 13+ | 21845 | 1 | 169 | 0 |\n| 14 | 21845 | 1 | 169 | 21845 |\n| 14+ | 21845 | 1 | 170 | 0 |\n| 15 | 21845 | 1 | 170 | 21845 |\n| 15+ | 21845 | 1 | 171 | 0 |\n| 16 | 21845 | 1 | 171 | 21845 |\n| 16+ | 21845 | 1 | 172 | 0 |\n| 17 | 21845 | 1 | 172 | 21845 |\n| 17+ | 21845 | 1 | 173 | 0 |\n| 18 | 21845 | 1 | 173 | 21845 |\n| 18+ | 21845 | 1 | 174 | 0 |\n| 19 | 21845 | 1 | 174 | 21845 |\n| 19+ | 21845 | 1 | 175 | 0 |\n| 20 | 21845 | 1 | 175 | 21845 |\n| 20+ | 21845 | 0 | 168 | 21845 |\n| 21 | 21845 | 0 | 168 | 21845 |\n| 21 | 21845 | 0 | 169 | 21845 |\n| 21 | 21845 | 0 | 170 | 21845 |\n| 21 | 21845 | 0 | 171 | 21845 |\n| 21 | 21845 | 0 | 172 | 21845 |\n| 21 | 21845 | 0 | 173 | 21845 |\n| 21 | 21845 | 0 | 174 | 21845 |\n| 21 | 21845 | 0 | 175 | 21845 |\n| 21+ | -21846 | 1 | 168 | 21845 |\n| 22 | -21846 | 1 | 168 | -21846 |\n| 22+ | -21846 | 0 | 168 | -21846 |\n| 23 | -21846 | 0 | 168 | -21846 |\n| 23 | -21846 | 0 | 169 | 21845 |\n| 23 | -21846 | 0 | 170 | 21845 |\n| 23 | -21846 | 0 | 171 | 21845 |\n| 23 | -21846 | 0 | 172 | 21845 |\n| 23 | -21846 | 0 | 173 | 21845 |\n| 23 | -21846 | 0 | 174 | 21845 |\n| 23 | -21846 | 0 | 175 | 21845 |\n| 23+ | 21845 | 1 | 168 | -21846 |\n| 24 | 21845 | 1 | 168 | 21845 |\n| 24+ | -21846 | 1 | 169 | 21845 |\n| 25 | -21846 | 1 | 169 | -21846 |\n| 25+ | -21846 | 0 | 168 | 21845 |\n| 26 | -21846 | 0 | 168 | 21845 |\n| 26 | -21846 | 0 | 169 | -21846 |\n| 26 | -21846 | 0 | 170 | 21845 |\n| 26 | -21846 | 0 | 171 | 21845 |\n| 26 | -21846 | 0 | 172 | 21845 |\n| 26 | -21846 | 0 | 173 | 21845 |\n| 26 | -21846 | 0 | 174 | 21845 |\n| 26 | -21846 | 0 | 175 | 21845 |\n| 26+ | 21845 | 1 | 169 | -21846 |\n| 27 | 21845 | 1 | 169 | 21845 |\n| 27+ | -21846 | 1 | 170 | 21845 |\n| 28 | -21846 | 1 | 170 | -21846 |\n| 28+ | -21846 | 0 | 168 | 21845 |\n| 29 | -21846 | 0 | 168 | 21845 |\n| 29 | -21846 | 0 | 169 | 21845 |\n| 29 | -21846 | 0 | 170 | -21846 |\n| 29 | -21846 | 0 | 171 | 21845 |\n| 29 | -21846 | 0 | 172 | 21845 |\n| 29 | -21846 | 0 | 173 | 21845 |\n| 29 | -21846 | 0 | 174 | 21845 |\n| 29 | -21846 | 0 | 175 | 21845 |\n| 29+ | 21845 | 1 | 170 | -21846 |\n| 30 | 21845 | 1 | 170 | 21845 |\n| 30+ | -21846 | 1 | 171 | 21845 |\n| 31 | -21846 | 1 | 171 | -21846 |\n| 31+ | -21846 | 0 | 168 | 21845 |\n| 32 | -21846 | 0 | 168 | 21845 |\n| 32 | -21846 | 0 | 169 | 21845 |\n| 32 | -21846 | 0 | 170 | 21845 |\n| 32 | -21846 | 0 | 171 | -21846 |\n| 32 | -21846 | 0 | 172 | 21845 |\n| 32 | -21846 | 0 | 173 | 21845 |\n| 32 | -21846 | 0 | 174 | 21845 |\n| 32 | -21846 | 0 | 175 | 21845 |\n| 32+ | 21845 | 1 | 171 | -21846 |\n| 33 | 21845 | 1 | 171 | 21845 |\n| 33+ | -21846 | 1 | 172 | 21845 |\n| 34 | -21846 | 1 | 172 | -21846 |\n| 34+ | -21846 | 0 | 168 | 21845 |\n| 35 | -21846 | 0 | 168 | 21845 |\n| 35 | -21846 | 0 | 169 | 21845 |\n| 35 | -21846 | 0 | 170 | 21845 |\n| 35 | -21846 | 0 | 171 | 21845 |\n| 35 | -21846 | 0 | 172 | -21846 |\n| 35 | -21846 | 0 | 173 | 21845 |\n| 35 | -21846 | 0 | 174 | 21845 |\n| 35 | -21846 | 0 | 175 | 21845 |\n| 35+ | 21845 | 1 | 172 | -21846 |\n| 36 | 21845 | 1 | 172 | 21845 |\n| 36+ | -21846 | 1 | 173 | 21845 |\n| 37 | -21846 | 1 | 173 | -21846 |\n| 37+ | -21846 | 0 | 168 | 21845 |\n| 38 | -21846 | 0 | 168 | 21845 |\n| 38 | -21846 | 0 | 169 | 21845 |\n| 38 | -21846 | 0 | 170 | 21845 |\n| 38 | -21846 | 0 | 171 | 21845 |\n| 38 | -21846 | 0 | 172 | 21845 |\n| 38 | -21846 | 0 | 173 | -21846 |\n| 38 | -21846 | 0 | 174 | 21845 |\n| 38 | -21846 | 0 | 175 | 21845 |\n| 38+ | 21845 | 1 | 173 | -21846 |\n| 39 | 21845 | 1 | 173 | 21845 |\n| 39+ | -21846 | 1 | 174 | 21845 |\n| 40 | -21846 | 1 | 174 | -21846 |\n| 40+ | -21846 | 0 | 168 | 21845 |\n| 41 | -21846 | 0 | 168 | 21845 |\n| 41 | -21846 | 0 | 169 | 21845 |\n| 41 | -21846 | 0 | 170 | 21845 |\n| 41 | -21846 | 0 | 171 | 21845 |\n| 41 | -21846 | 0 | 172 | 21845 |\n| 41 | -21846 | 0 | 173 | 21845 |\n| 41 | -21846 | 0 | 174 | -21846 |\n| 41 | -21846 | 0 | 175 | 21845 |\n| 41+ | 21845 | 1 | 174 | -21846 |\n| 42 | 21845 | 1 | 174 | 21845 |\n| 42+ | -21846 | 1 | 175 | 21845 |\n| 43 | -21846 | 1 | 175 | -21846 |\n| 43+ | -21846 | 0 | 168 | 21845 |\n| 44 | -21846 | 0 | 168 | 21845 |\n| 44 | -21846 | 0 | 169 | 21845 |\n| 44 | -21846 | 0 | 170 | 21845 |\n| 44 | -21846 | 0 | 171 | 21845 |\n| 44 | -21846 | 0 | 172 | 21845 |\n| 44 | -21846 | 0 | 173 | 21845 |\n| 44 | -21846 | 0 | 174 | 21845 |\n| 44 | -21846 | 0 | 175 | -21846 |\n| 44+ | 21845 | 1 | 175 | -21846 |\n| 45 | 21845 | 1 | 175 | 21845 |\n| 45+ | 21845 | 0 | 168 | 21845 |\n| 46 | 21845 | 0 | 168 | 21845 |\n| 46 | 21845 | 0 | 169 | 21845 |\n| 46 | 21845 | 0 | 170 | 21845 |\n| 46 | 21845 | 0 | 171 | 21845 |\n| 46 | 21845 | 0 | 172 | 21845 |\n| 46 | 21845 | 0 | 173 | 21845 |\n| 46 | 21845 | 0 | 174 | 21845 |\n| 46 | 21845 | 0 | 175 | 21845 |\n| 46+ | 21845 | 0 | 42 | 0 |\n| 47 | 21845 | 0 | 42 | 0 |\n| 47 | 21845 | 0 | 106 | 0 |\n| 47 | 21845 | 0 | 170 | 21845 |\n| 47 | 21845 | 0 | 234 | 0 |\n| 47 | 21845 | 0 | 298 | 0 |\n| 47 | 21845 | 0 | 362 | 0 |\n| 47 | 21845 | 0 | 426 | 0 |\n| 47 | 21845 | 0 | 490 | 0 |\n| 47+ | 21845 | 1 | 42 | 0 |\n| 48 | 21845 | 1 | 42 | 21845 |\n| 48+ | 21845 | 1 | 106 | 0 |\n| 49 | 21845 | 1 | 106 | 21845 |\n| 49+ | 21845 | 1 | 170 | 21845 |\n| 50 | 21845 | 1 | 170 | 21845 |\n| 50+ | 21845 | 1 | 234 | 0 |\n| 51 | 21845 | 1 | 234 | 21845 |\n| 51+ | 21845 | 1 | 298 | 0 |\n| 52 | 21845 | 1 | 298 | 21845 |\n| 52+ | 21845 | 1 | 362 | 0 |\n| 53 | 21845 | 1 | 362 | 21845 |\n| 53+ | 21845 | 1 | 426 | 0 |\n| 54 | 21845 | 1 | 426 | 21845 |\n| 54+ | 21845 | 1 | 490 | 0 |\n| 55 | 21845 | 1 | 490 | 21845 |\n| 55+ | 21845 | 0 | 42 | 21845 |\n| 56 | 21845 | 0 | 42 | 21845 |\n| 56 | 21845 | 0 | 106 | 21845 |\n| 56 | 21845 | 0 | 170 | 21845 |\n| 56 | 21845 | 0 | 234 | 21845 |\n| 56 | 21845 | 0 | 298 | 21845 |\n| 56 | 21845 | 0 | 362 | 21845 |\n| 56 | 21845 | 0 | 426 | 21845 |\n| 56 | 21845 | 0 | 490 | 21845 |\n| 56+ | -21846 | 1 | 42 | 21845 |\n| 57 | -21846 | 1 | 42 | -21846 |\n| 57+ | -21846 | 0 | 42 | -21846 |\n| 58 | -21846 | 0 | 42 | -21846 |\n| 58 | -21846 | 0 | 106 | 21845 |\n| 58 | -21846 | 0 | 170 | 21845 |\n| 58 | -21846 | 0 | 234 | 21845 |\n| 58 | -21846 | 0 | 298 | 21845 |\n| 58 | -21846 | 0 | 362 | 21845 |\n| 58 | -21846 | 0 | 426 | 21845 |\n| 58 | -21846 | 0 | 490 | 21845 |\n| 58+ | 21845 | 1 | 42 | -21846 |\n| 59 | 21845 | 1 | 42 | 21845 |\n| 59+ | -21846 | 1 | 106 | 21845 |\n| 60 | -21846 | 1 | 106 | -21846 |\n| 60+ | -21846 | 0 | 42 | 21845 |\n| 61 | -21846 | 0 | 42 | 21845 |\n| 61 | -21846 | 0 | 106 | -21846 |\n| 61 | -21846 | 0 | 170 | 21845 |\n| 61 | -21846 | 0 | 234 | 21845 |\n| 61 | -21846 | 0 | 298 | 21845 |\n| 61 | -21846 | 0 | 362 | 21845 |\n| 61 | -21846 | 0 | 426 | 21845 |\n| 61 | -21846 | 0 | 490 | 21845 |\n| 61+ | 21845 | 1 | 106 | -21846 |\n| 62 | 21845 | 1 | 106 | 21845 |\n| 62+ | -21846 | 1 | 170 | 21845 |\n| 63 | -21846 | 1 | 170 | -21846 |\n| 63+ | -21846 | 0 | 42 | 21845 |\n| 64 | -21846 | 0 | 42 | 21845 |\n| 64 | -21846 | 0 | 106 | 21845 |\n| 64 | -21846 | 0 | 170 | -21846 |\n| 64 | -21846 | 0 | 234 | 21845 |\n| 64 | -21846 | 0 | 298 | 21845 |\n| 64 | -21846 | 0 | 362 | 21845 |\n| 64 | -21846 | 0 | 426 | 21845 |\n| 64 | -21846 | 0 | 490 | 21845 |\n| 64+ | 21845 | 1 | 170 | -21846 |\n| 65 | 21845 | 1 | 170 | 21845 |\n| 65+ | -21846 | 1 | 234 | 21845 |\n| 66 | -21846 | 1 | 234 | -21846 |\n| 66+ | -21846 | 0 | 42 | 21845 |\n| 67 | -21846 | 0 | 42 | 21845 |\n| 67 | -21846 | 0 | 106 | 21845 |\n| 67 | -21846 | 0 | 170 | 21845 |\n| 67 | -21846 | 0 | 234 | -21846 |\n| 67 | -21846 | 0 | 298 | 21845 |\n| 67 | -21846 | 0 | 362 | 21845 |\n| 67 | -21846 | 0 | 426 | 21845 |\n| 67 | -21846 | 0 | 490 | 21845 |\n| 67+ | 21845 | 1 | 234 | -21846 |\n| 68 | 21845 | 1 | 234 | 21845 |\n| 68+ | -21846 | 1 | 298 | 21845 |\n| 69 | -21846 | 1 | 298 | -21846 |\n| 69+ | -21846 | 0 | 42 | 21845 |\n| 70 | -21846 | 0 | 42 | 21845 |\n| 70 | -21846 | 0 | 106 | 21845 |\n| 70 | -21846 | 0 | 170 | 21845 |\n| 70 | -21846 | 0 | 234 | 21845 |\n| 70 | -21846 | 0 | 298 | -21846 |\n| 70 | -21846 | 0 | 362 | 21845 |\n| 70 | -21846 | 0 | 426 | 21845 |\n| 70 | -21846 | 0 | 490 | 21845 |\n| 70+ | 21845 | 1 | 298 | -21846 |\n| 71 | 21845 | 1 | 298 | 21845 |\n| 71+ | -21846 | 1 | 362 | 21845 |\n| 72 | -21846 | 1 | 362 | -21846 |\n| 72+ | -21846 | 0 | 42 | 21845 |\n| 73 | -21846 | 0 | 42 | 21845 |\n| 73 | -21846 | 0 | 106 | 21845 |\n| 73 | -21846 | 0 | 170 | 21845 |\n| 73 | -21846 | 0 | 234 | 21845 |\n| 73 | -21846 | 0 | 298 | 21845 |\n| 73 | -21846 | 0 | 362 | -21846 |\n| 73 | -21846 | 0 | 426 | 21845 |\n| 73 | -21846 | 0 | 490 | 21845 |\n| 73+ | 21845 | 1 | 362 | -21846 |\n| 74 | 21845 | 1 | 362 | 21845 |\n| 74+ | -21846 | 1 | 426 | 21845 |\n| 75 | -21846 | 1 | 426 | -21846 |\n| 75+ | -21846 | 0 | 42 | 21845 |\n| 76 | -21846 | 0 | 42 | 21845 |\n| 76 | -21846 | 0 | 106 | 21845 |\n| 76 | -21846 | 0 | 170 | 21845 |\n| 76 | -21846 | 0 | 234 | 21845 |\n| 76 | -21846 | 0 | 298 | 21845 |\n| 76 | -21846 | 0 | 362 | 21845 |\n| 76 | -21846 | 0 | 426 | -21846 |\n| 76 | -21846 | 0 | 490 | 21845 |\n| 76+ | 21845 | 1 | 426 | -21846 |\n| 77 | 21845 | 1 | 426 | 21845 |\n| 77+ | -21846 | 1 | 490 | 21845 |\n| 78 | -21846 | 1 | 490 | -21846 |\n| 78+ | -21846 | 0 | 42 | 21845 |\n| 79 | -21846 | 0 | 42 | 21845 |\n| 79 | -21846 | 0 | 106 | 21845 |\n| 79 | -21846 | 0 | 170 | 21845 |\n| 79 | -21846 | 0 | 234 | 21845 |\n| 79 | -21846 | 0 | 298 | 21845 |\n| 79 | -21846 | 0 | 362 | 21845 |\n| 79 | -21846 | 0 | 426 | 21845 |\n| 79 | -21846 | 0 | 490 | -21846 |\n| 79+ | 21845 | 1 | 490 | -21846 |\n| 80 | 21845 | 1 | 490 | 21845 |\n| 80+ | 21845 | 0 | 42 | 21845 |\n| 81 | 21845 | 0 | 42 | 21845 |\n| 81 | 21845 | 0 | 106 | 21845 |\n| 81 | 21845 | 0 | 170 | 21845 |\n| 81 | 21845 | 0 | 234 | 21845 |\n| 81 | 21845 | 0 | 298 | 21845 |\n| 81 | 21845 | 0 | 362 | 21845 |\n| 81 | 21845 | 0 | 426 | 21845 |\n| 81 | 21845 | 0 | 490 | 21845 |"},RAM4K:{"RAM4K.hdl":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/3/b/RAM4K.hdl\n/**\n * Memory of 4K 16-bit registers.\n * If load is asserted, the value of the register selected by\n * address is set to in; Otherwise, the value does not change.\n * The value of the selected register is emitted by out.\n */\nCHIP RAM4K {\n IN in[16], load, address[12];\n OUT out[16];\n\n PARTS:\n //// Replace this comment with your code.\n}',"RAM4K.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/3/b/RAM4K.tst\n\noutput-list time%S1.3.1 in%D1.6.1 load%B2.1.1 address%D2.4.2 out%D1.6.1;\n\nset in 0,\nset load 0,\nset address 0,\ntick,\noutput;\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\ntock,\noutput;\n\nset in 1111,\nset load 0,\ntick,\noutput;\ntock,\noutput;\n\nset load 1,\nset address 1111,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address 0,\ntick,\noutput;\ntock,\noutput;\n\nset in 3513,\nset address 3513,\ntick,\noutput;\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\ntick,\noutput;\ntock,\noutput;\n\nset address 1111,\neval,\noutput;\n\nset in 4095,\ntick,\noutput;\ntock,\noutput;\n\nset load 1,\nset address 4095,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\ntick,\noutput;\ntock,\noutput;\n\nset address 3513,\neval,\noutput;\n\nset address 4095,\neval,\noutput;\n\n\nset load 0,\nset address %B101010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B101010101001,\neval,\noutput;\nset address %B101010101010,\neval,\noutput;\nset address %B101010101011,\neval,\noutput;\nset address %B101010101100,\neval,\noutput;\nset address %B101010101101,\neval,\noutput;\nset address %B101010101110,\neval,\noutput;\nset address %B101010101111,\neval,\noutput;\n\nset load 1,\nset in %B0101010101010101,\nset address %B101010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B101010101001,\ntick,\noutput,\ntock,\noutput;\nset address %B101010101010,\ntick,\noutput,\ntock,\noutput;\nset address %B101010101011,\ntick,\noutput,\ntock,\noutput;\nset address %B101010101100,\ntick,\noutput,\ntock,\noutput;\nset address %B101010101101,\ntick,\noutput,\ntock,\noutput;\nset address %B101010101110,\ntick,\noutput,\ntock,\noutput;\nset address %B101010101111,\ntick,\noutput,\ntock,\noutput;\n\nset load 0,\nset address %B101010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B101010101001,\neval,\noutput;\nset address %B101010101010,\neval,\noutput;\nset address %B101010101011,\neval,\noutput;\nset address %B101010101100,\neval,\noutput;\nset address %B101010101101,\neval,\noutput;\nset address %B101010101110,\neval,\noutput;\nset address %B101010101111,\neval,\noutput;\n\nset load 1,\nset address %B101010101000,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B101010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B101010101001,\neval,\noutput;\nset address %B101010101010,\neval,\noutput;\nset address %B101010101011,\neval,\noutput;\nset address %B101010101100,\neval,\noutput;\nset address %B101010101101,\neval,\noutput;\nset address %B101010101110,\neval,\noutput;\nset address %B101010101111,\neval,\noutput;\n\nset load 1,\nset address %B101010101000,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B101010101001,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B101010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B101010101001,\neval,\noutput;\nset address %B101010101010,\neval,\noutput;\nset address %B101010101011,\neval,\noutput;\nset address %B101010101100,\neval,\noutput;\nset address %B101010101101,\neval,\noutput;\nset address %B101010101110,\neval,\noutput;\nset address %B101010101111,\neval,\noutput;\n\nset load 1,\nset address %B101010101001,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B101010101010,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B101010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B101010101001,\neval,\noutput;\nset address %B101010101010,\neval,\noutput;\nset address %B101010101011,\neval,\noutput;\nset address %B101010101100,\neval,\noutput;\nset address %B101010101101,\neval,\noutput;\nset address %B101010101110,\neval,\noutput;\nset address %B101010101111,\neval,\noutput;\n\nset load 1,\nset address %B101010101010,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B101010101011,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B101010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B101010101001,\neval,\noutput;\nset address %B101010101010,\neval,\noutput;\nset address %B101010101011,\neval,\noutput;\nset address %B101010101100,\neval,\noutput;\nset address %B101010101101,\neval,\noutput;\nset address %B101010101110,\neval,\noutput;\nset address %B101010101111,\neval,\noutput;\n\nset load 1,\nset address %B101010101011,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B101010101100,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B101010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B101010101001,\neval,\noutput;\nset address %B101010101010,\neval,\noutput;\nset address %B101010101011,\neval,\noutput;\nset address %B101010101100,\neval,\noutput;\nset address %B101010101101,\neval,\noutput;\nset address %B101010101110,\neval,\noutput;\nset address %B101010101111,\neval,\noutput;\n\nset load 1,\nset address %B101010101100,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B101010101101,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B101010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B101010101001,\neval,\noutput;\nset address %B101010101010,\neval,\noutput;\nset address %B101010101011,\neval,\noutput;\nset address %B101010101100,\neval,\noutput;\nset address %B101010101101,\neval,\noutput;\nset address %B101010101110,\neval,\noutput;\nset address %B101010101111,\neval,\noutput;\n\nset load 1,\nset address %B101010101101,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B101010101110,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B101010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B101010101001,\neval,\noutput;\nset address %B101010101010,\neval,\noutput;\nset address %B101010101011,\neval,\noutput;\nset address %B101010101100,\neval,\noutput;\nset address %B101010101101,\neval,\noutput;\nset address %B101010101110,\neval,\noutput;\nset address %B101010101111,\neval,\noutput;\n\nset load 1,\nset address %B101010101110,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B101010101111,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B101010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B101010101001,\neval,\noutput;\nset address %B101010101010,\neval,\noutput;\nset address %B101010101011,\neval,\noutput;\nset address %B101010101100,\neval,\noutput;\nset address %B101010101101,\neval,\noutput;\nset address %B101010101110,\neval,\noutput;\nset address %B101010101111,\neval,\noutput;\n\nset load 1,\nset address %B101010101111,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\n\nset load 0,\nset address %B101010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B101010101001,\neval,\noutput;\nset address %B101010101010,\neval,\noutput;\nset address %B101010101011,\neval,\noutput;\nset address %B101010101100,\neval,\noutput;\nset address %B101010101101,\neval,\noutput;\nset address %B101010101110,\neval,\noutput;\nset address %B101010101111,\neval,\noutput;\n\n\nset load 0,\nset address %B000101010101,\ntick,\noutput;\ntock,\noutput;\nset address %B001101010101,\neval,\noutput;\nset address %B010101010101,\neval,\noutput;\nset address %B011101010101,\neval,\noutput;\nset address %B100101010101,\neval,\noutput;\nset address %B101101010101,\neval,\noutput;\nset address %B110101010101,\neval,\noutput;\nset address %B111101010101,\neval,\noutput;\n\nset load 1,\nset in %B0101010101010101,\nset address %B000101010101,\ntick,\noutput;\ntock,\noutput;\nset address %B001101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B011101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B100101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B101101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B110101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B111101010101,\ntick,\noutput,\ntock,\noutput;\n\nset load 0,\nset address %B000101010101,\ntick,\noutput;\ntock,\noutput;\nset address %B001101010101,\neval,\noutput;\nset address %B010101010101,\neval,\noutput;\nset address %B011101010101,\neval,\noutput;\nset address %B100101010101,\neval,\noutput;\nset address %B101101010101,\neval,\noutput;\nset address %B110101010101,\neval,\noutput;\nset address %B111101010101,\neval,\noutput;\n\nset load 1,\nset address %B000101010101,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B000101010101,\ntick,\noutput;\ntock,\noutput;\nset address %B001101010101,\neval,\noutput;\nset address %B010101010101,\neval,\noutput;\nset address %B011101010101,\neval,\noutput;\nset address %B100101010101,\neval,\noutput;\nset address %B101101010101,\neval,\noutput;\nset address %B110101010101,\neval,\noutput;\nset address %B111101010101,\neval,\noutput;\n\nset load 1,\nset address %B000101010101,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B001101010101,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B000101010101,\ntick,\noutput;\ntock,\noutput;\nset address %B001101010101,\neval,\noutput;\nset address %B010101010101,\neval,\noutput;\nset address %B011101010101,\neval,\noutput;\nset address %B100101010101,\neval,\noutput;\nset address %B101101010101,\neval,\noutput;\nset address %B110101010101,\neval,\noutput;\nset address %B111101010101,\neval,\noutput;\n\nset load 1,\nset address %B001101010101,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B010101010101,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B000101010101,\ntick,\noutput;\ntock,\noutput;\nset address %B001101010101,\neval,\noutput;\nset address %B010101010101,\neval,\noutput;\nset address %B011101010101,\neval,\noutput;\nset address %B100101010101,\neval,\noutput;\nset address %B101101010101,\neval,\noutput;\nset address %B110101010101,\neval,\noutput;\nset address %B111101010101,\neval,\noutput;\n\nset load 1,\nset address %B010101010101,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B011101010101,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B000101010101,\ntick,\noutput;\ntock,\noutput;\nset address %B001101010101,\neval,\noutput;\nset address %B010101010101,\neval,\noutput;\nset address %B011101010101,\neval,\noutput;\nset address %B100101010101,\neval,\noutput;\nset address %B101101010101,\neval,\noutput;\nset address %B110101010101,\neval,\noutput;\nset address %B111101010101,\neval,\noutput;\n\nset load 1,\nset address %B011101010101,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B100101010101,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B000101010101,\ntick,\noutput;\ntock,\noutput;\nset address %B001101010101,\neval,\noutput;\nset address %B010101010101,\neval,\noutput;\nset address %B011101010101,\neval,\noutput;\nset address %B100101010101,\neval,\noutput;\nset address %B101101010101,\neval,\noutput;\nset address %B110101010101,\neval,\noutput;\nset address %B111101010101,\neval,\noutput;\n\nset load 1,\nset address %B100101010101,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B101101010101,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B000101010101,\ntick,\noutput;\ntock,\noutput;\nset address %B001101010101,\neval,\noutput;\nset address %B010101010101,\neval,\noutput;\nset address %B011101010101,\neval,\noutput;\nset address %B100101010101,\neval,\noutput;\nset address %B101101010101,\neval,\noutput;\nset address %B110101010101,\neval,\noutput;\nset address %B111101010101,\neval,\noutput;\n\nset load 1,\nset address %B101101010101,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B110101010101,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B000101010101,\ntick,\noutput;\ntock,\noutput;\nset address %B001101010101,\neval,\noutput;\nset address %B010101010101,\neval,\noutput;\nset address %B011101010101,\neval,\noutput;\nset address %B100101010101,\neval,\noutput;\nset address %B101101010101,\neval,\noutput;\nset address %B110101010101,\neval,\noutput;\nset address %B111101010101,\neval,\noutput;\n\nset load 1,\nset address %B110101010101,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B111101010101,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B000101010101,\ntick,\noutput;\ntock,\noutput;\nset address %B001101010101,\neval,\noutput;\nset address %B010101010101,\neval,\noutput;\nset address %B011101010101,\neval,\noutput;\nset address %B100101010101,\neval,\noutput;\nset address %B101101010101,\neval,\noutput;\nset address %B110101010101,\neval,\noutput;\nset address %B111101010101,\neval,\noutput;\n\nset load 1,\nset address %B111101010101,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\n\nset load 0,\nset address %B000101010101,\ntick,\noutput;\ntock,\noutput;\nset address %B001101010101,\neval,\noutput;\nset address %B010101010101,\neval,\noutput;\nset address %B011101010101,\neval,\noutput;\nset address %B100101010101,\neval,\noutput;\nset address %B101101010101,\neval,\noutput;\nset address %B110101010101,\neval,\noutput;\nset address %B111101010101,\neval,\noutput;',"RAM4K.cmp":"|time | in |load|address | out |\n| 0+ | 0 | 0 | 0 | 0 |\n| 1 | 0 | 0 | 0 | 0 |\n| 1+ | 0 | 1 | 0 | 0 |\n| 2 | 0 | 1 | 0 | 0 |\n| 2+ | 1111 | 0 | 0 | 0 |\n| 3 | 1111 | 0 | 0 | 0 |\n| 3+ | 1111 | 1 | 1111 | 0 |\n| 4 | 1111 | 1 | 1111 | 1111 |\n| 4+ | 1111 | 0 | 0 | 0 |\n| 5 | 1111 | 0 | 0 | 0 |\n| 5+ | 3513 | 0 | 3513 | 0 |\n| 6 | 3513 | 0 | 3513 | 0 |\n| 6+ | 3513 | 1 | 3513 | 0 |\n| 7 | 3513 | 1 | 3513 | 3513 |\n| 7+ | 3513 | 0 | 3513 | 3513 |\n| 8 | 3513 | 0 | 3513 | 3513 |\n| 8 | 3513 | 0 | 1111 | 1111 |\n| 8+ | 4095 | 0 | 1111 | 1111 |\n| 9 | 4095 | 0 | 1111 | 1111 |\n| 9+ | 4095 | 1 | 4095 | 0 |\n| 10 | 4095 | 1 | 4095 | 4095 |\n| 10+ | 4095 | 0 | 4095 | 4095 |\n| 11 | 4095 | 0 | 4095 | 4095 |\n| 11 | 4095 | 0 | 3513 | 3513 |\n| 11 | 4095 | 0 | 4095 | 4095 |\n| 11+ | 4095 | 0 | 2728 | 0 |\n| 12 | 4095 | 0 | 2728 | 0 |\n| 12 | 4095 | 0 | 2729 | 0 |\n| 12 | 4095 | 0 | 2730 | 0 |\n| 12 | 4095 | 0 | 2731 | 0 |\n| 12 | 4095 | 0 | 2732 | 0 |\n| 12 | 4095 | 0 | 2733 | 0 |\n| 12 | 4095 | 0 | 2734 | 0 |\n| 12 | 4095 | 0 | 2735 | 0 |\n| 12+ | 21845 | 1 | 2728 | 0 |\n| 13 | 21845 | 1 | 2728 | 21845 |\n| 13+ | 21845 | 1 | 2729 | 0 |\n| 14 | 21845 | 1 | 2729 | 21845 |\n| 14+ | 21845 | 1 | 2730 | 0 |\n| 15 | 21845 | 1 | 2730 | 21845 |\n| 15+ | 21845 | 1 | 2731 | 0 |\n| 16 | 21845 | 1 | 2731 | 21845 |\n| 16+ | 21845 | 1 | 2732 | 0 |\n| 17 | 21845 | 1 | 2732 | 21845 |\n| 17+ | 21845 | 1 | 2733 | 0 |\n| 18 | 21845 | 1 | 2733 | 21845 |\n| 18+ | 21845 | 1 | 2734 | 0 |\n| 19 | 21845 | 1 | 2734 | 21845 |\n| 19+ | 21845 | 1 | 2735 | 0 |\n| 20 | 21845 | 1 | 2735 | 21845 |\n| 20+ | 21845 | 0 | 2728 | 21845 |\n| 21 | 21845 | 0 | 2728 | 21845 |\n| 21 | 21845 | 0 | 2729 | 21845 |\n| 21 | 21845 | 0 | 2730 | 21845 |\n| 21 | 21845 | 0 | 2731 | 21845 |\n| 21 | 21845 | 0 | 2732 | 21845 |\n| 21 | 21845 | 0 | 2733 | 21845 |\n| 21 | 21845 | 0 | 2734 | 21845 |\n| 21 | 21845 | 0 | 2735 | 21845 |\n| 21+ | -21846 | 1 | 2728 | 21845 |\n| 22 | -21846 | 1 | 2728 | -21846 |\n| 22+ | -21846 | 0 | 2728 | -21846 |\n| 23 | -21846 | 0 | 2728 | -21846 |\n| 23 | -21846 | 0 | 2729 | 21845 |\n| 23 | -21846 | 0 | 2730 | 21845 |\n| 23 | -21846 | 0 | 2731 | 21845 |\n| 23 | -21846 | 0 | 2732 | 21845 |\n| 23 | -21846 | 0 | 2733 | 21845 |\n| 23 | -21846 | 0 | 2734 | 21845 |\n| 23 | -21846 | 0 | 2735 | 21845 |\n| 23+ | 21845 | 1 | 2728 | -21846 |\n| 24 | 21845 | 1 | 2728 | 21845 |\n| 24+ | -21846 | 1 | 2729 | 21845 |\n| 25 | -21846 | 1 | 2729 | -21846 |\n| 25+ | -21846 | 0 | 2728 | 21845 |\n| 26 | -21846 | 0 | 2728 | 21845 |\n| 26 | -21846 | 0 | 2729 | -21846 |\n| 26 | -21846 | 0 | 2730 | 21845 |\n| 26 | -21846 | 0 | 2731 | 21845 |\n| 26 | -21846 | 0 | 2732 | 21845 |\n| 26 | -21846 | 0 | 2733 | 21845 |\n| 26 | -21846 | 0 | 2734 | 21845 |\n| 26 | -21846 | 0 | 2735 | 21845 |\n| 26+ | 21845 | 1 | 2729 | -21846 |\n| 27 | 21845 | 1 | 2729 | 21845 |\n| 27+ | -21846 | 1 | 2730 | 21845 |\n| 28 | -21846 | 1 | 2730 | -21846 |\n| 28+ | -21846 | 0 | 2728 | 21845 |\n| 29 | -21846 | 0 | 2728 | 21845 |\n| 29 | -21846 | 0 | 2729 | 21845 |\n| 29 | -21846 | 0 | 2730 | -21846 |\n| 29 | -21846 | 0 | 2731 | 21845 |\n| 29 | -21846 | 0 | 2732 | 21845 |\n| 29 | -21846 | 0 | 2733 | 21845 |\n| 29 | -21846 | 0 | 2734 | 21845 |\n| 29 | -21846 | 0 | 2735 | 21845 |\n| 29+ | 21845 | 1 | 2730 | -21846 |\n| 30 | 21845 | 1 | 2730 | 21845 |\n| 30+ | -21846 | 1 | 2731 | 21845 |\n| 31 | -21846 | 1 | 2731 | -21846 |\n| 31+ | -21846 | 0 | 2728 | 21845 |\n| 32 | -21846 | 0 | 2728 | 21845 |\n| 32 | -21846 | 0 | 2729 | 21845 |\n| 32 | -21846 | 0 | 2730 | 21845 |\n| 32 | -21846 | 0 | 2731 | -21846 |\n| 32 | -21846 | 0 | 2732 | 21845 |\n| 32 | -21846 | 0 | 2733 | 21845 |\n| 32 | -21846 | 0 | 2734 | 21845 |\n| 32 | -21846 | 0 | 2735 | 21845 |\n| 32+ | 21845 | 1 | 2731 | -21846 |\n| 33 | 21845 | 1 | 2731 | 21845 |\n| 33+ | -21846 | 1 | 2732 | 21845 |\n| 34 | -21846 | 1 | 2732 | -21846 |\n| 34+ | -21846 | 0 | 2728 | 21845 |\n| 35 | -21846 | 0 | 2728 | 21845 |\n| 35 | -21846 | 0 | 2729 | 21845 |\n| 35 | -21846 | 0 | 2730 | 21845 |\n| 35 | -21846 | 0 | 2731 | 21845 |\n| 35 | -21846 | 0 | 2732 | -21846 |\n| 35 | -21846 | 0 | 2733 | 21845 |\n| 35 | -21846 | 0 | 2734 | 21845 |\n| 35 | -21846 | 0 | 2735 | 21845 |\n| 35+ | 21845 | 1 | 2732 | -21846 |\n| 36 | 21845 | 1 | 2732 | 21845 |\n| 36+ | -21846 | 1 | 2733 | 21845 |\n| 37 | -21846 | 1 | 2733 | -21846 |\n| 37+ | -21846 | 0 | 2728 | 21845 |\n| 38 | -21846 | 0 | 2728 | 21845 |\n| 38 | -21846 | 0 | 2729 | 21845 |\n| 38 | -21846 | 0 | 2730 | 21845 |\n| 38 | -21846 | 0 | 2731 | 21845 |\n| 38 | -21846 | 0 | 2732 | 21845 |\n| 38 | -21846 | 0 | 2733 | -21846 |\n| 38 | -21846 | 0 | 2734 | 21845 |\n| 38 | -21846 | 0 | 2735 | 21845 |\n| 38+ | 21845 | 1 | 2733 | -21846 |\n| 39 | 21845 | 1 | 2733 | 21845 |\n| 39+ | -21846 | 1 | 2734 | 21845 |\n| 40 | -21846 | 1 | 2734 | -21846 |\n| 40+ | -21846 | 0 | 2728 | 21845 |\n| 41 | -21846 | 0 | 2728 | 21845 |\n| 41 | -21846 | 0 | 2729 | 21845 |\n| 41 | -21846 | 0 | 2730 | 21845 |\n| 41 | -21846 | 0 | 2731 | 21845 |\n| 41 | -21846 | 0 | 2732 | 21845 |\n| 41 | -21846 | 0 | 2733 | 21845 |\n| 41 | -21846 | 0 | 2734 | -21846 |\n| 41 | -21846 | 0 | 2735 | 21845 |\n| 41+ | 21845 | 1 | 2734 | -21846 |\n| 42 | 21845 | 1 | 2734 | 21845 |\n| 42+ | -21846 | 1 | 2735 | 21845 |\n| 43 | -21846 | 1 | 2735 | -21846 |\n| 43+ | -21846 | 0 | 2728 | 21845 |\n| 44 | -21846 | 0 | 2728 | 21845 |\n| 44 | -21846 | 0 | 2729 | 21845 |\n| 44 | -21846 | 0 | 2730 | 21845 |\n| 44 | -21846 | 0 | 2731 | 21845 |\n| 44 | -21846 | 0 | 2732 | 21845 |\n| 44 | -21846 | 0 | 2733 | 21845 |\n| 44 | -21846 | 0 | 2734 | 21845 |\n| 44 | -21846 | 0 | 2735 | -21846 |\n| 44+ | 21845 | 1 | 2735 | -21846 |\n| 45 | 21845 | 1 | 2735 | 21845 |\n| 45+ | 21845 | 0 | 2728 | 21845 |\n| 46 | 21845 | 0 | 2728 | 21845 |\n| 46 | 21845 | 0 | 2729 | 21845 |\n| 46 | 21845 | 0 | 2730 | 21845 |\n| 46 | 21845 | 0 | 2731 | 21845 |\n| 46 | 21845 | 0 | 2732 | 21845 |\n| 46 | 21845 | 0 | 2733 | 21845 |\n| 46 | 21845 | 0 | 2734 | 21845 |\n| 46 | 21845 | 0 | 2735 | 21845 |\n| 46+ | 21845 | 0 | 341 | 0 |\n| 47 | 21845 | 0 | 341 | 0 |\n| 47 | 21845 | 0 | 853 | 0 |\n| 47 | 21845 | 0 | 1365 | 0 |\n| 47 | 21845 | 0 | 1877 | 0 |\n| 47 | 21845 | 0 | 2389 | 0 |\n| 47 | 21845 | 0 | 2901 | 0 |\n| 47 | 21845 | 0 | 3413 | 0 |\n| 47 | 21845 | 0 | 3925 | 0 |\n| 47+ | 21845 | 1 | 341 | 0 |\n| 48 | 21845 | 1 | 341 | 21845 |\n| 48+ | 21845 | 1 | 853 | 0 |\n| 49 | 21845 | 1 | 853 | 21845 |\n| 49+ | 21845 | 1 | 1365 | 0 |\n| 50 | 21845 | 1 | 1365 | 21845 |\n| 50+ | 21845 | 1 | 1877 | 0 |\n| 51 | 21845 | 1 | 1877 | 21845 |\n| 51+ | 21845 | 1 | 2389 | 0 |\n| 52 | 21845 | 1 | 2389 | 21845 |\n| 52+ | 21845 | 1 | 2901 | 0 |\n| 53 | 21845 | 1 | 2901 | 21845 |\n| 53+ | 21845 | 1 | 3413 | 0 |\n| 54 | 21845 | 1 | 3413 | 21845 |\n| 54+ | 21845 | 1 | 3925 | 0 |\n| 55 | 21845 | 1 | 3925 | 21845 |\n| 55+ | 21845 | 0 | 341 | 21845 |\n| 56 | 21845 | 0 | 341 | 21845 |\n| 56 | 21845 | 0 | 853 | 21845 |\n| 56 | 21845 | 0 | 1365 | 21845 |\n| 56 | 21845 | 0 | 1877 | 21845 |\n| 56 | 21845 | 0 | 2389 | 21845 |\n| 56 | 21845 | 0 | 2901 | 21845 |\n| 56 | 21845 | 0 | 3413 | 21845 |\n| 56 | 21845 | 0 | 3925 | 21845 |\n| 56+ | -21846 | 1 | 341 | 21845 |\n| 57 | -21846 | 1 | 341 | -21846 |\n| 57+ | -21846 | 0 | 341 | -21846 |\n| 58 | -21846 | 0 | 341 | -21846 |\n| 58 | -21846 | 0 | 853 | 21845 |\n| 58 | -21846 | 0 | 1365 | 21845 |\n| 58 | -21846 | 0 | 1877 | 21845 |\n| 58 | -21846 | 0 | 2389 | 21845 |\n| 58 | -21846 | 0 | 2901 | 21845 |\n| 58 | -21846 | 0 | 3413 | 21845 |\n| 58 | -21846 | 0 | 3925 | 21845 |\n| 58+ | 21845 | 1 | 341 | -21846 |\n| 59 | 21845 | 1 | 341 | 21845 |\n| 59+ | -21846 | 1 | 853 | 21845 |\n| 60 | -21846 | 1 | 853 | -21846 |\n| 60+ | -21846 | 0 | 341 | 21845 |\n| 61 | -21846 | 0 | 341 | 21845 |\n| 61 | -21846 | 0 | 853 | -21846 |\n| 61 | -21846 | 0 | 1365 | 21845 |\n| 61 | -21846 | 0 | 1877 | 21845 |\n| 61 | -21846 | 0 | 2389 | 21845 |\n| 61 | -21846 | 0 | 2901 | 21845 |\n| 61 | -21846 | 0 | 3413 | 21845 |\n| 61 | -21846 | 0 | 3925 | 21845 |\n| 61+ | 21845 | 1 | 853 | -21846 |\n| 62 | 21845 | 1 | 853 | 21845 |\n| 62+ | -21846 | 1 | 1365 | 21845 |\n| 63 | -21846 | 1 | 1365 | -21846 |\n| 63+ | -21846 | 0 | 341 | 21845 |\n| 64 | -21846 | 0 | 341 | 21845 |\n| 64 | -21846 | 0 | 853 | 21845 |\n| 64 | -21846 | 0 | 1365 | -21846 |\n| 64 | -21846 | 0 | 1877 | 21845 |\n| 64 | -21846 | 0 | 2389 | 21845 |\n| 64 | -21846 | 0 | 2901 | 21845 |\n| 64 | -21846 | 0 | 3413 | 21845 |\n| 64 | -21846 | 0 | 3925 | 21845 |\n| 64+ | 21845 | 1 | 1365 | -21846 |\n| 65 | 21845 | 1 | 1365 | 21845 |\n| 65+ | -21846 | 1 | 1877 | 21845 |\n| 66 | -21846 | 1 | 1877 | -21846 |\n| 66+ | -21846 | 0 | 341 | 21845 |\n| 67 | -21846 | 0 | 341 | 21845 |\n| 67 | -21846 | 0 | 853 | 21845 |\n| 67 | -21846 | 0 | 1365 | 21845 |\n| 67 | -21846 | 0 | 1877 | -21846 |\n| 67 | -21846 | 0 | 2389 | 21845 |\n| 67 | -21846 | 0 | 2901 | 21845 |\n| 67 | -21846 | 0 | 3413 | 21845 |\n| 67 | -21846 | 0 | 3925 | 21845 |\n| 67+ | 21845 | 1 | 1877 | -21846 |\n| 68 | 21845 | 1 | 1877 | 21845 |\n| 68+ | -21846 | 1 | 2389 | 21845 |\n| 69 | -21846 | 1 | 2389 | -21846 |\n| 69+ | -21846 | 0 | 341 | 21845 |\n| 70 | -21846 | 0 | 341 | 21845 |\n| 70 | -21846 | 0 | 853 | 21845 |\n| 70 | -21846 | 0 | 1365 | 21845 |\n| 70 | -21846 | 0 | 1877 | 21845 |\n| 70 | -21846 | 0 | 2389 | -21846 |\n| 70 | -21846 | 0 | 2901 | 21845 |\n| 70 | -21846 | 0 | 3413 | 21845 |\n| 70 | -21846 | 0 | 3925 | 21845 |\n| 70+ | 21845 | 1 | 2389 | -21846 |\n| 71 | 21845 | 1 | 2389 | 21845 |\n| 71+ | -21846 | 1 | 2901 | 21845 |\n| 72 | -21846 | 1 | 2901 | -21846 |\n| 72+ | -21846 | 0 | 341 | 21845 |\n| 73 | -21846 | 0 | 341 | 21845 |\n| 73 | -21846 | 0 | 853 | 21845 |\n| 73 | -21846 | 0 | 1365 | 21845 |\n| 73 | -21846 | 0 | 1877 | 21845 |\n| 73 | -21846 | 0 | 2389 | 21845 |\n| 73 | -21846 | 0 | 2901 | -21846 |\n| 73 | -21846 | 0 | 3413 | 21845 |\n| 73 | -21846 | 0 | 3925 | 21845 |\n| 73+ | 21845 | 1 | 2901 | -21846 |\n| 74 | 21845 | 1 | 2901 | 21845 |\n| 74+ | -21846 | 1 | 3413 | 21845 |\n| 75 | -21846 | 1 | 3413 | -21846 |\n| 75+ | -21846 | 0 | 341 | 21845 |\n| 76 | -21846 | 0 | 341 | 21845 |\n| 76 | -21846 | 0 | 853 | 21845 |\n| 76 | -21846 | 0 | 1365 | 21845 |\n| 76 | -21846 | 0 | 1877 | 21845 |\n| 76 | -21846 | 0 | 2389 | 21845 |\n| 76 | -21846 | 0 | 2901 | 21845 |\n| 76 | -21846 | 0 | 3413 | -21846 |\n| 76 | -21846 | 0 | 3925 | 21845 |\n| 76+ | 21845 | 1 | 3413 | -21846 |\n| 77 | 21845 | 1 | 3413 | 21845 |\n| 77+ | -21846 | 1 | 3925 | 21845 |\n| 78 | -21846 | 1 | 3925 | -21846 |\n| 78+ | -21846 | 0 | 341 | 21845 |\n| 79 | -21846 | 0 | 341 | 21845 |\n| 79 | -21846 | 0 | 853 | 21845 |\n| 79 | -21846 | 0 | 1365 | 21845 |\n| 79 | -21846 | 0 | 1877 | 21845 |\n| 79 | -21846 | 0 | 2389 | 21845 |\n| 79 | -21846 | 0 | 2901 | 21845 |\n| 79 | -21846 | 0 | 3413 | 21845 |\n| 79 | -21846 | 0 | 3925 | -21846 |\n| 79+ | 21845 | 1 | 3925 | -21846 |\n| 80 | 21845 | 1 | 3925 | 21845 |\n| 80+ | 21845 | 0 | 341 | 21845 |\n| 81 | 21845 | 0 | 341 | 21845 |\n| 81 | 21845 | 0 | 853 | 21845 |\n| 81 | 21845 | 0 | 1365 | 21845 |\n| 81 | 21845 | 0 | 1877 | 21845 |\n| 81 | 21845 | 0 | 2389 | 21845 |\n| 81 | 21845 | 0 | 2901 | 21845 |\n| 81 | 21845 | 0 | 3413 | 21845 |\n| 81 | 21845 | 0 | 3925 | 21845 |"},RAM16K:{"RAM16K.hdl":y,"RAM16K.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/3/b/RAM16K.tst\n\noutput-list time%S1.3.1 in%D1.6.1 load%B2.1.1 address%D2.5.2 out%D1.6.1;\n\nset in 0,\nset load 0,\nset address 0,\ntick,\noutput;\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\ntock,\noutput;\n\nset in 4321,\nset load 0,\ntick,\noutput;\ntock,\noutput;\n\nset load 1,\nset address 4321,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address 0,\ntick,\noutput;\ntock,\noutput;\n\nset in 12345,\nset address 12345,\ntick,\noutput;\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\ntick,\noutput;\ntock,\noutput;\n\nset address 4321,\neval,\noutput;\n\nset in 16383,\ntick,\noutput;\ntock,\noutput;\n\nset load 1,\nset address 16383,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\ntick,\noutput;\ntock,\noutput;\n\nset address 12345,\neval,\noutput;\n\nset address 16383,\neval,\noutput;\n\n\nset load 0,\nset address %B10101010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B10101010101001,\neval,\noutput;\nset address %B10101010101010,\neval,\noutput;\nset address %B10101010101011,\neval,\noutput;\nset address %B10101010101100,\neval,\noutput;\nset address %B10101010101101,\neval,\noutput;\nset address %B10101010101110,\neval,\noutput;\nset address %B10101010101111,\neval,\noutput;\n\nset load 1,\nset in %B0101010101010101,\nset address %B10101010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B10101010101001,\ntick,\noutput,\ntock,\noutput;\nset address %B10101010101010,\ntick,\noutput,\ntock,\noutput;\nset address %B10101010101011,\ntick,\noutput,\ntock,\noutput;\nset address %B10101010101100,\ntick,\noutput,\ntock,\noutput;\nset address %B10101010101101,\ntick,\noutput,\ntock,\noutput;\nset address %B10101010101110,\ntick,\noutput,\ntock,\noutput;\nset address %B10101010101111,\ntick,\noutput,\ntock,\noutput;\n\nset load 0,\nset address %B10101010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B10101010101001,\neval,\noutput;\nset address %B10101010101010,\neval,\noutput;\nset address %B10101010101011,\neval,\noutput;\nset address %B10101010101100,\neval,\noutput;\nset address %B10101010101101,\neval,\noutput;\nset address %B10101010101110,\neval,\noutput;\nset address %B10101010101111,\neval,\noutput;\n\nset load 1,\nset address %B10101010101000,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B10101010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B10101010101001,\neval,\noutput;\nset address %B10101010101010,\neval,\noutput;\nset address %B10101010101011,\neval,\noutput;\nset address %B10101010101100,\neval,\noutput;\nset address %B10101010101101,\neval,\noutput;\nset address %B10101010101110,\neval,\noutput;\nset address %B10101010101111,\neval,\noutput;\n\nset load 1,\nset address %B10101010101000,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B10101010101001,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B10101010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B10101010101001,\neval,\noutput;\nset address %B10101010101010,\neval,\noutput;\nset address %B10101010101011,\neval,\noutput;\nset address %B10101010101100,\neval,\noutput;\nset address %B10101010101101,\neval,\noutput;\nset address %B10101010101110,\neval,\noutput;\nset address %B10101010101111,\neval,\noutput;\n\nset load 1,\nset address %B10101010101001,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B10101010101010,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B10101010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B10101010101001,\neval,\noutput;\nset address %B10101010101010,\neval,\noutput;\nset address %B10101010101011,\neval,\noutput;\nset address %B10101010101100,\neval,\noutput;\nset address %B10101010101101,\neval,\noutput;\nset address %B10101010101110,\neval,\noutput;\nset address %B10101010101111,\neval,\noutput;\n\nset load 1,\nset address %B10101010101010,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B10101010101011,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B10101010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B10101010101001,\neval,\noutput;\nset address %B10101010101010,\neval,\noutput;\nset address %B10101010101011,\neval,\noutput;\nset address %B10101010101100,\neval,\noutput;\nset address %B10101010101101,\neval,\noutput;\nset address %B10101010101110,\neval,\noutput;\nset address %B10101010101111,\neval,\noutput;\n\nset load 1,\nset address %B10101010101011,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B10101010101100,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B10101010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B10101010101001,\neval,\noutput;\nset address %B10101010101010,\neval,\noutput;\nset address %B10101010101011,\neval,\noutput;\nset address %B10101010101100,\neval,\noutput;\nset address %B10101010101101,\neval,\noutput;\nset address %B10101010101110,\neval,\noutput;\nset address %B10101010101111,\neval,\noutput;\n\nset load 1,\nset address %B10101010101100,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B10101010101101,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B10101010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B10101010101001,\neval,\noutput;\nset address %B10101010101010,\neval,\noutput;\nset address %B10101010101011,\neval,\noutput;\nset address %B10101010101100,\neval,\noutput;\nset address %B10101010101101,\neval,\noutput;\nset address %B10101010101110,\neval,\noutput;\nset address %B10101010101111,\neval,\noutput;\n\nset load 1,\nset address %B10101010101101,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B10101010101110,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B10101010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B10101010101001,\neval,\noutput;\nset address %B10101010101010,\neval,\noutput;\nset address %B10101010101011,\neval,\noutput;\nset address %B10101010101100,\neval,\noutput;\nset address %B10101010101101,\neval,\noutput;\nset address %B10101010101110,\neval,\noutput;\nset address %B10101010101111,\neval,\noutput;\n\nset load 1,\nset address %B10101010101110,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B10101010101111,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B10101010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B10101010101001,\neval,\noutput;\nset address %B10101010101010,\neval,\noutput;\nset address %B10101010101011,\neval,\noutput;\nset address %B10101010101100,\neval,\noutput;\nset address %B10101010101101,\neval,\noutput;\nset address %B10101010101110,\neval,\noutput;\nset address %B10101010101111,\neval,\noutput;\n\nset load 1,\nset address %B10101010101111,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\n\nset load 0,\nset address %B10101010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B10101010101001,\neval,\noutput;\nset address %B10101010101010,\neval,\noutput;\nset address %B10101010101011,\neval,\noutput;\nset address %B10101010101100,\neval,\noutput;\nset address %B10101010101101,\neval,\noutput;\nset address %B10101010101110,\neval,\noutput;\nset address %B10101010101111,\neval,\noutput;\n\n\nset load 0,\nset address %B00010101010101,\ntick,\noutput;\ntock,\noutput;\nset address %B00110101010101,\neval,\noutput;\nset address %B01010101010101,\neval,\noutput;\nset address %B01110101010101,\neval,\noutput;\nset address %B10010101010101,\neval,\noutput;\nset address %B10110101010101,\neval,\noutput;\nset address %B11010101010101,\neval,\noutput;\nset address %B11110101010101,\neval,\noutput;\n\nset load 1,\nset in %B0101010101010101,\nset address %B00010101010101,\ntick,\noutput;\ntock,\noutput;\nset address %B00110101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B01010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B01110101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B10010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B10110101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B11010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B11110101010101,\ntick,\noutput,\ntock,\noutput;\n\nset load 0,\nset address %B00010101010101,\ntick,\noutput;\ntock,\noutput;\nset address %B00110101010101,\neval,\noutput;\nset address %B01010101010101,\neval,\noutput;\nset address %B01110101010101,\neval,\noutput;\nset address %B10010101010101,\neval,\noutput;\nset address %B10110101010101,\neval,\noutput;\nset address %B11010101010101,\neval,\noutput;\nset address %B11110101010101,\neval,\noutput;\n\nset load 1,\nset address %B00010101010101,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B00010101010101,\ntick,\noutput;\ntock,\noutput;\nset address %B00110101010101,\neval,\noutput;\nset address %B01010101010101,\neval,\noutput;\nset address %B01110101010101,\neval,\noutput;\nset address %B10010101010101,\neval,\noutput;\nset address %B10110101010101,\neval,\noutput;\nset address %B11010101010101,\neval,\noutput;\nset address %B11110101010101,\neval,\noutput;\n\nset load 1,\nset address %B00010101010101,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B00110101010101,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B00010101010101,\ntick,\noutput;\ntock,\noutput;\nset address %B00110101010101,\neval,\noutput;\nset address %B01010101010101,\neval,\noutput;\nset address %B01110101010101,\neval,\noutput;\nset address %B10010101010101,\neval,\noutput;\nset address %B10110101010101,\neval,\noutput;\nset address %B11010101010101,\neval,\noutput;\nset address %B11110101010101,\neval,\noutput;\n\nset load 1,\nset address %B00110101010101,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B01010101010101,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B00010101010101,\ntick,\noutput;\ntock,\noutput;\nset address %B00110101010101,\neval,\noutput;\nset address %B01010101010101,\neval,\noutput;\nset address %B01110101010101,\neval,\noutput;\nset address %B10010101010101,\neval,\noutput;\nset address %B10110101010101,\neval,\noutput;\nset address %B11010101010101,\neval,\noutput;\nset address %B11110101010101,\neval,\noutput;\n\nset load 1,\nset address %B01010101010101,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B01110101010101,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B00010101010101,\ntick,\noutput;\ntock,\noutput;\nset address %B00110101010101,\neval,\noutput;\nset address %B01010101010101,\neval,\noutput;\nset address %B01110101010101,\neval,\noutput;\nset address %B10010101010101,\neval,\noutput;\nset address %B10110101010101,\neval,\noutput;\nset address %B11010101010101,\neval,\noutput;\nset address %B11110101010101,\neval,\noutput;\n\nset load 1,\nset address %B01110101010101,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B10010101010101,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B00010101010101,\ntick,\noutput;\ntock,\noutput;\nset address %B00110101010101,\neval,\noutput;\nset address %B01010101010101,\neval,\noutput;\nset address %B01110101010101,\neval,\noutput;\nset address %B10010101010101,\neval,\noutput;\nset address %B10110101010101,\neval,\noutput;\nset address %B11010101010101,\neval,\noutput;\nset address %B11110101010101,\neval,\noutput;\n\nset load 1,\nset address %B10010101010101,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B10110101010101,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B00010101010101,\ntick,\noutput;\ntock,\noutput;\nset address %B00110101010101,\neval,\noutput;\nset address %B01010101010101,\neval,\noutput;\nset address %B01110101010101,\neval,\noutput;\nset address %B10010101010101,\neval,\noutput;\nset address %B10110101010101,\neval,\noutput;\nset address %B11010101010101,\neval,\noutput;\nset address %B11110101010101,\neval,\noutput;\n\nset load 1,\nset address %B10110101010101,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B11010101010101,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B00010101010101,\ntick,\noutput;\ntock,\noutput;\nset address %B00110101010101,\neval,\noutput;\nset address %B01010101010101,\neval,\noutput;\nset address %B01110101010101,\neval,\noutput;\nset address %B10010101010101,\neval,\noutput;\nset address %B10110101010101,\neval,\noutput;\nset address %B11010101010101,\neval,\noutput;\nset address %B11110101010101,\neval,\noutput;\n\nset load 1,\nset address %B11010101010101,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B11110101010101,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B00010101010101,\ntick,\noutput;\ntock,\noutput;\nset address %B00110101010101,\neval,\noutput;\nset address %B01010101010101,\neval,\noutput;\nset address %B01110101010101,\neval,\noutput;\nset address %B10010101010101,\neval,\noutput;\nset address %B10110101010101,\neval,\noutput;\nset address %B11010101010101,\neval,\noutput;\nset address %B11110101010101,\neval,\noutput;\n\nset load 1,\nset address %B11110101010101,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\n\nset load 0,\nset address %B00010101010101,\ntick,\noutput;\ntock,\noutput;\nset address %B00110101010101,\neval,\noutput;\nset address %B01010101010101,\neval,\noutput;\nset address %B01110101010101,\neval,\noutput;\nset address %B10010101010101,\neval,\noutput;\nset address %B10110101010101,\neval,\noutput;\nset address %B11010101010101,\neval,\noutput;\nset address %B11110101010101,\neval,\noutput;',"RAM16K.cmp":"|time | in |load| address | out |\n| 0+ | 0 | 0 | 0 | 0 |\n| 1 | 0 | 0 | 0 | 0 |\n| 1+ | 0 | 1 | 0 | 0 |\n| 2 | 0 | 1 | 0 | 0 |\n| 2+ | 4321 | 0 | 0 | 0 |\n| 3 | 4321 | 0 | 0 | 0 |\n| 3+ | 4321 | 1 | 4321 | 0 |\n| 4 | 4321 | 1 | 4321 | 4321 |\n| 4+ | 4321 | 0 | 0 | 0 |\n| 5 | 4321 | 0 | 0 | 0 |\n| 5+ | 12345 | 0 | 12345 | 0 |\n| 6 | 12345 | 0 | 12345 | 0 |\n| 6+ | 12345 | 1 | 12345 | 0 |\n| 7 | 12345 | 1 | 12345 | 12345 |\n| 7+ | 12345 | 0 | 12345 | 12345 |\n| 8 | 12345 | 0 | 12345 | 12345 |\n| 8 | 12345 | 0 | 4321 | 4321 |\n| 8+ | 16383 | 0 | 4321 | 4321 |\n| 9 | 16383 | 0 | 4321 | 4321 |\n| 9+ | 16383 | 1 | 16383 | 0 |\n| 10 | 16383 | 1 | 16383 | 16383 |\n| 10+ | 16383 | 0 | 16383 | 16383 |\n| 11 | 16383 | 0 | 16383 | 16383 |\n| 11 | 16383 | 0 | 12345 | 12345 |\n| 11 | 16383 | 0 | 16383 | 16383 |\n| 11+ | 16383 | 0 | 10920 | 0 |\n| 12 | 16383 | 0 | 10920 | 0 |\n| 12 | 16383 | 0 | 10921 | 0 |\n| 12 | 16383 | 0 | 10922 | 0 |\n| 12 | 16383 | 0 | 10923 | 0 |\n| 12 | 16383 | 0 | 10924 | 0 |\n| 12 | 16383 | 0 | 10925 | 0 |\n| 12 | 16383 | 0 | 10926 | 0 |\n| 12 | 16383 | 0 | 10927 | 0 |\n| 12+ | 21845 | 1 | 10920 | 0 |\n| 13 | 21845 | 1 | 10920 | 21845 |\n| 13+ | 21845 | 1 | 10921 | 0 |\n| 14 | 21845 | 1 | 10921 | 21845 |\n| 14+ | 21845 | 1 | 10922 | 0 |\n| 15 | 21845 | 1 | 10922 | 21845 |\n| 15+ | 21845 | 1 | 10923 | 0 |\n| 16 | 21845 | 1 | 10923 | 21845 |\n| 16+ | 21845 | 1 | 10924 | 0 |\n| 17 | 21845 | 1 | 10924 | 21845 |\n| 17+ | 21845 | 1 | 10925 | 0 |\n| 18 | 21845 | 1 | 10925 | 21845 |\n| 18+ | 21845 | 1 | 10926 | 0 |\n| 19 | 21845 | 1 | 10926 | 21845 |\n| 19+ | 21845 | 1 | 10927 | 0 |\n| 20 | 21845 | 1 | 10927 | 21845 |\n| 20+ | 21845 | 0 | 10920 | 21845 |\n| 21 | 21845 | 0 | 10920 | 21845 |\n| 21 | 21845 | 0 | 10921 | 21845 |\n| 21 | 21845 | 0 | 10922 | 21845 |\n| 21 | 21845 | 0 | 10923 | 21845 |\n| 21 | 21845 | 0 | 10924 | 21845 |\n| 21 | 21845 | 0 | 10925 | 21845 |\n| 21 | 21845 | 0 | 10926 | 21845 |\n| 21 | 21845 | 0 | 10927 | 21845 |\n| 21+ | -21846 | 1 | 10920 | 21845 |\n| 22 | -21846 | 1 | 10920 | -21846 |\n| 22+ | -21846 | 0 | 10920 | -21846 |\n| 23 | -21846 | 0 | 10920 | -21846 |\n| 23 | -21846 | 0 | 10921 | 21845 |\n| 23 | -21846 | 0 | 10922 | 21845 |\n| 23 | -21846 | 0 | 10923 | 21845 |\n| 23 | -21846 | 0 | 10924 | 21845 |\n| 23 | -21846 | 0 | 10925 | 21845 |\n| 23 | -21846 | 0 | 10926 | 21845 |\n| 23 | -21846 | 0 | 10927 | 21845 |\n| 23+ | 21845 | 1 | 10920 | -21846 |\n| 24 | 21845 | 1 | 10920 | 21845 |\n| 24+ | -21846 | 1 | 10921 | 21845 |\n| 25 | -21846 | 1 | 10921 | -21846 |\n| 25+ | -21846 | 0 | 10920 | 21845 |\n| 26 | -21846 | 0 | 10920 | 21845 |\n| 26 | -21846 | 0 | 10921 | -21846 |\n| 26 | -21846 | 0 | 10922 | 21845 |\n| 26 | -21846 | 0 | 10923 | 21845 |\n| 26 | -21846 | 0 | 10924 | 21845 |\n| 26 | -21846 | 0 | 10925 | 21845 |\n| 26 | -21846 | 0 | 10926 | 21845 |\n| 26 | -21846 | 0 | 10927 | 21845 |\n| 26+ | 21845 | 1 | 10921 | -21846 |\n| 27 | 21845 | 1 | 10921 | 21845 |\n| 27+ | -21846 | 1 | 10922 | 21845 |\n| 28 | -21846 | 1 | 10922 | -21846 |\n| 28+ | -21846 | 0 | 10920 | 21845 |\n| 29 | -21846 | 0 | 10920 | 21845 |\n| 29 | -21846 | 0 | 10921 | 21845 |\n| 29 | -21846 | 0 | 10922 | -21846 |\n| 29 | -21846 | 0 | 10923 | 21845 |\n| 29 | -21846 | 0 | 10924 | 21845 |\n| 29 | -21846 | 0 | 10925 | 21845 |\n| 29 | -21846 | 0 | 10926 | 21845 |\n| 29 | -21846 | 0 | 10927 | 21845 |\n| 29+ | 21845 | 1 | 10922 | -21846 |\n| 30 | 21845 | 1 | 10922 | 21845 |\n| 30+ | -21846 | 1 | 10923 | 21845 |\n| 31 | -21846 | 1 | 10923 | -21846 |\n| 31+ | -21846 | 0 | 10920 | 21845 |\n| 32 | -21846 | 0 | 10920 | 21845 |\n| 32 | -21846 | 0 | 10921 | 21845 |\n| 32 | -21846 | 0 | 10922 | 21845 |\n| 32 | -21846 | 0 | 10923 | -21846 |\n| 32 | -21846 | 0 | 10924 | 21845 |\n| 32 | -21846 | 0 | 10925 | 21845 |\n| 32 | -21846 | 0 | 10926 | 21845 |\n| 32 | -21846 | 0 | 10927 | 21845 |\n| 32+ | 21845 | 1 | 10923 | -21846 |\n| 33 | 21845 | 1 | 10923 | 21845 |\n| 33+ | -21846 | 1 | 10924 | 21845 |\n| 34 | -21846 | 1 | 10924 | -21846 |\n| 34+ | -21846 | 0 | 10920 | 21845 |\n| 35 | -21846 | 0 | 10920 | 21845 |\n| 35 | -21846 | 0 | 10921 | 21845 |\n| 35 | -21846 | 0 | 10922 | 21845 |\n| 35 | -21846 | 0 | 10923 | 21845 |\n| 35 | -21846 | 0 | 10924 | -21846 |\n| 35 | -21846 | 0 | 10925 | 21845 |\n| 35 | -21846 | 0 | 10926 | 21845 |\n| 35 | -21846 | 0 | 10927 | 21845 |\n| 35+ | 21845 | 1 | 10924 | -21846 |\n| 36 | 21845 | 1 | 10924 | 21845 |\n| 36+ | -21846 | 1 | 10925 | 21845 |\n| 37 | -21846 | 1 | 10925 | -21846 |\n| 37+ | -21846 | 0 | 10920 | 21845 |\n| 38 | -21846 | 0 | 10920 | 21845 |\n| 38 | -21846 | 0 | 10921 | 21845 |\n| 38 | -21846 | 0 | 10922 | 21845 |\n| 38 | -21846 | 0 | 10923 | 21845 |\n| 38 | -21846 | 0 | 10924 | 21845 |\n| 38 | -21846 | 0 | 10925 | -21846 |\n| 38 | -21846 | 0 | 10926 | 21845 |\n| 38 | -21846 | 0 | 10927 | 21845 |\n| 38+ | 21845 | 1 | 10925 | -21846 |\n| 39 | 21845 | 1 | 10925 | 21845 |\n| 39+ | -21846 | 1 | 10926 | 21845 |\n| 40 | -21846 | 1 | 10926 | -21846 |\n| 40+ | -21846 | 0 | 10920 | 21845 |\n| 41 | -21846 | 0 | 10920 | 21845 |\n| 41 | -21846 | 0 | 10921 | 21845 |\n| 41 | -21846 | 0 | 10922 | 21845 |\n| 41 | -21846 | 0 | 10923 | 21845 |\n| 41 | -21846 | 0 | 10924 | 21845 |\n| 41 | -21846 | 0 | 10925 | 21845 |\n| 41 | -21846 | 0 | 10926 | -21846 |\n| 41 | -21846 | 0 | 10927 | 21845 |\n| 41+ | 21845 | 1 | 10926 | -21846 |\n| 42 | 21845 | 1 | 10926 | 21845 |\n| 42+ | -21846 | 1 | 10927 | 21845 |\n| 43 | -21846 | 1 | 10927 | -21846 |\n| 43+ | -21846 | 0 | 10920 | 21845 |\n| 44 | -21846 | 0 | 10920 | 21845 |\n| 44 | -21846 | 0 | 10921 | 21845 |\n| 44 | -21846 | 0 | 10922 | 21845 |\n| 44 | -21846 | 0 | 10923 | 21845 |\n| 44 | -21846 | 0 | 10924 | 21845 |\n| 44 | -21846 | 0 | 10925 | 21845 |\n| 44 | -21846 | 0 | 10926 | 21845 |\n| 44 | -21846 | 0 | 10927 | -21846 |\n| 44+ | 21845 | 1 | 10927 | -21846 |\n| 45 | 21845 | 1 | 10927 | 21845 |\n| 45+ | 21845 | 0 | 10920 | 21845 |\n| 46 | 21845 | 0 | 10920 | 21845 |\n| 46 | 21845 | 0 | 10921 | 21845 |\n| 46 | 21845 | 0 | 10922 | 21845 |\n| 46 | 21845 | 0 | 10923 | 21845 |\n| 46 | 21845 | 0 | 10924 | 21845 |\n| 46 | 21845 | 0 | 10925 | 21845 |\n| 46 | 21845 | 0 | 10926 | 21845 |\n| 46 | 21845 | 0 | 10927 | 21845 |\n| 46+ | 21845 | 0 | 1365 | 0 |\n| 47 | 21845 | 0 | 1365 | 0 |\n| 47 | 21845 | 0 | 3413 | 0 |\n| 47 | 21845 | 0 | 5461 | 0 |\n| 47 | 21845 | 0 | 7509 | 0 |\n| 47 | 21845 | 0 | 9557 | 0 |\n| 47 | 21845 | 0 | 11605 | 0 |\n| 47 | 21845 | 0 | 13653 | 0 |\n| 47 | 21845 | 0 | 15701 | 0 |\n| 47+ | 21845 | 1 | 1365 | 0 |\n| 48 | 21845 | 1 | 1365 | 21845 |\n| 48+ | 21845 | 1 | 3413 | 0 |\n| 49 | 21845 | 1 | 3413 | 21845 |\n| 49+ | 21845 | 1 | 5461 | 0 |\n| 50 | 21845 | 1 | 5461 | 21845 |\n| 50+ | 21845 | 1 | 7509 | 0 |\n| 51 | 21845 | 1 | 7509 | 21845 |\n| 51+ | 21845 | 1 | 9557 | 0 |\n| 52 | 21845 | 1 | 9557 | 21845 |\n| 52+ | 21845 | 1 | 11605 | 0 |\n| 53 | 21845 | 1 | 11605 | 21845 |\n| 53+ | 21845 | 1 | 13653 | 0 |\n| 54 | 21845 | 1 | 13653 | 21845 |\n| 54+ | 21845 | 1 | 15701 | 0 |\n| 55 | 21845 | 1 | 15701 | 21845 |\n| 55+ | 21845 | 0 | 1365 | 21845 |\n| 56 | 21845 | 0 | 1365 | 21845 |\n| 56 | 21845 | 0 | 3413 | 21845 |\n| 56 | 21845 | 0 | 5461 | 21845 |\n| 56 | 21845 | 0 | 7509 | 21845 |\n| 56 | 21845 | 0 | 9557 | 21845 |\n| 56 | 21845 | 0 | 11605 | 21845 |\n| 56 | 21845 | 0 | 13653 | 21845 |\n| 56 | 21845 | 0 | 15701 | 21845 |\n| 56+ | -21846 | 1 | 1365 | 21845 |\n| 57 | -21846 | 1 | 1365 | -21846 |\n| 57+ | -21846 | 0 | 1365 | -21846 |\n| 58 | -21846 | 0 | 1365 | -21846 |\n| 58 | -21846 | 0 | 3413 | 21845 |\n| 58 | -21846 | 0 | 5461 | 21845 |\n| 58 | -21846 | 0 | 7509 | 21845 |\n| 58 | -21846 | 0 | 9557 | 21845 |\n| 58 | -21846 | 0 | 11605 | 21845 |\n| 58 | -21846 | 0 | 13653 | 21845 |\n| 58 | -21846 | 0 | 15701 | 21845 |\n| 58+ | 21845 | 1 | 1365 | -21846 |\n| 59 | 21845 | 1 | 1365 | 21845 |\n| 59+ | -21846 | 1 | 3413 | 21845 |\n| 60 | -21846 | 1 | 3413 | -21846 |\n| 60+ | -21846 | 0 | 1365 | 21845 |\n| 61 | -21846 | 0 | 1365 | 21845 |\n| 61 | -21846 | 0 | 3413 | -21846 |\n| 61 | -21846 | 0 | 5461 | 21845 |\n| 61 | -21846 | 0 | 7509 | 21845 |\n| 61 | -21846 | 0 | 9557 | 21845 |\n| 61 | -21846 | 0 | 11605 | 21845 |\n| 61 | -21846 | 0 | 13653 | 21845 |\n| 61 | -21846 | 0 | 15701 | 21845 |\n| 61+ | 21845 | 1 | 3413 | -21846 |\n| 62 | 21845 | 1 | 3413 | 21845 |\n| 62+ | -21846 | 1 | 5461 | 21845 |\n| 63 | -21846 | 1 | 5461 | -21846 |\n| 63+ | -21846 | 0 | 1365 | 21845 |\n| 64 | -21846 | 0 | 1365 | 21845 |\n| 64 | -21846 | 0 | 3413 | 21845 |\n| 64 | -21846 | 0 | 5461 | -21846 |\n| 64 | -21846 | 0 | 7509 | 21845 |\n| 64 | -21846 | 0 | 9557 | 21845 |\n| 64 | -21846 | 0 | 11605 | 21845 |\n| 64 | -21846 | 0 | 13653 | 21845 |\n| 64 | -21846 | 0 | 15701 | 21845 |\n| 64+ | 21845 | 1 | 5461 | -21846 |\n| 65 | 21845 | 1 | 5461 | 21845 |\n| 65+ | -21846 | 1 | 7509 | 21845 |\n| 66 | -21846 | 1 | 7509 | -21846 |\n| 66+ | -21846 | 0 | 1365 | 21845 |\n| 67 | -21846 | 0 | 1365 | 21845 |\n| 67 | -21846 | 0 | 3413 | 21845 |\n| 67 | -21846 | 0 | 5461 | 21845 |\n| 67 | -21846 | 0 | 7509 | -21846 |\n| 67 | -21846 | 0 | 9557 | 21845 |\n| 67 | -21846 | 0 | 11605 | 21845 |\n| 67 | -21846 | 0 | 13653 | 21845 |\n| 67 | -21846 | 0 | 15701 | 21845 |\n| 67+ | 21845 | 1 | 7509 | -21846 |\n| 68 | 21845 | 1 | 7509 | 21845 |\n| 68+ | -21846 | 1 | 9557 | 21845 |\n| 69 | -21846 | 1 | 9557 | -21846 |\n| 69+ | -21846 | 0 | 1365 | 21845 |\n| 70 | -21846 | 0 | 1365 | 21845 |\n| 70 | -21846 | 0 | 3413 | 21845 |\n| 70 | -21846 | 0 | 5461 | 21845 |\n| 70 | -21846 | 0 | 7509 | 21845 |\n| 70 | -21846 | 0 | 9557 | -21846 |\n| 70 | -21846 | 0 | 11605 | 21845 |\n| 70 | -21846 | 0 | 13653 | 21845 |\n| 70 | -21846 | 0 | 15701 | 21845 |\n| 70+ | 21845 | 1 | 9557 | -21846 |\n| 71 | 21845 | 1 | 9557 | 21845 |\n| 71+ | -21846 | 1 | 11605 | 21845 |\n| 72 | -21846 | 1 | 11605 | -21846 |\n| 72+ | -21846 | 0 | 1365 | 21845 |\n| 73 | -21846 | 0 | 1365 | 21845 |\n| 73 | -21846 | 0 | 3413 | 21845 |\n| 73 | -21846 | 0 | 5461 | 21845 |\n| 73 | -21846 | 0 | 7509 | 21845 |\n| 73 | -21846 | 0 | 9557 | 21845 |\n| 73 | -21846 | 0 | 11605 | -21846 |\n| 73 | -21846 | 0 | 13653 | 21845 |\n| 73 | -21846 | 0 | 15701 | 21845 |\n| 73+ | 21845 | 1 | 11605 | -21846 |\n| 74 | 21845 | 1 | 11605 | 21845 |\n| 74+ | -21846 | 1 | 13653 | 21845 |\n| 75 | -21846 | 1 | 13653 | -21846 |\n| 75+ | -21846 | 0 | 1365 | 21845 |\n| 76 | -21846 | 0 | 1365 | 21845 |\n| 76 | -21846 | 0 | 3413 | 21845 |\n| 76 | -21846 | 0 | 5461 | 21845 |\n| 76 | -21846 | 0 | 7509 | 21845 |\n| 76 | -21846 | 0 | 9557 | 21845 |\n| 76 | -21846 | 0 | 11605 | 21845 |\n| 76 | -21846 | 0 | 13653 | -21846 |\n| 76 | -21846 | 0 | 15701 | 21845 |\n| 76+ | 21845 | 1 | 13653 | -21846 |\n| 77 | 21845 | 1 | 13653 | 21845 |\n| 77+ | -21846 | 1 | 15701 | 21845 |\n| 78 | -21846 | 1 | 15701 | -21846 |\n| 78+ | -21846 | 0 | 1365 | 21845 |\n| 79 | -21846 | 0 | 1365 | 21845 |\n| 79 | -21846 | 0 | 3413 | 21845 |\n| 79 | -21846 | 0 | 5461 | 21845 |\n| 79 | -21846 | 0 | 7509 | 21845 |\n| 79 | -21846 | 0 | 9557 | 21845 |\n| 79 | -21846 | 0 | 11605 | 21845 |\n| 79 | -21846 | 0 | 13653 | 21845 |\n| 79 | -21846 | 0 | 15701 | -21846 |\n| 79+ | 21845 | 1 | 15701 | -21846 |\n| 80 | 21845 | 1 | 15701 | 21845 |\n| 80+ | 21845 | 0 | 1365 | 21845 |\n| 81 | 21845 | 0 | 1365 | 21845 |\n| 81 | 21845 | 0 | 3413 | 21845 |\n| 81 | 21845 | 0 | 5461 | 21845 |\n| 81 | 21845 | 0 | 7509 | 21845 |\n| 81 | 21845 | 0 | 9557 | 21845 |\n| 81 | 21845 | 0 | 11605 | 21845 |\n| 81 | 21845 | 0 | 13653 | 21845 |\n| 81 | 21845 | 0 | 15701 | 21845 |"}},A={DFF:'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/03/DFF.hdl\n/**\n * Data Flip-flop:\n * maintains its current value:\n * out(t+1) = in(t)\n */\nCHIP DFF {\n IN in;\n OUT out;\n\n PARTS:\n BUILTIN DFF;\n CLOCKED in;\n}'};async function b(n){await n.pushd("/projects/03"),await(0,r.cL)(n,R),await n.popd()}async function T(n){await n.pushd("/projects/03"),await c(n,R,".tst"),await c(n,R,".cmp"),await n.popd()}const g={Mult:{"Mult.asm":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/4/Mult.asm\n\n// Multiplies R0 and R1 and stores the result in R2.\n// (R0, R1, R2 refer to RAM[0], RAM[1], and RAM[2], respectively.)\n// The algorithm is based on repetitive addition.\n\n//// Replace this comment with your code.',"Mult.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/4/mult/Mult.tst\n\n// Tests the Mult program, designed to compute R2 = R0 * R1.\n// Tests the program by having it multiply several sets of\n// R0 and R1 values.\n\noutput-list RAM[0]%D2.6.2 RAM[1]%D2.6.2 RAM[2]%D2.6.2;\n\nset RAM[0] 0, // Sets R0 and R1 to some input values\nset RAM[1] 0,\nset RAM[2] -1; // Ensures that the program initialized R2 to 0\nrepeat 20 {\n ticktock;\n}\nset RAM[0] 0, // Restores R0 and R1 in case the program changed them\nset RAM[1] 0,\noutput;\n\nset PC 0,\nset RAM[0] 1, // Sets R0 and R1 to some input values\nset RAM[1] 0,\nset RAM[2] -1; // Ensures that the program initialized R2 to 0\nrepeat 50 {\n ticktock;\n}\nset RAM[0] 1, // Restores R0 and R1 in case the program changed them\nset RAM[1] 0,\noutput;\n\nset PC 0,\nset RAM[0] 0, // Sets R0 and R1 to some input values\nset RAM[1] 2,\nset RAM[2] -1; // Ensures that the program initialized R2 to 0\nrepeat 80 {\n ticktock;\n}\nset RAM[0] 0, // Restores R0 and R1 in case the program changed them\nset RAM[1] 2,\noutput;\n\nset PC 0,\nset RAM[0] 3, // Sets R0 and R1 to some input values\nset RAM[1] 1,\nset RAM[2] -1; // Ensures that the program initialized R2 to 0\nrepeat 120 {\n ticktock;\n}\nset RAM[0] 3, // Restores R0 and R1 in case the program changed them\nset RAM[1] 1,\noutput;\n\nset PC 0,\nset RAM[0] 2, // Sets R0 and R1 to some input values\nset RAM[1] 4,\nset RAM[2] -1; // Ensures that the program initialized R2 to 0\nrepeat 150 {\n ticktock;\n}\nset RAM[0] 2, // Restores R0 and R1 in case the program changed them\nset RAM[1] 4,\noutput;\n\nset PC 0,\nset RAM[0] 6, // Sets R0 and R1 to some input values\nset RAM[1] 7,\nset RAM[2] -1; // Ensures that the program initialized R2 to 0\nrepeat 210 {\n ticktock;\n}\nset RAM[0] 6, // Restores R0 and R1 in case the program changed them\nset RAM[1] 7,\noutput;',"Mult.cmp":"| RAM[0] | RAM[1] | RAM[2] |\n| 0 | 0 | 0 |\n| 1 | 0 | 0 |\n| 0 | 2 | 0 |\n| 3 | 1 | 3 |\n| 2 | 4 | 8 |\n| 6 | 7 | 42 |"},Fill:{"Fill.asm":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/4/Fill.asm\n\n// Runs an infinite loop that listens to the keyboard input. \n// When a key is pressed (any key), the program blackens the screen,\n// i.e. writes "black" in every pixel. When no key is pressed, \n// the screen should be cleared.\n\n//// Replace this comment with your code.',"Fill.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/4/fill/Fill.tst\n\n// Tests the Fill.hack program in the CPU emulator.\n\necho "Select the highest speed and \'enable keyboard\'. Then press any key for some time, and inspect the screen.";\n\nrepeat {\n ticktock;\n}',"FillAutomatic.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/4/fill/FillAutomatic\n\n// This script can be used to test the Fill program automatically, \n// rather than interactively. Specifically, the script sets the keyboard\n// memory map (RAM[24576]) to 0, 1, and then again to 0. This simulates the \n// acts of leaving the keyboard untouched, pressing some key, and then releasing\n// the key. After each one of these simulated events, the script outputs the values\n// of some selected registers from the screen memory map (RAM[16384]-RAM[24576]).\n// This is done in order to test that these registers are set to 000...0 or 111....1, \n// as mandated by how the Fill program should react to the keyboard events.\n\noutput-list RAM[16384]%D2.6.2 RAM[17648]%D2.6.2 RAM[18349]%D2.6.2 RAM[19444]%D2.6.2 RAM[20771]%D2.6.2 RAM[21031]%D2.6.2 RAM[22596]%D2.6.2 RAM[23754]%D2.6.2 RAM[24575]%D2.6.2;\n\nset RAM[24576] 0, // the keyboard is untouched\nrepeat 1000000 {\n ticktock;\n}\noutput; // tests that the screen is white\n\nset RAM[24576] 1, // a keyboard key is pressed\nrepeat 1000000 {\n ticktock;\n}\noutput; // tests that the screen is black\n\nset RAM[24576] 0, // the keyboard is untouched\nrepeat 1000000 {\n ticktock;\n}\noutput; // tests that the screen is white',"FillAutomatic.cmp":"|RAM[16384]|RAM[17648]|RAM[18349]|RAM[19444]|RAM[20771]|RAM[21031]|RAM[22596]|RAM[23754]|RAM[24575]|\n| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |\n| -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 |\n| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |"}};async function w(n){await n.pushd("/projects/04"),await(0,r.cL)(n,g),await n.popd()}async function S(n){await n.pushd("/projects/04"),await c(n,g,".tst"),await c(n,g,".cmp"),await n.popd()}const C="\n0000000000000010\n1110110000010000\n0000000000000011\n1110000010010000\n0000000000000000\n1110001100001000\n",x="0000000000000000\n1111110000010000\n0000000000000001\n1111010011010000\n0000000000001010\n1110001100000001\n0000000000000001\n1111110000010000\n0000000000001100\n1110101010000111\n0000000000000000\n1111110000010000\n0000000000000010\n1110001100001000\n0000000000001110\n1110101010000111",D="\n0000000000000000\n1111110000010000\n0000000000010111\n1110001100000110\n0000000000010000\n1110001100001000\n0100000000000000\n1110110000010000\n0000000000010001\n1110001100001000\n0000000000010001\n1111110000100000\n1110111010001000\n0000000000010001\n1111110000010000\n0000000000100000\n1110000010010000\n0000000000010001\n1110001100001000\n0000000000010000\n1111110010011000\n0000000000001010\n1110001100000001\n0000000000010111\n1110101010000111",P={Memory:{"Memory.hdl":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/5/Memory.hdl\n/**\n * The complete address space of the Hack computer\'s memory,\n * including RAM and memory-mapped I/O. \n * The chip facilitates read and write operations, as follows:\n * Read: out(t) = Memory[address(t)](t)\n * Write: if load(t-1) then Memory[address(t-1)](t) = in(t-1)\n * In words: the chip always outputs the value stored at the memory \n * location specified by address. If load=1, the in value is loaded \n * into the memory location specified by address. This value becomes \n * available through the out output from the next time step onward.\n * Address space rules:\n * Only the upper 16K+8K+1 words of the Memory chip are used. \n * Access to address>0x6000 is invalid and reads 0. Access to any address\n * in the range 0x4000-0x5FFF results in accessing the screen memory \n * map. Access to address 0x6000 results in accessing the keyboard \n * memory map. The behavior in these addresses is described in the Screen\n * and Keyboard chip specifications given in the lectures and the book.\n */\nCHIP Memory {\n IN in[16], load, address[15];\n OUT out[16];\n\n PARTS:\n\t//// Replace this comment with your code.\n}',"Memory.tst":"// This file is part of www.nand2tetris.org\n// and the book \"The Elements of Computing Systems\"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/05/Memory.tst\n\n// Tests the Memory chip by inputting values to selected addresses, \n// verifying that these addresses were indeed written to, and verifying \n// that other addresses were not accessed by mistake. In particular, we \n// focus on probing the registers in addresses 'lower RAM', 'upper RAM',\n// and 'Screen', which correspond to 0, %X2000, and %X4000 in Hexadecimal \n// (0, 8192 (8K), and 16385 (16K+1) in decimal).\n\noutput-list in%D1.6.1 load%B2.1.2 address%B1.15.1 out%D1.6.1;\n\necho \"Before you run this script, select the 'Screen' option from the 'View' menu\";\n\n// We've noticed a common design mistake in several students' Memory.hdl files.\n// This error leads to zeros being written in the offset of inactive memory segments\n// instead of the intended location. To identify this issue, the test should check not\n// only for incorrect writes into the wrong segment but also for any unexpected changes.\n// To prepare for this, we've initialized the memory with a specific number in the areas\n// where these erroneous writes might happen.\n\n//// Sets RAM[2000], RAM[4000] = 12345 (for the following overwrite test)\nset in 12345, set load 1, set address %X2000, tick, output; tock, output;\nset address %X4000, tick, output; tock, output;\n\nset in -1,\t\t\t\t// Sets RAM[0] = -1\nset load 1,\nset address 0,\ntick,\noutput;\ntock,\noutput;\n\nset in 9999,\t\t\t// RAM[0] holds value\nset load 0,\ntick,\noutput;\ntock,\noutput;\n\nset address %X2000,\t\t// Did not also write to upper RAM or Screen\neval,\noutput;\nset address %X4000,\neval,\noutput;\n\n//// Sets RAM[0], RAM[4000] = 12345 (for following overwrite test)\nset in 12345, set load 1, set address %X0000, tick, output; tock, output;\nset address %X4000, tick, output; tock, output;\n\nset in 2222,\t\t\t// Sets RAM[2000] = 2222\nset load 1,\nset address %X2000,\ntick,\noutput;\ntock,\noutput;\n\nset in 9999,\t\t\t// RAM[2000] holds value\nset load 0,\ntick,\noutput;\ntock,\noutput;\n\nset address 0,\t\t\t// Did not also write to lower RAM or Screen\neval,\noutput;\nset address %X4000,\neval,\noutput;\n\nset load 0,\t\t\t\t// Low order address bits connected\nset address %X0001, eval, output;\nset address %X0002, eval, output;\nset address %X0004, eval, output;\nset address %X0008, eval, output;\nset address %X0010, eval, output;\nset address %X0020, eval, output;\nset address %X0040, eval, output;\nset address %X0080, eval, output;\nset address %X0100, eval, output;\nset address %X0200, eval, output;\nset address %X0400, eval, output;\nset address %X0800, eval, output;\nset address %X1000, eval, output;\nset address %X2000, eval, output;\n\nset address %X1234,\t\t// RAM[1234] = 1234\nset in 1234,\nset load 1,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %X2234,\t\t// Did not also write to upper RAM or Screen \neval, output;\nset address %X6234,\neval, output;\n\nset address %X2345,\t\t// RAM[2345] = 2345\nset in 2345,\nset load 1,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %X0345,\t\t// Did not also write to lower RAM or Screen \neval, output;\nset address %X4345,\neval, output;\n\n//// Clears the overwrite detection value from the screen\nset in 0, set load 1, set address %X4000, tick, output; tock, output;\n\n// Keyboard test\n\nset address 24576,\necho \"Click the Keyboard icon and hold down the 'K' key (uppercase) until you see the next message...\",\n// It's important to keep holding the key down since if the system is busy,\n// the memory will zero itself before being outputted.\n\nwhile out <> 75 {\n tick, tock; // tick, tock prevents hang if sync. parts used in KB path.\n}\n\nclear-echo,\noutput;\n\n// Screen test\n\n//// Sets RAM[0FCF], RAM[2FCF] = 12345 (for following overwrite test)\nset in 12345, set load 1, set address %X0FCF, tick, output; tock, output;\nset address %X2FCF, tick, output; tock, output;\n\nset load 1,\nset in -1,\nset address %X4FCF,\ntick,\ntock,\noutput,\n\nset address %X504F,\ntick,\ntock,\noutput;\n\nset address %X0FCF,\t\t// Did not also write to lower or upper RAM\neval,\noutput;\nset address %X2FCF,\neval,\noutput;\n\nset load 0,\t\t\t\t// Low order address bits connected\nset address %X4FCE, eval, output;\nset address %X4FCD, eval, output;\nset address %X4FCB, eval, output;\nset address %X4FC7, eval, output;\nset address %X4FDF, eval, output;\nset address %X4FEF, eval, output;\nset address %X4F8F, eval, output;\nset address %X4F4F, eval, output;\nset address %X4ECF, eval, output;\nset address %X4DCF, eval, output;\nset address %X4BCF, eval, output;\nset address %X47CF, eval, output;\nset address %X5FCF, eval, output;\n\nset load 0,\nset address 24576,\necho \"Two horizontal lines should be in the middle of the screen. Hold down 'Y' (uppercase) until you see the next message ...\",\n// It's important to keep holding the key down since if the system is busy,\n// the memory will zero itself before being outputted.\n\nwhile out <> 89 {\n tick, tock; // tick, tock prevents hang if sync. parts used in KB path.\n}\n\nclear-echo,\noutput;","Memory.cmp":"| in |load | address | out |\n| 12345 | 1 | 010000000000000 | 0 |\n| 12345 | 1 | 010000000000000 | 12345 |\n| 12345 | 1 | 100000000000000 | 0 |\n| 12345 | 1 | 100000000000000 | 12345 |\n| -1 | 1 | 000000000000000 | 0 |\n| -1 | 1 | 000000000000000 | -1 |\n| 9999 | 0 | 000000000000000 | -1 |\n| 9999 | 0 | 000000000000000 | -1 |\n| 9999 | 0 | 010000000000000 | 12345 |\n| 9999 | 0 | 100000000000000 | 12345 |\n| 12345 | 1 | 000000000000000 | -1 |\n| 12345 | 1 | 000000000000000 | 12345 |\n| 12345 | 1 | 100000000000000 | 12345 |\n| 12345 | 1 | 100000000000000 | 12345 |\n| 2222 | 1 | 010000000000000 | 12345 |\n| 2222 | 1 | 010000000000000 | 2222 |\n| 9999 | 0 | 010000000000000 | 2222 |\n| 9999 | 0 | 010000000000000 | 2222 |\n| 9999 | 0 | 000000000000000 | 12345 |\n| 9999 | 0 | 100000000000000 | 12345 |\n| 9999 | 0 | 000000000000001 | 0 |\n| 9999 | 0 | 000000000000010 | 0 |\n| 9999 | 0 | 000000000000100 | 0 |\n| 9999 | 0 | 000000000001000 | 0 |\n| 9999 | 0 | 000000000010000 | 0 |\n| 9999 | 0 | 000000000100000 | 0 |\n| 9999 | 0 | 000000001000000 | 0 |\n| 9999 | 0 | 000000010000000 | 0 |\n| 9999 | 0 | 000000100000000 | 0 |\n| 9999 | 0 | 000001000000000 | 0 |\n| 9999 | 0 | 000010000000000 | 0 |\n| 9999 | 0 | 000100000000000 | 0 |\n| 9999 | 0 | 001000000000000 | 0 |\n| 9999 | 0 | 010000000000000 | 2222 |\n| 1234 | 1 | 001001000110100 | 0 |\n| 1234 | 1 | 001001000110100 | 1234 |\n| 1234 | 0 | 010001000110100 | 0 |\n| 1234 | 0 | 110001000110100 | 0 |\n| 2345 | 1 | 010001101000101 | 0 |\n| 2345 | 1 | 010001101000101 | 2345 |\n| 2345 | 0 | 000001101000101 | 0 |\n| 2345 | 0 | 100001101000101 | 0 |\n| 0 | 1 | 100000000000000 | 12345 |\n| 0 | 1 | 100000000000000 | 0 |\n| 0 | 1 | 110000000000000 | 75 |\n| 12345 | 1 | 000111111001111 | 0 |\n| 12345 | 1 | 000111111001111 | 12345 |\n| 12345 | 1 | 010111111001111 | 0 |\n| 12345 | 1 | 010111111001111 | 12345 |\n| -1 | 1 | 100111111001111 | -1 |\n| -1 | 1 | 101000001001111 | -1 |\n| -1 | 1 | 000111111001111 | 12345 |\n| -1 | 1 | 010111111001111 | 12345 |\n| -1 | 0 | 100111111001110 | 0 |\n| -1 | 0 | 100111111001101 | 0 |\n| -1 | 0 | 100111111001011 | 0 |\n| -1 | 0 | 100111111000111 | 0 |\n| -1 | 0 | 100111111011111 | 0 |\n| -1 | 0 | 100111111101111 | 0 |\n| -1 | 0 | 100111110001111 | 0 |\n| -1 | 0 | 100111101001111 | 0 |\n| -1 | 0 | 100111011001111 | 0 |\n| -1 | 0 | 100110111001111 | 0 |\n| -1 | 0 | 100101111001111 | 0 |\n| -1 | 0 | 100011111001111 | 0 |\n| -1 | 0 | 101111111001111 | 0 |\n| -1 | 0 | 110000000000000 | 89 |"},CPU:{"CPU.hdl":"// This file is part of www.nand2tetris.org\n// and the book \"The Elements of Computing Systems\"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/5/CPU.hdl\n/**\n * The Hack Central Processing unit (CPU).\n * Parses the binary code in the instruction input and executes it according to the\n * Hack machine language specification. In the case of a C-instruction, computes the\n * function specified by the instruction. If the instruction specifies to read a memory\n * value, the inM input is expected to contain this value. If the instruction specifies\n * to write a value to the memory, sets the outM output to this value, sets the addressM\n * output to the target address, and asserts the writeM output (when writeM = 0, any\n * value may appear in outM).\n * If the reset input is 0, computes the address of the next instruction and sets the\n * pc output to that value. If the reset input is 1, sets pc to 0.\n * Note: The outM and writeM outputs are combinational: they are affected by the\n * instruction's execution during the current cycle. The addressM and pc outputs are\n * clocked: although they are affected by the instruction's execution, they commit to\n * their new values only in the next cycle.\n */\nCHIP CPU {\n\n IN inM[16], // M value input (M = contents of RAM[A])\n instruction[16], // Instruction for execution\n reset; // Signals whether to re-start the current\n // program (reset==1) or continue executing\n // the current program (reset==0).\n\n OUT outM[16], // M value output\n writeM, // Write to M? \n addressM[15], // Address in data memory (of M)\n pc[15]; // address of next instruction\n\n PARTS:\n\t//// Replace this comment with your code.\n}","CPU.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/5/CPU.tst\n\n// Tests the CPU by setting the instruction input to various binary values that\n// code Hack instructions, and outputting the values of the registers that are\n// supposed to be affected by the instructions.\n\n// Tracks the time, the CPU inputs (inM, instruction, reset bit), the CPU\n// outputs (outM, writeM bit, address, pc), and the value of the D-register.\noutput-list time%S1.3.1 inM%D0.6.0 instruction%B0.16.0 reset%B2.1.2 outM%D1.6.0 writeM%B3.1.2 addressM%D1.5.1 pc%D0.5.0 DRegister[]%D1.7.1;\n\nset instruction %B0011000000111001, // @12345\ntick, output, tock, output;\n\nset instruction %B1110110000010000, // D=A\ntick, output, tock, output;\n\nset instruction %B0101101110100000, // @23456\ntick, output, tock, output;\n\nset instruction %B1110000111110000, // AD=A-D\ntick, output, tock, output;\n\nset instruction %B0000001111101011, // @1003\ntick, output, tock, output;\n\nset instruction %B1110001100001000, // M=D\ntick, output, tock, output;\n\nset instruction %B0000001111101100, // @1004\ntick, output, tock, output;\n\nset instruction %B1110001110011000, // MD=D-1\ntick, output, tock, output;\n\nset instruction %B0000001111101000, // @1000\ntick, output, tock, output;\n\nset instruction %B1111010011110000, // AD=D-M\nset inM 11111,\ntick, output, tock, output;\n\nset instruction %B0000000000001110, // @14\ntick, output, tock, output;\n\nset instruction %B1110001100000100, // D;jlt\ntick, output, tock, output;\n\nset instruction %B0000001111100111, // @999\ntick, output, tock, output;\n\nset instruction %B1111110111100000, // A=M+1\ntick, output, tock, output;\n\nset instruction %B1110001100101000, // AM=D\ntick, output, tock, output;\n\nset instruction %B0000000000010101, // @21\ntick, output, tock, output;\n\nset instruction %B1110011111000010, // D+1;jeq\ntick, output, tock, output;\n\nset instruction %B0000000000000010, // @2\ntick, output, tock, output;\n\nset instruction %B1110000010111000, // AMD=D+A\ntick, output, tock, output;\n\nset instruction %B1111110111001000, // M=M+1\ntick, output, tock, output;\n\nset instruction %B1111110010101000, // AM=M-1\ntick, output, tock, output;\n\nset instruction %B0000001111101000, // @1000\ntick, output, tock, output;\n\nset instruction %B1110111010010000, // D=-1\ntick, output, tock, output;\n\nset instruction %B1110001100000001, // D;JGT\ntick, output, tock, output;\n\nset instruction %B1110001100000010, // D;JEQ\ntick, output, tock, output;\n\nset instruction %B1110001100000011, // D;JGE\ntick, output, tock, output;\n\nset instruction %B1110001100000100, // D;JLT\ntick, output, tock, output;\n\nset instruction %B1110001100000101, // D;JNE\ntick, output, tock, output;\n\nset instruction %B1110001100000110, // D;JLE\ntick, output, tock, output;\n\nset instruction %B1110001100000111, // D;JMP\ntick, output, tock, output;\n\nset instruction %B1110101010010000, // D=0\ntick, output, tock, output;\n\nset instruction %B1110001100000001, // D;JGT\ntick, output, tock, output;\n\nset instruction %B1110001100000010, // D;JEQ\ntick, output, tock, output;\n\nset instruction %B1110001100000011, // D;JGE\ntick, output, tock, output;\n\nset instruction %B1110001100000100, // D;JLT\ntick, output, tock, output;\n\nset instruction %B1110001100000101, // D;JNE\ntick, output, tock, output;\n\nset instruction %B1110001100000110, // D;JLE\ntick, output, tock, output;\n\nset instruction %B1110001100000111, // D;JMP\ntick, output, tock, output;\n\nset instruction %B1110111111010000, // D=1\ntick, output, tock, output;\n\nset instruction %B1110001100000001, // D;JGT\ntick, output, tock, output;\n\nset instruction %B1110001100000010, // D;JEQ\ntick, output, tock, output;\n\nset instruction %B1110001100000011, // D;JGE\ntick, output, tock, output;\n\nset instruction %B1110001100000100, // D;JLT\ntick, output, tock, output;\n\nset instruction %B1110001100000101, // D;JNE\ntick, output, tock, output;\n\nset instruction %B1110001100000110, // D;JLE\ntick, output, tock, output;\n\nset instruction %B1110001100000111, // D;JMP\ntick, output, tock, output;\n\nset reset 1;\ntick, output, tock, output;\n\nset instruction %B0111111111111111, // @32767\nset reset 0;\ntick, output, tock, output;',"CPU.cmp":"|time | inM | instruction |reset| outM |writeM|address| pc |DRegister|\n| 0+ | 0|0011000000111001| 0 |*******| 0 | 0 | 0| 0 |\n| 1 | 0|0011000000111001| 0 |*******| 0 | 12345 | 1| 0 |\n| 1+ | 0|1110110000010000| 0 |*******| 0 | 12345 | 1| 12345 |\n| 2 | 0|1110110000010000| 0 |*******| 0 | 12345 | 2| 12345 |\n| 2+ | 0|0101101110100000| 0 |*******| 0 | 12345 | 2| 12345 |\n| 3 | 0|0101101110100000| 0 |*******| 0 | 23456 | 3| 12345 |\n| 3+ | 0|1110000111110000| 0 |*******| 0 | 23456 | 3| 11111 |\n| 4 | 0|1110000111110000| 0 |*******| 0 | 11111 | 4| 11111 |\n| 4+ | 0|0000001111101011| 0 |*******| 0 | 11111 | 4| 11111 |\n| 5 | 0|0000001111101011| 0 |*******| 0 | 1003 | 5| 11111 |\n| 5+ | 0|1110001100001000| 0 | 11111| 1 | 1003 | 5| 11111 |\n| 6 | 0|1110001100001000| 0 | 11111| 1 | 1003 | 6| 11111 |\n| 6+ | 0|0000001111101100| 0 |*******| 0 | 1003 | 6| 11111 |\n| 7 | 0|0000001111101100| 0 |*******| 0 | 1004 | 7| 11111 |\n| 7+ | 0|1110001110011000| 0 | 11110| 1 | 1004 | 7| 11110 |\n| 8 | 0|1110001110011000| 0 | 11109| 1 | 1004 | 8| 11110 |\n| 8+ | 0|0000001111101000| 0 |*******| 0 | 1004 | 8| 11110 |\n| 9 | 0|0000001111101000| 0 |*******| 0 | 1000 | 9| 11110 |\n| 9+ | 11111|1111010011110000| 0 |*******| 0 | 1000 | 9| -1 |\n| 10 | 11111|1111010011110000| 0 |*******| 0 | 32767 | 10| -1 |\n| 10+ | 11111|0000000000001110| 0 |*******| 0 | 32767 | 10| -1 |\n| 11 | 11111|0000000000001110| 0 |*******| 0 | 14 | 11| -1 |\n| 11+ | 11111|1110001100000100| 0 |*******| 0 | 14 | 11| -1 |\n| 12 | 11111|1110001100000100| 0 |*******| 0 | 14 | 14| -1 |\n| 12+ | 11111|0000001111100111| 0 |*******| 0 | 14 | 14| -1 |\n| 13 | 11111|0000001111100111| 0 |*******| 0 | 999 | 15| -1 |\n| 13+ | 11111|1111110111100000| 0 |*******| 0 | 999 | 15| -1 |\n| 14 | 11111|1111110111100000| 0 |*******| 0 | 11112 | 16| -1 |\n| 14+ | 11111|1110001100101000| 0 | -1| 1 | 11112 | 16| -1 |\n| 15 | 11111|1110001100101000| 0 | -1| 1 | 32767 | 17| -1 |\n| 15+ | 11111|0000000000010101| 0 |*******| 0 | 32767 | 17| -1 |\n| 16 | 11111|0000000000010101| 0 |*******| 0 | 21 | 18| -1 |\n| 16+ | 11111|1110011111000010| 0 |*******| 0 | 21 | 18| -1 |\n| 17 | 11111|1110011111000010| 0 |*******| 0 | 21 | 21| -1 |\n| 17+ | 11111|0000000000000010| 0 |*******| 0 | 21 | 21| -1 |\n| 18 | 11111|0000000000000010| 0 |*******| 0 | 2 | 22| -1 |\n| 18+ | 11111|1110000010111000| 0 | 1| 1 | 2 | 22| 1 |\n| 19 | 11111|1110000010111000| 0 | 2| 1 | 1 | 23| 1 |\n| 19+ | 11111|1111110111001000| 0 | 11112| 1 | 1 | 23| 1 |\n| 20 | 11111|1111110111001000| 0 | 11112| 1 | 1 | 24| 1 |\n| 20+ | 11111|1111110010101000| 0 | 11110| 1 | 1 | 24| 1 |\n| 21 | 11111|1111110010101000| 0 | 11110| 1 | 11110 | 25| 1 |\n| 21+ | 11111|0000001111101000| 0 |*******| 0 | 11110 | 25| 1 |\n| 22 | 11111|0000001111101000| 0 |*******| 0 | 1000 | 26| 1 |\n| 22+ | 11111|1110111010010000| 0 |*******| 0 | 1000 | 26| -1 |\n| 23 | 11111|1110111010010000| 0 |*******| 0 | 1000 | 27| -1 |\n| 23+ | 11111|1110001100000001| 0 |*******| 0 | 1000 | 27| -1 |\n| 24 | 11111|1110001100000001| 0 |*******| 0 | 1000 | 28| -1 |\n| 24+ | 11111|1110001100000010| 0 |*******| 0 | 1000 | 28| -1 |\n| 25 | 11111|1110001100000010| 0 |*******| 0 | 1000 | 29| -1 |\n| 25+ | 11111|1110001100000011| 0 |*******| 0 | 1000 | 29| -1 |\n| 26 | 11111|1110001100000011| 0 |*******| 0 | 1000 | 30| -1 |\n| 26+ | 11111|1110001100000100| 0 |*******| 0 | 1000 | 30| -1 |\n| 27 | 11111|1110001100000100| 0 |*******| 0 | 1000 | 1000| -1 |\n| 27+ | 11111|1110001100000101| 0 |*******| 0 | 1000 | 1000| -1 |\n| 28 | 11111|1110001100000101| 0 |*******| 0 | 1000 | 1000| -1 |\n| 28+ | 11111|1110001100000110| 0 |*******| 0 | 1000 | 1000| -1 |\n| 29 | 11111|1110001100000110| 0 |*******| 0 | 1000 | 1000| -1 |\n| 29+ | 11111|1110001100000111| 0 |*******| 0 | 1000 | 1000| -1 |\n| 30 | 11111|1110001100000111| 0 |*******| 0 | 1000 | 1000| -1 |\n| 30+ | 11111|1110101010010000| 0 |*******| 0 | 1000 | 1000| 0 |\n| 31 | 11111|1110101010010000| 0 |*******| 0 | 1000 | 1001| 0 |\n| 31+ | 11111|1110001100000001| 0 |*******| 0 | 1000 | 1001| 0 |\n| 32 | 11111|1110001100000001| 0 |*******| 0 | 1000 | 1002| 0 |\n| 32+ | 11111|1110001100000010| 0 |*******| 0 | 1000 | 1002| 0 |\n| 33 | 11111|1110001100000010| 0 |*******| 0 | 1000 | 1000| 0 |\n| 33+ | 11111|1110001100000011| 0 |*******| 0 | 1000 | 1000| 0 |\n| 34 | 11111|1110001100000011| 0 |*******| 0 | 1000 | 1000| 0 |\n| 34+ | 11111|1110001100000100| 0 |*******| 0 | 1000 | 1000| 0 |\n| 35 | 11111|1110001100000100| 0 |*******| 0 | 1000 | 1001| 0 |\n| 35+ | 11111|1110001100000101| 0 |*******| 0 | 1000 | 1001| 0 |\n| 36 | 11111|1110001100000101| 0 |*******| 0 | 1000 | 1002| 0 |\n| 36+ | 11111|1110001100000110| 0 |*******| 0 | 1000 | 1002| 0 |\n| 37 | 11111|1110001100000110| 0 |*******| 0 | 1000 | 1000| 0 |\n| 37+ | 11111|1110001100000111| 0 |*******| 0 | 1000 | 1000| 0 |\n| 38 | 11111|1110001100000111| 0 |*******| 0 | 1000 | 1000| 0 |\n| 38+ | 11111|1110111111010000| 0 |*******| 0 | 1000 | 1000| 1 |\n| 39 | 11111|1110111111010000| 0 |*******| 0 | 1000 | 1001| 1 |\n| 39+ | 11111|1110001100000001| 0 |*******| 0 | 1000 | 1001| 1 |\n| 40 | 11111|1110001100000001| 0 |*******| 0 | 1000 | 1000| 1 |\n| 40+ | 11111|1110001100000010| 0 |*******| 0 | 1000 | 1000| 1 |\n| 41 | 11111|1110001100000010| 0 |*******| 0 | 1000 | 1001| 1 |\n| 41+ | 11111|1110001100000011| 0 |*******| 0 | 1000 | 1001| 1 |\n| 42 | 11111|1110001100000011| 0 |*******| 0 | 1000 | 1000| 1 |\n| 42+ | 11111|1110001100000100| 0 |*******| 0 | 1000 | 1000| 1 |\n| 43 | 11111|1110001100000100| 0 |*******| 0 | 1000 | 1001| 1 |\n| 43+ | 11111|1110001100000101| 0 |*******| 0 | 1000 | 1001| 1 |\n| 44 | 11111|1110001100000101| 0 |*******| 0 | 1000 | 1000| 1 |\n| 44+ | 11111|1110001100000110| 0 |*******| 0 | 1000 | 1000| 1 |\n| 45 | 11111|1110001100000110| 0 |*******| 0 | 1000 | 1001| 1 |\n| 45+ | 11111|1110001100000111| 0 |*******| 0 | 1000 | 1001| 1 |\n| 46 | 11111|1110001100000111| 0 |*******| 0 | 1000 | 1000| 1 |\n| 46+ | 11111|1110001100000111| 1 |*******| 0 | 1000 | 1000| 1 |\n| 47 | 11111|1110001100000111| 1 |*******| 0 | 1000 | 0| 1 |\n| 47+ | 11111|0111111111111111| 0 |*******| 0 | 1000 | 0| 1 |\n| 48 | 11111|0111111111111111| 0 |*******| 0 | 32767 | 1| 1 |","CPU-external.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/5/CPU-external.tst\n\n// Tests the CPU by setting the instruction input to various binary values that\n// code Hack instructions, and outputting the values of the registers that are\n// supposed to be affected by the instructions.\n\n// Tracks the time, the CPU inputs (inM, instruction, reset bit), and the CPU\n// outputs (outM, writeM bit, address, pc).\noutput-list time%S1.3.1 inM%D0.6.0 instruction%B0.16.0 reset%B2.1.2 outM%D1.6.0 writeM%B3.1.2 addressM%D1.5.1 pc%D0.5.0;\n\nset instruction %B0011000000111001, // @12345\ntick, output, tock, output;\n\nset instruction %B1110110000010000, // D=A\ntick, output, tock, output;\n\nset instruction %B0101101110100000, // @23456\ntick, output, tock, output;\n\nset instruction %B1110000111110000, // AD=A-D\ntick, output, tock, output;\n\nset instruction %B0000001111101011, // @1003\ntick, output, tock, output;\n\nset instruction %B1110001100001000, // M=D\ntick, output, tock, output;\n\nset instruction %B0000001111101100, // @1004\ntick, output, tock, output;\n\nset instruction %B1110001110011000, // MD=D-1\ntick, output, tock, output;\n\nset instruction %B0000001111101000, // @1000\ntick, output, tock, output;\n\nset instruction %B1111010011110000, // AD=D-M\nset inM 11111,\ntick, output, tock, output;\n\nset instruction %B0000000000001110, // @14\ntick, output, tock, output;\n\nset instruction %B1110001100000100, // D;jlt\ntick, output, tock, output;\n\nset instruction %B0000001111100111, // @999\ntick, output, tock, output;\n\nset instruction %B1111110111100000, // A=M+1\ntick, output, tock, output;\n\nset instruction %B1110001100101000, // AM=D\ntick, output, tock, output;\n\nset instruction %B0000000000010101, // @21\ntick, output, tock, output;\n\nset instruction %B1110011111000010, // D+1;jeq\ntick, output, tock, output;\n\nset instruction %B0000000000000010, // @2\ntick, output, tock, output;\n\nset instruction %B1110000010111000, // AMD=D+A\ntick, output, tock, output;\n\nset instruction %B1111110111001000, // M=M+1\ntick, output, tock, output;\n\nset instruction %B1111110010101000, // AM=M-1\ntick, output, tock, output;\n\nset instruction %B0000001111101000, // @1000\ntick, output, tock, output;\n\nset instruction %B1110111010010000, // D=-1\ntick, output, tock, output;\n\nset instruction %B1110001100000001, // D;JGT\ntick, output, tock, output;\n\nset instruction %B1110001100000010, // D;JEQ\ntick, output, tock, output;\n\nset instruction %B1110001100000011, // D;JGE\ntick, output, tock, output;\n\nset instruction %B1110001100000100, // D;JLT\ntick, output, tock, output;\n\nset instruction %B1110001100000101, // D;JNE\ntick, output, tock, output;\n\nset instruction %B1110001100000110, // D;JLE\ntick, output, tock, output;\n\nset instruction %B1110001100000111, // D;JMP\ntick, output, tock, output;\n\nset instruction %B1110101010010000, // D=0\ntick, output, tock, output;\n\nset instruction %B1110001100000001, // D;JGT\ntick, output, tock, output;\n\nset instruction %B1110001100000010, // D;JEQ\ntick, output, tock, output;\n\nset instruction %B1110001100000011, // D;JGE\ntick, output, tock, output;\n\nset instruction %B1110001100000100, // D;JLT\ntick, output, tock, output;\n\nset instruction %B1110001100000101, // D;JNE\ntick, output, tock, output;\n\nset instruction %B1110001100000110, // D;JLE\ntick, output, tock, output;\n\nset instruction %B1110001100000111, // D;JMP\ntick, output, tock, output;\n\nset instruction %B1110111111010000, // D=1\ntick, output, tock, output;\n\nset instruction %B1110001100000001, // D;JGT\ntick, output, tock, output;\n\nset instruction %B1110001100000010, // D;JEQ\ntick, output, tock, output;\n\nset instruction %B1110001100000011, // D;JGE\ntick, output, tock, output;\n\nset instruction %B1110001100000100, // D;JLT\ntick, output, tock, output;\n\nset instruction %B1110001100000101, // D;JNE\ntick, output, tock, output;\n\nset instruction %B1110001100000110, // D;JLE\ntick, output, tock, output;\n\nset instruction %B1110001100000111, // D;JMP\ntick, output, tock, output;\n\nset reset 1;\ntick, output, tock, output;\n\nset instruction %B0111111111111111, // @32767\nset reset 0;\ntick, output, tock, output;',"CPU-external.cmp":"|time | inM | instruction |reset| outM |writeM|address| pc |\n| 0+ | 0|0011000000111001| 0 |*******| 0 | 0 | 0|\n| 1 | 0|0011000000111001| 0 |*******| 0 | 12345 | 1|\n| 1+ | 0|1110110000010000| 0 |*******| 0 | 12345 | 1|\n| 2 | 0|1110110000010000| 0 |*******| 0 | 12345 | 2|\n| 2+ | 0|0101101110100000| 0 |*******| 0 | 12345 | 2|\n| 3 | 0|0101101110100000| 0 |*******| 0 | 23456 | 3|\n| 3+ | 0|1110000111110000| 0 |*******| 0 | 23456 | 3|\n| 4 | 0|1110000111110000| 0 |*******| 0 | 11111 | 4|\n| 4+ | 0|0000001111101011| 0 |*******| 0 | 11111 | 4|\n| 5 | 0|0000001111101011| 0 |*******| 0 | 1003 | 5|\n| 5+ | 0|1110001100001000| 0 | 11111| 1 | 1003 | 5|\n| 6 | 0|1110001100001000| 0 | 11111| 1 | 1003 | 6|\n| 6+ | 0|0000001111101100| 0 |*******| 0 | 1003 | 6|\n| 7 | 0|0000001111101100| 0 |*******| 0 | 1004 | 7|\n| 7+ | 0|1110001110011000| 0 | 11110| 1 | 1004 | 7|\n| 8 | 0|1110001110011000| 0 | 11109| 1 | 1004 | 8|\n| 8+ | 0|0000001111101000| 0 |*******| 0 | 1004 | 8|\n| 9 | 0|0000001111101000| 0 |*******| 0 | 1000 | 9|\n| 9+ | 11111|1111010011110000| 0 |*******| 0 | 1000 | 9|\n| 10 | 11111|1111010011110000| 0 |*******| 0 | 32767 | 10|\n| 10+ | 11111|0000000000001110| 0 |*******| 0 | 32767 | 10|\n| 11 | 11111|0000000000001110| 0 |*******| 0 | 14 | 11|\n| 11+ | 11111|1110001100000100| 0 |*******| 0 | 14 | 11|\n| 12 | 11111|1110001100000100| 0 |*******| 0 | 14 | 14|\n| 12+ | 11111|0000001111100111| 0 |*******| 0 | 14 | 14|\n| 13 | 11111|0000001111100111| 0 |*******| 0 | 999 | 15|\n| 13+ | 11111|1111110111100000| 0 |*******| 0 | 999 | 15|\n| 14 | 11111|1111110111100000| 0 |*******| 0 | 11112 | 16|\n| 14+ | 11111|1110001100101000| 0 | -1| 1 | 11112 | 16|\n| 15 | 11111|1110001100101000| 0 | -1| 1 | 32767 | 17|\n| 15+ | 11111|0000000000010101| 0 |*******| 0 | 32767 | 17|\n| 16 | 11111|0000000000010101| 0 |*******| 0 | 21 | 18|\n| 16+ | 11111|1110011111000010| 0 |*******| 0 | 21 | 18|\n| 17 | 11111|1110011111000010| 0 |*******| 0 | 21 | 21|\n| 17+ | 11111|0000000000000010| 0 |*******| 0 | 21 | 21|\n| 18 | 11111|0000000000000010| 0 |*******| 0 | 2 | 22|\n| 18+ | 11111|1110000010111000| 0 | 1| 1 | 2 | 22|\n| 19 | 11111|1110000010111000| 0 | 2| 1 | 1 | 23|\n| 19+ | 11111|1111110111001000| 0 | 11112| 1 | 1 | 23|\n| 20 | 11111|1111110111001000| 0 | 11112| 1 | 1 | 24|\n| 20+ | 11111|1111110010101000| 0 | 11110| 1 | 1 | 24|\n| 21 | 11111|1111110010101000| 0 | 11110| 1 | 11110 | 25|\n| 21+ | 11111|0000001111101000| 0 |*******| 0 | 11110 | 25|\n| 22 | 11111|0000001111101000| 0 |*******| 0 | 1000 | 26|\n| 22+ | 11111|1110111010010000| 0 |*******| 0 | 1000 | 26|\n| 23 | 11111|1110111010010000| 0 |*******| 0 | 1000 | 27|\n| 23+ | 11111|1110001100000001| 0 |*******| 0 | 1000 | 27|\n| 24 | 11111|1110001100000001| 0 |*******| 0 | 1000 | 28|\n| 24+ | 11111|1110001100000010| 0 |*******| 0 | 1000 | 28|\n| 25 | 11111|1110001100000010| 0 |*******| 0 | 1000 | 29|\n| 25+ | 11111|1110001100000011| 0 |*******| 0 | 1000 | 29|\n| 26 | 11111|1110001100000011| 0 |*******| 0 | 1000 | 30|\n| 26+ | 11111|1110001100000100| 0 |*******| 0 | 1000 | 30|\n| 27 | 11111|1110001100000100| 0 |*******| 0 | 1000 | 1000|\n| 27+ | 11111|1110001100000101| 0 |*******| 0 | 1000 | 1000|\n| 28 | 11111|1110001100000101| 0 |*******| 0 | 1000 | 1000|\n| 28+ | 11111|1110001100000110| 0 |*******| 0 | 1000 | 1000|\n| 29 | 11111|1110001100000110| 0 |*******| 0 | 1000 | 1000|\n| 29+ | 11111|1110001100000111| 0 |*******| 0 | 1000 | 1000|\n| 30 | 11111|1110001100000111| 0 |*******| 0 | 1000 | 1000|\n| 30+ | 11111|1110101010010000| 0 |*******| 0 | 1000 | 1000|\n| 31 | 11111|1110101010010000| 0 |*******| 0 | 1000 | 1001|\n| 31+ | 11111|1110001100000001| 0 |*******| 0 | 1000 | 1001|\n| 32 | 11111|1110001100000001| 0 |*******| 0 | 1000 | 1002|\n| 32+ | 11111|1110001100000010| 0 |*******| 0 | 1000 | 1002|\n| 33 | 11111|1110001100000010| 0 |*******| 0 | 1000 | 1000|\n| 33+ | 11111|1110001100000011| 0 |*******| 0 | 1000 | 1000|\n| 34 | 11111|1110001100000011| 0 |*******| 0 | 1000 | 1000|\n| 34+ | 11111|1110001100000100| 0 |*******| 0 | 1000 | 1000|\n| 35 | 11111|1110001100000100| 0 |*******| 0 | 1000 | 1001|\n| 35+ | 11111|1110001100000101| 0 |*******| 0 | 1000 | 1001|\n| 36 | 11111|1110001100000101| 0 |*******| 0 | 1000 | 1002|\n| 36+ | 11111|1110001100000110| 0 |*******| 0 | 1000 | 1002|\n| 37 | 11111|1110001100000110| 0 |*******| 0 | 1000 | 1000|\n| 37+ | 11111|1110001100000111| 0 |*******| 0 | 1000 | 1000|\n| 38 | 11111|1110001100000111| 0 |*******| 0 | 1000 | 1000|\n| 38+ | 11111|1110111111010000| 0 |*******| 0 | 1000 | 1000|\n| 39 | 11111|1110111111010000| 0 |*******| 0 | 1000 | 1001|\n| 39+ | 11111|1110001100000001| 0 |*******| 0 | 1000 | 1001|\n| 40 | 11111|1110001100000001| 0 |*******| 0 | 1000 | 1000|\n| 40+ | 11111|1110001100000010| 0 |*******| 0 | 1000 | 1000|\n| 41 | 11111|1110001100000010| 0 |*******| 0 | 1000 | 1001|\n| 41+ | 11111|1110001100000011| 0 |*******| 0 | 1000 | 1001|\n| 42 | 11111|1110001100000011| 0 |*******| 0 | 1000 | 1000|\n| 42+ | 11111|1110001100000100| 0 |*******| 0 | 1000 | 1000|\n| 43 | 11111|1110001100000100| 0 |*******| 0 | 1000 | 1001|\n| 43+ | 11111|1110001100000101| 0 |*******| 0 | 1000 | 1001|\n| 44 | 11111|1110001100000101| 0 |*******| 0 | 1000 | 1000|\n| 44+ | 11111|1110001100000110| 0 |*******| 0 | 1000 | 1000|\n| 45 | 11111|1110001100000110| 0 |*******| 0 | 1000 | 1001|\n| 45+ | 11111|1110001100000111| 0 |*******| 0 | 1000 | 1001|\n| 46 | 11111|1110001100000111| 0 |*******| 0 | 1000 | 1000|\n| 46+ | 11111|1110001100000111| 1 |*******| 0 | 1000 | 1000|\n| 47 | 11111|1110001100000111| 1 |*******| 0 | 1000 | 0|\n| 47+ | 11111|0111111111111111| 0 |*******| 0 | 1000 | 0|\n| 48 | 11111|0111111111111111| 0 |*******| 0 | 32767 | 1|"},Computer:{"Computer.hdl":"// This file is part of www.nand2tetris.org\n// and the book \"The Elements of Computing Systems\"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/5/Computer.hdl\n/**\n * The Hack computer, consisting of CPU, ROM and RAM.\n * When reset = 0, the program stored in the ROM executes.\n * When reset = 1, the program's execution restarts. \n * Thus, to start running the currently loaded program,\n * set reset to 1, and then set it to 0. \n * From this point onwards, the user is at the mercy of the software.\n * Depending on the program's code, and whether the code is correct,\n * the screen may show some output, the user may be expected to enter\n * some input using the keyboard, or the program may do some procerssing. \n */\nCHIP Computer {\n\n IN reset;\n\n PARTS:\n //// Replace this comment with your code.\n}","ComputerAdd.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/5/ComputerAdd.tst\n\n// Tests the Computer chip by having it execute the program Add.hack.\n// The program adds up the constants 2 and 3 and writes the result in RAM[0]. \n\n// Tracks the values of the time, reset bit, A-register, D-register,\n// program counter, R0, R1, and R2.\noutput-list time%S1.3.1 reset%B2.1.2 ARegister[0]%D1.7.1 DRegister[0]%D1.7.1 PC[]%D0.4.0 RAM16K[0]%D1.7.1 RAM16K[1]%D1.7.1 RAM16K[2]%D1.7.1;\n\n// Loads the binary program Add.hack into the computer\'s instruction memory \nROM32K load Add.hack,\noutput;\n\n// First run (at the beginning PC=0)\nrepeat 6 {\n tick, tock, output;\n}\n\n// Resets the PC\nset reset 1,\nset RAM16K[0] 0,\ntick, tock, output;\n\n// Second run, to check that the PC was reset correctly.\nset reset 0,\n\nrepeat 6 {\n tick, tock, output;\n}',"ComputerAdd.cmp":"|time |reset|ARegister|DRegister|PC[]|RAM16K[0]|RAM16K[1]|RAM16K[2]|\n| 0 | 0 | 0 | 0 | 0| 0 | 0 | 0 |\n| 1 | 0 | 2 | 0 | 1| 0 | 0 | 0 |\n| 2 | 0 | 2 | 2 | 2| 0 | 0 | 0 |\n| 3 | 0 | 3 | 2 | 3| 0 | 0 | 0 |\n| 4 | 0 | 3 | 5 | 4| 0 | 0 | 0 |\n| 5 | 0 | 0 | 5 | 5| 0 | 0 | 0 |\n| 6 | 0 | 0 | 5 | 6| 5 | 0 | 0 |\n| 7 | 1 | 0 | 5 | 0| 0 | 0 | 0 |\n| 8 | 0 | 2 | 5 | 1| 0 | 0 | 0 |\n| 9 | 0 | 2 | 2 | 2| 0 | 0 | 0 |\n| 10 | 0 | 3 | 2 | 3| 0 | 0 | 0 |\n| 11 | 0 | 3 | 5 | 4| 0 | 0 | 0 |\n| 12 | 0 | 0 | 5 | 5| 0 | 0 | 0 |\n| 13 | 0 | 0 | 5 | 6| 5 | 0 | 0 |","ComputerMax.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/5/ComputerMax.tst\n\n// Tests the Computer chip by having it execute the program Max.hack.\n// The program computes maximum(R0, R1) and writes the result in RAM[2].\n\n// Tracks the values of the time, reset bit, A-register, D-register,\n// program counter, R0, R1, and R2.\noutput-list time%S1.3.1 reset%B2.1.2 ARegister[]%D1.7.1 DRegister[]%D1.7.1 PC[]%D0.4.0 RAM16K[0]%D1.7.1 RAM16K[1]%D1.7.1 RAM16K[2]%D1.7.1;\n\n// Loads the binary program Add.hack into the computer\'s instruction memory \nROM32K load Max.hack,\n\n// first run: computes max(3,5)\nset RAM16K[0] 3,\nset RAM16K[1] 5,\noutput;\n\nrepeat 14 {\n tick, tock, output;\n}\n\n// resets the PC\nset reset 1,\ntick, tock, output;\n\n// second run: computes max(23456,12345)\nset reset 0,\nset RAM16K[0] 23456,\nset RAM16K[1] 12345,\noutput;\n\n// The run on these inputs requires less cycles (different branching)\nrepeat 10 {\n tick, tock, output;\n}\n',"ComputerMax.cmp":"|time |reset|ARegister|DRegister|PC[]|RAM16K[0]|RAM16K[1]|RAM16K[2]|\n| 0 | 0 | 0 | 0 | 0| 3 | 5 | 0 |\n| 1 | 0 | 0 | 0 | 1| 3 | 5 | 0 |\n| 2 | 0 | 0 | 3 | 2| 3 | 5 | 0 |\n| 3 | 0 | 1 | 3 | 3| 3 | 5 | 0 |\n| 4 | 0 | 1 | -2 | 4| 3 | 5 | 0 |\n| 5 | 0 | 10 | -2 | 5| 3 | 5 | 0 |\n| 6 | 0 | 10 | -2 | 6| 3 | 5 | 0 |\n| 7 | 0 | 1 | -2 | 7| 3 | 5 | 0 |\n| 8 | 0 | 1 | 5 | 8| 3 | 5 | 0 |\n| 9 | 0 | 12 | 5 | 9| 3 | 5 | 0 |\n| 10 | 0 | 12 | 5 | 12| 3 | 5 | 0 |\n| 11 | 0 | 2 | 5 | 13| 3 | 5 | 0 |\n| 12 | 0 | 2 | 5 | 14| 3 | 5 | 5 |\n| 13 | 0 | 14 | 5 | 15| 3 | 5 | 5 |\n| 14 | 0 | 14 | 5 | 14| 3 | 5 | 5 |\n| 15 | 1 | 14 | 5 | 0| 3 | 5 | 5 |\n| 15 | 0 | 14 | 5 | 0| 23456 | 12345 | 5 |\n| 16 | 0 | 0 | 5 | 1| 23456 | 12345 | 5 |\n| 17 | 0 | 0 | 23456 | 2| 23456 | 12345 | 5 |\n| 18 | 0 | 1 | 23456 | 3| 23456 | 12345 | 5 |\n| 19 | 0 | 1 | 11111 | 4| 23456 | 12345 | 5 |\n| 20 | 0 | 10 | 11111 | 5| 23456 | 12345 | 5 |\n| 21 | 0 | 10 | 11111 | 10| 23456 | 12345 | 5 |\n| 22 | 0 | 0 | 11111 | 11| 23456 | 12345 | 5 |\n| 23 | 0 | 0 | 23456 | 12| 23456 | 12345 | 5 |\n| 24 | 0 | 2 | 23456 | 13| 23456 | 12345 | 5 |\n| 25 | 0 | 2 | 23456 | 14| 23456 | 12345 | 23456 |","ComputerRect.tst":"// This file is part of www.nand2tetris.org\n// and the book \"The Elements of Computing Systems\"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/5/ComputerRect.tst\n\n// Tests the Computer chip by having it execute the program Rect.hack.\n// The program draws a rectangle of width 16 pixels and length RAM[0]\n// at the top left corner of the screen.\n\n// Tracks the values of the time, A-register, D-register, program counter, R0, R1, and R2.\noutput-list time%S1.3.1 ARegister[]%D1.7.1 DRegister[]%D1.7.1 PC[]%D0.4.0 RAM16K[0]%D1.7.1 RAM16K[1]%D1.7.1 RAM16K[2]%D1.7.1;\n\n// Loads the binary program Rect.hack into the computer's instruction memory \nROM32K load Rect.hack,\n\necho \"Before you run this script, select the 'Screen' option from the 'View' menu\";\n\necho \"A small rectangle should be drawn at the top left of the screen (the 'Screen' option of the 'View' menu should be selected.)\";\n\n// Draws a rectangle consisting of 4 rows (each 16 pixels wide)\nset RAM16K[0] 4,\noutput;\n\nrepeat 63 {\n tick, tock, output;\n}","ComputerRect.cmp":"|time |ARegister|DRegister|PC[]|RAM16K[0]|RAM16K[1]|RAM16K[2]|\n| 0 | 0 | 0 | 0| 4 | 0 | 0 |\n| 1 | 0 | 0 | 1| 4 | 0 | 0 |\n| 2 | 0 | 4 | 2| 4 | 0 | 0 |\n| 3 | 23 | 4 | 3| 4 | 0 | 0 |\n| 4 | 23 | 4 | 4| 4 | 0 | 0 |\n| 5 | 16 | 4 | 5| 4 | 0 | 0 |\n| 6 | 16 | 4 | 6| 4 | 0 | 0 |\n| 7 | 16384 | 4 | 7| 4 | 0 | 0 |\n| 8 | 16384 | 16384 | 8| 4 | 0 | 0 |\n| 9 | 17 | 16384 | 9| 4 | 0 | 0 |\n| 10 | 17 | 16384 | 10| 4 | 0 | 0 |\n| 11 | 17 | 16384 | 11| 4 | 0 | 0 |\n| 12 | 16384 | 16384 | 12| 4 | 0 | 0 |\n| 13 | 16384 | 16384 | 13| 4 | 0 | 0 |\n| 14 | 17 | 16384 | 14| 4 | 0 | 0 |\n| 15 | 17 | 16384 | 15| 4 | 0 | 0 |\n| 16 | 32 | 16384 | 16| 4 | 0 | 0 |\n| 17 | 32 | 16416 | 17| 4 | 0 | 0 |\n| 18 | 17 | 16416 | 18| 4 | 0 | 0 |\n| 19 | 17 | 16416 | 19| 4 | 0 | 0 |\n| 20 | 16 | 16416 | 20| 4 | 0 | 0 |\n| 21 | 16 | 3 | 21| 4 | 0 | 0 |\n| 22 | 10 | 3 | 22| 4 | 0 | 0 |\n| 23 | 10 | 3 | 10| 4 | 0 | 0 |\n| 24 | 17 | 3 | 11| 4 | 0 | 0 |\n| 25 | 16416 | 3 | 12| 4 | 0 | 0 |\n| 26 | 16416 | 3 | 13| 4 | 0 | 0 |\n| 27 | 17 | 3 | 14| 4 | 0 | 0 |\n| 28 | 17 | 16416 | 15| 4 | 0 | 0 |\n| 29 | 32 | 16416 | 16| 4 | 0 | 0 |\n| 30 | 32 | 16448 | 17| 4 | 0 | 0 |\n| 31 | 17 | 16448 | 18| 4 | 0 | 0 |\n| 32 | 17 | 16448 | 19| 4 | 0 | 0 |\n| 33 | 16 | 16448 | 20| 4 | 0 | 0 |\n| 34 | 16 | 2 | 21| 4 | 0 | 0 |\n| 35 | 10 | 2 | 22| 4 | 0 | 0 |\n| 36 | 10 | 2 | 10| 4 | 0 | 0 |\n| 37 | 17 | 2 | 11| 4 | 0 | 0 |\n| 38 | 16448 | 2 | 12| 4 | 0 | 0 |\n| 39 | 16448 | 2 | 13| 4 | 0 | 0 |\n| 40 | 17 | 2 | 14| 4 | 0 | 0 |\n| 41 | 17 | 16448 | 15| 4 | 0 | 0 |\n| 42 | 32 | 16448 | 16| 4 | 0 | 0 |\n| 43 | 32 | 16480 | 17| 4 | 0 | 0 |\n| 44 | 17 | 16480 | 18| 4 | 0 | 0 |\n| 45 | 17 | 16480 | 19| 4 | 0 | 0 |\n| 46 | 16 | 16480 | 20| 4 | 0 | 0 |\n| 47 | 16 | 1 | 21| 4 | 0 | 0 |\n| 48 | 10 | 1 | 22| 4 | 0 | 0 |\n| 49 | 10 | 1 | 10| 4 | 0 | 0 |\n| 50 | 17 | 1 | 11| 4 | 0 | 0 |\n| 51 | 16480 | 1 | 12| 4 | 0 | 0 |\n| 52 | 16480 | 1 | 13| 4 | 0 | 0 |\n| 53 | 17 | 1 | 14| 4 | 0 | 0 |\n| 54 | 17 | 16480 | 15| 4 | 0 | 0 |\n| 55 | 32 | 16480 | 16| 4 | 0 | 0 |\n| 56 | 32 | 16512 | 17| 4 | 0 | 0 |\n| 57 | 17 | 16512 | 18| 4 | 0 | 0 |\n| 58 | 17 | 16512 | 19| 4 | 0 | 0 |\n| 59 | 16 | 16512 | 20| 4 | 0 | 0 |\n| 60 | 16 | 0 | 21| 4 | 0 | 0 |\n| 61 | 10 | 0 | 22| 4 | 0 | 0 |\n| 62 | 10 | 0 | 23| 4 | 0 | 0 |\n| 63 | 23 | 0 | 24| 4 | 0 | 0 |"}},I={Screen:'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/05/Screen.hdl\n/**\n * The Screen (memory map).\n * Same functionality as a 16-bit 8K RAM:\n * If load is asserted, the value of the register selected by\n * address is set to in; Otherwise, the value does not change.\n * The value of the selected register is emitted by out.\n *\n * This built-in implementation has the side effect of continuously \n * refreshing a visual 256 by 512 black-and-white screen, simulated \n * by the simulator. Each row in the visual screen is represented \n * by 32 consecutive 16-bit words, starting at the top left corner \n * of the visual screen. Thus the pixel at row r from the top and \n * column c from the left (0<=r<256, 0<=c<512) reflects the c%16 \n * bit (counting from LSB to MSB) of the word found in Screen[r*32+c/16]. \n */\nCHIP Screen {\n IN in[16], // what to write\n load, // write-enable bit\n address[13]; // where to read/write\n OUT out[16]; // Screen value at the given address\n\n PARTS:\n BUILTIN Screen;\n CLOCKED in, load;\n}',Keyboard:'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/05/Keyboard.hdl\n/**\n * The keyboard (memory map).\n * Outputs the character code of the currently pressed key,\n * or 0 if no key is pressed.\n *\n * This built-in implementation has a visualization side effect.\n */\nCHIP Keyboard {\n OUT out[16];\n\n PARTS:\n BUILTIN Keyboard;\n}',DRegister:'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/05/DRegister.hdl\n/**\n * A 16-bit register named DRegister with the same functionality\n * of the Register chip:\n * If load is asserted, the register\'s value is set to in;\n * Otherwise, the register maintains its current value.\n * out(t+1) = (load(t), in(t), out(t))\n *\n * This built-in implementation has a visualization side effect.\n */\nCHIP DRegister {\n IN in[16], load;\n OUT out[16];\n\n PARTS:\n BUILTIN DRegister;\n CLOCKED in, load;\n}',ARegister:'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/05/ARegister.hdl\n/**\n * A 16-bit register named ARegister with the same functionality\n * of the Register chip:\n * If load is asserted, the register\'s value is set to in;\n * Otherwise, the register maintains its current value.\n * out(t+1) = (load(t), in(t), out(t))\n *\n * This built-in implementation has a visualization side effect.\n */\n CHIP ARegister {\n IN in[16], load;\n OUT out[16];\n\n PARTS:\n BUILTIN ARegister;\n CLOCKED in, load;\n}',ROM32K:'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/05/ROM32K.hdl\n/**\n * Read-Only memory (ROM) of 32K registers, each 16-bit wide.\n * Facilitates data read, as follows:\n * out(t) = ROM32K[address(t)](t)\n * In words: the chip outputs the value stored at the \n * memory location specified by address.\n *\n * Can be used as the instruction memory of the Hack computer.\n * To that end, the built-in chip implementation supports the handling \n * of the "ROM32K load Xxx" script command, where Xxx is the name of a\n * text file containing a program written in the binary Hack machine language.\n * When the simulator encounters such a command in a test script,\n * the file\'s contents is loaded into the simulated ROM32K chip.\n */\n CHIP ROM32K {\n IN address[15];\n OUT out[16];\n\n PARTS:\n BUILTIN ROM32K;\n}',RAM16K:y.replace("//// Replace this comment with your code.","BUILTIN RAM16K;")};async function F(n){await n.pushd("/projects/05"),await(0,r.cL)(n,P),await n.popd(),await n.pushd("/samples"),await n.writeFile("Add.hack",C),await n.writeFile("Max.hack",x),await n.writeFile("Rect.hack",D),await n.popd()}async function N(n){await n.pushd("/projects/05"),await c(n,P,".tst"),await c(n,P,".cmp"),await n.popd()}const E={SimpleAdd:{"SimpleAdd.vm":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/7/StackArithmetic/SimpleAdd/SimpleAdd.vm\n\n// Pushes and adds two constants.\n\npush constant 7\npush constant 8\nadd\n',"SimpleAddVME.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/7/StackArithmetic/SimpleAdd/SimpleAddVME.tst\n\n// Tests and illustrates SimpleAdd.vm on the VM simulator.\n\nload SimpleAdd.vm,\n\nset RAM[0] 256, // initializes the stack pointer\n\nrepeat 3 { // SimpleAdd.vm has 3 VM commands\n vmstep;\n}\n\n// Outputs the stack pointer and the value at the stack\'s base\noutput-list RAM[0]%D2.6.2 RAM[256]%D2.6.2;\noutput;',"SimpleAdd.cmp":"| RAM[0] | RAM[256] |\n| 257 | 15 |\n","SimpleAdd.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/7/StackArithmetic/SimpleAdd/SimpleAdd.tst\n\n// Tests SimpleAdd.asm on the CPU emulator.\n\nset RAM[0] 256, // initializes the stack pointer \n\nrepeat 60 { // enough cycles to complete the execution\n ticktock;\n}\n\n// Outputs the stack pointer and the value at the stack\'s base\noutput-list RAM[0]%D2.6.2 RAM[256]%D2.6.2;\noutput;\n'},StackTest:{"StackTest.vm":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/7/StackArithmetic/StackTest/StackTest.vm\n\n// Executes a sequence of arithmetic and logical operations on the stack. \n\npush constant 17\npush constant 17\neq\npush constant 17\npush constant 16\neq\npush constant 16\npush constant 17\neq\npush constant 892\npush constant 891\nlt\npush constant 891\npush constant 892\nlt\npush constant 891\npush constant 891\nlt\npush constant 32767\npush constant 32766\ngt\npush constant 32766\npush constant 32767\ngt\npush constant 32766\npush constant 32766\ngt\npush constant 57\npush constant 31\npush constant 53\nadd\npush constant 112\nsub\nneg\nand\npush constant 82\nor\nnot\n',"StackTestVME.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/7/StackArithmetic/StackTest/StackTestVME.tst\n\n// Tests and illustrates StackTest.vm on the VM simulator.\n\nload StackTest.vm,\n\nset RAM[0] 256, // initializes the stack pointer\n\nrepeat 38 { // StackTest.vm has 38 VM commands\n vmstep;\n}\n\n// Outputs the stack pointer (RAM[0]) and the stack contents: RAM[256]-RAM[265]\noutput-list RAM[0]%D2.6.2 \n RAM[256]%D2.6.2 RAM[257]%D2.6.2 RAM[258]%D2.6.2 RAM[259]%D2.6.2 RAM[260]%D2.6.2;\noutput;\noutput-list RAM[261]%D2.6.2 RAM[262]%D2.6.2 RAM[263]%D2.6.2 RAM[264]%D2.6.2 RAM[265]%D2.6.2;\noutput;\n',"StackTest.cmp":"| RAM[0] | RAM[256] | RAM[257] | RAM[258] | RAM[259] | RAM[260] |\n| 266 | -1 | 0 | 0 | 0 | -1 |\n| RAM[261] | RAM[262] | RAM[263] | RAM[264] | RAM[265] |\n| 0 | -1 | 0 | 0 | -91 |\n","StackTest.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/7/StackArithmetic/StackTest/StackTest.tst\n\n// Tests StackTest.asm on the CPU emulator.\n\nset RAM[0] 256, // initializes the stack pointer\n\nrepeat 1000 { // enough cycles to complete the execution\n ticktock;\n}\n\n// Outputs the stack pointer and the stack contents: RAM[256]-RAM[265]\noutput-list RAM[0]%D2.6.2 \n RAM[256]%D2.6.2 RAM[257]%D2.6.2 RAM[258]%D2.6.2 RAM[259]%D2.6.2 RAM[260]%D2.6.2;\noutput;\noutput-list RAM[261]%D2.6.2 RAM[262]%D2.6.2 RAM[263]%D2.6.2 RAM[264]%D2.6.2 RAM[265]%D2.6.2;\noutput;\n'},BasicTest:{"BasicTest.vm":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/7/MemoryAccess/BasicTest/BasicTest.vm\n\n// Executes pop and push commands.\n\npush constant 10\npop local 0\npush constant 21\npush constant 22\npop argument 2\npop argument 1\npush constant 36\npop this 6\npush constant 42\npush constant 45\npop that 5\npop that 2\npush constant 510\npop temp 6\npush local 0\npush that 5\nadd\npush argument 1\nsub\npush this 6\npush this 6\nadd\nsub\npush temp 6\nadd\n',"BasicTestVME.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/7/MemoryAccess/BasicTest/BasicTestVME.tst\n\n// Tests and illustrates BasicTest.vm on the VM simulator.\n// Starts by setting the stack pointer and the base addresses\n// of relevant memory segments to selected RAM addresses.\n\nload BasicTest.vm,\n\nset sp 256, // stack pointer\nset local 300, // base address of the local segment\nset argument 400, // base address of the argument segment\nset this 3000, // base address of the this segment\nset that 3010, // base address of the that segment\n\nrepeat 25 { // BasicTest.vm has 25 VM commands\n vmstep;\n}\n\n// Outputs the value at the stack\'s base and some values from the tested memory segments\noutput-list RAM[256]%D1.6.1 RAM[300]%D1.6.1 RAM[401]%D1.6.1 \n RAM[402]%D1.6.1 RAM[3006]%D1.6.1 RAM[3012]%D1.6.1\n RAM[3015]%D1.6.1 RAM[11]%D1.6.1;\noutput;\n',"BasicTest.cmp":"|RAM[256]|RAM[300]|RAM[401]|RAM[402]|RAM[3006|RAM[3012|RAM[3015|RAM[11] |\n| 472 | 10 | 21 | 22 | 36 | 42 | 45 | 510 |","BasicTest.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/7/MemoryAccess/BasicTest/BasicTest.tst\n\n// Tests BasicTest.asm on the CPU emulator.\n\nset RAM[0] 256, // stack pointer\nset RAM[1] 300, // base address of the local segment\nset RAM[2] 400, // base address of the argument segment\nset RAM[3] 3000, // base address of the this segment\nset RAM[4] 3010, // base address of the that segment\n\nrepeat 600 { // enough cycles to complete the execution\n ticktock;\n}\n\n// Outputs the value at the stack\'s base and some values from the tested memory segments\noutput-list RAM[256]%D1.6.1 RAM[300]%D1.6.1 RAM[401]%D1.6.1 \n RAM[402]%D1.6.1 RAM[3006]%D1.6.1 RAM[3012]%D1.6.1\n RAM[3015]%D1.6.1 RAM[11]%D1.6.1;\noutput;\n'},PointerTest:{"PointerTest.vm":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/7/MemoryAccess/PointerTest/PointerTest.vm\n\n// Executes pop and push commands using the \n// pointer, this, and that segments.\n\npush constant 3030\npop pointer 0\npush constant 3040\npop pointer 1\npush constant 32\npop this 2\npush constant 46\npop that 6\npush pointer 0\npush pointer 1\nadd\npush this 2\nsub\npush that 6\nadd\n',"PointerTestVME.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/7/MemoryAccess/PointerTest/PointerTestVME.tst\n\n// Tests and illustrates PointerTest.vm on the VM simulator.\n\nload PointerTest.vm,\n\nset RAM[0] 256, // initializes the stack pointer\n\nrepeat 15 { // PointerTest.vm has 15 VM commands\n vmstep;\n}\n\n// Outputs the stack base, THIS, THAT, and\n// some values from the the this and that segments\noutput-list RAM[256]%D1.6.1 RAM[3]%D1.6.1 RAM[4]%D1.6.1\n RAM[3032]%D1.6.1 RAM[3046]%D1.6.1;\noutput;\n',"PointerTest.cmp":"|RAM[256]| RAM[3] | RAM[4] |RAM[3032|RAM[3046|\n | 6084 | 3030 | 3040 | 32 | 46 |","PointerTest.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/7/MemoryAccess/PointerTest/PointerTest.tst\n\n// Tests PointerTest.asm on the CPU emulator.\n\nset RAM[0] 256, // initializes the stack pointer\n\nrepeat 450 { // enough cycles to complete the execution\n ticktock;\n}\n\n// Outputs the value at the stack\'s base, THIS, THAT, and\n// some values from the the this and that segments\noutput-list RAM[256]%D1.6.1 RAM[3]%D1.6.1 \n RAM[4]%D1.6.1 RAM[3032]%D1.6.1 RAM[3046]%D1.6.1;\noutput;\n'},StaticTest:{"StaticTest.vm":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/7/MemoryAccess/StaticTest/StaticTest.vm\n\n// Executes pop and push commands using the static segment.\n\npush constant 111\npush constant 333\npush constant 888\npop static 8\npop static 3\npop static 1\npush static 3\npush static 1\nsub\npush static 8\nadd\n',"StaticTestVME.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/7/MemoryAccess/StaticTest/StaticTestVME.tst\n\n// Tests and illustrates StaticTest.vm on the VM simulator.\n\nload StaticTest.vm,\n\nset sp 256, // initializes the stack pointer\n\nrepeat 11 { // StaticTest.vm has 11 VM commands\n vmstep;\n}\n\n// Outputs the value at the stack\'s base \noutput-list RAM[256]%D1.6.1;\noutput;\n',"StaticTest.cmp":"|RAM[256]|\n| 1110 |","StaticTest.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/7/MemoryAccess/StaticTest/StaticTest.tst\n\n// Tests StaticTest.asm on the CPU emulator.\n\nset RAM[0] 256, // initializes the stack pointer\n\nrepeat 200 { // enough cycles to complete the execution\n ticktock;\n}\n\n// Outputs the value at the stack\'s base \noutput-list RAM[256]%D1.6.1;\noutput;\n'}};async function z(n){await n.pushd("/projects/07"),await(0,r.cL)(n,E),await n.popd()}async function O(n){await n.pushd("/projects/07"),await c(n,E,".tst"),await c(n,E,"VME.tst"),await c(n,E,".cmp"),await n.popd()}const j={BasicLoop:{"BasicLoop.vm":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/8/ProgramFlow/BasicLoop/BasicLoop.vm\n\n// Computes the sum 1 + 2 + ... + n and pushes the result onto\n// the stack. The value n is given in argument[0], which must be \n// initialized by the caller of this code.\n\n\tpush constant 0 \n\tpop local 0 // sum = 0\nlabel LOOP\n\tpush argument 0 \n\tpush local 0\n\tadd\n\tpop local 0\t // sum = sum + n\n\tpush argument 0\n\tpush constant 1\n\tsub\n\tpop argument 0 // n--\n\tpush argument 0\n\tif-goto LOOP // if n > 0, goto LOOP\n\tpush local 0 // else, pushes sum to the stack\'s top\n',"BasicLoopVME.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/8/ProgramFlow/BasicLoop/BasicLoopVME.tst\n\n// Tests and illustrates BasicLoop.vm on the VM emulator.\n// Before executing the code, initializes the stack pointer\n// and the base addresses of the local and argument segments,\n// and sets argument[0].\n\nload BasicLoop.vm,\n\nset sp 256,\nset local 300,\nset argument 400,\nset argument[0] 3,\n\nrepeat 33 {\n \tvmstep;\n}\n\n// Outputs the stack pointer and the value at the stack\'s base\noutput-list RAM[0]%D1.6.1 RAM[256]%D1.6.1;\noutput;\n',"BasicLoop.cmp":"| RAM[0] |RAM[256]|\n| 257 | 6 |\n","BasicLoop.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/8/ProgramFlow/BasicLoop/BasicLoop.tst\n\n// Tests BasicLoop.asm on the CPU emulator.\n// Before executing the code, initializes the stack pointer\n// and the base addresses of the local and argument segments,\n// and sets argument[0].\n\nset RAM[0] 256, // SP\nset RAM[1] 300, // LCL\nset RAM[2] 400, // ARG\nset RAM[400] 3, // argument 0\n\nrepeat 600 {\n\tticktock;\n}\n\n// Outputs the stack pointer and the value at the stack\'s base\noutput-list RAM[0]%D1.6.1 RAM[256]%D1.6.1;\noutput;\n'},FibonacciSeries:{"FibonacciSeries.vm":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/8/ProgramFlow/FibonacciSeries/FibonacciSeries.vm\n\n// Puts the first n elements of the Fibonacci series in the memory,\n// starting at address addr. n and addr are given in argument[0] and\n// argument[1], which must be initialized by the caller of this code.\n\n\tpush argument 1 // sets THAT, the base address of the\n\tpop pointer 1 // that segment, to argument[1]\n\tpush constant 0 // sets the series\' first and second\n\tpop that 0 // elements to 0 and 1, respectively \n\tpush constant 1 \n\tpop that 1 \n\tpush argument 0 // sets n, the number of remaining elements\n\tpush constant 2 // to be computed, to argument[0] minus 2,\n\tsub // since 2 elements were already computed.\n\tpop argument 0 \n\nlabel LOOP\n\tpush argument 0\n\tif-goto COMPUTE_ELEMENT // if n > 0, goto COMPUTE_ELEMENT\n\tgoto END // otherwise, goto END\n\nlabel COMPUTE_ELEMENT\n // that[2] = that[0] + that[1]\n\tpush that 0\n\tpush that 1\n\tadd\n\tpop that 2\n\t// THAT += 1 (updates the base address of that)\n\tpush pointer 1\n\tpush constant 1\n\tadd\n\tpop pointer 1 \n\t// updates n-- and loops \n\tpush argument 0\n\tpush constant 1\n\tsub\n\tpop argument 0 \n\tgoto LOOP\n\nlabel END\n',"FibonacciSeriesVME.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/8/ProgramFlow/FibonacciSeries/FibonacciSeriesVME.tst\n\n// Tests and illustrates FibonacciSeries.vm on the VM emulator.\n// Before executing the code, initializes the stack pointer\n// and the base addresses of the local and argument segments,\n// and sets argument[0] to n and argument [1] to the base address\n// of the generated series.\n\nload FibonacciSeries.vm,\n\nset sp 256,\nset local 300,\nset argument 400,\nset argument[0] 6,\nset argument[1] 3000,\n\nrepeat 73 {\n\tvmstep;\n}\n\n// Outputs the series of values generated and written by the code.\noutput-list RAM[3000]%D1.6.2 RAM[3001]%D1.6.2 RAM[3002]%D1.6.2 \n RAM[3003]%D1.6.2 RAM[3004]%D1.6.2 RAM[3005]%D1.6.2;\noutput;\n',"FibonacciSeries.cmp":"|RAM[3000]|RAM[3001]|RAM[3002]|RAM[3003]|RAM[3004]|RAM[3005]|\n| 0 | 1 | 1 | 2 | 3 | 5 |\n","FibonacciSeries.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/8/ProgramFlow/FibonacciSeries/FibonacciSeries.tst\n\n// Tests FibonacciSeries.asm on the CPU emulator.\n// Before executing the code, initializes the stack pointer\n// and the base addresses of the local and argument segments,\n// and sets argument[0] and argument [1].\n\nset RAM[0] 256, // SP\nset RAM[1] 300, // LCL\nset RAM[2] 400, // ARG\nset RAM[400] 6, // argument[0], n\nset RAM[401] 3000, // argument[1], base address of the generated series\n\nrepeat 1100 {\n\tticktock;\n}\n\n// Outputs the series of values generated and written by the code.\noutput-list RAM[3000]%D1.6.2 RAM[3001]%D1.6.2 RAM[3002]%D1.6.2 \n RAM[3003]%D1.6.2 RAM[3004]%D1.6.2 RAM[3005]%D1.6.2;\noutput;\n'},SimpleFunction:{"SimpleFunction.vm":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/8/FunctionCalls/SimpleFunction/SimpleFunction.vm\n\n// Performs a simple calculation and returns the result.\n// argument[0] and argument[1] must be set by the caller.\n\nfunction SimpleFunction.test 2\n\tpush local 0\n\tpush local 1\n\tadd\n\tnot\n\tpush argument 0\n\tadd\n\tpush argument 1\n\tsub\n\treturn\n',"SimpleFunctionVME.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/8/FunctionCalls/SimpleFunction/SimpleFunctionVME.tst\n\n// Tests and illustrates SimpleFunction.vm in the VM emulator. \n// Before executing the code, initializes the stack pointer\n// and the base addresses of some of the memory segments, \n// and sets some values in the argument segment.\n\nload SimpleFunction.vm,\n\nset sp 317,\nset local 317,\nset argument 310,\nset this 3000,\nset that 4000,\nset argument[0] 1234,\nset argument[1] 37,\nset argument[2] 9,\nset argument[3] 305,\nset argument[4] 300,\nset argument[5] 3010,\nset argument[6] 4010,\n\nrepeat 10 {\n\tvmstep;\n}\n\n// Outputs SP, LCL, ARG, THIS, THAT, and the return value.\noutput-list RAM[0]%D1.6.1 RAM[1]%D1.6.1 RAM[2]%D1.6.1 \n RAM[3]%D1.6.1 RAM[4]%D1.6.1 RAM[310]%D1.6.1;\noutput;\n',"SimpleFunction.cmp":"| RAM[0] | RAM[1] | RAM[2] | RAM[3] | RAM[4] |RAM[310]|\n| 311 | 305 | 300 | 3010 | 4010 | 1196 |\n","SimpleFunction.tst":"// This file is part of www.nand2tetris.org\n// and the book \"The Elements of Computing Systems\"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/8/FunctionCalls/SimpleFunction/SimpleFunction.tst\n\n// Tests SimpleFunction.asm in the CPU emulator.\n// In particular, tests how the assembly implementation of the 'function'\n// VM command initializes local variables, and how the assembly implementation\n// of the 'return' VM command handles the return value, SP, LCL, ARG, THIS, and THAT. \n// Before executing the code, initializes the stack pointer and the pointers of some\n// of the memory segments, and sets some values in the argument segment.\n\nset RAM[0] 317, // SP\nset RAM[1] 317, // LCL\nset RAM[2] 310, // ARG\nset RAM[3] 3000, // THIS\nset RAM[4] 4000, // THAT\nset RAM[310] 1234, \nset RAM[311] 37, \nset RAM[312] 1000, \nset RAM[313] 305,\nset RAM[314] 300,\nset RAM[315] 3010,\nset RAM[316] 4010, \n\nrepeat 300 {\n\tticktock;\n}\n\n// Outputs SP, LCL, ARG, THIS, THAT, and the return value.\noutput-list RAM[0]%D1.6.1 RAM[1]%D1.6.1 RAM[2]%D1.6.1 \n RAM[3]%D1.6.1 RAM[4]%D1.6.1 RAM[310]%D1.6.1;\noutput;\n"},NestedCall:{"Sys.vm":"// Sys.vm. Tested by the NestedCall test script.\n// Consists of three functions: Sys.init, Sys.main, and Sys.add12.\n\n// Calls Sys.main() and stores a return value in temp 1.\n// Does not return (enters infinite loop).\n// The VM implementation starts running the Sys.init function, by default.\nfunction Sys.init 0\n\tpush constant 4000\t// tests that THIS and THAT are handled correctly\n\tpop pointer 0\n\tpush constant 5000\n\tpop pointer 1\n\tcall Sys.main 0\n\tpop temp 1\n\tlabel LOOP\n\tgoto LOOP\n\n// Sets locals 1, 2 and 3 to some values. Leaves locals 0 and 4 unchanged, \n// to test that the 'function' VM command initliazes them to 0 (the test \n// script sets them to -1 before this code starts running).\n// Calls Sys.add12(123) and stores the return value (should be 135) in temp 0.\n// Returns local 0 + local 1 + local 2 + local 3 + local 4 (should be 456), to \n// confirm that locals were not mangled by the function call.\nfunction Sys.main 5\n\tpush constant 4001\n\tpop pointer 0\n\tpush constant 5001\n\tpop pointer 1\n\tpush constant 200\n\tpop local 1\n\tpush constant 40\n\tpop local 2\n\tpush constant 6\n\tpop local 3\n\tpush constant 123\n\tcall Sys.add12 1\n\tpop temp 0\n\tpush local 0\n\tpush local 1\n\tpush local 2\n\tpush local 3\n\tpush local 4\n\tadd\n\tadd\n\tadd\n\tadd\n\treturn\n\n// Returns (argument 0) + 12.\nfunction Sys.add12 0\n\tpush constant 4002\n\tpop pointer 0\n\tpush constant 5002\n\tpop pointer 1\n\tpush argument 0\n\tpush constant 12\n\tadd\n\treturn\n","NestedCallVME.tst":"// Tests and illustrates how the VM implementation handles function-call-and-return,\n// by executing the functions in Sys.vm in the VM emulator.\n// In particular, loads and runs the functions in Sys.vm.\n\nload Sys.vm,\noutput-list RAM[0]%D1.6.1 RAM[1]%D1.6.1 RAM[2]%D1.6.1 RAM[3]%D1.6.1 RAM[4]%D1.6.1 RAM[5]%D1.6.1 RAM[6]%D1.6.1;\n\nset RAM[0] 261,\nset RAM[1] 261,\nset RAM[2] 256,\nset RAM[3] -3,\nset RAM[4] -4,\nset RAM[5] -1, // test results\nset RAM[6] -1,\nset RAM[256] 1234, // fake stack frame from call Sys.init\nset RAM[257] -1,\nset RAM[258] -2,\nset RAM[259] -3,\nset RAM[260] -4,\n\nset RAM[261] -1, // Initialize stack to check for local segment\nset RAM[262] -1, // being cleared to zero.\nset RAM[263] -1,\nset RAM[264] -1,\nset RAM[265] -1,\nset RAM[266] -1,\nset RAM[267] -1,\nset RAM[268] -1,\nset RAM[269] -1,\nset RAM[270] -1,\nset RAM[271] -1,\nset RAM[272] -1,\nset RAM[273] -1,\nset RAM[274] -1,\nset RAM[275] -1,\nset RAM[276] -1,\nset RAM[277] -1,\nset RAM[278] -1,\nset RAM[279] -1,\nset RAM[280] -1,\nset RAM[281] -1,\nset RAM[282] -1,\nset RAM[283] -1,\nset RAM[284] -1,\nset RAM[285] -1,\nset RAM[286] -1,\nset RAM[287] -1,\nset RAM[288] -1,\nset RAM[289] -1,\nset RAM[290] -1,\nset RAM[291] -1,\nset RAM[292] -1,\nset RAM[293] -1,\nset RAM[294] -1,\nset RAM[295] -1,\nset RAM[296] -1,\nset RAM[297] -1,\nset RAM[298] -1,\nset RAM[299] -1,\n\nset sp 261,\nset local 261,\nset argument 256,\nset this 3000,\nset that 4000;\n\nrepeat 50 {\n\tvmstep;\n}\noutput;\n","NestedCall.cmp":"| RAM[0] | RAM[1] | RAM[2] | RAM[3] | RAM[4] | RAM[5] | RAM[6] |\n| 261 | 261 | 256 | 4000 | 5000 | 135 | 246 |\n","NestedCall.tst":"// Tests how the VM implementation handles function-call-and-return,\n// by executing the functions in Sys.vm.\n// In particular, loads and runs NestedCall.asm, which results when \n// the VM translator is applied to the NestedCall folder, which \n// includes only one VM file: Sys.vm.\n\nset RAM[0] 261,\nset RAM[1] 261,\nset RAM[2] 256,\nset RAM[3] -3,\nset RAM[4] -4,\nset RAM[5] -1, // test results\nset RAM[6] -1,\nset RAM[256] 1234, // fake stack frame from call Sys.init\nset RAM[257] -1,\nset RAM[258] -2,\nset RAM[259] -3,\nset RAM[260] -4,\n\nset RAM[261] -1, // Initializes the stack, to check that the local segment\nset RAM[262] -1, // is initialized to zeros by the 'function' VM command.\nset RAM[263] -1,\nset RAM[264] -1,\nset RAM[265] -1,\nset RAM[266] -1,\nset RAM[267] -1,\nset RAM[268] -1,\nset RAM[269] -1,\nset RAM[270] -1,\nset RAM[271] -1,\nset RAM[272] -1,\nset RAM[273] -1,\nset RAM[274] -1,\nset RAM[275] -1,\nset RAM[276] -1,\nset RAM[277] -1,\nset RAM[278] -1,\nset RAM[279] -1,\nset RAM[280] -1,\nset RAM[281] -1,\nset RAM[282] -1,\nset RAM[283] -1,\nset RAM[284] -1,\nset RAM[285] -1,\nset RAM[286] -1,\nset RAM[287] -1,\nset RAM[288] -1,\nset RAM[289] -1,\nset RAM[290] -1,\nset RAM[291] -1,\nset RAM[292] -1,\nset RAM[293] -1,\nset RAM[294] -1,\nset RAM[295] -1,\nset RAM[296] -1,\nset RAM[297] -1,\nset RAM[298] -1,\nset RAM[299] -1,\n\nrepeat 4000 {\n\tticktock;\n}\n\noutput-list RAM[0]%D1.6.1 RAM[1]%D1.6.1 RAM[2]%D1.6.1 RAM[3]%D1.6.1 RAM[4]%D1.6.1 RAM[5]%D1.6.1 RAM[6]%D1.6.1;\noutput;\n"},FibonacciElement:{"Sys.vm":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/8/FunctionCalls/FibonacciElement/Sys.vm\n\n// Containts one function: Sys.init.\n\n// Pushes a constant n onto the stack, and calls the Main.fibonacii\n// function, which computes the n\'th element of the Fibonacci series.\n// Note that by convention, the Sys.init function is called "automatically" \n// by the bootstrap code generated by the VM translator.\nfunction Sys.init 0\n // Computes fibonacci(4)\n\tpush constant 4\n\t// Calls the function, informing that one argument was pushed onto the stack\n\tcall Main.fibonacci 1\nlabel END \n\tgoto END // loops infinitely',"Main.vm":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/8/FunctionCalls/FibonacciElement/Main.vm\n\n// Contains one function: Main.fibonacci.\n\n// Computes the n\'th element of the Fibonacci series, recursively.\n// n is given in argument[0]. Called by the Sys.init function \n// (part of the Sys.vm file), which sets argument[0] to an input\n// value and then calls Main.fibonacci.\nfunction Main.fibonacci 0\n\tpush argument 0\n\tpush constant 2\n\tlt \n\tif-goto N_LT_2 \n\tgoto N_GE_2\nlabel N_LT_2 // if n < 2 returns n\n\tpush argument 0 \n\treturn\nlabel N_GE_2 // if n >= 2 returns fib(n - 2) + fib(n - 1)\n\tpush argument 0\n\tpush constant 2\n\tsub\n\tcall Main.fibonacci 1 // computes fib(n - 2)\n\tpush argument 0\n\tpush constant 1\n\tsub\n\tcall Main.fibonacci 1 // computes fib(n - 1)\n\tadd // returns fib(n - 1) + fib(n - 2)\n\treturn\n',"FibonacciElementVME.tst":"// This file is part of www.nand2tetris.org\n// and the book \"The Elements of Computing Systems\"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/8/FunctionCalls/FibonacciElement/FibonacciElementVME.tst\n\n// Tests and illustrates the given Fibonacci element program on the VM emulator.\n\nload,\n\nset sp 261,\n\nrepeat 110 {\n vmstep;\n}\n\n// Outputs the stack pointer and the value at the stack's base.\n// That's where the implementation should put the return value. \noutput-list RAM[0]%D1.6.1 RAM[261]%D1.6.1;\noutput;\n","FibonacciElement.cmp":"| RAM[0] |RAM[261]|\n| 262 | 3 |\n","FibonacciElement.tst":"// This file is part of www.nand2tetris.org\n// and the book \"The Elements of Computing Systems\"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/8/FunctionCalls/FibonacciElement/FibonacciElement.tst\n\n// Tests FibonacciElement.asm on the CPU emulator. \n// FibonacciElement.asm results from translating Main.vm and Sys.vm into\n// a single assembly program, stored in the file FibonacciElement.asm.\n\nrepeat 6000 {\n\tticktock;\n}\n\n// Outputs the stack pointer and the value at the stack's base.\n// That's where the implementation should put the return value.\noutput-list RAM[0]%D1.6.1 RAM[261]%D1.6.1;\noutput;\n"},StaticsTest:{"Class1.vm":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/8/FunctionCalls/StaticsTest/Class1.vm\n\n// Stores two supplied arguments in static[0] and static[1].\nfunction Class1.set 0\n\tpush argument 0\n\tpop static 0\n\tpush argument 1\n\tpop static 1\n\tpush constant 0\n\treturn\n\n// Returns static[0] - static[1].\nfunction Class1.get 0\n\tpush static 0\n\tpush static 1\n\tsub\n\treturn',"Class2.vm":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/8/FunctionCalls/StaticsTest/Class2.vm\n\n// Stores two supplied arguments in static[0] and static[1].\nfunction Class2.set 0\n\tpush argument 0\n\tpop static 0\n\tpush argument 1\n\tpop static 1\n\tpush constant 0\n\treturn\n\n// Returns static[0] - static[1].\nfunction Class2.get 0\n\tpush static 0\n\tpush static 1\n\tsub\n\treturn',"Sys.vm":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/8/FunctionCalls/StaticsTest/Sys.vm\n\n// Tests that different functions, stored in two different \n// class files, manipulate the static segment correctly. \n\nfunction Sys.init 0\n\tpush constant 6\n\tpush constant 8\n\tcall Class1.set 2\n\tpop temp 0 // dumps the return value\n\tpush constant 23\n\tpush constant 15\n\tcall Class2.set 2\n\tpop temp 0 // dumps the return value\n\tcall Class1.get 0\n\tcall Class2.get 0\nlabel END\n\tgoto END',"StaticsTestVME.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/8/FunctionCalls/StaticsTest/StaticsTestVME.tst\n\n// Tests and illustrates the statics test on the VM emulator.\n\nload,\n\nset sp 261,\n\nrepeat 36 {\n\tvmstep;\n}\n\noutput-list RAM[0]%D1.6.1 RAM[261]%D1.6.1 RAM[262]%D1.6.1;\noutput;\n',"StaticsTest.cmp":"| RAM[0] |RAM[261]|RAM[262]|\n| 263 | -2 | 8 |\n","StaticsTest.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/8/FunctionCalls/StaticsTest/StaticsTest.tst\n\n// Tests StaticTest.asm in the CPU emulator.\n// This assembly file results from translating the staticsTest folder.\n\nset RAM[0] 256,\n\nrepeat 2500 {\n\tticktock;\n}\n\noutput-list RAM[0]%D1.6.1 RAM[261]%D1.6.1 RAM[262]%D1.6.1;\noutput;\n'}};async function L(n){await n.pushd("/projects/08"),await(0,r.cL)(n,j),await n.popd()}async function U(n){await n.pushd("/projects/08"),await c(n,j,".tst"),await c(n,j,"VME.tst"),await c(n,j,".cmp"),await n.popd()}var H=e(9828);const K={"01":s,"02":o,"03":u,"05":d},X={"07":i,"08":p},V={1:s,2:o,3:u,4:a,5:d,6:H,7:i,8:p};let W=!1;const J=async(n,t)=>{if(!W){W=!0,t??=[1,2,3,4,6,5,7,8];for(const e of t)Object.keys(V).includes(e.toString())&&await V[e].resetFiles(n);W=!1}},G=async(n,t)=>{if(!W){W=!0,t??=[1,2,3,4,5,7,8];for(const e of t)Object.keys(V).includes(e.toString())&&await V[e].resetTests(n);W=!1}},_={...l,...m,...R,...P,...E,...j}}}]); \ No newline at end of file +"use strict";(globalThis.webpackChunk_nand2tetris_web=globalThis.webpackChunk_nand2tetris_web||[]).push([[288],{3288:(n,t,e)=>{e.r(t),e.d(t,{Assignments:()=>_,ChipProjects:()=>K,VmProjects:()=>X,resetFiles:()=>J,resetTests:()=>G});var s={};e.r(s),e.d(s,{BUILTIN_CHIPS:()=>k,CHIPS:()=>l,resetFiles:()=>h,resetTests:()=>B});var o={};e.r(o),e.d(o,{BUILTIN_CHIPS:()=>v,CHIPS:()=>m,resetFiles:()=>f,resetTests:()=>M});var u={};e.r(u),e.d(u,{BUILTIN_CHIPS:()=>A,CHIPS:()=>R,resetFiles:()=>T,resetTests:()=>b});var a={};e.r(a),e.d(a,{TESTS:()=>g,resetFiles:()=>w,resetTests:()=>S});var d={};e.r(d),e.d(d,{BUILTIN_CHIPS:()=>I,CHIPS:()=>P,resetFiles:()=>F,resetTests:()=>N});var i={};e.r(i),e.d(i,{VMS:()=>E,resetFiles:()=>z,resetTests:()=>O});var p={};e.r(p),e.d(p,{VMS:()=>j,resetFiles:()=>L,resetTests:()=>U});var r=e(4544);async function c(n,t,e){for(const[s,o]of Object.entries(t))"string"===typeof o?s.endsWith(`${e}`)&&await n.writeFile(s,o):(n.cd(s),await c(n,o,e),n.cd(".."))}const l={Nand:{"Nand.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/Nand.tst\n\noutput-list a b out;\n\nset a 0,\nset b 0,\neval,\noutput;\n\nset a 0,\nset b 1,\neval,\noutput;\n\nset a 1,\nset b 0,\neval,\noutput;\n\nset a 1,\nset b 1,\neval,\noutput;',"Nand.cmp":"| a | b |out|\n| 0 | 0 | 1 |\n| 0 | 1 | 1 |\n| 1 | 0 | 1 |\n| 1 | 1 | 0 |"},Not:{"Not.hdl":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/Not.hdl\n/**\n * Not gate:\n * if (in) out = 0, else out = 1\n */\nCHIP Not {\n IN in;\n OUT out;\n\n PARTS:\n //// Replace this comment with your code.\n}',"Not.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/Not.tst\n\noutput-list in out;\n\nset in 0,\neval,\noutput;\n\nset in 1,\neval,\noutput;',"Not.cmp":"|in |out|\n| 0 | 1 |\n| 1 | 0 |"},And:{"And.hdl":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/And.hdl\n/**\n * And gate:\n * if (a and b) out = 1, else out = 0 \n */\nCHIP And {\n IN a, b;\n OUT out;\n \n PARTS:\n //// Replace this comment with your code.\n}',"And.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/And.tst\n\noutput-list a b out;\n\nset a 0,\nset b 0,\neval,\noutput;\n\nset a 0,\nset b 1,\neval,\noutput;\n\nset a 1,\nset b 0,\neval,\noutput;\n\nset a 1,\nset b 1,\neval,\noutput;',"And.cmp":"| a | b |out|\n| 0 | 0 | 0 |\n| 0 | 1 | 0 |\n| 1 | 0 | 0 |\n| 1 | 1 | 1 |"},Or:{"Or.hdl":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/Or.hdl\n/**\n * Or gate:\n * if (a or b) out = 1, else out = 0 \n */\nCHIP Or {\n IN a, b;\n OUT out;\n\n PARTS:\n //// Replace this comment with your code.\n}',"Or.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/Or.tst\n\noutput-list a b out;\n\nset a 0,\nset b 0,\neval,\noutput;\n\nset a 0,\nset b 1,\neval,\noutput;\n\nset a 1,\nset b 0,\neval,\noutput;\n\nset a 1,\nset b 1,\neval,\noutput;',"Or.cmp":"| a | b |out|\n| 0 | 0 | 0 |\n| 0 | 1 | 1 |\n| 1 | 0 | 1 |\n| 1 | 1 | 1 |"},Xor:{"Xor.hdl":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/Xor.hdl\n/**\n * Exclusive-or gate:\n * if ((a and Not(b)) or (Not(a) and b)) out = 1, else out = 0\n */\nCHIP Xor {\n IN a, b;\n OUT out;\n\n PARTS:\n //// Replace this comment with your code.\n}',"Xor.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/Xor.tst\n\noutput-list a b out;\n\nset a 0,\nset b 0,\neval,\noutput;\n\nset a 0,\nset b 1,\neval,\noutput;\n\nset a 1,\nset b 0,\neval,\noutput;\n\nset a 1,\nset b 1,\neval,\noutput;',"Xor.cmp":"| a | b |out|\n| 0 | 0 | 0 |\n| 0 | 1 | 1 |\n| 1 | 0 | 1 |\n| 1 | 1 | 0 |"},Mux:{"Mux.hdl":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/Mux.hdl\n/** \n * Multiplexor:\n * if (sel = 0) out = a, else out = b\n */\nCHIP Mux {\n IN a, b, sel;\n OUT out;\n\n PARTS:\n //// Replace this comment with your code.\n}',"Mux.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/Mux.tst\n\noutput-list a b sel out;\n\nset a 0,\nset b 0,\nset sel 0,\neval,\noutput;\n\nset sel 1,\neval,\noutput;\n\nset a 0,\nset b 1,\nset sel 0,\neval,\noutput;\n\nset sel 1,\neval,\noutput;\n\nset a 1,\nset b 0,\nset sel 0,\neval,\noutput;\n\nset sel 1,\neval,\noutput;\n\nset a 1,\nset b 1,\nset sel 0,\neval,\noutput;\n\nset sel 1,\neval,\noutput;',"Mux.cmp":"| a | b |sel|out|\n| 0 | 0 | 0 | 0 |\n| 0 | 0 | 1 | 0 |\n| 0 | 1 | 0 | 0 |\n| 0 | 1 | 1 | 1 |\n| 1 | 0 | 0 | 1 |\n| 1 | 0 | 1 | 0 |\n| 1 | 1 | 0 | 1 |\n| 1 | 1 | 1 | 1 |"},DMux:{"DMux.hdl":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/DMux.hdl\n/**\n * Demultiplexor:\n * [a, b] = [in, 0] if sel = 0\n * [0, in] if sel = 1\n */\nCHIP DMux {\n IN in, sel;\n OUT a, b;\n\n PARTS:\n //// Replace this comment with your code.\n}',"DMux.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/DMux.tst\n\noutput-list in sel a b;\n\nset in 0,\nset sel 0,\neval,\noutput;\n\nset sel 1,\neval,\noutput;\n\nset in 1,\nset sel 0,\neval,\noutput;\n\nset sel 1,\neval,\noutput;',"DMux.cmp":"|in |sel| a | b |\n| 0 | 0 | 0 | 0 |\n| 0 | 1 | 0 | 0 |\n| 1 | 0 | 1 | 0 |\n| 1 | 1 | 0 | 1 |"},Not16:{"Not16.hdl":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/01/Not16.hdl\n/**\n * 16-bit Not gate:\n * for i = 0, ..., 15:\n * out[i] = Not(a[i])\n */\nCHIP Not16 {\n IN in[16];\n OUT out[16];\n\n PARTS:\n //// Replace this comment with your code.\n}',"Not16.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/Not16.tst\n\noutput-list in%B1.16.1 out%B1.16.1;\n\nset in %B0000000000000000,\neval,\noutput;\n\nset in %B1111111111111111,\neval,\noutput;\n\nset in %B1010101010101010,\neval,\noutput;\n\nset in %B0011110011000011,\neval,\noutput;\n\nset in %B0001001000110100,\neval,\noutput;',"Not16.cmp":"| in | out |\n| 0000000000000000 | 1111111111111111 |\n| 1111111111111111 | 0000000000000000 |\n| 1010101010101010 | 0101010101010101 |\n| 0011110011000011 | 1100001100111100 |\n| 0001001000110100 | 1110110111001011 |"},And16:{"And16.hdl":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/And16.hdl\n/**\n * 16-bit And gate:\n * for i = 0, ..., 15:\n * out[i] = a[i] And b[i] \n */\nCHIP And16 {\n IN a[16], b[16];\n OUT out[16];\n\n PARTS:\n //// Replace this comment with your code.\n}',"And16.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/And16.tst\n\noutput-list a%B1.16.1 b%B1.16.1 out%B1.16.1;\n\nset a %B0000000000000000,\nset b %B0000000000000000,\neval,\noutput;\n\nset a %B0000000000000000,\nset b %B1111111111111111,\neval,\noutput;\n\nset a %B1111111111111111,\nset b %B1111111111111111,\neval,\noutput;\n\nset a %B1010101010101010,\nset b %B0101010101010101,\neval,\noutput;\n\nset a %B0011110011000011,\nset b %B0000111111110000,\neval,\noutput;\n\nset a %B0001001000110100,\nset b %B1001100001110110,\neval,\noutput;',"And16.cmp":"| a | b | out |\n| 0000000000000000 | 0000000000000000 | 0000000000000000 |\n| 0000000000000000 | 1111111111111111 | 0000000000000000 |\n| 1111111111111111 | 1111111111111111 | 1111111111111111 |\n| 1010101010101010 | 0101010101010101 | 0000000000000000 |\n| 0011110011000011 | 0000111111110000 | 0000110011000000 |\n| 0001001000110100 | 1001100001110110 | 0001000000110100 |"},Or16:{"Or16.hdl":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/Or16.hdl\n/**\n * 16-bit Or gate:\n * for i = 0, ..., 15:\n * out[i] = a[i] Or b[i] \n */\nCHIP Or16 {\n IN a[16], b[16];\n OUT out[16];\n\n PARTS:\n //// Replace this comment with your code.\n}',"Or16.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/Or16.tst\n\noutput-list a%B1.16.1 b%B1.16.1 out%B1.16.1;\n\nset a %B0000000000000000,\nset b %B0000000000000000,\neval,\noutput;\n\nset a %B0000000000000000,\nset b %B1111111111111111,\neval,\noutput;\n\nset a %B1111111111111111,\nset b %B1111111111111111,\neval,\noutput;\n\nset a %B1010101010101010,\nset b %B0101010101010101,\neval,\noutput;\n\nset a %B0011110011000011,\nset b %B0000111111110000,\neval,\noutput;\n\nset a %B0001001000110100,\nset b %B1001100001110110,\neval,\noutput;',"Or16.cmp":"| a | b | out |\n| 0000000000000000 | 0000000000000000 | 0000000000000000 |\n| 0000000000000000 | 1111111111111111 | 1111111111111111 |\n| 1111111111111111 | 1111111111111111 | 1111111111111111 |\n| 1010101010101010 | 0101010101010101 | 1111111111111111 |\n| 0011110011000011 | 0000111111110000 | 0011111111110011 |\n| 0001001000110100 | 1001100001110110 | 1001101001110110 |"},Mux16:{"Mux16.hdl":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/Mux16.hdl\n/**\n * 16-bit multiplexor: \n * for i = 0, ..., 15:\n * if (sel = 0) out[i] = a[i], else out[i] = b[i]\n */\nCHIP Mux16 {\n IN a[16], b[16], sel;\n OUT out[16];\n\n PARTS:\n //// Replace this comment with your code.\n}',"Mux16.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/Mux16.tst\n\noutput-list a%B1.16.1 b%B1.16.1 sel out%B1.16.1;\n\nset a 0,\nset b 0,\nset sel 0,\neval,\noutput;\n\nset sel 1,\neval,\noutput;\n\nset a %B0000000000000000,\nset b %B0001001000110100,\nset sel 0,\neval,\noutput;\n\nset sel 1,\neval,\noutput;\n\nset a %B1001100001110110,\nset b %B0000000000000000,\nset sel 0,\neval,\noutput;\n\nset sel 1,\neval,\noutput;\n\nset a %B1010101010101010,\nset b %B0101010101010101,\nset sel 0,\neval,\noutput;\n\nset sel 1,\neval,\noutput;',"Mux16.cmp":"| a | b |sel| out |\n| 0000000000000000 | 0000000000000000 | 0 | 0000000000000000 |\n| 0000000000000000 | 0000000000000000 | 1 | 0000000000000000 |\n| 0000000000000000 | 0001001000110100 | 0 | 0000000000000000 |\n| 0000000000000000 | 0001001000110100 | 1 | 0001001000110100 |\n| 1001100001110110 | 0000000000000000 | 0 | 1001100001110110 |\n| 1001100001110110 | 0000000000000000 | 1 | 0000000000000000 |\n| 1010101010101010 | 0101010101010101 | 0 | 1010101010101010 |\n| 1010101010101010 | 0101010101010101 | 1 | 0101010101010101 |"},Mux4Way16:{"Mux4Way16.hdl":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/Mux4Way16.hdl\n/**\n * 4-way 16-bit multiplexor:\n * out = a if sel = 00\n * b if sel = 01\n * c if sel = 10\n * d if sel = 11\n */\nCHIP Mux4Way16 {\n IN a[16], b[16], c[16], d[16], sel[2];\n OUT out[16];\n \n PARTS:\n //// Replace this comment with your code.\n}',"Mux4Way16.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/Mux4Way16.tst\n\noutput-list a%B1.16.1 b%B1.16.1 c%B1.16.1 d%B1.16.1 sel%B2.2.2 out%B1.16.1;\n\nset a 0,\nset b 0,\nset c 0,\nset d 0,\nset sel 0,\neval,\noutput;\n\nset sel 1,\neval,\noutput;\n\nset sel 2,\neval,\noutput;\n\nset sel 3,\neval,\noutput;\n\nset a %B0001001000110100,\nset b %B1001100001110110,\nset c %B1010101010101010,\nset d %B0101010101010101,\nset sel 0,\neval,\noutput;\n\nset sel 1,\neval,\noutput;\n\nset sel 2,\neval,\noutput;\n\nset sel 3,\neval,\noutput;',"Mux4Way16.cmp":"| a | b | c | d | sel | out |\n| 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 00 | 0000000000000000 |\n| 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 01 | 0000000000000000 |\n| 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 10 | 0000000000000000 |\n| 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 11 | 0000000000000000 |\n| 0001001000110100 | 1001100001110110 | 1010101010101010 | 0101010101010101 | 00 | 0001001000110100 |\n| 0001001000110100 | 1001100001110110 | 1010101010101010 | 0101010101010101 | 01 | 1001100001110110 |\n| 0001001000110100 | 1001100001110110 | 1010101010101010 | 0101010101010101 | 10 | 1010101010101010 |\n| 0001001000110100 | 1001100001110110 | 1010101010101010 | 0101010101010101 | 11 | 0101010101010101 ||"},Mux8Way16:{"Mux8Way16.hdl":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/Mux8Way16.hdl\n/**\n * 8-way 16-bit multiplexor:\n * out = a if sel = 000\n * b if sel = 001\n * c if sel = 010\n * d if sel = 011\n * e if sel = 100\n * f if sel = 101\n * g if sel = 110\n * h if sel = 111\n */\nCHIP Mux8Way16 {\n IN a[16], b[16], c[16], d[16],\n e[16], f[16], g[16], h[16],\n sel[3];\n OUT out[16];\n\n PARTS:\n //// Replace this comment with your code.\n}',"Mux8Way16.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/Mux8Way16.tst\n\noutput-list a%B1.16.1 b%B1.16.1 c%B1.16.1 d%B1.16.1 e%B1.16.1 f%B1.16.1 g%B1.16.1 h%B1.16.1 sel%B2.3.2 out%B1.16.1;\n\nset a 0,\nset b 0,\nset c 0,\nset d 0,\nset e 0,\nset f 0,\nset g 0,\nset h 0,\nset sel 0,\neval,\noutput;\n\nset sel 1,\neval,\noutput;\n\nset sel 2,\neval,\noutput;\n\nset sel 3,\neval,\noutput;\n\nset sel 4,\neval,\noutput;\n\nset sel 5,\neval,\noutput;\n\nset sel 6,\neval,\noutput;\n\nset sel 7,\neval,\noutput;\n\nset a %B0001001000110100,\nset b %B0010001101000101,\nset c %B0011010001010110,\nset d %B0100010101100111,\nset e %B0101011001111000,\nset f %B0110011110001001,\nset g %B0111100010011010,\nset h %B1000100110101011,\nset sel 0,\neval,\noutput;\n\nset sel 1,\neval,\noutput;\n\nset sel 2,\neval,\noutput;\n\nset sel 3,\neval,\noutput;\n\nset sel 4,\neval,\noutput;\n\nset sel 5,\neval,\noutput;\n\nset sel 6,\neval,\noutput;\n\nset sel 7,\neval,\noutput;',"Mux8Way16.cmp":"| a | b | c | d | e | f | g | h | sel | out |\n| 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 000 | 0000000000000000 |\n| 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 001 | 0000000000000000 |\n| 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 010 | 0000000000000000 |\n| 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 011 | 0000000000000000 |\n| 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 100 | 0000000000000000 |\n| 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 101 | 0000000000000000 |\n| 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 110 | 0000000000000000 |\n| 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 111 | 0000000000000000 |\n| 0001001000110100 | 0010001101000101 | 0011010001010110 | 0100010101100111 | 0101011001111000 | 0110011110001001 | 0111100010011010 | 1000100110101011 | 000 | 0001001000110100 |\n| 0001001000110100 | 0010001101000101 | 0011010001010110 | 0100010101100111 | 0101011001111000 | 0110011110001001 | 0111100010011010 | 1000100110101011 | 001 | 0010001101000101 |\n| 0001001000110100 | 0010001101000101 | 0011010001010110 | 0100010101100111 | 0101011001111000 | 0110011110001001 | 0111100010011010 | 1000100110101011 | 010 | 0011010001010110 |\n| 0001001000110100 | 0010001101000101 | 0011010001010110 | 0100010101100111 | 0101011001111000 | 0110011110001001 | 0111100010011010 | 1000100110101011 | 011 | 0100010101100111 |\n| 0001001000110100 | 0010001101000101 | 0011010001010110 | 0100010101100111 | 0101011001111000 | 0110011110001001 | 0111100010011010 | 1000100110101011 | 100 | 0101011001111000 |\n| 0001001000110100 | 0010001101000101 | 0011010001010110 | 0100010101100111 | 0101011001111000 | 0110011110001001 | 0111100010011010 | 1000100110101011 | 101 | 0110011110001001 |\n| 0001001000110100 | 0010001101000101 | 0011010001010110 | 0100010101100111 | 0101011001111000 | 0110011110001001 | 0111100010011010 | 1000100110101011 | 110 | 0111100010011010 |\n| 0001001000110100 | 0010001101000101 | 0011010001010110 | 0100010101100111 | 0101011001111000 | 0110011110001001 | 0111100010011010 | 1000100110101011 | 111 | 1000100110101011 |"},DMux4Way:{"DMux4Way.hdl":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/DMux4Way.hdl\n/**\n * 4-way demultiplexor:\n * [a, b, c, d] = [in, 0, 0, 0] if sel = 00\n * [0, in, 0, 0] if sel = 01\n * [0, 0, in, 0] if sel = 10\n * [0, 0, 0, in] if sel = 11\n */\nCHIP DMux4Way {\n IN in, sel[2];\n OUT a, b, c, d;\n\n PARTS:\n //// Replace this comment with your code.\n}',"DMux4Way.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/DMux4Way.tst\n\noutput-list in sel%B2.2.2 a b c d;\n\nset in 0,\nset sel %B00,\neval,\noutput;\n\nset sel %B01,\neval,\noutput;\n\nset sel %B10,\neval,\noutput;\n\nset sel %B11,\neval,\noutput;\n\nset in 1,\nset sel %B00,\neval,\noutput;\n\nset sel %B01,\neval,\noutput;\n\nset sel %B10,\neval,\noutput;\n\nset sel %B11,\neval,\noutput;',"DMux4Way.cmp":"|in | sel | a | b | c | d |\n| 0 | 00 | 0 | 0 | 0 | 0 |\n| 0 | 01 | 0 | 0 | 0 | 0 |\n| 0 | 10 | 0 | 0 | 0 | 0 |\n| 0 | 11 | 0 | 0 | 0 | 0 |\n| 1 | 00 | 1 | 0 | 0 | 0 |\n| 1 | 01 | 0 | 1 | 0 | 0 |\n| 1 | 10 | 0 | 0 | 1 | 0 |\n| 1 | 11 | 0 | 0 | 0 | 1 |"},DMux8Way:{"DMux8Way.hdl":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/DMux8Way.hdl\n/**\n * 8-way demultiplexor:\n * [a, b, c, d, e, f, g, h] = [in, 0, 0, 0, 0, 0, 0, 0] if sel = 000\n * [0, in, 0, 0, 0, 0, 0, 0] if sel = 001\n * [0, 0, in, 0, 0, 0, 0, 0] if sel = 010\n * [0, 0, 0, in, 0, 0, 0, 0] if sel = 011\n * [0, 0, 0, 0, in, 0, 0, 0] if sel = 100\n * [0, 0, 0, 0, 0, in, 0, 0] if sel = 101\n * [0, 0, 0, 0, 0, 0, in, 0] if sel = 110\n * [0, 0, 0, 0, 0, 0, 0, in] if sel = 111\n */\nCHIP DMux8Way {\n IN in, sel[3];\n OUT a, b, c, d, e, f, g, h;\n\n PARTS:\n //// Replace this comment with your code.\n}',"DMux8Way.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/DMux8Way.tst\n\noutput-list in sel%B2.3.2 a b c d e f g h;\n\nset in 0,\nset sel %B000,\neval,\noutput;\n\nset sel %B001,\neval,\noutput;\n\nset sel %B010,\neval,\noutput;\n\nset sel %B011,\neval,\noutput;\n\nset sel %B100,\neval,\noutput;\n\nset sel %B101,\neval,\noutput;\n\nset sel %B110,\neval,\noutput;\n\nset sel %B111,\neval,\noutput;\n\nset in 1,\nset sel %B000,\neval,\noutput;\n\nset sel %B001,\neval,\noutput;\n\nset sel %B010,\neval,\noutput;\n\nset sel %B011,\neval,\noutput;\n\nset sel %B100,\neval,\noutput;\n\nset sel %B101,\neval,\noutput;\n\nset sel %B110,\neval,\noutput;\n\nset sel %B111,\neval,\noutput;',"DMux8Way.cmp":"|in | sel | a | b | c | d | e | f | g | h |\n| 0 | 000 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |\n| 0 | 001 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |\n| 0 | 010 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |\n| 0 | 011 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |\n| 0 | 100 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |\n| 0 | 101 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |\n| 0 | 110 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |\n| 0 | 111 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |\n| 1 | 000 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |\n| 1 | 001 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 |\n| 1 | 010 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 |\n| 1 | 011 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 |\n| 1 | 100 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 |\n| 1 | 101 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |\n| 1 | 110 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 |\n| 1 | 111 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |"},Or8Way:{"Or8Way.hdl":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/Or8Way.hdl\n/**\n * 8-way Or gate: \n * out = in[0] Or in[1] Or ... Or in[7]\n */\nCHIP Or8Way {\n IN in[8];\n OUT out;\n\n PARTS:\n //// Replace this comment with your code.\n}',"Or8Way.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/Or8Way.tst\n\noutput-list in%B2.8.2 out;\n\nset in %B00000000,\neval,\noutput;\n\nset in %B11111111,\neval,\noutput;\n\nset in %B00010000,\neval,\noutput;\n\nset in %B00000001,\neval,\noutput;\n\nset in %B00100110,\neval,\noutput;',"Or8Way.cmp":"| in |out|\n| 00000000 | 0 |\n| 11111111 | 1 |\n| 00010000 | 1 |\n| 00000001 | 1 |\n| 00100110 | 1 |"}},k={Nand:'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/1/Nand.hdl\n/**\n * Nand gate:\n * if (a and b) out = 0, else out = 1 \n */\nCHIP Nand {\n IN a, b;\n OUT out;\n \n PARTS:\n BUILTIN Nand;\n}'};async function h(n){await n.pushd("/projects/01"),await(0,r.cL)(n,l),await n.popd()}async function B(n){await n.pushd("/projects/01"),await c(n,l,".tst"),await c(n,l,".cmp"),await n.popd()}const m={HalfAdder:{"HalfAdder.hdl":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/2/HalfAdder.hdl\n/**\n * Computes the sum of two bits.\n */\nCHIP HalfAdder {\n IN a, b; // 1-bit inputs\n OUT sum, // Right bit of a + b \n carry; // Left bit of a + b\n\n PARTS:\n //// Replace this comment with your code.\n}',"HalfAdder.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/2/HalfAdder.tst\n\noutput-list a b sum carry;\n\nset a 0,\nset b 0,\neval,\noutput;\n\nset a 0,\nset b 1,\neval,\noutput;\n\nset a 1,\nset b 0,\neval,\noutput;\n\nset a 1,\nset b 1,\neval,\noutput;',"HalfAdder.cmp":"| a | b |sum|car|\n| 0 | 0 | 0 | 0 |\n| 0 | 1 | 1 | 0 |\n| 1 | 0 | 1 | 0 |\n| 1 | 1 | 0 | 1 |"},FullAdder:{"FullAdder.hdl":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/2/FullAdder.hdl\n/**\n * Computes the sum of three bits.\n */\nCHIP FullAdder {\n IN a, b, c; // 1-bit inputs\n OUT sum, // Right bit of a + b + c\n carry; // Left bit of a + b + c\n\n PARTS:\n //// Replace this comment with your code.\n}',"FullAdder.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/2/FullAdder.tst\n\noutput-list a b c sum carry%B2.1.2;\n\nset a 0,\nset b 0,\nset c 0,\neval,\noutput;\n\nset c 1,\neval,\noutput;\n\nset b 1,\nset c 0,\neval,\noutput;\n\nset c 1,\neval,\noutput;\n\nset a 1,\nset b 0,\nset c 0,\neval,\noutput;\n\nset c 1,\neval,\noutput;\n\nset b 1,\nset c 0,\neval,\noutput;\n\nset c 1,\neval,\noutput;',"FullAdder.cmp":"| a | b | c |sum|carry|\n| 0 | 0 | 0 | 0 | 0 |\n| 0 | 0 | 1 | 1 | 0 |\n| 0 | 1 | 0 | 1 | 0 |\n| 0 | 1 | 1 | 0 | 1 |\n| 1 | 0 | 0 | 1 | 0 |\n| 1 | 0 | 1 | 0 | 1 |\n| 1 | 1 | 0 | 0 | 1 |\n| 1 | 1 | 1 | 1 | 1 |"},Add16:{"Add16.hdl":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/2/Add16.hdl\n/**\n * 16-bit adder: Adds two 16-bit two\'s complement values.\n * The most significant carry bit is ignored.\n */\nCHIP Add16 {\n IN a[16], b[16];\n OUT out[16];\n\n PARTS:\n //// Replace this comment with your code.\n}',"Add16.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/2/Add16.tst\n\noutput-list a%B1.16.1 b%B1.16.1 out%B1.16.1;\n\nset a %B0000000000000000,\nset b %B0000000000000000,\neval,\noutput;\n\nset a %B0000000000000000,\nset b %B1111111111111111,\neval,\noutput;\n\nset a %B1111111111111111,\nset b %B1111111111111111,\neval,\noutput;\n\nset a %B1010101010101010,\nset b %B0101010101010101,\neval,\noutput;\n\nset a %B0011110011000011,\nset b %B0000111111110000,\neval,\noutput;\n\nset a %B0001001000110100,\nset b %B1001100001110110,\neval,\noutput;',"Add16.cmp":"| a | b | out |\n| 0000000000000000 | 0000000000000000 | 0000000000000000 |\n| 0000000000000000 | 1111111111111111 | 1111111111111111 |\n| 1111111111111111 | 1111111111111111 | 1111111111111110 |\n| 1010101010101010 | 0101010101010101 | 1111111111111111 |\n| 0011110011000011 | 0000111111110000 | 0100110010110011 |\n| 0001001000110100 | 1001100001110110 | 1010101010101010 |"},Inc16:{"Inc16.hdl":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/2/Inc16.hdl\n/**\n * 16-bit incrementer:\n * out = in + 1\n */\nCHIP Inc16 {\n IN in[16];\n OUT out[16];\n\n PARTS:\n //// Replace this comment with your code.\n}',"Inc16.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/2/Inc16.tst\n\noutput-list in%B1.16.1 out%B1.16.1;\n\nset in %B0000000000000000, // in = 0\neval,\noutput;\n\nset in %B1111111111111111, // in = -1\neval,\noutput;\n\nset in %B0000000000000101, // in = 5\neval,\noutput;\n\nset in %B1111111111111011, // in = -5\neval,\noutput;',"Inc16.cmp":"| in | out |\n| 0000000000000000 | 0000000000000001 |\n| 1111111111111111 | 0000000000000000 |\n| 0000000000000101 | 0000000000000110 |\n| 1111111111111011 | 1111111111111100 |\n"},ALU:{"ALU.hdl":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/2/ALU.hdl\n/**\n * ALU (Arithmetic Logic Unit):\n * Computes out = one of the following functions:\n * 0, 1, -1,\n * x, y, !x, !y, -x, -y,\n * x + 1, y + 1, x - 1, y - 1,\n * x + y, x - y, y - x,\n * x & y, x | y\n * on the 16-bit inputs x, y,\n * according to the input bits zx, nx, zy, ny, f, no.\n * In addition, computes the two output bits:\n * if (out == 0) zr = 1, else zr = 0\n * if (out < 0) ng = 1, else ng = 0\n */\n// Implementation: Manipulates the x and y inputs\n// and operates on the resulting values, as follows:\n// if (zx == 1) sets x = 0 // 16-bit constant\n// if (nx == 1) sets x = !x // bitwise not\n// if (zy == 1) sets y = 0 // 16-bit constant\n// if (ny == 1) sets y = !y // bitwise not\n// if (f == 1) sets out = x + y // integer 2\'s complement addition\n// if (f == 0) sets out = x & y // bitwise and\n// if (no == 1) sets out = !out // bitwise not\n\nCHIP ALU {\n IN \n x[16], y[16], // 16-bit inputs \n zx, // zero the x input?\n nx, // negate the x input?\n zy, // zero the y input?\n ny, // negate the y input?\n f, // compute (out = x + y) or (out = x & y)?\n no; // negate the out output?\n OUT \n out[16], // 16-bit output\n zr, // if (out == 0) equals 1, else 0\n ng; // if (out < 0) equals 1, else 0\n\n PARTS:\n //// Replace this comment with your code.\n}',"ALU.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/2/ALU.tst\n\noutput-list x%B1.16.1 y%B1.16.1 zx nx zy ny f no out zr ng;\n\nset x %B0000000000000000, // x = 0\nset y %B1111111111111111; // y = -1\n\n// Compute 0\nset zx 1,\nset nx 0,\nset zy 1,\nset ny 0,\nset f 1,\nset no 0,\neval,\noutput;\n\n// Compute 1\nset zx 1,\nset nx 1,\nset zy 1,\nset ny 1,\nset f 1,\nset no 1,\neval,\noutput;\n\n// Compute -1\nset zx 1,\nset nx 1,\nset zy 1,\nset ny 0,\nset f 1,\nset no 0,\neval,\noutput;\n\n// Compute x\nset zx 0,\nset nx 0,\nset zy 1,\nset ny 1,\nset f 0,\nset no 0,\neval,\noutput;\n\n// Compute y\nset zx 1,\nset nx 1,\nset zy 0,\nset ny 0,\nset f 0,\nset no 0,\neval,\noutput;\n\n// Compute !x\nset zx 0,\nset nx 0,\nset zy 1,\nset ny 1,\nset f 0,\nset no 1,\neval,\noutput;\n\n// Compute !y\nset zx 1,\nset nx 1,\nset zy 0,\nset ny 0,\nset f 0,\nset no 1,\neval,\noutput;\n\n// Compute -x\nset zx 0,\nset nx 0,\nset zy 1,\nset ny 1,\nset f 1,\nset no 1,\neval,\noutput;\n\n// Compute -y\nset zx 1,\nset nx 1,\nset zy 0,\nset ny 0,\nset f 1,\nset no 1,\neval,\noutput;\n\n// Compute x + 1\nset zx 0,\nset nx 1,\nset zy 1,\nset ny 1,\nset f 1,\nset no 1,\neval,\noutput;\n\n// Compute y + 1\nset zx 1,\nset nx 1,\nset zy 0,\nset ny 1,\nset f 1,\nset no 1,\neval,\noutput;\n\n// Compute x - 1\nset zx 0,\nset nx 0,\nset zy 1,\nset ny 1,\nset f 1,\nset no 0,\neval,\noutput;\n\n// Compute y - 1\nset zx 1,\nset nx 1,\nset zy 0,\nset ny 0,\nset f 1,\nset no 0,\neval,\noutput;\n\n// Compute x + y\nset zx 0,\nset nx 0,\nset zy 0,\nset ny 0,\nset f 1,\nset no 0,\neval,\noutput;\n\n// Compute x - y\nset zx 0,\nset nx 1,\nset zy 0,\nset ny 0,\nset f 1,\nset no 1,\neval,\noutput;\n\n// Compute y - x\nset zx 0,\nset nx 0,\nset zy 0,\nset ny 1,\nset f 1,\nset no 1,\neval,\noutput;\n\n// Compute x & y\nset zx 0,\nset nx 0,\nset zy 0,\nset ny 0,\nset f 0,\nset no 0,\neval,\noutput;\n\n// Compute x | y\nset zx 0,\nset nx 1,\nset zy 0,\nset ny 1,\nset f 0,\nset no 1,\neval,\noutput;\n\nset x %B000000000010001, // x = 17\nset y %B000000000000011; // y = 3\n\n// Compute 0\nset zx 1,\nset nx 0,\nset zy 1,\nset ny 0,\nset f 1,\nset no 0,\neval,\noutput;\n\n// Compute 1\nset zx 1,\nset nx 1,\nset zy 1,\nset ny 1,\nset f 1,\nset no 1,\neval,\noutput;\n\n// Compute -1\nset zx 1,\nset nx 1,\nset zy 1,\nset ny 0,\nset f 1,\nset no 0,\neval,\noutput;\n\n// Compute x\nset zx 0,\nset nx 0,\nset zy 1,\nset ny 1,\nset f 0,\nset no 0,\neval,\noutput;\n\n// Compute y\nset zx 1,\nset nx 1,\nset zy 0,\nset ny 0,\nset f 0,\nset no 0,\neval,\noutput;\n\n// Compute !x\nset zx 0,\nset nx 0,\nset zy 1,\nset ny 1,\nset f 0,\nset no 1,\neval,\noutput;\n\n// Compute !y\nset zx 1,\nset nx 1,\nset zy 0,\nset ny 0,\nset f 0,\nset no 1,\neval,\noutput;\n\n// Compute -x\nset zx 0,\nset nx 0,\nset zy 1,\nset ny 1,\nset f 1,\nset no 1,\neval,\noutput;\n\n// Compute -y\nset zx 1,\nset nx 1,\nset zy 0,\nset ny 0,\nset f 1,\nset no 1,\neval,\noutput;\n\n// Compute x + 1\nset zx 0,\nset nx 1,\nset zy 1,\nset ny 1,\nset f 1,\nset no 1,\neval,\noutput;\n\n// Compute y + 1\nset zx 1,\nset nx 1,\nset zy 0,\nset ny 1,\nset f 1,\nset no 1,\neval,\noutput;\n\n// Compute x - 1\nset zx 0,\nset nx 0,\nset zy 1,\nset ny 1,\nset f 1,\nset no 0,\neval,\noutput;\n\n// Compute y - 1\nset zx 1,\nset nx 1,\nset zy 0,\nset ny 0,\nset f 1,\nset no 0,\neval,\noutput;\n\n// Compute x + y\nset zx 0,\nset nx 0,\nset zy 0,\nset ny 0,\nset f 1,\nset no 0,\neval,\noutput;\n\n// Compute x - y\nset zx 0,\nset nx 1,\nset zy 0,\nset ny 0,\nset f 1,\nset no 1,\neval,\noutput;\n\n// Compute y - x\nset zx 0,\nset nx 0,\nset zy 0,\nset ny 1,\nset f 1,\nset no 1,\neval,\noutput;\n\n// Compute x & y\nset zx 0,\nset nx 0,\nset zy 0,\nset ny 0,\nset f 0,\nset no 0,\neval,\noutput;\n\n// Compute x | y\nset zx 0,\nset nx 1,\nset zy 0,\nset ny 1,\nset f 0,\nset no 1,\neval,\noutput;',"ALU.cmp":"| x | y |zx |nx |zy |ny | f |no | out |zr |ng |\n| 0000000000000000 | 1111111111111111 | 1 | 0 | 1 | 0 | 1 | 0 | 0000000000000000 | 1 | 0 |\n| 0000000000000000 | 1111111111111111 | 1 | 1 | 1 | 1 | 1 | 1 | 0000000000000001 | 0 | 0 |\n| 0000000000000000 | 1111111111111111 | 1 | 1 | 1 | 0 | 1 | 0 | 1111111111111111 | 0 | 1 |\n| 0000000000000000 | 1111111111111111 | 0 | 0 | 1 | 1 | 0 | 0 | 0000000000000000 | 1 | 0 |\n| 0000000000000000 | 1111111111111111 | 1 | 1 | 0 | 0 | 0 | 0 | 1111111111111111 | 0 | 1 |\n| 0000000000000000 | 1111111111111111 | 0 | 0 | 1 | 1 | 0 | 1 | 1111111111111111 | 0 | 1 |\n| 0000000000000000 | 1111111111111111 | 1 | 1 | 0 | 0 | 0 | 1 | 0000000000000000 | 1 | 0 |\n| 0000000000000000 | 1111111111111111 | 0 | 0 | 1 | 1 | 1 | 1 | 0000000000000000 | 1 | 0 |\n| 0000000000000000 | 1111111111111111 | 1 | 1 | 0 | 0 | 1 | 1 | 0000000000000001 | 0 | 0 |\n| 0000000000000000 | 1111111111111111 | 0 | 1 | 1 | 1 | 1 | 1 | 0000000000000001 | 0 | 0 |\n| 0000000000000000 | 1111111111111111 | 1 | 1 | 0 | 1 | 1 | 1 | 0000000000000000 | 1 | 0 |\n| 0000000000000000 | 1111111111111111 | 0 | 0 | 1 | 1 | 1 | 0 | 1111111111111111 | 0 | 1 |\n| 0000000000000000 | 1111111111111111 | 1 | 1 | 0 | 0 | 1 | 0 | 1111111111111110 | 0 | 1 |\n| 0000000000000000 | 1111111111111111 | 0 | 0 | 0 | 0 | 1 | 0 | 1111111111111111 | 0 | 1 |\n| 0000000000000000 | 1111111111111111 | 0 | 1 | 0 | 0 | 1 | 1 | 0000000000000001 | 0 | 0 |\n| 0000000000000000 | 1111111111111111 | 0 | 0 | 0 | 1 | 1 | 1 | 1111111111111111 | 0 | 1 |\n| 0000000000000000 | 1111111111111111 | 0 | 0 | 0 | 0 | 0 | 0 | 0000000000000000 | 1 | 0 |\n| 0000000000000000 | 1111111111111111 | 0 | 1 | 0 | 1 | 0 | 1 | 1111111111111111 | 0 | 1 |\n| 0000000000010001 | 0000000000000011 | 1 | 0 | 1 | 0 | 1 | 0 | 0000000000000000 | 1 | 0 |\n| 0000000000010001 | 0000000000000011 | 1 | 1 | 1 | 1 | 1 | 1 | 0000000000000001 | 0 | 0 |\n| 0000000000010001 | 0000000000000011 | 1 | 1 | 1 | 0 | 1 | 0 | 1111111111111111 | 0 | 1 |\n| 0000000000010001 | 0000000000000011 | 0 | 0 | 1 | 1 | 0 | 0 | 0000000000010001 | 0 | 0 |\n| 0000000000010001 | 0000000000000011 | 1 | 1 | 0 | 0 | 0 | 0 | 0000000000000011 | 0 | 0 |\n| 0000000000010001 | 0000000000000011 | 0 | 0 | 1 | 1 | 0 | 1 | 1111111111101110 | 0 | 1 |\n| 0000000000010001 | 0000000000000011 | 1 | 1 | 0 | 0 | 0 | 1 | 1111111111111100 | 0 | 1 |\n| 0000000000010001 | 0000000000000011 | 0 | 0 | 1 | 1 | 1 | 1 | 1111111111101111 | 0 | 1 |\n| 0000000000010001 | 0000000000000011 | 1 | 1 | 0 | 0 | 1 | 1 | 1111111111111101 | 0 | 1 |\n| 0000000000010001 | 0000000000000011 | 0 | 1 | 1 | 1 | 1 | 1 | 0000000000010010 | 0 | 0 |\n| 0000000000010001 | 0000000000000011 | 1 | 1 | 0 | 1 | 1 | 1 | 0000000000000100 | 0 | 0 |\n| 0000000000010001 | 0000000000000011 | 0 | 0 | 1 | 1 | 1 | 0 | 0000000000010000 | 0 | 0 |\n| 0000000000010001 | 0000000000000011 | 1 | 1 | 0 | 0 | 1 | 0 | 0000000000000010 | 0 | 0 |\n| 0000000000010001 | 0000000000000011 | 0 | 0 | 0 | 0 | 1 | 0 | 0000000000010100 | 0 | 0 |\n| 0000000000010001 | 0000000000000011 | 0 | 1 | 0 | 0 | 1 | 1 | 0000000000001110 | 0 | 0 |\n| 0000000000010001 | 0000000000000011 | 0 | 0 | 0 | 1 | 1 | 1 | 1111111111110010 | 0 | 1 |\n| 0000000000010001 | 0000000000000011 | 0 | 0 | 0 | 0 | 0 | 0 | 0000000000000001 | 0 | 0 |\n| 0000000000010001 | 0000000000000011 | 0 | 1 | 0 | 1 | 0 | 1 | 0000000000010011 | 0 | 0 |","ALU-basic.tst":"// This file is part of www.nand2tetris.org\n// and the book \"The Elements of Computing Systems\"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/2/ALU-basic.tst\n\n// Tests the basic version of the ALU chip.\n// DOES NOT replace the final test provided by ALU.tst.\n// Specifically: Tests the ALU logic that computes the 'out' output;\n// The 'zr' and 'ng' output bits are ignored.\n\noutput-list x%B1.16.1 y%B1.16.1 zx nx zy ny f no out%B1.16.1;\n\nset x %B0000000000000000,\nset y %B1111111111111111,\n\nset zx 1,\nset nx 0,\nset zy 1,\nset ny 0,\nset f 1,\nset no 0,\neval,\noutput;\n\nset zx 1,\nset nx 1,\nset zy 1,\nset ny 1,\nset f 1,\nset no 1,\neval,\noutput;\n\nset zx 1,\nset nx 1,\nset zy 1,\nset ny 0,\nset f 1,\nset no 0,\neval,\noutput;\n\nset zx 0,\nset nx 0,\nset zy 1,\nset ny 1,\nset f 0,\nset no 0,\neval,\noutput;\n\nset zx 1,\nset nx 1,\nset zy 0,\nset ny 0,\nset f 0,\nset no 0,\neval,\noutput;\n\nset zx 0,\nset nx 0,\nset zy 1,\nset ny 1,\nset f 0,\nset no 1,\neval,\noutput;\n\nset zx 1,\nset nx 1,\nset zy 0,\nset ny 0,\nset f 0,\nset no 1,\neval,\noutput;\n\nset zx 0,\nset nx 0,\nset zy 1,\nset ny 1,\nset f 1,\nset no 1,\neval,\noutput;\n\nset zx 1,\nset nx 1,\nset zy 0,\nset ny 0,\nset f 1,\nset no 1,\neval,\noutput;\n\nset zx 0,\nset nx 1,\nset zy 1,\nset ny 1,\nset f 1,\nset no 1,\neval,\noutput;\n\nset zx 1,\nset nx 1,\nset zy 0,\nset ny 1,\nset f 1,\nset no 1,\neval,\noutput;\n\nset zx 0,\nset nx 0,\nset zy 1,\nset ny 1,\nset f 1,\nset no 0,\neval,\noutput;\n\nset zx 1,\nset nx 1,\nset zy 0,\nset ny 0,\nset f 1,\nset no 0,\neval,\noutput;\n\nset zx 0,\nset nx 0,\nset zy 0,\nset ny 0,\nset f 1,\nset no 0,\neval,\noutput;\n\nset zx 0,\nset nx 1,\nset zy 0,\nset ny 0,\nset f 1,\nset no 1,\neval,\noutput;\n\nset zx 0,\nset nx 0,\nset zy 0,\nset ny 1,\nset f 1,\nset no 1,\neval,\noutput;\n\nset zx 0,\nset nx 0,\nset zy 0,\nset ny 0,\nset f 0,\nset no 0,\neval,\noutput;\n\nset zx 0,\nset nx 1,\nset zy 0,\nset ny 1,\nset f 0,\nset no 1,\neval,\noutput;\n\nset x %B101101110100000,\nset y %B001111011010010,\n\nset zx 1,\nset nx 0,\nset zy 1,\nset ny 0,\nset f 1,\nset no 0,\neval,\noutput;\n\nset zx 1,\nset nx 1,\nset zy 1,\nset ny 1,\nset f 1,\nset no 1,\neval,\noutput;\n\nset zx 1,\nset nx 1,\nset zy 1,\nset ny 0,\nset f 1,\nset no 0,\neval,\noutput;\n\nset zx 0,\nset nx 0,\nset zy 1,\nset ny 1,\nset f 0,\nset no 0,\neval,\noutput;\n\nset zx 1,\nset nx 1,\nset zy 0,\nset ny 0,\nset f 0,\nset no 0,\neval,\noutput;\n\nset zx 0,\nset nx 0,\nset zy 1,\nset ny 1,\nset f 0,\nset no 1,\neval,\noutput;\n\nset zx 1,\nset nx 1,\nset zy 0,\nset ny 0,\nset f 0,\nset no 1,\neval,\noutput;\n\nset zx 0,\nset nx 0,\nset zy 1,\nset ny 1,\nset f 1,\nset no 1,\neval,\noutput;\n\nset zx 1,\nset nx 1,\nset zy 0,\nset ny 0,\nset f 1,\nset no 1,\neval,\noutput;\n\nset zx 0,\nset nx 1,\nset zy 1,\nset ny 1,\nset f 1,\nset no 1,\neval,\noutput;\n\nset zx 1,\nset nx 1,\nset zy 0,\nset ny 1,\nset f 1,\nset no 1,\neval,\noutput;\n\nset zx 0,\nset nx 0,\nset zy 1,\nset ny 1,\nset f 1,\nset no 0,\neval,\noutput;\n\nset zx 1,\nset nx 1,\nset zy 0,\nset ny 0,\nset f 1,\nset no 0,\neval,\noutput;\n\nset zx 0,\nset nx 0,\nset zy 0,\nset ny 0,\nset f 1,\nset no 0,\neval,\noutput;\n\nset zx 0,\nset nx 1,\nset zy 0,\nset ny 0,\nset f 1,\nset no 1,\neval,\noutput;\n\nset zx 0,\nset nx 0,\nset zy 0,\nset ny 1,\nset f 1,\nset no 1,\neval,\noutput;\n\nset zx 0,\nset nx 0,\nset zy 0,\nset ny 0,\nset f 0,\nset no 0,\neval,\noutput;\n\nset zx 0,\nset nx 1,\nset zy 0,\nset ny 1,\nset f 0,\nset no 1,\neval,\noutput;","ALU-basic.cmp":"| x | y |zx |nx |zy |ny | f |no | out |\n| 0000000000000000 | 1111111111111111 | 1 | 0 | 1 | 0 | 1 | 0 | 0000000000000000 |\n| 0000000000000000 | 1111111111111111 | 1 | 1 | 1 | 1 | 1 | 1 | 0000000000000001 |\n| 0000000000000000 | 1111111111111111 | 1 | 1 | 1 | 0 | 1 | 0 | 1111111111111111 |\n| 0000000000000000 | 1111111111111111 | 0 | 0 | 1 | 1 | 0 | 0 | 0000000000000000 |\n| 0000000000000000 | 1111111111111111 | 1 | 1 | 0 | 0 | 0 | 0 | 1111111111111111 |\n| 0000000000000000 | 1111111111111111 | 0 | 0 | 1 | 1 | 0 | 1 | 1111111111111111 |\n| 0000000000000000 | 1111111111111111 | 1 | 1 | 0 | 0 | 0 | 1 | 0000000000000000 |\n| 0000000000000000 | 1111111111111111 | 0 | 0 | 1 | 1 | 1 | 1 | 0000000000000000 |\n| 0000000000000000 | 1111111111111111 | 1 | 1 | 0 | 0 | 1 | 1 | 0000000000000001 |\n| 0000000000000000 | 1111111111111111 | 0 | 1 | 1 | 1 | 1 | 1 | 0000000000000001 |\n| 0000000000000000 | 1111111111111111 | 1 | 1 | 0 | 1 | 1 | 1 | 0000000000000000 |\n| 0000000000000000 | 1111111111111111 | 0 | 0 | 1 | 1 | 1 | 0 | 1111111111111111 |\n| 0000000000000000 | 1111111111111111 | 1 | 1 | 0 | 0 | 1 | 0 | 1111111111111110 |\n| 0000000000000000 | 1111111111111111 | 0 | 0 | 0 | 0 | 1 | 0 | 1111111111111111 |\n| 0000000000000000 | 1111111111111111 | 0 | 1 | 0 | 0 | 1 | 1 | 0000000000000001 |\n| 0000000000000000 | 1111111111111111 | 0 | 0 | 0 | 1 | 1 | 1 | 1111111111111111 |\n| 0000000000000000 | 1111111111111111 | 0 | 0 | 0 | 0 | 0 | 0 | 0000000000000000 |\n| 0000000000000000 | 1111111111111111 | 0 | 1 | 0 | 1 | 0 | 1 | 1111111111111111 |\n| 0101101110100000 | 0001111011010010 | 1 | 0 | 1 | 0 | 1 | 0 | 0000000000000000 |\n| 0101101110100000 | 0001111011010010 | 1 | 1 | 1 | 1 | 1 | 1 | 0000000000000001 |\n| 0101101110100000 | 0001111011010010 | 1 | 1 | 1 | 0 | 1 | 0 | 1111111111111111 |\n| 0101101110100000 | 0001111011010010 | 0 | 0 | 1 | 1 | 0 | 0 | 0101101110100000 |\n| 0101101110100000 | 0001111011010010 | 1 | 1 | 0 | 0 | 0 | 0 | 0001111011010010 |\n| 0101101110100000 | 0001111011010010 | 0 | 0 | 1 | 1 | 0 | 1 | 1010010001011111 |\n| 0101101110100000 | 0001111011010010 | 1 | 1 | 0 | 0 | 0 | 1 | 1110000100101101 |\n| 0101101110100000 | 0001111011010010 | 0 | 0 | 1 | 1 | 1 | 1 | 1010010001100000 |\n| 0101101110100000 | 0001111011010010 | 1 | 1 | 0 | 0 | 1 | 1 | 1110000100101110 |\n| 0101101110100000 | 0001111011010010 | 0 | 1 | 1 | 1 | 1 | 1 | 0101101110100001 |\n| 0101101110100000 | 0001111011010010 | 1 | 1 | 0 | 1 | 1 | 1 | 0001111011010011 |\n| 0101101110100000 | 0001111011010010 | 0 | 0 | 1 | 1 | 1 | 0 | 0101101110011111 |\n| 0101101110100000 | 0001111011010010 | 1 | 1 | 0 | 0 | 1 | 0 | 0001111011010001 |\n| 0101101110100000 | 0001111011010010 | 0 | 0 | 0 | 0 | 1 | 0 | 0111101001110010 |\n| 0101101110100000 | 0001111011010010 | 0 | 1 | 0 | 0 | 1 | 1 | 0011110011001110 |\n| 0101101110100000 | 0001111011010010 | 0 | 0 | 0 | 1 | 1 | 1 | 1100001100110010 |\n| 0101101110100000 | 0001111011010010 | 0 | 0 | 0 | 0 | 0 | 0 | 0001101010000000 |\n| 0101101110100000 | 0001111011010010 | 0 | 1 | 0 | 1 | 0 | 1 | 0101111111110010 |"}},v={};async function f(n){await n.pushd("/projects/02"),await(0,r.cL)(n,m),await n.popd()}async function M(n){await n.pushd("/projects/02"),await c(n,m,".tst"),await c(n,m,".cmp"),await n.popd()}const y='// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/3/b/RAM16K.hdl\n/**\n * Memory of 16K 16-bit registers.\n * If load is asserted, the value of the register selected by\n * address is set to in; Otherwise, the value does not change.\n * The value of the selected register is emitted by out.\n */\nCHIP RAM16K {\n IN in[16], load, address[14];\n OUT out[16];\n\n PARTS:\n //// Replace this comment with your code.\n}',R={Bit:{"Bit.hdl":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/3/a/Bit.hdl\n/**\n * 1-bit register:\n * If load is asserted, the register\'s value is set to in;\n * Otherwise, the register maintains its current value:\n * if (load(t)) out(t+1) = in(t), else out(t+1) = out(t)\n */\nCHIP Bit {\n IN in, load;\n OUT out;\n\n PARTS:\n //// Replace this comment with your code.\n}',"Bit.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/3/a/Bit.tst\n\noutput-list time%S1.4.1 in load%B1.1.2 out;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 1,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;',"Bit.cmp":"| time |in |load|out|\n| 0+ | 0 | 0 | 0 |\n| 1 | 0 | 0 | 0 |\n| 1+ | 0 | 1 | 0 |\n| 2 | 0 | 1 | 0 |\n| 2+ | 1 | 0 | 0 |\n| 3 | 1 | 0 | 0 |\n| 3+ | 1 | 1 | 0 |\n| 4 | 1 | 1 | 1 |\n| 4+ | 0 | 0 | 1 |\n| 5 | 0 | 0 | 1 |\n| 5+ | 1 | 0 | 1 |\n| 6 | 1 | 0 | 1 |\n| 6+ | 0 | 1 | 1 |\n| 7 | 0 | 1 | 0 |\n| 7+ | 1 | 1 | 0 |\n| 8 | 1 | 1 | 1 |\n| 8+ | 0 | 0 | 1 |\n| 9 | 0 | 0 | 1 |\n| 9+ | 0 | 0 | 1 |\n| 10 | 0 | 0 | 1 |\n| 10+ | 0 | 0 | 1 |\n| 11 | 0 | 0 | 1 |\n| 11+ | 0 | 0 | 1 |\n| 12 | 0 | 0 | 1 |\n| 12+ | 0 | 0 | 1 |\n| 13 | 0 | 0 | 1 |\n| 13+ | 0 | 0 | 1 |\n| 14 | 0 | 0 | 1 |\n| 14+ | 0 | 0 | 1 |\n| 15 | 0 | 0 | 1 |\n| 15+ | 0 | 0 | 1 |\n| 16 | 0 | 0 | 1 |\n| 16+ | 0 | 0 | 1 |\n| 17 | 0 | 0 | 1 |\n| 17+ | 0 | 0 | 1 |\n| 18 | 0 | 0 | 1 |\n| 18+ | 0 | 0 | 1 |\n| 19 | 0 | 0 | 1 |\n| 19+ | 0 | 0 | 1 |\n| 20 | 0 | 0 | 1 |\n| 20+ | 0 | 0 | 1 |\n| 21 | 0 | 0 | 1 |\n| 21+ | 0 | 0 | 1 |\n| 22 | 0 | 0 | 1 |\n| 22+ | 0 | 0 | 1 |\n| 23 | 0 | 0 | 1 |\n| 23+ | 0 | 0 | 1 |\n| 24 | 0 | 0 | 1 |\n| 24+ | 0 | 0 | 1 |\n| 25 | 0 | 0 | 1 |\n| 25+ | 0 | 0 | 1 |\n| 26 | 0 | 0 | 1 |\n| 26+ | 0 | 0 | 1 |\n| 27 | 0 | 0 | 1 |\n| 27+ | 0 | 0 | 1 |\n| 28 | 0 | 0 | 1 |\n| 28+ | 0 | 0 | 1 |\n| 29 | 0 | 0 | 1 |\n| 29+ | 0 | 0 | 1 |\n| 30 | 0 | 0 | 1 |\n| 30+ | 0 | 0 | 1 |\n| 31 | 0 | 0 | 1 |\n| 31+ | 0 | 0 | 1 |\n| 32 | 0 | 0 | 1 |\n| 32+ | 0 | 0 | 1 |\n| 33 | 0 | 0 | 1 |\n| 33+ | 0 | 0 | 1 |\n| 34 | 0 | 0 | 1 |\n| 34+ | 0 | 0 | 1 |\n| 35 | 0 | 0 | 1 |\n| 35+ | 0 | 0 | 1 |\n| 36 | 0 | 0 | 1 |\n| 36+ | 0 | 0 | 1 |\n| 37 | 0 | 0 | 1 |\n| 37+ | 0 | 0 | 1 |\n| 38 | 0 | 0 | 1 |\n| 38+ | 0 | 0 | 1 |\n| 39 | 0 | 0 | 1 |\n| 39+ | 0 | 0 | 1 |\n| 40 | 0 | 0 | 1 |\n| 40+ | 0 | 0 | 1 |\n| 41 | 0 | 0 | 1 |\n| 41+ | 0 | 0 | 1 |\n| 42 | 0 | 0 | 1 |\n| 42+ | 0 | 0 | 1 |\n| 43 | 0 | 0 | 1 |\n| 43+ | 0 | 0 | 1 |\n| 44 | 0 | 0 | 1 |\n| 44+ | 0 | 0 | 1 |\n| 45 | 0 | 0 | 1 |\n| 45+ | 0 | 0 | 1 |\n| 46 | 0 | 0 | 1 |\n| 46+ | 0 | 0 | 1 |\n| 47 | 0 | 0 | 1 |\n| 47+ | 0 | 0 | 1 |\n| 48 | 0 | 0 | 1 |\n| 48+ | 0 | 0 | 1 |\n| 49 | 0 | 0 | 1 |\n| 49+ | 0 | 0 | 1 |\n| 50 | 0 | 0 | 1 |\n| 50+ | 0 | 0 | 1 |\n| 51 | 0 | 0 | 1 |\n| 51+ | 0 | 0 | 1 |\n| 52 | 0 | 0 | 1 |\n| 52+ | 0 | 0 | 1 |\n| 53 | 0 | 0 | 1 |\n| 53+ | 0 | 0 | 1 |\n| 54 | 0 | 0 | 1 |\n| 54+ | 0 | 0 | 1 |\n| 55 | 0 | 0 | 1 |\n| 55+ | 0 | 0 | 1 |\n| 56 | 0 | 0 | 1 |\n| 56+ | 0 | 0 | 1 |\n| 57 | 0 | 0 | 1 |\n| 57+ | 0 | 1 | 1 |\n| 58 | 0 | 1 | 0 |\n| 58+ | 1 | 0 | 0 |\n| 59 | 1 | 0 | 0 |\n| 59+ | 1 | 0 | 0 |\n| 60 | 1 | 0 | 0 |\n| 60+ | 1 | 0 | 0 |\n| 61 | 1 | 0 | 0 |\n| 61+ | 1 | 0 | 0 |\n| 62 | 1 | 0 | 0 |\n| 62+ | 1 | 0 | 0 |\n| 63 | 1 | 0 | 0 |\n| 63+ | 1 | 0 | 0 |\n| 64 | 1 | 0 | 0 |\n| 64+ | 1 | 0 | 0 |\n| 65 | 1 | 0 | 0 |\n| 65+ | 1 | 0 | 0 |\n| 66 | 1 | 0 | 0 |\n| 66+ | 1 | 0 | 0 |\n| 67 | 1 | 0 | 0 |\n| 67+ | 1 | 0 | 0 |\n| 68 | 1 | 0 | 0 |\n| 68+ | 1 | 0 | 0 |\n| 69 | 1 | 0 | 0 |\n| 69+ | 1 | 0 | 0 |\n| 70 | 1 | 0 | 0 |\n| 70+ | 1 | 0 | 0 |\n| 71 | 1 | 0 | 0 |\n| 71+ | 1 | 0 | 0 |\n| 72 | 1 | 0 | 0 |\n| 72+ | 1 | 0 | 0 |\n| 73 | 1 | 0 | 0 |\n| 73+ | 1 | 0 | 0 |\n| 74 | 1 | 0 | 0 |\n| 74+ | 1 | 0 | 0 |\n| 75 | 1 | 0 | 0 |\n| 75+ | 1 | 0 | 0 |\n| 76 | 1 | 0 | 0 |\n| 76+ | 1 | 0 | 0 |\n| 77 | 1 | 0 | 0 |\n| 77+ | 1 | 0 | 0 |\n| 78 | 1 | 0 | 0 |\n| 78+ | 1 | 0 | 0 |\n| 79 | 1 | 0 | 0 |\n| 79+ | 1 | 0 | 0 |\n| 80 | 1 | 0 | 0 |\n| 80+ | 1 | 0 | 0 |\n| 81 | 1 | 0 | 0 |\n| 81+ | 1 | 0 | 0 |\n| 82 | 1 | 0 | 0 |\n| 82+ | 1 | 0 | 0 |\n| 83 | 1 | 0 | 0 |\n| 83+ | 1 | 0 | 0 |\n| 84 | 1 | 0 | 0 |\n| 84+ | 1 | 0 | 0 |\n| 85 | 1 | 0 | 0 |\n| 85+ | 1 | 0 | 0 |\n| 86 | 1 | 0 | 0 |\n| 86+ | 1 | 0 | 0 |\n| 87 | 1 | 0 | 0 |\n| 87+ | 1 | 0 | 0 |\n| 88 | 1 | 0 | 0 |\n| 88+ | 1 | 0 | 0 |\n| 89 | 1 | 0 | 0 |\n| 89+ | 1 | 0 | 0 |\n| 90 | 1 | 0 | 0 |\n| 90+ | 1 | 0 | 0 |\n| 91 | 1 | 0 | 0 |\n| 91+ | 1 | 0 | 0 |\n| 92 | 1 | 0 | 0 |\n| 92+ | 1 | 0 | 0 |\n| 93 | 1 | 0 | 0 |\n| 93+ | 1 | 0 | 0 |\n| 94 | 1 | 0 | 0 |\n| 94+ | 1 | 0 | 0 |\n| 95 | 1 | 0 | 0 |\n| 95+ | 1 | 0 | 0 |\n| 96 | 1 | 0 | 0 |\n| 96+ | 1 | 0 | 0 |\n| 97 | 1 | 0 | 0 |\n| 97+ | 1 | 0 | 0 |\n| 98 | 1 | 0 | 0 |\n| 98+ | 1 | 0 | 0 |\n| 99 | 1 | 0 | 0 |\n| 99+ | 1 | 0 | 0 |\n| 100 | 1 | 0 | 0 |\n| 100+ | 1 | 0 | 0 |\n| 101 | 1 | 0 | 0 |\n| 101+ | 1 | 0 | 0 |\n| 102 | 1 | 0 | 0 |\n| 102+ | 1 | 0 | 0 |\n| 103 | 1 | 0 | 0 |\n| 103+ | 1 | 0 | 0 |\n| 104 | 1 | 0 | 0 |\n| 104+ | 1 | 0 | 0 |\n| 105 | 1 | 0 | 0 |\n| 105+ | 1 | 0 | 0 |\n| 106 | 1 | 0 | 0 |\n| 106+ | 1 | 0 | 0 |\n| 107 | 1 | 0 | 0 |"},Register:{"Register.hdl":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/3/a/Register.hdl\n/**\n * 16-bit register:\n * If load is asserted, the register\'s value is set to in;\n * Otherwise, the register maintains its current value:\n * if (load(t)) out(t+1) = int(t), else out(t+1) = out(t)\n */\nCHIP Register {\n IN in[16], load;\n OUT out[16];\n\n PARTS:\n //// Replace this comment with your code.\n}',"Register.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/3/a/Register.tst\n\noutput-list time%S1.3.1 in%D1.6.1 load%B2.1.1 out%D1.6.1;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in -32123,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 11111,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in -32123,\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in -32123,\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in -32123,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 12345,\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B0000000000000001,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B0000000000000010,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B0000000000000100,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B0000000000001000,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B0000000000010000,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B0000000000100000,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B0000000001000000,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B0000000010000000,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B0000000100000000,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B0000001000000000,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B0000010000000000,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B0000100000000000,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B0001000000000000,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B0010000000000000,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B0100000000000000,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B1000000000000000,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B1111111111111110,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B1111111111111101,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B1111111111111011,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B1111111111110111,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B1111111111101111,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B1111111111011111,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B1111111110111111,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B1111111101111111,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B1111111011111111,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B1111110111111111,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B1111101111111111,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B1111011111111111,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B1110111111111111,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B1101111111111111,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B1011111111111111,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in %B0111111111111111,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;',"Register.cmp":"|time | in |load| out |\n| 0+ | 0 | 0 | 0 |\n| 1 | 0 | 0 | 0 |\n| 1+ | 0 | 1 | 0 |\n| 2 | 0 | 1 | 0 |\n| 2+ | -32123 | 0 | 0 |\n| 3 | -32123 | 0 | 0 |\n| 3+ | 11111 | 0 | 0 |\n| 4 | 11111 | 0 | 0 |\n| 4+ | -32123 | 1 | 0 |\n| 5 | -32123 | 1 | -32123 |\n| 5+ | -32123 | 1 | -32123 |\n| 6 | -32123 | 1 | -32123 |\n| 6+ | -32123 | 0 | -32123 |\n| 7 | -32123 | 0 | -32123 |\n| 7+ | 12345 | 1 | -32123 |\n| 8 | 12345 | 1 | 12345 |\n| 8+ | 0 | 0 | 12345 |\n| 9 | 0 | 0 | 12345 |\n| 9+ | 0 | 1 | 12345 |\n| 10 | 0 | 1 | 0 |\n| 10+ | 1 | 0 | 0 |\n| 11 | 1 | 0 | 0 |\n| 11+ | 1 | 1 | 0 |\n| 12 | 1 | 1 | 1 |\n| 12+ | 2 | 0 | 1 |\n| 13 | 2 | 0 | 1 |\n| 13+ | 2 | 1 | 1 |\n| 14 | 2 | 1 | 2 |\n| 14+ | 4 | 0 | 2 |\n| 15 | 4 | 0 | 2 |\n| 15+ | 4 | 1 | 2 |\n| 16 | 4 | 1 | 4 |\n| 16+ | 8 | 0 | 4 |\n| 17 | 8 | 0 | 4 |\n| 17+ | 8 | 1 | 4 |\n| 18 | 8 | 1 | 8 |\n| 18+ | 16 | 0 | 8 |\n| 19 | 16 | 0 | 8 |\n| 19+ | 16 | 1 | 8 |\n| 20 | 16 | 1 | 16 |\n| 20+ | 32 | 0 | 16 |\n| 21 | 32 | 0 | 16 |\n| 21+ | 32 | 1 | 16 |\n| 22 | 32 | 1 | 32 |\n| 22+ | 64 | 0 | 32 |\n| 23 | 64 | 0 | 32 |\n| 23+ | 64 | 1 | 32 |\n| 24 | 64 | 1 | 64 |\n| 24+ | 128 | 0 | 64 |\n| 25 | 128 | 0 | 64 |\n| 25+ | 128 | 1 | 64 |\n| 26 | 128 | 1 | 128 |\n| 26+ | 256 | 0 | 128 |\n| 27 | 256 | 0 | 128 |\n| 27+ | 256 | 1 | 128 |\n| 28 | 256 | 1 | 256 |\n| 28+ | 512 | 0 | 256 |\n| 29 | 512 | 0 | 256 |\n| 29+ | 512 | 1 | 256 |\n| 30 | 512 | 1 | 512 |\n| 30+ | 1024 | 0 | 512 |\n| 31 | 1024 | 0 | 512 |\n| 31+ | 1024 | 1 | 512 |\n| 32 | 1024 | 1 | 1024 |\n| 32+ | 2048 | 0 | 1024 |\n| 33 | 2048 | 0 | 1024 |\n| 33+ | 2048 | 1 | 1024 |\n| 34 | 2048 | 1 | 2048 |\n| 34+ | 4096 | 0 | 2048 |\n| 35 | 4096 | 0 | 2048 |\n| 35+ | 4096 | 1 | 2048 |\n| 36 | 4096 | 1 | 4096 |\n| 36+ | 8192 | 0 | 4096 |\n| 37 | 8192 | 0 | 4096 |\n| 37+ | 8192 | 1 | 4096 |\n| 38 | 8192 | 1 | 8192 |\n| 38+ | 16384 | 0 | 8192 |\n| 39 | 16384 | 0 | 8192 |\n| 39+ | 16384 | 1 | 8192 |\n| 40 | 16384 | 1 | 16384 |\n| 40+ | -32768 | 0 | 16384 |\n| 41 | -32768 | 0 | 16384 |\n| 41+ | -32768 | 1 | 16384 |\n| 42 | -32768 | 1 | -32768 |\n| 42+ | -2 | 0 | -32768 |\n| 43 | -2 | 0 | -32768 |\n| 43+ | -2 | 1 | -32768 |\n| 44 | -2 | 1 | -2 |\n| 44+ | -3 | 0 | -2 |\n| 45 | -3 | 0 | -2 |\n| 45+ | -3 | 1 | -2 |\n| 46 | -3 | 1 | -3 |\n| 46+ | -5 | 0 | -3 |\n| 47 | -5 | 0 | -3 |\n| 47+ | -5 | 1 | -3 |\n| 48 | -5 | 1 | -5 |\n| 48+ | -9 | 0 | -5 |\n| 49 | -9 | 0 | -5 |\n| 49+ | -9 | 1 | -5 |\n| 50 | -9 | 1 | -9 |\n| 50+ | -17 | 0 | -9 |\n| 51 | -17 | 0 | -9 |\n| 51+ | -17 | 1 | -9 |\n| 52 | -17 | 1 | -17 |\n| 52+ | -33 | 0 | -17 |\n| 53 | -33 | 0 | -17 |\n| 53+ | -33 | 1 | -17 |\n| 54 | -33 | 1 | -33 |\n| 54+ | -65 | 0 | -33 |\n| 55 | -65 | 0 | -33 |\n| 55+ | -65 | 1 | -33 |\n| 56 | -65 | 1 | -65 |\n| 56+ | -129 | 0 | -65 |\n| 57 | -129 | 0 | -65 |\n| 57+ | -129 | 1 | -65 |\n| 58 | -129 | 1 | -129 |\n| 58+ | -257 | 0 | -129 |\n| 59 | -257 | 0 | -129 |\n| 59+ | -257 | 1 | -129 |\n| 60 | -257 | 1 | -257 |\n| 60+ | -513 | 0 | -257 |\n| 61 | -513 | 0 | -257 |\n| 61+ | -513 | 1 | -257 |\n| 62 | -513 | 1 | -513 |\n| 62+ | -1025 | 0 | -513 |\n| 63 | -1025 | 0 | -513 |\n| 63+ | -1025 | 1 | -513 |\n| 64 | -1025 | 1 | -1025 |\n| 64+ | -2049 | 0 | -1025 |\n| 65 | -2049 | 0 | -1025 |\n| 65+ | -2049 | 1 | -1025 |\n| 66 | -2049 | 1 | -2049 |\n| 66+ | -4097 | 0 | -2049 |\n| 67 | -4097 | 0 | -2049 |\n| 67+ | -4097 | 1 | -2049 |\n| 68 | -4097 | 1 | -4097 |\n| 68+ | -8193 | 0 | -4097 |\n| 69 | -8193 | 0 | -4097 |\n| 69+ | -8193 | 1 | -4097 |\n| 70 | -8193 | 1 | -8193 |\n| 70+ | -16385 | 0 | -8193 |\n| 71 | -16385 | 0 | -8193 |\n| 71+ | -16385 | 1 | -8193 |\n| 72 | -16385 | 1 | -16385 |\n| 72+ | 32767 | 0 | -16385 |\n| 73 | 32767 | 0 | -16385 |\n| 73+ | 32767 | 1 | -16385 |\n| 74 | 32767 | 1 | 32767 |"},PC:{"PC.hdl":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/3/a/PC.hdl\n/**\n * A 16-bit counter.\n * if reset(t): out(t+1) = 0\n * else if load(t): out(t+1) = in(t)\n * else if inc(t): out(t+1) = out(t) + 1\n * else out(t+1) = out(t)\n */\nCHIP PC {\n IN in[16], reset, load, inc;\n OUT out[16];\n \n PARTS:\n //// Replace this comment with your code.\n}',"PC.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/03/a/PC.tst\n\noutput-list time%S1.3.1 in%D1.6.1 reset%B2.1.2 load%B2.1.2 inc%B2.1.2 out%D1.6.1;\n\nset in 0,\nset reset 0,\nset load 0,\nset inc 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset inc 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in -32123,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\ntick,\noutput;\n\ntock,\noutput;\n\nset in 12345,\nset load 1,\nset inc 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset reset 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset reset 0,\nset inc 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset reset 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset reset 0,\nset load 0,\ntick,\noutput;\n\ntock,\noutput;\n\nset reset 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 0,\nset reset 0,\nset load 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset load 0,\nset inc 1,\ntick,\noutput;\n\ntock,\noutput;\n\nset in 22222,\nset reset 1,\nset inc 0,\ntick,\noutput;\n\ntock,\noutput;',"PC.cmp":"|time | in |reset|load | inc | out |\n| 0+ | 0 | 0 | 0 | 0 | 0 |\n| 1 | 0 | 0 | 0 | 0 | 0 |\n| 1+ | 0 | 0 | 0 | 1 | 0 |\n| 2 | 0 | 0 | 0 | 1 | 1 |\n| 2+ | -32123 | 0 | 0 | 1 | 1 |\n| 3 | -32123 | 0 | 0 | 1 | 2 |\n| 3+ | -32123 | 0 | 1 | 1 | 2 |\n| 4 | -32123 | 0 | 1 | 1 | -32123 |\n| 4+ | -32123 | 0 | 0 | 1 | -32123 |\n| 5 | -32123 | 0 | 0 | 1 | -32122 |\n| 5+ | -32123 | 0 | 0 | 1 | -32122 |\n| 6 | -32123 | 0 | 0 | 1 | -32121 |\n| 6+ | 12345 | 0 | 1 | 0 | -32121 |\n| 7 | 12345 | 0 | 1 | 0 | 12345 |\n| 7+ | 12345 | 1 | 1 | 0 | 12345 |\n| 8 | 12345 | 1 | 1 | 0 | 0 |\n| 8+ | 12345 | 0 | 1 | 1 | 0 |\n| 9 | 12345 | 0 | 1 | 1 | 12345 |\n| 9+ | 12345 | 1 | 1 | 1 | 12345 |\n| 10 | 12345 | 1 | 1 | 1 | 0 |\n| 10+ | 12345 | 0 | 0 | 1 | 0 |\n| 11 | 12345 | 0 | 0 | 1 | 1 |\n| 11+ | 12345 | 1 | 0 | 1 | 1 |\n| 12 | 12345 | 1 | 0 | 1 | 0 |\n| 12+ | 0 | 0 | 1 | 1 | 0 |\n| 13 | 0 | 0 | 1 | 1 | 0 |\n| 13+ | 0 | 0 | 0 | 1 | 0 |\n| 14 | 0 | 0 | 0 | 1 | 1 |\n| 14+ | 22222 | 1 | 0 | 0 | 1 |\n| 15 | 22222 | 1 | 0 | 0 | 0 |"},RAM8:{"RAM8.hdl":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/3/a/RAM8.hdl\n/**\n * Memory of eight 16-bit registers.\n * If load is asserted, the value of the register selected by\n * address is set to in; Otherwise, the value does not change.\n * The value of the selected register is emitted by out.\n */\nCHIP RAM8 {\n IN in[16], load, address[3];\n OUT out[16];\n\n PARTS:\n //// Replace this comment with your code.\n}',"RAM8.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/3/a/RAM8.tst\n\noutput-list time%S1.3.1 in%D1.6.1 load%B2.1.1 address%D3.1.3 out%D1.6.1;\n\nset in 0,\nset load 0,\nset address 0,\ntick,\noutput;\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\ntock,\noutput;\n\nset in 11111,\nset load 0,\ntick,\noutput;\ntock,\noutput;\n\nset load 1,\nset address 1,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address 0,\ntick,\noutput;\ntock,\noutput;\n\nset in 3333,\nset address 3,\ntick,\noutput;\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\ntick,\noutput;\ntock,\noutput;\n\nset address 1,\neval,\noutput;\n\nset in 7777,\ntick,\noutput;\ntock,\noutput;\n\nset load 1,\nset address 7,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\ntick,\noutput;\ntock,\noutput;\n\nset address 3,\neval,\noutput;\n\nset address 7,\neval,\noutput;\n\nset load 0,\nset address 0,\ntick,\noutput;\ntock,\noutput;\nset address 1,\neval,\noutput;\nset address 2,\neval,\noutput;\nset address 3,\neval,\noutput;\nset address 4,\neval,\noutput;\nset address 5,\neval,\noutput;\nset address 6,\neval,\noutput;\nset address 7,\neval,\noutput;\n\nset load 1,\nset in %B0101010101010101,\nset address 0,\ntick,\noutput;\ntock,\noutput;\nset address 1,\ntick,\noutput,\ntock,\noutput;\nset address 2,\ntick,\noutput,\ntock,\noutput;\nset address 3,\ntick,\noutput,\ntock,\noutput;\nset address 4,\ntick,\noutput,\ntock,\noutput;\nset address 5,\ntick,\noutput,\ntock,\noutput;\nset address 6,\ntick,\noutput,\ntock,\noutput;\nset address 7,\ntick,\noutput,\ntock,\noutput;\n\nset load 0,\nset address 0,\ntick,\noutput;\ntock,\noutput;\nset address 1,\neval,\noutput;\nset address 2,\neval,\noutput;\nset address 3,\neval,\noutput;\nset address 4,\neval,\noutput;\nset address 5,\neval,\noutput;\nset address 6,\neval,\noutput;\nset address 7,\neval,\noutput;\n\nset load 1,\nset address 0,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address 0,\ntick,\noutput;\ntock,\noutput;\nset address 1,\neval,\noutput;\nset address 2,\neval,\noutput;\nset address 3,\neval,\noutput;\nset address 4,\neval,\noutput;\nset address 5,\neval,\noutput;\nset address 6,\neval,\noutput;\nset address 7,\neval,\noutput;\n\nset load 1,\nset address 0,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address 1,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address 0,\ntick,\noutput;\ntock,\noutput;\nset address 1,\neval,\noutput;\nset address 2,\neval,\noutput;\nset address 3,\neval,\noutput;\nset address 4,\neval,\noutput;\nset address 5,\neval,\noutput;\nset address 6,\neval,\noutput;\nset address 7,\neval,\noutput;\n\nset load 1,\nset address 1,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address 2,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address 0,\ntick,\noutput;\ntock,\noutput;\nset address 1,\neval,\noutput;\nset address 2,\neval,\noutput;\nset address 3,\neval,\noutput;\nset address 4,\neval,\noutput;\nset address 5,\neval,\noutput;\nset address 6,\neval,\noutput;\nset address 7,\neval,\noutput;\n\nset load 1,\nset address 2,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address 3,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address 0,\ntick,\noutput;\ntock,\noutput;\nset address 1,\neval,\noutput;\nset address 2,\neval,\noutput;\nset address 3,\neval,\noutput;\nset address 4,\neval,\noutput;\nset address 5,\neval,\noutput;\nset address 6,\neval,\noutput;\nset address 7,\neval,\noutput;\n\nset load 1,\nset address 3,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address 4,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address 0,\ntick,\noutput;\ntock,\noutput;\nset address 1,\neval,\noutput;\nset address 2,\neval,\noutput;\nset address 3,\neval,\noutput;\nset address 4,\neval,\noutput;\nset address 5,\neval,\noutput;\nset address 6,\neval,\noutput;\nset address 7,\neval,\noutput;\n\nset load 1,\nset address 4,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address 5,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address 0,\ntick,\noutput;\ntock,\noutput;\nset address 1,\neval,\noutput;\nset address 2,\neval,\noutput;\nset address 3,\neval,\noutput;\nset address 4,\neval,\noutput;\nset address 5,\neval,\noutput;\nset address 6,\neval,\noutput;\nset address 7,\neval,\noutput;\n\nset load 1,\nset address 5,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address 6,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address 0,\ntick,\noutput;\ntock,\noutput;\nset address 1,\neval,\noutput;\nset address 2,\neval,\noutput;\nset address 3,\neval,\noutput;\nset address 4,\neval,\noutput;\nset address 5,\neval,\noutput;\nset address 6,\neval,\noutput;\nset address 7,\neval,\noutput;\n\nset load 1,\nset address 6,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address 7,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address 0,\ntick,\noutput;\ntock,\noutput;\nset address 1,\neval,\noutput;\nset address 2,\neval,\noutput;\nset address 3,\neval,\noutput;\nset address 4,\neval,\noutput;\nset address 5,\neval,\noutput;\nset address 6,\neval,\noutput;\nset address 7,\neval,\noutput;\n\nset load 1,\nset address 7,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\n\nset load 0,\nset address 0,\ntick,\noutput;\ntock,\noutput;\nset address 1,\neval,\noutput;\nset address 2,\neval,\noutput;\nset address 3,\neval,\noutput;\nset address 4,\neval,\noutput;\nset address 5,\neval,\noutput;\nset address 6,\neval,\noutput;\nset address 7,\neval,\noutput;\n',"RAM8.cmp":"|time | in |load|address| out |\n| 0+ | 0 | 0 | 0 | 0 |\n| 1 | 0 | 0 | 0 | 0 |\n| 1+ | 0 | 1 | 0 | 0 |\n| 2 | 0 | 1 | 0 | 0 |\n| 2+ | 11111 | 0 | 0 | 0 |\n| 3 | 11111 | 0 | 0 | 0 |\n| 3+ | 11111 | 1 | 1 | 0 |\n| 4 | 11111 | 1 | 1 | 11111 |\n| 4+ | 11111 | 0 | 0 | 0 |\n| 5 | 11111 | 0 | 0 | 0 |\n| 5+ | 3333 | 0 | 3 | 0 |\n| 6 | 3333 | 0 | 3 | 0 |\n| 6+ | 3333 | 1 | 3 | 0 |\n| 7 | 3333 | 1 | 3 | 3333 |\n| 7+ | 3333 | 0 | 3 | 3333 |\n| 8 | 3333 | 0 | 3 | 3333 |\n| 8 | 3333 | 0 | 1 | 11111 |\n| 8+ | 7777 | 0 | 1 | 11111 |\n| 9 | 7777 | 0 | 1 | 11111 |\n| 9+ | 7777 | 1 | 7 | 0 |\n| 10 | 7777 | 1 | 7 | 7777 |\n| 10+ | 7777 | 0 | 7 | 7777 |\n| 11 | 7777 | 0 | 7 | 7777 |\n| 11 | 7777 | 0 | 3 | 3333 |\n| 11 | 7777 | 0 | 7 | 7777 |\n| 11+ | 7777 | 0 | 0 | 0 |\n| 12 | 7777 | 0 | 0 | 0 |\n| 12 | 7777 | 0 | 1 | 11111 |\n| 12 | 7777 | 0 | 2 | 0 |\n| 12 | 7777 | 0 | 3 | 3333 |\n| 12 | 7777 | 0 | 4 | 0 |\n| 12 | 7777 | 0 | 5 | 0 |\n| 12 | 7777 | 0 | 6 | 0 |\n| 12 | 7777 | 0 | 7 | 7777 |\n| 12+ | 21845 | 1 | 0 | 0 |\n| 13 | 21845 | 1 | 0 | 21845 |\n| 13+ | 21845 | 1 | 1 | 11111 |\n| 14 | 21845 | 1 | 1 | 21845 |\n| 14+ | 21845 | 1 | 2 | 0 |\n| 15 | 21845 | 1 | 2 | 21845 |\n| 15+ | 21845 | 1 | 3 | 3333 |\n| 16 | 21845 | 1 | 3 | 21845 |\n| 16+ | 21845 | 1 | 4 | 0 |\n| 17 | 21845 | 1 | 4 | 21845 |\n| 17+ | 21845 | 1 | 5 | 0 |\n| 18 | 21845 | 1 | 5 | 21845 |\n| 18+ | 21845 | 1 | 6 | 0 |\n| 19 | 21845 | 1 | 6 | 21845 |\n| 19+ | 21845 | 1 | 7 | 7777 |\n| 20 | 21845 | 1 | 7 | 21845 |\n| 20+ | 21845 | 0 | 0 | 21845 |\n| 21 | 21845 | 0 | 0 | 21845 |\n| 21 | 21845 | 0 | 1 | 21845 |\n| 21 | 21845 | 0 | 2 | 21845 |\n| 21 | 21845 | 0 | 3 | 21845 |\n| 21 | 21845 | 0 | 4 | 21845 |\n| 21 | 21845 | 0 | 5 | 21845 |\n| 21 | 21845 | 0 | 6 | 21845 |\n| 21 | 21845 | 0 | 7 | 21845 |\n| 21+ | -21846 | 1 | 0 | 21845 |\n| 22 | -21846 | 1 | 0 | -21846 |\n| 22+ | -21846 | 0 | 0 | -21846 |\n| 23 | -21846 | 0 | 0 | -21846 |\n| 23 | -21846 | 0 | 1 | 21845 |\n| 23 | -21846 | 0 | 2 | 21845 |\n| 23 | -21846 | 0 | 3 | 21845 |\n| 23 | -21846 | 0 | 4 | 21845 |\n| 23 | -21846 | 0 | 5 | 21845 |\n| 23 | -21846 | 0 | 6 | 21845 |\n| 23 | -21846 | 0 | 7 | 21845 |\n| 23+ | 21845 | 1 | 0 | -21846 |\n| 24 | 21845 | 1 | 0 | 21845 |\n| 24+ | -21846 | 1 | 1 | 21845 |\n| 25 | -21846 | 1 | 1 | -21846 |\n| 25+ | -21846 | 0 | 0 | 21845 |\n| 26 | -21846 | 0 | 0 | 21845 |\n| 26 | -21846 | 0 | 1 | -21846 |\n| 26 | -21846 | 0 | 2 | 21845 |\n| 26 | -21846 | 0 | 3 | 21845 |\n| 26 | -21846 | 0 | 4 | 21845 |\n| 26 | -21846 | 0 | 5 | 21845 |\n| 26 | -21846 | 0 | 6 | 21845 |\n| 26 | -21846 | 0 | 7 | 21845 |\n| 26+ | 21845 | 1 | 1 | -21846 |\n| 27 | 21845 | 1 | 1 | 21845 |\n| 27+ | -21846 | 1 | 2 | 21845 |\n| 28 | -21846 | 1 | 2 | -21846 |\n| 28+ | -21846 | 0 | 0 | 21845 |\n| 29 | -21846 | 0 | 0 | 21845 |\n| 29 | -21846 | 0 | 1 | 21845 |\n| 29 | -21846 | 0 | 2 | -21846 |\n| 29 | -21846 | 0 | 3 | 21845 |\n| 29 | -21846 | 0 | 4 | 21845 |\n| 29 | -21846 | 0 | 5 | 21845 |\n| 29 | -21846 | 0 | 6 | 21845 |\n| 29 | -21846 | 0 | 7 | 21845 |\n| 29+ | 21845 | 1 | 2 | -21846 |\n| 30 | 21845 | 1 | 2 | 21845 |\n| 30+ | -21846 | 1 | 3 | 21845 |\n| 31 | -21846 | 1 | 3 | -21846 |\n| 31+ | -21846 | 0 | 0 | 21845 |\n| 32 | -21846 | 0 | 0 | 21845 |\n| 32 | -21846 | 0 | 1 | 21845 |\n| 32 | -21846 | 0 | 2 | 21845 |\n| 32 | -21846 | 0 | 3 | -21846 |\n| 32 | -21846 | 0 | 4 | 21845 |\n| 32 | -21846 | 0 | 5 | 21845 |\n| 32 | -21846 | 0 | 6 | 21845 |\n| 32 | -21846 | 0 | 7 | 21845 |\n| 32+ | 21845 | 1 | 3 | -21846 |\n| 33 | 21845 | 1 | 3 | 21845 |\n| 33+ | -21846 | 1 | 4 | 21845 |\n| 34 | -21846 | 1 | 4 | -21846 |\n| 34+ | -21846 | 0 | 0 | 21845 |\n| 35 | -21846 | 0 | 0 | 21845 |\n| 35 | -21846 | 0 | 1 | 21845 |\n| 35 | -21846 | 0 | 2 | 21845 |\n| 35 | -21846 | 0 | 3 | 21845 |\n| 35 | -21846 | 0 | 4 | -21846 |\n| 35 | -21846 | 0 | 5 | 21845 |\n| 35 | -21846 | 0 | 6 | 21845 |\n| 35 | -21846 | 0 | 7 | 21845 |\n| 35+ | 21845 | 1 | 4 | -21846 |\n| 36 | 21845 | 1 | 4 | 21845 |\n| 36+ | -21846 | 1 | 5 | 21845 |\n| 37 | -21846 | 1 | 5 | -21846 |\n| 37+ | -21846 | 0 | 0 | 21845 |\n| 38 | -21846 | 0 | 0 | 21845 |\n| 38 | -21846 | 0 | 1 | 21845 |\n| 38 | -21846 | 0 | 2 | 21845 |\n| 38 | -21846 | 0 | 3 | 21845 |\n| 38 | -21846 | 0 | 4 | 21845 |\n| 38 | -21846 | 0 | 5 | -21846 |\n| 38 | -21846 | 0 | 6 | 21845 |\n| 38 | -21846 | 0 | 7 | 21845 |\n| 38+ | 21845 | 1 | 5 | -21846 |\n| 39 | 21845 | 1 | 5 | 21845 |\n| 39+ | -21846 | 1 | 6 | 21845 |\n| 40 | -21846 | 1 | 6 | -21846 |\n| 40+ | -21846 | 0 | 0 | 21845 |\n| 41 | -21846 | 0 | 0 | 21845 |\n| 41 | -21846 | 0 | 1 | 21845 |\n| 41 | -21846 | 0 | 2 | 21845 |\n| 41 | -21846 | 0 | 3 | 21845 |\n| 41 | -21846 | 0 | 4 | 21845 |\n| 41 | -21846 | 0 | 5 | 21845 |\n| 41 | -21846 | 0 | 6 | -21846 |\n| 41 | -21846 | 0 | 7 | 21845 |\n| 41+ | 21845 | 1 | 6 | -21846 |\n| 42 | 21845 | 1 | 6 | 21845 |\n| 42+ | -21846 | 1 | 7 | 21845 |\n| 43 | -21846 | 1 | 7 | -21846 |\n| 43+ | -21846 | 0 | 0 | 21845 |\n| 44 | -21846 | 0 | 0 | 21845 |\n| 44 | -21846 | 0 | 1 | 21845 |\n| 44 | -21846 | 0 | 2 | 21845 |\n| 44 | -21846 | 0 | 3 | 21845 |\n| 44 | -21846 | 0 | 4 | 21845 |\n| 44 | -21846 | 0 | 5 | 21845 |\n| 44 | -21846 | 0 | 6 | 21845 |\n| 44 | -21846 | 0 | 7 | -21846 |\n| 44+ | 21845 | 1 | 7 | -21846 |\n| 45 | 21845 | 1 | 7 | 21845 |\n| 45+ | 21845 | 0 | 0 | 21845 |\n| 46 | 21845 | 0 | 0 | 21845 |\n| 46 | 21845 | 0 | 1 | 21845 |\n| 46 | 21845 | 0 | 2 | 21845 |\n| 46 | 21845 | 0 | 3 | 21845 |\n| 46 | 21845 | 0 | 4 | 21845 |\n| 46 | 21845 | 0 | 5 | 21845 |\n| 46 | 21845 | 0 | 6 | 21845 |\n| 46 | 21845 | 0 | 7 | 21845 |"},RAM64:{"RAM64.hdl":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/3/a/RAM64.hdl\n/**\n * Memory of sixty four 16-bit registers.\n * If load is asserted, the value of the register selected by\n * address is set to in; Otherwise, the value does not change.\n * The value of the selected register is emitted by out.\n */\nCHIP RAM64 {\n IN in[16], load, address[6];\n OUT out[16];\n\n PARTS:\n //// Replace this comment with your code.\n}',"RAM64.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/3/a/RAM64.tst\n\noutput-list time%S1.3.1 in%D1.6.1 load%B2.1.1 address%D2.3.2 out%D1.6.1;\n\nset in 0,\nset load 0,\nset address 0,\ntick,\noutput;\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\ntock,\noutput;\n\nset in 1313,\nset load 0,\ntick,\noutput;\ntock,\noutput;\n\nset load 1,\nset address 13,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address 0,\ntick,\noutput;\ntock,\noutput;\n\nset in 4747,\nset address 47,\ntick,\noutput;\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\ntick,\noutput;\ntock,\noutput;\n\nset address 13,\neval,\noutput;\n\nset in 6363,\ntick,\noutput;\ntock,\noutput;\n\nset load 1,\nset address 63,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\ntick,\noutput;\ntock,\noutput;\n\nset address 47,\neval,\noutput;\n\nset address 63,\neval,\noutput;\n\n\nset load 0,\nset address %B101000,\ntick,\noutput;\ntock,\noutput;\nset address %B101001,\neval,\noutput;\nset address %B101010,\neval,\noutput;\nset address %B101011,\neval,\noutput;\nset address %B101100,\neval,\noutput;\nset address %B101101,\neval,\noutput;\nset address %B101110,\neval,\noutput;\nset address %B101111,\neval,\noutput;\n\nset load 1,\nset in %B0101010101010101,\nset address %B101000,\ntick,\noutput;\ntock,\noutput;\nset address %B101001,\ntick,\noutput,\ntock,\noutput;\nset address %B101010,\ntick,\noutput,\ntock,\noutput;\nset address %B101011,\ntick,\noutput,\ntock,\noutput;\nset address %B101100,\ntick,\noutput,\ntock,\noutput;\nset address %B101101,\ntick,\noutput,\ntock,\noutput;\nset address %B101110,\ntick,\noutput,\ntock,\noutput;\nset address %B101111,\ntick,\noutput,\ntock,\noutput;\n\nset load 0,\nset address %B101000,\ntick,\noutput;\ntock,\noutput;\nset address %B101001,\neval,\noutput;\nset address %B101010,\neval,\noutput;\nset address %B101011,\neval,\noutput;\nset address %B101100,\neval,\noutput;\nset address %B101101,\neval,\noutput;\nset address %B101110,\neval,\noutput;\nset address %B101111,\neval,\noutput;\n\nset load 1,\nset address %B101000,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B101000,\ntick,\noutput;\ntock,\noutput;\nset address %B101001,\neval,\noutput;\nset address %B101010,\neval,\noutput;\nset address %B101011,\neval,\noutput;\nset address %B101100,\neval,\noutput;\nset address %B101101,\neval,\noutput;\nset address %B101110,\neval,\noutput;\nset address %B101111,\neval,\noutput;\n\nset load 1,\nset address %B101000,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B101001,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B101000,\ntick,\noutput;\ntock,\noutput;\nset address %B101001,\neval,\noutput;\nset address %B101010,\neval,\noutput;\nset address %B101011,\neval,\noutput;\nset address %B101100,\neval,\noutput;\nset address %B101101,\neval,\noutput;\nset address %B101110,\neval,\noutput;\nset address %B101111,\neval,\noutput;\n\nset load 1,\nset address %B101001,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B101010,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B101000,\ntick,\noutput;\ntock,\noutput;\nset address %B101001,\neval,\noutput;\nset address %B101010,\neval,\noutput;\nset address %B101011,\neval,\noutput;\nset address %B101100,\neval,\noutput;\nset address %B101101,\neval,\noutput;\nset address %B101110,\neval,\noutput;\nset address %B101111,\neval,\noutput;\n\nset load 1,\nset address %B101010,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B101011,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B101000,\ntick,\noutput;\ntock,\noutput;\nset address %B101001,\neval,\noutput;\nset address %B101010,\neval,\noutput;\nset address %B101011,\neval,\noutput;\nset address %B101100,\neval,\noutput;\nset address %B101101,\neval,\noutput;\nset address %B101110,\neval,\noutput;\nset address %B101111,\neval,\noutput;\n\nset load 1,\nset address %B101011,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B101100,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B101000,\ntick,\noutput;\ntock,\noutput;\nset address %B101001,\neval,\noutput;\nset address %B101010,\neval,\noutput;\nset address %B101011,\neval,\noutput;\nset address %B101100,\neval,\noutput;\nset address %B101101,\neval,\noutput;\nset address %B101110,\neval,\noutput;\nset address %B101111,\neval,\noutput;\n\nset load 1,\nset address %B101100,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B101101,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B101000,\ntick,\noutput;\ntock,\noutput;\nset address %B101001,\neval,\noutput;\nset address %B101010,\neval,\noutput;\nset address %B101011,\neval,\noutput;\nset address %B101100,\neval,\noutput;\nset address %B101101,\neval,\noutput;\nset address %B101110,\neval,\noutput;\nset address %B101111,\neval,\noutput;\n\nset load 1,\nset address %B101101,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B101110,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B101000,\ntick,\noutput;\ntock,\noutput;\nset address %B101001,\neval,\noutput;\nset address %B101010,\neval,\noutput;\nset address %B101011,\neval,\noutput;\nset address %B101100,\neval,\noutput;\nset address %B101101,\neval,\noutput;\nset address %B101110,\neval,\noutput;\nset address %B101111,\neval,\noutput;\n\nset load 1,\nset address %B101110,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B101111,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B101000,\ntick,\noutput;\ntock,\noutput;\nset address %B101001,\neval,\noutput;\nset address %B101010,\neval,\noutput;\nset address %B101011,\neval,\noutput;\nset address %B101100,\neval,\noutput;\nset address %B101101,\neval,\noutput;\nset address %B101110,\neval,\noutput;\nset address %B101111,\neval,\noutput;\n\nset load 1,\nset address %B101111,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\n\nset load 0,\nset address %B101000,\ntick,\noutput;\ntock,\noutput;\nset address %B101001,\neval,\noutput;\nset address %B101010,\neval,\noutput;\nset address %B101011,\neval,\noutput;\nset address %B101100,\neval,\noutput;\nset address %B101101,\neval,\noutput;\nset address %B101110,\neval,\noutput;\nset address %B101111,\neval,\noutput;\n\n\nset load 0,\nset address %B000101,\ntick,\noutput;\ntock,\noutput;\nset address %B001101,\neval,\noutput;\nset address %B010101,\neval,\noutput;\nset address %B011101,\neval,\noutput;\nset address %B100101,\neval,\noutput;\nset address %B101101,\neval,\noutput;\nset address %B110101,\neval,\noutput;\nset address %B111101,\neval,\noutput;\n\nset load 1,\nset in %B0101010101010101,\nset address %B000101,\ntick,\noutput;\ntock,\noutput;\nset address %B001101,\ntick,\noutput,\ntock,\noutput;\nset address %B010101,\ntick,\noutput,\ntock,\noutput;\nset address %B011101,\ntick,\noutput,\ntock,\noutput;\nset address %B100101,\ntick,\noutput,\ntock,\noutput;\nset address %B101101,\ntick,\noutput,\ntock,\noutput;\nset address %B110101,\ntick,\noutput,\ntock,\noutput;\nset address %B111101,\ntick,\noutput,\ntock,\noutput;\n\nset load 0,\nset address %B000101,\ntick,\noutput;\ntock,\noutput;\nset address %B001101,\neval,\noutput;\nset address %B010101,\neval,\noutput;\nset address %B011101,\neval,\noutput;\nset address %B100101,\neval,\noutput;\nset address %B101101,\neval,\noutput;\nset address %B110101,\neval,\noutput;\nset address %B111101,\neval,\noutput;\n\nset load 1,\nset address %B000101,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B000101,\ntick,\noutput;\ntock,\noutput;\nset address %B001101,\neval,\noutput;\nset address %B010101,\neval,\noutput;\nset address %B011101,\neval,\noutput;\nset address %B100101,\neval,\noutput;\nset address %B101101,\neval,\noutput;\nset address %B110101,\neval,\noutput;\nset address %B111101,\neval,\noutput;\n\nset load 1,\nset address %B000101,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B001101,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B000101,\ntick,\noutput;\ntock,\noutput;\nset address %B001101,\neval,\noutput;\nset address %B010101,\neval,\noutput;\nset address %B011101,\neval,\noutput;\nset address %B100101,\neval,\noutput;\nset address %B101101,\neval,\noutput;\nset address %B110101,\neval,\noutput;\nset address %B111101,\neval,\noutput;\n\nset load 1,\nset address %B001101,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B010101,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B000101,\ntick,\noutput;\ntock,\noutput;\nset address %B001101,\neval,\noutput;\nset address %B010101,\neval,\noutput;\nset address %B011101,\neval,\noutput;\nset address %B100101,\neval,\noutput;\nset address %B101101,\neval,\noutput;\nset address %B110101,\neval,\noutput;\nset address %B111101,\neval,\noutput;\n\nset load 1,\nset address %B010101,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B011101,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B000101,\ntick,\noutput;\ntock,\noutput;\nset address %B001101,\neval,\noutput;\nset address %B010101,\neval,\noutput;\nset address %B011101,\neval,\noutput;\nset address %B100101,\neval,\noutput;\nset address %B101101,\neval,\noutput;\nset address %B110101,\neval,\noutput;\nset address %B111101,\neval,\noutput;\n\nset load 1,\nset address %B011101,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B100101,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B000101,\ntick,\noutput;\ntock,\noutput;\nset address %B001101,\neval,\noutput;\nset address %B010101,\neval,\noutput;\nset address %B011101,\neval,\noutput;\nset address %B100101,\neval,\noutput;\nset address %B101101,\neval,\noutput;\nset address %B110101,\neval,\noutput;\nset address %B111101,\neval,\noutput;\n\nset load 1,\nset address %B100101,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B101101,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B000101,\ntick,\noutput;\ntock,\noutput;\nset address %B001101,\neval,\noutput;\nset address %B010101,\neval,\noutput;\nset address %B011101,\neval,\noutput;\nset address %B100101,\neval,\noutput;\nset address %B101101,\neval,\noutput;\nset address %B110101,\neval,\noutput;\nset address %B111101,\neval,\noutput;\n\nset load 1,\nset address %B101101,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B110101,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B000101,\ntick,\noutput;\ntock,\noutput;\nset address %B001101,\neval,\noutput;\nset address %B010101,\neval,\noutput;\nset address %B011101,\neval,\noutput;\nset address %B100101,\neval,\noutput;\nset address %B101101,\neval,\noutput;\nset address %B110101,\neval,\noutput;\nset address %B111101,\neval,\noutput;\n\nset load 1,\nset address %B110101,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B111101,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B000101,\ntick,\noutput;\ntock,\noutput;\nset address %B001101,\neval,\noutput;\nset address %B010101,\neval,\noutput;\nset address %B011101,\neval,\noutput;\nset address %B100101,\neval,\noutput;\nset address %B101101,\neval,\noutput;\nset address %B110101,\neval,\noutput;\nset address %B111101,\neval,\noutput;\n\nset load 1,\nset address %B111101,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\n\nset load 0,\nset address %B000101,\ntick,\noutput;\ntock,\noutput;\nset address %B001101,\neval,\noutput;\nset address %B010101,\neval,\noutput;\nset address %B011101,\neval,\noutput;\nset address %B100101,\neval,\noutput;\nset address %B101101,\neval,\noutput;\nset address %B110101,\neval,\noutput;\nset address %B111101,\neval,\noutput;',"RAM64.cmp":"|time | in |load|address| out |\n| 0+ | 0 | 0 | 0 | 0 |\n| 1 | 0 | 0 | 0 | 0 |\n| 1+ | 0 | 1 | 0 | 0 |\n| 2 | 0 | 1 | 0 | 0 |\n| 2+ | 1313 | 0 | 0 | 0 |\n| 3 | 1313 | 0 | 0 | 0 |\n| 3+ | 1313 | 1 | 13 | 0 |\n| 4 | 1313 | 1 | 13 | 1313 |\n| 4+ | 1313 | 0 | 0 | 0 |\n| 5 | 1313 | 0 | 0 | 0 |\n| 5+ | 4747 | 0 | 47 | 0 |\n| 6 | 4747 | 0 | 47 | 0 |\n| 6+ | 4747 | 1 | 47 | 0 |\n| 7 | 4747 | 1 | 47 | 4747 |\n| 7+ | 4747 | 0 | 47 | 4747 |\n| 8 | 4747 | 0 | 47 | 4747 |\n| 8 | 4747 | 0 | 13 | 1313 |\n| 8+ | 6363 | 0 | 13 | 1313 |\n| 9 | 6363 | 0 | 13 | 1313 |\n| 9+ | 6363 | 1 | 63 | 0 |\n| 10 | 6363 | 1 | 63 | 6363 |\n| 10+ | 6363 | 0 | 63 | 6363 |\n| 11 | 6363 | 0 | 63 | 6363 |\n| 11 | 6363 | 0 | 47 | 4747 |\n| 11 | 6363 | 0 | 63 | 6363 |\n| 11+ | 6363 | 0 | 40 | 0 |\n| 12 | 6363 | 0 | 40 | 0 |\n| 12 | 6363 | 0 | 41 | 0 |\n| 12 | 6363 | 0 | 42 | 0 |\n| 12 | 6363 | 0 | 43 | 0 |\n| 12 | 6363 | 0 | 44 | 0 |\n| 12 | 6363 | 0 | 45 | 0 |\n| 12 | 6363 | 0 | 46 | 0 |\n| 12 | 6363 | 0 | 47 | 4747 |\n| 12+ | 21845 | 1 | 40 | 0 |\n| 13 | 21845 | 1 | 40 | 21845 |\n| 13+ | 21845 | 1 | 41 | 0 |\n| 14 | 21845 | 1 | 41 | 21845 |\n| 14+ | 21845 | 1 | 42 | 0 |\n| 15 | 21845 | 1 | 42 | 21845 |\n| 15+ | 21845 | 1 | 43 | 0 |\n| 16 | 21845 | 1 | 43 | 21845 |\n| 16+ | 21845 | 1 | 44 | 0 |\n| 17 | 21845 | 1 | 44 | 21845 |\n| 17+ | 21845 | 1 | 45 | 0 |\n| 18 | 21845 | 1 | 45 | 21845 |\n| 18+ | 21845 | 1 | 46 | 0 |\n| 19 | 21845 | 1 | 46 | 21845 |\n| 19+ | 21845 | 1 | 47 | 4747 |\n| 20 | 21845 | 1 | 47 | 21845 |\n| 20+ | 21845 | 0 | 40 | 21845 |\n| 21 | 21845 | 0 | 40 | 21845 |\n| 21 | 21845 | 0 | 41 | 21845 |\n| 21 | 21845 | 0 | 42 | 21845 |\n| 21 | 21845 | 0 | 43 | 21845 |\n| 21 | 21845 | 0 | 44 | 21845 |\n| 21 | 21845 | 0 | 45 | 21845 |\n| 21 | 21845 | 0 | 46 | 21845 |\n| 21 | 21845 | 0 | 47 | 21845 |\n| 21+ | -21846 | 1 | 40 | 21845 |\n| 22 | -21846 | 1 | 40 | -21846 |\n| 22+ | -21846 | 0 | 40 | -21846 |\n| 23 | -21846 | 0 | 40 | -21846 |\n| 23 | -21846 | 0 | 41 | 21845 |\n| 23 | -21846 | 0 | 42 | 21845 |\n| 23 | -21846 | 0 | 43 | 21845 |\n| 23 | -21846 | 0 | 44 | 21845 |\n| 23 | -21846 | 0 | 45 | 21845 |\n| 23 | -21846 | 0 | 46 | 21845 |\n| 23 | -21846 | 0 | 47 | 21845 |\n| 23+ | 21845 | 1 | 40 | -21846 |\n| 24 | 21845 | 1 | 40 | 21845 |\n| 24+ | -21846 | 1 | 41 | 21845 |\n| 25 | -21846 | 1 | 41 | -21846 |\n| 25+ | -21846 | 0 | 40 | 21845 |\n| 26 | -21846 | 0 | 40 | 21845 |\n| 26 | -21846 | 0 | 41 | -21846 |\n| 26 | -21846 | 0 | 42 | 21845 |\n| 26 | -21846 | 0 | 43 | 21845 |\n| 26 | -21846 | 0 | 44 | 21845 |\n| 26 | -21846 | 0 | 45 | 21845 |\n| 26 | -21846 | 0 | 46 | 21845 |\n| 26 | -21846 | 0 | 47 | 21845 |\n| 26+ | 21845 | 1 | 41 | -21846 |\n| 27 | 21845 | 1 | 41 | 21845 |\n| 27+ | -21846 | 1 | 42 | 21845 |\n| 28 | -21846 | 1 | 42 | -21846 |\n| 28+ | -21846 | 0 | 40 | 21845 |\n| 29 | -21846 | 0 | 40 | 21845 |\n| 29 | -21846 | 0 | 41 | 21845 |\n| 29 | -21846 | 0 | 42 | -21846 |\n| 29 | -21846 | 0 | 43 | 21845 |\n| 29 | -21846 | 0 | 44 | 21845 |\n| 29 | -21846 | 0 | 45 | 21845 |\n| 29 | -21846 | 0 | 46 | 21845 |\n| 29 | -21846 | 0 | 47 | 21845 |\n| 29+ | 21845 | 1 | 42 | -21846 |\n| 30 | 21845 | 1 | 42 | 21845 |\n| 30+ | -21846 | 1 | 43 | 21845 |\n| 31 | -21846 | 1 | 43 | -21846 |\n| 31+ | -21846 | 0 | 40 | 21845 |\n| 32 | -21846 | 0 | 40 | 21845 |\n| 32 | -21846 | 0 | 41 | 21845 |\n| 32 | -21846 | 0 | 42 | 21845 |\n| 32 | -21846 | 0 | 43 | -21846 |\n| 32 | -21846 | 0 | 44 | 21845 |\n| 32 | -21846 | 0 | 45 | 21845 |\n| 32 | -21846 | 0 | 46 | 21845 |\n| 32 | -21846 | 0 | 47 | 21845 |\n| 32+ | 21845 | 1 | 43 | -21846 |\n| 33 | 21845 | 1 | 43 | 21845 |\n| 33+ | -21846 | 1 | 44 | 21845 |\n| 34 | -21846 | 1 | 44 | -21846 |\n| 34+ | -21846 | 0 | 40 | 21845 |\n| 35 | -21846 | 0 | 40 | 21845 |\n| 35 | -21846 | 0 | 41 | 21845 |\n| 35 | -21846 | 0 | 42 | 21845 |\n| 35 | -21846 | 0 | 43 | 21845 |\n| 35 | -21846 | 0 | 44 | -21846 |\n| 35 | -21846 | 0 | 45 | 21845 |\n| 35 | -21846 | 0 | 46 | 21845 |\n| 35 | -21846 | 0 | 47 | 21845 |\n| 35+ | 21845 | 1 | 44 | -21846 |\n| 36 | 21845 | 1 | 44 | 21845 |\n| 36+ | -21846 | 1 | 45 | 21845 |\n| 37 | -21846 | 1 | 45 | -21846 |\n| 37+ | -21846 | 0 | 40 | 21845 |\n| 38 | -21846 | 0 | 40 | 21845 |\n| 38 | -21846 | 0 | 41 | 21845 |\n| 38 | -21846 | 0 | 42 | 21845 |\n| 38 | -21846 | 0 | 43 | 21845 |\n| 38 | -21846 | 0 | 44 | 21845 |\n| 38 | -21846 | 0 | 45 | -21846 |\n| 38 | -21846 | 0 | 46 | 21845 |\n| 38 | -21846 | 0 | 47 | 21845 |\n| 38+ | 21845 | 1 | 45 | -21846 |\n| 39 | 21845 | 1 | 45 | 21845 |\n| 39+ | -21846 | 1 | 46 | 21845 |\n| 40 | -21846 | 1 | 46 | -21846 |\n| 40+ | -21846 | 0 | 40 | 21845 |\n| 41 | -21846 | 0 | 40 | 21845 |\n| 41 | -21846 | 0 | 41 | 21845 |\n| 41 | -21846 | 0 | 42 | 21845 |\n| 41 | -21846 | 0 | 43 | 21845 |\n| 41 | -21846 | 0 | 44 | 21845 |\n| 41 | -21846 | 0 | 45 | 21845 |\n| 41 | -21846 | 0 | 46 | -21846 |\n| 41 | -21846 | 0 | 47 | 21845 |\n| 41+ | 21845 | 1 | 46 | -21846 |\n| 42 | 21845 | 1 | 46 | 21845 |\n| 42+ | -21846 | 1 | 47 | 21845 |\n| 43 | -21846 | 1 | 47 | -21846 |\n| 43+ | -21846 | 0 | 40 | 21845 |\n| 44 | -21846 | 0 | 40 | 21845 |\n| 44 | -21846 | 0 | 41 | 21845 |\n| 44 | -21846 | 0 | 42 | 21845 |\n| 44 | -21846 | 0 | 43 | 21845 |\n| 44 | -21846 | 0 | 44 | 21845 |\n| 44 | -21846 | 0 | 45 | 21845 |\n| 44 | -21846 | 0 | 46 | 21845 |\n| 44 | -21846 | 0 | 47 | -21846 |\n| 44+ | 21845 | 1 | 47 | -21846 |\n| 45 | 21845 | 1 | 47 | 21845 |\n| 45+ | 21845 | 0 | 40 | 21845 |\n| 46 | 21845 | 0 | 40 | 21845 |\n| 46 | 21845 | 0 | 41 | 21845 |\n| 46 | 21845 | 0 | 42 | 21845 |\n| 46 | 21845 | 0 | 43 | 21845 |\n| 46 | 21845 | 0 | 44 | 21845 |\n| 46 | 21845 | 0 | 45 | 21845 |\n| 46 | 21845 | 0 | 46 | 21845 |\n| 46 | 21845 | 0 | 47 | 21845 |\n| 46+ | 21845 | 0 | 5 | 0 |\n| 47 | 21845 | 0 | 5 | 0 |\n| 47 | 21845 | 0 | 13 | 1313 |\n| 47 | 21845 | 0 | 21 | 0 |\n| 47 | 21845 | 0 | 29 | 0 |\n| 47 | 21845 | 0 | 37 | 0 |\n| 47 | 21845 | 0 | 45 | 21845 |\n| 47 | 21845 | 0 | 53 | 0 |\n| 47 | 21845 | 0 | 61 | 0 |\n| 47+ | 21845 | 1 | 5 | 0 |\n| 48 | 21845 | 1 | 5 | 21845 |\n| 48+ | 21845 | 1 | 13 | 1313 |\n| 49 | 21845 | 1 | 13 | 21845 |\n| 49+ | 21845 | 1 | 21 | 0 |\n| 50 | 21845 | 1 | 21 | 21845 |\n| 50+ | 21845 | 1 | 29 | 0 |\n| 51 | 21845 | 1 | 29 | 21845 |\n| 51+ | 21845 | 1 | 37 | 0 |\n| 52 | 21845 | 1 | 37 | 21845 |\n| 52+ | 21845 | 1 | 45 | 21845 |\n| 53 | 21845 | 1 | 45 | 21845 |\n| 53+ | 21845 | 1 | 53 | 0 |\n| 54 | 21845 | 1 | 53 | 21845 |\n| 54+ | 21845 | 1 | 61 | 0 |\n| 55 | 21845 | 1 | 61 | 21845 |\n| 55+ | 21845 | 0 | 5 | 21845 |\n| 56 | 21845 | 0 | 5 | 21845 |\n| 56 | 21845 | 0 | 13 | 21845 |\n| 56 | 21845 | 0 | 21 | 21845 |\n| 56 | 21845 | 0 | 29 | 21845 |\n| 56 | 21845 | 0 | 37 | 21845 |\n| 56 | 21845 | 0 | 45 | 21845 |\n| 56 | 21845 | 0 | 53 | 21845 |\n| 56 | 21845 | 0 | 61 | 21845 |\n| 56+ | -21846 | 1 | 5 | 21845 |\n| 57 | -21846 | 1 | 5 | -21846 |\n| 57+ | -21846 | 0 | 5 | -21846 |\n| 58 | -21846 | 0 | 5 | -21846 |\n| 58 | -21846 | 0 | 13 | 21845 |\n| 58 | -21846 | 0 | 21 | 21845 |\n| 58 | -21846 | 0 | 29 | 21845 |\n| 58 | -21846 | 0 | 37 | 21845 |\n| 58 | -21846 | 0 | 45 | 21845 |\n| 58 | -21846 | 0 | 53 | 21845 |\n| 58 | -21846 | 0 | 61 | 21845 |\n| 58+ | 21845 | 1 | 5 | -21846 |\n| 59 | 21845 | 1 | 5 | 21845 |\n| 59+ | -21846 | 1 | 13 | 21845 |\n| 60 | -21846 | 1 | 13 | -21846 |\n| 60+ | -21846 | 0 | 5 | 21845 |\n| 61 | -21846 | 0 | 5 | 21845 |\n| 61 | -21846 | 0 | 13 | -21846 |\n| 61 | -21846 | 0 | 21 | 21845 |\n| 61 | -21846 | 0 | 29 | 21845 |\n| 61 | -21846 | 0 | 37 | 21845 |\n| 61 | -21846 | 0 | 45 | 21845 |\n| 61 | -21846 | 0 | 53 | 21845 |\n| 61 | -21846 | 0 | 61 | 21845 |\n| 61+ | 21845 | 1 | 13 | -21846 |\n| 62 | 21845 | 1 | 13 | 21845 |\n| 62+ | -21846 | 1 | 21 | 21845 |\n| 63 | -21846 | 1 | 21 | -21846 |\n| 63+ | -21846 | 0 | 5 | 21845 |\n| 64 | -21846 | 0 | 5 | 21845 |\n| 64 | -21846 | 0 | 13 | 21845 |\n| 64 | -21846 | 0 | 21 | -21846 |\n| 64 | -21846 | 0 | 29 | 21845 |\n| 64 | -21846 | 0 | 37 | 21845 |\n| 64 | -21846 | 0 | 45 | 21845 |\n| 64 | -21846 | 0 | 53 | 21845 |\n| 64 | -21846 | 0 | 61 | 21845 |\n| 64+ | 21845 | 1 | 21 | -21846 |\n| 65 | 21845 | 1 | 21 | 21845 |\n| 65+ | -21846 | 1 | 29 | 21845 |\n| 66 | -21846 | 1 | 29 | -21846 |\n| 66+ | -21846 | 0 | 5 | 21845 |\n| 67 | -21846 | 0 | 5 | 21845 |\n| 67 | -21846 | 0 | 13 | 21845 |\n| 67 | -21846 | 0 | 21 | 21845 |\n| 67 | -21846 | 0 | 29 | -21846 |\n| 67 | -21846 | 0 | 37 | 21845 |\n| 67 | -21846 | 0 | 45 | 21845 |\n| 67 | -21846 | 0 | 53 | 21845 |\n| 67 | -21846 | 0 | 61 | 21845 |\n| 67+ | 21845 | 1 | 29 | -21846 |\n| 68 | 21845 | 1 | 29 | 21845 |\n| 68+ | -21846 | 1 | 37 | 21845 |\n| 69 | -21846 | 1 | 37 | -21846 |\n| 69+ | -21846 | 0 | 5 | 21845 |\n| 70 | -21846 | 0 | 5 | 21845 |\n| 70 | -21846 | 0 | 13 | 21845 |\n| 70 | -21846 | 0 | 21 | 21845 |\n| 70 | -21846 | 0 | 29 | 21845 |\n| 70 | -21846 | 0 | 37 | -21846 |\n| 70 | -21846 | 0 | 45 | 21845 |\n| 70 | -21846 | 0 | 53 | 21845 |\n| 70 | -21846 | 0 | 61 | 21845 |\n| 70+ | 21845 | 1 | 37 | -21846 |\n| 71 | 21845 | 1 | 37 | 21845 |\n| 71+ | -21846 | 1 | 45 | 21845 |\n| 72 | -21846 | 1 | 45 | -21846 |\n| 72+ | -21846 | 0 | 5 | 21845 |\n| 73 | -21846 | 0 | 5 | 21845 |\n| 73 | -21846 | 0 | 13 | 21845 |\n| 73 | -21846 | 0 | 21 | 21845 |\n| 73 | -21846 | 0 | 29 | 21845 |\n| 73 | -21846 | 0 | 37 | 21845 |\n| 73 | -21846 | 0 | 45 | -21846 |\n| 73 | -21846 | 0 | 53 | 21845 |\n| 73 | -21846 | 0 | 61 | 21845 |\n| 73+ | 21845 | 1 | 45 | -21846 |\n| 74 | 21845 | 1 | 45 | 21845 |\n| 74+ | -21846 | 1 | 53 | 21845 |\n| 75 | -21846 | 1 | 53 | -21846 |\n| 75+ | -21846 | 0 | 5 | 21845 |\n| 76 | -21846 | 0 | 5 | 21845 |\n| 76 | -21846 | 0 | 13 | 21845 |\n| 76 | -21846 | 0 | 21 | 21845 |\n| 76 | -21846 | 0 | 29 | 21845 |\n| 76 | -21846 | 0 | 37 | 21845 |\n| 76 | -21846 | 0 | 45 | 21845 |\n| 76 | -21846 | 0 | 53 | -21846 |\n| 76 | -21846 | 0 | 61 | 21845 |\n| 76+ | 21845 | 1 | 53 | -21846 |\n| 77 | 21845 | 1 | 53 | 21845 |\n| 77+ | -21846 | 1 | 61 | 21845 |\n| 78 | -21846 | 1 | 61 | -21846 |\n| 78+ | -21846 | 0 | 5 | 21845 |\n| 79 | -21846 | 0 | 5 | 21845 |\n| 79 | -21846 | 0 | 13 | 21845 |\n| 79 | -21846 | 0 | 21 | 21845 |\n| 79 | -21846 | 0 | 29 | 21845 |\n| 79 | -21846 | 0 | 37 | 21845 |\n| 79 | -21846 | 0 | 45 | 21845 |\n| 79 | -21846 | 0 | 53 | 21845 |\n| 79 | -21846 | 0 | 61 | -21846 |\n| 79+ | 21845 | 1 | 61 | -21846 |\n| 80 | 21845 | 1 | 61 | 21845 |\n| 80+ | 21845 | 0 | 5 | 21845 |\n| 81 | 21845 | 0 | 5 | 21845 |\n| 81 | 21845 | 0 | 13 | 21845 |\n| 81 | 21845 | 0 | 21 | 21845 |\n| 81 | 21845 | 0 | 29 | 21845 |\n| 81 | 21845 | 0 | 37 | 21845 |\n| 81 | 21845 | 0 | 45 | 21845 |\n| 81 | 21845 | 0 | 53 | 21845 |\n| 81 | 21845 | 0 | 61 | 21845 |"},RAM512:{"RAM512.hdl":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/3/b/RAM512.hdl\n/**\n * Memory of 512 16-bit registers.\n * If load is asserted, the value of the register selected by\n * address is set to in; Otherwise, the value does not change.\n * The value of the selected register is emitted by out.\n */\nCHIP RAM512 {\n IN in[16], load, address[9];\n OUT out[16];\n\n PARTS:\n //// Replace this comment with your code.\n}',"RAM512.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/3/b/RAM512.tst\n\noutput-list time%S1.3.1 in%D1.6.1 load%B2.1.1 address%D2.3.2 out%D1.6.1;\n\nset in 0,\nset load 0,\nset address 0,\ntick,\noutput;\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\ntock,\noutput;\n\nset in 13099,\nset load 0,\ntick,\noutput;\ntock,\noutput;\n\nset load 1,\nset address 130,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address 0,\ntick,\noutput;\ntock,\noutput;\n\nset in 4729,\nset address 472,\ntick,\noutput;\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\ntick,\noutput;\ntock,\noutput;\n\nset address 130,\neval,\noutput;\n\nset in 5119,\ntick,\noutput;\ntock,\noutput;\n\nset load 1,\nset address 511,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\ntick,\noutput;\ntock,\noutput;\n\nset address 472,\neval,\noutput;\n\nset address 511,\neval,\noutput;\n\n\nset load 0,\nset address %B010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B010101001,\neval,\noutput;\nset address %B010101010,\neval,\noutput;\nset address %B010101011,\neval,\noutput;\nset address %B010101100,\neval,\noutput;\nset address %B010101101,\neval,\noutput;\nset address %B010101110,\neval,\noutput;\nset address %B010101111,\neval,\noutput;\n\nset load 1,\nset in %B0101010101010101,\nset address %B010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B010101001,\ntick,\noutput,\ntock,\noutput;\nset address %B010101010,\ntick,\noutput,\ntock,\noutput;\nset address %B010101011,\ntick,\noutput,\ntock,\noutput;\nset address %B010101100,\ntick,\noutput,\ntock,\noutput;\nset address %B010101101,\ntick,\noutput,\ntock,\noutput;\nset address %B010101110,\ntick,\noutput,\ntock,\noutput;\nset address %B010101111,\ntick,\noutput,\ntock,\noutput;\n\nset load 0,\nset address %B010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B010101001,\neval,\noutput;\nset address %B010101010,\neval,\noutput;\nset address %B010101011,\neval,\noutput;\nset address %B010101100,\neval,\noutput;\nset address %B010101101,\neval,\noutput;\nset address %B010101110,\neval,\noutput;\nset address %B010101111,\neval,\noutput;\n\nset load 1,\nset address %B010101000,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B010101001,\neval,\noutput;\nset address %B010101010,\neval,\noutput;\nset address %B010101011,\neval,\noutput;\nset address %B010101100,\neval,\noutput;\nset address %B010101101,\neval,\noutput;\nset address %B010101110,\neval,\noutput;\nset address %B010101111,\neval,\noutput;\n\nset load 1,\nset address %B010101000,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B010101001,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B010101001,\neval,\noutput;\nset address %B010101010,\neval,\noutput;\nset address %B010101011,\neval,\noutput;\nset address %B010101100,\neval,\noutput;\nset address %B010101101,\neval,\noutput;\nset address %B010101110,\neval,\noutput;\nset address %B010101111,\neval,\noutput;\n\nset load 1,\nset address %B010101001,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B010101010,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B010101001,\neval,\noutput;\nset address %B010101010,\neval,\noutput;\nset address %B010101011,\neval,\noutput;\nset address %B010101100,\neval,\noutput;\nset address %B010101101,\neval,\noutput;\nset address %B010101110,\neval,\noutput;\nset address %B010101111,\neval,\noutput;\n\nset load 1,\nset address %B010101010,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B010101011,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B010101001,\neval,\noutput;\nset address %B010101010,\neval,\noutput;\nset address %B010101011,\neval,\noutput;\nset address %B010101100,\neval,\noutput;\nset address %B010101101,\neval,\noutput;\nset address %B010101110,\neval,\noutput;\nset address %B010101111,\neval,\noutput;\n\nset load 1,\nset address %B010101011,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B010101100,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B010101001,\neval,\noutput;\nset address %B010101010,\neval,\noutput;\nset address %B010101011,\neval,\noutput;\nset address %B010101100,\neval,\noutput;\nset address %B010101101,\neval,\noutput;\nset address %B010101110,\neval,\noutput;\nset address %B010101111,\neval,\noutput;\n\nset load 1,\nset address %B010101100,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B010101101,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B010101001,\neval,\noutput;\nset address %B010101010,\neval,\noutput;\nset address %B010101011,\neval,\noutput;\nset address %B010101100,\neval,\noutput;\nset address %B010101101,\neval,\noutput;\nset address %B010101110,\neval,\noutput;\nset address %B010101111,\neval,\noutput;\n\nset load 1,\nset address %B010101101,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B010101110,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B010101001,\neval,\noutput;\nset address %B010101010,\neval,\noutput;\nset address %B010101011,\neval,\noutput;\nset address %B010101100,\neval,\noutput;\nset address %B010101101,\neval,\noutput;\nset address %B010101110,\neval,\noutput;\nset address %B010101111,\neval,\noutput;\n\nset load 1,\nset address %B010101110,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B010101111,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B010101001,\neval,\noutput;\nset address %B010101010,\neval,\noutput;\nset address %B010101011,\neval,\noutput;\nset address %B010101100,\neval,\noutput;\nset address %B010101101,\neval,\noutput;\nset address %B010101110,\neval,\noutput;\nset address %B010101111,\neval,\noutput;\n\nset load 1,\nset address %B010101111,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\n\nset load 0,\nset address %B010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B010101001,\neval,\noutput;\nset address %B010101010,\neval,\noutput;\nset address %B010101011,\neval,\noutput;\nset address %B010101100,\neval,\noutput;\nset address %B010101101,\neval,\noutput;\nset address %B010101110,\neval,\noutput;\nset address %B010101111,\neval,\noutput;\n\n\nset load 0,\nset address %B000101010,\ntick,\noutput;\ntock,\noutput;\nset address %B001101010,\neval,\noutput;\nset address %B010101010,\neval,\noutput;\nset address %B011101010,\neval,\noutput;\nset address %B100101010,\neval,\noutput;\nset address %B101101010,\neval,\noutput;\nset address %B110101010,\neval,\noutput;\nset address %B111101010,\neval,\noutput;\n\nset load 1,\nset in %B0101010101010101,\nset address %B000101010,\ntick,\noutput;\ntock,\noutput;\nset address %B001101010,\ntick,\noutput,\ntock,\noutput;\nset address %B010101010,\ntick,\noutput,\ntock,\noutput;\nset address %B011101010,\ntick,\noutput,\ntock,\noutput;\nset address %B100101010,\ntick,\noutput,\ntock,\noutput;\nset address %B101101010,\ntick,\noutput,\ntock,\noutput;\nset address %B110101010,\ntick,\noutput,\ntock,\noutput;\nset address %B111101010,\ntick,\noutput,\ntock,\noutput;\n\nset load 0,\nset address %B000101010,\ntick,\noutput;\ntock,\noutput;\nset address %B001101010,\neval,\noutput;\nset address %B010101010,\neval,\noutput;\nset address %B011101010,\neval,\noutput;\nset address %B100101010,\neval,\noutput;\nset address %B101101010,\neval,\noutput;\nset address %B110101010,\neval,\noutput;\nset address %B111101010,\neval,\noutput;\n\nset load 1,\nset address %B000101010,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B000101010,\ntick,\noutput;\ntock,\noutput;\nset address %B001101010,\neval,\noutput;\nset address %B010101010,\neval,\noutput;\nset address %B011101010,\neval,\noutput;\nset address %B100101010,\neval,\noutput;\nset address %B101101010,\neval,\noutput;\nset address %B110101010,\neval,\noutput;\nset address %B111101010,\neval,\noutput;\n\nset load 1,\nset address %B000101010,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B001101010,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B000101010,\ntick,\noutput;\ntock,\noutput;\nset address %B001101010,\neval,\noutput;\nset address %B010101010,\neval,\noutput;\nset address %B011101010,\neval,\noutput;\nset address %B100101010,\neval,\noutput;\nset address %B101101010,\neval,\noutput;\nset address %B110101010,\neval,\noutput;\nset address %B111101010,\neval,\noutput;\n\nset load 1,\nset address %B001101010,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B010101010,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B000101010,\ntick,\noutput;\ntock,\noutput;\nset address %B001101010,\neval,\noutput;\nset address %B010101010,\neval,\noutput;\nset address %B011101010,\neval,\noutput;\nset address %B100101010,\neval,\noutput;\nset address %B101101010,\neval,\noutput;\nset address %B110101010,\neval,\noutput;\nset address %B111101010,\neval,\noutput;\n\nset load 1,\nset address %B010101010,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B011101010,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B000101010,\ntick,\noutput;\ntock,\noutput;\nset address %B001101010,\neval,\noutput;\nset address %B010101010,\neval,\noutput;\nset address %B011101010,\neval,\noutput;\nset address %B100101010,\neval,\noutput;\nset address %B101101010,\neval,\noutput;\nset address %B110101010,\neval,\noutput;\nset address %B111101010,\neval,\noutput;\n\nset load 1,\nset address %B011101010,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B100101010,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B000101010,\ntick,\noutput;\ntock,\noutput;\nset address %B001101010,\neval,\noutput;\nset address %B010101010,\neval,\noutput;\nset address %B011101010,\neval,\noutput;\nset address %B100101010,\neval,\noutput;\nset address %B101101010,\neval,\noutput;\nset address %B110101010,\neval,\noutput;\nset address %B111101010,\neval,\noutput;\n\nset load 1,\nset address %B100101010,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B101101010,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B000101010,\ntick,\noutput;\ntock,\noutput;\nset address %B001101010,\neval,\noutput;\nset address %B010101010,\neval,\noutput;\nset address %B011101010,\neval,\noutput;\nset address %B100101010,\neval,\noutput;\nset address %B101101010,\neval,\noutput;\nset address %B110101010,\neval,\noutput;\nset address %B111101010,\neval,\noutput;\n\nset load 1,\nset address %B101101010,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B110101010,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B000101010,\ntick,\noutput;\ntock,\noutput;\nset address %B001101010,\neval,\noutput;\nset address %B010101010,\neval,\noutput;\nset address %B011101010,\neval,\noutput;\nset address %B100101010,\neval,\noutput;\nset address %B101101010,\neval,\noutput;\nset address %B110101010,\neval,\noutput;\nset address %B111101010,\neval,\noutput;\n\nset load 1,\nset address %B110101010,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B111101010,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B000101010,\ntick,\noutput;\ntock,\noutput;\nset address %B001101010,\neval,\noutput;\nset address %B010101010,\neval,\noutput;\nset address %B011101010,\neval,\noutput;\nset address %B100101010,\neval,\noutput;\nset address %B101101010,\neval,\noutput;\nset address %B110101010,\neval,\noutput;\nset address %B111101010,\neval,\noutput;\n\nset load 1,\nset address %B111101010,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\n\nset load 0,\nset address %B000101010,\ntick,\noutput;\ntock,\noutput;\nset address %B001101010,\neval,\noutput;\nset address %B010101010,\neval,\noutput;\nset address %B011101010,\neval,\noutput;\nset address %B100101010,\neval,\noutput;\nset address %B101101010,\neval,\noutput;\nset address %B110101010,\neval,\noutput;\nset address %B111101010,\neval,\noutput;\n',"RAM512.cmp":"|time | in |load|address| out |\n| 0+ | 0 | 0 | 0 | 0 |\n| 1 | 0 | 0 | 0 | 0 |\n| 1+ | 0 | 1 | 0 | 0 |\n| 2 | 0 | 1 | 0 | 0 |\n| 2+ | 13099 | 0 | 0 | 0 |\n| 3 | 13099 | 0 | 0 | 0 |\n| 3+ | 13099 | 1 | 130 | 0 |\n| 4 | 13099 | 1 | 130 | 13099 |\n| 4+ | 13099 | 0 | 0 | 0 |\n| 5 | 13099 | 0 | 0 | 0 |\n| 5+ | 4729 | 0 | 472 | 0 |\n| 6 | 4729 | 0 | 472 | 0 |\n| 6+ | 4729 | 1 | 472 | 0 |\n| 7 | 4729 | 1 | 472 | 4729 |\n| 7+ | 4729 | 0 | 472 | 4729 |\n| 8 | 4729 | 0 | 472 | 4729 |\n| 8 | 4729 | 0 | 130 | 13099 |\n| 8+ | 5119 | 0 | 130 | 13099 |\n| 9 | 5119 | 0 | 130 | 13099 |\n| 9+ | 5119 | 1 | 511 | 0 |\n| 10 | 5119 | 1 | 511 | 5119 |\n| 10+ | 5119 | 0 | 511 | 5119 |\n| 11 | 5119 | 0 | 511 | 5119 |\n| 11 | 5119 | 0 | 472 | 4729 |\n| 11 | 5119 | 0 | 511 | 5119 |\n| 11+ | 5119 | 0 | 168 | 0 |\n| 12 | 5119 | 0 | 168 | 0 |\n| 12 | 5119 | 0 | 169 | 0 |\n| 12 | 5119 | 0 | 170 | 0 |\n| 12 | 5119 | 0 | 171 | 0 |\n| 12 | 5119 | 0 | 172 | 0 |\n| 12 | 5119 | 0 | 173 | 0 |\n| 12 | 5119 | 0 | 174 | 0 |\n| 12 | 5119 | 0 | 175 | 0 |\n| 12+ | 21845 | 1 | 168 | 0 |\n| 13 | 21845 | 1 | 168 | 21845 |\n| 13+ | 21845 | 1 | 169 | 0 |\n| 14 | 21845 | 1 | 169 | 21845 |\n| 14+ | 21845 | 1 | 170 | 0 |\n| 15 | 21845 | 1 | 170 | 21845 |\n| 15+ | 21845 | 1 | 171 | 0 |\n| 16 | 21845 | 1 | 171 | 21845 |\n| 16+ | 21845 | 1 | 172 | 0 |\n| 17 | 21845 | 1 | 172 | 21845 |\n| 17+ | 21845 | 1 | 173 | 0 |\n| 18 | 21845 | 1 | 173 | 21845 |\n| 18+ | 21845 | 1 | 174 | 0 |\n| 19 | 21845 | 1 | 174 | 21845 |\n| 19+ | 21845 | 1 | 175 | 0 |\n| 20 | 21845 | 1 | 175 | 21845 |\n| 20+ | 21845 | 0 | 168 | 21845 |\n| 21 | 21845 | 0 | 168 | 21845 |\n| 21 | 21845 | 0 | 169 | 21845 |\n| 21 | 21845 | 0 | 170 | 21845 |\n| 21 | 21845 | 0 | 171 | 21845 |\n| 21 | 21845 | 0 | 172 | 21845 |\n| 21 | 21845 | 0 | 173 | 21845 |\n| 21 | 21845 | 0 | 174 | 21845 |\n| 21 | 21845 | 0 | 175 | 21845 |\n| 21+ | -21846 | 1 | 168 | 21845 |\n| 22 | -21846 | 1 | 168 | -21846 |\n| 22+ | -21846 | 0 | 168 | -21846 |\n| 23 | -21846 | 0 | 168 | -21846 |\n| 23 | -21846 | 0 | 169 | 21845 |\n| 23 | -21846 | 0 | 170 | 21845 |\n| 23 | -21846 | 0 | 171 | 21845 |\n| 23 | -21846 | 0 | 172 | 21845 |\n| 23 | -21846 | 0 | 173 | 21845 |\n| 23 | -21846 | 0 | 174 | 21845 |\n| 23 | -21846 | 0 | 175 | 21845 |\n| 23+ | 21845 | 1 | 168 | -21846 |\n| 24 | 21845 | 1 | 168 | 21845 |\n| 24+ | -21846 | 1 | 169 | 21845 |\n| 25 | -21846 | 1 | 169 | -21846 |\n| 25+ | -21846 | 0 | 168 | 21845 |\n| 26 | -21846 | 0 | 168 | 21845 |\n| 26 | -21846 | 0 | 169 | -21846 |\n| 26 | -21846 | 0 | 170 | 21845 |\n| 26 | -21846 | 0 | 171 | 21845 |\n| 26 | -21846 | 0 | 172 | 21845 |\n| 26 | -21846 | 0 | 173 | 21845 |\n| 26 | -21846 | 0 | 174 | 21845 |\n| 26 | -21846 | 0 | 175 | 21845 |\n| 26+ | 21845 | 1 | 169 | -21846 |\n| 27 | 21845 | 1 | 169 | 21845 |\n| 27+ | -21846 | 1 | 170 | 21845 |\n| 28 | -21846 | 1 | 170 | -21846 |\n| 28+ | -21846 | 0 | 168 | 21845 |\n| 29 | -21846 | 0 | 168 | 21845 |\n| 29 | -21846 | 0 | 169 | 21845 |\n| 29 | -21846 | 0 | 170 | -21846 |\n| 29 | -21846 | 0 | 171 | 21845 |\n| 29 | -21846 | 0 | 172 | 21845 |\n| 29 | -21846 | 0 | 173 | 21845 |\n| 29 | -21846 | 0 | 174 | 21845 |\n| 29 | -21846 | 0 | 175 | 21845 |\n| 29+ | 21845 | 1 | 170 | -21846 |\n| 30 | 21845 | 1 | 170 | 21845 |\n| 30+ | -21846 | 1 | 171 | 21845 |\n| 31 | -21846 | 1 | 171 | -21846 |\n| 31+ | -21846 | 0 | 168 | 21845 |\n| 32 | -21846 | 0 | 168 | 21845 |\n| 32 | -21846 | 0 | 169 | 21845 |\n| 32 | -21846 | 0 | 170 | 21845 |\n| 32 | -21846 | 0 | 171 | -21846 |\n| 32 | -21846 | 0 | 172 | 21845 |\n| 32 | -21846 | 0 | 173 | 21845 |\n| 32 | -21846 | 0 | 174 | 21845 |\n| 32 | -21846 | 0 | 175 | 21845 |\n| 32+ | 21845 | 1 | 171 | -21846 |\n| 33 | 21845 | 1 | 171 | 21845 |\n| 33+ | -21846 | 1 | 172 | 21845 |\n| 34 | -21846 | 1 | 172 | -21846 |\n| 34+ | -21846 | 0 | 168 | 21845 |\n| 35 | -21846 | 0 | 168 | 21845 |\n| 35 | -21846 | 0 | 169 | 21845 |\n| 35 | -21846 | 0 | 170 | 21845 |\n| 35 | -21846 | 0 | 171 | 21845 |\n| 35 | -21846 | 0 | 172 | -21846 |\n| 35 | -21846 | 0 | 173 | 21845 |\n| 35 | -21846 | 0 | 174 | 21845 |\n| 35 | -21846 | 0 | 175 | 21845 |\n| 35+ | 21845 | 1 | 172 | -21846 |\n| 36 | 21845 | 1 | 172 | 21845 |\n| 36+ | -21846 | 1 | 173 | 21845 |\n| 37 | -21846 | 1 | 173 | -21846 |\n| 37+ | -21846 | 0 | 168 | 21845 |\n| 38 | -21846 | 0 | 168 | 21845 |\n| 38 | -21846 | 0 | 169 | 21845 |\n| 38 | -21846 | 0 | 170 | 21845 |\n| 38 | -21846 | 0 | 171 | 21845 |\n| 38 | -21846 | 0 | 172 | 21845 |\n| 38 | -21846 | 0 | 173 | -21846 |\n| 38 | -21846 | 0 | 174 | 21845 |\n| 38 | -21846 | 0 | 175 | 21845 |\n| 38+ | 21845 | 1 | 173 | -21846 |\n| 39 | 21845 | 1 | 173 | 21845 |\n| 39+ | -21846 | 1 | 174 | 21845 |\n| 40 | -21846 | 1 | 174 | -21846 |\n| 40+ | -21846 | 0 | 168 | 21845 |\n| 41 | -21846 | 0 | 168 | 21845 |\n| 41 | -21846 | 0 | 169 | 21845 |\n| 41 | -21846 | 0 | 170 | 21845 |\n| 41 | -21846 | 0 | 171 | 21845 |\n| 41 | -21846 | 0 | 172 | 21845 |\n| 41 | -21846 | 0 | 173 | 21845 |\n| 41 | -21846 | 0 | 174 | -21846 |\n| 41 | -21846 | 0 | 175 | 21845 |\n| 41+ | 21845 | 1 | 174 | -21846 |\n| 42 | 21845 | 1 | 174 | 21845 |\n| 42+ | -21846 | 1 | 175 | 21845 |\n| 43 | -21846 | 1 | 175 | -21846 |\n| 43+ | -21846 | 0 | 168 | 21845 |\n| 44 | -21846 | 0 | 168 | 21845 |\n| 44 | -21846 | 0 | 169 | 21845 |\n| 44 | -21846 | 0 | 170 | 21845 |\n| 44 | -21846 | 0 | 171 | 21845 |\n| 44 | -21846 | 0 | 172 | 21845 |\n| 44 | -21846 | 0 | 173 | 21845 |\n| 44 | -21846 | 0 | 174 | 21845 |\n| 44 | -21846 | 0 | 175 | -21846 |\n| 44+ | 21845 | 1 | 175 | -21846 |\n| 45 | 21845 | 1 | 175 | 21845 |\n| 45+ | 21845 | 0 | 168 | 21845 |\n| 46 | 21845 | 0 | 168 | 21845 |\n| 46 | 21845 | 0 | 169 | 21845 |\n| 46 | 21845 | 0 | 170 | 21845 |\n| 46 | 21845 | 0 | 171 | 21845 |\n| 46 | 21845 | 0 | 172 | 21845 |\n| 46 | 21845 | 0 | 173 | 21845 |\n| 46 | 21845 | 0 | 174 | 21845 |\n| 46 | 21845 | 0 | 175 | 21845 |\n| 46+ | 21845 | 0 | 42 | 0 |\n| 47 | 21845 | 0 | 42 | 0 |\n| 47 | 21845 | 0 | 106 | 0 |\n| 47 | 21845 | 0 | 170 | 21845 |\n| 47 | 21845 | 0 | 234 | 0 |\n| 47 | 21845 | 0 | 298 | 0 |\n| 47 | 21845 | 0 | 362 | 0 |\n| 47 | 21845 | 0 | 426 | 0 |\n| 47 | 21845 | 0 | 490 | 0 |\n| 47+ | 21845 | 1 | 42 | 0 |\n| 48 | 21845 | 1 | 42 | 21845 |\n| 48+ | 21845 | 1 | 106 | 0 |\n| 49 | 21845 | 1 | 106 | 21845 |\n| 49+ | 21845 | 1 | 170 | 21845 |\n| 50 | 21845 | 1 | 170 | 21845 |\n| 50+ | 21845 | 1 | 234 | 0 |\n| 51 | 21845 | 1 | 234 | 21845 |\n| 51+ | 21845 | 1 | 298 | 0 |\n| 52 | 21845 | 1 | 298 | 21845 |\n| 52+ | 21845 | 1 | 362 | 0 |\n| 53 | 21845 | 1 | 362 | 21845 |\n| 53+ | 21845 | 1 | 426 | 0 |\n| 54 | 21845 | 1 | 426 | 21845 |\n| 54+ | 21845 | 1 | 490 | 0 |\n| 55 | 21845 | 1 | 490 | 21845 |\n| 55+ | 21845 | 0 | 42 | 21845 |\n| 56 | 21845 | 0 | 42 | 21845 |\n| 56 | 21845 | 0 | 106 | 21845 |\n| 56 | 21845 | 0 | 170 | 21845 |\n| 56 | 21845 | 0 | 234 | 21845 |\n| 56 | 21845 | 0 | 298 | 21845 |\n| 56 | 21845 | 0 | 362 | 21845 |\n| 56 | 21845 | 0 | 426 | 21845 |\n| 56 | 21845 | 0 | 490 | 21845 |\n| 56+ | -21846 | 1 | 42 | 21845 |\n| 57 | -21846 | 1 | 42 | -21846 |\n| 57+ | -21846 | 0 | 42 | -21846 |\n| 58 | -21846 | 0 | 42 | -21846 |\n| 58 | -21846 | 0 | 106 | 21845 |\n| 58 | -21846 | 0 | 170 | 21845 |\n| 58 | -21846 | 0 | 234 | 21845 |\n| 58 | -21846 | 0 | 298 | 21845 |\n| 58 | -21846 | 0 | 362 | 21845 |\n| 58 | -21846 | 0 | 426 | 21845 |\n| 58 | -21846 | 0 | 490 | 21845 |\n| 58+ | 21845 | 1 | 42 | -21846 |\n| 59 | 21845 | 1 | 42 | 21845 |\n| 59+ | -21846 | 1 | 106 | 21845 |\n| 60 | -21846 | 1 | 106 | -21846 |\n| 60+ | -21846 | 0 | 42 | 21845 |\n| 61 | -21846 | 0 | 42 | 21845 |\n| 61 | -21846 | 0 | 106 | -21846 |\n| 61 | -21846 | 0 | 170 | 21845 |\n| 61 | -21846 | 0 | 234 | 21845 |\n| 61 | -21846 | 0 | 298 | 21845 |\n| 61 | -21846 | 0 | 362 | 21845 |\n| 61 | -21846 | 0 | 426 | 21845 |\n| 61 | -21846 | 0 | 490 | 21845 |\n| 61+ | 21845 | 1 | 106 | -21846 |\n| 62 | 21845 | 1 | 106 | 21845 |\n| 62+ | -21846 | 1 | 170 | 21845 |\n| 63 | -21846 | 1 | 170 | -21846 |\n| 63+ | -21846 | 0 | 42 | 21845 |\n| 64 | -21846 | 0 | 42 | 21845 |\n| 64 | -21846 | 0 | 106 | 21845 |\n| 64 | -21846 | 0 | 170 | -21846 |\n| 64 | -21846 | 0 | 234 | 21845 |\n| 64 | -21846 | 0 | 298 | 21845 |\n| 64 | -21846 | 0 | 362 | 21845 |\n| 64 | -21846 | 0 | 426 | 21845 |\n| 64 | -21846 | 0 | 490 | 21845 |\n| 64+ | 21845 | 1 | 170 | -21846 |\n| 65 | 21845 | 1 | 170 | 21845 |\n| 65+ | -21846 | 1 | 234 | 21845 |\n| 66 | -21846 | 1 | 234 | -21846 |\n| 66+ | -21846 | 0 | 42 | 21845 |\n| 67 | -21846 | 0 | 42 | 21845 |\n| 67 | -21846 | 0 | 106 | 21845 |\n| 67 | -21846 | 0 | 170 | 21845 |\n| 67 | -21846 | 0 | 234 | -21846 |\n| 67 | -21846 | 0 | 298 | 21845 |\n| 67 | -21846 | 0 | 362 | 21845 |\n| 67 | -21846 | 0 | 426 | 21845 |\n| 67 | -21846 | 0 | 490 | 21845 |\n| 67+ | 21845 | 1 | 234 | -21846 |\n| 68 | 21845 | 1 | 234 | 21845 |\n| 68+ | -21846 | 1 | 298 | 21845 |\n| 69 | -21846 | 1 | 298 | -21846 |\n| 69+ | -21846 | 0 | 42 | 21845 |\n| 70 | -21846 | 0 | 42 | 21845 |\n| 70 | -21846 | 0 | 106 | 21845 |\n| 70 | -21846 | 0 | 170 | 21845 |\n| 70 | -21846 | 0 | 234 | 21845 |\n| 70 | -21846 | 0 | 298 | -21846 |\n| 70 | -21846 | 0 | 362 | 21845 |\n| 70 | -21846 | 0 | 426 | 21845 |\n| 70 | -21846 | 0 | 490 | 21845 |\n| 70+ | 21845 | 1 | 298 | -21846 |\n| 71 | 21845 | 1 | 298 | 21845 |\n| 71+ | -21846 | 1 | 362 | 21845 |\n| 72 | -21846 | 1 | 362 | -21846 |\n| 72+ | -21846 | 0 | 42 | 21845 |\n| 73 | -21846 | 0 | 42 | 21845 |\n| 73 | -21846 | 0 | 106 | 21845 |\n| 73 | -21846 | 0 | 170 | 21845 |\n| 73 | -21846 | 0 | 234 | 21845 |\n| 73 | -21846 | 0 | 298 | 21845 |\n| 73 | -21846 | 0 | 362 | -21846 |\n| 73 | -21846 | 0 | 426 | 21845 |\n| 73 | -21846 | 0 | 490 | 21845 |\n| 73+ | 21845 | 1 | 362 | -21846 |\n| 74 | 21845 | 1 | 362 | 21845 |\n| 74+ | -21846 | 1 | 426 | 21845 |\n| 75 | -21846 | 1 | 426 | -21846 |\n| 75+ | -21846 | 0 | 42 | 21845 |\n| 76 | -21846 | 0 | 42 | 21845 |\n| 76 | -21846 | 0 | 106 | 21845 |\n| 76 | -21846 | 0 | 170 | 21845 |\n| 76 | -21846 | 0 | 234 | 21845 |\n| 76 | -21846 | 0 | 298 | 21845 |\n| 76 | -21846 | 0 | 362 | 21845 |\n| 76 | -21846 | 0 | 426 | -21846 |\n| 76 | -21846 | 0 | 490 | 21845 |\n| 76+ | 21845 | 1 | 426 | -21846 |\n| 77 | 21845 | 1 | 426 | 21845 |\n| 77+ | -21846 | 1 | 490 | 21845 |\n| 78 | -21846 | 1 | 490 | -21846 |\n| 78+ | -21846 | 0 | 42 | 21845 |\n| 79 | -21846 | 0 | 42 | 21845 |\n| 79 | -21846 | 0 | 106 | 21845 |\n| 79 | -21846 | 0 | 170 | 21845 |\n| 79 | -21846 | 0 | 234 | 21845 |\n| 79 | -21846 | 0 | 298 | 21845 |\n| 79 | -21846 | 0 | 362 | 21845 |\n| 79 | -21846 | 0 | 426 | 21845 |\n| 79 | -21846 | 0 | 490 | -21846 |\n| 79+ | 21845 | 1 | 490 | -21846 |\n| 80 | 21845 | 1 | 490 | 21845 |\n| 80+ | 21845 | 0 | 42 | 21845 |\n| 81 | 21845 | 0 | 42 | 21845 |\n| 81 | 21845 | 0 | 106 | 21845 |\n| 81 | 21845 | 0 | 170 | 21845 |\n| 81 | 21845 | 0 | 234 | 21845 |\n| 81 | 21845 | 0 | 298 | 21845 |\n| 81 | 21845 | 0 | 362 | 21845 |\n| 81 | 21845 | 0 | 426 | 21845 |\n| 81 | 21845 | 0 | 490 | 21845 |"},RAM4K:{"RAM4K.hdl":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/3/b/RAM4K.hdl\n/**\n * Memory of 4K 16-bit registers.\n * If load is asserted, the value of the register selected by\n * address is set to in; Otherwise, the value does not change.\n * The value of the selected register is emitted by out.\n */\nCHIP RAM4K {\n IN in[16], load, address[12];\n OUT out[16];\n\n PARTS:\n //// Replace this comment with your code.\n}',"RAM4K.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/3/b/RAM4K.tst\n\noutput-list time%S1.3.1 in%D1.6.1 load%B2.1.1 address%D2.4.2 out%D1.6.1;\n\nset in 0,\nset load 0,\nset address 0,\ntick,\noutput;\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\ntock,\noutput;\n\nset in 1111,\nset load 0,\ntick,\noutput;\ntock,\noutput;\n\nset load 1,\nset address 1111,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address 0,\ntick,\noutput;\ntock,\noutput;\n\nset in 3513,\nset address 3513,\ntick,\noutput;\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\ntick,\noutput;\ntock,\noutput;\n\nset address 1111,\neval,\noutput;\n\nset in 4095,\ntick,\noutput;\ntock,\noutput;\n\nset load 1,\nset address 4095,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\ntick,\noutput;\ntock,\noutput;\n\nset address 3513,\neval,\noutput;\n\nset address 4095,\neval,\noutput;\n\n\nset load 0,\nset address %B101010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B101010101001,\neval,\noutput;\nset address %B101010101010,\neval,\noutput;\nset address %B101010101011,\neval,\noutput;\nset address %B101010101100,\neval,\noutput;\nset address %B101010101101,\neval,\noutput;\nset address %B101010101110,\neval,\noutput;\nset address %B101010101111,\neval,\noutput;\n\nset load 1,\nset in %B0101010101010101,\nset address %B101010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B101010101001,\ntick,\noutput,\ntock,\noutput;\nset address %B101010101010,\ntick,\noutput,\ntock,\noutput;\nset address %B101010101011,\ntick,\noutput,\ntock,\noutput;\nset address %B101010101100,\ntick,\noutput,\ntock,\noutput;\nset address %B101010101101,\ntick,\noutput,\ntock,\noutput;\nset address %B101010101110,\ntick,\noutput,\ntock,\noutput;\nset address %B101010101111,\ntick,\noutput,\ntock,\noutput;\n\nset load 0,\nset address %B101010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B101010101001,\neval,\noutput;\nset address %B101010101010,\neval,\noutput;\nset address %B101010101011,\neval,\noutput;\nset address %B101010101100,\neval,\noutput;\nset address %B101010101101,\neval,\noutput;\nset address %B101010101110,\neval,\noutput;\nset address %B101010101111,\neval,\noutput;\n\nset load 1,\nset address %B101010101000,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B101010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B101010101001,\neval,\noutput;\nset address %B101010101010,\neval,\noutput;\nset address %B101010101011,\neval,\noutput;\nset address %B101010101100,\neval,\noutput;\nset address %B101010101101,\neval,\noutput;\nset address %B101010101110,\neval,\noutput;\nset address %B101010101111,\neval,\noutput;\n\nset load 1,\nset address %B101010101000,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B101010101001,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B101010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B101010101001,\neval,\noutput;\nset address %B101010101010,\neval,\noutput;\nset address %B101010101011,\neval,\noutput;\nset address %B101010101100,\neval,\noutput;\nset address %B101010101101,\neval,\noutput;\nset address %B101010101110,\neval,\noutput;\nset address %B101010101111,\neval,\noutput;\n\nset load 1,\nset address %B101010101001,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B101010101010,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B101010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B101010101001,\neval,\noutput;\nset address %B101010101010,\neval,\noutput;\nset address %B101010101011,\neval,\noutput;\nset address %B101010101100,\neval,\noutput;\nset address %B101010101101,\neval,\noutput;\nset address %B101010101110,\neval,\noutput;\nset address %B101010101111,\neval,\noutput;\n\nset load 1,\nset address %B101010101010,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B101010101011,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B101010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B101010101001,\neval,\noutput;\nset address %B101010101010,\neval,\noutput;\nset address %B101010101011,\neval,\noutput;\nset address %B101010101100,\neval,\noutput;\nset address %B101010101101,\neval,\noutput;\nset address %B101010101110,\neval,\noutput;\nset address %B101010101111,\neval,\noutput;\n\nset load 1,\nset address %B101010101011,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B101010101100,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B101010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B101010101001,\neval,\noutput;\nset address %B101010101010,\neval,\noutput;\nset address %B101010101011,\neval,\noutput;\nset address %B101010101100,\neval,\noutput;\nset address %B101010101101,\neval,\noutput;\nset address %B101010101110,\neval,\noutput;\nset address %B101010101111,\neval,\noutput;\n\nset load 1,\nset address %B101010101100,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B101010101101,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B101010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B101010101001,\neval,\noutput;\nset address %B101010101010,\neval,\noutput;\nset address %B101010101011,\neval,\noutput;\nset address %B101010101100,\neval,\noutput;\nset address %B101010101101,\neval,\noutput;\nset address %B101010101110,\neval,\noutput;\nset address %B101010101111,\neval,\noutput;\n\nset load 1,\nset address %B101010101101,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B101010101110,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B101010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B101010101001,\neval,\noutput;\nset address %B101010101010,\neval,\noutput;\nset address %B101010101011,\neval,\noutput;\nset address %B101010101100,\neval,\noutput;\nset address %B101010101101,\neval,\noutput;\nset address %B101010101110,\neval,\noutput;\nset address %B101010101111,\neval,\noutput;\n\nset load 1,\nset address %B101010101110,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B101010101111,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B101010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B101010101001,\neval,\noutput;\nset address %B101010101010,\neval,\noutput;\nset address %B101010101011,\neval,\noutput;\nset address %B101010101100,\neval,\noutput;\nset address %B101010101101,\neval,\noutput;\nset address %B101010101110,\neval,\noutput;\nset address %B101010101111,\neval,\noutput;\n\nset load 1,\nset address %B101010101111,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\n\nset load 0,\nset address %B101010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B101010101001,\neval,\noutput;\nset address %B101010101010,\neval,\noutput;\nset address %B101010101011,\neval,\noutput;\nset address %B101010101100,\neval,\noutput;\nset address %B101010101101,\neval,\noutput;\nset address %B101010101110,\neval,\noutput;\nset address %B101010101111,\neval,\noutput;\n\n\nset load 0,\nset address %B000101010101,\ntick,\noutput;\ntock,\noutput;\nset address %B001101010101,\neval,\noutput;\nset address %B010101010101,\neval,\noutput;\nset address %B011101010101,\neval,\noutput;\nset address %B100101010101,\neval,\noutput;\nset address %B101101010101,\neval,\noutput;\nset address %B110101010101,\neval,\noutput;\nset address %B111101010101,\neval,\noutput;\n\nset load 1,\nset in %B0101010101010101,\nset address %B000101010101,\ntick,\noutput;\ntock,\noutput;\nset address %B001101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B011101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B100101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B101101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B110101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B111101010101,\ntick,\noutput,\ntock,\noutput;\n\nset load 0,\nset address %B000101010101,\ntick,\noutput;\ntock,\noutput;\nset address %B001101010101,\neval,\noutput;\nset address %B010101010101,\neval,\noutput;\nset address %B011101010101,\neval,\noutput;\nset address %B100101010101,\neval,\noutput;\nset address %B101101010101,\neval,\noutput;\nset address %B110101010101,\neval,\noutput;\nset address %B111101010101,\neval,\noutput;\n\nset load 1,\nset address %B000101010101,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B000101010101,\ntick,\noutput;\ntock,\noutput;\nset address %B001101010101,\neval,\noutput;\nset address %B010101010101,\neval,\noutput;\nset address %B011101010101,\neval,\noutput;\nset address %B100101010101,\neval,\noutput;\nset address %B101101010101,\neval,\noutput;\nset address %B110101010101,\neval,\noutput;\nset address %B111101010101,\neval,\noutput;\n\nset load 1,\nset address %B000101010101,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B001101010101,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B000101010101,\ntick,\noutput;\ntock,\noutput;\nset address %B001101010101,\neval,\noutput;\nset address %B010101010101,\neval,\noutput;\nset address %B011101010101,\neval,\noutput;\nset address %B100101010101,\neval,\noutput;\nset address %B101101010101,\neval,\noutput;\nset address %B110101010101,\neval,\noutput;\nset address %B111101010101,\neval,\noutput;\n\nset load 1,\nset address %B001101010101,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B010101010101,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B000101010101,\ntick,\noutput;\ntock,\noutput;\nset address %B001101010101,\neval,\noutput;\nset address %B010101010101,\neval,\noutput;\nset address %B011101010101,\neval,\noutput;\nset address %B100101010101,\neval,\noutput;\nset address %B101101010101,\neval,\noutput;\nset address %B110101010101,\neval,\noutput;\nset address %B111101010101,\neval,\noutput;\n\nset load 1,\nset address %B010101010101,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B011101010101,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B000101010101,\ntick,\noutput;\ntock,\noutput;\nset address %B001101010101,\neval,\noutput;\nset address %B010101010101,\neval,\noutput;\nset address %B011101010101,\neval,\noutput;\nset address %B100101010101,\neval,\noutput;\nset address %B101101010101,\neval,\noutput;\nset address %B110101010101,\neval,\noutput;\nset address %B111101010101,\neval,\noutput;\n\nset load 1,\nset address %B011101010101,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B100101010101,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B000101010101,\ntick,\noutput;\ntock,\noutput;\nset address %B001101010101,\neval,\noutput;\nset address %B010101010101,\neval,\noutput;\nset address %B011101010101,\neval,\noutput;\nset address %B100101010101,\neval,\noutput;\nset address %B101101010101,\neval,\noutput;\nset address %B110101010101,\neval,\noutput;\nset address %B111101010101,\neval,\noutput;\n\nset load 1,\nset address %B100101010101,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B101101010101,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B000101010101,\ntick,\noutput;\ntock,\noutput;\nset address %B001101010101,\neval,\noutput;\nset address %B010101010101,\neval,\noutput;\nset address %B011101010101,\neval,\noutput;\nset address %B100101010101,\neval,\noutput;\nset address %B101101010101,\neval,\noutput;\nset address %B110101010101,\neval,\noutput;\nset address %B111101010101,\neval,\noutput;\n\nset load 1,\nset address %B101101010101,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B110101010101,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B000101010101,\ntick,\noutput;\ntock,\noutput;\nset address %B001101010101,\neval,\noutput;\nset address %B010101010101,\neval,\noutput;\nset address %B011101010101,\neval,\noutput;\nset address %B100101010101,\neval,\noutput;\nset address %B101101010101,\neval,\noutput;\nset address %B110101010101,\neval,\noutput;\nset address %B111101010101,\neval,\noutput;\n\nset load 1,\nset address %B110101010101,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B111101010101,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B000101010101,\ntick,\noutput;\ntock,\noutput;\nset address %B001101010101,\neval,\noutput;\nset address %B010101010101,\neval,\noutput;\nset address %B011101010101,\neval,\noutput;\nset address %B100101010101,\neval,\noutput;\nset address %B101101010101,\neval,\noutput;\nset address %B110101010101,\neval,\noutput;\nset address %B111101010101,\neval,\noutput;\n\nset load 1,\nset address %B111101010101,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\n\nset load 0,\nset address %B000101010101,\ntick,\noutput;\ntock,\noutput;\nset address %B001101010101,\neval,\noutput;\nset address %B010101010101,\neval,\noutput;\nset address %B011101010101,\neval,\noutput;\nset address %B100101010101,\neval,\noutput;\nset address %B101101010101,\neval,\noutput;\nset address %B110101010101,\neval,\noutput;\nset address %B111101010101,\neval,\noutput;',"RAM4K.cmp":"|time | in |load|address | out |\n| 0+ | 0 | 0 | 0 | 0 |\n| 1 | 0 | 0 | 0 | 0 |\n| 1+ | 0 | 1 | 0 | 0 |\n| 2 | 0 | 1 | 0 | 0 |\n| 2+ | 1111 | 0 | 0 | 0 |\n| 3 | 1111 | 0 | 0 | 0 |\n| 3+ | 1111 | 1 | 1111 | 0 |\n| 4 | 1111 | 1 | 1111 | 1111 |\n| 4+ | 1111 | 0 | 0 | 0 |\n| 5 | 1111 | 0 | 0 | 0 |\n| 5+ | 3513 | 0 | 3513 | 0 |\n| 6 | 3513 | 0 | 3513 | 0 |\n| 6+ | 3513 | 1 | 3513 | 0 |\n| 7 | 3513 | 1 | 3513 | 3513 |\n| 7+ | 3513 | 0 | 3513 | 3513 |\n| 8 | 3513 | 0 | 3513 | 3513 |\n| 8 | 3513 | 0 | 1111 | 1111 |\n| 8+ | 4095 | 0 | 1111 | 1111 |\n| 9 | 4095 | 0 | 1111 | 1111 |\n| 9+ | 4095 | 1 | 4095 | 0 |\n| 10 | 4095 | 1 | 4095 | 4095 |\n| 10+ | 4095 | 0 | 4095 | 4095 |\n| 11 | 4095 | 0 | 4095 | 4095 |\n| 11 | 4095 | 0 | 3513 | 3513 |\n| 11 | 4095 | 0 | 4095 | 4095 |\n| 11+ | 4095 | 0 | 2728 | 0 |\n| 12 | 4095 | 0 | 2728 | 0 |\n| 12 | 4095 | 0 | 2729 | 0 |\n| 12 | 4095 | 0 | 2730 | 0 |\n| 12 | 4095 | 0 | 2731 | 0 |\n| 12 | 4095 | 0 | 2732 | 0 |\n| 12 | 4095 | 0 | 2733 | 0 |\n| 12 | 4095 | 0 | 2734 | 0 |\n| 12 | 4095 | 0 | 2735 | 0 |\n| 12+ | 21845 | 1 | 2728 | 0 |\n| 13 | 21845 | 1 | 2728 | 21845 |\n| 13+ | 21845 | 1 | 2729 | 0 |\n| 14 | 21845 | 1 | 2729 | 21845 |\n| 14+ | 21845 | 1 | 2730 | 0 |\n| 15 | 21845 | 1 | 2730 | 21845 |\n| 15+ | 21845 | 1 | 2731 | 0 |\n| 16 | 21845 | 1 | 2731 | 21845 |\n| 16+ | 21845 | 1 | 2732 | 0 |\n| 17 | 21845 | 1 | 2732 | 21845 |\n| 17+ | 21845 | 1 | 2733 | 0 |\n| 18 | 21845 | 1 | 2733 | 21845 |\n| 18+ | 21845 | 1 | 2734 | 0 |\n| 19 | 21845 | 1 | 2734 | 21845 |\n| 19+ | 21845 | 1 | 2735 | 0 |\n| 20 | 21845 | 1 | 2735 | 21845 |\n| 20+ | 21845 | 0 | 2728 | 21845 |\n| 21 | 21845 | 0 | 2728 | 21845 |\n| 21 | 21845 | 0 | 2729 | 21845 |\n| 21 | 21845 | 0 | 2730 | 21845 |\n| 21 | 21845 | 0 | 2731 | 21845 |\n| 21 | 21845 | 0 | 2732 | 21845 |\n| 21 | 21845 | 0 | 2733 | 21845 |\n| 21 | 21845 | 0 | 2734 | 21845 |\n| 21 | 21845 | 0 | 2735 | 21845 |\n| 21+ | -21846 | 1 | 2728 | 21845 |\n| 22 | -21846 | 1 | 2728 | -21846 |\n| 22+ | -21846 | 0 | 2728 | -21846 |\n| 23 | -21846 | 0 | 2728 | -21846 |\n| 23 | -21846 | 0 | 2729 | 21845 |\n| 23 | -21846 | 0 | 2730 | 21845 |\n| 23 | -21846 | 0 | 2731 | 21845 |\n| 23 | -21846 | 0 | 2732 | 21845 |\n| 23 | -21846 | 0 | 2733 | 21845 |\n| 23 | -21846 | 0 | 2734 | 21845 |\n| 23 | -21846 | 0 | 2735 | 21845 |\n| 23+ | 21845 | 1 | 2728 | -21846 |\n| 24 | 21845 | 1 | 2728 | 21845 |\n| 24+ | -21846 | 1 | 2729 | 21845 |\n| 25 | -21846 | 1 | 2729 | -21846 |\n| 25+ | -21846 | 0 | 2728 | 21845 |\n| 26 | -21846 | 0 | 2728 | 21845 |\n| 26 | -21846 | 0 | 2729 | -21846 |\n| 26 | -21846 | 0 | 2730 | 21845 |\n| 26 | -21846 | 0 | 2731 | 21845 |\n| 26 | -21846 | 0 | 2732 | 21845 |\n| 26 | -21846 | 0 | 2733 | 21845 |\n| 26 | -21846 | 0 | 2734 | 21845 |\n| 26 | -21846 | 0 | 2735 | 21845 |\n| 26+ | 21845 | 1 | 2729 | -21846 |\n| 27 | 21845 | 1 | 2729 | 21845 |\n| 27+ | -21846 | 1 | 2730 | 21845 |\n| 28 | -21846 | 1 | 2730 | -21846 |\n| 28+ | -21846 | 0 | 2728 | 21845 |\n| 29 | -21846 | 0 | 2728 | 21845 |\n| 29 | -21846 | 0 | 2729 | 21845 |\n| 29 | -21846 | 0 | 2730 | -21846 |\n| 29 | -21846 | 0 | 2731 | 21845 |\n| 29 | -21846 | 0 | 2732 | 21845 |\n| 29 | -21846 | 0 | 2733 | 21845 |\n| 29 | -21846 | 0 | 2734 | 21845 |\n| 29 | -21846 | 0 | 2735 | 21845 |\n| 29+ | 21845 | 1 | 2730 | -21846 |\n| 30 | 21845 | 1 | 2730 | 21845 |\n| 30+ | -21846 | 1 | 2731 | 21845 |\n| 31 | -21846 | 1 | 2731 | -21846 |\n| 31+ | -21846 | 0 | 2728 | 21845 |\n| 32 | -21846 | 0 | 2728 | 21845 |\n| 32 | -21846 | 0 | 2729 | 21845 |\n| 32 | -21846 | 0 | 2730 | 21845 |\n| 32 | -21846 | 0 | 2731 | -21846 |\n| 32 | -21846 | 0 | 2732 | 21845 |\n| 32 | -21846 | 0 | 2733 | 21845 |\n| 32 | -21846 | 0 | 2734 | 21845 |\n| 32 | -21846 | 0 | 2735 | 21845 |\n| 32+ | 21845 | 1 | 2731 | -21846 |\n| 33 | 21845 | 1 | 2731 | 21845 |\n| 33+ | -21846 | 1 | 2732 | 21845 |\n| 34 | -21846 | 1 | 2732 | -21846 |\n| 34+ | -21846 | 0 | 2728 | 21845 |\n| 35 | -21846 | 0 | 2728 | 21845 |\n| 35 | -21846 | 0 | 2729 | 21845 |\n| 35 | -21846 | 0 | 2730 | 21845 |\n| 35 | -21846 | 0 | 2731 | 21845 |\n| 35 | -21846 | 0 | 2732 | -21846 |\n| 35 | -21846 | 0 | 2733 | 21845 |\n| 35 | -21846 | 0 | 2734 | 21845 |\n| 35 | -21846 | 0 | 2735 | 21845 |\n| 35+ | 21845 | 1 | 2732 | -21846 |\n| 36 | 21845 | 1 | 2732 | 21845 |\n| 36+ | -21846 | 1 | 2733 | 21845 |\n| 37 | -21846 | 1 | 2733 | -21846 |\n| 37+ | -21846 | 0 | 2728 | 21845 |\n| 38 | -21846 | 0 | 2728 | 21845 |\n| 38 | -21846 | 0 | 2729 | 21845 |\n| 38 | -21846 | 0 | 2730 | 21845 |\n| 38 | -21846 | 0 | 2731 | 21845 |\n| 38 | -21846 | 0 | 2732 | 21845 |\n| 38 | -21846 | 0 | 2733 | -21846 |\n| 38 | -21846 | 0 | 2734 | 21845 |\n| 38 | -21846 | 0 | 2735 | 21845 |\n| 38+ | 21845 | 1 | 2733 | -21846 |\n| 39 | 21845 | 1 | 2733 | 21845 |\n| 39+ | -21846 | 1 | 2734 | 21845 |\n| 40 | -21846 | 1 | 2734 | -21846 |\n| 40+ | -21846 | 0 | 2728 | 21845 |\n| 41 | -21846 | 0 | 2728 | 21845 |\n| 41 | -21846 | 0 | 2729 | 21845 |\n| 41 | -21846 | 0 | 2730 | 21845 |\n| 41 | -21846 | 0 | 2731 | 21845 |\n| 41 | -21846 | 0 | 2732 | 21845 |\n| 41 | -21846 | 0 | 2733 | 21845 |\n| 41 | -21846 | 0 | 2734 | -21846 |\n| 41 | -21846 | 0 | 2735 | 21845 |\n| 41+ | 21845 | 1 | 2734 | -21846 |\n| 42 | 21845 | 1 | 2734 | 21845 |\n| 42+ | -21846 | 1 | 2735 | 21845 |\n| 43 | -21846 | 1 | 2735 | -21846 |\n| 43+ | -21846 | 0 | 2728 | 21845 |\n| 44 | -21846 | 0 | 2728 | 21845 |\n| 44 | -21846 | 0 | 2729 | 21845 |\n| 44 | -21846 | 0 | 2730 | 21845 |\n| 44 | -21846 | 0 | 2731 | 21845 |\n| 44 | -21846 | 0 | 2732 | 21845 |\n| 44 | -21846 | 0 | 2733 | 21845 |\n| 44 | -21846 | 0 | 2734 | 21845 |\n| 44 | -21846 | 0 | 2735 | -21846 |\n| 44+ | 21845 | 1 | 2735 | -21846 |\n| 45 | 21845 | 1 | 2735 | 21845 |\n| 45+ | 21845 | 0 | 2728 | 21845 |\n| 46 | 21845 | 0 | 2728 | 21845 |\n| 46 | 21845 | 0 | 2729 | 21845 |\n| 46 | 21845 | 0 | 2730 | 21845 |\n| 46 | 21845 | 0 | 2731 | 21845 |\n| 46 | 21845 | 0 | 2732 | 21845 |\n| 46 | 21845 | 0 | 2733 | 21845 |\n| 46 | 21845 | 0 | 2734 | 21845 |\n| 46 | 21845 | 0 | 2735 | 21845 |\n| 46+ | 21845 | 0 | 341 | 0 |\n| 47 | 21845 | 0 | 341 | 0 |\n| 47 | 21845 | 0 | 853 | 0 |\n| 47 | 21845 | 0 | 1365 | 0 |\n| 47 | 21845 | 0 | 1877 | 0 |\n| 47 | 21845 | 0 | 2389 | 0 |\n| 47 | 21845 | 0 | 2901 | 0 |\n| 47 | 21845 | 0 | 3413 | 0 |\n| 47 | 21845 | 0 | 3925 | 0 |\n| 47+ | 21845 | 1 | 341 | 0 |\n| 48 | 21845 | 1 | 341 | 21845 |\n| 48+ | 21845 | 1 | 853 | 0 |\n| 49 | 21845 | 1 | 853 | 21845 |\n| 49+ | 21845 | 1 | 1365 | 0 |\n| 50 | 21845 | 1 | 1365 | 21845 |\n| 50+ | 21845 | 1 | 1877 | 0 |\n| 51 | 21845 | 1 | 1877 | 21845 |\n| 51+ | 21845 | 1 | 2389 | 0 |\n| 52 | 21845 | 1 | 2389 | 21845 |\n| 52+ | 21845 | 1 | 2901 | 0 |\n| 53 | 21845 | 1 | 2901 | 21845 |\n| 53+ | 21845 | 1 | 3413 | 0 |\n| 54 | 21845 | 1 | 3413 | 21845 |\n| 54+ | 21845 | 1 | 3925 | 0 |\n| 55 | 21845 | 1 | 3925 | 21845 |\n| 55+ | 21845 | 0 | 341 | 21845 |\n| 56 | 21845 | 0 | 341 | 21845 |\n| 56 | 21845 | 0 | 853 | 21845 |\n| 56 | 21845 | 0 | 1365 | 21845 |\n| 56 | 21845 | 0 | 1877 | 21845 |\n| 56 | 21845 | 0 | 2389 | 21845 |\n| 56 | 21845 | 0 | 2901 | 21845 |\n| 56 | 21845 | 0 | 3413 | 21845 |\n| 56 | 21845 | 0 | 3925 | 21845 |\n| 56+ | -21846 | 1 | 341 | 21845 |\n| 57 | -21846 | 1 | 341 | -21846 |\n| 57+ | -21846 | 0 | 341 | -21846 |\n| 58 | -21846 | 0 | 341 | -21846 |\n| 58 | -21846 | 0 | 853 | 21845 |\n| 58 | -21846 | 0 | 1365 | 21845 |\n| 58 | -21846 | 0 | 1877 | 21845 |\n| 58 | -21846 | 0 | 2389 | 21845 |\n| 58 | -21846 | 0 | 2901 | 21845 |\n| 58 | -21846 | 0 | 3413 | 21845 |\n| 58 | -21846 | 0 | 3925 | 21845 |\n| 58+ | 21845 | 1 | 341 | -21846 |\n| 59 | 21845 | 1 | 341 | 21845 |\n| 59+ | -21846 | 1 | 853 | 21845 |\n| 60 | -21846 | 1 | 853 | -21846 |\n| 60+ | -21846 | 0 | 341 | 21845 |\n| 61 | -21846 | 0 | 341 | 21845 |\n| 61 | -21846 | 0 | 853 | -21846 |\n| 61 | -21846 | 0 | 1365 | 21845 |\n| 61 | -21846 | 0 | 1877 | 21845 |\n| 61 | -21846 | 0 | 2389 | 21845 |\n| 61 | -21846 | 0 | 2901 | 21845 |\n| 61 | -21846 | 0 | 3413 | 21845 |\n| 61 | -21846 | 0 | 3925 | 21845 |\n| 61+ | 21845 | 1 | 853 | -21846 |\n| 62 | 21845 | 1 | 853 | 21845 |\n| 62+ | -21846 | 1 | 1365 | 21845 |\n| 63 | -21846 | 1 | 1365 | -21846 |\n| 63+ | -21846 | 0 | 341 | 21845 |\n| 64 | -21846 | 0 | 341 | 21845 |\n| 64 | -21846 | 0 | 853 | 21845 |\n| 64 | -21846 | 0 | 1365 | -21846 |\n| 64 | -21846 | 0 | 1877 | 21845 |\n| 64 | -21846 | 0 | 2389 | 21845 |\n| 64 | -21846 | 0 | 2901 | 21845 |\n| 64 | -21846 | 0 | 3413 | 21845 |\n| 64 | -21846 | 0 | 3925 | 21845 |\n| 64+ | 21845 | 1 | 1365 | -21846 |\n| 65 | 21845 | 1 | 1365 | 21845 |\n| 65+ | -21846 | 1 | 1877 | 21845 |\n| 66 | -21846 | 1 | 1877 | -21846 |\n| 66+ | -21846 | 0 | 341 | 21845 |\n| 67 | -21846 | 0 | 341 | 21845 |\n| 67 | -21846 | 0 | 853 | 21845 |\n| 67 | -21846 | 0 | 1365 | 21845 |\n| 67 | -21846 | 0 | 1877 | -21846 |\n| 67 | -21846 | 0 | 2389 | 21845 |\n| 67 | -21846 | 0 | 2901 | 21845 |\n| 67 | -21846 | 0 | 3413 | 21845 |\n| 67 | -21846 | 0 | 3925 | 21845 |\n| 67+ | 21845 | 1 | 1877 | -21846 |\n| 68 | 21845 | 1 | 1877 | 21845 |\n| 68+ | -21846 | 1 | 2389 | 21845 |\n| 69 | -21846 | 1 | 2389 | -21846 |\n| 69+ | -21846 | 0 | 341 | 21845 |\n| 70 | -21846 | 0 | 341 | 21845 |\n| 70 | -21846 | 0 | 853 | 21845 |\n| 70 | -21846 | 0 | 1365 | 21845 |\n| 70 | -21846 | 0 | 1877 | 21845 |\n| 70 | -21846 | 0 | 2389 | -21846 |\n| 70 | -21846 | 0 | 2901 | 21845 |\n| 70 | -21846 | 0 | 3413 | 21845 |\n| 70 | -21846 | 0 | 3925 | 21845 |\n| 70+ | 21845 | 1 | 2389 | -21846 |\n| 71 | 21845 | 1 | 2389 | 21845 |\n| 71+ | -21846 | 1 | 2901 | 21845 |\n| 72 | -21846 | 1 | 2901 | -21846 |\n| 72+ | -21846 | 0 | 341 | 21845 |\n| 73 | -21846 | 0 | 341 | 21845 |\n| 73 | -21846 | 0 | 853 | 21845 |\n| 73 | -21846 | 0 | 1365 | 21845 |\n| 73 | -21846 | 0 | 1877 | 21845 |\n| 73 | -21846 | 0 | 2389 | 21845 |\n| 73 | -21846 | 0 | 2901 | -21846 |\n| 73 | -21846 | 0 | 3413 | 21845 |\n| 73 | -21846 | 0 | 3925 | 21845 |\n| 73+ | 21845 | 1 | 2901 | -21846 |\n| 74 | 21845 | 1 | 2901 | 21845 |\n| 74+ | -21846 | 1 | 3413 | 21845 |\n| 75 | -21846 | 1 | 3413 | -21846 |\n| 75+ | -21846 | 0 | 341 | 21845 |\n| 76 | -21846 | 0 | 341 | 21845 |\n| 76 | -21846 | 0 | 853 | 21845 |\n| 76 | -21846 | 0 | 1365 | 21845 |\n| 76 | -21846 | 0 | 1877 | 21845 |\n| 76 | -21846 | 0 | 2389 | 21845 |\n| 76 | -21846 | 0 | 2901 | 21845 |\n| 76 | -21846 | 0 | 3413 | -21846 |\n| 76 | -21846 | 0 | 3925 | 21845 |\n| 76+ | 21845 | 1 | 3413 | -21846 |\n| 77 | 21845 | 1 | 3413 | 21845 |\n| 77+ | -21846 | 1 | 3925 | 21845 |\n| 78 | -21846 | 1 | 3925 | -21846 |\n| 78+ | -21846 | 0 | 341 | 21845 |\n| 79 | -21846 | 0 | 341 | 21845 |\n| 79 | -21846 | 0 | 853 | 21845 |\n| 79 | -21846 | 0 | 1365 | 21845 |\n| 79 | -21846 | 0 | 1877 | 21845 |\n| 79 | -21846 | 0 | 2389 | 21845 |\n| 79 | -21846 | 0 | 2901 | 21845 |\n| 79 | -21846 | 0 | 3413 | 21845 |\n| 79 | -21846 | 0 | 3925 | -21846 |\n| 79+ | 21845 | 1 | 3925 | -21846 |\n| 80 | 21845 | 1 | 3925 | 21845 |\n| 80+ | 21845 | 0 | 341 | 21845 |\n| 81 | 21845 | 0 | 341 | 21845 |\n| 81 | 21845 | 0 | 853 | 21845 |\n| 81 | 21845 | 0 | 1365 | 21845 |\n| 81 | 21845 | 0 | 1877 | 21845 |\n| 81 | 21845 | 0 | 2389 | 21845 |\n| 81 | 21845 | 0 | 2901 | 21845 |\n| 81 | 21845 | 0 | 3413 | 21845 |\n| 81 | 21845 | 0 | 3925 | 21845 |"},RAM16K:{"RAM16K.hdl":y,"RAM16K.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/3/b/RAM16K.tst\n\noutput-list time%S1.3.1 in%D1.6.1 load%B2.1.1 address%D2.5.2 out%D1.6.1;\n\nset in 0,\nset load 0,\nset address 0,\ntick,\noutput;\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\ntock,\noutput;\n\nset in 4321,\nset load 0,\ntick,\noutput;\ntock,\noutput;\n\nset load 1,\nset address 4321,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address 0,\ntick,\noutput;\ntock,\noutput;\n\nset in 12345,\nset address 12345,\ntick,\noutput;\ntock,\noutput;\n\nset load 1,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\ntick,\noutput;\ntock,\noutput;\n\nset address 4321,\neval,\noutput;\n\nset in 16383,\ntick,\noutput;\ntock,\noutput;\n\nset load 1,\nset address 16383,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\ntick,\noutput;\ntock,\noutput;\n\nset address 12345,\neval,\noutput;\n\nset address 16383,\neval,\noutput;\n\n\nset load 0,\nset address %B10101010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B10101010101001,\neval,\noutput;\nset address %B10101010101010,\neval,\noutput;\nset address %B10101010101011,\neval,\noutput;\nset address %B10101010101100,\neval,\noutput;\nset address %B10101010101101,\neval,\noutput;\nset address %B10101010101110,\neval,\noutput;\nset address %B10101010101111,\neval,\noutput;\n\nset load 1,\nset in %B0101010101010101,\nset address %B10101010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B10101010101001,\ntick,\noutput,\ntock,\noutput;\nset address %B10101010101010,\ntick,\noutput,\ntock,\noutput;\nset address %B10101010101011,\ntick,\noutput,\ntock,\noutput;\nset address %B10101010101100,\ntick,\noutput,\ntock,\noutput;\nset address %B10101010101101,\ntick,\noutput,\ntock,\noutput;\nset address %B10101010101110,\ntick,\noutput,\ntock,\noutput;\nset address %B10101010101111,\ntick,\noutput,\ntock,\noutput;\n\nset load 0,\nset address %B10101010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B10101010101001,\neval,\noutput;\nset address %B10101010101010,\neval,\noutput;\nset address %B10101010101011,\neval,\noutput;\nset address %B10101010101100,\neval,\noutput;\nset address %B10101010101101,\neval,\noutput;\nset address %B10101010101110,\neval,\noutput;\nset address %B10101010101111,\neval,\noutput;\n\nset load 1,\nset address %B10101010101000,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B10101010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B10101010101001,\neval,\noutput;\nset address %B10101010101010,\neval,\noutput;\nset address %B10101010101011,\neval,\noutput;\nset address %B10101010101100,\neval,\noutput;\nset address %B10101010101101,\neval,\noutput;\nset address %B10101010101110,\neval,\noutput;\nset address %B10101010101111,\neval,\noutput;\n\nset load 1,\nset address %B10101010101000,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B10101010101001,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B10101010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B10101010101001,\neval,\noutput;\nset address %B10101010101010,\neval,\noutput;\nset address %B10101010101011,\neval,\noutput;\nset address %B10101010101100,\neval,\noutput;\nset address %B10101010101101,\neval,\noutput;\nset address %B10101010101110,\neval,\noutput;\nset address %B10101010101111,\neval,\noutput;\n\nset load 1,\nset address %B10101010101001,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B10101010101010,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B10101010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B10101010101001,\neval,\noutput;\nset address %B10101010101010,\neval,\noutput;\nset address %B10101010101011,\neval,\noutput;\nset address %B10101010101100,\neval,\noutput;\nset address %B10101010101101,\neval,\noutput;\nset address %B10101010101110,\neval,\noutput;\nset address %B10101010101111,\neval,\noutput;\n\nset load 1,\nset address %B10101010101010,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B10101010101011,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B10101010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B10101010101001,\neval,\noutput;\nset address %B10101010101010,\neval,\noutput;\nset address %B10101010101011,\neval,\noutput;\nset address %B10101010101100,\neval,\noutput;\nset address %B10101010101101,\neval,\noutput;\nset address %B10101010101110,\neval,\noutput;\nset address %B10101010101111,\neval,\noutput;\n\nset load 1,\nset address %B10101010101011,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B10101010101100,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B10101010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B10101010101001,\neval,\noutput;\nset address %B10101010101010,\neval,\noutput;\nset address %B10101010101011,\neval,\noutput;\nset address %B10101010101100,\neval,\noutput;\nset address %B10101010101101,\neval,\noutput;\nset address %B10101010101110,\neval,\noutput;\nset address %B10101010101111,\neval,\noutput;\n\nset load 1,\nset address %B10101010101100,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B10101010101101,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B10101010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B10101010101001,\neval,\noutput;\nset address %B10101010101010,\neval,\noutput;\nset address %B10101010101011,\neval,\noutput;\nset address %B10101010101100,\neval,\noutput;\nset address %B10101010101101,\neval,\noutput;\nset address %B10101010101110,\neval,\noutput;\nset address %B10101010101111,\neval,\noutput;\n\nset load 1,\nset address %B10101010101101,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B10101010101110,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B10101010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B10101010101001,\neval,\noutput;\nset address %B10101010101010,\neval,\noutput;\nset address %B10101010101011,\neval,\noutput;\nset address %B10101010101100,\neval,\noutput;\nset address %B10101010101101,\neval,\noutput;\nset address %B10101010101110,\neval,\noutput;\nset address %B10101010101111,\neval,\noutput;\n\nset load 1,\nset address %B10101010101110,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B10101010101111,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B10101010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B10101010101001,\neval,\noutput;\nset address %B10101010101010,\neval,\noutput;\nset address %B10101010101011,\neval,\noutput;\nset address %B10101010101100,\neval,\noutput;\nset address %B10101010101101,\neval,\noutput;\nset address %B10101010101110,\neval,\noutput;\nset address %B10101010101111,\neval,\noutput;\n\nset load 1,\nset address %B10101010101111,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\n\nset load 0,\nset address %B10101010101000,\ntick,\noutput;\ntock,\noutput;\nset address %B10101010101001,\neval,\noutput;\nset address %B10101010101010,\neval,\noutput;\nset address %B10101010101011,\neval,\noutput;\nset address %B10101010101100,\neval,\noutput;\nset address %B10101010101101,\neval,\noutput;\nset address %B10101010101110,\neval,\noutput;\nset address %B10101010101111,\neval,\noutput;\n\n\nset load 0,\nset address %B00010101010101,\ntick,\noutput;\ntock,\noutput;\nset address %B00110101010101,\neval,\noutput;\nset address %B01010101010101,\neval,\noutput;\nset address %B01110101010101,\neval,\noutput;\nset address %B10010101010101,\neval,\noutput;\nset address %B10110101010101,\neval,\noutput;\nset address %B11010101010101,\neval,\noutput;\nset address %B11110101010101,\neval,\noutput;\n\nset load 1,\nset in %B0101010101010101,\nset address %B00010101010101,\ntick,\noutput;\ntock,\noutput;\nset address %B00110101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B01010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B01110101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B10010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B10110101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B11010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B11110101010101,\ntick,\noutput,\ntock,\noutput;\n\nset load 0,\nset address %B00010101010101,\ntick,\noutput;\ntock,\noutput;\nset address %B00110101010101,\neval,\noutput;\nset address %B01010101010101,\neval,\noutput;\nset address %B01110101010101,\neval,\noutput;\nset address %B10010101010101,\neval,\noutput;\nset address %B10110101010101,\neval,\noutput;\nset address %B11010101010101,\neval,\noutput;\nset address %B11110101010101,\neval,\noutput;\n\nset load 1,\nset address %B00010101010101,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B00010101010101,\ntick,\noutput;\ntock,\noutput;\nset address %B00110101010101,\neval,\noutput;\nset address %B01010101010101,\neval,\noutput;\nset address %B01110101010101,\neval,\noutput;\nset address %B10010101010101,\neval,\noutput;\nset address %B10110101010101,\neval,\noutput;\nset address %B11010101010101,\neval,\noutput;\nset address %B11110101010101,\neval,\noutput;\n\nset load 1,\nset address %B00010101010101,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B00110101010101,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B00010101010101,\ntick,\noutput;\ntock,\noutput;\nset address %B00110101010101,\neval,\noutput;\nset address %B01010101010101,\neval,\noutput;\nset address %B01110101010101,\neval,\noutput;\nset address %B10010101010101,\neval,\noutput;\nset address %B10110101010101,\neval,\noutput;\nset address %B11010101010101,\neval,\noutput;\nset address %B11110101010101,\neval,\noutput;\n\nset load 1,\nset address %B00110101010101,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B01010101010101,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B00010101010101,\ntick,\noutput;\ntock,\noutput;\nset address %B00110101010101,\neval,\noutput;\nset address %B01010101010101,\neval,\noutput;\nset address %B01110101010101,\neval,\noutput;\nset address %B10010101010101,\neval,\noutput;\nset address %B10110101010101,\neval,\noutput;\nset address %B11010101010101,\neval,\noutput;\nset address %B11110101010101,\neval,\noutput;\n\nset load 1,\nset address %B01010101010101,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B01110101010101,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B00010101010101,\ntick,\noutput;\ntock,\noutput;\nset address %B00110101010101,\neval,\noutput;\nset address %B01010101010101,\neval,\noutput;\nset address %B01110101010101,\neval,\noutput;\nset address %B10010101010101,\neval,\noutput;\nset address %B10110101010101,\neval,\noutput;\nset address %B11010101010101,\neval,\noutput;\nset address %B11110101010101,\neval,\noutput;\n\nset load 1,\nset address %B01110101010101,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B10010101010101,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B00010101010101,\ntick,\noutput;\ntock,\noutput;\nset address %B00110101010101,\neval,\noutput;\nset address %B01010101010101,\neval,\noutput;\nset address %B01110101010101,\neval,\noutput;\nset address %B10010101010101,\neval,\noutput;\nset address %B10110101010101,\neval,\noutput;\nset address %B11010101010101,\neval,\noutput;\nset address %B11110101010101,\neval,\noutput;\n\nset load 1,\nset address %B10010101010101,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B10110101010101,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B00010101010101,\ntick,\noutput;\ntock,\noutput;\nset address %B00110101010101,\neval,\noutput;\nset address %B01010101010101,\neval,\noutput;\nset address %B01110101010101,\neval,\noutput;\nset address %B10010101010101,\neval,\noutput;\nset address %B10110101010101,\neval,\noutput;\nset address %B11010101010101,\neval,\noutput;\nset address %B11110101010101,\neval,\noutput;\n\nset load 1,\nset address %B10110101010101,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B11010101010101,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B00010101010101,\ntick,\noutput;\ntock,\noutput;\nset address %B00110101010101,\neval,\noutput;\nset address %B01010101010101,\neval,\noutput;\nset address %B01110101010101,\neval,\noutput;\nset address %B10010101010101,\neval,\noutput;\nset address %B10110101010101,\neval,\noutput;\nset address %B11010101010101,\neval,\noutput;\nset address %B11110101010101,\neval,\noutput;\n\nset load 1,\nset address %B11010101010101,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\nset address %B11110101010101,\nset in %B1010101010101010,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %B00010101010101,\ntick,\noutput;\ntock,\noutput;\nset address %B00110101010101,\neval,\noutput;\nset address %B01010101010101,\neval,\noutput;\nset address %B01110101010101,\neval,\noutput;\nset address %B10010101010101,\neval,\noutput;\nset address %B10110101010101,\neval,\noutput;\nset address %B11010101010101,\neval,\noutput;\nset address %B11110101010101,\neval,\noutput;\n\nset load 1,\nset address %B11110101010101,\nset in %B0101010101010101,\ntick,\noutput,\ntock,\noutput;\n\nset load 0,\nset address %B00010101010101,\ntick,\noutput;\ntock,\noutput;\nset address %B00110101010101,\neval,\noutput;\nset address %B01010101010101,\neval,\noutput;\nset address %B01110101010101,\neval,\noutput;\nset address %B10010101010101,\neval,\noutput;\nset address %B10110101010101,\neval,\noutput;\nset address %B11010101010101,\neval,\noutput;\nset address %B11110101010101,\neval,\noutput;',"RAM16K.cmp":"|time | in |load| address | out |\n| 0+ | 0 | 0 | 0 | 0 |\n| 1 | 0 | 0 | 0 | 0 |\n| 1+ | 0 | 1 | 0 | 0 |\n| 2 | 0 | 1 | 0 | 0 |\n| 2+ | 4321 | 0 | 0 | 0 |\n| 3 | 4321 | 0 | 0 | 0 |\n| 3+ | 4321 | 1 | 4321 | 0 |\n| 4 | 4321 | 1 | 4321 | 4321 |\n| 4+ | 4321 | 0 | 0 | 0 |\n| 5 | 4321 | 0 | 0 | 0 |\n| 5+ | 12345 | 0 | 12345 | 0 |\n| 6 | 12345 | 0 | 12345 | 0 |\n| 6+ | 12345 | 1 | 12345 | 0 |\n| 7 | 12345 | 1 | 12345 | 12345 |\n| 7+ | 12345 | 0 | 12345 | 12345 |\n| 8 | 12345 | 0 | 12345 | 12345 |\n| 8 | 12345 | 0 | 4321 | 4321 |\n| 8+ | 16383 | 0 | 4321 | 4321 |\n| 9 | 16383 | 0 | 4321 | 4321 |\n| 9+ | 16383 | 1 | 16383 | 0 |\n| 10 | 16383 | 1 | 16383 | 16383 |\n| 10+ | 16383 | 0 | 16383 | 16383 |\n| 11 | 16383 | 0 | 16383 | 16383 |\n| 11 | 16383 | 0 | 12345 | 12345 |\n| 11 | 16383 | 0 | 16383 | 16383 |\n| 11+ | 16383 | 0 | 10920 | 0 |\n| 12 | 16383 | 0 | 10920 | 0 |\n| 12 | 16383 | 0 | 10921 | 0 |\n| 12 | 16383 | 0 | 10922 | 0 |\n| 12 | 16383 | 0 | 10923 | 0 |\n| 12 | 16383 | 0 | 10924 | 0 |\n| 12 | 16383 | 0 | 10925 | 0 |\n| 12 | 16383 | 0 | 10926 | 0 |\n| 12 | 16383 | 0 | 10927 | 0 |\n| 12+ | 21845 | 1 | 10920 | 0 |\n| 13 | 21845 | 1 | 10920 | 21845 |\n| 13+ | 21845 | 1 | 10921 | 0 |\n| 14 | 21845 | 1 | 10921 | 21845 |\n| 14+ | 21845 | 1 | 10922 | 0 |\n| 15 | 21845 | 1 | 10922 | 21845 |\n| 15+ | 21845 | 1 | 10923 | 0 |\n| 16 | 21845 | 1 | 10923 | 21845 |\n| 16+ | 21845 | 1 | 10924 | 0 |\n| 17 | 21845 | 1 | 10924 | 21845 |\n| 17+ | 21845 | 1 | 10925 | 0 |\n| 18 | 21845 | 1 | 10925 | 21845 |\n| 18+ | 21845 | 1 | 10926 | 0 |\n| 19 | 21845 | 1 | 10926 | 21845 |\n| 19+ | 21845 | 1 | 10927 | 0 |\n| 20 | 21845 | 1 | 10927 | 21845 |\n| 20+ | 21845 | 0 | 10920 | 21845 |\n| 21 | 21845 | 0 | 10920 | 21845 |\n| 21 | 21845 | 0 | 10921 | 21845 |\n| 21 | 21845 | 0 | 10922 | 21845 |\n| 21 | 21845 | 0 | 10923 | 21845 |\n| 21 | 21845 | 0 | 10924 | 21845 |\n| 21 | 21845 | 0 | 10925 | 21845 |\n| 21 | 21845 | 0 | 10926 | 21845 |\n| 21 | 21845 | 0 | 10927 | 21845 |\n| 21+ | -21846 | 1 | 10920 | 21845 |\n| 22 | -21846 | 1 | 10920 | -21846 |\n| 22+ | -21846 | 0 | 10920 | -21846 |\n| 23 | -21846 | 0 | 10920 | -21846 |\n| 23 | -21846 | 0 | 10921 | 21845 |\n| 23 | -21846 | 0 | 10922 | 21845 |\n| 23 | -21846 | 0 | 10923 | 21845 |\n| 23 | -21846 | 0 | 10924 | 21845 |\n| 23 | -21846 | 0 | 10925 | 21845 |\n| 23 | -21846 | 0 | 10926 | 21845 |\n| 23 | -21846 | 0 | 10927 | 21845 |\n| 23+ | 21845 | 1 | 10920 | -21846 |\n| 24 | 21845 | 1 | 10920 | 21845 |\n| 24+ | -21846 | 1 | 10921 | 21845 |\n| 25 | -21846 | 1 | 10921 | -21846 |\n| 25+ | -21846 | 0 | 10920 | 21845 |\n| 26 | -21846 | 0 | 10920 | 21845 |\n| 26 | -21846 | 0 | 10921 | -21846 |\n| 26 | -21846 | 0 | 10922 | 21845 |\n| 26 | -21846 | 0 | 10923 | 21845 |\n| 26 | -21846 | 0 | 10924 | 21845 |\n| 26 | -21846 | 0 | 10925 | 21845 |\n| 26 | -21846 | 0 | 10926 | 21845 |\n| 26 | -21846 | 0 | 10927 | 21845 |\n| 26+ | 21845 | 1 | 10921 | -21846 |\n| 27 | 21845 | 1 | 10921 | 21845 |\n| 27+ | -21846 | 1 | 10922 | 21845 |\n| 28 | -21846 | 1 | 10922 | -21846 |\n| 28+ | -21846 | 0 | 10920 | 21845 |\n| 29 | -21846 | 0 | 10920 | 21845 |\n| 29 | -21846 | 0 | 10921 | 21845 |\n| 29 | -21846 | 0 | 10922 | -21846 |\n| 29 | -21846 | 0 | 10923 | 21845 |\n| 29 | -21846 | 0 | 10924 | 21845 |\n| 29 | -21846 | 0 | 10925 | 21845 |\n| 29 | -21846 | 0 | 10926 | 21845 |\n| 29 | -21846 | 0 | 10927 | 21845 |\n| 29+ | 21845 | 1 | 10922 | -21846 |\n| 30 | 21845 | 1 | 10922 | 21845 |\n| 30+ | -21846 | 1 | 10923 | 21845 |\n| 31 | -21846 | 1 | 10923 | -21846 |\n| 31+ | -21846 | 0 | 10920 | 21845 |\n| 32 | -21846 | 0 | 10920 | 21845 |\n| 32 | -21846 | 0 | 10921 | 21845 |\n| 32 | -21846 | 0 | 10922 | 21845 |\n| 32 | -21846 | 0 | 10923 | -21846 |\n| 32 | -21846 | 0 | 10924 | 21845 |\n| 32 | -21846 | 0 | 10925 | 21845 |\n| 32 | -21846 | 0 | 10926 | 21845 |\n| 32 | -21846 | 0 | 10927 | 21845 |\n| 32+ | 21845 | 1 | 10923 | -21846 |\n| 33 | 21845 | 1 | 10923 | 21845 |\n| 33+ | -21846 | 1 | 10924 | 21845 |\n| 34 | -21846 | 1 | 10924 | -21846 |\n| 34+ | -21846 | 0 | 10920 | 21845 |\n| 35 | -21846 | 0 | 10920 | 21845 |\n| 35 | -21846 | 0 | 10921 | 21845 |\n| 35 | -21846 | 0 | 10922 | 21845 |\n| 35 | -21846 | 0 | 10923 | 21845 |\n| 35 | -21846 | 0 | 10924 | -21846 |\n| 35 | -21846 | 0 | 10925 | 21845 |\n| 35 | -21846 | 0 | 10926 | 21845 |\n| 35 | -21846 | 0 | 10927 | 21845 |\n| 35+ | 21845 | 1 | 10924 | -21846 |\n| 36 | 21845 | 1 | 10924 | 21845 |\n| 36+ | -21846 | 1 | 10925 | 21845 |\n| 37 | -21846 | 1 | 10925 | -21846 |\n| 37+ | -21846 | 0 | 10920 | 21845 |\n| 38 | -21846 | 0 | 10920 | 21845 |\n| 38 | -21846 | 0 | 10921 | 21845 |\n| 38 | -21846 | 0 | 10922 | 21845 |\n| 38 | -21846 | 0 | 10923 | 21845 |\n| 38 | -21846 | 0 | 10924 | 21845 |\n| 38 | -21846 | 0 | 10925 | -21846 |\n| 38 | -21846 | 0 | 10926 | 21845 |\n| 38 | -21846 | 0 | 10927 | 21845 |\n| 38+ | 21845 | 1 | 10925 | -21846 |\n| 39 | 21845 | 1 | 10925 | 21845 |\n| 39+ | -21846 | 1 | 10926 | 21845 |\n| 40 | -21846 | 1 | 10926 | -21846 |\n| 40+ | -21846 | 0 | 10920 | 21845 |\n| 41 | -21846 | 0 | 10920 | 21845 |\n| 41 | -21846 | 0 | 10921 | 21845 |\n| 41 | -21846 | 0 | 10922 | 21845 |\n| 41 | -21846 | 0 | 10923 | 21845 |\n| 41 | -21846 | 0 | 10924 | 21845 |\n| 41 | -21846 | 0 | 10925 | 21845 |\n| 41 | -21846 | 0 | 10926 | -21846 |\n| 41 | -21846 | 0 | 10927 | 21845 |\n| 41+ | 21845 | 1 | 10926 | -21846 |\n| 42 | 21845 | 1 | 10926 | 21845 |\n| 42+ | -21846 | 1 | 10927 | 21845 |\n| 43 | -21846 | 1 | 10927 | -21846 |\n| 43+ | -21846 | 0 | 10920 | 21845 |\n| 44 | -21846 | 0 | 10920 | 21845 |\n| 44 | -21846 | 0 | 10921 | 21845 |\n| 44 | -21846 | 0 | 10922 | 21845 |\n| 44 | -21846 | 0 | 10923 | 21845 |\n| 44 | -21846 | 0 | 10924 | 21845 |\n| 44 | -21846 | 0 | 10925 | 21845 |\n| 44 | -21846 | 0 | 10926 | 21845 |\n| 44 | -21846 | 0 | 10927 | -21846 |\n| 44+ | 21845 | 1 | 10927 | -21846 |\n| 45 | 21845 | 1 | 10927 | 21845 |\n| 45+ | 21845 | 0 | 10920 | 21845 |\n| 46 | 21845 | 0 | 10920 | 21845 |\n| 46 | 21845 | 0 | 10921 | 21845 |\n| 46 | 21845 | 0 | 10922 | 21845 |\n| 46 | 21845 | 0 | 10923 | 21845 |\n| 46 | 21845 | 0 | 10924 | 21845 |\n| 46 | 21845 | 0 | 10925 | 21845 |\n| 46 | 21845 | 0 | 10926 | 21845 |\n| 46 | 21845 | 0 | 10927 | 21845 |\n| 46+ | 21845 | 0 | 1365 | 0 |\n| 47 | 21845 | 0 | 1365 | 0 |\n| 47 | 21845 | 0 | 3413 | 0 |\n| 47 | 21845 | 0 | 5461 | 0 |\n| 47 | 21845 | 0 | 7509 | 0 |\n| 47 | 21845 | 0 | 9557 | 0 |\n| 47 | 21845 | 0 | 11605 | 0 |\n| 47 | 21845 | 0 | 13653 | 0 |\n| 47 | 21845 | 0 | 15701 | 0 |\n| 47+ | 21845 | 1 | 1365 | 0 |\n| 48 | 21845 | 1 | 1365 | 21845 |\n| 48+ | 21845 | 1 | 3413 | 0 |\n| 49 | 21845 | 1 | 3413 | 21845 |\n| 49+ | 21845 | 1 | 5461 | 0 |\n| 50 | 21845 | 1 | 5461 | 21845 |\n| 50+ | 21845 | 1 | 7509 | 0 |\n| 51 | 21845 | 1 | 7509 | 21845 |\n| 51+ | 21845 | 1 | 9557 | 0 |\n| 52 | 21845 | 1 | 9557 | 21845 |\n| 52+ | 21845 | 1 | 11605 | 0 |\n| 53 | 21845 | 1 | 11605 | 21845 |\n| 53+ | 21845 | 1 | 13653 | 0 |\n| 54 | 21845 | 1 | 13653 | 21845 |\n| 54+ | 21845 | 1 | 15701 | 0 |\n| 55 | 21845 | 1 | 15701 | 21845 |\n| 55+ | 21845 | 0 | 1365 | 21845 |\n| 56 | 21845 | 0 | 1365 | 21845 |\n| 56 | 21845 | 0 | 3413 | 21845 |\n| 56 | 21845 | 0 | 5461 | 21845 |\n| 56 | 21845 | 0 | 7509 | 21845 |\n| 56 | 21845 | 0 | 9557 | 21845 |\n| 56 | 21845 | 0 | 11605 | 21845 |\n| 56 | 21845 | 0 | 13653 | 21845 |\n| 56 | 21845 | 0 | 15701 | 21845 |\n| 56+ | -21846 | 1 | 1365 | 21845 |\n| 57 | -21846 | 1 | 1365 | -21846 |\n| 57+ | -21846 | 0 | 1365 | -21846 |\n| 58 | -21846 | 0 | 1365 | -21846 |\n| 58 | -21846 | 0 | 3413 | 21845 |\n| 58 | -21846 | 0 | 5461 | 21845 |\n| 58 | -21846 | 0 | 7509 | 21845 |\n| 58 | -21846 | 0 | 9557 | 21845 |\n| 58 | -21846 | 0 | 11605 | 21845 |\n| 58 | -21846 | 0 | 13653 | 21845 |\n| 58 | -21846 | 0 | 15701 | 21845 |\n| 58+ | 21845 | 1 | 1365 | -21846 |\n| 59 | 21845 | 1 | 1365 | 21845 |\n| 59+ | -21846 | 1 | 3413 | 21845 |\n| 60 | -21846 | 1 | 3413 | -21846 |\n| 60+ | -21846 | 0 | 1365 | 21845 |\n| 61 | -21846 | 0 | 1365 | 21845 |\n| 61 | -21846 | 0 | 3413 | -21846 |\n| 61 | -21846 | 0 | 5461 | 21845 |\n| 61 | -21846 | 0 | 7509 | 21845 |\n| 61 | -21846 | 0 | 9557 | 21845 |\n| 61 | -21846 | 0 | 11605 | 21845 |\n| 61 | -21846 | 0 | 13653 | 21845 |\n| 61 | -21846 | 0 | 15701 | 21845 |\n| 61+ | 21845 | 1 | 3413 | -21846 |\n| 62 | 21845 | 1 | 3413 | 21845 |\n| 62+ | -21846 | 1 | 5461 | 21845 |\n| 63 | -21846 | 1 | 5461 | -21846 |\n| 63+ | -21846 | 0 | 1365 | 21845 |\n| 64 | -21846 | 0 | 1365 | 21845 |\n| 64 | -21846 | 0 | 3413 | 21845 |\n| 64 | -21846 | 0 | 5461 | -21846 |\n| 64 | -21846 | 0 | 7509 | 21845 |\n| 64 | -21846 | 0 | 9557 | 21845 |\n| 64 | -21846 | 0 | 11605 | 21845 |\n| 64 | -21846 | 0 | 13653 | 21845 |\n| 64 | -21846 | 0 | 15701 | 21845 |\n| 64+ | 21845 | 1 | 5461 | -21846 |\n| 65 | 21845 | 1 | 5461 | 21845 |\n| 65+ | -21846 | 1 | 7509 | 21845 |\n| 66 | -21846 | 1 | 7509 | -21846 |\n| 66+ | -21846 | 0 | 1365 | 21845 |\n| 67 | -21846 | 0 | 1365 | 21845 |\n| 67 | -21846 | 0 | 3413 | 21845 |\n| 67 | -21846 | 0 | 5461 | 21845 |\n| 67 | -21846 | 0 | 7509 | -21846 |\n| 67 | -21846 | 0 | 9557 | 21845 |\n| 67 | -21846 | 0 | 11605 | 21845 |\n| 67 | -21846 | 0 | 13653 | 21845 |\n| 67 | -21846 | 0 | 15701 | 21845 |\n| 67+ | 21845 | 1 | 7509 | -21846 |\n| 68 | 21845 | 1 | 7509 | 21845 |\n| 68+ | -21846 | 1 | 9557 | 21845 |\n| 69 | -21846 | 1 | 9557 | -21846 |\n| 69+ | -21846 | 0 | 1365 | 21845 |\n| 70 | -21846 | 0 | 1365 | 21845 |\n| 70 | -21846 | 0 | 3413 | 21845 |\n| 70 | -21846 | 0 | 5461 | 21845 |\n| 70 | -21846 | 0 | 7509 | 21845 |\n| 70 | -21846 | 0 | 9557 | -21846 |\n| 70 | -21846 | 0 | 11605 | 21845 |\n| 70 | -21846 | 0 | 13653 | 21845 |\n| 70 | -21846 | 0 | 15701 | 21845 |\n| 70+ | 21845 | 1 | 9557 | -21846 |\n| 71 | 21845 | 1 | 9557 | 21845 |\n| 71+ | -21846 | 1 | 11605 | 21845 |\n| 72 | -21846 | 1 | 11605 | -21846 |\n| 72+ | -21846 | 0 | 1365 | 21845 |\n| 73 | -21846 | 0 | 1365 | 21845 |\n| 73 | -21846 | 0 | 3413 | 21845 |\n| 73 | -21846 | 0 | 5461 | 21845 |\n| 73 | -21846 | 0 | 7509 | 21845 |\n| 73 | -21846 | 0 | 9557 | 21845 |\n| 73 | -21846 | 0 | 11605 | -21846 |\n| 73 | -21846 | 0 | 13653 | 21845 |\n| 73 | -21846 | 0 | 15701 | 21845 |\n| 73+ | 21845 | 1 | 11605 | -21846 |\n| 74 | 21845 | 1 | 11605 | 21845 |\n| 74+ | -21846 | 1 | 13653 | 21845 |\n| 75 | -21846 | 1 | 13653 | -21846 |\n| 75+ | -21846 | 0 | 1365 | 21845 |\n| 76 | -21846 | 0 | 1365 | 21845 |\n| 76 | -21846 | 0 | 3413 | 21845 |\n| 76 | -21846 | 0 | 5461 | 21845 |\n| 76 | -21846 | 0 | 7509 | 21845 |\n| 76 | -21846 | 0 | 9557 | 21845 |\n| 76 | -21846 | 0 | 11605 | 21845 |\n| 76 | -21846 | 0 | 13653 | -21846 |\n| 76 | -21846 | 0 | 15701 | 21845 |\n| 76+ | 21845 | 1 | 13653 | -21846 |\n| 77 | 21845 | 1 | 13653 | 21845 |\n| 77+ | -21846 | 1 | 15701 | 21845 |\n| 78 | -21846 | 1 | 15701 | -21846 |\n| 78+ | -21846 | 0 | 1365 | 21845 |\n| 79 | -21846 | 0 | 1365 | 21845 |\n| 79 | -21846 | 0 | 3413 | 21845 |\n| 79 | -21846 | 0 | 5461 | 21845 |\n| 79 | -21846 | 0 | 7509 | 21845 |\n| 79 | -21846 | 0 | 9557 | 21845 |\n| 79 | -21846 | 0 | 11605 | 21845 |\n| 79 | -21846 | 0 | 13653 | 21845 |\n| 79 | -21846 | 0 | 15701 | -21846 |\n| 79+ | 21845 | 1 | 15701 | -21846 |\n| 80 | 21845 | 1 | 15701 | 21845 |\n| 80+ | 21845 | 0 | 1365 | 21845 |\n| 81 | 21845 | 0 | 1365 | 21845 |\n| 81 | 21845 | 0 | 3413 | 21845 |\n| 81 | 21845 | 0 | 5461 | 21845 |\n| 81 | 21845 | 0 | 7509 | 21845 |\n| 81 | 21845 | 0 | 9557 | 21845 |\n| 81 | 21845 | 0 | 11605 | 21845 |\n| 81 | 21845 | 0 | 13653 | 21845 |\n| 81 | 21845 | 0 | 15701 | 21845 |"}},A={DFF:'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/03/DFF.hdl\n/**\n * Data Flip-flop:\n * maintains its current value:\n * out(t+1) = in(t)\n */\nCHIP DFF {\n IN in;\n OUT out;\n\n PARTS:\n BUILTIN DFF;\n CLOCKED in;\n}'};async function T(n){await n.pushd("/projects/03"),await(0,r.cL)(n,R),await n.popd()}async function b(n){await n.pushd("/projects/03"),await c(n,R,".tst"),await c(n,R,".cmp"),await n.popd()}const g={Mult:{"Mult.asm":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/4/Mult.asm\n\n// Multiplies R0 and R1 and stores the result in R2.\n// (R0, R1, R2 refer to RAM[0], RAM[1], and RAM[2], respectively.)\n// The algorithm is based on repetitive addition.\n\n//// Replace this comment with your code.',"Mult.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/4/mult/Mult.tst\n\n// Tests the Mult program, designed to compute R2 = R0 * R1.\n// Tests the program by having it multiply several sets of\n// R0 and R1 values.\n\noutput-list RAM[0]%D2.6.2 RAM[1]%D2.6.2 RAM[2]%D2.6.2;\n\nset RAM[0] 0, // Sets R0 and R1 to some input values\nset RAM[1] 0,\nset RAM[2] -1; // Ensures that the program initialized R2 to 0\nrepeat 20 {\n ticktock;\n}\nset RAM[0] 0, // Restores R0 and R1 in case the program changed them\nset RAM[1] 0,\noutput;\n\nset PC 0,\nset RAM[0] 1, // Sets R0 and R1 to some input values\nset RAM[1] 0,\nset RAM[2] -1; // Ensures that the program initialized R2 to 0\nrepeat 50 {\n ticktock;\n}\nset RAM[0] 1, // Restores R0 and R1 in case the program changed them\nset RAM[1] 0,\noutput;\n\nset PC 0,\nset RAM[0] 0, // Sets R0 and R1 to some input values\nset RAM[1] 2,\nset RAM[2] -1; // Ensures that the program initialized R2 to 0\nrepeat 80 {\n ticktock;\n}\nset RAM[0] 0, // Restores R0 and R1 in case the program changed them\nset RAM[1] 2,\noutput;\n\nset PC 0,\nset RAM[0] 3, // Sets R0 and R1 to some input values\nset RAM[1] 1,\nset RAM[2] -1; // Ensures that the program initialized R2 to 0\nrepeat 120 {\n ticktock;\n}\nset RAM[0] 3, // Restores R0 and R1 in case the program changed them\nset RAM[1] 1,\noutput;\n\nset PC 0,\nset RAM[0] 2, // Sets R0 and R1 to some input values\nset RAM[1] 4,\nset RAM[2] -1; // Ensures that the program initialized R2 to 0\nrepeat 150 {\n ticktock;\n}\nset RAM[0] 2, // Restores R0 and R1 in case the program changed them\nset RAM[1] 4,\noutput;\n\nset PC 0,\nset RAM[0] 6, // Sets R0 and R1 to some input values\nset RAM[1] 7,\nset RAM[2] -1; // Ensures that the program initialized R2 to 0\nrepeat 210 {\n ticktock;\n}\nset RAM[0] 6, // Restores R0 and R1 in case the program changed them\nset RAM[1] 7,\noutput;',"Mult.cmp":"| RAM[0] | RAM[1] | RAM[2] |\n| 0 | 0 | 0 |\n| 1 | 0 | 0 |\n| 0 | 2 | 0 |\n| 3 | 1 | 3 |\n| 2 | 4 | 8 |\n| 6 | 7 | 42 |"},Fill:{"Fill.asm":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/4/Fill.asm\n\n// Runs an infinite loop that listens to the keyboard input. \n// When a key is pressed (any key), the program blackens the screen,\n// i.e. writes "black" in every pixel. When no key is pressed, \n// the screen should be cleared.\n\n//// Replace this comment with your code.',"Fill.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/4/fill/Fill.tst\n\n// Tests the Fill.hack program in the CPU emulator.\n\necho "Select the highest speed and \'enable keyboard\'. Then press any key for some time, and inspect the screen.";\n\nrepeat {\n ticktock;\n}',"FillAutomatic.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/4/fill/FillAutomatic\n\n// This script can be used to test the Fill program automatically, \n// rather than interactively. Specifically, the script sets the keyboard\n// memory map (RAM[24576]) to 0, 1, and then again to 0. This simulates the \n// acts of leaving the keyboard untouched, pressing some key, and then releasing\n// the key. After each one of these simulated events, the script outputs the values\n// of some selected registers from the screen memory map (RAM[16384]-RAM[24576]).\n// This is done in order to test that these registers are set to 000...0 or 111....1, \n// as mandated by how the Fill program should react to the keyboard events.\n\noutput-list RAM[16384]%D2.6.2 RAM[17648]%D2.6.2 RAM[18349]%D2.6.2 RAM[19444]%D2.6.2 RAM[20771]%D2.6.2 RAM[21031]%D2.6.2 RAM[22596]%D2.6.2 RAM[23754]%D2.6.2 RAM[24575]%D2.6.2;\n\nset RAM[24576] 0, // the keyboard is untouched\nrepeat 1000000 {\n ticktock;\n}\noutput; // tests that the screen is white\n\nset RAM[24576] 1, // a keyboard key is pressed\nrepeat 1000000 {\n ticktock;\n}\noutput; // tests that the screen is black\n\nset RAM[24576] 0, // the keyboard is untouched\nrepeat 1000000 {\n ticktock;\n}\noutput; // tests that the screen is white',"FillAutomatic.cmp":"|RAM[16384]|RAM[17648]|RAM[18349]|RAM[19444]|RAM[20771]|RAM[21031]|RAM[22596]|RAM[23754]|RAM[24575]|\n| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |\n| -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 |\n| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |"}};async function w(n){await n.pushd("/projects/04"),await(0,r.cL)(n,g),await n.popd()}async function S(n){await n.pushd("/projects/04"),await c(n,g,".tst"),await c(n,g,".cmp"),await n.popd()}const C="\n0000000000000010\n1110110000010000\n0000000000000011\n1110000010010000\n0000000000000000\n1110001100001000\n",x="0000000000000000\n1111110000010000\n0000000000000001\n1111010011010000\n0000000000001010\n1110001100000001\n0000000000000001\n1111110000010000\n0000000000001100\n1110101010000111\n0000000000000000\n1111110000010000\n0000000000000010\n1110001100001000\n0000000000001110\n1110101010000111",D="\n0000000000000000\n1111110000010000\n0000000000010111\n1110001100000110\n0000000000010000\n1110001100001000\n0100000000000000\n1110110000010000\n0000000000010001\n1110001100001000\n0000000000010001\n1111110000100000\n1110111010001000\n0000000000010001\n1111110000010000\n0000000000100000\n1110000010010000\n0000000000010001\n1110001100001000\n0000000000010000\n1111110010011000\n0000000000001010\n1110001100000001\n0000000000010111\n1110101010000111",P={Memory:{"Memory.hdl":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/5/Memory.hdl\n/**\n * The complete address space of the Hack computer\'s memory,\n * including RAM and memory-mapped I/O. \n * The chip facilitates read and write operations, as follows:\n * Read: out(t) = Memory[address(t)](t)\n * Write: if load(t-1) then Memory[address(t-1)](t) = in(t-1)\n * In words: the chip always outputs the value stored at the memory \n * location specified by address. If load=1, the in value is loaded \n * into the memory location specified by address. This value becomes \n * available through the out output from the next time step onward.\n * Address space rules:\n * Only the upper 16K+8K+1 words of the Memory chip are used. \n * Access to address>0x6000 is invalid and reads 0. Access to any address\n * in the range 0x4000-0x5FFF results in accessing the screen memory \n * map. Access to address 0x6000 results in accessing the keyboard \n * memory map. The behavior in these addresses is described in the Screen\n * and Keyboard chip specifications given in the lectures and the book.\n */\nCHIP Memory {\n IN in[16], load, address[15];\n OUT out[16];\n\n PARTS:\n\t//// Replace this comment with your code.\n}',"Memory.tst":"// This file is part of www.nand2tetris.org\n// and the book \"The Elements of Computing Systems\"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/05/Memory.tst\n\n// Tests the Memory chip by inputting values to selected addresses, \n// verifying that these addresses were indeed written to, and verifying \n// that other addresses were not accessed by mistake. In particular, we \n// focus on probing the registers in addresses 'lower RAM', 'upper RAM',\n// and 'Screen', which correspond to 0, %X2000, and %X4000 in Hexadecimal \n// (0, 8192 (8K), and 16385 (16K+1) in decimal).\n\noutput-list in%D1.6.1 load%B2.1.2 address%B1.15.1 out%D1.6.1;\n\necho \"Before you run this script, select the 'Screen' option from the 'View' menu\";\n\n// We've noticed a common design mistake in several students' Memory.hdl files.\n// This error leads to zeros being written in the offset of inactive memory segments\n// instead of the intended location. To identify this issue, the test should check not\n// only for incorrect writes into the wrong segment but also for any unexpected changes.\n// To prepare for this, we've initialized the memory with a specific number in the areas\n// where these erroneous writes might happen.\n\n//// Sets RAM[2000], RAM[4000] = 12345 (for the following overwrite test)\nset in 12345, set load 1, set address %X2000, tick, output; tock, output;\nset address %X4000, tick, output; tock, output;\n\nset in -1,\t\t\t\t// Sets RAM[0] = -1\nset load 1,\nset address 0,\ntick,\noutput;\ntock,\noutput;\n\nset in 9999,\t\t\t// RAM[0] holds value\nset load 0,\ntick,\noutput;\ntock,\noutput;\n\nset address %X2000,\t\t// Did not also write to upper RAM or Screen\neval,\noutput;\nset address %X4000,\neval,\noutput;\n\n//// Sets RAM[0], RAM[4000] = 12345 (for following overwrite test)\nset in 12345, set load 1, set address %X0000, tick, output; tock, output;\nset address %X4000, tick, output; tock, output;\n\nset in 2222,\t\t\t// Sets RAM[2000] = 2222\nset load 1,\nset address %X2000,\ntick,\noutput;\ntock,\noutput;\n\nset in 9999,\t\t\t// RAM[2000] holds value\nset load 0,\ntick,\noutput;\ntock,\noutput;\n\nset address 0,\t\t\t// Did not also write to lower RAM or Screen\neval,\noutput;\nset address %X4000,\neval,\noutput;\n\nset load 0,\t\t\t\t// Low order address bits connected\nset address %X0001, eval, output;\nset address %X0002, eval, output;\nset address %X0004, eval, output;\nset address %X0008, eval, output;\nset address %X0010, eval, output;\nset address %X0020, eval, output;\nset address %X0040, eval, output;\nset address %X0080, eval, output;\nset address %X0100, eval, output;\nset address %X0200, eval, output;\nset address %X0400, eval, output;\nset address %X0800, eval, output;\nset address %X1000, eval, output;\nset address %X2000, eval, output;\n\nset address %X1234,\t\t// RAM[1234] = 1234\nset in 1234,\nset load 1,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %X2234,\t\t// Did not also write to upper RAM or Screen \neval, output;\nset address %X6234,\neval, output;\n\nset address %X2345,\t\t// RAM[2345] = 2345\nset in 2345,\nset load 1,\ntick,\noutput;\ntock,\noutput;\n\nset load 0,\nset address %X0345,\t\t// Did not also write to lower RAM or Screen \neval, output;\nset address %X4345,\neval, output;\n\n//// Clears the overwrite detection value from the screen\nset in 0, set load 1, set address %X4000, tick, output; tock, output;\n\n// Keyboard test\n\nset address 24576,\necho \"Click the Keyboard icon and hold down the 'K' key (uppercase) until you see the next message...\",\n// It's important to keep holding the key down since if the system is busy,\n// the memory will zero itself before being outputted.\n\nwhile out <> 75 {\n tick, tock; // tick, tock prevents hang if sync. parts used in KB path.\n}\n\nclear-echo,\noutput;\n\n// Screen test\n\n//// Sets RAM[0FCF], RAM[2FCF] = 12345 (for following overwrite test)\nset in 12345, set load 1, set address %X0FCF, tick, output; tock, output;\nset address %X2FCF, tick, output; tock, output;\n\nset load 1,\nset in -1,\nset address %X4FCF,\ntick,\ntock,\noutput,\n\nset address %X504F,\ntick,\ntock,\noutput;\n\nset address %X0FCF,\t\t// Did not also write to lower or upper RAM\neval,\noutput;\nset address %X2FCF,\neval,\noutput;\n\nset load 0,\t\t\t\t// Low order address bits connected\nset address %X4FCE, eval, output;\nset address %X4FCD, eval, output;\nset address %X4FCB, eval, output;\nset address %X4FC7, eval, output;\nset address %X4FDF, eval, output;\nset address %X4FEF, eval, output;\nset address %X4F8F, eval, output;\nset address %X4F4F, eval, output;\nset address %X4ECF, eval, output;\nset address %X4DCF, eval, output;\nset address %X4BCF, eval, output;\nset address %X47CF, eval, output;\nset address %X5FCF, eval, output;\n\nset load 0,\nset address 24576,\necho \"Two horizontal lines should be in the middle of the screen. Hold down 'Y' (uppercase) until you see the next message ...\",\n// It's important to keep holding the key down since if the system is busy,\n// the memory will zero itself before being outputted.\n\nwhile out <> 89 {\n tick, tock; // tick, tock prevents hang if sync. parts used in KB path.\n}\n\nclear-echo,\noutput;","Memory.cmp":"| in |load | address | out |\n| 12345 | 1 | 010000000000000 | 0 |\n| 12345 | 1 | 010000000000000 | 12345 |\n| 12345 | 1 | 100000000000000 | 0 |\n| 12345 | 1 | 100000000000000 | 12345 |\n| -1 | 1 | 000000000000000 | 0 |\n| -1 | 1 | 000000000000000 | -1 |\n| 9999 | 0 | 000000000000000 | -1 |\n| 9999 | 0 | 000000000000000 | -1 |\n| 9999 | 0 | 010000000000000 | 12345 |\n| 9999 | 0 | 100000000000000 | 12345 |\n| 12345 | 1 | 000000000000000 | -1 |\n| 12345 | 1 | 000000000000000 | 12345 |\n| 12345 | 1 | 100000000000000 | 12345 |\n| 12345 | 1 | 100000000000000 | 12345 |\n| 2222 | 1 | 010000000000000 | 12345 |\n| 2222 | 1 | 010000000000000 | 2222 |\n| 9999 | 0 | 010000000000000 | 2222 |\n| 9999 | 0 | 010000000000000 | 2222 |\n| 9999 | 0 | 000000000000000 | 12345 |\n| 9999 | 0 | 100000000000000 | 12345 |\n| 9999 | 0 | 000000000000001 | 0 |\n| 9999 | 0 | 000000000000010 | 0 |\n| 9999 | 0 | 000000000000100 | 0 |\n| 9999 | 0 | 000000000001000 | 0 |\n| 9999 | 0 | 000000000010000 | 0 |\n| 9999 | 0 | 000000000100000 | 0 |\n| 9999 | 0 | 000000001000000 | 0 |\n| 9999 | 0 | 000000010000000 | 0 |\n| 9999 | 0 | 000000100000000 | 0 |\n| 9999 | 0 | 000001000000000 | 0 |\n| 9999 | 0 | 000010000000000 | 0 |\n| 9999 | 0 | 000100000000000 | 0 |\n| 9999 | 0 | 001000000000000 | 0 |\n| 9999 | 0 | 010000000000000 | 2222 |\n| 1234 | 1 | 001001000110100 | 0 |\n| 1234 | 1 | 001001000110100 | 1234 |\n| 1234 | 0 | 010001000110100 | 0 |\n| 1234 | 0 | 110001000110100 | 0 |\n| 2345 | 1 | 010001101000101 | 0 |\n| 2345 | 1 | 010001101000101 | 2345 |\n| 2345 | 0 | 000001101000101 | 0 |\n| 2345 | 0 | 100001101000101 | 0 |\n| 0 | 1 | 100000000000000 | 12345 |\n| 0 | 1 | 100000000000000 | 0 |\n| 0 | 1 | 110000000000000 | 75 |\n| 12345 | 1 | 000111111001111 | 0 |\n| 12345 | 1 | 000111111001111 | 12345 |\n| 12345 | 1 | 010111111001111 | 0 |\n| 12345 | 1 | 010111111001111 | 12345 |\n| -1 | 1 | 100111111001111 | -1 |\n| -1 | 1 | 101000001001111 | -1 |\n| -1 | 1 | 000111111001111 | 12345 |\n| -1 | 1 | 010111111001111 | 12345 |\n| -1 | 0 | 100111111001110 | 0 |\n| -1 | 0 | 100111111001101 | 0 |\n| -1 | 0 | 100111111001011 | 0 |\n| -1 | 0 | 100111111000111 | 0 |\n| -1 | 0 | 100111111011111 | 0 |\n| -1 | 0 | 100111111101111 | 0 |\n| -1 | 0 | 100111110001111 | 0 |\n| -1 | 0 | 100111101001111 | 0 |\n| -1 | 0 | 100111011001111 | 0 |\n| -1 | 0 | 100110111001111 | 0 |\n| -1 | 0 | 100101111001111 | 0 |\n| -1 | 0 | 100011111001111 | 0 |\n| -1 | 0 | 101111111001111 | 0 |\n| -1 | 0 | 110000000000000 | 89 |"},CPU:{"CPU.hdl":"// This file is part of www.nand2tetris.org\n// and the book \"The Elements of Computing Systems\"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/5/CPU.hdl\n/**\n * The Hack Central Processing unit (CPU).\n * Parses the binary code in the instruction input and executes it according to the\n * Hack machine language specification. In the case of a C-instruction, computes the\n * function specified by the instruction. If the instruction specifies to read a memory\n * value, the inM input is expected to contain this value. If the instruction specifies\n * to write a value to the memory, sets the outM output to this value, sets the addressM\n * output to the target address, and asserts the writeM output (when writeM = 0, any\n * value may appear in outM).\n * If the reset input is 0, computes the address of the next instruction and sets the\n * pc output to that value. If the reset input is 1, sets pc to 0.\n * Note: The outM and writeM outputs are combinational: they are affected by the\n * instruction's execution during the current cycle. The addressM and pc outputs are\n * clocked: although they are affected by the instruction's execution, they commit to\n * their new values only in the next cycle.\n */\nCHIP CPU {\n\n IN inM[16], // M value input (M = contents of RAM[A])\n instruction[16], // Instruction for execution\n reset; // Signals whether to re-start the current\n // program (reset==1) or continue executing\n // the current program (reset==0).\n\n OUT outM[16], // M value output\n writeM, // Write to M? \n addressM[15], // Address in data memory (of M)\n pc[15]; // address of next instruction\n\n PARTS:\n\t//// Replace this comment with your code.\n}","CPU.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/5/CPU.tst\n\noutput-list time%S0.4.0 inM%D0.6.0 instruction%B0.16.0 reset%B2.1.2 outM%D1.6.0 writeM%B3.1.3 addressM%D0.5.0 pc%D0.5.0 DRegister[]%D1.6.1;\n\n\nset instruction %B0011000000111001, // @12345\ntick, output, tock, output;\n\nset instruction %B1110110000010000, // D=A\ntick, output, tock, output;\n\nset instruction %B0101101110100000, // @23456\ntick, output, tock, output;\n\nset instruction %B1110000111010000, // D=A-D\ntick, output, tock, output;\n\nset instruction %B0000001111101000, // @1000\ntick, output, tock, output;\n\nset instruction %B1110001100001000, // M=D\ntick, output, tock, output;\n\nset instruction %B0000001111101001, // @1001\ntick, output, tock, output;\n\nset instruction %B1110001110011000, // MD=D-1\ntick, output, tock, output;\n\nset instruction %B0000001111101000, // @1000\ntick, output, tock, output;\n\nset instruction %B1111010011010000, // D=D-M\nset inM 11111,\ntick, output, tock, output;\n\nset instruction %B0000000000001110, // @14\ntick, output, tock, output;\n\nset instruction %B1110001100000100, // D;jlt\ntick, output, tock, output;\n\nset instruction %B0000001111100111, // @999\ntick, output, tock, output;\n\nset instruction %B1110110111100000, // A=A+1\ntick, output, tock, output;\n\nset instruction %B1110001100001000, // M=D\ntick, output, tock, output;\n\nset instruction %B0000000000010101, // @21\ntick, output, tock, output;\n\nset instruction %B1110011111000010, // D+1;jeq\ntick, output, tock, output;\n\nset instruction %B0000000000000010, // @2\ntick, output, tock, output;\n\nset instruction %B1110000010010000, // D=D+A\ntick, output, tock, output;\n\nset instruction %B0000001111101000, // @1000\ntick, output, tock, output;\n\nset instruction %B1110111010010000, // D=-1\ntick, output, tock, output;\n\nset instruction %B1110001100000001, // D;JGT\ntick, output, tock, output;\n\nset instruction %B1110001100000010, // D;JEQ\ntick, output, tock, output;\n\nset instruction %B1110001100000011, // D;JGE\ntick, output, tock, output;\n\nset instruction %B1110001100000100, // D;JLT\ntick, output, tock, output;\n\nset instruction %B1110001100000101, // D;JNE\ntick, output, tock, output;\n\nset instruction %B1110001100000110, // D;JLE\ntick, output, tock, output;\n\nset instruction %B1110001100000111, // D;JMP\ntick, output, tock, output;\n\nset instruction %B1110101010010000, // D=0\ntick, output, tock, output;\n\nset instruction %B1110001100000001, // D;JGT\ntick, output, tock, output;\n\nset instruction %B1110001100000010, // D;JEQ\ntick, output, tock, output;\n\nset instruction %B1110001100000011, // D;JGE\ntick, output, tock, output;\n\nset instruction %B1110001100000100, // D;JLT\ntick, output, tock, output;\n\nset instruction %B1110001100000101, // D;JNE\ntick, output, tock, output;\n\nset instruction %B1110001100000110, // D;JLE\ntick, output, tock, output;\n\nset instruction %B1110001100000111, // D;JMP\ntick, output, tock, output;\n\nset instruction %B1110111111010000, // D=1\ntick, output, tock, output;\n\nset instruction %B1110001100000001, // D;JGT\ntick, output, tock, output;\n\nset instruction %B1110001100000010, // D;JEQ\ntick, output, tock, output;\n\nset instruction %B1110001100000011, // D;JGE\ntick, output, tock, output;\n\nset instruction %B1110001100000100, // D;JLT\ntick, output, tock, output;\n\nset instruction %B1110001100000101, // D;JNE\ntick, output, tock, output;\n\nset instruction %B1110001100000110, // D;JLE\ntick, output, tock, output;\n\nset instruction %B1110001100000111, // D;JMP\ntick, output, tock, output;\n\nset reset 1;\ntick, output, tock, output;\n\nset instruction %B0111111111111111, // @32767\nset reset 0;\ntick, output, tock, output;',"CPU.cmp":"|time| inM | instruction |reset| outM |writeM |addre| pc |DRegiste|\n|0+ | 0|0011000000111001| 0 |*******| 0 | 0| 0| 0 |\n|1 | 0|0011000000111001| 0 |*******| 0 |12345| 1| 0 |\n|1+ | 0|1110110000010000| 0 |*******| 0 |12345| 1| 12345 |\n|2 | 0|1110110000010000| 0 |*******| 0 |12345| 2| 12345 |\n|2+ | 0|0101101110100000| 0 |*******| 0 |12345| 2| 12345 |\n|3 | 0|0101101110100000| 0 |*******| 0 |23456| 3| 12345 |\n|3+ | 0|1110000111010000| 0 |*******| 0 |23456| 3| 11111 |\n|4 | 0|1110000111010000| 0 |*******| 0 |23456| 4| 11111 |\n|4+ | 0|0000001111101000| 0 |*******| 0 |23456| 4| 11111 |\n|5 | 0|0000001111101000| 0 |*******| 0 | 1000| 5| 11111 |\n|5+ | 0|1110001100001000| 0 | 11111| 1 | 1000| 5| 11111 |\n|6 | 0|1110001100001000| 0 | 11111| 1 | 1000| 6| 11111 |\n|6+ | 0|0000001111101001| 0 |*******| 0 | 1000| 6| 11111 |\n|7 | 0|0000001111101001| 0 |*******| 0 | 1001| 7| 11111 |\n|7+ | 0|1110001110011000| 0 | 11110| 1 | 1001| 7| 11110 |\n|8 | 0|1110001110011000| 0 | 11109| 1 | 1001| 8| 11110 |\n|8+ | 0|0000001111101000| 0 |*******| 0 | 1001| 8| 11110 |\n|9 | 0|0000001111101000| 0 |*******| 0 | 1000| 9| 11110 |\n|9+ | 11111|1111010011010000| 0 |*******| 0 | 1000| 9| -1 |\n|10 | 11111|1111010011010000| 0 |*******| 0 | 1000| 10| -1 |\n|10+ | 11111|0000000000001110| 0 |*******| 0 | 1000| 10| -1 |\n|11 | 11111|0000000000001110| 0 |*******| 0 | 14| 11| -1 |\n|11+ | 11111|1110001100000100| 0 |*******| 0 | 14| 11| -1 |\n|12 | 11111|1110001100000100| 0 |*******| 0 | 14| 14| -1 |\n|12+ | 11111|0000001111100111| 0 |*******| 0 | 14| 14| -1 |\n|13 | 11111|0000001111100111| 0 |*******| 0 | 999| 15| -1 |\n|13+ | 11111|1110110111100000| 0 |*******| 0 | 999| 15| -1 |\n|14 | 11111|1110110111100000| 0 |*******| 0 | 1000| 16| -1 |\n|14+ | 11111|1110001100001000| 0 | -1| 1 | 1000| 16| -1 |\n|15 | 11111|1110001100001000| 0 | -1| 1 | 1000| 17| -1 |\n|15+ | 11111|0000000000010101| 0 |*******| 0 | 1000| 17| -1 |\n|16 | 11111|0000000000010101| 0 |*******| 0 | 21| 18| -1 |\n|16+ | 11111|1110011111000010| 0 |*******| 0 | 21| 18| -1 |\n|17 | 11111|1110011111000010| 0 |*******| 0 | 21| 21| -1 |\n|17+ | 11111|0000000000000010| 0 |*******| 0 | 21| 21| -1 |\n|18 | 11111|0000000000000010| 0 |*******| 0 | 2| 22| -1 |\n|18+ | 11111|1110000010010000| 0 |*******| 0 | 2| 22| 1 |\n|19 | 11111|1110000010010000| 0 |*******| 0 | 2| 23| 1 |\n|19+ | 11111|0000001111101000| 0 |*******| 0 | 2| 23| 1 |\n|20 | 11111|0000001111101000| 0 |*******| 0 | 1000| 24| 1 |\n|20+ | 11111|1110111010010000| 0 |*******| 0 | 1000| 24| -1 |\n|21 | 11111|1110111010010000| 0 |*******| 0 | 1000| 25| -1 |\n|21+ | 11111|1110001100000001| 0 |*******| 0 | 1000| 25| -1 |\n|22 | 11111|1110001100000001| 0 |*******| 0 | 1000| 26| -1 |\n|22+ | 11111|1110001100000010| 0 |*******| 0 | 1000| 26| -1 |\n|23 | 11111|1110001100000010| 0 |*******| 0 | 1000| 27| -1 |\n|23+ | 11111|1110001100000011| 0 |*******| 0 | 1000| 27| -1 |\n|24 | 11111|1110001100000011| 0 |*******| 0 | 1000| 28| -1 |\n|24+ | 11111|1110001100000100| 0 |*******| 0 | 1000| 28| -1 |\n|25 | 11111|1110001100000100| 0 |*******| 0 | 1000| 1000| -1 |\n|25+ | 11111|1110001100000101| 0 |*******| 0 | 1000| 1000| -1 |\n|26 | 11111|1110001100000101| 0 |*******| 0 | 1000| 1000| -1 |\n|26+ | 11111|1110001100000110| 0 |*******| 0 | 1000| 1000| -1 |\n|27 | 11111|1110001100000110| 0 |*******| 0 | 1000| 1000| -1 |\n|27+ | 11111|1110001100000111| 0 |*******| 0 | 1000| 1000| -1 |\n|28 | 11111|1110001100000111| 0 |*******| 0 | 1000| 1000| -1 |\n|28+ | 11111|1110101010010000| 0 |*******| 0 | 1000| 1000| 0 |\n|29 | 11111|1110101010010000| 0 |*******| 0 | 1000| 1001| 0 |\n|29+ | 11111|1110001100000001| 0 |*******| 0 | 1000| 1001| 0 |\n|30 | 11111|1110001100000001| 0 |*******| 0 | 1000| 1002| 0 |\n|30+ | 11111|1110001100000010| 0 |*******| 0 | 1000| 1002| 0 |\n|31 | 11111|1110001100000010| 0 |*******| 0 | 1000| 1000| 0 |\n|31+ | 11111|1110001100000011| 0 |*******| 0 | 1000| 1000| 0 |\n|32 | 11111|1110001100000011| 0 |*******| 0 | 1000| 1000| 0 |\n|32+ | 11111|1110001100000100| 0 |*******| 0 | 1000| 1000| 0 |\n|33 | 11111|1110001100000100| 0 |*******| 0 | 1000| 1001| 0 |\n|33+ | 11111|1110001100000101| 0 |*******| 0 | 1000| 1001| 0 |\n|34 | 11111|1110001100000101| 0 |*******| 0 | 1000| 1002| 0 |\n|34+ | 11111|1110001100000110| 0 |*******| 0 | 1000| 1002| 0 |\n|35 | 11111|1110001100000110| 0 |*******| 0 | 1000| 1000| 0 |\n|35+ | 11111|1110001100000111| 0 |*******| 0 | 1000| 1000| 0 |\n|36 | 11111|1110001100000111| 0 |*******| 0 | 1000| 1000| 0 |\n|36+ | 11111|1110111111010000| 0 |*******| 0 | 1000| 1000| 1 |\n|37 | 11111|1110111111010000| 0 |*******| 0 | 1000| 1001| 1 |\n|37+ | 11111|1110001100000001| 0 |*******| 0 | 1000| 1001| 1 |\n|38 | 11111|1110001100000001| 0 |*******| 0 | 1000| 1000| 1 |\n|38+ | 11111|1110001100000010| 0 |*******| 0 | 1000| 1000| 1 |\n|39 | 11111|1110001100000010| 0 |*******| 0 | 1000| 1001| 1 |\n|39+ | 11111|1110001100000011| 0 |*******| 0 | 1000| 1001| 1 |\n|40 | 11111|1110001100000011| 0 |*******| 0 | 1000| 1000| 1 |\n|40+ | 11111|1110001100000100| 0 |*******| 0 | 1000| 1000| 1 |\n|41 | 11111|1110001100000100| 0 |*******| 0 | 1000| 1001| 1 |\n|41+ | 11111|1110001100000101| 0 |*******| 0 | 1000| 1001| 1 |\n|42 | 11111|1110001100000101| 0 |*******| 0 | 1000| 1000| 1 |\n|42+ | 11111|1110001100000110| 0 |*******| 0 | 1000| 1000| 1 |\n|43 | 11111|1110001100000110| 0 |*******| 0 | 1000| 1001| 1 |\n|43+ | 11111|1110001100000111| 0 |*******| 0 | 1000| 1001| 1 |\n|44 | 11111|1110001100000111| 0 |*******| 0 | 1000| 1000| 1 |\n|44+ | 11111|1110001100000111| 1 |*******| 0 | 1000| 1000| 1 |\n|45 | 11111|1110001100000111| 1 |*******| 0 | 1000| 0| 1 |\n|45+ | 11111|0111111111111111| 0 |*******| 0 | 1000| 0| 1 |\n|46 | 11111|0111111111111111| 0 |*******| 0 |32767| 1| 1 |","CPU-external.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/5/CPU-external.tst\n\noutput-list time%S0.4.0 inM%D0.6.0 instruction%B0.16.0 reset%B2.1.2 outM%D1.6.0 writeM%B3.1.3 addressM%D0.5.0 pc%D0.5.0;\n\n\nset instruction %B0011000000111001, // @12345\ntick, output, tock, output;\n\nset instruction %B1110110000010000, // D=A\ntick, output, tock, output;\n\nset instruction %B0101101110100000, // @23456\ntick, output, tock, output;\n\nset instruction %B1110000111010000, // D=A-D\ntick, output, tock, output;\n\nset instruction %B0000001111101000, // @1000\ntick, output, tock, output;\n\nset instruction %B1110001100001000, // M=D\ntick, output, tock, output;\n\nset instruction %B0000001111101001, // @1001\ntick, output, tock, output;\n\nset instruction %B1110001110011000, // MD=D-1\ntick, output, tock, output;\n\nset instruction %B0000001111101000, // @1000\ntick, output, tock, output;\n\nset instruction %B1111010011010000, // D=D-M\nset inM 11111,\ntick, output, tock, output;\n\nset instruction %B0000000000001110, // @14\ntick, output, tock, output;\n\nset instruction %B1110001100000100, // D;jlt\ntick, output, tock, output;\n\nset instruction %B0000001111100111, // @999\ntick, output, tock, output;\n\nset instruction %B1110110111100000, // A=A+1\ntick, output, tock, output;\n\nset instruction %B1110001100001000, // M=D\ntick, output, tock, output;\n\nset instruction %B0000000000010101, // @21\ntick, output, tock, output;\n\nset instruction %B1110011111000010, // D+1;jeq\ntick, output, tock, output;\n\nset instruction %B0000000000000010, // @2\ntick, output, tock, output;\n\nset instruction %B1110000010010000, // D=D+A\ntick, output, tock, output;\n\nset instruction %B0000001111101000, // @1000\ntick, output, tock, output;\n\nset instruction %B1110111010010000, // D=-1\ntick, output, tock, output;\n\nset instruction %B1110001100000001, // D;JGT\ntick, output, tock, output;\n\nset instruction %B1110001100000010, // D;JEQ\ntick, output, tock, output;\n\nset instruction %B1110001100000011, // D;JGE\ntick, output, tock, output;\n\nset instruction %B1110001100000100, // D;JLT\ntick, output, tock, output;\n\nset instruction %B1110001100000101, // D;JNE\ntick, output, tock, output;\n\nset instruction %B1110001100000110, // D;JLE\ntick, output, tock, output;\n\nset instruction %B1110001100000111, // D;JMP\ntick, output, tock, output;\n\nset instruction %B1110101010010000, // D=0\ntick, output, tock, output;\n\nset instruction %B1110001100000001, // D;JGT\ntick, output, tock, output;\n\nset instruction %B1110001100000010, // D;JEQ\ntick, output, tock, output;\n\nset instruction %B1110001100000011, // D;JGE\ntick, output, tock, output;\n\nset instruction %B1110001100000100, // D;JLT\ntick, output, tock, output;\n\nset instruction %B1110001100000101, // D;JNE\ntick, output, tock, output;\n\nset instruction %B1110001100000110, // D;JLE\ntick, output, tock, output;\n\nset instruction %B1110001100000111, // D;JMP\ntick, output, tock, output;\n\nset instruction %B1110111111010000, // D=1\ntick, output, tock, output;\n\nset instruction %B1110001100000001, // D;JGT\ntick, output, tock, output;\n\nset instruction %B1110001100000010, // D;JEQ\ntick, output, tock, output;\n\nset instruction %B1110001100000011, // D;JGE\ntick, output, tock, output;\n\nset instruction %B1110001100000100, // D;JLT\ntick, output, tock, output;\n\nset instruction %B1110001100000101, // D;JNE\ntick, output, tock, output;\n\nset instruction %B1110001100000110, // D;JLE\ntick, output, tock, output;\n\nset instruction %B1110001100000111, // D;JMP\ntick, output, tock, output;\n\nset reset 1;\ntick, output, tock, output;\n\nset instruction %B0111111111111111, // @32767\nset reset 0;\ntick, output, tock, output;',"CPU-external.cmp":"|time| inM | instruction |reset| outM |writeM |addre| pc |\n|0+ | 0|0011000000111001| 0 | 0| 0 | 0| 0|\n|1 | 0|0011000000111001| 0 | 0| 0 |12345| 1|\n|1+ | 0|1110110000010000| 0 | 12345| 0 |12345| 1|\n|2 | 0|1110110000010000| 0 | 12345| 0 |12345| 2|\n|2+ | 0|0101101110100000| 0 | 0| 0 |12345| 2|\n|3 | 0|0101101110100000| 0 | 0| 0 |23456| 3|\n|3+ | 0|1110000111010000| 0 | 11111| 0 |23456| 3|\n|4 | 0|1110000111010000| 0 | 12345| 0 |23456| 4|\n|4+ | 0|0000001111101000| 0 | -11111| 0 |23456| 4|\n|5 | 0|0000001111101000| 0 | -11111| 0 | 1000| 5|\n|5+ | 0|1110001100001000| 0 | 11111| 1 | 1000| 5|\n|6 | 0|1110001100001000| 0 | 11111| 1 | 1000| 6|\n|6+ | 0|0000001111101001| 0 | -11111| 0 | 1000| 6|\n|7 | 0|0000001111101001| 0 | -11111| 0 | 1001| 7|\n|7+ | 0|1110001110011000| 0 | 11110| 1 | 1001| 7|\n|8 | 0|1110001110011000| 0 | 11109| 1 | 1001| 8|\n|8+ | 0|0000001111101000| 0 | -11110| 0 | 1001| 8|\n|9 | 0|0000001111101000| 0 | -11110| 0 | 1000| 9|\n|9+ | 11111|1111010011010000| 0 | -1| 0 | 1000| 9|\n|10 | 11111|1111010011010000| 0 | -11112| 0 | 1000| 10|\n|10+ | 11111|0000000000001110| 0 | 1000| 0 | 1000| 10|\n|11 | 11111|0000000000001110| 0 | 14| 0 | 14| 11|\n|11+ | 11111|1110001100000100| 0 | -1| 0 | 14| 11|\n|12 | 11111|1110001100000100| 0 | -1| 0 | 14| 14|\n|12+ | 11111|0000001111100111| 0 | 1| 0 | 14| 14|\n|13 | 11111|0000001111100111| 0 | 1| 0 | 999| 15|\n|13+ | 11111|1110110111100000| 0 | 1000| 0 | 999| 15|\n|14 | 11111|1110110111100000| 0 | 1001| 0 | 1000| 16|\n|14+ | 11111|1110001100001000| 0 | -1| 1 | 1000| 16|\n|15 | 11111|1110001100001000| 0 | -1| 1 | 1000| 17|\n|15+ | 11111|0000000000010101| 0 | 1000| 0 | 1000| 17|\n|16 | 11111|0000000000010101| 0 | 21| 0 | 21| 18|\n|16+ | 11111|1110011111000010| 0 | 0| 0 | 21| 18|\n|17 | 11111|1110011111000010| 0 | 0| 0 | 21| 21|\n|17+ | 11111|0000000000000010| 0 | 21| 0 | 21| 21|\n|18 | 11111|0000000000000010| 0 | 2| 0 | 2| 22|\n|18+ | 11111|1110000010010000| 0 | 1| 0 | 2| 22|\n|19 | 11111|1110000010010000| 0 | 3| 0 | 2| 23|\n|19+ | 11111|0000001111101000| 0 | -1| 0 | 2| 23|\n|20 | 11111|0000001111101000| 0 | -1| 0 | 1000| 24|\n|20+ | 11111|1110111010010000| 0 | -1| 0 | 1000| 24|\n|21 | 11111|1110111010010000| 0 | -1| 0 | 1000| 25|\n|21+ | 11111|1110001100000001| 0 | -1| 0 | 1000| 25|\n|22 | 11111|1110001100000001| 0 | -1| 0 | 1000| 26|\n|22+ | 11111|1110001100000010| 0 | -1| 0 | 1000| 26|\n|23 | 11111|1110001100000010| 0 | -1| 0 | 1000| 27|\n|23+ | 11111|1110001100000011| 0 | -1| 0 | 1000| 27|\n|24 | 11111|1110001100000011| 0 | -1| 0 | 1000| 28|\n|24+ | 11111|1110001100000100| 0 | -1| 0 | 1000| 28|\n|25 | 11111|1110001100000100| 0 | -1| 0 | 1000| 1000|\n|25+ | 11111|1110001100000101| 0 | -1| 0 | 1000| 1000|\n|26 | 11111|1110001100000101| 0 | -1| 0 | 1000| 1000|\n|26+ | 11111|1110001100000110| 0 | -1| 0 | 1000| 1000|\n|27 | 11111|1110001100000110| 0 | -1| 0 | 1000| 1000|\n|27+ | 11111|1110001100000111| 0 | -1| 0 | 1000| 1000|\n|28 | 11111|1110001100000111| 0 | -1| 0 | 1000| 1000|\n|28+ | 11111|1110101010010000| 0 | 0| 0 | 1000| 1000|\n|29 | 11111|1110101010010000| 0 | 0| 0 | 1000| 1001|\n|29+ | 11111|1110001100000001| 0 | 0| 0 | 1000| 1001|\n|30 | 11111|1110001100000001| 0 | 0| 0 | 1000| 1002|\n|30+ | 11111|1110001100000010| 0 | 0| 0 | 1000| 1002|\n|31 | 11111|1110001100000010| 0 | 0| 0 | 1000| 1000|\n|31+ | 11111|1110001100000011| 0 | 0| 0 | 1000| 1000|\n|32 | 11111|1110001100000011| 0 | 0| 0 | 1000| 1000|\n|32+ | 11111|1110001100000100| 0 | 0| 0 | 1000| 1000|\n|33 | 11111|1110001100000100| 0 | 0| 0 | 1000| 1001|\n|33+ | 11111|1110001100000101| 0 | 0| 0 | 1000| 1001|\n|34 | 11111|1110001100000101| 0 | 0| 0 | 1000| 1002|\n|34+ | 11111|1110001100000110| 0 | 0| 0 | 1000| 1002|\n|35 | 11111|1110001100000110| 0 | 0| 0 | 1000| 1000|\n|35+ | 11111|1110001100000111| 0 | 0| 0 | 1000| 1000|\n|36 | 11111|1110001100000111| 0 | 0| 0 | 1000| 1000|\n|36+ | 11111|1110111111010000| 0 | 1| 0 | 1000| 1000|\n|37 | 11111|1110111111010000| 0 | 1| 0 | 1000| 1001|\n|37+ | 11111|1110001100000001| 0 | 1| 0 | 1000| 1001|\n|38 | 11111|1110001100000001| 0 | 1| 0 | 1000| 1000|\n|38+ | 11111|1110001100000010| 0 | 1| 0 | 1000| 1000|\n|39 | 11111|1110001100000010| 0 | 1| 0 | 1000| 1001|\n|39+ | 11111|1110001100000011| 0 | 1| 0 | 1000| 1001|\n|40 | 11111|1110001100000011| 0 | 1| 0 | 1000| 1000|\n|40+ | 11111|1110001100000100| 0 | 1| 0 | 1000| 1000|\n|41 | 11111|1110001100000100| 0 | 1| 0 | 1000| 1001|\n|41+ | 11111|1110001100000101| 0 | 1| 0 | 1000| 1001|\n|42 | 11111|1110001100000101| 0 | 1| 0 | 1000| 1000|\n|42+ | 11111|1110001100000110| 0 | 1| 0 | 1000| 1000|\n|43 | 11111|1110001100000110| 0 | 1| 0 | 1000| 1001|\n|43+ | 11111|1110001100000111| 0 | 1| 0 | 1000| 1001|\n|44 | 11111|1110001100000111| 0 | 1| 0 | 1000| 1000|\n|44+ | 11111|1110001100000111| 1 | 1| 0 | 1000| 1000|\n|45 | 11111|1110001100000111| 1 | 1| 0 | 1000| 0|\n|45+ | 11111|0111111111111111| 0 | 1| 0 | 1000| 0|\n|46 | 11111|0111111111111111| 0 | 1| 0 |32767| 1|\n"},Computer:{"Computer.hdl":"// This file is part of www.nand2tetris.org\n// and the book \"The Elements of Computing Systems\"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/5/Computer.hdl\n/**\n * The Hack computer, consisting of CPU, ROM and RAM.\n * When reset = 0, the program stored in the ROM executes.\n * When reset = 1, the program's execution restarts. \n * Thus, to start running the currently loaded program,\n * set reset to 1, and then set it to 0. \n * From this point onwards, the user is at the mercy of the software.\n * Depending on the program's code, and whether the code is correct,\n * the screen may show some output, the user may be expected to enter\n * some input using the keyboard, or the program may do some procerssing. \n */\nCHIP Computer {\n\n IN reset;\n\n PARTS:\n //// Replace this comment with your code.\n}","ComputerAdd.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/5/ComputerAdd.tst\n\n// Tests the Computer chip by having it execute the program Add.hack.\n// The program adds up the constants 2 and 3 and writes the result in RAM[0]. \n\n// Tracks the values of the time, reset bit, A-register, D-register,\n// program counter, R0, R1, and R2.\noutput-list time%S1.3.1 reset%B2.1.2 ARegister[0]%D1.7.1 DRegister[0]%D1.7.1 PC[]%D0.4.0 RAM16K[0]%D1.7.1 RAM16K[1]%D1.7.1 RAM16K[2]%D1.7.1;\n\n// Loads the binary program Add.hack into the computer\'s instruction memory \nROM32K load Add.hack,\noutput;\n\n// First run (at the beginning PC=0)\nrepeat 6 {\n tick, tock, output;\n}\n\n// Resets the PC\nset reset 1,\nset RAM16K[0] 0,\ntick, tock, output;\n\n// Second run, to check that the PC was reset correctly.\nset reset 0,\n\nrepeat 6 {\n tick, tock, output;\n}',"ComputerAdd.cmp":"|time |reset|ARegister|DRegister|PC[]|RAM16K[0]|RAM16K[1]|RAM16K[2]|\n| 0 | 0 | 0 | 0 | 0| 0 | 0 | 0 |\n| 1 | 0 | 2 | 0 | 1| 0 | 0 | 0 |\n| 2 | 0 | 2 | 2 | 2| 0 | 0 | 0 |\n| 3 | 0 | 3 | 2 | 3| 0 | 0 | 0 |\n| 4 | 0 | 3 | 5 | 4| 0 | 0 | 0 |\n| 5 | 0 | 0 | 5 | 5| 0 | 0 | 0 |\n| 6 | 0 | 0 | 5 | 6| 5 | 0 | 0 |\n| 7 | 1 | 0 | 5 | 0| 0 | 0 | 0 |\n| 8 | 0 | 2 | 5 | 1| 0 | 0 | 0 |\n| 9 | 0 | 2 | 2 | 2| 0 | 0 | 0 |\n| 10 | 0 | 3 | 2 | 3| 0 | 0 | 0 |\n| 11 | 0 | 3 | 5 | 4| 0 | 0 | 0 |\n| 12 | 0 | 0 | 5 | 5| 0 | 0 | 0 |\n| 13 | 0 | 0 | 5 | 6| 5 | 0 | 0 |","ComputerMax.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/5/ComputerMax.tst\n\n// Tests the Computer chip by having it execute the program Max.hack.\n// The program computes maximum(R0, R1) and writes the result in RAM[2].\n\n// Tracks the values of the time, reset bit, A-register, D-register,\n// program counter, R0, R1, and R2.\noutput-list time%S1.3.1 reset%B2.1.2 ARegister[]%D1.7.1 DRegister[]%D1.7.1 PC[]%D0.4.0 RAM16K[0]%D1.7.1 RAM16K[1]%D1.7.1 RAM16K[2]%D1.7.1;\n\n// Loads the binary program Add.hack into the computer\'s instruction memory \nROM32K load Max.hack,\n\n// first run: computes max(3,5)\nset RAM16K[0] 3,\nset RAM16K[1] 5,\noutput;\n\nrepeat 14 {\n tick, tock, output;\n}\n\n// resets the PC\nset reset 1,\ntick, tock, output;\n\n// second run: computes max(23456,12345)\nset reset 0,\nset RAM16K[0] 23456,\nset RAM16K[1] 12345,\noutput;\n\n// The run on these inputs requires less cycles (different branching)\nrepeat 10 {\n tick, tock, output;\n}\n',"ComputerMax.cmp":"|time |reset|ARegister|DRegister|PC[]|RAM16K[0]|RAM16K[1]|RAM16K[2]|\n| 0 | 0 | 0 | 0 | 0| 3 | 5 | 0 |\n| 1 | 0 | 0 | 0 | 1| 3 | 5 | 0 |\n| 2 | 0 | 0 | 3 | 2| 3 | 5 | 0 |\n| 3 | 0 | 1 | 3 | 3| 3 | 5 | 0 |\n| 4 | 0 | 1 | -2 | 4| 3 | 5 | 0 |\n| 5 | 0 | 10 | -2 | 5| 3 | 5 | 0 |\n| 6 | 0 | 10 | -2 | 6| 3 | 5 | 0 |\n| 7 | 0 | 1 | -2 | 7| 3 | 5 | 0 |\n| 8 | 0 | 1 | 5 | 8| 3 | 5 | 0 |\n| 9 | 0 | 12 | 5 | 9| 3 | 5 | 0 |\n| 10 | 0 | 12 | 5 | 12| 3 | 5 | 0 |\n| 11 | 0 | 2 | 5 | 13| 3 | 5 | 0 |\n| 12 | 0 | 2 | 5 | 14| 3 | 5 | 5 |\n| 13 | 0 | 14 | 5 | 15| 3 | 5 | 5 |\n| 14 | 0 | 14 | 5 | 14| 3 | 5 | 5 |\n| 15 | 1 | 14 | 5 | 0| 3 | 5 | 5 |\n| 15 | 0 | 14 | 5 | 0| 23456 | 12345 | 5 |\n| 16 | 0 | 0 | 5 | 1| 23456 | 12345 | 5 |\n| 17 | 0 | 0 | 23456 | 2| 23456 | 12345 | 5 |\n| 18 | 0 | 1 | 23456 | 3| 23456 | 12345 | 5 |\n| 19 | 0 | 1 | 11111 | 4| 23456 | 12345 | 5 |\n| 20 | 0 | 10 | 11111 | 5| 23456 | 12345 | 5 |\n| 21 | 0 | 10 | 11111 | 10| 23456 | 12345 | 5 |\n| 22 | 0 | 0 | 11111 | 11| 23456 | 12345 | 5 |\n| 23 | 0 | 0 | 23456 | 12| 23456 | 12345 | 5 |\n| 24 | 0 | 2 | 23456 | 13| 23456 | 12345 | 5 |\n| 25 | 0 | 2 | 23456 | 14| 23456 | 12345 | 23456 |","ComputerRect.tst":"// This file is part of www.nand2tetris.org\n// and the book \"The Elements of Computing Systems\"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/5/ComputerRect.tst\n\n// Tests the Computer chip by having it execute the program Rect.hack.\n// The program draws a rectangle of width 16 pixels and length RAM[0]\n// at the top left corner of the screen.\n\n// Tracks the values of the time, A-register, D-register, program counter, R0, R1, and R2.\noutput-list time%S1.3.1 ARegister[]%D1.7.1 DRegister[]%D1.7.1 PC[]%D0.4.0 RAM16K[0]%D1.7.1 RAM16K[1]%D1.7.1 RAM16K[2]%D1.7.1;\n\n// Loads the binary program Rect.hack into the computer's instruction memory \nROM32K load Rect.hack,\n\necho \"Before you run this script, select the 'Screen' option from the 'View' menu\";\n\necho \"A small rectangle should be drawn at the top left of the screen (the 'Screen' option of the 'View' menu should be selected.)\";\n\n// Draws a rectangle consisting of 4 rows (each 16 pixels wide)\nset RAM16K[0] 4,\noutput;\n\nrepeat 63 {\n tick, tock, output;\n}","ComputerRect.cmp":"|time |ARegister|DRegister|PC[]|RAM16K[0]|RAM16K[1]|RAM16K[2]|\n| 0 | 0 | 0 | 0| 4 | 0 | 0 |\n| 1 | 0 | 0 | 1| 4 | 0 | 0 |\n| 2 | 0 | 4 | 2| 4 | 0 | 0 |\n| 3 | 23 | 4 | 3| 4 | 0 | 0 |\n| 4 | 23 | 4 | 4| 4 | 0 | 0 |\n| 5 | 16 | 4 | 5| 4 | 0 | 0 |\n| 6 | 16 | 4 | 6| 4 | 0 | 0 |\n| 7 | 16384 | 4 | 7| 4 | 0 | 0 |\n| 8 | 16384 | 16384 | 8| 4 | 0 | 0 |\n| 9 | 17 | 16384 | 9| 4 | 0 | 0 |\n| 10 | 17 | 16384 | 10| 4 | 0 | 0 |\n| 11 | 17 | 16384 | 11| 4 | 0 | 0 |\n| 12 | 16384 | 16384 | 12| 4 | 0 | 0 |\n| 13 | 16384 | 16384 | 13| 4 | 0 | 0 |\n| 14 | 17 | 16384 | 14| 4 | 0 | 0 |\n| 15 | 17 | 16384 | 15| 4 | 0 | 0 |\n| 16 | 32 | 16384 | 16| 4 | 0 | 0 |\n| 17 | 32 | 16416 | 17| 4 | 0 | 0 |\n| 18 | 17 | 16416 | 18| 4 | 0 | 0 |\n| 19 | 17 | 16416 | 19| 4 | 0 | 0 |\n| 20 | 16 | 16416 | 20| 4 | 0 | 0 |\n| 21 | 16 | 3 | 21| 4 | 0 | 0 |\n| 22 | 10 | 3 | 22| 4 | 0 | 0 |\n| 23 | 10 | 3 | 10| 4 | 0 | 0 |\n| 24 | 17 | 3 | 11| 4 | 0 | 0 |\n| 25 | 16416 | 3 | 12| 4 | 0 | 0 |\n| 26 | 16416 | 3 | 13| 4 | 0 | 0 |\n| 27 | 17 | 3 | 14| 4 | 0 | 0 |\n| 28 | 17 | 16416 | 15| 4 | 0 | 0 |\n| 29 | 32 | 16416 | 16| 4 | 0 | 0 |\n| 30 | 32 | 16448 | 17| 4 | 0 | 0 |\n| 31 | 17 | 16448 | 18| 4 | 0 | 0 |\n| 32 | 17 | 16448 | 19| 4 | 0 | 0 |\n| 33 | 16 | 16448 | 20| 4 | 0 | 0 |\n| 34 | 16 | 2 | 21| 4 | 0 | 0 |\n| 35 | 10 | 2 | 22| 4 | 0 | 0 |\n| 36 | 10 | 2 | 10| 4 | 0 | 0 |\n| 37 | 17 | 2 | 11| 4 | 0 | 0 |\n| 38 | 16448 | 2 | 12| 4 | 0 | 0 |\n| 39 | 16448 | 2 | 13| 4 | 0 | 0 |\n| 40 | 17 | 2 | 14| 4 | 0 | 0 |\n| 41 | 17 | 16448 | 15| 4 | 0 | 0 |\n| 42 | 32 | 16448 | 16| 4 | 0 | 0 |\n| 43 | 32 | 16480 | 17| 4 | 0 | 0 |\n| 44 | 17 | 16480 | 18| 4 | 0 | 0 |\n| 45 | 17 | 16480 | 19| 4 | 0 | 0 |\n| 46 | 16 | 16480 | 20| 4 | 0 | 0 |\n| 47 | 16 | 1 | 21| 4 | 0 | 0 |\n| 48 | 10 | 1 | 22| 4 | 0 | 0 |\n| 49 | 10 | 1 | 10| 4 | 0 | 0 |\n| 50 | 17 | 1 | 11| 4 | 0 | 0 |\n| 51 | 16480 | 1 | 12| 4 | 0 | 0 |\n| 52 | 16480 | 1 | 13| 4 | 0 | 0 |\n| 53 | 17 | 1 | 14| 4 | 0 | 0 |\n| 54 | 17 | 16480 | 15| 4 | 0 | 0 |\n| 55 | 32 | 16480 | 16| 4 | 0 | 0 |\n| 56 | 32 | 16512 | 17| 4 | 0 | 0 |\n| 57 | 17 | 16512 | 18| 4 | 0 | 0 |\n| 58 | 17 | 16512 | 19| 4 | 0 | 0 |\n| 59 | 16 | 16512 | 20| 4 | 0 | 0 |\n| 60 | 16 | 0 | 21| 4 | 0 | 0 |\n| 61 | 10 | 0 | 22| 4 | 0 | 0 |\n| 62 | 10 | 0 | 23| 4 | 0 | 0 |\n| 63 | 23 | 0 | 24| 4 | 0 | 0 |"}},I={Screen:'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/05/Screen.hdl\n/**\n * The Screen (memory map).\n * Same functionality as a 16-bit 8K RAM:\n * If load is asserted, the value of the register selected by\n * address is set to in; Otherwise, the value does not change.\n * The value of the selected register is emitted by out.\n *\n * This built-in implementation has the side effect of continuously \n * refreshing a visual 256 by 512 black-and-white screen, simulated \n * by the simulator. Each row in the visual screen is represented \n * by 32 consecutive 16-bit words, starting at the top left corner \n * of the visual screen. Thus the pixel at row r from the top and \n * column c from the left (0<=r<256, 0<=c<512) reflects the c%16 \n * bit (counting from LSB to MSB) of the word found in Screen[r*32+c/16]. \n */\nCHIP Screen {\n IN in[16], // what to write\n load, // write-enable bit\n address[13]; // where to read/write\n OUT out[16]; // Screen value at the given address\n\n PARTS:\n BUILTIN Screen;\n CLOCKED in, load;\n}',Keyboard:'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/05/Keyboard.hdl\n/**\n * The keyboard (memory map).\n * Outputs the character code of the currently pressed key,\n * or 0 if no key is pressed.\n *\n * This built-in implementation has a visualization side effect.\n */\nCHIP Keyboard {\n OUT out[16];\n\n PARTS:\n BUILTIN Keyboard;\n}',DRegister:'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/05/DRegister.hdl\n/**\n * A 16-bit register named DRegister with the same functionality\n * of the Register chip:\n * If load is asserted, the register\'s value is set to in;\n * Otherwise, the register maintains its current value.\n * out(t+1) = (load(t), in(t), out(t))\n *\n * This built-in implementation has a visualization side effect.\n */\nCHIP DRegister {\n IN in[16], load;\n OUT out[16];\n\n PARTS:\n BUILTIN DRegister;\n CLOCKED in, load;\n}',ARegister:'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/05/ARegister.hdl\n/**\n * A 16-bit register named ARegister with the same functionality\n * of the Register chip:\n * If load is asserted, the register\'s value is set to in;\n * Otherwise, the register maintains its current value.\n * out(t+1) = (load(t), in(t), out(t))\n *\n * This built-in implementation has a visualization side effect.\n */\n CHIP ARegister {\n IN in[16], load;\n OUT out[16];\n\n PARTS:\n BUILTIN ARegister;\n CLOCKED in, load;\n}',ROM32K:'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/05/ROM32K.hdl\n/**\n * Read-Only memory (ROM) of 32K registers, each 16-bit wide.\n * Facilitates data read, as follows:\n * out(t) = ROM32K[address(t)](t)\n * In words: the chip outputs the value stored at the \n * memory location specified by address.\n *\n * Can be used as the instruction memory of the Hack computer.\n * To that end, the built-in chip implementation supports the handling \n * of the "ROM32K load Xxx" script command, where Xxx is the name of a\n * text file containing a program written in the binary Hack machine language.\n * When the simulator encounters such a command in a test script,\n * the file\'s contents is loaded into the simulated ROM32K chip.\n */\n CHIP ROM32K {\n IN address[15];\n OUT out[16];\n\n PARTS:\n BUILTIN ROM32K;\n}',RAM16K:y.replace("//// Replace this comment with your code.","BUILTIN RAM16K;")};async function F(n){await n.pushd("/projects/05"),await(0,r.cL)(n,P),await n.popd(),await n.pushd("/samples"),await n.writeFile("Add.hack",C),await n.writeFile("Max.hack",x),await n.writeFile("Rect.hack",D),await n.popd()}async function N(n){await n.pushd("/projects/05"),await c(n,P,".tst"),await c(n,P,".cmp"),await n.popd()}const E={SimpleAdd:{"SimpleAdd.vm":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/7/StackArithmetic/SimpleAdd/SimpleAdd.vm\n\n// Pushes and adds two constants.\n\npush constant 7\npush constant 8\nadd\n',"SimpleAddVME.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/7/StackArithmetic/SimpleAdd/SimpleAddVME.tst\n\n// Tests and illustrates SimpleAdd.vm on the VM simulator.\n\nload SimpleAdd.vm,\n\nset RAM[0] 256, // initializes the stack pointer\n\nrepeat 3 { // SimpleAdd.vm has 3 VM commands\n vmstep;\n}\n\n// Outputs the stack pointer and the value at the stack\'s base\noutput-list RAM[0]%D2.6.2 RAM[256]%D2.6.2;\noutput;',"SimpleAdd.cmp":"| RAM[0] | RAM[256] |\n| 257 | 15 |\n","SimpleAdd.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/7/StackArithmetic/SimpleAdd/SimpleAdd.tst\n\n// Tests SimpleAdd.asm on the CPU emulator.\n\nset RAM[0] 256, // initializes the stack pointer \n\nrepeat 60 { // enough cycles to complete the execution\n ticktock;\n}\n\n// Outputs the stack pointer and the value at the stack\'s base\noutput-list RAM[0]%D2.6.2 RAM[256]%D2.6.2;\noutput;\n'},StackTest:{"StackTest.vm":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/7/StackArithmetic/StackTest/StackTest.vm\n\n// Executes a sequence of arithmetic and logical operations on the stack. \n\npush constant 17\npush constant 17\neq\npush constant 17\npush constant 16\neq\npush constant 16\npush constant 17\neq\npush constant 892\npush constant 891\nlt\npush constant 891\npush constant 892\nlt\npush constant 891\npush constant 891\nlt\npush constant 32767\npush constant 32766\ngt\npush constant 32766\npush constant 32767\ngt\npush constant 32766\npush constant 32766\ngt\npush constant 57\npush constant 31\npush constant 53\nadd\npush constant 112\nsub\nneg\nand\npush constant 82\nor\nnot\n',"StackTestVME.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/7/StackArithmetic/StackTest/StackTestVME.tst\n\n// Tests and illustrates StackTest.vm on the VM simulator.\n\nload StackTest.vm,\n\nset RAM[0] 256, // initializes the stack pointer\n\nrepeat 38 { // StackTest.vm has 38 VM commands\n vmstep;\n}\n\n// Outputs the stack pointer (RAM[0]) and the stack contents: RAM[256]-RAM[265]\noutput-list RAM[0]%D2.6.2 \n RAM[256]%D2.6.2 RAM[257]%D2.6.2 RAM[258]%D2.6.2 RAM[259]%D2.6.2 RAM[260]%D2.6.2;\noutput;\noutput-list RAM[261]%D2.6.2 RAM[262]%D2.6.2 RAM[263]%D2.6.2 RAM[264]%D2.6.2 RAM[265]%D2.6.2;\noutput;\n',"StackTest.cmp":"| RAM[0] | RAM[256] | RAM[257] | RAM[258] | RAM[259] | RAM[260] |\n| 266 | -1 | 0 | 0 | 0 | -1 |\n| RAM[261] | RAM[262] | RAM[263] | RAM[264] | RAM[265] |\n| 0 | -1 | 0 | 0 | -91 |\n","StackTest.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/7/StackArithmetic/StackTest/StackTest.tst\n\n// Tests StackTest.asm on the CPU emulator.\n\nset RAM[0] 256, // initializes the stack pointer\n\nrepeat 1000 { // enough cycles to complete the execution\n ticktock;\n}\n\n// Outputs the stack pointer and the stack contents: RAM[256]-RAM[265]\noutput-list RAM[0]%D2.6.2 \n RAM[256]%D2.6.2 RAM[257]%D2.6.2 RAM[258]%D2.6.2 RAM[259]%D2.6.2 RAM[260]%D2.6.2;\noutput;\noutput-list RAM[261]%D2.6.2 RAM[262]%D2.6.2 RAM[263]%D2.6.2 RAM[264]%D2.6.2 RAM[265]%D2.6.2;\noutput;\n'},BasicTest:{"BasicTest.vm":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/7/MemoryAccess/BasicTest/BasicTest.vm\n\n// Executes pop and push commands.\n\npush constant 10\npop local 0\npush constant 21\npush constant 22\npop argument 2\npop argument 1\npush constant 36\npop this 6\npush constant 42\npush constant 45\npop that 5\npop that 2\npush constant 510\npop temp 6\npush local 0\npush that 5\nadd\npush argument 1\nsub\npush this 6\npush this 6\nadd\nsub\npush temp 6\nadd\n',"BasicTestVME.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/7/MemoryAccess/BasicTest/BasicTestVME.tst\n\n// Tests and illustrates BasicTest.vm on the VM simulator.\n// Starts by setting the stack pointer and the base addresses\n// of relevant memory segments to selected RAM addresses.\n\nload BasicTest.vm,\n\nset sp 256, // stack pointer\nset local 300, // base address of the local segment\nset argument 400, // base address of the argument segment\nset this 3000, // base address of the this segment\nset that 3010, // base address of the that segment\n\nrepeat 25 { // BasicTest.vm has 25 VM commands\n vmstep;\n}\n\n// Outputs the value at the stack\'s base and some values from the tested memory segments\noutput-list RAM[256]%D1.6.1 RAM[300]%D1.6.1 RAM[401]%D1.6.1 \n RAM[402]%D1.6.1 RAM[3006]%D1.6.1 RAM[3012]%D1.6.1\n RAM[3015]%D1.6.1 RAM[11]%D1.6.1;\noutput;\n',"BasicTest.cmp":"|RAM[256]|RAM[300]|RAM[401]|RAM[402]|RAM[3006|RAM[3012|RAM[3015|RAM[11] |\n| 472 | 10 | 21 | 22 | 36 | 42 | 45 | 510 |","BasicTest.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/7/MemoryAccess/BasicTest/BasicTest.tst\n\n// Tests BasicTest.asm on the CPU emulator.\n\nset RAM[0] 256, // stack pointer\nset RAM[1] 300, // base address of the local segment\nset RAM[2] 400, // base address of the argument segment\nset RAM[3] 3000, // base address of the this segment\nset RAM[4] 3010, // base address of the that segment\n\nrepeat 600 { // enough cycles to complete the execution\n ticktock;\n}\n\n// Outputs the value at the stack\'s base and some values from the tested memory segments\noutput-list RAM[256]%D1.6.1 RAM[300]%D1.6.1 RAM[401]%D1.6.1 \n RAM[402]%D1.6.1 RAM[3006]%D1.6.1 RAM[3012]%D1.6.1\n RAM[3015]%D1.6.1 RAM[11]%D1.6.1;\noutput;\n'},PointerTest:{"PointerTest.vm":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/7/MemoryAccess/PointerTest/PointerTest.vm\n\n// Executes pop and push commands using the \n// pointer, this, and that segments.\n\npush constant 3030\npop pointer 0\npush constant 3040\npop pointer 1\npush constant 32\npop this 2\npush constant 46\npop that 6\npush pointer 0\npush pointer 1\nadd\npush this 2\nsub\npush that 6\nadd\n',"PointerTestVME.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/7/MemoryAccess/PointerTest/PointerTestVME.tst\n\n// Tests and illustrates PointerTest.vm on the VM simulator.\n\nload PointerTest.vm,\n\nset RAM[0] 256, // initializes the stack pointer\n\nrepeat 15 { // PointerTest.vm has 15 VM commands\n vmstep;\n}\n\n// Outputs the stack base, THIS, THAT, and\n// some values from the the this and that segments\noutput-list RAM[256]%D1.6.1 RAM[3]%D1.6.1 RAM[4]%D1.6.1\n RAM[3032]%D1.6.1 RAM[3046]%D1.6.1;\noutput;\n',"PointerTest.cmp":"|RAM[256]| RAM[3] | RAM[4] |RAM[3032|RAM[3046|\n | 6084 | 3030 | 3040 | 32 | 46 |","PointerTest.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/7/MemoryAccess/PointerTest/PointerTest.tst\n\n// Tests PointerTest.asm on the CPU emulator.\n\nset RAM[0] 256, // initializes the stack pointer\n\nrepeat 450 { // enough cycles to complete the execution\n ticktock;\n}\n\n// Outputs the value at the stack\'s base, THIS, THAT, and\n// some values from the the this and that segments\noutput-list RAM[256]%D1.6.1 RAM[3]%D1.6.1 \n RAM[4]%D1.6.1 RAM[3032]%D1.6.1 RAM[3046]%D1.6.1;\noutput;\n'},StaticTest:{"StaticTest.vm":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/7/MemoryAccess/StaticTest/StaticTest.vm\n\n// Executes pop and push commands using the static segment.\n\npush constant 111\npush constant 333\npush constant 888\npop static 8\npop static 3\npop static 1\npush static 3\npush static 1\nsub\npush static 8\nadd\n',"StaticTestVME.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/7/MemoryAccess/StaticTest/StaticTestVME.tst\n\n// Tests and illustrates StaticTest.vm on the VM simulator.\n\nload StaticTest.vm,\n\nset sp 256, // initializes the stack pointer\n\nrepeat 11 { // StaticTest.vm has 11 VM commands\n vmstep;\n}\n\n// Outputs the value at the stack\'s base \noutput-list RAM[256]%D1.6.1;\noutput;\n',"StaticTest.cmp":"|RAM[256]|\n| 1110 |","StaticTest.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/7/MemoryAccess/StaticTest/StaticTest.tst\n\n// Tests StaticTest.asm on the CPU emulator.\n\nset RAM[0] 256, // initializes the stack pointer\n\nrepeat 200 { // enough cycles to complete the execution\n ticktock;\n}\n\n// Outputs the value at the stack\'s base \noutput-list RAM[256]%D1.6.1;\noutput;\n'}};async function z(n){await n.pushd("/projects/07"),await(0,r.cL)(n,E),await n.popd()}async function O(n){await n.pushd("/projects/07"),await c(n,E,".tst"),await c(n,E,"VME.tst"),await c(n,E,".cmp"),await n.popd()}const j={BasicLoop:{"BasicLoop.vm":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/8/ProgramFlow/BasicLoop/BasicLoop.vm\n\n// Computes the sum 1 + 2 + ... + n and pushes the result onto\n// the stack. The value n is given in argument[0], which must be \n// initialized by the caller of this code.\n\n\tpush constant 0 \n\tpop local 0 // sum = 0\nlabel LOOP\n\tpush argument 0 \n\tpush local 0\n\tadd\n\tpop local 0\t // sum = sum + n\n\tpush argument 0\n\tpush constant 1\n\tsub\n\tpop argument 0 // n--\n\tpush argument 0\n\tif-goto LOOP // if n > 0, goto LOOP\n\tpush local 0 // else, pushes sum to the stack\'s top\n',"BasicLoopVME.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/8/ProgramFlow/BasicLoop/BasicLoopVME.tst\n\n// Tests and illustrates BasicLoop.vm on the VM emulator.\n// Before executing the code, initializes the stack pointer\n// and the base addresses of the local and argument segments,\n// and sets argument[0].\n\nload BasicLoop.vm,\n\nset sp 256,\nset local 300,\nset argument 400,\nset argument[0] 3,\n\nrepeat 33 {\n \tvmstep;\n}\n\n// Outputs the stack pointer and the value at the stack\'s base\noutput-list RAM[0]%D1.6.1 RAM[256]%D1.6.1;\noutput;\n',"BasicLoop.cmp":"| RAM[0] |RAM[256]|\n| 257 | 6 |\n","BasicLoop.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/8/ProgramFlow/BasicLoop/BasicLoop.tst\n\n// Tests BasicLoop.asm on the CPU emulator.\n// Before executing the code, initializes the stack pointer\n// and the base addresses of the local and argument segments,\n// and sets argument[0].\n\nset RAM[0] 256, // SP\nset RAM[1] 300, // LCL\nset RAM[2] 400, // ARG\nset RAM[400] 3, // argument 0\n\nrepeat 600 {\n\tticktock;\n}\n\n// Outputs the stack pointer and the value at the stack\'s base\noutput-list RAM[0]%D1.6.1 RAM[256]%D1.6.1;\noutput;\n'},FibonacciSeries:{"FibonacciSeries.vm":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/8/ProgramFlow/FibonacciSeries/FibonacciSeries.vm\n\n// Puts the first n elements of the Fibonacci series in the memory,\n// starting at address addr. n and addr are given in argument[0] and\n// argument[1], which must be initialized by the caller of this code.\n\n\tpush argument 1 // sets THAT, the base address of the\n\tpop pointer 1 // that segment, to argument[1]\n\tpush constant 0 // sets the series\' first and second\n\tpop that 0 // elements to 0 and 1, respectively \n\tpush constant 1 \n\tpop that 1 \n\tpush argument 0 // sets n, the number of remaining elements\n\tpush constant 2 // to be computed, to argument[0] minus 2,\n\tsub // since 2 elements were already computed.\n\tpop argument 0 \n\nlabel LOOP\n\tpush argument 0\n\tif-goto COMPUTE_ELEMENT // if n > 0, goto COMPUTE_ELEMENT\n\tgoto END // otherwise, goto END\n\nlabel COMPUTE_ELEMENT\n // that[2] = that[0] + that[1]\n\tpush that 0\n\tpush that 1\n\tadd\n\tpop that 2\n\t// THAT += 1 (updates the base address of that)\n\tpush pointer 1\n\tpush constant 1\n\tadd\n\tpop pointer 1 \n\t// updates n-- and loops \n\tpush argument 0\n\tpush constant 1\n\tsub\n\tpop argument 0 \n\tgoto LOOP\n\nlabel END\n',"FibonacciSeriesVME.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/8/ProgramFlow/FibonacciSeries/FibonacciSeriesVME.tst\n\n// Tests and illustrates FibonacciSeries.vm on the VM emulator.\n// Before executing the code, initializes the stack pointer\n// and the base addresses of the local and argument segments,\n// and sets argument[0] to n and argument [1] to the base address\n// of the generated series.\n\nload FibonacciSeries.vm,\n\nset sp 256,\nset local 300,\nset argument 400,\nset argument[0] 6,\nset argument[1] 3000,\n\nrepeat 73 {\n\tvmstep;\n}\n\n// Outputs the series of values generated and written by the code.\noutput-list RAM[3000]%D1.6.2 RAM[3001]%D1.6.2 RAM[3002]%D1.6.2 \n RAM[3003]%D1.6.2 RAM[3004]%D1.6.2 RAM[3005]%D1.6.2;\noutput;\n',"FibonacciSeries.cmp":"|RAM[3000]|RAM[3001]|RAM[3002]|RAM[3003]|RAM[3004]|RAM[3005]|\n| 0 | 1 | 1 | 2 | 3 | 5 |\n","FibonacciSeries.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/8/ProgramFlow/FibonacciSeries/FibonacciSeries.tst\n\n// Tests FibonacciSeries.asm on the CPU emulator.\n// Before executing the code, initializes the stack pointer\n// and the base addresses of the local and argument segments,\n// and sets argument[0] and argument [1].\n\nset RAM[0] 256, // SP\nset RAM[1] 300, // LCL\nset RAM[2] 400, // ARG\nset RAM[400] 6, // argument[0], n\nset RAM[401] 3000, // argument[1], base address of the generated series\n\nrepeat 1100 {\n\tticktock;\n}\n\n// Outputs the series of values generated and written by the code.\noutput-list RAM[3000]%D1.6.2 RAM[3001]%D1.6.2 RAM[3002]%D1.6.2 \n RAM[3003]%D1.6.2 RAM[3004]%D1.6.2 RAM[3005]%D1.6.2;\noutput;\n'},SimpleFunction:{"SimpleFunction.vm":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/8/FunctionCalls/SimpleFunction/SimpleFunction.vm\n\n// Performs a simple calculation and returns the result.\n// argument[0] and argument[1] must be set by the caller.\n\nfunction SimpleFunction.test 2\n\tpush local 0\n\tpush local 1\n\tadd\n\tnot\n\tpush argument 0\n\tadd\n\tpush argument 1\n\tsub\n\treturn\n',"SimpleFunctionVME.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/8/FunctionCalls/SimpleFunction/SimpleFunctionVME.tst\n\n// Tests and illustrates SimpleFunction.vm in the VM emulator. \n// Before executing the code, initializes the stack pointer\n// and the base addresses of some of the memory segments, \n// and sets some values in the argument segment.\n\nload SimpleFunction.vm,\n\nset sp 317,\nset local 317,\nset argument 310,\nset this 3000,\nset that 4000,\nset argument[0] 1234,\nset argument[1] 37,\nset argument[2] 9,\nset argument[3] 305,\nset argument[4] 300,\nset argument[5] 3010,\nset argument[6] 4010,\n\nrepeat 10 {\n\tvmstep;\n}\n\n// Outputs SP, LCL, ARG, THIS, THAT, and the return value.\noutput-list RAM[0]%D1.6.1 RAM[1]%D1.6.1 RAM[2]%D1.6.1 \n RAM[3]%D1.6.1 RAM[4]%D1.6.1 RAM[310]%D1.6.1;\noutput;\n',"SimpleFunction.cmp":"| RAM[0] | RAM[1] | RAM[2] | RAM[3] | RAM[4] |RAM[310]|\n| 311 | 305 | 300 | 3010 | 4010 | 1196 |\n","SimpleFunction.tst":"// This file is part of www.nand2tetris.org\n// and the book \"The Elements of Computing Systems\"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/8/FunctionCalls/SimpleFunction/SimpleFunction.tst\n\n// Tests SimpleFunction.asm in the CPU emulator.\n// In particular, tests how the assembly implementation of the 'function'\n// VM command initializes local variables, and how the assembly implementation\n// of the 'return' VM command handles the return value, SP, LCL, ARG, THIS, and THAT. \n// Before executing the code, initializes the stack pointer and the pointers of some\n// of the memory segments, and sets some values in the argument segment.\n\nset RAM[0] 317, // SP\nset RAM[1] 317, // LCL\nset RAM[2] 310, // ARG\nset RAM[3] 3000, // THIS\nset RAM[4] 4000, // THAT\nset RAM[310] 1234, \nset RAM[311] 37, \nset RAM[312] 1000, \nset RAM[313] 305,\nset RAM[314] 300,\nset RAM[315] 3010,\nset RAM[316] 4010, \n\nrepeat 300 {\n\tticktock;\n}\n\n// Outputs SP, LCL, ARG, THIS, THAT, and the return value.\noutput-list RAM[0]%D1.6.1 RAM[1]%D1.6.1 RAM[2]%D1.6.1 \n RAM[3]%D1.6.1 RAM[4]%D1.6.1 RAM[310]%D1.6.1;\noutput;\n"},NestedCall:{"Sys.vm":"// Sys.vm. Tested by the NestedCall test script.\n// Consists of three functions: Sys.init, Sys.main, and Sys.add12.\n\n// Calls Sys.main() and stores a return value in temp 1.\n// Does not return (enters infinite loop).\n// The VM implementation starts running the Sys.init function, by default.\nfunction Sys.init 0\n\tpush constant 4000\t// tests that THIS and THAT are handled correctly\n\tpop pointer 0\n\tpush constant 5000\n\tpop pointer 1\n\tcall Sys.main 0\n\tpop temp 1\n\tlabel LOOP\n\tgoto LOOP\n\n// Sets locals 1, 2 and 3 to some values. Leaves locals 0 and 4 unchanged, \n// to test that the 'function' VM command initliazes them to 0 (the test \n// script sets them to -1 before this code starts running).\n// Calls Sys.add12(123) and stores the return value (should be 135) in temp 0.\n// Returns local 0 + local 1 + local 2 + local 3 + local 4 (should be 456), to \n// confirm that locals were not mangled by the function call.\nfunction Sys.main 5\n\tpush constant 4001\n\tpop pointer 0\n\tpush constant 5001\n\tpop pointer 1\n\tpush constant 200\n\tpop local 1\n\tpush constant 40\n\tpop local 2\n\tpush constant 6\n\tpop local 3\n\tpush constant 123\n\tcall Sys.add12 1\n\tpop temp 0\n\tpush local 0\n\tpush local 1\n\tpush local 2\n\tpush local 3\n\tpush local 4\n\tadd\n\tadd\n\tadd\n\tadd\n\treturn\n\n// Returns (argument 0) + 12.\nfunction Sys.add12 0\n\tpush constant 4002\n\tpop pointer 0\n\tpush constant 5002\n\tpop pointer 1\n\tpush argument 0\n\tpush constant 12\n\tadd\n\treturn\n","NestedCallVME.tst":"// Tests and illustrates how the VM implementation handles function-call-and-return,\n// by executing the functions in Sys.vm in the VM emulator.\n// In particular, loads and runs the functions in Sys.vm.\n\nload Sys.vm,\noutput-list RAM[0]%D1.6.1 RAM[1]%D1.6.1 RAM[2]%D1.6.1 RAM[3]%D1.6.1 RAM[4]%D1.6.1 RAM[5]%D1.6.1 RAM[6]%D1.6.1;\n\nset RAM[0] 261,\nset RAM[1] 261,\nset RAM[2] 256,\nset RAM[3] -3,\nset RAM[4] -4,\nset RAM[5] -1, // test results\nset RAM[6] -1,\nset RAM[256] 1234, // fake stack frame from call Sys.init\nset RAM[257] -1,\nset RAM[258] -2,\nset RAM[259] -3,\nset RAM[260] -4,\n\nset RAM[261] -1, // Initialize stack to check for local segment\nset RAM[262] -1, // being cleared to zero.\nset RAM[263] -1,\nset RAM[264] -1,\nset RAM[265] -1,\nset RAM[266] -1,\nset RAM[267] -1,\nset RAM[268] -1,\nset RAM[269] -1,\nset RAM[270] -1,\nset RAM[271] -1,\nset RAM[272] -1,\nset RAM[273] -1,\nset RAM[274] -1,\nset RAM[275] -1,\nset RAM[276] -1,\nset RAM[277] -1,\nset RAM[278] -1,\nset RAM[279] -1,\nset RAM[280] -1,\nset RAM[281] -1,\nset RAM[282] -1,\nset RAM[283] -1,\nset RAM[284] -1,\nset RAM[285] -1,\nset RAM[286] -1,\nset RAM[287] -1,\nset RAM[288] -1,\nset RAM[289] -1,\nset RAM[290] -1,\nset RAM[291] -1,\nset RAM[292] -1,\nset RAM[293] -1,\nset RAM[294] -1,\nset RAM[295] -1,\nset RAM[296] -1,\nset RAM[297] -1,\nset RAM[298] -1,\nset RAM[299] -1,\n\nset sp 261,\nset local 261,\nset argument 256,\nset this 3000,\nset that 4000;\n\nrepeat 50 {\n\tvmstep;\n}\noutput;\n","NestedCall.cmp":"| RAM[0] | RAM[1] | RAM[2] | RAM[3] | RAM[4] | RAM[5] | RAM[6] |\n| 261 | 261 | 256 | 4000 | 5000 | 135 | 246 |\n","NestedCall.tst":"// Tests how the VM implementation handles function-call-and-return,\n// by executing the functions in Sys.vm.\n// In particular, loads and runs NestedCall.asm, which results when \n// the VM translator is applied to the NestedCall folder, which \n// includes only one VM file: Sys.vm.\n\nset RAM[0] 261,\nset RAM[1] 261,\nset RAM[2] 256,\nset RAM[3] -3,\nset RAM[4] -4,\nset RAM[5] -1, // test results\nset RAM[6] -1,\nset RAM[256] 1234, // fake stack frame from call Sys.init\nset RAM[257] -1,\nset RAM[258] -2,\nset RAM[259] -3,\nset RAM[260] -4,\n\nset RAM[261] -1, // Initializes the stack, to check that the local segment\nset RAM[262] -1, // is initialized to zeros by the 'function' VM command.\nset RAM[263] -1,\nset RAM[264] -1,\nset RAM[265] -1,\nset RAM[266] -1,\nset RAM[267] -1,\nset RAM[268] -1,\nset RAM[269] -1,\nset RAM[270] -1,\nset RAM[271] -1,\nset RAM[272] -1,\nset RAM[273] -1,\nset RAM[274] -1,\nset RAM[275] -1,\nset RAM[276] -1,\nset RAM[277] -1,\nset RAM[278] -1,\nset RAM[279] -1,\nset RAM[280] -1,\nset RAM[281] -1,\nset RAM[282] -1,\nset RAM[283] -1,\nset RAM[284] -1,\nset RAM[285] -1,\nset RAM[286] -1,\nset RAM[287] -1,\nset RAM[288] -1,\nset RAM[289] -1,\nset RAM[290] -1,\nset RAM[291] -1,\nset RAM[292] -1,\nset RAM[293] -1,\nset RAM[294] -1,\nset RAM[295] -1,\nset RAM[296] -1,\nset RAM[297] -1,\nset RAM[298] -1,\nset RAM[299] -1,\n\nrepeat 4000 {\n\tticktock;\n}\n\noutput-list RAM[0]%D1.6.1 RAM[1]%D1.6.1 RAM[2]%D1.6.1 RAM[3]%D1.6.1 RAM[4]%D1.6.1 RAM[5]%D1.6.1 RAM[6]%D1.6.1;\noutput;\n"},FibonacciElement:{"Sys.vm":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/8/FunctionCalls/FibonacciElement/Sys.vm\n\n// Containts one function: Sys.init.\n\n// Pushes a constant n onto the stack, and calls the Main.fibonacii\n// function, which computes the n\'th element of the Fibonacci series.\n// Note that by convention, the Sys.init function is called "automatically" \n// by the bootstrap code generated by the VM translator.\nfunction Sys.init 0\n // Computes fibonacci(4)\n\tpush constant 4\n\t// Calls the function, informing that one argument was pushed onto the stack\n\tcall Main.fibonacci 1\nlabel END \n\tgoto END // loops infinitely',"Main.vm":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/8/FunctionCalls/FibonacciElement/Main.vm\n\n// Contains one function: Main.fibonacci.\n\n// Computes the n\'th element of the Fibonacci series, recursively.\n// n is given in argument[0]. Called by the Sys.init function \n// (part of the Sys.vm file), which sets argument[0] to an input\n// value and then calls Main.fibonacci.\nfunction Main.fibonacci 0\n\tpush argument 0\n\tpush constant 2\n\tlt \n\tif-goto N_LT_2 \n\tgoto N_GE_2\nlabel N_LT_2 // if n < 2 returns n\n\tpush argument 0 \n\treturn\nlabel N_GE_2 // if n >= 2 returns fib(n - 2) + fib(n - 1)\n\tpush argument 0\n\tpush constant 2\n\tsub\n\tcall Main.fibonacci 1 // computes fib(n - 2)\n\tpush argument 0\n\tpush constant 1\n\tsub\n\tcall Main.fibonacci 1 // computes fib(n - 1)\n\tadd // returns fib(n - 1) + fib(n - 2)\n\treturn\n',"FibonacciElementVME.tst":"// This file is part of www.nand2tetris.org\n// and the book \"The Elements of Computing Systems\"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/8/FunctionCalls/FibonacciElement/FibonacciElementVME.tst\n\n// Tests and illustrates the given Fibonacci element program on the VM emulator.\n\nload,\n\nset sp 261,\n\nrepeat 110 {\n vmstep;\n}\n\n// Outputs the stack pointer and the value at the stack's base.\n// That's where the implementation should put the return value. \noutput-list RAM[0]%D1.6.1 RAM[261]%D1.6.1;\noutput;\n","FibonacciElement.cmp":"| RAM[0] |RAM[261]|\n| 262 | 3 |\n","FibonacciElement.tst":"// This file is part of www.nand2tetris.org\n// and the book \"The Elements of Computing Systems\"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/8/FunctionCalls/FibonacciElement/FibonacciElement.tst\n\n// Tests FibonacciElement.asm on the CPU emulator. \n// FibonacciElement.asm results from translating Main.vm and Sys.vm into\n// a single assembly program, stored in the file FibonacciElement.asm.\n\nrepeat 6000 {\n\tticktock;\n}\n\n// Outputs the stack pointer and the value at the stack's base.\n// That's where the implementation should put the return value.\noutput-list RAM[0]%D1.6.1 RAM[261]%D1.6.1;\noutput;\n"},StaticsTest:{"Class1.vm":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/8/FunctionCalls/StaticsTest/Class1.vm\n\n// Stores two supplied arguments in static[0] and static[1].\nfunction Class1.set 0\n\tpush argument 0\n\tpop static 0\n\tpush argument 1\n\tpop static 1\n\tpush constant 0\n\treturn\n\n// Returns static[0] - static[1].\nfunction Class1.get 0\n\tpush static 0\n\tpush static 1\n\tsub\n\treturn',"Class2.vm":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/8/FunctionCalls/StaticsTest/Class2.vm\n\n// Stores two supplied arguments in static[0] and static[1].\nfunction Class2.set 0\n\tpush argument 0\n\tpop static 0\n\tpush argument 1\n\tpop static 1\n\tpush constant 0\n\treturn\n\n// Returns static[0] - static[1].\nfunction Class2.get 0\n\tpush static 0\n\tpush static 1\n\tsub\n\treturn',"Sys.vm":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/8/FunctionCalls/StaticsTest/Sys.vm\n\n// Tests that different functions, stored in two different \n// class files, manipulate the static segment correctly. \n\nfunction Sys.init 0\n\tpush constant 6\n\tpush constant 8\n\tcall Class1.set 2\n\tpop temp 0 // dumps the return value\n\tpush constant 23\n\tpush constant 15\n\tcall Class2.set 2\n\tpop temp 0 // dumps the return value\n\tcall Class1.get 0\n\tcall Class2.get 0\nlabel END\n\tgoto END',"StaticsTestVME.tst":'// This file is part of www.nand2tetris.org\n// and the book "The Elements of Computing Systems"\n// by Nisan and Schocken, MIT Press.\n// File name: projects/8/FunctionCalls/StaticsTest/StaticsTestVME.tst\n\n// Tests and illustrates the statics test on the VM emulator.\n\nload,\n\nset sp 261,\n\nrepeat 36 {\n\tvmstep;\n}\n\noutput-list RAM[0]%D1.6.1 RAM[261]%D1.6.1 RAM[262]%D1.6.1;\noutput;\n',"StaticsTest.cmp":"| RAM[0] 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