From f6cc8faeb206fd0e03e8b0cfae019514467f22a4 Mon Sep 17 00:00:00 2001 From: netalondon <67196883+netalondon@users.noreply.github.com> Date: Mon, 26 Feb 2024 13:15:39 +0200 Subject: [PATCH 1/2] Update software suite files (#224) --- components/src/compare.ts | 4 +- components/src/stores/chip.store.ts | 4 +- projects/src/project_01/01_not.ts | 5 +- projects/src/project_01/02_and.ts | 6 +- projects/src/project_01/03_or.ts | 4 +- projects/src/project_01/04_xor.ts | 4 +- projects/src/project_01/05_mux.ts | 4 +- projects/src/project_01/06_dmux.ts | 8 +- projects/src/project_01/08_and16.ts | 4 +- projects/src/project_01/09_or16.ts | 4 +- projects/src/project_01/10_mux16.ts | 4 +- projects/src/project_01/11_mux4way16.ts | 10 +- projects/src/project_01/12_mux8way16.ts | 14 +- projects/src/project_01/13_dmux4way.ts | 10 +- projects/src/project_01/14_dmux8way.ts | 14 +- projects/src/project_01/15_or8way.ts | 2 +- projects/src/project_01/index.ts | 4 +- projects/src/project_02/01_half_adder.ts | 19 +- projects/src/project_02/02_full_adder.ts | 27 +- projects/src/project_02/03_add16.ts | 9 +- projects/src/project_02/04_inc16.ts | 9 +- projects/src/project_02/06_alu.ts | 713 ++++++- projects/src/project_02/index.ts | 28 +- projects/src/project_03/01_bit.ts | 1402 +++++++++--- projects/src/project_03/02_register.ts | 927 ++++++-- projects/src/project_03/03_pc.ts | 219 +- projects/src/project_03/04_ram8.ts | 1049 ++++++--- projects/src/project_03/05_ram64.ts | 1833 +++++++++++----- projects/src/project_03/06_ram512.ts | 1816 +++++++++++----- projects/src/project_03/07_ram4k.ts | 1833 +++++++++++----- projects/src/project_03/08_ram16k.ts | 1872 ++++++++++++----- projects/src/project_03/index.ts | 4 +- projects/src/project_04/01_mult.ts | 42 +- projects/src/project_04/02_fill.ts | 27 +- projects/src/project_04/index.ts | 4 +- projects/src/project_05/01_memory.ts | 238 ++- projects/src/project_05/02_cpu.ts | 487 ++++- projects/src/project_05/03_computer.ts | 270 ++- projects/src/project_05/index.ts | 20 +- projects/src/project_07/11_simple_add.ts | 32 +- projects/src/project_07/12_stack_test.ts | 36 +- projects/src/project_07/21_basic_test.ts | 46 +- projects/src/project_07/22_pointer_test.ts | 36 +- projects/src/project_07/23_static_test.ts | 34 +- projects/src/project_07/index.ts | 5 +- projects/src/project_08/11_basic_loop.ts | 77 +- .../src/project_08/12_fibonacci_series.ts | 45 +- projects/src/project_08/20_simple_function.ts | 54 +- projects/src/project_08/21_nested_call.ts | 31 +- .../src/project_08/22_fibonacci_element.ts | 27 +- projects/src/project_08/23_statics_test.ts | 25 +- projects/src/project_08/index.ts | 5 +- projects/src/reset.ts | 2 +- simulator/src/chip/builtins/all.test.ts | 12 +- .../src/chip/builtins/computer/computer.tsx | 70 +- .../src/chip/builtins/sequential/bit.tsx | 24 +- .../src/chip/builtins/sequential/ram.tsx | 26 +- simulator/src/cpu/cpu.ts | 12 +- simulator/src/languages/grammars/tst.ohm | 9 +- simulator/src/languages/grammars/tst.ohm.js | 9 +- simulator/src/languages/tst.test.ts | 335 +-- simulator/src/languages/tst.ts | 45 +- simulator/src/output.ts | 2 +- simulator/src/test/builder.ts | 64 +- simulator/src/test/chiptst.test.ts | 29 +- simulator/src/test/chiptst.ts | 4 +- simulator/src/test/instruction.ts | 18 + simulator/src/test/tst.ts | 28 +- simulator/src/vm/vm.test.ts | 2 +- simulator/src/vm/vm.ts | 12 +- web/src/pages/chip.tsx | 4 + web/src/versions.ts | 5 +- 72 files changed, 10064 insertions(+), 4054 deletions(-) diff --git a/components/src/compare.ts b/components/src/compare.ts index 61a5733ca..06d8489aa 100644 --- a/components/src/compare.ts +++ b/components/src/compare.ts @@ -33,9 +33,7 @@ function getDiffs(cmpData: Cmp, outData: Cmp): Diff[] { for (let j = 0; j < Math.max(cmpI.length, outI.length); j++) { const cmpJ = cmpI[j] ?? ""; const outJ = outI[j] ?? ""; - if ( - !(cmpJ?.trim().match(/^\*+$/) !== null || outJ?.trim() === cmpJ?.trim()) - ) { + if (!(cmpJ?.trim().match(/^\*+$/) !== null || outJ === cmpJ)) { diffs.push({ row: i, col: j, expected: cmpJ, given: outJ }); } } diff --git a/components/src/stores/chip.store.ts b/components/src/stores/chip.store.ts index 61484d9be..c803c5d95 100644 --- a/components/src/stores/chip.store.ts +++ b/components/src/stores/chip.store.ts @@ -452,11 +452,11 @@ export function makeChipStore( const tst = TST.parse(file); if (isErr(tst)) { - setStatus(`Failed to parse test`); + setStatus(`Failed to parse test ${tst.err.message}`); return false; } - test = ChipTest.from(Ok(tst)).with(chip).reset(); + test = ChipTest.from(Ok(tst), setStatus).with(chip).reset(); test.setFileSystem(fs); dispatch.current({ action: "updateTestStep" }); return true; diff --git a/projects/src/project_01/01_not.ts b/projects/src/project_01/01_not.ts index fea7afeab..3845c60f9 100644 --- a/projects/src/project_01/01_not.ts +++ b/projects/src/project_01/01_not.ts @@ -4,12 +4,11 @@ export const cmp = `|in |out| export const hdl = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/01/Not.hdl +// File name: projects/1/Not.hdl /** * Not gate: - * if (in == 0) out = 1, else out = 0 + * if (in) out = 0, else out = 1 */ - CHIP Not { IN in; OUT out; diff --git a/projects/src/project_01/02_and.ts b/projects/src/project_01/02_and.ts index ecacb9173..e44a29d25 100644 --- a/projects/src/project_01/02_and.ts +++ b/projects/src/project_01/02_and.ts @@ -1,10 +1,10 @@ export const hdl = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/01/And.hdl - /** +// File name: projects/1/And.hdl +/** * And gate: - * if ((a == 1) and (b == 1)) out = 1, else out = 0 + * if (a and b) out = 1, else out = 0 */ CHIP And { IN a, b; diff --git a/projects/src/project_01/03_or.ts b/projects/src/project_01/03_or.ts index a97ed14b5..fdd12db06 100644 --- a/projects/src/project_01/03_or.ts +++ b/projects/src/project_01/03_or.ts @@ -6,10 +6,10 @@ export const cmp = `| a | b |out| export const hdl = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/01/Or.hdl +// File name: projects/1/Or.hdl /** * Or gate: - * if ((a == 1) or (b == 1)) out = 1, else out = 0 + * if (a or b) out = 1, else out = 0 */ CHIP Or { IN a, b; diff --git a/projects/src/project_01/04_xor.ts b/projects/src/project_01/04_xor.ts index 007d152c8..2120f05b7 100644 --- a/projects/src/project_01/04_xor.ts +++ b/projects/src/project_01/04_xor.ts @@ -6,10 +6,10 @@ export const cmp = `| a | b |out| export const hdl = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/01/Xor.hdl +// File name: projects/1/Xor.hdl /** * Exclusive-or gate: - * out = (not(a) and b) or (a and not(b)) + * if ((a and Not(b)) or (Not(a) and b)) out = 1, else out = 0 */ CHIP Xor { IN a, b; diff --git a/projects/src/project_01/05_mux.ts b/projects/src/project_01/05_mux.ts index 7c7d581f9..c57b76c9b 100644 --- a/projects/src/project_01/05_mux.ts +++ b/projects/src/project_01/05_mux.ts @@ -10,10 +10,10 @@ export const cmp = `| a | b |sel|out| export const hdl = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/01/Mux.hdl +// File name: projects/1/Mux.hdl /** * Multiplexor: - * if (sel == 0) out = a, else out = b + * if (sel = 0) out = a, else out = b */ CHIP Mux { IN a, b, sel; diff --git a/projects/src/project_01/06_dmux.ts b/projects/src/project_01/06_dmux.ts index 0bcc5be81..92b46bad1 100644 --- a/projects/src/project_01/06_dmux.ts +++ b/projects/src/project_01/06_dmux.ts @@ -1,11 +1,11 @@ export const hdl = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/01/DMux.hdl - /** +// File name: projects/1/DMux.hdl +/** * Demultiplexor: - * [a, b] = [in, 0] if sel == 0 - * [0, in] if sel == 1 + * [a, b] = [in, 0] if sel = 0 + * [0, in] if sel = 1 */ CHIP DMux { IN in, sel; diff --git a/projects/src/project_01/08_and16.ts b/projects/src/project_01/08_and16.ts index 5dc5dd2e9..43fcd0ceb 100644 --- a/projects/src/project_01/08_and16.ts +++ b/projects/src/project_01/08_and16.ts @@ -1,9 +1,9 @@ export const hdl = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/01/And16.hdl +// File name: projects/1/And16.hdl /** - * 16-bit bitwise And gate: + * 16-bit And gate: * for i = 0, ..., 15: * out[i] = a[i] And b[i] */ diff --git a/projects/src/project_01/09_or16.ts b/projects/src/project_01/09_or16.ts index 1715405a8..420af4168 100644 --- a/projects/src/project_01/09_or16.ts +++ b/projects/src/project_01/09_or16.ts @@ -8,9 +8,9 @@ export const cmp = `| a | b | out | export const hdl = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/01/Or16.hdl +// File name: projects/1/Or16.hdl /** - * 16-bit bitwise Or gate: + * 16-bit Or gate: * for i = 0, ..., 15: * out[i] = a[i] Or b[i] */ diff --git a/projects/src/project_01/10_mux16.ts b/projects/src/project_01/10_mux16.ts index e6b43a2fd..48dff4868 100644 --- a/projects/src/project_01/10_mux16.ts +++ b/projects/src/project_01/10_mux16.ts @@ -10,11 +10,11 @@ export const cmp = `| a | b |sel| out export const hdl = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/01/Mux16.hdl +// File name: projects/1/Mux16.hdl /** * 16-bit multiplexor: * for i = 0, ..., 15: - * if (sel == 0) out[i] = a[i], else out[i] = b[i] + * if (sel = 0) out[i] = a[i], else out[i] = b[i] */ CHIP Mux16 { IN a[16], b[16], sel; diff --git a/projects/src/project_01/11_mux4way16.ts b/projects/src/project_01/11_mux4way16.ts index bbd985990..e26e7f0c9 100644 --- a/projects/src/project_01/11_mux4way16.ts +++ b/projects/src/project_01/11_mux4way16.ts @@ -10,13 +10,13 @@ export const cmp = `| a | b | c | export const hdl = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/01/Mux4Way16.hdl +// File name: projects/1/Mux4Way16.hdl /** * 4-way 16-bit multiplexor: - * out = a if sel == 00 - * b if sel == 01 - * c if sel == 10 - * d if sel == 11 + * out = a if sel = 00 + * b if sel = 01 + * c if sel = 10 + * d if sel = 11 */ CHIP Mux4Way16 { IN a[16], b[16], c[16], d[16], sel[2]; diff --git a/projects/src/project_01/12_mux8way16.ts b/projects/src/project_01/12_mux8way16.ts index 1d9f466c7..a02d72fcc 100644 --- a/projects/src/project_01/12_mux8way16.ts +++ b/projects/src/project_01/12_mux8way16.ts @@ -18,13 +18,17 @@ export const cmp = `| a | b | c | export const hdl = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/01/Mux8Way16.hdl +// File name: projects/1/Mux8Way16.hdl /** * 8-way 16-bit multiplexor: - * out = a if sel == 000 - * b if sel == 001 - * ... - * h if sel == 111 + * out = a if sel = 000 + * b if sel = 001 + * c if sel = 010 + * d if sel = 011 + * e if sel = 100 + * f if sel = 101 + * g if sel = 110 + * h if sel = 111 */ CHIP Mux8Way16 { IN a[16], b[16], c[16], d[16], diff --git a/projects/src/project_01/13_dmux4way.ts b/projects/src/project_01/13_dmux4way.ts index f24217843..5eb898b87 100644 --- a/projects/src/project_01/13_dmux4way.ts +++ b/projects/src/project_01/13_dmux4way.ts @@ -1,13 +1,13 @@ export const hdl = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/01/DMux4Way.hdl +// File name: projects/1/DMux4Way.hdl /** * 4-way demultiplexor: - * [a, b, c, d] = [in, 0, 0, 0] if sel == 00 - * [0, in, 0, 0] if sel == 01 - * [0, 0, in, 0] if sel == 10 - * [0, 0, 0, in] if sel == 11 + * [a, b, c, d] = [in, 0, 0, 0] if sel = 00 + * [0, in, 0, 0] if sel = 01 + * [0, 0, in, 0] if sel = 10 + * [0, 0, 0, in] if sel = 11 */ CHIP DMux4Way { IN in, sel[2]; diff --git a/projects/src/project_01/14_dmux8way.ts b/projects/src/project_01/14_dmux8way.ts index 807c25924..2b6045e9b 100644 --- a/projects/src/project_01/14_dmux8way.ts +++ b/projects/src/project_01/14_dmux8way.ts @@ -1,13 +1,17 @@ export const hdl = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/01/DMux8Way.hdl +// File name: projects/1/DMux8Way.hdl /** * 8-way demultiplexor: - * [a, b, c, d, e, f, g, h] = [in, 0, 0, 0, 0, 0, 0, 0] if sel == 000 - * [0, in, 0, 0, 0, 0, 0, 0] if sel == 001 - * ... - * [0, 0, 0, 0, 0, 0, 0, in] if sel == 111 + * [a, b, c, d, e, f, g, h] = [in, 0, 0, 0, 0, 0, 0, 0] if sel = 000 + * [0, in, 0, 0, 0, 0, 0, 0] if sel = 001 + * [0, 0, in, 0, 0, 0, 0, 0] if sel = 010 + * [0, 0, 0, in, 0, 0, 0, 0] if sel = 011 + * [0, 0, 0, 0, in, 0, 0, 0] if sel = 100 + * [0, 0, 0, 0, 0, in, 0, 0] if sel = 101 + * [0, 0, 0, 0, 0, 0, in, 0] if sel = 110 + * [0, 0, 0, 0, 0, 0, 0, in] if sel = 111 */ CHIP DMux8Way { IN in, sel[3]; diff --git a/projects/src/project_01/15_or8way.ts b/projects/src/project_01/15_or8way.ts index ef812678d..0b2a3b959 100644 --- a/projects/src/project_01/15_or8way.ts +++ b/projects/src/project_01/15_or8way.ts @@ -7,7 +7,7 @@ export const cmp = `| in |out| export const hdl = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/01/Or8Way.hdl +// File name: projects/1/Or8Way.hdl /** * 8-way Or gate: * out = in[0] Or in[1] Or ... Or in[7] diff --git a/projects/src/project_01/index.ts b/projects/src/project_01/index.ts index 1e59f7e2f..59dae4e67 100644 --- a/projects/src/project_01/index.ts +++ b/projects/src/project_01/index.ts @@ -108,7 +108,7 @@ export async function resetFiles(fs: FileSystem): Promise { export async function resetTests(fs: FileSystem): Promise { await fs.pushd("/projects/01"); - await resetBySuffix(fs, CHIPS, "tst"); - await resetBySuffix(fs, CHIPS, "cmp"); + await resetBySuffix(fs, CHIPS, ".tst"); + await resetBySuffix(fs, CHIPS, ".cmp"); await fs.popd(); } diff --git a/projects/src/project_02/01_half_adder.ts b/projects/src/project_02/01_half_adder.ts index 55699f428..c482541ae 100644 --- a/projects/src/project_02/01_half_adder.ts +++ b/projects/src/project_02/01_half_adder.ts @@ -1,7 +1,7 @@ export const hdl = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/02/HalfAdder.hdl +// File name: projects/2/HalfAdder.hdl /** * Computes the sum of two bits. */ @@ -13,12 +13,17 @@ CHIP HalfAdder { PARTS: //// Replace this comment with your code. }`; -export const cmp = `| a | b | sum | carry | -| 0 | 0 | 0 | 0 | -| 0 | 1 | 1 | 0 | -| 1 | 0 | 1 | 0 | -| 1 | 1 | 0 | 1 |`; -export const tst = `output-list a%B3.1.3 b%B3.1.3 sum%B3.1.3 carry%B3.1.3; +export const cmp = `| a | b |sum|car| +| 0 | 0 | 0 | 0 | +| 0 | 1 | 1 | 0 | +| 1 | 0 | 1 | 0 | +| 1 | 1 | 0 | 1 |`; +export const tst = `// This file is part of www.nand2tetris.org +// and the book "The Elements of Computing Systems" +// by Nisan and Schocken, MIT Press. +// File name: projects/2/HalfAdder.tst + +output-list a b sum carry; set a 0, set b 0, diff --git a/projects/src/project_02/02_full_adder.ts b/projects/src/project_02/02_full_adder.ts index 88824cfa0..abf22406b 100644 --- a/projects/src/project_02/02_full_adder.ts +++ b/projects/src/project_02/02_full_adder.ts @@ -1,7 +1,7 @@ export const hdl = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/02/FullAdder.hdl +// File name: projects/2/FullAdder.hdl /** * Computes the sum of three bits. */ @@ -13,16 +13,21 @@ CHIP FullAdder { PARTS: //// Replace this comment with your code. }`; -export const cmp = `| a | b | c | sum | carry | -| 0 | 0 | 0 | 0 | 0 | -| 0 | 0 | 1 | 1 | 0 | -| 0 | 1 | 0 | 1 | 0 | -| 0 | 1 | 1 | 0 | 1 | -| 1 | 0 | 0 | 1 | 0 | -| 1 | 0 | 1 | 0 | 1 | -| 1 | 1 | 0 | 0 | 1 | -| 1 | 1 | 1 | 1 | 1 |`; -export const tst = `output-list a%B3.1.3 b%B3.1.3 c%B3.1.3 sum%B3.1.3 carry%B3.1.3; +export const cmp = `| a | b | c |sum|carry| +| 0 | 0 | 0 | 0 | 0 | +| 0 | 0 | 1 | 1 | 0 | +| 0 | 1 | 0 | 1 | 0 | +| 0 | 1 | 1 | 0 | 1 | +| 1 | 0 | 0 | 1 | 0 | +| 1 | 0 | 1 | 0 | 1 | +| 1 | 1 | 0 | 0 | 1 | +| 1 | 1 | 1 | 1 | 1 |`; +export const tst = `// This file is part of www.nand2tetris.org +// and the book "The Elements of Computing Systems" +// by Nisan and Schocken, MIT Press. +// File name: projects/2/FullAdder.tst + +output-list a b c sum carry%B2.1.2; set a 0, set b 0, diff --git a/projects/src/project_02/03_add16.ts b/projects/src/project_02/03_add16.ts index bc85ee783..e28684ad4 100644 --- a/projects/src/project_02/03_add16.ts +++ b/projects/src/project_02/03_add16.ts @@ -1,7 +1,7 @@ export const hdl = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/02/Add16.hdl +// File name: projects/2/Add16.hdl /** * 16-bit adder: Adds two 16-bit two's complement values. * The most significant carry bit is ignored. @@ -20,7 +20,12 @@ export const cmp = `| a | b | out | | 1010101010101010 | 0101010101010101 | 1111111111111111 | | 0011110011000011 | 0000111111110000 | 0100110010110011 | | 0001001000110100 | 1001100001110110 | 1010101010101010 |`; -export const tst = `output-list a%B1.16.1 b%B1.16.1 out%B1.16.1; +export const tst = `// This file is part of www.nand2tetris.org +// and the book "The Elements of Computing Systems" +// by Nisan and Schocken, MIT Press. +// File name: projects/2/Add16.tst + +output-list a%B1.16.1 b%B1.16.1 out%B1.16.1; set a %B0000000000000000, set b %B0000000000000000, diff --git a/projects/src/project_02/04_inc16.ts b/projects/src/project_02/04_inc16.ts index 0affd8e35..99a663cc1 100644 --- a/projects/src/project_02/04_inc16.ts +++ b/projects/src/project_02/04_inc16.ts @@ -1,7 +1,7 @@ export const hdl = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/02/Inc16.hdl +// File name: projects/2/Inc16.hdl /** * 16-bit incrementer: * out = in + 1 @@ -19,7 +19,12 @@ export const cmp = `| in | out | | 0000000000000101 | 0000000000000110 | | 1111111111111011 | 1111111111111100 | `; -export const tst = `output-list in%B1.16.1 out%B1.16.1; +export const tst = `// This file is part of www.nand2tetris.org +// and the book "The Elements of Computing Systems" +// by Nisan and Schocken, MIT Press. +// File name: projects/2/Inc16.tst + +output-list in%B1.16.1 out%B1.16.1; set in %B0000000000000000, // in = 0 eval, diff --git a/projects/src/project_02/06_alu.ts b/projects/src/project_02/06_alu.ts index 26bf1c0f8..6246d177b 100644 --- a/projects/src/project_02/06_alu.ts +++ b/projects/src/project_02/06_alu.ts @@ -1,7 +1,7 @@ export const hdl = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/02/ALU.hdl +// File name: projects/2/ALU.hdl /** * ALU (Arithmetic Logic Unit): * Computes out = one of the following functions: @@ -80,120 +80,753 @@ export const cmp = `| x | y |zx |nx |zy |ny | f |n | 0000000000010001 | 0000000000000011 | 0 | 0 | 0 | 1 | 1 | 1 | 1111111111110010 | 0 | 1 | | 0000000000010001 | 0000000000000011 | 0 | 0 | 0 | 0 | 0 | 0 | 0000000000000001 | 0 | 0 | | 0000000000010001 | 0000000000000011 | 0 | 1 | 0 | 1 | 0 | 1 | 0000000000010011 | 0 | 0 |`; -export const tst = `output-list x%B1.16.1 y%B1.16.1 zx%B1.1.1 nx%B1.1.1 zy%B1.1.1 -ny%B1.1.1 f%B1.1.1 no%B1.1.1 out%B1.16.1 zr%B1.1.1 -ng%B1.1.1; +export const tst = `// This file is part of www.nand2tetris.org +// and the book "The Elements of Computing Systems" +// by Nisan and Schocken, MIT Press. +// File name: projects/2/ALU.tst + +output-list x%B1.16.1 y%B1.16.1 zx nx zy ny f no out zr ng; set x %B0000000000000000, // x = 0 set y %B1111111111111111; // y = -1 // Compute 0 -set zx 1, set nx 0, set zy 1, set ny 0, set f 1, set no 0, eval, output; +set zx 1, +set nx 0, +set zy 1, +set ny 0, +set f 1, +set no 0, +eval, +output; // Compute 1 -set zx 1, set nx 1, set zy 1, set ny 1, set f 1, set no 1, eval, output; +set zx 1, +set nx 1, +set zy 1, +set ny 1, +set f 1, +set no 1, +eval, +output; // Compute -1 -set zx 1, set nx 1, set zy 1, set ny 0, set f 1, set no 0, eval, output; +set zx 1, +set nx 1, +set zy 1, +set ny 0, +set f 1, +set no 0, +eval, +output; // Compute x -set zx 0, set nx 0, set zy 1, set ny 1, set f 0, set no 0, eval, output; +set zx 0, +set nx 0, +set zy 1, +set ny 1, +set f 0, +set no 0, +eval, +output; // Compute y -set zx 1, set nx 1, set zy 0, set ny 0, set f 0, set no 0, eval, output; +set zx 1, +set nx 1, +set zy 0, +set ny 0, +set f 0, +set no 0, +eval, +output; // Compute !x -set zx 0, set nx 0, set zy 1, set ny 1, set f 0, set no 1, eval, output; +set zx 0, +set nx 0, +set zy 1, +set ny 1, +set f 0, +set no 1, +eval, +output; // Compute !y -set zx 1, set nx 1, set zy 0, set ny 0, set f 0, set no 1, eval, output; +set zx 1, +set nx 1, +set zy 0, +set ny 0, +set f 0, +set no 1, +eval, +output; // Compute -x -set zx 0, set nx 0, set zy 1, set ny 1, set f 1, set no 1, eval, output; +set zx 0, +set nx 0, +set zy 1, +set ny 1, +set f 1, +set no 1, +eval, +output; // Compute -y -set zx 1, set nx 1, set zy 0, set ny 0, set f 1, set no 1, eval, output; +set zx 1, +set nx 1, +set zy 0, +set ny 0, +set f 1, +set no 1, +eval, +output; // Compute x + 1 -set zx 0, set nx 1, set zy 1, set ny 1, set f 1, set no 1, eval, output; +set zx 0, +set nx 1, +set zy 1, +set ny 1, +set f 1, +set no 1, +eval, +output; // Compute y + 1 -set zx 1, set nx 1, set zy 0, set ny 1, set f 1, set no 1, eval, output; +set zx 1, +set nx 1, +set zy 0, +set ny 1, +set f 1, +set no 1, +eval, +output; // Compute x - 1 -set zx 0, set nx 0, set zy 1, set ny 1, set f 1, set no 0, eval, output; +set zx 0, +set nx 0, +set zy 1, +set ny 1, +set f 1, +set no 0, +eval, +output; // Compute y - 1 -set zx 1, set nx 1, set zy 0, set ny 0, set f 1, set no 0, eval, output; +set zx 1, +set nx 1, +set zy 0, +set ny 0, +set f 1, +set no 0, +eval, +output; // Compute x + y -set zx 0, set nx 0, set zy 0, set ny 0, set f 1, set no 0, eval, output; +set zx 0, +set nx 0, +set zy 0, +set ny 0, +set f 1, +set no 0, +eval, +output; // Compute x - y -set zx 0, set nx 1, set zy 0, set ny 0, set f 1, set no 1, eval, output; +set zx 0, +set nx 1, +set zy 0, +set ny 0, +set f 1, +set no 1, +eval, +output; // Compute y - x -set zx 0, set nx 0, set zy 0, set ny 1, set f 1, set no 1, eval, output; +set zx 0, +set nx 0, +set zy 0, +set ny 1, +set f 1, +set no 1, +eval, +output; // Compute x & y -set zx 0, set nx 0, set zy 0, set ny 0, set f 0, set no 0, eval, output; +set zx 0, +set nx 0, +set zy 0, +set ny 0, +set f 0, +set no 0, +eval, +output; // Compute x | y -set zx 0, set nx 1, set zy 0, set ny 1, set f 0, set no 1, eval, output; +set zx 0, +set nx 1, +set zy 0, +set ny 1, +set f 0, +set no 1, +eval, +output; set x %B000000000010001, // x = 17 set y %B000000000000011; // y = 3 // Compute 0 -set zx 1, set nx 0, set zy 1, set ny 0, set f 1, set no 0, eval, output; +set zx 1, +set nx 0, +set zy 1, +set ny 0, +set f 1, +set no 0, +eval, +output; // Compute 1 -set zx 1, set nx 1, set zy 1, set ny 1, set f 1, set no 1, eval, output; +set zx 1, +set nx 1, +set zy 1, +set ny 1, +set f 1, +set no 1, +eval, +output; // Compute -1 -set zx 1, set nx 1, set zy 1, set ny 0, set f 1, set no 0, eval, output; +set zx 1, +set nx 1, +set zy 1, +set ny 0, +set f 1, +set no 0, +eval, +output; // Compute x -set zx 0, set nx 0, set zy 1, set ny 1, set f 0, set no 0, eval, output; +set zx 0, +set nx 0, +set zy 1, +set ny 1, +set f 0, +set no 0, +eval, +output; // Compute y -set zx 1, set nx 1, set zy 0, set ny 0, set f 0, set no 0, eval, output; +set zx 1, +set nx 1, +set zy 0, +set ny 0, +set f 0, +set no 0, +eval, +output; // Compute !x -set zx 0, set nx 0, set zy 1, set ny 1, set f 0, set no 1, eval, output; +set zx 0, +set nx 0, +set zy 1, +set ny 1, +set f 0, +set no 1, +eval, +output; // Compute !y -set zx 1, set nx 1, set zy 0, set ny 0, set f 0, set no 1, eval, output; +set zx 1, +set nx 1, +set zy 0, +set ny 0, +set f 0, +set no 1, +eval, +output; // Compute -x -set zx 0, set nx 0, set zy 1, set ny 1, set f 1, set no 1, eval, output; +set zx 0, +set nx 0, +set zy 1, +set ny 1, +set f 1, +set no 1, +eval, +output; // Compute -y -set zx 1, set nx 1, set zy 0, set ny 0, set f 1, set no 1, eval, output; +set zx 1, +set nx 1, +set zy 0, +set ny 0, +set f 1, +set no 1, +eval, +output; // Compute x + 1 -set zx 0, set nx 1, set zy 1, set ny 1, set f 1, set no 1, eval, output; +set zx 0, +set nx 1, +set zy 1, +set ny 1, +set f 1, +set no 1, +eval, +output; // Compute y + 1 -set zx 1, set nx 1, set zy 0, set ny 1, set f 1, set no 1, eval, output; +set zx 1, +set nx 1, +set zy 0, +set ny 1, +set f 1, +set no 1, +eval, +output; // Compute x - 1 -set zx 0, set nx 0, set zy 1, set ny 1, set f 1, set no 0, eval, output; +set zx 0, +set nx 0, +set zy 1, +set ny 1, +set f 1, +set no 0, +eval, +output; // Compute y - 1 -set zx 1, set nx 1, set zy 0, set ny 0, set f 1, set no 0, eval, output; +set zx 1, +set nx 1, +set zy 0, +set ny 0, +set f 1, +set no 0, +eval, +output; // Compute x + y -set zx 0, set nx 0, set zy 0, set ny 0, set f 1, set no 0, eval, output; +set zx 0, +set nx 0, +set zy 0, +set ny 0, +set f 1, +set no 0, +eval, +output; // Compute x - y -set zx 0, set nx 1, set zy 0, set ny 0, set f 1, set no 1, eval, output; +set zx 0, +set nx 1, +set zy 0, +set ny 0, +set f 1, +set no 1, +eval, +output; // Compute y - x -set zx 0, set nx 0, set zy 0, set ny 1, set f 1, set no 1, eval, output; +set zx 0, +set nx 0, +set zy 0, +set ny 1, +set f 1, +set no 1, +eval, +output; // Compute x & y -set zx 0, set nx 0, set zy 0, set ny 0, set f 0, set no 0, eval, output; +set zx 0, +set nx 0, +set zy 0, +set ny 0, +set f 0, +set no 0, +eval, +output; // Compute x | y -set zx 0, set nx 1, set zy 0, set ny 1, set f 0, set no 1, eval, output;`; +set zx 0, +set nx 1, +set zy 0, +set ny 1, +set f 0, +set no 1, +eval, +output;`; +export const basic_tst = `// This file is part of www.nand2tetris.org +// and the book "The Elements of Computing Systems" +// by Nisan and Schocken, MIT Press. +// File name: projects/2/ALU-basic.tst + +// Tests the basic version of the ALU chip. +// DOES NOT replace the final test provided by ALU.tst. +// Specifically: Tests the ALU logic that computes the 'out' output; +// The 'zr' and 'ng' output bits are ignored. + +output-list x%B1.16.1 y%B1.16.1 zx nx zy ny f no out%B1.16.1; + +set x %B0000000000000000, +set y %B1111111111111111, + +set zx 1, +set nx 0, +set zy 1, +set ny 0, +set f 1, +set no 0, +eval, +output; + +set zx 1, +set nx 1, +set zy 1, +set ny 1, +set f 1, +set no 1, +eval, +output; + +set zx 1, +set nx 1, +set zy 1, +set ny 0, +set f 1, +set no 0, +eval, +output; + +set zx 0, +set nx 0, +set zy 1, +set ny 1, +set f 0, +set no 0, +eval, +output; + +set zx 1, +set nx 1, +set zy 0, +set ny 0, +set f 0, +set no 0, +eval, +output; + +set zx 0, +set nx 0, +set zy 1, +set ny 1, +set f 0, +set no 1, +eval, +output; + +set zx 1, +set nx 1, +set zy 0, +set ny 0, +set f 0, +set no 1, +eval, +output; + +set zx 0, +set nx 0, +set zy 1, +set ny 1, +set f 1, +set no 1, +eval, +output; + +set zx 1, +set nx 1, +set zy 0, +set ny 0, +set f 1, +set no 1, +eval, +output; + +set zx 0, +set nx 1, +set zy 1, +set ny 1, +set f 1, +set no 1, +eval, +output; + +set zx 1, +set nx 1, +set zy 0, +set ny 1, +set f 1, +set no 1, +eval, +output; + +set zx 0, +set nx 0, +set zy 1, +set ny 1, +set f 1, +set no 0, +eval, +output; + +set zx 1, +set nx 1, +set zy 0, +set ny 0, +set f 1, +set no 0, +eval, +output; + +set zx 0, +set nx 0, +set zy 0, +set ny 0, +set f 1, +set no 0, +eval, +output; + +set zx 0, +set nx 1, +set zy 0, +set ny 0, +set f 1, +set no 1, +eval, +output; + +set zx 0, +set nx 0, +set zy 0, +set ny 1, +set f 1, +set no 1, +eval, +output; + +set zx 0, +set nx 0, +set zy 0, +set ny 0, +set f 0, +set no 0, +eval, +output; + +set zx 0, +set nx 1, +set zy 0, +set ny 1, +set f 0, +set no 1, +eval, +output; + +set x %B101101110100000, +set y %B001111011010010, + +set zx 1, +set nx 0, +set zy 1, +set ny 0, +set f 1, +set no 0, +eval, +output; + +set zx 1, +set nx 1, +set zy 1, +set ny 1, +set f 1, +set no 1, +eval, +output; + +set zx 1, +set nx 1, +set zy 1, +set ny 0, +set f 1, +set no 0, +eval, +output; + +set zx 0, +set nx 0, +set zy 1, +set ny 1, +set f 0, +set no 0, +eval, +output; + +set zx 1, +set nx 1, +set zy 0, +set ny 0, +set f 0, +set no 0, +eval, +output; + +set zx 0, +set nx 0, +set zy 1, +set ny 1, +set f 0, +set no 1, +eval, +output; + +set zx 1, +set nx 1, +set zy 0, +set ny 0, +set f 0, +set no 1, +eval, +output; + +set zx 0, +set nx 0, +set zy 1, +set ny 1, +set f 1, +set no 1, +eval, +output; + +set zx 1, +set nx 1, +set zy 0, +set ny 0, +set f 1, +set no 1, +eval, +output; + +set zx 0, +set nx 1, +set zy 1, +set ny 1, +set f 1, +set no 1, +eval, +output; + +set zx 1, +set nx 1, +set zy 0, +set ny 1, +set f 1, +set no 1, +eval, +output; + +set zx 0, +set nx 0, +set zy 1, +set ny 1, +set f 1, +set no 0, +eval, +output; + +set zx 1, +set nx 1, +set zy 0, +set ny 0, +set f 1, +set no 0, +eval, +output; + +set zx 0, +set nx 0, +set zy 0, +set ny 0, +set f 1, +set no 0, +eval, +output; + +set zx 0, +set nx 1, +set zy 0, +set ny 0, +set f 1, +set no 1, +eval, +output; + +set zx 0, +set nx 0, +set zy 0, +set ny 1, +set f 1, +set no 1, +eval, +output; + +set zx 0, +set nx 0, +set zy 0, +set ny 0, +set f 0, +set no 0, +eval, +output; + +set zx 0, +set nx 1, +set zy 0, +set ny 1, +set f 0, +set no 1, +eval, +output;`; +export const basic_cmp = `| x | y |zx |nx |zy |ny | f |no | out | +| 0000000000000000 | 1111111111111111 | 1 | 0 | 1 | 0 | 1 | 0 | 0000000000000000 | +| 0000000000000000 | 1111111111111111 | 1 | 1 | 1 | 1 | 1 | 1 | 0000000000000001 | +| 0000000000000000 | 1111111111111111 | 1 | 1 | 1 | 0 | 1 | 0 | 1111111111111111 | +| 0000000000000000 | 1111111111111111 | 0 | 0 | 1 | 1 | 0 | 0 | 0000000000000000 | +| 0000000000000000 | 1111111111111111 | 1 | 1 | 0 | 0 | 0 | 0 | 1111111111111111 | +| 0000000000000000 | 1111111111111111 | 0 | 0 | 1 | 1 | 0 | 1 | 1111111111111111 | +| 0000000000000000 | 1111111111111111 | 1 | 1 | 0 | 0 | 0 | 1 | 0000000000000000 | +| 0000000000000000 | 1111111111111111 | 0 | 0 | 1 | 1 | 1 | 1 | 0000000000000000 | +| 0000000000000000 | 1111111111111111 | 1 | 1 | 0 | 0 | 1 | 1 | 0000000000000001 | +| 0000000000000000 | 1111111111111111 | 0 | 1 | 1 | 1 | 1 | 1 | 0000000000000001 | +| 0000000000000000 | 1111111111111111 | 1 | 1 | 0 | 1 | 1 | 1 | 0000000000000000 | +| 0000000000000000 | 1111111111111111 | 0 | 0 | 1 | 1 | 1 | 0 | 1111111111111111 | +| 0000000000000000 | 1111111111111111 | 1 | 1 | 0 | 0 | 1 | 0 | 1111111111111110 | +| 0000000000000000 | 1111111111111111 | 0 | 0 | 0 | 0 | 1 | 0 | 1111111111111111 | +| 0000000000000000 | 1111111111111111 | 0 | 1 | 0 | 0 | 1 | 1 | 0000000000000001 | +| 0000000000000000 | 1111111111111111 | 0 | 0 | 0 | 1 | 1 | 1 | 1111111111111111 | +| 0000000000000000 | 1111111111111111 | 0 | 0 | 0 | 0 | 0 | 0 | 0000000000000000 | +| 0000000000000000 | 1111111111111111 | 0 | 1 | 0 | 1 | 0 | 1 | 1111111111111111 | +| 0101101110100000 | 0001111011010010 | 1 | 0 | 1 | 0 | 1 | 0 | 0000000000000000 | +| 0101101110100000 | 0001111011010010 | 1 | 1 | 1 | 1 | 1 | 1 | 0000000000000001 | +| 0101101110100000 | 0001111011010010 | 1 | 1 | 1 | 0 | 1 | 0 | 1111111111111111 | +| 0101101110100000 | 0001111011010010 | 0 | 0 | 1 | 1 | 0 | 0 | 0101101110100000 | +| 0101101110100000 | 0001111011010010 | 1 | 1 | 0 | 0 | 0 | 0 | 0001111011010010 | +| 0101101110100000 | 0001111011010010 | 0 | 0 | 1 | 1 | 0 | 1 | 1010010001011111 | +| 0101101110100000 | 0001111011010010 | 1 | 1 | 0 | 0 | 0 | 1 | 1110000100101101 | +| 0101101110100000 | 0001111011010010 | 0 | 0 | 1 | 1 | 1 | 1 | 1010010001100000 | +| 0101101110100000 | 0001111011010010 | 1 | 1 | 0 | 0 | 1 | 1 | 1110000100101110 | +| 0101101110100000 | 0001111011010010 | 0 | 1 | 1 | 1 | 1 | 1 | 0101101110100001 | +| 0101101110100000 | 0001111011010010 | 1 | 1 | 0 | 1 | 1 | 1 | 0001111011010011 | +| 0101101110100000 | 0001111011010010 | 0 | 0 | 1 | 1 | 1 | 0 | 0101101110011111 | +| 0101101110100000 | 0001111011010010 | 1 | 1 | 0 | 0 | 1 | 0 | 0001111011010001 | +| 0101101110100000 | 0001111011010010 | 0 | 0 | 0 | 0 | 1 | 0 | 0111101001110010 | +| 0101101110100000 | 0001111011010010 | 0 | 1 | 0 | 0 | 1 | 1 | 0011110011001110 | +| 0101101110100000 | 0001111011010010 | 0 | 0 | 0 | 1 | 1 | 1 | 1100001100110010 | +| 0101101110100000 | 0001111011010010 | 0 | 0 | 0 | 0 | 0 | 0 | 0001101010000000 | +| 0101101110100000 | 0001111011010010 | 0 | 1 | 0 | 1 | 0 | 1 | 0101111111110010 |`; diff --git a/projects/src/project_02/index.ts b/projects/src/project_02/index.ts index 94c34cb27..f5c8523dd 100644 --- a/projects/src/project_02/index.ts +++ b/projects/src/project_02/index.ts @@ -1,13 +1,11 @@ import { FileSystem, reset } from "@davidsouther/jiffies/lib/esm/fs.js"; +import { resetBySuffix } from "../reset.js"; import * as HalfAdder from "./01_half_adder.js"; import * as FullAdder from "./02_full_adder.js"; import * as Add16 from "./03_add16.js"; import * as Inc16 from "./04_inc16.js"; -import * as Alu from "./05_alu_no_stat.js"; -import * as AluStatus from "./06_alu.js"; -import * as AluAll from "./06_alu_all.js"; -import { resetBySuffix } from "../reset.js"; +import * as Alu from "./06_alu.js"; export const CHIPS = { HalfAdder: { @@ -30,20 +28,12 @@ export const CHIPS = { "Inc16.tst": Inc16.tst, "Inc16.cmp": Inc16.cmp, }, - ALUNoStat: { - "ALUNoStat.hdl": Alu.hdl, - "ALUNoStat.tst": Alu.tst, - "ALUNoStat.cmp": Alu.cmp, - }, ALU: { - "ALU.hdl": AluStatus.hdl, - "ALU.tst": AluStatus.tst, - "ALU.cmp": AluStatus.cmp, - }, - ALUAll: { - "ALUAll.hdl": AluAll.hdl, - "ALUAll.tst": AluAll.tst, - "ALUAll.cmp": AluAll.cmp, + "ALU.hdl": Alu.hdl, + "ALU.tst": Alu.tst, + "ALU.cmp": Alu.cmp, + "ALU-basic.tst": Alu.basic_tst, + "ALU-basic.cmp": Alu.basic_cmp, }, }; @@ -57,7 +47,7 @@ export async function resetFiles(fs: FileSystem): Promise { export async function resetTests(fs: FileSystem): Promise { await fs.pushd("/projects/02"); - await resetBySuffix(fs, CHIPS, "tst"); - await resetBySuffix(fs, CHIPS, "cmp"); + await resetBySuffix(fs, CHIPS, ".tst"); + await resetBySuffix(fs, CHIPS, ".cmp"); await fs.popd(); } diff --git a/projects/src/project_03/01_bit.ts b/projects/src/project_03/01_bit.ts index c1d007d41..603eac23d 100644 --- a/projects/src/project_03/01_bit.ts +++ b/projects/src/project_03/01_bit.ts @@ -1,7 +1,7 @@ export const hdl = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/03/a/Bit.hdl +// File name: projects/3/a/Bit.hdl /** * 1-bit register: * If load is asserted, the register's value is set to in; @@ -15,326 +15,1080 @@ CHIP Bit { PARTS: //// Replace this comment with your code. }`; -export const tst = `output-list time%S1.4.1 in%B2.1.2 load%B2.1.2 out%B2.1.2; -set in 0, set load 0, tick, output; tock, output; -set in 0, set load 1, tick, output; tock, output; -set in 1, set load 0, tick, output; tock, output; -set in 1, set load 1, tick, output; tock, output; -set in 0, set load 0, tick, output; tock, output; -set in 1, set load 0, tick, output; tock, output; -set in 0, set load 1, tick, output; tock, output; -set in 1, set load 1, tick, output; tock, output; -set in 0, set load 0, tick, output; tock, output; -set in 0, set load 0, tick, output; tock, output; -set in 0, set load 0, tick, output; tock, output; -set in 0, set load 0, tick, output; tock, output; -set in 0, set load 0, tick, output; tock, output; -set in 0, set load 0, tick, output; tock, output; -set in 0, set load 0, tick, output; tock, output; -set in 0, set load 0, tick, output; tock, output; -set in 0, set load 0, tick, output; tock, output; -set in 0, set load 0, tick, output; tock, output; -set in 0, set load 0, tick, output; tock, output; -set in 0, set load 0, tick, output; tock, output; -set in 0, set load 0, tick, output; tock, output; -set in 0, set load 0, tick, output; tock, output; -set in 0, set load 0, tick, output; tock, output; -set in 0, set load 0, tick, output; tock, output; -set in 0, set load 0, tick, output; tock, output; -set in 0, set load 0, tick, output; tock, output; -set in 0, set load 0, tick, output; tock, output; -set in 0, set load 0, tick, output; tock, output; -set in 0, set load 0, tick, output; tock, output; -set in 0, set load 0, tick, output; tock, output; -set in 0, set load 0, tick, output; tock, output; -set in 0, set load 0, tick, output; tock, output; -set in 0, set load 0, tick, output; tock, output; -set in 0, set load 0, tick, output; tock, output; -set in 0, set load 0, tick, output; tock, output; -set in 0, set load 0, tick, output; tock, output; -set in 0, set load 0, tick, output; tock, output; -set in 0, set load 0, tick, output; tock, output; -set in 0, set load 0, tick, output; tock, output; -set in 0, set load 0, tick, output; tock, output; -set in 0, set load 0, tick, output; tock, output; -set in 0, set load 0, tick, output; tock, output; -set in 0, set load 0, tick, output; tock, output; -set in 0, set load 0, tick, output; tock, output; -set in 0, set load 0, tick, output; tock, output; -set in 0, set load 0, tick, output; tock, output; -set in 0, set load 0, tick, output; tock, output; -set in 0, set load 0, tick, output; tock, output; -set in 0, set load 0, tick, output; tock, output; -set in 0, set load 0, tick, output; tock, output; -set in 0, set load 0, tick, output; tock, output; -set in 0, set load 0, tick, output; tock, output; -set in 0, set load 0, tick, output; tock, output; -set in 0, set load 0, tick, output; tock, output; -set in 0, set load 0, tick, output; tock, output; -set in 0, set load 0, tick, output; tock, output; -set in 0, set load 0, tick, output; tock, output; -set in 0, set load 1, tick, output; tock, output; -set in 1, set load 0, tick, output; tock, output; -set in 1, set load 0, tick, output; tock, output; -set in 1, set load 0, tick, output; tock, output; -set in 1, set load 0, tick, output; tock, output; -set in 1, set load 0, tick, output; tock, output; -set in 1, set load 0, tick, output; tock, output; -set in 1, set load 0, tick, output; tock, output; -set in 1, set load 0, tick, output; tock, output; -set in 1, set load 0, tick, output; tock, output; -set in 1, set load 0, tick, output; tock, output; -set in 1, set load 0, tick, output; tock, output; -set in 1, set load 0, tick, output; tock, output; -set in 1, set load 0, tick, output; tock, output; -set in 1, set load 0, tick, output; tock, output; -set in 1, set load 0, tick, output; tock, output; -set in 1, set load 0, tick, output; tock, output; -set in 1, set load 0, tick, output; tock, output; -set in 1, set load 0, tick, output; tock, output; -set in 1, set load 0, tick, output; tock, output; -set in 1, set load 0, tick, output; tock, output; -set in 1, set load 0, tick, output; tock, output; -set in 1, set load 0, tick, output; tock, output; -set in 1, set load 0, tick, output; tock, output; -set in 1, set load 0, tick, output; tock, output; -set in 1, set load 0, tick, output; tock, output; -set in 1, set load 0, tick, output; tock, output; -set in 1, set load 0, tick, output; tock, output; -set in 1, set load 0, tick, output; tock, output; -set in 1, set load 0, tick, output; tock, output; -set in 1, set load 0, tick, output; tock, output; -set in 1, set load 0, tick, output; tock, output; -set in 1, set load 0, tick, output; tock, output; -set in 1, set load 0, tick, output; tock, output; -set in 1, set load 0, tick, output; tock, output; -set in 1, set load 0, tick, output; tock, output; -set in 1, set load 0, tick, output; tock, output; -set in 1, set load 0, tick, output; tock, output; -set in 1, set load 0, tick, output; tock, output; -set in 1, set load 0, tick, output; tock, output; -set in 1, set load 0, tick, output; tock, output; -set in 1, set load 0, tick, output; tock, output; -set in 1, set load 0, tick, output; tock, output; -set in 1, set load 0, tick, output; tock, output; -set in 1, set load 0, tick, output; tock, output; -set in 1, set load 0, tick, output; tock, output; -set in 1, set load 0, tick, output; tock, output; -set in 1, set load 0, tick, output; tock, output; -set in 1, set load 0, tick, output; tock, output; -set in 1, set load 0, tick, output; tock, output;`; -export const cmp = `| time | in |load | out | -| 0+ | 0 | 0 | 0 | -| 1 | 0 | 0 | 0 | -| 1+ | 0 | 1 | 0 | -| 2 | 0 | 1 | 0 | -| 2+ | 1 | 0 | 0 | -| 3 | 1 | 0 | 0 | -| 3+ | 1 | 1 | 0 | -| 4 | 1 | 1 | 1 | -| 4+ | 0 | 0 | 1 | -| 5 | 0 | 0 | 1 | -| 5+ | 1 | 0 | 1 | -| 6 | 1 | 0 | 1 | -| 6+ | 0 | 1 | 1 | -| 7 | 0 | 1 | 0 | -| 7+ | 1 | 1 | 0 | -| 8 | 1 | 1 | 1 | -| 8+ | 0 | 0 | 1 | -| 9 | 0 | 0 | 1 | -| 9+ | 0 | 0 | 1 | -| 10 | 0 | 0 | 1 | -| 10+ | 0 | 0 | 1 | -| 11 | 0 | 0 | 1 | -| 11+ | 0 | 0 | 1 | -| 12 | 0 | 0 | 1 | -| 12+ | 0 | 0 | 1 | -| 13 | 0 | 0 | 1 | -| 13+ | 0 | 0 | 1 | -| 14 | 0 | 0 | 1 | -| 14+ | 0 | 0 | 1 | -| 15 | 0 | 0 | 1 | -| 15+ | 0 | 0 | 1 | -| 16 | 0 | 0 | 1 | -| 16+ | 0 | 0 | 1 | -| 17 | 0 | 0 | 1 | -| 17+ | 0 | 0 | 1 | -| 18 | 0 | 0 | 1 | -| 18+ | 0 | 0 | 1 | -| 19 | 0 | 0 | 1 | -| 19+ | 0 | 0 | 1 | -| 20 | 0 | 0 | 1 | -| 20+ | 0 | 0 | 1 | -| 21 | 0 | 0 | 1 | -| 21+ | 0 | 0 | 1 | -| 22 | 0 | 0 | 1 | -| 22+ | 0 | 0 | 1 | -| 23 | 0 | 0 | 1 | -| 23+ | 0 | 0 | 1 | -| 24 | 0 | 0 | 1 | -| 24+ | 0 | 0 | 1 | -| 25 | 0 | 0 | 1 | -| 25+ | 0 | 0 | 1 | -| 26 | 0 | 0 | 1 | -| 26+ | 0 | 0 | 1 | -| 27 | 0 | 0 | 1 | -| 27+ | 0 | 0 | 1 | -| 28 | 0 | 0 | 1 | -| 28+ | 0 | 0 | 1 | -| 29 | 0 | 0 | 1 | -| 29+ | 0 | 0 | 1 | -| 30 | 0 | 0 | 1 | -| 30+ | 0 | 0 | 1 | -| 31 | 0 | 0 | 1 | -| 31+ | 0 | 0 | 1 | -| 32 | 0 | 0 | 1 | -| 32+ | 0 | 0 | 1 | -| 33 | 0 | 0 | 1 | -| 33+ | 0 | 0 | 1 | -| 34 | 0 | 0 | 1 | -| 34+ | 0 | 0 | 1 | -| 35 | 0 | 0 | 1 | -| 35+ | 0 | 0 | 1 | -| 36 | 0 | 0 | 1 | -| 36+ | 0 | 0 | 1 | -| 37 | 0 | 0 | 1 | -| 37+ | 0 | 0 | 1 | -| 38 | 0 | 0 | 1 | -| 38+ | 0 | 0 | 1 | -| 39 | 0 | 0 | 1 | -| 39+ | 0 | 0 | 1 | -| 40 | 0 | 0 | 1 | -| 40+ | 0 | 0 | 1 | -| 41 | 0 | 0 | 1 | -| 41+ | 0 | 0 | 1 | -| 42 | 0 | 0 | 1 | -| 42+ | 0 | 0 | 1 | -| 43 | 0 | 0 | 1 | -| 43+ | 0 | 0 | 1 | -| 44 | 0 | 0 | 1 | -| 44+ | 0 | 0 | 1 | -| 45 | 0 | 0 | 1 | -| 45+ | 0 | 0 | 1 | -| 46 | 0 | 0 | 1 | -| 46+ | 0 | 0 | 1 | -| 47 | 0 | 0 | 1 | -| 47+ | 0 | 0 | 1 | -| 48 | 0 | 0 | 1 | -| 48+ | 0 | 0 | 1 | -| 49 | 0 | 0 | 1 | -| 49+ | 0 | 0 | 1 | -| 50 | 0 | 0 | 1 | -| 50+ | 0 | 0 | 1 | -| 51 | 0 | 0 | 1 | -| 51+ | 0 | 0 | 1 | -| 52 | 0 | 0 | 1 | -| 52+ | 0 | 0 | 1 | -| 53 | 0 | 0 | 1 | -| 53+ | 0 | 0 | 1 | -| 54 | 0 | 0 | 1 | -| 54+ | 0 | 0 | 1 | -| 55 | 0 | 0 | 1 | -| 55+ | 0 | 0 | 1 | -| 56 | 0 | 0 | 1 | -| 56+ | 0 | 0 | 1 | -| 57 | 0 | 0 | 1 | -| 57+ | 0 | 1 | 1 | -| 58 | 0 | 1 | 0 | -| 58+ | 1 | 0 | 0 | -| 59 | 1 | 0 | 0 | -| 59+ | 1 | 0 | 0 | -| 60 | 1 | 0 | 0 | -| 60+ | 1 | 0 | 0 | -| 61 | 1 | 0 | 0 | -| 61+ | 1 | 0 | 0 | -| 62 | 1 | 0 | 0 | -| 62+ | 1 | 0 | 0 | -| 63 | 1 | 0 | 0 | -| 63+ | 1 | 0 | 0 | -| 64 | 1 | 0 | 0 | -| 64+ | 1 | 0 | 0 | -| 65 | 1 | 0 | 0 | -| 65+ | 1 | 0 | 0 | -| 66 | 1 | 0 | 0 | -| 66+ | 1 | 0 | 0 | -| 67 | 1 | 0 | 0 | -| 67+ | 1 | 0 | 0 | -| 68 | 1 | 0 | 0 | -| 68+ | 1 | 0 | 0 | -| 69 | 1 | 0 | 0 | -| 69+ | 1 | 0 | 0 | -| 70 | 1 | 0 | 0 | -| 70+ | 1 | 0 | 0 | -| 71 | 1 | 0 | 0 | -| 71+ | 1 | 0 | 0 | -| 72 | 1 | 0 | 0 | -| 72+ | 1 | 0 | 0 | -| 73 | 1 | 0 | 0 | -| 73+ | 1 | 0 | 0 | -| 74 | 1 | 0 | 0 | -| 74+ | 1 | 0 | 0 | -| 75 | 1 | 0 | 0 | -| 75+ | 1 | 0 | 0 | -| 76 | 1 | 0 | 0 | -| 76+ | 1 | 0 | 0 | -| 77 | 1 | 0 | 0 | -| 77+ | 1 | 0 | 0 | -| 78 | 1 | 0 | 0 | -| 78+ | 1 | 0 | 0 | -| 79 | 1 | 0 | 0 | -| 79+ | 1 | 0 | 0 | -| 80 | 1 | 0 | 0 | -| 80+ | 1 | 0 | 0 | -| 81 | 1 | 0 | 0 | -| 81+ | 1 | 0 | 0 | -| 82 | 1 | 0 | 0 | -| 82+ | 1 | 0 | 0 | -| 83 | 1 | 0 | 0 | -| 83+ | 1 | 0 | 0 | -| 84 | 1 | 0 | 0 | -| 84+ | 1 | 0 | 0 | -| 85 | 1 | 0 | 0 | -| 85+ | 1 | 0 | 0 | -| 86 | 1 | 0 | 0 | -| 86+ | 1 | 0 | 0 | -| 87 | 1 | 0 | 0 | -| 87+ | 1 | 0 | 0 | -| 88 | 1 | 0 | 0 | -| 88+ | 1 | 0 | 0 | -| 89 | 1 | 0 | 0 | -| 89+ | 1 | 0 | 0 | -| 90 | 1 | 0 | 0 | -| 90+ | 1 | 0 | 0 | -| 91 | 1 | 0 | 0 | -| 91+ | 1 | 0 | 0 | -| 92 | 1 | 0 | 0 | -| 92+ | 1 | 0 | 0 | -| 93 | 1 | 0 | 0 | -| 93+ | 1 | 0 | 0 | -| 94 | 1 | 0 | 0 | -| 94+ | 1 | 0 | 0 | -| 95 | 1 | 0 | 0 | -| 95+ | 1 | 0 | 0 | -| 96 | 1 | 0 | 0 | -| 96+ | 1 | 0 | 0 | -| 97 | 1 | 0 | 0 | -| 97+ | 1 | 0 | 0 | -| 98 | 1 | 0 | 0 | -| 98+ | 1 | 0 | 0 | -| 99 | 1 | 0 | 0 | -| 99+ | 1 | 0 | 0 | -| 100 | 1 | 0 | 0 | -| 100+ | 1 | 0 | 0 | -| 101 | 1 | 0 | 0 | -| 101+ | 1 | 0 | 0 | -| 102 | 1 | 0 | 0 | -| 102+ | 1 | 0 | 0 | -| 103 | 1 | 0 | 0 | -| 103+ | 1 | 0 | 0 | -| 104 | 1 | 0 | 0 | -| 104+ | 1 | 0 | 0 | -| 105 | 1 | 0 | 0 | -| 105+ | 1 | 0 | 0 | -| 106 | 1 | 0 | 0 | -| 106+ | 1 | 0 | 0 | -| 107 | 1 | 0 | 0 |`; +export const tst = `// This file is part of www.nand2tetris.org +// and the book "The Elements of Computing Systems" +// by Nisan and Schocken, MIT Press. +// File name: projects/3/a/Bit.tst + +output-list time%S1.4.1 in load%B1.1.2 out; + +set in 0, +set load 0, +tick, +output; + +tock, +output; + +set in 0, +set load 1, +tick, +output; + +tock, +output; + +set in 1, +set load 0, +tick, +output; + +tock, +output; + +set in 1, +set load 1, +tick, +output; + +tock, +output; + +set in 0, +set load 0, +tick, +output; + +tock, +output; + +set in 1, +set load 0, +tick, +output; + +tock, +output; + +set in 0, +set load 1, +tick, +output; + +tock, +output; + +set in 1, +set load 1, +tick, +output; + +tock, +output; + +set in 0, +set load 0, +tick, +output; + +tock, +output; + +set in 0, +set load 0, +tick, +output; + +tock, +output; + +set in 0, +set load 0, +tick, +output; + +tock, +output; + +set in 0, +set load 0, +tick, +output; + +tock, +output; + +set in 0, +set load 0, +tick, +output; + +tock, +output; + +set in 0, +set load 0, +tick, +output; + +tock, +output; + +set in 0, +set load 0, +tick, +output; + +tock, +output; + +set in 0, +set load 0, +tick, +output; + +tock, +output; + +set in 0, +set load 0, +tick, +output; + +tock, +output; + +set in 0, +set load 0, +tick, +output; + +tock, +output; + +set in 0, +set load 0, +tick, +output; + +tock, +output; + +set in 0, +set load 0, +tick, +output; + +tock, +output; + +set in 0, +set load 0, +tick, +output; + +tock, +output; + +set in 0, +set load 0, +tick, +output; + +tock, +output; + +set in 0, +set load 0, +tick, +output; + +tock, +output; + +set in 0, +set load 0, +tick, +output; + +tock, +output; + +set in 0, +set load 0, +tick, +output; + +tock, +output; + +set in 0, +set load 0, +tick, +output; + +tock, +output; + +set in 0, +set load 0, +tick, +output; + +tock, +output; + +set in 0, +set load 0, +tick, +output; + +tock, +output; + +set in 0, +set load 0, +tick, +output; + +tock, +output; + +set in 0, +set load 0, +tick, +output; + +tock, +output; + +set in 0, +set load 0, +tick, +output; + +tock, +output; + +set in 0, +set load 0, +tick, +output; + +tock, +output; + +set in 0, +set load 0, +tick, +output; + +tock, +output; + +set in 0, +set load 0, +tick, +output; + +tock, +output; + +set in 0, +set load 0, +tick, +output; + +tock, +output; + +set in 0, +set load 0, +tick, +output; + +tock, +output; + +set in 0, +set load 0, +tick, +output; + +tock, +output; + +set in 0, +set load 0, +tick, +output; + +tock, +output; + +set in 0, +set load 0, +tick, +output; + +tock, +output; + +set in 0, +set load 0, +tick, +output; + +tock, +output; + +set in 0, +set load 0, +tick, +output; + +tock, +output; + +set in 0, +set load 0, +tick, +output; + +tock, +output; + +set in 0, +set load 0, +tick, +output; + +tock, +output; + +set in 0, +set load 0, +tick, +output; + +tock, +output; + +set in 0, +set load 0, +tick, +output; + +tock, +output; + +set in 0, +set load 0, +tick, +output; + +tock, +output; + +set in 0, +set load 0, +tick, +output; + +tock, +output; + +set in 0, +set load 0, +tick, +output; + +tock, +output; + +set in 0, +set load 0, +tick, +output; + +tock, +output; + +set in 0, +set load 0, +tick, +output; + +tock, +output; + +set in 0, +set load 0, +tick, +output; + +tock, +output; + +set in 0, +set load 0, +tick, +output; + +tock, +output; + +set in 0, +set load 0, +tick, +output; + +tock, +output; + +set in 0, +set load 0, +tick, +output; + +tock, +output; + +set in 0, +set load 0, +tick, +output; + +tock, +output; + +set in 0, +set load 0, +tick, +output; + +tock, +output; + +set in 0, +set load 0, +tick, +output; + +tock, +output; + +set in 0, +set load 1, +tick, +output; + +tock, +output; + +set in 1, +set load 0, +tick, +output; + +tock, +output; + +set in 1, +set load 0, +tick, +output; + +tock, +output; + +set in 1, +set load 0, +tick, +output; + +tock, +output; + +set in 1, +set load 0, +tick, +output; + +tock, +output; + +set in 1, +set load 0, +tick, +output; + +tock, +output; + +set in 1, +set load 0, +tick, +output; + +tock, +output; + +set in 1, +set load 0, +tick, +output; + +tock, +output; + +set in 1, +set load 0, +tick, +output; + +tock, +output; + +set in 1, +set load 0, +tick, +output; + +tock, +output; + +set in 1, +set load 0, +tick, +output; + +tock, +output; + +set in 1, +set load 0, +tick, +output; + +tock, +output; + +set in 1, +set load 0, +tick, +output; + +tock, +output; + +set in 1, +set load 0, +tick, +output; + +tock, +output; + +set in 1, +set load 0, +tick, +output; + +tock, +output; + +set in 1, +set load 0, +tick, +output; + +tock, +output; + +set in 1, +set load 0, +tick, +output; + +tock, +output; + +set in 1, +set load 0, +tick, +output; + +tock, +output; + +set in 1, +set load 0, +tick, +output; + +tock, +output; + +set in 1, +set load 0, +tick, +output; + +tock, +output; + +set in 1, +set load 0, +tick, +output; + +tock, +output; + +set in 1, +set load 0, +tick, +output; + +tock, +output; + +set in 1, +set load 0, +tick, +output; + +tock, +output; + +set in 1, +set load 0, +tick, +output; + +tock, +output; + +set in 1, +set load 0, +tick, +output; + +tock, +output; + +set in 1, +set load 0, +tick, +output; + +tock, +output; + +set in 1, +set load 0, +tick, +output; + +tock, +output; + +set in 1, +set load 0, +tick, +output; + +tock, +output; + +set in 1, +set load 0, +tick, +output; + +tock, +output; + +set in 1, +set load 0, +tick, +output; + +tock, +output; + +set in 1, +set load 0, +tick, +output; + +tock, +output; + +set in 1, +set load 0, +tick, +output; + +tock, +output; + +set in 1, +set load 0, +tick, +output; + +tock, +output; + +set in 1, +set load 0, +tick, +output; + +tock, +output; + +set in 1, +set load 0, +tick, +output; + +tock, +output; + +set in 1, +set load 0, +tick, +output; + +tock, +output; + +set in 1, +set load 0, +tick, +output; + +tock, +output; + +set in 1, +set load 0, +tick, +output; + +tock, +output; + +set in 1, +set load 0, +tick, +output; + +tock, +output; + +set in 1, +set load 0, +tick, +output; + +tock, +output; + +set in 1, +set load 0, +tick, +output; + +tock, +output; + +set in 1, +set load 0, +tick, +output; + +tock, +output; + +set in 1, +set load 0, +tick, +output; + +tock, +output; + +set in 1, +set load 0, +tick, +output; + +tock, +output; + +set in 1, +set load 0, +tick, +output; + +tock, +output; + +set in 1, +set load 0, +tick, +output; + +tock, +output; + +set in 1, +set load 0, +tick, +output; + +tock, +output; + +set in 1, +set load 0, +tick, +output; + +tock, +output; + +set in 1, +set load 0, +tick, +output; + +tock, +output; + +set in 1, +set load 0, +tick, +output; + +tock, +output;`; +export const cmp = `| time |in |load|out| +| 0+ | 0 | 0 | 0 | +| 1 | 0 | 0 | 0 | +| 1+ | 0 | 1 | 0 | +| 2 | 0 | 1 | 0 | +| 2+ | 1 | 0 | 0 | +| 3 | 1 | 0 | 0 | +| 3+ | 1 | 1 | 0 | +| 4 | 1 | 1 | 1 | +| 4+ | 0 | 0 | 1 | +| 5 | 0 | 0 | 1 | +| 5+ | 1 | 0 | 1 | +| 6 | 1 | 0 | 1 | +| 6+ | 0 | 1 | 1 | +| 7 | 0 | 1 | 0 | +| 7+ | 1 | 1 | 0 | +| 8 | 1 | 1 | 1 | +| 8+ | 0 | 0 | 1 | +| 9 | 0 | 0 | 1 | +| 9+ | 0 | 0 | 1 | +| 10 | 0 | 0 | 1 | +| 10+ | 0 | 0 | 1 | +| 11 | 0 | 0 | 1 | +| 11+ | 0 | 0 | 1 | +| 12 | 0 | 0 | 1 | +| 12+ | 0 | 0 | 1 | +| 13 | 0 | 0 | 1 | +| 13+ | 0 | 0 | 1 | +| 14 | 0 | 0 | 1 | +| 14+ | 0 | 0 | 1 | +| 15 | 0 | 0 | 1 | +| 15+ | 0 | 0 | 1 | +| 16 | 0 | 0 | 1 | +| 16+ | 0 | 0 | 1 | +| 17 | 0 | 0 | 1 | +| 17+ | 0 | 0 | 1 | +| 18 | 0 | 0 | 1 | +| 18+ | 0 | 0 | 1 | +| 19 | 0 | 0 | 1 | +| 19+ | 0 | 0 | 1 | +| 20 | 0 | 0 | 1 | +| 20+ | 0 | 0 | 1 | +| 21 | 0 | 0 | 1 | +| 21+ | 0 | 0 | 1 | +| 22 | 0 | 0 | 1 | +| 22+ | 0 | 0 | 1 | +| 23 | 0 | 0 | 1 | +| 23+ | 0 | 0 | 1 | +| 24 | 0 | 0 | 1 | +| 24+ | 0 | 0 | 1 | +| 25 | 0 | 0 | 1 | +| 25+ | 0 | 0 | 1 | +| 26 | 0 | 0 | 1 | +| 26+ | 0 | 0 | 1 | +| 27 | 0 | 0 | 1 | +| 27+ | 0 | 0 | 1 | +| 28 | 0 | 0 | 1 | +| 28+ | 0 | 0 | 1 | +| 29 | 0 | 0 | 1 | +| 29+ | 0 | 0 | 1 | +| 30 | 0 | 0 | 1 | +| 30+ | 0 | 0 | 1 | +| 31 | 0 | 0 | 1 | +| 31+ | 0 | 0 | 1 | +| 32 | 0 | 0 | 1 | +| 32+ | 0 | 0 | 1 | +| 33 | 0 | 0 | 1 | +| 33+ | 0 | 0 | 1 | +| 34 | 0 | 0 | 1 | +| 34+ | 0 | 0 | 1 | +| 35 | 0 | 0 | 1 | +| 35+ | 0 | 0 | 1 | +| 36 | 0 | 0 | 1 | +| 36+ | 0 | 0 | 1 | +| 37 | 0 | 0 | 1 | +| 37+ | 0 | 0 | 1 | +| 38 | 0 | 0 | 1 | +| 38+ | 0 | 0 | 1 | +| 39 | 0 | 0 | 1 | +| 39+ | 0 | 0 | 1 | +| 40 | 0 | 0 | 1 | +| 40+ | 0 | 0 | 1 | +| 41 | 0 | 0 | 1 | +| 41+ | 0 | 0 | 1 | +| 42 | 0 | 0 | 1 | +| 42+ | 0 | 0 | 1 | +| 43 | 0 | 0 | 1 | +| 43+ | 0 | 0 | 1 | +| 44 | 0 | 0 | 1 | +| 44+ | 0 | 0 | 1 | +| 45 | 0 | 0 | 1 | +| 45+ | 0 | 0 | 1 | +| 46 | 0 | 0 | 1 | +| 46+ | 0 | 0 | 1 | +| 47 | 0 | 0 | 1 | +| 47+ | 0 | 0 | 1 | +| 48 | 0 | 0 | 1 | +| 48+ | 0 | 0 | 1 | +| 49 | 0 | 0 | 1 | +| 49+ | 0 | 0 | 1 | +| 50 | 0 | 0 | 1 | +| 50+ | 0 | 0 | 1 | +| 51 | 0 | 0 | 1 | +| 51+ | 0 | 0 | 1 | +| 52 | 0 | 0 | 1 | +| 52+ | 0 | 0 | 1 | +| 53 | 0 | 0 | 1 | +| 53+ | 0 | 0 | 1 | +| 54 | 0 | 0 | 1 | +| 54+ | 0 | 0 | 1 | +| 55 | 0 | 0 | 1 | +| 55+ | 0 | 0 | 1 | +| 56 | 0 | 0 | 1 | +| 56+ | 0 | 0 | 1 | +| 57 | 0 | 0 | 1 | +| 57+ | 0 | 1 | 1 | +| 58 | 0 | 1 | 0 | +| 58+ | 1 | 0 | 0 | +| 59 | 1 | 0 | 0 | +| 59+ | 1 | 0 | 0 | +| 60 | 1 | 0 | 0 | +| 60+ | 1 | 0 | 0 | +| 61 | 1 | 0 | 0 | +| 61+ | 1 | 0 | 0 | +| 62 | 1 | 0 | 0 | +| 62+ | 1 | 0 | 0 | +| 63 | 1 | 0 | 0 | +| 63+ | 1 | 0 | 0 | +| 64 | 1 | 0 | 0 | +| 64+ | 1 | 0 | 0 | +| 65 | 1 | 0 | 0 | +| 65+ | 1 | 0 | 0 | +| 66 | 1 | 0 | 0 | +| 66+ | 1 | 0 | 0 | +| 67 | 1 | 0 | 0 | +| 67+ | 1 | 0 | 0 | +| 68 | 1 | 0 | 0 | +| 68+ | 1 | 0 | 0 | +| 69 | 1 | 0 | 0 | +| 69+ | 1 | 0 | 0 | +| 70 | 1 | 0 | 0 | +| 70+ | 1 | 0 | 0 | +| 71 | 1 | 0 | 0 | +| 71+ | 1 | 0 | 0 | +| 72 | 1 | 0 | 0 | +| 72+ | 1 | 0 | 0 | +| 73 | 1 | 0 | 0 | +| 73+ | 1 | 0 | 0 | +| 74 | 1 | 0 | 0 | +| 74+ | 1 | 0 | 0 | +| 75 | 1 | 0 | 0 | +| 75+ | 1 | 0 | 0 | +| 76 | 1 | 0 | 0 | +| 76+ | 1 | 0 | 0 | +| 77 | 1 | 0 | 0 | +| 77+ | 1 | 0 | 0 | +| 78 | 1 | 0 | 0 | +| 78+ | 1 | 0 | 0 | +| 79 | 1 | 0 | 0 | +| 79+ | 1 | 0 | 0 | +| 80 | 1 | 0 | 0 | +| 80+ | 1 | 0 | 0 | +| 81 | 1 | 0 | 0 | +| 81+ | 1 | 0 | 0 | +| 82 | 1 | 0 | 0 | +| 82+ | 1 | 0 | 0 | +| 83 | 1 | 0 | 0 | +| 83+ | 1 | 0 | 0 | +| 84 | 1 | 0 | 0 | +| 84+ | 1 | 0 | 0 | +| 85 | 1 | 0 | 0 | +| 85+ | 1 | 0 | 0 | +| 86 | 1 | 0 | 0 | +| 86+ | 1 | 0 | 0 | +| 87 | 1 | 0 | 0 | +| 87+ | 1 | 0 | 0 | +| 88 | 1 | 0 | 0 | +| 88+ | 1 | 0 | 0 | +| 89 | 1 | 0 | 0 | +| 89+ | 1 | 0 | 0 | +| 90 | 1 | 0 | 0 | +| 90+ | 1 | 0 | 0 | +| 91 | 1 | 0 | 0 | +| 91+ | 1 | 0 | 0 | +| 92 | 1 | 0 | 0 | +| 92+ | 1 | 0 | 0 | +| 93 | 1 | 0 | 0 | +| 93+ | 1 | 0 | 0 | +| 94 | 1 | 0 | 0 | +| 94+ | 1 | 0 | 0 | +| 95 | 1 | 0 | 0 | +| 95+ | 1 | 0 | 0 | +| 96 | 1 | 0 | 0 | +| 96+ | 1 | 0 | 0 | +| 97 | 1 | 0 | 0 | +| 97+ | 1 | 0 | 0 | +| 98 | 1 | 0 | 0 | +| 98+ | 1 | 0 | 0 | +| 99 | 1 | 0 | 0 | +| 99+ | 1 | 0 | 0 | +| 100 | 1 | 0 | 0 | +| 100+ | 1 | 0 | 0 | +| 101 | 1 | 0 | 0 | +| 101+ | 1 | 0 | 0 | +| 102 | 1 | 0 | 0 | +| 102+ | 1 | 0 | 0 | +| 103 | 1 | 0 | 0 | +| 103+ | 1 | 0 | 0 | +| 104 | 1 | 0 | 0 | +| 104+ | 1 | 0 | 0 | +| 105 | 1 | 0 | 0 | +| 105+ | 1 | 0 | 0 | +| 106 | 1 | 0 | 0 | +| 106+ | 1 | 0 | 0 | +| 107 | 1 | 0 | 0 |`; diff --git a/projects/src/project_03/02_register.ts b/projects/src/project_03/02_register.ts index af2797388..d64a1aa3b 100644 --- a/projects/src/project_03/02_register.ts +++ b/projects/src/project_03/02_register.ts @@ -1,12 +1,12 @@ export const hdl = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/03/a/Register.hdl +// File name: projects/3/a/Register.hdl /** * 16-bit register: * If load is asserted, the register's value is set to in; * Otherwise, the register maintains its current value: - * if (load(t)) out(t+1) = in(t), else out(t+1) = out(t) + * if (load(t)) out(t+1) = int(t), else out(t+1) = out(t) */ CHIP Register { IN in[16], load; @@ -15,212 +15,719 @@ CHIP Register { PARTS: //// Replace this comment with your code. }`; -export const tst = - `output-list time%S1.4.1 in%D1.6.1 load%B2.1.2 out%D1.6.1;\n` + - [ - [0, 0], - [0, 1], - [-32123, 0], - [11111, 0], - [-32123, 1], - [-32123, 1], - [-32123, 0], - [12345, 1], - [0, 0], - [0, 1], - ] - .map( - ([inn, load]) => - `set in ${inn}, set load ${load}, tick, output; tock, output;` - ) - .join("\n") + - "\n" + - [ - "%B0000000000000001", - "%B0000000000000010", - "%B0000000000000100", - "%B0000000000001000", - "%B0000000000010000", - "%B0000000000100000", - "%B0000000001000000", - "%B0000000010000000", - "%B0000000100000000", - "%B0000001000000000", - "%B0000010000000000", - "%B0000100000000000", - "%B0001000000000000", - "%B0010000000000000", - "%B0100000000000000", - "%B1000000000000000", - "%B1111111111111110", - "%B1111111111111101", - "%B1111111111111011", - "%B1111111111110111", - "%B1111111111101111", - "%B1111111111011111", - "%B1111111110111111", - "%B1111111101111111", - "%B1111111011111111", - "%B1111110111111111", - "%B1111101111111111", - "%B1111011111111111", - "%B1110111111111111", - "%B1101111111111111", - "%B1011111111111111", - "%B0111111111111111", - ] - .map( - (n) => - `set in ${n}, set load 0, tick, output; tock, output; set load 1, tick, output; tock, output;` - ) - .join("\n"); +export const tst = `// This file is part of www.nand2tetris.org + // and the book "The Elements of Computing Systems" + // by Nisan and Schocken, MIT Press. + // File name: projects/3/a/Register.tst + + output-list time%S1.3.1 in%D1.6.1 load%B2.1.1 out%D1.6.1; + + set in 0, + set load 0, + tick, + output; + + tock, + output; + + set in 0, + set load 1, + tick, + output; + + tock, + output; + + set in -32123, + set load 0, + tick, + output; + + tock, + output; + + set in 11111, + set load 0, + tick, + output; + + tock, + output; + + set in -32123, + set load 1, + tick, + output; + + tock, + output; + + set in -32123, + set load 1, + tick, + output; + + tock, + output; + + set in -32123, + set load 0, + tick, + output; + + tock, + output; + + set in 12345, + set load 1, + tick, + output; + + tock, + output; + + set in 0, + set load 0, + tick, + output; + + tock, + output; + + set in 0, + set load 1, + tick, + output; + + tock, + output; + + set in %B0000000000000001, + set load 0, + tick, + output; + + tock, + output; + + set load 1, + tick, + output; + + tock, + output; + + set in %B0000000000000010, + set load 0, + tick, + output; + + tock, + output; + + set load 1, + tick, + output; + + tock, + output; + + set in %B0000000000000100, + set load 0, + tick, + output; + + tock, + output; + + set load 1, + tick, + output; + + tock, + output; + + set in %B0000000000001000, + set load 0, + tick, + output; + + tock, + output; + + set load 1, + tick, + output; + + tock, + output; + + set in %B0000000000010000, + set load 0, + tick, + output; + + tock, + output; + + set load 1, + tick, + output; + + tock, + output; + + set in %B0000000000100000, + set load 0, + tick, + output; + + tock, + output; + + set load 1, + tick, + output; + + tock, + output; + + set in %B0000000001000000, + set load 0, + tick, + output; + + tock, + output; + + set load 1, + tick, + output; + + tock, + output; + + set in %B0000000010000000, + set load 0, + tick, + output; + + tock, + output; + + set load 1, + tick, + output; + + tock, + output; + + set in %B0000000100000000, + set load 0, + tick, + output; + + tock, + output; + + set load 1, + tick, + output; + + tock, + output; + + set in %B0000001000000000, + set load 0, + tick, + output; + + tock, + output; + + set load 1, + tick, + output; + + tock, + output; + + set in %B0000010000000000, + set load 0, + tick, + output; + + tock, + output; + + set load 1, + tick, + output; + + tock, + output; + + set in %B0000100000000000, + set load 0, + tick, + output; + + tock, + output; + + set load 1, + tick, + output; + + tock, + output; + + set in %B0001000000000000, + set load 0, + tick, + output; + + tock, + output; + + set load 1, + tick, + output; + + tock, + output; + + set in %B0010000000000000, + set load 0, + tick, + output; + + tock, + output; + + set load 1, + tick, + output; + + tock, + output; + + set in %B0100000000000000, + set load 0, + tick, + output; + + tock, + output; + + set load 1, + tick, + output; + + tock, + output; + + set in %B1000000000000000, + set load 0, + tick, + output; + + tock, + output; + + set load 1, + tick, + output; + + tock, + output; + + set in %B1111111111111110, + set load 0, + tick, + output; + + tock, + output; + + set load 1, + tick, + output; + + tock, + output; + + set in %B1111111111111101, + set load 0, + tick, + output; + + tock, + output; + + set load 1, + tick, + output; + + tock, + output; + + set in %B1111111111111011, + set load 0, + tick, + output; + + tock, + output; + + set load 1, + tick, + output; + + tock, + output; + + set in %B1111111111110111, + set load 0, + tick, + output; + + tock, + output; + + set load 1, + tick, + output; + + tock, + output; + + set in %B1111111111101111, + set load 0, + tick, + output; + + tock, + output; + + set load 1, + tick, + output; + + tock, + output; + + set in %B1111111111011111, + set load 0, + tick, + output; + + tock, + output; + + set load 1, + tick, + output; + + tock, + output; + + set in %B1111111110111111, + set load 0, + tick, + output; + + tock, + output; + + set load 1, + tick, + output; + + tock, + output; + + set in %B1111111101111111, + set load 0, + tick, + output; + + tock, + output; + + set load 1, + tick, + output; + + tock, + output; + + set in %B1111111011111111, + set load 0, + tick, + output; + + tock, + output; + + set load 1, + tick, + output; + + tock, + output; + + set in %B1111110111111111, + set load 0, + tick, + output; + + tock, + output; + + set load 1, + tick, + output; + + tock, + output; + + set in %B1111101111111111, + set load 0, + tick, + output; + + tock, + output; + + set load 1, + tick, + output; + + tock, + output; + + set in %B1111011111111111, + set load 0, + tick, + output; + + tock, + output; + + set load 1, + tick, + output; + + tock, + output; + + set in %B1110111111111111, + set load 0, + tick, + output; + + tock, + output; + + set load 1, + tick, + output; + + tock, + output; + + set in %B1101111111111111, + set load 0, + tick, + output; + + tock, + output; + + set load 1, + tick, + output; + + tock, + output; + + set in %B1011111111111111, + set load 0, + tick, + output; + + tock, + output; + + set load 1, + tick, + output; + + tock, + output; + + set in %B0111111111111111, + set load 0, + tick, + output; + + tock, + output; + + set load 1, + tick, + output; + + tock, + output;`; -export const cmp = `| time | in |load | out | -| 0+ | 0 | 0 | 0 | -| 1 | 0 | 0 | 0 | -| 1+ | 0 | 1 | 0 | -| 2 | 0 | 1 | 0 | -| 2+ | -32123 | 0 | 0 | -| 3 | -32123 | 0 | 0 | -| 3+ | 11111 | 0 | 0 | -| 4 | 11111 | 0 | 0 | -| 4+ | -32123 | 1 | 0 | -| 5 | -32123 | 1 | -32123 | -| 5+ | -32123 | 1 | -32123 | -| 6 | -32123 | 1 | -32123 | -| 6+ | -32123 | 0 | -32123 | -| 7 | -32123 | 0 | -32123 | -| 7+ | 12345 | 1 | -32123 | -| 8 | 12345 | 1 | 12345 | -| 8+ | 0 | 0 | 12345 | -| 9 | 0 | 0 | 12345 | -| 9+ | 0 | 1 | 12345 | -| 10 | 0 | 1 | 0 | -| 10+ | 1 | 0 | 0 | -| 11 | 1 | 0 | 0 | -| 11+ | 1 | 1 | 0 | -| 12 | 1 | 1 | 1 | -| 12+ | 2 | 0 | 1 | -| 13 | 2 | 0 | 1 | -| 13+ | 2 | 1 | 1 | -| 14 | 2 | 1 | 2 | -| 14+ | 4 | 0 | 2 | -| 15 | 4 | 0 | 2 | -| 15+ | 4 | 1 | 2 | -| 16 | 4 | 1 | 4 | -| 16+ | 8 | 0 | 4 | -| 17 | 8 | 0 | 4 | -| 17+ | 8 | 1 | 4 | -| 18 | 8 | 1 | 8 | -| 18+ | 16 | 0 | 8 | -| 19 | 16 | 0 | 8 | -| 19+ | 16 | 1 | 8 | -| 20 | 16 | 1 | 16 | -| 20+ | 32 | 0 | 16 | -| 21 | 32 | 0 | 16 | -| 21+ | 32 | 1 | 16 | -| 22 | 32 | 1 | 32 | -| 22+ | 64 | 0 | 32 | -| 23 | 64 | 0 | 32 | -| 23+ | 64 | 1 | 32 | -| 24 | 64 | 1 | 64 | -| 24+ | 128 | 0 | 64 | -| 25 | 128 | 0 | 64 | -| 25+ | 128 | 1 | 64 | -| 26 | 128 | 1 | 128 | -| 26+ | 256 | 0 | 128 | -| 27 | 256 | 0 | 128 | -| 27+ | 256 | 1 | 128 | -| 28 | 256 | 1 | 256 | -| 28+ | 512 | 0 | 256 | -| 29 | 512 | 0 | 256 | -| 29+ | 512 | 1 | 256 | -| 30 | 512 | 1 | 512 | -| 30+ | 1024 | 0 | 512 | -| 31 | 1024 | 0 | 512 | -| 31+ | 1024 | 1 | 512 | -| 32 | 1024 | 1 | 1024 | -| 32+ | 2048 | 0 | 1024 | -| 33 | 2048 | 0 | 1024 | -| 33+ | 2048 | 1 | 1024 | -| 34 | 2048 | 1 | 2048 | -| 34+ | 4096 | 0 | 2048 | -| 35 | 4096 | 0 | 2048 | -| 35+ | 4096 | 1 | 2048 | -| 36 | 4096 | 1 | 4096 | -| 36+ | 8192 | 0 | 4096 | -| 37 | 8192 | 0 | 4096 | -| 37+ | 8192 | 1 | 4096 | -| 38 | 8192 | 1 | 8192 | -| 38+ | 16384 | 0 | 8192 | -| 39 | 16384 | 0 | 8192 | -| 39+ | 16384 | 1 | 8192 | -| 40 | 16384 | 1 | 16384 | -| 40+ | -32768 | 0 | 16384 | -| 41 | -32768 | 0 | 16384 | -| 41+ | -32768 | 1 | 16384 | -| 42 | -32768 | 1 | -32768 | -| 42+ | -2 | 0 | -32768 | -| 43 | -2 | 0 | -32768 | -| 43+ | -2 | 1 | -32768 | -| 44 | -2 | 1 | -2 | -| 44+ | -3 | 0 | -2 | -| 45 | -3 | 0 | -2 | -| 45+ | -3 | 1 | -2 | -| 46 | -3 | 1 | -3 | -| 46+ | -5 | 0 | -3 | -| 47 | -5 | 0 | -3 | -| 47+ | -5 | 1 | -3 | -| 48 | -5 | 1 | -5 | -| 48+ | -9 | 0 | -5 | -| 49 | -9 | 0 | -5 | -| 49+ | -9 | 1 | -5 | -| 50 | -9 | 1 | -9 | -| 50+ | -17 | 0 | -9 | -| 51 | -17 | 0 | -9 | -| 51+ | -17 | 1 | -9 | -| 52 | -17 | 1 | -17 | -| 52+ | -33 | 0 | -17 | -| 53 | -33 | 0 | -17 | -| 53+ | -33 | 1 | -17 | -| 54 | -33 | 1 | -33 | -| 54+ | -65 | 0 | -33 | -| 55 | -65 | 0 | -33 | -| 55+ | -65 | 1 | -33 | -| 56 | -65 | 1 | -65 | -| 56+ | -129 | 0 | -65 | -| 57 | -129 | 0 | -65 | -| 57+ | -129 | 1 | -65 | -| 58 | -129 | 1 | -129 | -| 58+ | -257 | 0 | -129 | -| 59 | -257 | 0 | -129 | -| 59+ | -257 | 1 | -129 | -| 60 | -257 | 1 | -257 | -| 60+ | -513 | 0 | -257 | -| 61 | -513 | 0 | -257 | -| 61+ | -513 | 1 | -257 | -| 62 | -513 | 1 | -513 | -| 62+ | -1025 | 0 | -513 | -| 63 | -1025 | 0 | -513 | -| 63+ | -1025 | 1 | -513 | -| 64 | -1025 | 1 | -1025 | -| 64+ | -2049 | 0 | -1025 | -| 65 | -2049 | 0 | -1025 | -| 65+ | -2049 | 1 | -1025 | -| 66 | -2049 | 1 | -2049 | -| 66+ | -4097 | 0 | -2049 | -| 67 | -4097 | 0 | -2049 | -| 67+ | -4097 | 1 | -2049 | -| 68 | -4097 | 1 | -4097 | -| 68+ | -8193 | 0 | -4097 | -| 69 | -8193 | 0 | -4097 | -| 69+ | -8193 | 1 | -4097 | -| 70 | -8193 | 1 | -8193 | -| 70+ | -16385 | 0 | -8193 | -| 71 | -16385 | 0 | -8193 | -| 71+ | -16385 | 1 | -8193 | -| 72 | -16385 | 1 | -16385 | -| 72+ | 32767 | 0 | -16385 | -| 73 | 32767 | 0 | -16385 | -| 73+ | 32767 | 1 | -16385 | -| 74 | 32767 | 1 | 32767 |`; +export const cmp = `|time | in |load| out | +| 0+ | 0 | 0 | 0 | +| 1 | 0 | 0 | 0 | +| 1+ | 0 | 1 | 0 | +| 2 | 0 | 1 | 0 | +| 2+ | -32123 | 0 | 0 | +| 3 | -32123 | 0 | 0 | +| 3+ | 11111 | 0 | 0 | +| 4 | 11111 | 0 | 0 | +| 4+ | -32123 | 1 | 0 | +| 5 | -32123 | 1 | -32123 | +| 5+ | -32123 | 1 | -32123 | +| 6 | -32123 | 1 | -32123 | +| 6+ | -32123 | 0 | -32123 | +| 7 | -32123 | 0 | -32123 | +| 7+ | 12345 | 1 | -32123 | +| 8 | 12345 | 1 | 12345 | +| 8+ | 0 | 0 | 12345 | +| 9 | 0 | 0 | 12345 | +| 9+ | 0 | 1 | 12345 | +| 10 | 0 | 1 | 0 | +| 10+ | 1 | 0 | 0 | +| 11 | 1 | 0 | 0 | +| 11+ | 1 | 1 | 0 | +| 12 | 1 | 1 | 1 | +| 12+ | 2 | 0 | 1 | +| 13 | 2 | 0 | 1 | +| 13+ | 2 | 1 | 1 | +| 14 | 2 | 1 | 2 | +| 14+ | 4 | 0 | 2 | +| 15 | 4 | 0 | 2 | +| 15+ | 4 | 1 | 2 | +| 16 | 4 | 1 | 4 | +| 16+ | 8 | 0 | 4 | +| 17 | 8 | 0 | 4 | +| 17+ | 8 | 1 | 4 | +| 18 | 8 | 1 | 8 | +| 18+ | 16 | 0 | 8 | +| 19 | 16 | 0 | 8 | +| 19+ | 16 | 1 | 8 | +| 20 | 16 | 1 | 16 | +| 20+ | 32 | 0 | 16 | +| 21 | 32 | 0 | 16 | +| 21+ | 32 | 1 | 16 | +| 22 | 32 | 1 | 32 | +| 22+ | 64 | 0 | 32 | +| 23 | 64 | 0 | 32 | +| 23+ | 64 | 1 | 32 | +| 24 | 64 | 1 | 64 | +| 24+ | 128 | 0 | 64 | +| 25 | 128 | 0 | 64 | +| 25+ | 128 | 1 | 64 | +| 26 | 128 | 1 | 128 | +| 26+ | 256 | 0 | 128 | +| 27 | 256 | 0 | 128 | +| 27+ | 256 | 1 | 128 | +| 28 | 256 | 1 | 256 | +| 28+ | 512 | 0 | 256 | +| 29 | 512 | 0 | 256 | +| 29+ | 512 | 1 | 256 | +| 30 | 512 | 1 | 512 | +| 30+ | 1024 | 0 | 512 | +| 31 | 1024 | 0 | 512 | +| 31+ | 1024 | 1 | 512 | +| 32 | 1024 | 1 | 1024 | +| 32+ | 2048 | 0 | 1024 | +| 33 | 2048 | 0 | 1024 | +| 33+ | 2048 | 1 | 1024 | +| 34 | 2048 | 1 | 2048 | +| 34+ | 4096 | 0 | 2048 | +| 35 | 4096 | 0 | 2048 | +| 35+ | 4096 | 1 | 2048 | +| 36 | 4096 | 1 | 4096 | +| 36+ | 8192 | 0 | 4096 | +| 37 | 8192 | 0 | 4096 | +| 37+ | 8192 | 1 | 4096 | +| 38 | 8192 | 1 | 8192 | +| 38+ | 16384 | 0 | 8192 | +| 39 | 16384 | 0 | 8192 | +| 39+ | 16384 | 1 | 8192 | +| 40 | 16384 | 1 | 16384 | +| 40+ | -32768 | 0 | 16384 | +| 41 | -32768 | 0 | 16384 | +| 41+ | -32768 | 1 | 16384 | +| 42 | -32768 | 1 | -32768 | +| 42+ | -2 | 0 | -32768 | +| 43 | -2 | 0 | -32768 | +| 43+ | -2 | 1 | -32768 | +| 44 | -2 | 1 | -2 | +| 44+ | -3 | 0 | -2 | +| 45 | -3 | 0 | -2 | +| 45+ | -3 | 1 | -2 | +| 46 | -3 | 1 | -3 | +| 46+ | -5 | 0 | -3 | +| 47 | -5 | 0 | -3 | +| 47+ | -5 | 1 | -3 | +| 48 | -5 | 1 | -5 | +| 48+ | -9 | 0 | -5 | +| 49 | -9 | 0 | -5 | +| 49+ | -9 | 1 | -5 | +| 50 | -9 | 1 | -9 | +| 50+ | -17 | 0 | -9 | +| 51 | -17 | 0 | -9 | +| 51+ | -17 | 1 | -9 | +| 52 | -17 | 1 | -17 | +| 52+ | -33 | 0 | -17 | +| 53 | -33 | 0 | -17 | +| 53+ | -33 | 1 | -17 | +| 54 | -33 | 1 | -33 | +| 54+ | -65 | 0 | -33 | +| 55 | -65 | 0 | -33 | +| 55+ | -65 | 1 | -33 | +| 56 | -65 | 1 | -65 | +| 56+ | -129 | 0 | -65 | +| 57 | -129 | 0 | -65 | +| 57+ | -129 | 1 | -65 | +| 58 | -129 | 1 | -129 | +| 58+ | -257 | 0 | -129 | +| 59 | -257 | 0 | -129 | +| 59+ | -257 | 1 | -129 | +| 60 | -257 | 1 | -257 | +| 60+ | -513 | 0 | -257 | +| 61 | -513 | 0 | -257 | +| 61+ | -513 | 1 | -257 | +| 62 | -513 | 1 | -513 | +| 62+ | -1025 | 0 | -513 | +| 63 | -1025 | 0 | -513 | +| 63+ | -1025 | 1 | -513 | +| 64 | -1025 | 1 | -1025 | +| 64+ | -2049 | 0 | -1025 | +| 65 | -2049 | 0 | -1025 | +| 65+ | -2049 | 1 | -1025 | +| 66 | -2049 | 1 | -2049 | +| 66+ | -4097 | 0 | -2049 | +| 67 | -4097 | 0 | -2049 | +| 67+ | -4097 | 1 | -2049 | +| 68 | -4097 | 1 | -4097 | +| 68+ | -8193 | 0 | -4097 | +| 69 | -8193 | 0 | -4097 | +| 69+ | -8193 | 1 | -4097 | +| 70 | -8193 | 1 | -8193 | +| 70+ | -16385 | 0 | -8193 | +| 71 | -16385 | 0 | -8193 | +| 71+ | -16385 | 1 | -8193 | +| 72 | -16385 | 1 | -16385 | +| 72+ | 32767 | 0 | -16385 | +| 73 | 32767 | 0 | -16385 | +| 73+ | 32767 | 1 | -16385 | +| 74 | 32767 | 1 | 32767 |`; diff --git a/projects/src/project_03/03_pc.ts b/projects/src/project_03/03_pc.ts index a78a3b657..05c5f97d7 100644 --- a/projects/src/project_03/03_pc.ts +++ b/projects/src/project_03/03_pc.ts @@ -1,17 +1,13 @@ export const hdl = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/03/a/PC.hdl - +// File name: projects/3/a/PC.hdl /** - * A 16-bit counter with increment, load, and reset modes. - * if (inc(t)) out(t+1) = out(t) + 1 - * else if (load(t)) out(t+1) = in(t) - * else if (reset(t)) out(t+1) = 0 - * else out(t+1) = out(t) - * - * To select a mode, assert the relevant control bit, - * and de-assert the other two bits. + * A 16-bit counter. + * if reset(t): out(t+1) = 0 + * else if load(t): out(t+1) = in(t) + * else if inc(t): out(t+1) = out(t) + 1 + * else out(t+1) = out(t) */ CHIP PC { IN in[16],inc, load, reset; @@ -20,53 +16,156 @@ CHIP PC { PARTS: //// Replace this comment with your code. }`; -export const tst = `output-list time%S1.4.1 in%D1.6.1 reset%B2.1.2 load%B2.1.2 inc%B2.1.2 out%D1.6.1; - -set in 0, set reset 0, set load 0, set inc 0, tick, output; -tock, output; - -set inc 1, tick, output; tock, output; -set in -32123, tick, output; tock, output; -set load 1, tick, output; tock, output; -set load 0, tick, output; tock, output; -tick, output; tock, output; -set in 12345, set load 1, set inc 0, tick, output; tock, output; -set reset 1, tick, output; tock, output; -set reset 0, set inc 1, tick, output; tock, output; -set reset 1, tick, output; tock, output; -set reset 0, set load 0, tick, output; tock, output; -set reset 1, tick, output; tock, output; -set in 0, set reset 0, set load 1, tick, output; tock, output; -set load 0, set inc 1, tick, output; tock, output; -set in 22222, set reset 1, set inc 0, tick, output; tock, output;`; -export const cmp = `| time | in |reset|load | inc | out | -| 0+ | 0 | 0 | 0 | 0 | 0 | -| 1 | 0 | 0 | 0 | 0 | 0 | -| 1+ | 0 | 0 | 0 | 1 | 0 | -| 2 | 0 | 0 | 0 | 1 | 1 | -| 2+ | -32123 | 0 | 0 | 1 | 1 | -| 3 | -32123 | 0 | 0 | 1 | 2 | -| 3+ | -32123 | 0 | 1 | 1 | 2 | -| 4 | -32123 | 0 | 1 | 1 | -32123 | -| 4+ | -32123 | 0 | 0 | 1 | -32123 | -| 5 | -32123 | 0 | 0 | 1 | -32122 | -| 5+ | -32123 | 0 | 0 | 1 | -32122 | -| 6 | -32123 | 0 | 0 | 1 | -32121 | -| 6+ | 12345 | 0 | 1 | 0 | -32121 | -| 7 | 12345 | 0 | 1 | 0 | 12345 | -| 7+ | 12345 | 1 | 1 | 0 | 12345 | -| 8 | 12345 | 1 | 1 | 0 | 0 | -| 8+ | 12345 | 0 | 1 | 1 | 0 | -| 9 | 12345 | 0 | 1 | 1 | 12345 | -| 9+ | 12345 | 1 | 1 | 1 | 12345 | -| 10 | 12345 | 1 | 1 | 1 | 0 | -| 10+ | 12345 | 0 | 0 | 1 | 0 | -| 11 | 12345 | 0 | 0 | 1 | 1 | -| 11+ | 12345 | 1 | 0 | 1 | 1 | -| 12 | 12345 | 1 | 0 | 1 | 0 | -| 12+ | 0 | 0 | 1 | 1 | 0 | -| 13 | 0 | 0 | 1 | 1 | 0 | -| 13+ | 0 | 0 | 0 | 1 | 0 | -| 14 | 0 | 0 | 0 | 1 | 1 | -| 14+ | 22222 | 1 | 0 | 0 | 1 | -| 15 | 22222 | 1 | 0 | 0 | 0 |`; +export const tst = `// This file is part of www.nand2tetris.org +// and the book "The Elements of Computing Systems" +// by Nisan and Schocken, MIT Press. +// File name: projects/03/a/PC.tst + +output-list time%S1.3.1 in%D1.6.1 reset%B2.1.2 load%B2.1.2 inc%B2.1.2 out%D1.6.1; + +set in 0, +set reset 0, +set load 0, +set inc 0, +tick, +output; + +tock, +output; + +set inc 1, +tick, +output; + +tock, +output; + +set in -32123, +tick, +output; + +tock, +output; + +set load 1, +tick, +output; + +tock, +output; + +set load 0, +tick, +output; + +tock, +output; + +tick, +output; + +tock, +output; + +set in 12345, +set load 1, +set inc 0, +tick, +output; + +tock, +output; + +set reset 1, +tick, +output; + +tock, +output; + +set reset 0, +set inc 1, +tick, +output; + +tock, +output; + +set reset 1, +tick, +output; + +tock, +output; + +set reset 0, +set load 0, +tick, +output; + +tock, +output; + +set reset 1, +tick, +output; + +tock, +output; + +set in 0, +set reset 0, +set load 1, +tick, +output; + +tock, +output; + +set load 0, +set inc 1, +tick, +output; + +tock, +output; + +set in 22222, +set reset 1, +set inc 0, +tick, +output; + +tock, +output;`; +export const cmp = `|time | in |reset|load | inc | out | +| 0+ | 0 | 0 | 0 | 0 | 0 | +| 1 | 0 | 0 | 0 | 0 | 0 | +| 1+ | 0 | 0 | 0 | 1 | 0 | +| 2 | 0 | 0 | 0 | 1 | 1 | +| 2+ | -32123 | 0 | 0 | 1 | 1 | +| 3 | -32123 | 0 | 0 | 1 | 2 | +| 3+ | -32123 | 0 | 1 | 1 | 2 | +| 4 | -32123 | 0 | 1 | 1 | -32123 | +| 4+ | -32123 | 0 | 0 | 1 | -32123 | +| 5 | -32123 | 0 | 0 | 1 | -32122 | +| 5+ | -32123 | 0 | 0 | 1 | -32122 | +| 6 | -32123 | 0 | 0 | 1 | -32121 | +| 6+ | 12345 | 0 | 1 | 0 | -32121 | +| 7 | 12345 | 0 | 1 | 0 | 12345 | +| 7+ | 12345 | 1 | 1 | 0 | 12345 | +| 8 | 12345 | 1 | 1 | 0 | 0 | +| 8+ | 12345 | 0 | 1 | 1 | 0 | +| 9 | 12345 | 0 | 1 | 1 | 12345 | +| 9+ | 12345 | 1 | 1 | 1 | 12345 | +| 10 | 12345 | 1 | 1 | 1 | 0 | +| 10+ | 12345 | 0 | 0 | 1 | 0 | +| 11 | 12345 | 0 | 0 | 1 | 1 | +| 11+ | 12345 | 1 | 0 | 1 | 1 | +| 12 | 12345 | 1 | 0 | 1 | 0 | +| 12+ | 0 | 0 | 1 | 1 | 0 | +| 13 | 0 | 0 | 1 | 1 | 0 | +| 13+ | 0 | 0 | 0 | 1 | 0 | +| 14 | 0 | 0 | 0 | 1 | 1 | +| 14+ | 22222 | 1 | 0 | 0 | 1 | +| 15 | 22222 | 1 | 0 | 0 | 0 |`; diff --git a/projects/src/project_03/04_ram8.ts b/projects/src/project_03/04_ram8.ts index 2d90e6235..27d024f21 100644 --- a/projects/src/project_03/04_ram8.ts +++ b/projects/src/project_03/04_ram8.ts @@ -1,7 +1,7 @@ export const hdl = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/03/a/RAM8.hdl +// File name: projects/3/a/RAM8.hdl /** * Memory of eight 16-bit registers. * If load is asserted, the value of the register selected by @@ -15,320 +15,733 @@ CHIP RAM8 { PARTS: //// Replace this comment with your code. }`; -export const tst = `output-list time%S1.4.1 in%D1.6.1 load%B2.1.2 address%D3.1.3 out%D1.6.1; - -set in 0, set load 0, set address 0, tick, output; tock, output; -set load 1, tick, output; tock, output; - -set in 11111, set load 0, tick, output; tock, output; -set load 1, set address 1, tick, output; tock, output; -set load 0, set address 0, tick, output; tock, output; - -set in 3333, set address 3, tick, output; tock, output; -set load 1, tick, output; tock, output; -set load 0, tick, output; tock, output; -set address 1, eval, output; - -set in 7777, tick, output; tock, output; -set load 1, set address 7, tick, output; tock, output; -set load 0, tick, output; tock, output; -set address 3, eval, output; -set address 7, eval, output; - -set load 0, set address 0, tick, output; tock, output; -set address 1, eval, output; -set address 2, eval, output; -set address 3, eval, output; -set address 4, eval, output; -set address 5, eval, output; -set address 6, eval, output; -set address 7, eval, output; - -set load 1, set in %B0101010101010101, set address 0, tick, output; tock, output; -set address 1, tick, output, tock, output; -set address 2, tick, output, tock, output; -set address 3, tick, output, tock, output; -set address 4, tick, output, tock, output; -set address 5, tick, output, tock, output; -set address 6, tick, output, tock, output; -set address 7, tick, output, tock, output; - -set load 0, set address 0, tick, output; tock, output; -set address 1, eval, output; -set address 2, eval, output; -set address 3, eval, output; -set address 4, eval, output; -set address 5, eval, output; -set address 6, eval, output; -set address 7, eval, output; - -set load 1, set address 0, set in %B1010101010101010, tick, output; tock, output; -set load 0, set address 0, tick, output; tock, output; -set address 1, eval, output; -set address 2, eval, output; -set address 3, eval, output; -set address 4, eval, output; -set address 5, eval, output; -set address 6, eval, output; -set address 7, eval, output; - -set load 1, set address 0, set in %B0101010101010101, tick, output, tock, output; -set address 1, set in %B1010101010101010, tick, output; tock, output; -set load 0, set address 0, tick, output; tock, output; -set address 1, eval, output; -set address 2, eval, output; -set address 3, eval, output; -set address 4, eval, output; -set address 5, eval, output; -set address 6, eval, output; -set address 7, eval, output; - -set load 1, set address 1, set in %B0101010101010101, tick, output, tock, output; -set address 2, set in %B1010101010101010, tick, output; -tock, output; -set load 0, set address 0, tick, output; tock, output; -set address 1, eval, output; -set address 2, eval, output; -set address 3, eval, output; -set address 4, eval, output; -set address 5, eval, output; -set address 6, eval, output; -set address 7, eval, output; - -set load 1, set address 2, set in %B0101010101010101, tick, output, tock, output; -set address 3, set in %B1010101010101010, tick, output; tock, output; -set load 0, set address 0, tick, output; tock, output; -set address 1, eval, output; -set address 2, eval, output; -set address 3, eval, output; -set address 4, eval, output; -set address 5, eval, output; -set address 6, eval, output; -set address 7, eval, output; - -set load 1, set address 3, set in %B0101010101010101, tick, output, tock, output; -set address 4, set in %B1010101010101010, tick, output; tock, output; -set load 0, set address 0, tick, output; tock, output; -set address 1, eval, output; -set address 2, eval, output; -set address 3, eval, output; -set address 4, eval, output; -set address 5, eval, output; -set address 6, eval, output; -set address 7, eval, output; - -set load 1, set address 4, set in %B0101010101010101, tick, output, tock, output; -set address 5, set in %B1010101010101010, tick, output; tock, output; -set load 0, set address 0, tick, output; tock, output; -set address 1, eval, output; -set address 2, eval, output; -set address 3, eval, output; -set address 4, eval, output; -set address 5, eval, output; -set address 6, eval, output; -set address 7, eval, output; - -set load 1, set address 5, set in %B0101010101010101, tick, output, tock, output; -set address 6, set in %B1010101010101010, tick, output; tock, output; -set load 0, set address 0, tick, output; tock, output; -set address 1, eval, output; -set address 2, eval, output; -set address 3, eval, output; -set address 4, eval, output; -set address 5, eval, output; -set address 6, eval, output; -set address 7, eval, output; - -set load 1, set address 6, set in %B0101010101010101, tick, output, tock, output; -set address 7, set in %B1010101010101010, tick, output; tock, output; -set load 0, set address 0, tick, output; tock, output; -set address 1, eval, output; -set address 2, eval, output; -set address 3, eval, output; -set address 4, eval, output; -set address 5, eval, output; -set address 6, eval, output; -set address 7, eval, output; - -set load 1, set address 7, set in %B0101010101010101, tick, output, tock, output; -set load 0, set address 0, tick, output; tock, output; -set address 1, eval, output; -set address 2, eval, output; -set address 3, eval, output; -set address 4, eval, output; -set address 5, eval, output; -set address 6, eval, output; -set address 7, eval, output;`; -export const cmp = `| time | in |load |address| out | -| 0+ | 0 | 0 | 0 | 0 | -| 1 | 0 | 0 | 0 | 0 | -| 1+ | 0 | 1 | 0 | 0 | -| 2 | 0 | 1 | 0 | 0 | -| 2+ | 11111 | 0 | 0 | 0 | -| 3 | 11111 | 0 | 0 | 0 | -| 3+ | 11111 | 1 | 1 | 0 | -| 4 | 11111 | 1 | 1 | 11111 | -| 4+ | 11111 | 0 | 0 | 0 | -| 5 | 11111 | 0 | 0 | 0 | -| 5+ | 3333 | 0 | 3 | 0 | -| 6 | 3333 | 0 | 3 | 0 | -| 6+ | 3333 | 1 | 3 | 0 | -| 7 | 3333 | 1 | 3 | 3333 | -| 7+ | 3333 | 0 | 3 | 3333 | -| 8 | 3333 | 0 | 3 | 3333 | -| 8 | 3333 | 0 | 1 | 11111 | -| 8+ | 7777 | 0 | 1 | 11111 | -| 9 | 7777 | 0 | 1 | 11111 | -| 9+ | 7777 | 1 | 7 | 0 | -| 10 | 7777 | 1 | 7 | 7777 | -| 10+ | 7777 | 0 | 7 | 7777 | -| 11 | 7777 | 0 | 7 | 7777 | -| 11 | 7777 | 0 | 3 | 3333 | -| 11 | 7777 | 0 | 7 | 7777 | -| 11+ | 7777 | 0 | 0 | 0 | -| 12 | 7777 | 0 | 0 | 0 | -| 12 | 7777 | 0 | 1 | 11111 | -| 12 | 7777 | 0 | 2 | 0 | -| 12 | 7777 | 0 | 3 | 3333 | -| 12 | 7777 | 0 | 4 | 0 | -| 12 | 7777 | 0 | 5 | 0 | -| 12 | 7777 | 0 | 6 | 0 | -| 12 | 7777 | 0 | 7 | 7777 | -| 12+ | 21845 | 1 | 0 | 0 | -| 13 | 21845 | 1 | 0 | 21845 | -| 13+ | 21845 | 1 | 1 | 11111 | -| 14 | 21845 | 1 | 1 | 21845 | -| 14+ | 21845 | 1 | 2 | 0 | -| 15 | 21845 | 1 | 2 | 21845 | -| 15+ | 21845 | 1 | 3 | 3333 | -| 16 | 21845 | 1 | 3 | 21845 | -| 16+ | 21845 | 1 | 4 | 0 | -| 17 | 21845 | 1 | 4 | 21845 | -| 17+ | 21845 | 1 | 5 | 0 | -| 18 | 21845 | 1 | 5 | 21845 | -| 18+ | 21845 | 1 | 6 | 0 | -| 19 | 21845 | 1 | 6 | 21845 | -| 19+ | 21845 | 1 | 7 | 7777 | -| 20 | 21845 | 1 | 7 | 21845 | -| 20+ | 21845 | 0 | 0 | 21845 | -| 21 | 21845 | 0 | 0 | 21845 | -| 21 | 21845 | 0 | 1 | 21845 | -| 21 | 21845 | 0 | 2 | 21845 | -| 21 | 21845 | 0 | 3 | 21845 | -| 21 | 21845 | 0 | 4 | 21845 | -| 21 | 21845 | 0 | 5 | 21845 | -| 21 | 21845 | 0 | 6 | 21845 | -| 21 | 21845 | 0 | 7 | 21845 | -| 21+ | -21846 | 1 | 0 | 21845 | -| 22 | -21846 | 1 | 0 | -21846 | -| 22+ | -21846 | 0 | 0 | -21846 | -| 23 | -21846 | 0 | 0 | -21846 | -| 23 | -21846 | 0 | 1 | 21845 | -| 23 | -21846 | 0 | 2 | 21845 | -| 23 | -21846 | 0 | 3 | 21845 | -| 23 | -21846 | 0 | 4 | 21845 | -| 23 | -21846 | 0 | 5 | 21845 | -| 23 | -21846 | 0 | 6 | 21845 | -| 23 | -21846 | 0 | 7 | 21845 | -| 23+ | 21845 | 1 | 0 | -21846 | -| 24 | 21845 | 1 | 0 | 21845 | -| 24+ | -21846 | 1 | 1 | 21845 | -| 25 | -21846 | 1 | 1 | -21846 | -| 25+ | -21846 | 0 | 0 | 21845 | -| 26 | -21846 | 0 | 0 | 21845 | -| 26 | -21846 | 0 | 1 | -21846 | -| 26 | -21846 | 0 | 2 | 21845 | -| 26 | -21846 | 0 | 3 | 21845 | -| 26 | -21846 | 0 | 4 | 21845 | -| 26 | -21846 | 0 | 5 | 21845 | -| 26 | -21846 | 0 | 6 | 21845 | -| 26 | -21846 | 0 | 7 | 21845 | -| 26+ | 21845 | 1 | 1 | -21846 | -| 27 | 21845 | 1 | 1 | 21845 | -| 27+ | -21846 | 1 | 2 | 21845 | -| 28 | -21846 | 1 | 2 | -21846 | -| 28+ | -21846 | 0 | 0 | 21845 | -| 29 | -21846 | 0 | 0 | 21845 | -| 29 | -21846 | 0 | 1 | 21845 | -| 29 | -21846 | 0 | 2 | -21846 | -| 29 | -21846 | 0 | 3 | 21845 | -| 29 | -21846 | 0 | 4 | 21845 | -| 29 | -21846 | 0 | 5 | 21845 | -| 29 | -21846 | 0 | 6 | 21845 | -| 29 | -21846 | 0 | 7 | 21845 | -| 29+ | 21845 | 1 | 2 | -21846 | -| 30 | 21845 | 1 | 2 | 21845 | -| 30+ | -21846 | 1 | 3 | 21845 | -| 31 | -21846 | 1 | 3 | -21846 | -| 31+ | -21846 | 0 | 0 | 21845 | -| 32 | -21846 | 0 | 0 | 21845 | -| 32 | -21846 | 0 | 1 | 21845 | -| 32 | -21846 | 0 | 2 | 21845 | -| 32 | -21846 | 0 | 3 | -21846 | -| 32 | -21846 | 0 | 4 | 21845 | -| 32 | -21846 | 0 | 5 | 21845 | -| 32 | -21846 | 0 | 6 | 21845 | -| 32 | -21846 | 0 | 7 | 21845 | -| 32+ | 21845 | 1 | 3 | -21846 | -| 33 | 21845 | 1 | 3 | 21845 | -| 33+ | -21846 | 1 | 4 | 21845 | -| 34 | -21846 | 1 | 4 | -21846 | -| 34+ | -21846 | 0 | 0 | 21845 | -| 35 | -21846 | 0 | 0 | 21845 | -| 35 | -21846 | 0 | 1 | 21845 | -| 35 | -21846 | 0 | 2 | 21845 | -| 35 | -21846 | 0 | 3 | 21845 | -| 35 | -21846 | 0 | 4 | -21846 | -| 35 | -21846 | 0 | 5 | 21845 | -| 35 | -21846 | 0 | 6 | 21845 | -| 35 | -21846 | 0 | 7 | 21845 | -| 35+ | 21845 | 1 | 4 | -21846 | -| 36 | 21845 | 1 | 4 | 21845 | -| 36+ | -21846 | 1 | 5 | 21845 | -| 37 | -21846 | 1 | 5 | -21846 | -| 37+ | -21846 | 0 | 0 | 21845 | -| 38 | -21846 | 0 | 0 | 21845 | -| 38 | -21846 | 0 | 1 | 21845 | -| 38 | -21846 | 0 | 2 | 21845 | -| 38 | -21846 | 0 | 3 | 21845 | -| 38 | -21846 | 0 | 4 | 21845 | -| 38 | -21846 | 0 | 5 | -21846 | -| 38 | -21846 | 0 | 6 | 21845 | -| 38 | -21846 | 0 | 7 | 21845 | -| 38+ | 21845 | 1 | 5 | -21846 | -| 39 | 21845 | 1 | 5 | 21845 | -| 39+ | -21846 | 1 | 6 | 21845 | -| 40 | -21846 | 1 | 6 | -21846 | -| 40+ | -21846 | 0 | 0 | 21845 | -| 41 | -21846 | 0 | 0 | 21845 | -| 41 | -21846 | 0 | 1 | 21845 | -| 41 | -21846 | 0 | 2 | 21845 | -| 41 | -21846 | 0 | 3 | 21845 | -| 41 | -21846 | 0 | 4 | 21845 | -| 41 | -21846 | 0 | 5 | 21845 | -| 41 | -21846 | 0 | 6 | -21846 | -| 41 | -21846 | 0 | 7 | 21845 | -| 41+ | 21845 | 1 | 6 | -21846 | -| 42 | 21845 | 1 | 6 | 21845 | -| 42+ | -21846 | 1 | 7 | 21845 | -| 43 | -21846 | 1 | 7 | -21846 | -| 43+ | -21846 | 0 | 0 | 21845 | -| 44 | -21846 | 0 | 0 | 21845 | -| 44 | -21846 | 0 | 1 | 21845 | -| 44 | -21846 | 0 | 2 | 21845 | -| 44 | -21846 | 0 | 3 | 21845 | -| 44 | -21846 | 0 | 4 | 21845 | -| 44 | -21846 | 0 | 5 | 21845 | -| 44 | -21846 | 0 | 6 | 21845 | -| 44 | -21846 | 0 | 7 | -21846 | -| 44+ | 21845 | 1 | 7 | -21846 | -| 45 | 21845 | 1 | 7 | 21845 | -| 45+ | 21845 | 0 | 0 | 21845 | -| 46 | 21845 | 0 | 0 | 21845 | -| 46 | 21845 | 0 | 1 | 21845 | -| 46 | 21845 | 0 | 2 | 21845 | -| 46 | 21845 | 0 | 3 | 21845 | -| 46 | 21845 | 0 | 4 | 21845 | -| 46 | 21845 | 0 | 5 | 21845 | -| 46 | 21845 | 0 | 6 | 21845 | -| 46 | 21845 | 0 | 7 | 21845 |`; +export const tst = `// This file is part of www.nand2tetris.org +// and the book "The Elements of Computing Systems" +// by Nisan and Schocken, MIT Press. +// File name: projects/3/a/RAM8.tst + +output-list time%S1.3.1 in%D1.6.1 load%B2.1.1 address%D3.1.3 out%D1.6.1; + +set in 0, +set load 0, +set address 0, +tick, +output; +tock, +output; + +set load 1, +tick, +output; +tock, +output; + +set in 11111, +set load 0, +tick, +output; +tock, +output; + +set load 1, +set address 1, +tick, +output; +tock, +output; + +set load 0, +set address 0, +tick, +output; +tock, +output; + +set in 3333, +set address 3, +tick, +output; +tock, +output; + +set load 1, +tick, +output; +tock, +output; + +set load 0, +tick, +output; +tock, +output; + +set address 1, +eval, +output; + +set in 7777, +tick, +output; +tock, +output; + +set load 1, +set address 7, +tick, +output; +tock, +output; + +set load 0, +tick, +output; +tock, +output; + +set address 3, +eval, +output; + +set address 7, +eval, +output; + +set load 0, +set address 0, +tick, +output; +tock, +output; +set address 1, +eval, +output; +set address 2, +eval, +output; +set address 3, +eval, +output; +set address 4, +eval, +output; +set address 5, +eval, +output; +set address 6, +eval, +output; +set address 7, +eval, +output; + +set load 1, +set in %B0101010101010101, +set address 0, +tick, +output; +tock, +output; +set address 1, +tick, +output, +tock, +output; +set address 2, +tick, +output, +tock, +output; +set address 3, +tick, +output, +tock, +output; +set address 4, +tick, +output, +tock, +output; +set address 5, +tick, +output, +tock, +output; +set address 6, +tick, +output, +tock, +output; +set address 7, +tick, +output, +tock, +output; + +set load 0, +set address 0, +tick, +output; +tock, +output; +set address 1, +eval, +output; +set address 2, +eval, +output; +set address 3, +eval, +output; +set address 4, +eval, +output; +set address 5, +eval, +output; +set address 6, +eval, +output; +set address 7, +eval, +output; + +set load 1, +set address 0, +set in %B1010101010101010, +tick, +output; +tock, +output; + +set load 0, +set address 0, +tick, +output; +tock, +output; +set address 1, +eval, +output; +set address 2, +eval, +output; +set address 3, +eval, +output; +set address 4, +eval, +output; +set address 5, +eval, +output; +set address 6, +eval, +output; +set address 7, +eval, +output; + +set load 1, +set address 0, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address 1, +set in %B1010101010101010, +tick, +output; +tock, +output; + +set load 0, +set address 0, +tick, +output; +tock, +output; +set address 1, +eval, +output; +set address 2, +eval, +output; +set address 3, +eval, +output; +set address 4, +eval, +output; +set address 5, +eval, +output; +set address 6, +eval, +output; +set address 7, +eval, +output; + +set load 1, +set address 1, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address 2, +set in %B1010101010101010, +tick, +output; +tock, +output; + +set load 0, +set address 0, +tick, +output; +tock, +output; +set address 1, +eval, +output; +set address 2, +eval, +output; +set address 3, +eval, +output; +set address 4, +eval, +output; +set address 5, +eval, +output; +set address 6, +eval, +output; +set address 7, +eval, +output; + +set load 1, +set address 2, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address 3, +set in %B1010101010101010, +tick, +output; +tock, +output; + +set load 0, +set address 0, +tick, +output; +tock, +output; +set address 1, +eval, +output; +set address 2, +eval, +output; +set address 3, +eval, +output; +set address 4, +eval, +output; +set address 5, +eval, +output; +set address 6, +eval, +output; +set address 7, +eval, +output; + +set load 1, +set address 3, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address 4, +set in %B1010101010101010, +tick, +output; +tock, +output; + +set load 0, +set address 0, +tick, +output; +tock, +output; +set address 1, +eval, +output; +set address 2, +eval, +output; +set address 3, +eval, +output; +set address 4, +eval, +output; +set address 5, +eval, +output; +set address 6, +eval, +output; +set address 7, +eval, +output; + +set load 1, +set address 4, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address 5, +set in %B1010101010101010, +tick, +output; +tock, +output; + +set load 0, +set address 0, +tick, +output; +tock, +output; +set address 1, +eval, +output; +set address 2, +eval, +output; +set address 3, +eval, +output; +set address 4, +eval, +output; +set address 5, +eval, +output; +set address 6, +eval, +output; +set address 7, +eval, +output; + +set load 1, +set address 5, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address 6, +set in %B1010101010101010, +tick, +output; +tock, +output; + +set load 0, +set address 0, +tick, +output; +tock, +output; +set address 1, +eval, +output; +set address 2, +eval, +output; +set address 3, +eval, +output; +set address 4, +eval, +output; +set address 5, +eval, +output; +set address 6, +eval, +output; +set address 7, +eval, +output; + +set load 1, +set address 6, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address 7, +set in %B1010101010101010, +tick, +output; +tock, +output; + +set load 0, +set address 0, +tick, +output; +tock, +output; +set address 1, +eval, +output; +set address 2, +eval, +output; +set address 3, +eval, +output; +set address 4, +eval, +output; +set address 5, +eval, +output; +set address 6, +eval, +output; +set address 7, +eval, +output; + +set load 1, +set address 7, +set in %B0101010101010101, +tick, +output, +tock, +output; + +set load 0, +set address 0, +tick, +output; +tock, +output; +set address 1, +eval, +output; +set address 2, +eval, +output; +set address 3, +eval, +output; +set address 4, +eval, +output; +set address 5, +eval, +output; +set address 6, +eval, +output; +set address 7, +eval, +output; +`; +export const cmp = `|time | in |load|address| out | +| 0+ | 0 | 0 | 0 | 0 | +| 1 | 0 | 0 | 0 | 0 | +| 1+ | 0 | 1 | 0 | 0 | +| 2 | 0 | 1 | 0 | 0 | +| 2+ | 11111 | 0 | 0 | 0 | +| 3 | 11111 | 0 | 0 | 0 | +| 3+ | 11111 | 1 | 1 | 0 | +| 4 | 11111 | 1 | 1 | 11111 | +| 4+ | 11111 | 0 | 0 | 0 | +| 5 | 11111 | 0 | 0 | 0 | +| 5+ | 3333 | 0 | 3 | 0 | +| 6 | 3333 | 0 | 3 | 0 | +| 6+ | 3333 | 1 | 3 | 0 | +| 7 | 3333 | 1 | 3 | 3333 | +| 7+ | 3333 | 0 | 3 | 3333 | +| 8 | 3333 | 0 | 3 | 3333 | +| 8 | 3333 | 0 | 1 | 11111 | +| 8+ | 7777 | 0 | 1 | 11111 | +| 9 | 7777 | 0 | 1 | 11111 | +| 9+ | 7777 | 1 | 7 | 0 | +| 10 | 7777 | 1 | 7 | 7777 | +| 10+ | 7777 | 0 | 7 | 7777 | +| 11 | 7777 | 0 | 7 | 7777 | +| 11 | 7777 | 0 | 3 | 3333 | +| 11 | 7777 | 0 | 7 | 7777 | +| 11+ | 7777 | 0 | 0 | 0 | +| 12 | 7777 | 0 | 0 | 0 | +| 12 | 7777 | 0 | 1 | 11111 | +| 12 | 7777 | 0 | 2 | 0 | +| 12 | 7777 | 0 | 3 | 3333 | +| 12 | 7777 | 0 | 4 | 0 | +| 12 | 7777 | 0 | 5 | 0 | +| 12 | 7777 | 0 | 6 | 0 | +| 12 | 7777 | 0 | 7 | 7777 | +| 12+ | 21845 | 1 | 0 | 0 | +| 13 | 21845 | 1 | 0 | 21845 | +| 13+ | 21845 | 1 | 1 | 11111 | +| 14 | 21845 | 1 | 1 | 21845 | +| 14+ | 21845 | 1 | 2 | 0 | +| 15 | 21845 | 1 | 2 | 21845 | +| 15+ | 21845 | 1 | 3 | 3333 | +| 16 | 21845 | 1 | 3 | 21845 | +| 16+ | 21845 | 1 | 4 | 0 | +| 17 | 21845 | 1 | 4 | 21845 | +| 17+ | 21845 | 1 | 5 | 0 | +| 18 | 21845 | 1 | 5 | 21845 | +| 18+ | 21845 | 1 | 6 | 0 | +| 19 | 21845 | 1 | 6 | 21845 | +| 19+ | 21845 | 1 | 7 | 7777 | +| 20 | 21845 | 1 | 7 | 21845 | +| 20+ | 21845 | 0 | 0 | 21845 | +| 21 | 21845 | 0 | 0 | 21845 | +| 21 | 21845 | 0 | 1 | 21845 | +| 21 | 21845 | 0 | 2 | 21845 | +| 21 | 21845 | 0 | 3 | 21845 | +| 21 | 21845 | 0 | 4 | 21845 | +| 21 | 21845 | 0 | 5 | 21845 | +| 21 | 21845 | 0 | 6 | 21845 | +| 21 | 21845 | 0 | 7 | 21845 | +| 21+ | -21846 | 1 | 0 | 21845 | +| 22 | -21846 | 1 | 0 | -21846 | +| 22+ | -21846 | 0 | 0 | -21846 | +| 23 | -21846 | 0 | 0 | -21846 | +| 23 | -21846 | 0 | 1 | 21845 | +| 23 | -21846 | 0 | 2 | 21845 | +| 23 | -21846 | 0 | 3 | 21845 | +| 23 | -21846 | 0 | 4 | 21845 | +| 23 | -21846 | 0 | 5 | 21845 | +| 23 | -21846 | 0 | 6 | 21845 | +| 23 | -21846 | 0 | 7 | 21845 | +| 23+ | 21845 | 1 | 0 | -21846 | +| 24 | 21845 | 1 | 0 | 21845 | +| 24+ | -21846 | 1 | 1 | 21845 | +| 25 | -21846 | 1 | 1 | -21846 | +| 25+ | -21846 | 0 | 0 | 21845 | +| 26 | -21846 | 0 | 0 | 21845 | +| 26 | -21846 | 0 | 1 | -21846 | +| 26 | -21846 | 0 | 2 | 21845 | +| 26 | -21846 | 0 | 3 | 21845 | +| 26 | -21846 | 0 | 4 | 21845 | +| 26 | -21846 | 0 | 5 | 21845 | +| 26 | -21846 | 0 | 6 | 21845 | +| 26 | -21846 | 0 | 7 | 21845 | +| 26+ | 21845 | 1 | 1 | -21846 | +| 27 | 21845 | 1 | 1 | 21845 | +| 27+ | -21846 | 1 | 2 | 21845 | +| 28 | -21846 | 1 | 2 | -21846 | +| 28+ | -21846 | 0 | 0 | 21845 | +| 29 | -21846 | 0 | 0 | 21845 | +| 29 | -21846 | 0 | 1 | 21845 | +| 29 | -21846 | 0 | 2 | -21846 | +| 29 | -21846 | 0 | 3 | 21845 | +| 29 | -21846 | 0 | 4 | 21845 | +| 29 | -21846 | 0 | 5 | 21845 | +| 29 | -21846 | 0 | 6 | 21845 | +| 29 | -21846 | 0 | 7 | 21845 | +| 29+ | 21845 | 1 | 2 | -21846 | +| 30 | 21845 | 1 | 2 | 21845 | +| 30+ | -21846 | 1 | 3 | 21845 | +| 31 | -21846 | 1 | 3 | -21846 | +| 31+ | -21846 | 0 | 0 | 21845 | +| 32 | -21846 | 0 | 0 | 21845 | +| 32 | -21846 | 0 | 1 | 21845 | +| 32 | -21846 | 0 | 2 | 21845 | +| 32 | -21846 | 0 | 3 | -21846 | +| 32 | -21846 | 0 | 4 | 21845 | +| 32 | -21846 | 0 | 5 | 21845 | +| 32 | -21846 | 0 | 6 | 21845 | +| 32 | -21846 | 0 | 7 | 21845 | +| 32+ | 21845 | 1 | 3 | -21846 | +| 33 | 21845 | 1 | 3 | 21845 | +| 33+ | -21846 | 1 | 4 | 21845 | +| 34 | -21846 | 1 | 4 | -21846 | +| 34+ | -21846 | 0 | 0 | 21845 | +| 35 | -21846 | 0 | 0 | 21845 | +| 35 | -21846 | 0 | 1 | 21845 | +| 35 | -21846 | 0 | 2 | 21845 | +| 35 | -21846 | 0 | 3 | 21845 | +| 35 | -21846 | 0 | 4 | -21846 | +| 35 | -21846 | 0 | 5 | 21845 | +| 35 | -21846 | 0 | 6 | 21845 | +| 35 | -21846 | 0 | 7 | 21845 | +| 35+ | 21845 | 1 | 4 | -21846 | +| 36 | 21845 | 1 | 4 | 21845 | +| 36+ | -21846 | 1 | 5 | 21845 | +| 37 | -21846 | 1 | 5 | -21846 | +| 37+ | -21846 | 0 | 0 | 21845 | +| 38 | -21846 | 0 | 0 | 21845 | +| 38 | -21846 | 0 | 1 | 21845 | +| 38 | -21846 | 0 | 2 | 21845 | +| 38 | -21846 | 0 | 3 | 21845 | +| 38 | -21846 | 0 | 4 | 21845 | +| 38 | -21846 | 0 | 5 | -21846 | +| 38 | -21846 | 0 | 6 | 21845 | +| 38 | -21846 | 0 | 7 | 21845 | +| 38+ | 21845 | 1 | 5 | -21846 | +| 39 | 21845 | 1 | 5 | 21845 | +| 39+ | -21846 | 1 | 6 | 21845 | +| 40 | -21846 | 1 | 6 | -21846 | +| 40+ | -21846 | 0 | 0 | 21845 | +| 41 | -21846 | 0 | 0 | 21845 | +| 41 | -21846 | 0 | 1 | 21845 | +| 41 | -21846 | 0 | 2 | 21845 | +| 41 | -21846 | 0 | 3 | 21845 | +| 41 | -21846 | 0 | 4 | 21845 | +| 41 | -21846 | 0 | 5 | 21845 | +| 41 | -21846 | 0 | 6 | -21846 | +| 41 | -21846 | 0 | 7 | 21845 | +| 41+ | 21845 | 1 | 6 | -21846 | +| 42 | 21845 | 1 | 6 | 21845 | +| 42+ | -21846 | 1 | 7 | 21845 | +| 43 | -21846 | 1 | 7 | -21846 | +| 43+ | -21846 | 0 | 0 | 21845 | +| 44 | -21846 | 0 | 0 | 21845 | +| 44 | -21846 | 0 | 1 | 21845 | +| 44 | -21846 | 0 | 2 | 21845 | +| 44 | -21846 | 0 | 3 | 21845 | +| 44 | -21846 | 0 | 4 | 21845 | +| 44 | -21846 | 0 | 5 | 21845 | +| 44 | -21846 | 0 | 6 | 21845 | +| 44 | -21846 | 0 | 7 | -21846 | +| 44+ | 21845 | 1 | 7 | -21846 | +| 45 | 21845 | 1 | 7 | 21845 | +| 45+ | 21845 | 0 | 0 | 21845 | +| 46 | 21845 | 0 | 0 | 21845 | +| 46 | 21845 | 0 | 1 | 21845 | +| 46 | 21845 | 0 | 2 | 21845 | +| 46 | 21845 | 0 | 3 | 21845 | +| 46 | 21845 | 0 | 4 | 21845 | +| 46 | 21845 | 0 | 5 | 21845 | +| 46 | 21845 | 0 | 6 | 21845 | +| 46 | 21845 | 0 | 7 | 21845 |`; diff --git a/projects/src/project_03/05_ram64.ts b/projects/src/project_03/05_ram64.ts index 12cf7e2fb..d76392287 100644 --- a/projects/src/project_03/05_ram64.ts +++ b/projects/src/project_03/05_ram64.ts @@ -1,7 +1,7 @@ export const hdl = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/03/a/RAM64.hdl +// File name: projects/3/a/RAM64.hdl /** * Memory of sixty four 16-bit registers. * If load is asserted, the value of the register selected by @@ -15,638 +15,1347 @@ CHIP RAM64 { PARTS: //// Replace this comment with your code. }`; -export const tst = `output-list time%S1.4.1 in%D1.6.1 load%B2.1.2 address%D2.3.2 out%D1.6.1; +export const tst = `// This file is part of www.nand2tetris.org +// and the book "The Elements of Computing Systems" +// by Nisan and Schocken, MIT Press. +// File name: projects/3/a/RAM64.tst + +output-list time%S1.3.1 in%D1.6.1 load%B2.1.1 address%D2.3.2 out%D1.6.1; + +set in 0, +set load 0, +set address 0, +tick, +output; +tock, +output; -set in 0, set load 0, -set address 0, tick, output; tock, output; -set load 1, tick, output; tock, output; -set in 1313, set load 0, tick, output; tock, output; set load 1, -set address 13, tick, output; tock, output; +tick, +output; +tock, +output; + +set in 1313, set load 0, -set address 0, tick, output; tock, output; -set in 4747, set address 47, tick, output; tock, output; -set load 1, tick, output; tock, output; -set load 0, tick, output; tock, output; -set address 13, eval, output; +tick, +output; +tock, +output; -set in 6363, tick, output; tock, output; set load 1, -set address 63, tick, output; tock, output; -set load 0, tick, output; tock, output; -set address 47, eval, output; +set address 13, +tick, +output; +tock, +output; + +set load 0, +set address 0, +tick, +output; +tock, +output; -set address 63, eval, output; +set in 4747, +set address 47, +tick, +output; +tock, +output; + +set load 1, +tick, +output; +tock, +output; set load 0, -set address %B101000, tick, output; tock, output; -set address %B101001, eval, output; -set address %B101010, eval, output; -set address %B101011, eval, output; -set address %B101100, eval, output; -set address %B101101, eval, output; -set address %B101110, eval, output; -set address %B101111, eval, output; +tick, +output; +tock, +output; + +set address 13, +eval, +output; + +set in 6363, +tick, +output; +tock, +output; set load 1, -set in %B0101010101010101, set address %B101000, tick, output; tock, output; -set address %B101001, tick, output, tock, output; -set address %B101010, tick, output, tock, output; -set address %B101011, tick, output, tock, output; -set address %B101100, tick, output, tock, output; -set address %B101101, tick, output, tock, output; -set address %B101110, tick, output, tock, output; -set address %B101111, tick, output, tock, output; +set address 63, +tick, +output; +tock, +output; + +set load 0, +tick, +output; +tock, +output; + +set address 47, +eval, +output; + +set address 63, +eval, +output; + set load 0, -set address %B101000, tick, output; tock, output; -set address %B101001, eval, output; -set address %B101010, eval, output; -set address %B101011, eval, output; -set address %B101100, eval, output; -set address %B101101, eval, output; -set address %B101110, eval, output; -set address %B101111, eval, output; +set address %B101000, +tick, +output; +tock, +output; +set address %B101001, +eval, +output; +set address %B101010, +eval, +output; +set address %B101011, +eval, +output; +set address %B101100, +eval, +output; +set address %B101101, +eval, +output; +set address %B101110, +eval, +output; +set address %B101111, +eval, +output; set load 1, -set address %B101000, set in %B1010101010101010, tick, output; tock, output; +set in %B0101010101010101, +set address %B101000, +tick, +output; +tock, +output; +set address %B101001, +tick, +output, +tock, +output; +set address %B101010, +tick, +output, +tock, +output; +set address %B101011, +tick, +output, +tock, +output; +set address %B101100, +tick, +output, +tock, +output; +set address %B101101, +tick, +output, +tock, +output; +set address %B101110, +tick, +output, +tock, +output; +set address %B101111, +tick, +output, +tock, +output; + set load 0, -set address %B101000, tick, output; tock, output; -set address %B101001, eval, output; -set address %B101010, eval, output; -set address %B101011, eval, output; -set address %B101100, eval, output; -set address %B101101, eval, output; -set address %B101110, eval, output; -set address %B101111, eval, output; +set address %B101000, +tick, +output; +tock, +output; +set address %B101001, +eval, +output; +set address %B101010, +eval, +output; +set address %B101011, +eval, +output; +set address %B101100, +eval, +output; +set address %B101101, +eval, +output; +set address %B101110, +eval, +output; +set address %B101111, +eval, +output; set load 1, -set address %B101000, set in %B0101010101010101, tick, output, tock, output; -set address %B101001, set in %B1010101010101010, tick, output; tock, output; +set address %B101000, +set in %B1010101010101010, +tick, +output; +tock, +output; + set load 0, -set address %B101000, tick, output; tock, output; -set address %B101001, eval, output; -set address %B101010, eval, output; -set address %B101011, eval, output; -set address %B101100, eval, output; -set address %B101101, eval, output; -set address %B101110, eval, output; -set address %B101111, eval, output; +set address %B101000, +tick, +output; +tock, +output; +set address %B101001, +eval, +output; +set address %B101010, +eval, +output; +set address %B101011, +eval, +output; +set address %B101100, +eval, +output; +set address %B101101, +eval, +output; +set address %B101110, +eval, +output; +set address %B101111, +eval, +output; set load 1, -set address %B101001, set in %B0101010101010101, tick, output, tock, output; -set address %B101010, set in %B1010101010101010, tick, output; tock, output; +set address %B101000, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address %B101001, +set in %B1010101010101010, +tick, +output; +tock, +output; + set load 0, -set address %B101000, tick, output; tock, output; -set address %B101001, eval, output; -set address %B101010, eval, output; -set address %B101011, eval, output; -set address %B101100, eval, output; -set address %B101101, eval, output; -set address %B101110, eval, output; -set address %B101111, eval, output; +set address %B101000, +tick, +output; +tock, +output; +set address %B101001, +eval, +output; +set address %B101010, +eval, +output; +set address %B101011, +eval, +output; +set address %B101100, +eval, +output; +set address %B101101, +eval, +output; +set address %B101110, +eval, +output; +set address %B101111, +eval, +output; set load 1, -set address %B101010, set in %B0101010101010101, tick, output, tock, output; -set address %B101011, set in %B1010101010101010, tick, output; tock, output; +set address %B101001, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address %B101010, +set in %B1010101010101010, +tick, +output; +tock, +output; + +set load 0, +set address %B101000, +tick, +output; +tock, +output; +set address %B101001, +eval, +output; +set address %B101010, +eval, +output; +set address %B101011, +eval, +output; +set address %B101100, +eval, +output; +set address %B101101, +eval, +output; +set address %B101110, +eval, +output; +set address %B101111, +eval, +output; + +set load 1, +set address %B101010, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address %B101011, +set in %B1010101010101010, +tick, +output; +tock, +output; + set load 0, -set address %B101000, tick, output; tock, output; -set address %B101001, eval, output; -set address %B101010, eval, output; -set address %B101011, eval, output; -set address %B101100, eval, output; -set address %B101101, eval, output; -set address %B101110, eval, output; -set address %B101111, eval, output; +set address %B101000, +tick, +output; +tock, +output; +set address %B101001, +eval, +output; +set address %B101010, +eval, +output; +set address %B101011, +eval, +output; +set address %B101100, +eval, +output; +set address %B101101, +eval, +output; +set address %B101110, +eval, +output; +set address %B101111, +eval, +output; set load 1, -set address %B101011, set in %B0101010101010101, tick, output, tock, output; -set address %B101100, set in %B1010101010101010, tick, output; tock, output; +set address %B101011, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address %B101100, +set in %B1010101010101010, +tick, +output; +tock, +output; + set load 0, -set address %B101000, tick, output; tock, output; -set address %B101001, eval, output; -set address %B101010, eval, output; -set address %B101011, eval, output; -set address %B101100, eval, output; -set address %B101101, eval, output; -set address %B101110, eval, output; -set address %B101111, eval, output; +set address %B101000, +tick, +output; +tock, +output; +set address %B101001, +eval, +output; +set address %B101010, +eval, +output; +set address %B101011, +eval, +output; +set address %B101100, +eval, +output; +set address %B101101, +eval, +output; +set address %B101110, +eval, +output; +set address %B101111, +eval, +output; set load 1, -set address %B101100, set in %B0101010101010101, tick, output, tock, output; -set address %B101101, set in %B1010101010101010, tick, output; tock, output; +set address %B101100, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address %B101101, +set in %B1010101010101010, +tick, +output; +tock, +output; + set load 0, -set address %B101000, tick, output; tock, output; -set address %B101001, eval, output; -set address %B101010, eval, output; -set address %B101011, eval, output; -set address %B101100, eval, output; -set address %B101101, eval, output; -set address %B101110, eval, output; -set address %B101111, eval, output; +set address %B101000, +tick, +output; +tock, +output; +set address %B101001, +eval, +output; +set address %B101010, +eval, +output; +set address %B101011, +eval, +output; +set address %B101100, +eval, +output; +set address %B101101, +eval, +output; +set address %B101110, +eval, +output; +set address %B101111, +eval, +output; set load 1, -set address %B101101, set in %B0101010101010101, tick, output, tock, output; -set address %B101110, set in %B1010101010101010, tick, output; tock, output; +set address %B101101, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address %B101110, +set in %B1010101010101010, +tick, +output; +tock, +output; + set load 0, -set address %B101000, tick, output; tock, output; -set address %B101001, eval, output; -set address %B101010, eval, output; -set address %B101011, eval, output; -set address %B101100, eval, output; -set address %B101101, eval, output; -set address %B101110, eval, output; -set address %B101111, eval, output; +set address %B101000, +tick, +output; +tock, +output; +set address %B101001, +eval, +output; +set address %B101010, +eval, +output; +set address %B101011, +eval, +output; +set address %B101100, +eval, +output; +set address %B101101, +eval, +output; +set address %B101110, +eval, +output; +set address %B101111, +eval, +output; set load 1, -set address %B101110, set in %B0101010101010101, tick, output, tock, output; -set address %B101111, set in %B1010101010101010, tick, output; tock, output; +set address %B101110, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address %B101111, +set in %B1010101010101010, +tick, +output; +tock, +output; + set load 0, -set address %B101000, tick, output; tock, output; -set address %B101001, eval, output; -set address %B101010, eval, output; -set address %B101011, eval, output; -set address %B101100, eval, output; -set address %B101101, eval, output; -set address %B101110, eval, output; -set address %B101111, eval, output; +set address %B101000, +tick, +output; +tock, +output; +set address %B101001, +eval, +output; +set address %B101010, +eval, +output; +set address %B101011, +eval, +output; +set address %B101100, +eval, +output; +set address %B101101, +eval, +output; +set address %B101110, +eval, +output; +set address %B101111, +eval, +output; set load 1, -set address %B101111, set in %B0101010101010101, tick, output, tock, output; +set address %B101111, +set in %B0101010101010101, +tick, +output, +tock, +output; set load 0, -set address %B101000, tick, output; tock, output; -set address %B101001, eval, output; -set address %B101010, eval, output; -set address %B101011, eval, output; -set address %B101100, eval, output; -set address %B101101, eval, output; -set address %B101110, eval, output; -set address %B101111, eval, output; +set address %B101000, +tick, +output; +tock, +output; +set address %B101001, +eval, +output; +set address %B101010, +eval, +output; +set address %B101011, +eval, +output; +set address %B101100, +eval, +output; +set address %B101101, +eval, +output; +set address %B101110, +eval, +output; +set address %B101111, +eval, +output; + set load 0, -set address %B000101, tick, output; tock, output; -set address %B001101, eval, output; -set address %B010101, eval, output; -set address %B011101, eval, output; -set address %B100101, eval, output; -set address %B101101, eval, output; -set address %B110101, eval, output; -set address %B111101, eval, output; +set address %B000101, +tick, +output; +tock, +output; +set address %B001101, +eval, +output; +set address %B010101, +eval, +output; +set address %B011101, +eval, +output; +set address %B100101, +eval, +output; +set address %B101101, +eval, +output; +set address %B110101, +eval, +output; +set address %B111101, +eval, +output; set load 1, -set in %B0101010101010101, set address %B000101, tick, output; tock, output; -set address %B001101, tick, output, tock, output; -set address %B010101, tick, output, tock, output; -set address %B011101, tick, output, tock, output; -set address %B100101, tick, output, tock, output; -set address %B101101, tick, output, tock, output; -set address %B110101, tick, output, tock, output; -set address %B111101, tick, output, tock, output; +set in %B0101010101010101, +set address %B000101, +tick, +output; +tock, +output; +set address %B001101, +tick, +output, +tock, +output; +set address %B010101, +tick, +output, +tock, +output; +set address %B011101, +tick, +output, +tock, +output; +set address %B100101, +tick, +output, +tock, +output; +set address %B101101, +tick, +output, +tock, +output; +set address %B110101, +tick, +output, +tock, +output; +set address %B111101, +tick, +output, +tock, +output; set load 0, -set address %B000101, tick, output; tock, output; -set address %B001101, eval, output; -set address %B010101, eval, output; -set address %B011101, eval, output; -set address %B100101, eval, output; -set address %B101101, eval, output; -set address %B110101, eval, output; -set address %B111101, eval, output; +set address %B000101, +tick, +output; +tock, +output; +set address %B001101, +eval, +output; +set address %B010101, +eval, +output; +set address %B011101, +eval, +output; +set address %B100101, +eval, +output; +set address %B101101, +eval, +output; +set address %B110101, +eval, +output; +set address %B111101, +eval, +output; set load 1, -set address %B000101, set in %B1010101010101010, tick, output; tock, output; +set address %B000101, +set in %B1010101010101010, +tick, +output; +tock, +output; + set load 0, -set address %B000101, tick, output; tock, output; -set address %B001101, eval, output; -set address %B010101, eval, output; -set address %B011101, eval, output; -set address %B100101, eval, output; -set address %B101101, eval, output; -set address %B110101, eval, output; -set address %B111101, eval, output; +set address %B000101, +tick, +output; +tock, +output; +set address %B001101, +eval, +output; +set address %B010101, +eval, +output; +set address %B011101, +eval, +output; +set address %B100101, +eval, +output; +set address %B101101, +eval, +output; +set address %B110101, +eval, +output; +set address %B111101, +eval, +output; set load 1, -set address %B000101, set in %B0101010101010101, tick, output, tock, output; -set address %B001101, set in %B1010101010101010, tick, output; tock, output; +set address %B000101, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address %B001101, +set in %B1010101010101010, +tick, +output; +tock, +output; + set load 0, -set address %B000101, tick, output; tock, output; -set address %B001101, eval, output; -set address %B010101, eval, output; -set address %B011101, eval, output; -set address %B100101, eval, output; -set address %B101101, eval, output; -set address %B110101, eval, output; -set address %B111101, eval, output; +set address %B000101, +tick, +output; +tock, +output; +set address %B001101, +eval, +output; +set address %B010101, +eval, +output; +set address %B011101, +eval, +output; +set address %B100101, +eval, +output; +set address %B101101, +eval, +output; +set address %B110101, +eval, +output; +set address %B111101, +eval, +output; set load 1, -set address %B001101, set in %B0101010101010101, tick, output, tock, output; -set address %B010101, set in %B1010101010101010, tick, output; tock, output; +set address %B001101, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address %B010101, +set in %B1010101010101010, +tick, +output; +tock, +output; + set load 0, -set address %B000101, tick, output; tock, output; -set address %B001101, eval, output; -set address %B010101, eval, output; -set address %B011101, eval, output; -set address %B100101, eval, output; -set address %B101101, eval, output; -set address %B110101, eval, output; -set address %B111101, eval, output; +set address %B000101, +tick, +output; +tock, +output; +set address %B001101, +eval, +output; +set address %B010101, +eval, +output; +set address %B011101, +eval, +output; +set address %B100101, +eval, +output; +set address %B101101, +eval, +output; +set address %B110101, +eval, +output; +set address %B111101, +eval, +output; set load 1, -set address %B010101, set in %B0101010101010101, tick, output, tock, output; -set address %B011101, set in %B1010101010101010, tick, output; tock, output; +set address %B010101, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address %B011101, +set in %B1010101010101010, +tick, +output; +tock, +output; + set load 0, -set address %B000101, tick, output; tock, output; -set address %B001101, eval, output; -set address %B010101, eval, output; -set address %B011101, eval, output; -set address %B100101, eval, output; -set address %B101101, eval, output; -set address %B110101, eval, output; -set address %B111101, eval, output; +set address %B000101, +tick, +output; +tock, +output; +set address %B001101, +eval, +output; +set address %B010101, +eval, +output; +set address %B011101, +eval, +output; +set address %B100101, +eval, +output; +set address %B101101, +eval, +output; +set address %B110101, +eval, +output; +set address %B111101, +eval, +output; set load 1, -set address %B011101, set in %B0101010101010101, tick, output, tock, output; -set address %B100101, set in %B1010101010101010, tick, output; tock, output; +set address %B011101, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address %B100101, +set in %B1010101010101010, +tick, +output; +tock, +output; + set load 0, -set address %B000101, tick, output; tock, output; -set address %B001101, eval, output; -set address %B010101, eval, output; -set address %B011101, eval, output; -set address %B100101, eval, output; -set address %B101101, eval, output; -set address %B110101, eval, output; -set address %B111101, eval, output; +set address %B000101, +tick, +output; +tock, +output; +set address %B001101, +eval, +output; +set address %B010101, +eval, +output; +set address %B011101, +eval, +output; +set address %B100101, +eval, +output; +set address %B101101, +eval, +output; +set address %B110101, +eval, +output; +set address %B111101, +eval, +output; set load 1, -set address %B100101, set in %B0101010101010101, tick, output, tock, output; -set address %B101101, set in %B1010101010101010, tick, output; tock, output; +set address %B100101, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address %B101101, +set in %B1010101010101010, +tick, +output; +tock, +output; + set load 0, -set address %B000101, tick, output; tock, output; -set address %B001101, eval, output; -set address %B010101, eval, output; -set address %B011101, eval, output; -set address %B100101, eval, output; -set address %B101101, eval, output; -set address %B110101, eval, output; -set address %B111101, eval, output; +set address %B000101, +tick, +output; +tock, +output; +set address %B001101, +eval, +output; +set address %B010101, +eval, +output; +set address %B011101, +eval, +output; +set address %B100101, +eval, +output; +set address %B101101, +eval, +output; +set address %B110101, +eval, +output; +set address %B111101, +eval, +output; set load 1, -set address %B101101, set in %B0101010101010101, tick, output, tock, output; -set address %B110101, set in %B1010101010101010, tick, output; tock, output; +set address %B101101, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address %B110101, +set in %B1010101010101010, +tick, +output; +tock, +output; + set load 0, -set address %B000101, tick, output; tock, output; -set address %B001101, eval, output; -set address %B010101, eval, output; -set address %B011101, eval, output; -set address %B100101, eval, output; -set address %B101101, eval, output; -set address %B110101, eval, output; -set address %B111101, eval, output; +set address %B000101, +tick, +output; +tock, +output; +set address %B001101, +eval, +output; +set address %B010101, +eval, +output; +set address %B011101, +eval, +output; +set address %B100101, +eval, +output; +set address %B101101, +eval, +output; +set address %B110101, +eval, +output; +set address %B111101, +eval, +output; set load 1, -set address %B110101, set in %B0101010101010101, tick, output, tock, output; -set address %B111101, set in %B1010101010101010, tick, output; tock, output; +set address %B110101, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address %B111101, +set in %B1010101010101010, +tick, +output; +tock, +output; + set load 0, -set address %B000101, tick, output; tock, output; -set address %B001101, eval, output; -set address %B010101, eval, output; -set address %B011101, eval, output; -set address %B100101, eval, output; -set address %B101101, eval, output; -set address %B110101, eval, output; -set address %B111101, eval, output; +set address %B000101, +tick, +output; +tock, +output; +set address %B001101, +eval, +output; +set address %B010101, +eval, +output; +set address %B011101, +eval, +output; +set address %B100101, +eval, +output; +set address %B101101, +eval, +output; +set address %B110101, +eval, +output; +set address %B111101, +eval, +output; set load 1, -set address %B111101, set in %B0101010101010101, tick, output, tock, output; +set address %B111101, +set in %B0101010101010101, +tick, +output, +tock, +output; set load 0, -set address %B000101, tick, output; tock, output; -set address %B001101, eval, output; -set address %B010101, eval, output; -set address %B011101, eval, output; -set address %B100101, eval, output; -set address %B101101, eval, output; -set address %B110101, eval, output; -set address %B111101, eval, output;`; - -export const cmp = `| time | in |load |address| out | -| 0+ | 0 | 0 | 0 | 0 | -| 1 | 0 | 0 | 0 | 0 | -| 1+ | 0 | 1 | 0 | 0 | -| 2 | 0 | 1 | 0 | 0 | -| 2+ | 1313 | 0 | 0 | 0 | -| 3 | 1313 | 0 | 0 | 0 | -| 3+ | 1313 | 1 | 13 | 0 | -| 4 | 1313 | 1 | 13 | 1313 | -| 4+ | 1313 | 0 | 0 | 0 | -| 5 | 1313 | 0 | 0 | 0 | -| 5+ | 4747 | 0 | 47 | 0 | -| 6 | 4747 | 0 | 47 | 0 | -| 6+ | 4747 | 1 | 47 | 0 | -| 7 | 4747 | 1 | 47 | 4747 | -| 7+ | 4747 | 0 | 47 | 4747 | -| 8 | 4747 | 0 | 47 | 4747 | -| 8 | 4747 | 0 | 13 | 1313 | -| 8+ | 6363 | 0 | 13 | 1313 | -| 9 | 6363 | 0 | 13 | 1313 | -| 9+ | 6363 | 1 | 63 | 0 | -| 10 | 6363 | 1 | 63 | 6363 | -| 10+ | 6363 | 0 | 63 | 6363 | -| 11 | 6363 | 0 | 63 | 6363 | -| 11 | 6363 | 0 | 47 | 4747 | -| 11 | 6363 | 0 | 63 | 6363 | -| 11+ | 6363 | 0 | 40 | 0 | -| 12 | 6363 | 0 | 40 | 0 | -| 12 | 6363 | 0 | 41 | 0 | -| 12 | 6363 | 0 | 42 | 0 | -| 12 | 6363 | 0 | 43 | 0 | -| 12 | 6363 | 0 | 44 | 0 | -| 12 | 6363 | 0 | 45 | 0 | -| 12 | 6363 | 0 | 46 | 0 | -| 12 | 6363 | 0 | 47 | 4747 | -| 12+ | 21845 | 1 | 40 | 0 | -| 13 | 21845 | 1 | 40 | 21845 | -| 13+ | 21845 | 1 | 41 | 0 | -| 14 | 21845 | 1 | 41 | 21845 | -| 14+ | 21845 | 1 | 42 | 0 | -| 15 | 21845 | 1 | 42 | 21845 | -| 15+ | 21845 | 1 | 43 | 0 | -| 16 | 21845 | 1 | 43 | 21845 | -| 16+ | 21845 | 1 | 44 | 0 | -| 17 | 21845 | 1 | 44 | 21845 | -| 17+ | 21845 | 1 | 45 | 0 | -| 18 | 21845 | 1 | 45 | 21845 | -| 18+ | 21845 | 1 | 46 | 0 | -| 19 | 21845 | 1 | 46 | 21845 | -| 19+ | 21845 | 1 | 47 | 4747 | -| 20 | 21845 | 1 | 47 | 21845 | -| 20+ | 21845 | 0 | 40 | 21845 | -| 21 | 21845 | 0 | 40 | 21845 | -| 21 | 21845 | 0 | 41 | 21845 | -| 21 | 21845 | 0 | 42 | 21845 | -| 21 | 21845 | 0 | 43 | 21845 | -| 21 | 21845 | 0 | 44 | 21845 | -| 21 | 21845 | 0 | 45 | 21845 | -| 21 | 21845 | 0 | 46 | 21845 | -| 21 | 21845 | 0 | 47 | 21845 | -| 21+ | -21846 | 1 | 40 | 21845 | -| 22 | -21846 | 1 | 40 | -21846 | -| 22+ | -21846 | 0 | 40 | -21846 | -| 23 | -21846 | 0 | 40 | -21846 | -| 23 | -21846 | 0 | 41 | 21845 | -| 23 | -21846 | 0 | 42 | 21845 | -| 23 | -21846 | 0 | 43 | 21845 | -| 23 | -21846 | 0 | 44 | 21845 | -| 23 | -21846 | 0 | 45 | 21845 | -| 23 | -21846 | 0 | 46 | 21845 | -| 23 | -21846 | 0 | 47 | 21845 | -| 23+ | 21845 | 1 | 40 | -21846 | -| 24 | 21845 | 1 | 40 | 21845 | -| 24+ | -21846 | 1 | 41 | 21845 | -| 25 | -21846 | 1 | 41 | -21846 | -| 25+ | -21846 | 0 | 40 | 21845 | -| 26 | -21846 | 0 | 40 | 21845 | -| 26 | -21846 | 0 | 41 | -21846 | -| 26 | -21846 | 0 | 42 | 21845 | -| 26 | -21846 | 0 | 43 | 21845 | -| 26 | -21846 | 0 | 44 | 21845 | -| 26 | -21846 | 0 | 45 | 21845 | -| 26 | -21846 | 0 | 46 | 21845 | -| 26 | -21846 | 0 | 47 | 21845 | -| 26+ | 21845 | 1 | 41 | -21846 | -| 27 | 21845 | 1 | 41 | 21845 | -| 27+ | -21846 | 1 | 42 | 21845 | -| 28 | -21846 | 1 | 42 | -21846 | -| 28+ | -21846 | 0 | 40 | 21845 | -| 29 | -21846 | 0 | 40 | 21845 | -| 29 | -21846 | 0 | 41 | 21845 | -| 29 | -21846 | 0 | 42 | -21846 | -| 29 | -21846 | 0 | 43 | 21845 | -| 29 | -21846 | 0 | 44 | 21845 | -| 29 | -21846 | 0 | 45 | 21845 | -| 29 | -21846 | 0 | 46 | 21845 | -| 29 | -21846 | 0 | 47 | 21845 | -| 29+ | 21845 | 1 | 42 | -21846 | -| 30 | 21845 | 1 | 42 | 21845 | -| 30+ | -21846 | 1 | 43 | 21845 | -| 31 | -21846 | 1 | 43 | -21846 | -| 31+ | -21846 | 0 | 40 | 21845 | -| 32 | -21846 | 0 | 40 | 21845 | -| 32 | -21846 | 0 | 41 | 21845 | -| 32 | -21846 | 0 | 42 | 21845 | -| 32 | -21846 | 0 | 43 | -21846 | -| 32 | -21846 | 0 | 44 | 21845 | -| 32 | -21846 | 0 | 45 | 21845 | -| 32 | -21846 | 0 | 46 | 21845 | -| 32 | -21846 | 0 | 47 | 21845 | -| 32+ | 21845 | 1 | 43 | -21846 | -| 33 | 21845 | 1 | 43 | 21845 | -| 33+ | -21846 | 1 | 44 | 21845 | -| 34 | -21846 | 1 | 44 | -21846 | -| 34+ | -21846 | 0 | 40 | 21845 | -| 35 | -21846 | 0 | 40 | 21845 | -| 35 | -21846 | 0 | 41 | 21845 | -| 35 | -21846 | 0 | 42 | 21845 | -| 35 | -21846 | 0 | 43 | 21845 | -| 35 | -21846 | 0 | 44 | -21846 | -| 35 | -21846 | 0 | 45 | 21845 | -| 35 | -21846 | 0 | 46 | 21845 | -| 35 | -21846 | 0 | 47 | 21845 | -| 35+ | 21845 | 1 | 44 | -21846 | -| 36 | 21845 | 1 | 44 | 21845 | -| 36+ | -21846 | 1 | 45 | 21845 | -| 37 | -21846 | 1 | 45 | -21846 | -| 37+ | -21846 | 0 | 40 | 21845 | -| 38 | -21846 | 0 | 40 | 21845 | -| 38 | -21846 | 0 | 41 | 21845 | -| 38 | -21846 | 0 | 42 | 21845 | -| 38 | -21846 | 0 | 43 | 21845 | -| 38 | -21846 | 0 | 44 | 21845 | -| 38 | -21846 | 0 | 45 | -21846 | -| 38 | -21846 | 0 | 46 | 21845 | -| 38 | -21846 | 0 | 47 | 21845 | -| 38+ | 21845 | 1 | 45 | -21846 | -| 39 | 21845 | 1 | 45 | 21845 | -| 39+ | -21846 | 1 | 46 | 21845 | -| 40 | -21846 | 1 | 46 | -21846 | -| 40+ | -21846 | 0 | 40 | 21845 | -| 41 | -21846 | 0 | 40 | 21845 | -| 41 | -21846 | 0 | 41 | 21845 | -| 41 | -21846 | 0 | 42 | 21845 | -| 41 | -21846 | 0 | 43 | 21845 | -| 41 | -21846 | 0 | 44 | 21845 | -| 41 | -21846 | 0 | 45 | 21845 | -| 41 | -21846 | 0 | 46 | -21846 | -| 41 | -21846 | 0 | 47 | 21845 | -| 41+ | 21845 | 1 | 46 | -21846 | -| 42 | 21845 | 1 | 46 | 21845 | -| 42+ | -21846 | 1 | 47 | 21845 | -| 43 | -21846 | 1 | 47 | -21846 | -| 43+ | -21846 | 0 | 40 | 21845 | -| 44 | -21846 | 0 | 40 | 21845 | -| 44 | -21846 | 0 | 41 | 21845 | -| 44 | -21846 | 0 | 42 | 21845 | -| 44 | -21846 | 0 | 43 | 21845 | -| 44 | -21846 | 0 | 44 | 21845 | -| 44 | -21846 | 0 | 45 | 21845 | -| 44 | -21846 | 0 | 46 | 21845 | -| 44 | -21846 | 0 | 47 | -21846 | -| 44+ | 21845 | 1 | 47 | -21846 | -| 45 | 21845 | 1 | 47 | 21845 | -| 45+ | 21845 | 0 | 40 | 21845 | -| 46 | 21845 | 0 | 40 | 21845 | -| 46 | 21845 | 0 | 41 | 21845 | -| 46 | 21845 | 0 | 42 | 21845 | -| 46 | 21845 | 0 | 43 | 21845 | -| 46 | 21845 | 0 | 44 | 21845 | -| 46 | 21845 | 0 | 45 | 21845 | -| 46 | 21845 | 0 | 46 | 21845 | -| 46 | 21845 | 0 | 47 | 21845 | -| 46+ | 21845 | 0 | 5 | 0 | -| 47 | 21845 | 0 | 5 | 0 | -| 47 | 21845 | 0 | 13 | 1313 | -| 47 | 21845 | 0 | 21 | 0 | -| 47 | 21845 | 0 | 29 | 0 | -| 47 | 21845 | 0 | 37 | 0 | -| 47 | 21845 | 0 | 45 | 21845 | -| 47 | 21845 | 0 | 53 | 0 | -| 47 | 21845 | 0 | 61 | 0 | -| 47+ | 21845 | 1 | 5 | 0 | -| 48 | 21845 | 1 | 5 | 21845 | -| 48+ | 21845 | 1 | 13 | 1313 | -| 49 | 21845 | 1 | 13 | 21845 | -| 49+ | 21845 | 1 | 21 | 0 | -| 50 | 21845 | 1 | 21 | 21845 | -| 50+ | 21845 | 1 | 29 | 0 | -| 51 | 21845 | 1 | 29 | 21845 | -| 51+ | 21845 | 1 | 37 | 0 | -| 52 | 21845 | 1 | 37 | 21845 | -| 52+ | 21845 | 1 | 45 | 21845 | -| 53 | 21845 | 1 | 45 | 21845 | -| 53+ | 21845 | 1 | 53 | 0 | -| 54 | 21845 | 1 | 53 | 21845 | -| 54+ | 21845 | 1 | 61 | 0 | -| 55 | 21845 | 1 | 61 | 21845 | -| 55+ | 21845 | 0 | 5 | 21845 | -| 56 | 21845 | 0 | 5 | 21845 | -| 56 | 21845 | 0 | 13 | 21845 | -| 56 | 21845 | 0 | 21 | 21845 | -| 56 | 21845 | 0 | 29 | 21845 | -| 56 | 21845 | 0 | 37 | 21845 | -| 56 | 21845 | 0 | 45 | 21845 | -| 56 | 21845 | 0 | 53 | 21845 | -| 56 | 21845 | 0 | 61 | 21845 | -| 56+ | -21846 | 1 | 5 | 21845 | -| 57 | -21846 | 1 | 5 | -21846 | -| 57+ | -21846 | 0 | 5 | -21846 | -| 58 | -21846 | 0 | 5 | -21846 | -| 58 | -21846 | 0 | 13 | 21845 | -| 58 | -21846 | 0 | 21 | 21845 | -| 58 | -21846 | 0 | 29 | 21845 | -| 58 | -21846 | 0 | 37 | 21845 | -| 58 | -21846 | 0 | 45 | 21845 | -| 58 | -21846 | 0 | 53 | 21845 | -| 58 | -21846 | 0 | 61 | 21845 | -| 58+ | 21845 | 1 | 5 | -21846 | -| 59 | 21845 | 1 | 5 | 21845 | -| 59+ | -21846 | 1 | 13 | 21845 | -| 60 | -21846 | 1 | 13 | -21846 | -| 60+ | -21846 | 0 | 5 | 21845 | -| 61 | -21846 | 0 | 5 | 21845 | -| 61 | -21846 | 0 | 13 | -21846 | -| 61 | -21846 | 0 | 21 | 21845 | -| 61 | -21846 | 0 | 29 | 21845 | -| 61 | -21846 | 0 | 37 | 21845 | -| 61 | -21846 | 0 | 45 | 21845 | -| 61 | -21846 | 0 | 53 | 21845 | -| 61 | -21846 | 0 | 61 | 21845 | -| 61+ | 21845 | 1 | 13 | -21846 | -| 62 | 21845 | 1 | 13 | 21845 | -| 62+ | -21846 | 1 | 21 | 21845 | -| 63 | -21846 | 1 | 21 | -21846 | -| 63+ | -21846 | 0 | 5 | 21845 | -| 64 | -21846 | 0 | 5 | 21845 | -| 64 | -21846 | 0 | 13 | 21845 | -| 64 | -21846 | 0 | 21 | -21846 | -| 64 | -21846 | 0 | 29 | 21845 | -| 64 | -21846 | 0 | 37 | 21845 | -| 64 | -21846 | 0 | 45 | 21845 | -| 64 | -21846 | 0 | 53 | 21845 | -| 64 | -21846 | 0 | 61 | 21845 | -| 64+ | 21845 | 1 | 21 | -21846 | -| 65 | 21845 | 1 | 21 | 21845 | -| 65+ | -21846 | 1 | 29 | 21845 | -| 66 | -21846 | 1 | 29 | -21846 | -| 66+ | -21846 | 0 | 5 | 21845 | -| 67 | -21846 | 0 | 5 | 21845 | -| 67 | -21846 | 0 | 13 | 21845 | -| 67 | -21846 | 0 | 21 | 21845 | -| 67 | -21846 | 0 | 29 | -21846 | -| 67 | -21846 | 0 | 37 | 21845 | -| 67 | -21846 | 0 | 45 | 21845 | -| 67 | -21846 | 0 | 53 | 21845 | -| 67 | -21846 | 0 | 61 | 21845 | -| 67+ | 21845 | 1 | 29 | -21846 | -| 68 | 21845 | 1 | 29 | 21845 | -| 68+ | -21846 | 1 | 37 | 21845 | -| 69 | -21846 | 1 | 37 | -21846 | -| 69+ | -21846 | 0 | 5 | 21845 | -| 70 | -21846 | 0 | 5 | 21845 | -| 70 | -21846 | 0 | 13 | 21845 | -| 70 | -21846 | 0 | 21 | 21845 | -| 70 | -21846 | 0 | 29 | 21845 | -| 70 | -21846 | 0 | 37 | -21846 | -| 70 | -21846 | 0 | 45 | 21845 | -| 70 | -21846 | 0 | 53 | 21845 | -| 70 | -21846 | 0 | 61 | 21845 | -| 70+ | 21845 | 1 | 37 | -21846 | -| 71 | 21845 | 1 | 37 | 21845 | -| 71+ | -21846 | 1 | 45 | 21845 | -| 72 | -21846 | 1 | 45 | -21846 | -| 72+ | -21846 | 0 | 5 | 21845 | -| 73 | -21846 | 0 | 5 | 21845 | -| 73 | -21846 | 0 | 13 | 21845 | -| 73 | -21846 | 0 | 21 | 21845 | -| 73 | -21846 | 0 | 29 | 21845 | -| 73 | -21846 | 0 | 37 | 21845 | -| 73 | -21846 | 0 | 45 | -21846 | -| 73 | -21846 | 0 | 53 | 21845 | -| 73 | -21846 | 0 | 61 | 21845 | -| 73+ | 21845 | 1 | 45 | -21846 | -| 74 | 21845 | 1 | 45 | 21845 | -| 74+ | -21846 | 1 | 53 | 21845 | -| 75 | -21846 | 1 | 53 | -21846 | -| 75+ | -21846 | 0 | 5 | 21845 | -| 76 | -21846 | 0 | 5 | 21845 | -| 76 | -21846 | 0 | 13 | 21845 | -| 76 | -21846 | 0 | 21 | 21845 | -| 76 | -21846 | 0 | 29 | 21845 | -| 76 | -21846 | 0 | 37 | 21845 | -| 76 | -21846 | 0 | 45 | 21845 | -| 76 | -21846 | 0 | 53 | -21846 | -| 76 | -21846 | 0 | 61 | 21845 | -| 76+ | 21845 | 1 | 53 | -21846 | -| 77 | 21845 | 1 | 53 | 21845 | -| 77+ | -21846 | 1 | 61 | 21845 | -| 78 | -21846 | 1 | 61 | -21846 | -| 78+ | -21846 | 0 | 5 | 21845 | -| 79 | -21846 | 0 | 5 | 21845 | -| 79 | -21846 | 0 | 13 | 21845 | -| 79 | -21846 | 0 | 21 | 21845 | -| 79 | -21846 | 0 | 29 | 21845 | -| 79 | -21846 | 0 | 37 | 21845 | -| 79 | -21846 | 0 | 45 | 21845 | -| 79 | -21846 | 0 | 53 | 21845 | -| 79 | -21846 | 0 | 61 | -21846 | -| 79+ | 21845 | 1 | 61 | -21846 | -| 80 | 21845 | 1 | 61 | 21845 | -| 80+ | 21845 | 0 | 5 | 21845 | -| 81 | 21845 | 0 | 5 | 21845 | -| 81 | 21845 | 0 | 13 | 21845 | -| 81 | 21845 | 0 | 21 | 21845 | -| 81 | 21845 | 0 | 29 | 21845 | -| 81 | 21845 | 0 | 37 | 21845 | -| 81 | 21845 | 0 | 45 | 21845 | -| 81 | 21845 | 0 | 53 | 21845 | -| 81 | 21845 | 0 | 61 | 21845 |`; +set address %B000101, +tick, +output; +tock, +output; +set address %B001101, +eval, +output; +set address %B010101, +eval, +output; +set address %B011101, +eval, +output; +set address %B100101, +eval, +output; +set address %B101101, +eval, +output; +set address %B110101, +eval, +output; +set address %B111101, +eval, +output;`; + +export const cmp = `|time | in |load|address| out | +| 0+ | 0 | 0 | 0 | 0 | +| 1 | 0 | 0 | 0 | 0 | +| 1+ | 0 | 1 | 0 | 0 | +| 2 | 0 | 1 | 0 | 0 | +| 2+ | 1313 | 0 | 0 | 0 | +| 3 | 1313 | 0 | 0 | 0 | +| 3+ | 1313 | 1 | 13 | 0 | +| 4 | 1313 | 1 | 13 | 1313 | +| 4+ | 1313 | 0 | 0 | 0 | +| 5 | 1313 | 0 | 0 | 0 | +| 5+ | 4747 | 0 | 47 | 0 | +| 6 | 4747 | 0 | 47 | 0 | +| 6+ | 4747 | 1 | 47 | 0 | +| 7 | 4747 | 1 | 47 | 4747 | +| 7+ | 4747 | 0 | 47 | 4747 | +| 8 | 4747 | 0 | 47 | 4747 | +| 8 | 4747 | 0 | 13 | 1313 | +| 8+ | 6363 | 0 | 13 | 1313 | +| 9 | 6363 | 0 | 13 | 1313 | +| 9+ | 6363 | 1 | 63 | 0 | +| 10 | 6363 | 1 | 63 | 6363 | +| 10+ | 6363 | 0 | 63 | 6363 | +| 11 | 6363 | 0 | 63 | 6363 | +| 11 | 6363 | 0 | 47 | 4747 | +| 11 | 6363 | 0 | 63 | 6363 | +| 11+ | 6363 | 0 | 40 | 0 | +| 12 | 6363 | 0 | 40 | 0 | +| 12 | 6363 | 0 | 41 | 0 | +| 12 | 6363 | 0 | 42 | 0 | +| 12 | 6363 | 0 | 43 | 0 | +| 12 | 6363 | 0 | 44 | 0 | +| 12 | 6363 | 0 | 45 | 0 | +| 12 | 6363 | 0 | 46 | 0 | +| 12 | 6363 | 0 | 47 | 4747 | +| 12+ | 21845 | 1 | 40 | 0 | +| 13 | 21845 | 1 | 40 | 21845 | +| 13+ | 21845 | 1 | 41 | 0 | +| 14 | 21845 | 1 | 41 | 21845 | +| 14+ | 21845 | 1 | 42 | 0 | +| 15 | 21845 | 1 | 42 | 21845 | +| 15+ | 21845 | 1 | 43 | 0 | +| 16 | 21845 | 1 | 43 | 21845 | +| 16+ | 21845 | 1 | 44 | 0 | +| 17 | 21845 | 1 | 44 | 21845 | +| 17+ | 21845 | 1 | 45 | 0 | +| 18 | 21845 | 1 | 45 | 21845 | +| 18+ | 21845 | 1 | 46 | 0 | +| 19 | 21845 | 1 | 46 | 21845 | +| 19+ | 21845 | 1 | 47 | 4747 | +| 20 | 21845 | 1 | 47 | 21845 | +| 20+ | 21845 | 0 | 40 | 21845 | +| 21 | 21845 | 0 | 40 | 21845 | +| 21 | 21845 | 0 | 41 | 21845 | +| 21 | 21845 | 0 | 42 | 21845 | +| 21 | 21845 | 0 | 43 | 21845 | +| 21 | 21845 | 0 | 44 | 21845 | +| 21 | 21845 | 0 | 45 | 21845 | +| 21 | 21845 | 0 | 46 | 21845 | +| 21 | 21845 | 0 | 47 | 21845 | +| 21+ | -21846 | 1 | 40 | 21845 | +| 22 | -21846 | 1 | 40 | -21846 | +| 22+ | -21846 | 0 | 40 | -21846 | +| 23 | -21846 | 0 | 40 | -21846 | +| 23 | -21846 | 0 | 41 | 21845 | +| 23 | -21846 | 0 | 42 | 21845 | +| 23 | -21846 | 0 | 43 | 21845 | +| 23 | -21846 | 0 | 44 | 21845 | +| 23 | -21846 | 0 | 45 | 21845 | +| 23 | -21846 | 0 | 46 | 21845 | +| 23 | -21846 | 0 | 47 | 21845 | +| 23+ | 21845 | 1 | 40 | -21846 | +| 24 | 21845 | 1 | 40 | 21845 | +| 24+ | -21846 | 1 | 41 | 21845 | +| 25 | -21846 | 1 | 41 | -21846 | +| 25+ | -21846 | 0 | 40 | 21845 | +| 26 | -21846 | 0 | 40 | 21845 | +| 26 | -21846 | 0 | 41 | -21846 | +| 26 | -21846 | 0 | 42 | 21845 | +| 26 | -21846 | 0 | 43 | 21845 | +| 26 | -21846 | 0 | 44 | 21845 | +| 26 | -21846 | 0 | 45 | 21845 | +| 26 | -21846 | 0 | 46 | 21845 | +| 26 | -21846 | 0 | 47 | 21845 | +| 26+ | 21845 | 1 | 41 | -21846 | +| 27 | 21845 | 1 | 41 | 21845 | +| 27+ | -21846 | 1 | 42 | 21845 | +| 28 | -21846 | 1 | 42 | -21846 | +| 28+ | -21846 | 0 | 40 | 21845 | +| 29 | -21846 | 0 | 40 | 21845 | +| 29 | -21846 | 0 | 41 | 21845 | +| 29 | -21846 | 0 | 42 | -21846 | +| 29 | -21846 | 0 | 43 | 21845 | +| 29 | -21846 | 0 | 44 | 21845 | +| 29 | -21846 | 0 | 45 | 21845 | +| 29 | -21846 | 0 | 46 | 21845 | +| 29 | -21846 | 0 | 47 | 21845 | +| 29+ | 21845 | 1 | 42 | -21846 | +| 30 | 21845 | 1 | 42 | 21845 | +| 30+ | -21846 | 1 | 43 | 21845 | +| 31 | -21846 | 1 | 43 | -21846 | +| 31+ | -21846 | 0 | 40 | 21845 | +| 32 | -21846 | 0 | 40 | 21845 | +| 32 | -21846 | 0 | 41 | 21845 | +| 32 | -21846 | 0 | 42 | 21845 | +| 32 | -21846 | 0 | 43 | -21846 | +| 32 | -21846 | 0 | 44 | 21845 | +| 32 | -21846 | 0 | 45 | 21845 | +| 32 | -21846 | 0 | 46 | 21845 | +| 32 | -21846 | 0 | 47 | 21845 | +| 32+ | 21845 | 1 | 43 | -21846 | +| 33 | 21845 | 1 | 43 | 21845 | +| 33+ | -21846 | 1 | 44 | 21845 | +| 34 | -21846 | 1 | 44 | -21846 | +| 34+ | -21846 | 0 | 40 | 21845 | +| 35 | -21846 | 0 | 40 | 21845 | +| 35 | -21846 | 0 | 41 | 21845 | +| 35 | -21846 | 0 | 42 | 21845 | +| 35 | -21846 | 0 | 43 | 21845 | +| 35 | -21846 | 0 | 44 | -21846 | +| 35 | -21846 | 0 | 45 | 21845 | +| 35 | -21846 | 0 | 46 | 21845 | +| 35 | -21846 | 0 | 47 | 21845 | +| 35+ | 21845 | 1 | 44 | -21846 | +| 36 | 21845 | 1 | 44 | 21845 | +| 36+ | -21846 | 1 | 45 | 21845 | +| 37 | -21846 | 1 | 45 | -21846 | +| 37+ | -21846 | 0 | 40 | 21845 | +| 38 | -21846 | 0 | 40 | 21845 | +| 38 | -21846 | 0 | 41 | 21845 | +| 38 | -21846 | 0 | 42 | 21845 | +| 38 | -21846 | 0 | 43 | 21845 | +| 38 | -21846 | 0 | 44 | 21845 | +| 38 | -21846 | 0 | 45 | -21846 | +| 38 | -21846 | 0 | 46 | 21845 | +| 38 | -21846 | 0 | 47 | 21845 | +| 38+ | 21845 | 1 | 45 | -21846 | +| 39 | 21845 | 1 | 45 | 21845 | +| 39+ | -21846 | 1 | 46 | 21845 | +| 40 | -21846 | 1 | 46 | -21846 | +| 40+ | -21846 | 0 | 40 | 21845 | +| 41 | -21846 | 0 | 40 | 21845 | +| 41 | -21846 | 0 | 41 | 21845 | +| 41 | -21846 | 0 | 42 | 21845 | +| 41 | -21846 | 0 | 43 | 21845 | +| 41 | -21846 | 0 | 44 | 21845 | +| 41 | -21846 | 0 | 45 | 21845 | +| 41 | -21846 | 0 | 46 | -21846 | +| 41 | -21846 | 0 | 47 | 21845 | +| 41+ | 21845 | 1 | 46 | -21846 | +| 42 | 21845 | 1 | 46 | 21845 | +| 42+ | -21846 | 1 | 47 | 21845 | +| 43 | -21846 | 1 | 47 | -21846 | +| 43+ | -21846 | 0 | 40 | 21845 | +| 44 | -21846 | 0 | 40 | 21845 | +| 44 | -21846 | 0 | 41 | 21845 | +| 44 | -21846 | 0 | 42 | 21845 | +| 44 | -21846 | 0 | 43 | 21845 | +| 44 | -21846 | 0 | 44 | 21845 | +| 44 | -21846 | 0 | 45 | 21845 | +| 44 | -21846 | 0 | 46 | 21845 | +| 44 | -21846 | 0 | 47 | -21846 | +| 44+ | 21845 | 1 | 47 | -21846 | +| 45 | 21845 | 1 | 47 | 21845 | +| 45+ | 21845 | 0 | 40 | 21845 | +| 46 | 21845 | 0 | 40 | 21845 | +| 46 | 21845 | 0 | 41 | 21845 | +| 46 | 21845 | 0 | 42 | 21845 | +| 46 | 21845 | 0 | 43 | 21845 | +| 46 | 21845 | 0 | 44 | 21845 | +| 46 | 21845 | 0 | 45 | 21845 | +| 46 | 21845 | 0 | 46 | 21845 | +| 46 | 21845 | 0 | 47 | 21845 | +| 46+ | 21845 | 0 | 5 | 0 | +| 47 | 21845 | 0 | 5 | 0 | +| 47 | 21845 | 0 | 13 | 1313 | +| 47 | 21845 | 0 | 21 | 0 | +| 47 | 21845 | 0 | 29 | 0 | +| 47 | 21845 | 0 | 37 | 0 | +| 47 | 21845 | 0 | 45 | 21845 | +| 47 | 21845 | 0 | 53 | 0 | +| 47 | 21845 | 0 | 61 | 0 | +| 47+ | 21845 | 1 | 5 | 0 | +| 48 | 21845 | 1 | 5 | 21845 | +| 48+ | 21845 | 1 | 13 | 1313 | +| 49 | 21845 | 1 | 13 | 21845 | +| 49+ | 21845 | 1 | 21 | 0 | +| 50 | 21845 | 1 | 21 | 21845 | +| 50+ | 21845 | 1 | 29 | 0 | +| 51 | 21845 | 1 | 29 | 21845 | +| 51+ | 21845 | 1 | 37 | 0 | +| 52 | 21845 | 1 | 37 | 21845 | +| 52+ | 21845 | 1 | 45 | 21845 | +| 53 | 21845 | 1 | 45 | 21845 | +| 53+ | 21845 | 1 | 53 | 0 | +| 54 | 21845 | 1 | 53 | 21845 | +| 54+ | 21845 | 1 | 61 | 0 | +| 55 | 21845 | 1 | 61 | 21845 | +| 55+ | 21845 | 0 | 5 | 21845 | +| 56 | 21845 | 0 | 5 | 21845 | +| 56 | 21845 | 0 | 13 | 21845 | +| 56 | 21845 | 0 | 21 | 21845 | +| 56 | 21845 | 0 | 29 | 21845 | +| 56 | 21845 | 0 | 37 | 21845 | +| 56 | 21845 | 0 | 45 | 21845 | +| 56 | 21845 | 0 | 53 | 21845 | +| 56 | 21845 | 0 | 61 | 21845 | +| 56+ | -21846 | 1 | 5 | 21845 | +| 57 | -21846 | 1 | 5 | -21846 | +| 57+ | -21846 | 0 | 5 | -21846 | +| 58 | -21846 | 0 | 5 | -21846 | +| 58 | -21846 | 0 | 13 | 21845 | +| 58 | -21846 | 0 | 21 | 21845 | +| 58 | -21846 | 0 | 29 | 21845 | +| 58 | -21846 | 0 | 37 | 21845 | +| 58 | -21846 | 0 | 45 | 21845 | +| 58 | -21846 | 0 | 53 | 21845 | +| 58 | -21846 | 0 | 61 | 21845 | +| 58+ | 21845 | 1 | 5 | -21846 | +| 59 | 21845 | 1 | 5 | 21845 | +| 59+ | -21846 | 1 | 13 | 21845 | +| 60 | -21846 | 1 | 13 | -21846 | +| 60+ | -21846 | 0 | 5 | 21845 | +| 61 | -21846 | 0 | 5 | 21845 | +| 61 | -21846 | 0 | 13 | -21846 | +| 61 | -21846 | 0 | 21 | 21845 | +| 61 | -21846 | 0 | 29 | 21845 | +| 61 | -21846 | 0 | 37 | 21845 | +| 61 | -21846 | 0 | 45 | 21845 | +| 61 | -21846 | 0 | 53 | 21845 | +| 61 | -21846 | 0 | 61 | 21845 | +| 61+ | 21845 | 1 | 13 | -21846 | +| 62 | 21845 | 1 | 13 | 21845 | +| 62+ | -21846 | 1 | 21 | 21845 | +| 63 | -21846 | 1 | 21 | -21846 | +| 63+ | -21846 | 0 | 5 | 21845 | +| 64 | -21846 | 0 | 5 | 21845 | +| 64 | -21846 | 0 | 13 | 21845 | +| 64 | -21846 | 0 | 21 | -21846 | +| 64 | -21846 | 0 | 29 | 21845 | +| 64 | -21846 | 0 | 37 | 21845 | +| 64 | -21846 | 0 | 45 | 21845 | +| 64 | -21846 | 0 | 53 | 21845 | +| 64 | -21846 | 0 | 61 | 21845 | +| 64+ | 21845 | 1 | 21 | -21846 | +| 65 | 21845 | 1 | 21 | 21845 | +| 65+ | -21846 | 1 | 29 | 21845 | +| 66 | -21846 | 1 | 29 | -21846 | +| 66+ | -21846 | 0 | 5 | 21845 | +| 67 | -21846 | 0 | 5 | 21845 | +| 67 | -21846 | 0 | 13 | 21845 | +| 67 | -21846 | 0 | 21 | 21845 | +| 67 | -21846 | 0 | 29 | -21846 | +| 67 | -21846 | 0 | 37 | 21845 | +| 67 | -21846 | 0 | 45 | 21845 | +| 67 | -21846 | 0 | 53 | 21845 | +| 67 | -21846 | 0 | 61 | 21845 | +| 67+ | 21845 | 1 | 29 | -21846 | +| 68 | 21845 | 1 | 29 | 21845 | +| 68+ | -21846 | 1 | 37 | 21845 | +| 69 | -21846 | 1 | 37 | -21846 | +| 69+ | -21846 | 0 | 5 | 21845 | +| 70 | -21846 | 0 | 5 | 21845 | +| 70 | -21846 | 0 | 13 | 21845 | +| 70 | -21846 | 0 | 21 | 21845 | +| 70 | -21846 | 0 | 29 | 21845 | +| 70 | -21846 | 0 | 37 | -21846 | +| 70 | -21846 | 0 | 45 | 21845 | +| 70 | -21846 | 0 | 53 | 21845 | +| 70 | -21846 | 0 | 61 | 21845 | +| 70+ | 21845 | 1 | 37 | -21846 | +| 71 | 21845 | 1 | 37 | 21845 | +| 71+ | -21846 | 1 | 45 | 21845 | +| 72 | -21846 | 1 | 45 | -21846 | +| 72+ | -21846 | 0 | 5 | 21845 | +| 73 | -21846 | 0 | 5 | 21845 | +| 73 | -21846 | 0 | 13 | 21845 | +| 73 | -21846 | 0 | 21 | 21845 | +| 73 | -21846 | 0 | 29 | 21845 | +| 73 | -21846 | 0 | 37 | 21845 | +| 73 | -21846 | 0 | 45 | -21846 | +| 73 | -21846 | 0 | 53 | 21845 | +| 73 | -21846 | 0 | 61 | 21845 | +| 73+ | 21845 | 1 | 45 | -21846 | +| 74 | 21845 | 1 | 45 | 21845 | +| 74+ | -21846 | 1 | 53 | 21845 | +| 75 | -21846 | 1 | 53 | -21846 | +| 75+ | -21846 | 0 | 5 | 21845 | +| 76 | -21846 | 0 | 5 | 21845 | +| 76 | -21846 | 0 | 13 | 21845 | +| 76 | -21846 | 0 | 21 | 21845 | +| 76 | -21846 | 0 | 29 | 21845 | +| 76 | -21846 | 0 | 37 | 21845 | +| 76 | -21846 | 0 | 45 | 21845 | +| 76 | -21846 | 0 | 53 | -21846 | +| 76 | -21846 | 0 | 61 | 21845 | +| 76+ | 21845 | 1 | 53 | -21846 | +| 77 | 21845 | 1 | 53 | 21845 | +| 77+ | -21846 | 1 | 61 | 21845 | +| 78 | -21846 | 1 | 61 | -21846 | +| 78+ | -21846 | 0 | 5 | 21845 | +| 79 | -21846 | 0 | 5 | 21845 | +| 79 | -21846 | 0 | 13 | 21845 | +| 79 | -21846 | 0 | 21 | 21845 | +| 79 | -21846 | 0 | 29 | 21845 | +| 79 | -21846 | 0 | 37 | 21845 | +| 79 | -21846 | 0 | 45 | 21845 | +| 79 | -21846 | 0 | 53 | 21845 | +| 79 | -21846 | 0 | 61 | -21846 | +| 79+ | 21845 | 1 | 61 | -21846 | +| 80 | 21845 | 1 | 61 | 21845 | +| 80+ | 21845 | 0 | 5 | 21845 | +| 81 | 21845 | 0 | 5 | 21845 | +| 81 | 21845 | 0 | 13 | 21845 | +| 81 | 21845 | 0 | 21 | 21845 | +| 81 | 21845 | 0 | 29 | 21845 | +| 81 | 21845 | 0 | 37 | 21845 | +| 81 | 21845 | 0 | 45 | 21845 | +| 81 | 21845 | 0 | 53 | 21845 | +| 81 | 21845 | 0 | 61 | 21845 |`; diff --git a/projects/src/project_03/06_ram512.ts b/projects/src/project_03/06_ram512.ts index e57216729..06e092f16 100644 --- a/projects/src/project_03/06_ram512.ts +++ b/projects/src/project_03/06_ram512.ts @@ -1,7 +1,7 @@ export const hdl = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/03/b/RAM512.hdl +// File name: projects/3/b/RAM512.hdl /** * Memory of 512 16-bit registers. * If load is asserted, the value of the register selected by @@ -15,651 +15,1347 @@ CHIP RAM512 { PARTS: //// Replace this comment with your code. }`; -export const tst = `output-list time%S1.4.1 in%D1.6.1 load%B2.1.2 address%D2.3.2 out%D1.6.1; +export const tst = `// This file is part of www.nand2tetris.org +// and the book "The Elements of Computing Systems" +// by Nisan and Schocken, MIT Press. +// File name: projects/3/b/RAM512.tst + +output-list time%S1.3.1 in%D1.6.1 load%B2.1.1 address%D2.3.2 out%D1.6.1; + +set in 0, +set load 0, +set address 0, +tick, +output; +tock, +output; + +set load 1, +tick, +output; +tock, +output; + +set in 13099, +set load 0, +tick, +output; +tock, +output; -set in 0, set load 0, set address 0, tick, output; tock, output; -set load 1, tick, output; tock, output; +set load 1, +set address 130, +tick, +output; +tock, +output; + +set load 0, +set address 0, +tick, +output; +tock, +output; + +set in 4729, +set address 472, +tick, +output; +tock, +output; + +set load 1, +tick, +output; +tock, +output; + +set load 0, +tick, +output; +tock, +output; + +set address 130, +eval, +output; + +set in 5119, +tick, +output; +tock, +output; + +set load 1, +set address 511, +tick, +output; +tock, +output; + +set load 0, +tick, +output; +tock, +output; -set in 13099, set load 0, tick, output; tock, output; -set load 1, set address 130, tick, output; tock, output; -set load 0, set address 0, tick, output; tock, output; +set address 472, +eval, +output; -set in 4729, set address 472, tick, output; tock, output; -set load 1, tick, output; tock, output; -set load 0, tick, output; tock, output; -set address 130, eval, output; +set address 511, +eval, +output; -set in 5119, tick, output; tock, output; -set load 1, set address 511, tick, output; tock, output; -set load 0, tick, output; tock, output; -set address 472, eval, output; -set address 511, eval, output; set load 0, -set address %B010101000, tick, output; tock, output; -set address %B010101001, eval, output; -set address %B010101010, eval, output; -set address %B010101011, eval, output; -set address %B010101100, eval, output; -set address %B010101101, eval, output; -set address %B010101110, eval, output; -set address %B010101111, eval, output; +set address %B010101000, +tick, +output; +tock, +output; +set address %B010101001, +eval, +output; +set address %B010101010, +eval, +output; +set address %B010101011, +eval, +output; +set address %B010101100, +eval, +output; +set address %B010101101, +eval, +output; +set address %B010101110, +eval, +output; +set address %B010101111, +eval, +output; set load 1, -set in %B0101010101010101, set address %B010101000, tick, output; tock, output; -set address %B010101001, tick, output, tock, output; -set address %B010101010, tick, output, tock, output; -set address %B010101011, tick, output, tock, output; -set address %B010101100, tick, output, tock, output; -set address %B010101101, tick, output, tock, output; -set address %B010101110, tick, output, tock, output; -set address %B010101111, tick, output, tock, output; +set in %B0101010101010101, +set address %B010101000, +tick, +output; +tock, +output; +set address %B010101001, +tick, +output, +tock, +output; +set address %B010101010, +tick, +output, +tock, +output; +set address %B010101011, +tick, +output, +tock, +output; +set address %B010101100, +tick, +output, +tock, +output; +set address %B010101101, +tick, +output, +tock, +output; +set address %B010101110, +tick, +output, +tock, +output; +set address %B010101111, +tick, +output, +tock, +output; set load 0, -set address %B010101000, tick, output; tock, output; -set address %B010101001, eval, output; -set address %B010101010, eval, output; -set address %B010101011, eval, output; -set address %B010101100, eval, output; -set address %B010101101, eval, output; -set address %B010101110, eval, output; -set address %B010101111, eval, output; +set address %B010101000, +tick, +output; +tock, +output; +set address %B010101001, +eval, +output; +set address %B010101010, +eval, +output; +set address %B010101011, +eval, +output; +set address %B010101100, +eval, +output; +set address %B010101101, +eval, +output; +set address %B010101110, +eval, +output; +set address %B010101111, +eval, +output; set load 1, -set address %B010101000, set in %B1010101010101010, tick, output; tock, output; +set address %B010101000, +set in %B1010101010101010, +tick, +output; +tock, +output; set load 0, -set address %B010101000, tick, output; tock, output; -set address %B010101001, eval, output; -set address %B010101010, eval, output; -set address %B010101011, eval, output; -set address %B010101100, eval, output; -set address %B010101101, eval, output; -set address %B010101110, eval, output; -set address %B010101111, eval, output; +set address %B010101000, +tick, +output; +tock, +output; +set address %B010101001, +eval, +output; +set address %B010101010, +eval, +output; +set address %B010101011, +eval, +output; +set address %B010101100, +eval, +output; +set address %B010101101, +eval, +output; +set address %B010101110, +eval, +output; +set address %B010101111, +eval, +output; set load 1, -set address %B010101000, set in %B0101010101010101, tick, output, tock, output; -set address %B010101001, set in %B1010101010101010, tick, output; tock, output; +set address %B010101000, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address %B010101001, +set in %B1010101010101010, +tick, +output; +tock, +output; set load 0, -set address %B010101000, tick, output; tock, output; -set address %B010101001, eval, output; -set address %B010101010, eval, output; -set address %B010101011, eval, output; -set address %B010101100, eval, output; -set address %B010101101, eval, output; -set address %B010101110, eval, output; -set address %B010101111, eval, output; +set address %B010101000, +tick, +output; +tock, +output; +set address %B010101001, +eval, +output; +set address %B010101010, +eval, +output; +set address %B010101011, +eval, +output; +set address %B010101100, +eval, +output; +set address %B010101101, +eval, +output; +set address %B010101110, +eval, +output; +set address %B010101111, +eval, +output; set load 1, -set address %B010101001, set in %B0101010101010101, tick, output, tock, output; -set address %B010101010, set in %B1010101010101010, tick, output; tock, output; +set address %B010101001, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address %B010101010, +set in %B1010101010101010, +tick, +output; +tock, +output; set load 0, -set address %B010101000, tick, output; tock, output; -set address %B010101001, eval, output; -set address %B010101010, eval, output; -set address %B010101011, eval, output; -set address %B010101100, eval, output; -set address %B010101101, eval, output; -set address %B010101110, eval, output; -set address %B010101111, eval, output; +set address %B010101000, +tick, +output; +tock, +output; +set address %B010101001, +eval, +output; +set address %B010101010, +eval, +output; +set address %B010101011, +eval, +output; +set address %B010101100, +eval, +output; +set address %B010101101, +eval, +output; +set address %B010101110, +eval, +output; +set address %B010101111, +eval, +output; set load 1, -set address %B010101010, set in %B0101010101010101, tick, output, tock, output; -set address %B010101011, set in %B1010101010101010, tick, output; tock, output; +set address %B010101010, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address %B010101011, +set in %B1010101010101010, +tick, +output; +tock, +output; set load 0, -set address %B010101000, tick, output; tock, output; -set address %B010101001, eval, output; -set address %B010101010, eval, output; -set address %B010101011, eval, output; -set address %B010101100, eval, output; -set address %B010101101, eval, output; -set address %B010101110, eval, output; -set address %B010101111, eval, output; +set address %B010101000, +tick, +output; +tock, +output; +set address %B010101001, +eval, +output; +set address %B010101010, +eval, +output; +set address %B010101011, +eval, +output; +set address %B010101100, +eval, +output; +set address %B010101101, +eval, +output; +set address %B010101110, +eval, +output; +set address %B010101111, +eval, +output; set load 1, -set address %B010101011, set in %B0101010101010101, tick, output, tock, output; -set address %B010101100, set in %B1010101010101010, tick, output; tock, output; +set address %B010101011, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address %B010101100, +set in %B1010101010101010, +tick, +output; +tock, +output; set load 0, -set address %B010101000, tick, output; tock, output; -set address %B010101001, eval, output; -set address %B010101010, eval, output; -set address %B010101011, eval, output; -set address %B010101100, eval, output; -set address %B010101101, eval, output; -set address %B010101110, eval, output; -set address %B010101111, eval, output; +set address %B010101000, +tick, +output; +tock, +output; +set address %B010101001, +eval, +output; +set address %B010101010, +eval, +output; +set address %B010101011, +eval, +output; +set address %B010101100, +eval, +output; +set address %B010101101, +eval, +output; +set address %B010101110, +eval, +output; +set address %B010101111, +eval, +output; set load 1, -set address %B010101100, set in %B0101010101010101, tick, output, tock, output; -set address %B010101101, set in %B1010101010101010, tick, output; tock, output; +set address %B010101100, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address %B010101101, +set in %B1010101010101010, +tick, +output; +tock, +output; set load 0, -set address %B010101000, tick, output; tock, output; -set address %B010101001, eval, output; -set address %B010101010, eval, output; -set address %B010101011, eval, output; -set address %B010101100, eval, output; -set address %B010101101, eval, output; -set address %B010101110, eval, output; -set address %B010101111, eval, output; +set address %B010101000, +tick, +output; +tock, +output; +set address %B010101001, +eval, +output; +set address %B010101010, +eval, +output; +set address %B010101011, +eval, +output; +set address %B010101100, +eval, +output; +set address %B010101101, +eval, +output; +set address %B010101110, +eval, +output; +set address %B010101111, +eval, +output; set load 1, -set address %B010101101, set in %B0101010101010101, tick, output, tock, output; -set address %B010101110, set in %B1010101010101010, tick, output; tock, output; +set address %B010101101, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address %B010101110, +set in %B1010101010101010, +tick, +output; +tock, +output; set load 0, -set address %B010101000, tick, output; tock, output; -set address %B010101001, eval, output; -set address %B010101010, eval, output; -set address %B010101011, eval, output; -set address %B010101100, eval, output; -set address %B010101101, eval, output; -set address %B010101110, eval, output; -set address %B010101111, eval, output; +set address %B010101000, +tick, +output; +tock, +output; +set address %B010101001, +eval, +output; +set address %B010101010, +eval, +output; +set address %B010101011, +eval, +output; +set address %B010101100, +eval, +output; +set address %B010101101, +eval, +output; +set address %B010101110, +eval, +output; +set address %B010101111, +eval, +output; set load 1, -set address %B010101110, set in %B0101010101010101, tick, output, tock, output; -set address %B010101111, set in %B1010101010101010, tick, output; tock, output; +set address %B010101110, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address %B010101111, +set in %B1010101010101010, +tick, +output; +tock, +output; set load 0, -set address %B010101000, tick, output; tock, output; -set address %B010101001, eval, output; -set address %B010101010, eval, output; -set address %B010101011, eval, output; -set address %B010101100, eval, output; -set address %B010101101, eval, output; -set address %B010101110, eval, output; -set address %B010101111, eval, output; +set address %B010101000, +tick, +output; +tock, +output; +set address %B010101001, +eval, +output; +set address %B010101010, +eval, +output; +set address %B010101011, +eval, +output; +set address %B010101100, +eval, +output; +set address %B010101101, +eval, +output; +set address %B010101110, +eval, +output; +set address %B010101111, +eval, +output; set load 1, -set address %B010101111, set in %B0101010101010101, tick, output, tock, output; +set address %B010101111, +set in %B0101010101010101, +tick, +output, +tock, +output; set load 0, -set address %B010101000, tick, output; tock, output; -set address %B010101001, eval, output; -set address %B010101010, eval, output; -set address %B010101011, eval, output; -set address %B010101100, eval, output; -set address %B010101101, eval, output; -set address %B010101110, eval, output; -set address %B010101111, eval, output; +set address %B010101000, +tick, +output; +tock, +output; +set address %B010101001, +eval, +output; +set address %B010101010, +eval, +output; +set address %B010101011, +eval, +output; +set address %B010101100, +eval, +output; +set address %B010101101, +eval, +output; +set address %B010101110, +eval, +output; +set address %B010101111, +eval, +output; set load 0, -set address %B000101010, tick, output; tock, output; -set address %B001101010, eval, output; -set address %B010101010, eval, output; -set address %B011101010, eval, output; -set address %B100101010, eval, output; -set address %B101101010, eval, output; -set address %B110101010, eval, output; -set address %B111101010, eval, output; +set address %B000101010, +tick, +output; +tock, +output; +set address %B001101010, +eval, +output; +set address %B010101010, +eval, +output; +set address %B011101010, +eval, +output; +set address %B100101010, +eval, +output; +set address %B101101010, +eval, +output; +set address %B110101010, +eval, +output; +set address %B111101010, +eval, +output; set load 1, -set in %B0101010101010101, set address %B000101010, tick, output; tock, output; -set address %B001101010, tick, output, tock, output; -set address %B010101010, tick, output, tock, output; -set address %B011101010, tick, output, tock, output; -set address %B100101010, tick, output, tock, output; -set address %B101101010, tick, output, tock, output; -set address %B110101010, tick, output, tock, output; -set address %B111101010, tick, output, tock, output; +set in %B0101010101010101, +set address %B000101010, +tick, +output; +tock, +output; +set address %B001101010, +tick, +output, +tock, +output; +set address %B010101010, +tick, +output, +tock, +output; +set address %B011101010, +tick, +output, +tock, +output; +set address %B100101010, +tick, +output, +tock, +output; +set address %B101101010, +tick, +output, +tock, +output; +set address %B110101010, +tick, +output, +tock, +output; +set address %B111101010, +tick, +output, +tock, +output; set load 0, -set address %B000101010, tick, output; tock, output; -set address %B001101010, eval, output; -set address %B010101010, eval, output; -set address %B011101010, eval, output; -set address %B100101010, eval, output; -set address %B101101010, eval, output; -set address %B110101010, eval, output; -set address %B111101010, eval, output; +set address %B000101010, +tick, +output; +tock, +output; +set address %B001101010, +eval, +output; +set address %B010101010, +eval, +output; +set address %B011101010, +eval, +output; +set address %B100101010, +eval, +output; +set address %B101101010, +eval, +output; +set address %B110101010, +eval, +output; +set address %B111101010, +eval, +output; set load 1, -set address %B000101010, set in %B1010101010101010, tick, output; tock, output; +set address %B000101010, +set in %B1010101010101010, +tick, +output; +tock, +output; set load 0, -set address %B000101010, tick, output; tock, output; -set address %B001101010, eval, output; -set address %B010101010, eval, output; -set address %B011101010, eval, output; -set address %B100101010, eval, output; -set address %B101101010, eval, output; -set address %B110101010, eval, output; -set address %B111101010, eval, output; +set address %B000101010, +tick, +output; +tock, +output; +set address %B001101010, +eval, +output; +set address %B010101010, +eval, +output; +set address %B011101010, +eval, +output; +set address %B100101010, +eval, +output; +set address %B101101010, +eval, +output; +set address %B110101010, +eval, +output; +set address %B111101010, +eval, +output; set load 1, -set address %B000101010, set in %B0101010101010101, tick, output, tock, output; -set address %B001101010, set in %B1010101010101010, tick, output; tock, output; +set address %B000101010, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address %B001101010, +set in %B1010101010101010, +tick, +output; +tock, +output; set load 0, -set address %B000101010, tick, output; tock, output; -set address %B001101010, eval, output; -set address %B010101010, eval, output; -set address %B011101010, eval, output; -set address %B100101010, eval, output; -set address %B101101010, eval, output; -set address %B110101010, eval, output; -set address %B111101010, eval, output; +set address %B000101010, +tick, +output; +tock, +output; +set address %B001101010, +eval, +output; +set address %B010101010, +eval, +output; +set address %B011101010, +eval, +output; +set address %B100101010, +eval, +output; +set address %B101101010, +eval, +output; +set address %B110101010, +eval, +output; +set address %B111101010, +eval, +output; set load 1, -set address %B001101010, set in %B0101010101010101, tick, output, tock, output; -set address %B010101010, set in %B1010101010101010, tick, output; tock, output; +set address %B001101010, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address %B010101010, +set in %B1010101010101010, +tick, +output; +tock, +output; set load 0, -set address %B000101010, tick, output; tock, output; -set address %B001101010, eval, output; -set address %B010101010, eval, output; -set address %B011101010, eval, output; -set address %B100101010, eval, output; -set address %B101101010, eval, output; -set address %B110101010, eval, output; -set address %B111101010, eval, output; +set address %B000101010, +tick, +output; +tock, +output; +set address %B001101010, +eval, +output; +set address %B010101010, +eval, +output; +set address %B011101010, +eval, +output; +set address %B100101010, +eval, +output; +set address %B101101010, +eval, +output; +set address %B110101010, +eval, +output; +set address %B111101010, +eval, +output; set load 1, -set address %B010101010, set in %B0101010101010101, tick, output, tock, output; -set address %B011101010, set in %B1010101010101010, tick, output; tock, output; +set address %B010101010, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address %B011101010, +set in %B1010101010101010, +tick, +output; +tock, +output; set load 0, -set address %B000101010, tick, output; tock, output; -set address %B001101010, eval, output; -set address %B010101010, eval, output; -set address %B011101010, eval, output; -set address %B100101010, eval, output; -set address %B101101010, eval, output; -set address %B110101010, eval, output; -set address %B111101010, eval, output; +set address %B000101010, +tick, +output; +tock, +output; +set address %B001101010, +eval, +output; +set address %B010101010, +eval, +output; +set address %B011101010, +eval, +output; +set address %B100101010, +eval, +output; +set address %B101101010, +eval, +output; +set address %B110101010, +eval, +output; +set address %B111101010, +eval, +output; set load 1, -set address %B011101010, set in %B0101010101010101, tick, output, tock, output; -set address %B100101010, set in %B1010101010101010, tick, output; tock, output; +set address %B011101010, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address %B100101010, +set in %B1010101010101010, +tick, +output; +tock, +output; set load 0, -set address %B000101010, tick, output; tock, output; -set address %B001101010, eval, output; -set address %B010101010, eval, output; -set address %B011101010, eval, output; -set address %B100101010, eval, output; -set address %B101101010, eval, output; -set address %B110101010, eval, output; -set address %B111101010, eval, output; +set address %B000101010, +tick, +output; +tock, +output; +set address %B001101010, +eval, +output; +set address %B010101010, +eval, +output; +set address %B011101010, +eval, +output; +set address %B100101010, +eval, +output; +set address %B101101010, +eval, +output; +set address %B110101010, +eval, +output; +set address %B111101010, +eval, +output; set load 1, -set address %B100101010, set in %B0101010101010101, tick, output, tock, output; -set address %B101101010, set in %B1010101010101010, tick, output; tock, output; +set address %B100101010, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address %B101101010, +set in %B1010101010101010, +tick, +output; +tock, +output; set load 0, -set address %B000101010, tick, output; tock, output; -set address %B001101010, eval, output; -set address %B010101010, eval, output; -set address %B011101010, eval, output; -set address %B100101010, eval, output; -set address %B101101010, eval, output; -set address %B110101010, eval, output; -set address %B111101010, eval, output; +set address %B000101010, +tick, +output; +tock, +output; +set address %B001101010, +eval, +output; +set address %B010101010, +eval, +output; +set address %B011101010, +eval, +output; +set address %B100101010, +eval, +output; +set address %B101101010, +eval, +output; +set address %B110101010, +eval, +output; +set address %B111101010, +eval, +output; set load 1, -set address %B101101010, set in %B0101010101010101, tick, output, tock, output; -set address %B110101010, set in %B1010101010101010, tick, output; tock, output; +set address %B101101010, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address %B110101010, +set in %B1010101010101010, +tick, +output; +tock, +output; set load 0, -set address %B000101010, tick, output; tock, output; -set address %B001101010, eval, output; -set address %B010101010, eval, output; -set address %B011101010, eval, output; -set address %B100101010, eval, output; -set address %B101101010, eval, output; -set address %B110101010, eval, output; -set address %B111101010, eval, output; +set address %B000101010, +tick, +output; +tock, +output; +set address %B001101010, +eval, +output; +set address %B010101010, +eval, +output; +set address %B011101010, +eval, +output; +set address %B100101010, +eval, +output; +set address %B101101010, +eval, +output; +set address %B110101010, +eval, +output; +set address %B111101010, +eval, +output; set load 1, -set address %B110101010, set in %B0101010101010101, tick, output, tock, output; -set address %B111101010, set in %B1010101010101010, tick, output; tock, output; +set address %B110101010, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address %B111101010, +set in %B1010101010101010, +tick, +output; +tock, +output; set load 0, -set address %B000101010, tick, output; tock, output; -set address %B001101010, eval, output; -set address %B010101010, eval, output; -set address %B011101010, eval, output; -set address %B100101010, eval, output; -set address %B101101010, eval, output; -set address %B110101010, eval, output; -set address %B111101010, eval, output; +set address %B000101010, +tick, +output; +tock, +output; +set address %B001101010, +eval, +output; +set address %B010101010, +eval, +output; +set address %B011101010, +eval, +output; +set address %B100101010, +eval, +output; +set address %B101101010, +eval, +output; +set address %B110101010, +eval, +output; +set address %B111101010, +eval, +output; set load 1, -set address %B111101010, set in %B0101010101010101, tick, output, tock, output; +set address %B111101010, +set in %B0101010101010101, +tick, +output, +tock, +output; set load 0, -set address %B000101010, tick, output; tock, output; -set address %B001101010, eval, output; -set address %B010101010, eval, output; -set address %B011101010, eval, output; -set address %B100101010, eval, output; -set address %B101101010, eval, output; -set address %B110101010, eval, output; -set address %B111101010, eval, output;`; -export const cmp = `| time | in |load |address| out | -| 0+ | 0 | 0 | 0 | 0 | -| 1 | 0 | 0 | 0 | 0 | -| 1+ | 0 | 1 | 0 | 0 | -| 2 | 0 | 1 | 0 | 0 | -| 2+ | 13099 | 0 | 0 | 0 | -| 3 | 13099 | 0 | 0 | 0 | -| 3+ | 13099 | 1 | 130 | 0 | -| 4 | 13099 | 1 | 130 | 13099 | -| 4+ | 13099 | 0 | 0 | 0 | -| 5 | 13099 | 0 | 0 | 0 | -| 5+ | 4729 | 0 | 472 | 0 | -| 6 | 4729 | 0 | 472 | 0 | -| 6+ | 4729 | 1 | 472 | 0 | -| 7 | 4729 | 1 | 472 | 4729 | -| 7+ | 4729 | 0 | 472 | 4729 | -| 8 | 4729 | 0 | 472 | 4729 | -| 8 | 4729 | 0 | 130 | 13099 | -| 8+ | 5119 | 0 | 130 | 13099 | -| 9 | 5119 | 0 | 130 | 13099 | -| 9+ | 5119 | 1 | 511 | 0 | -| 10 | 5119 | 1 | 511 | 5119 | -| 10+ | 5119 | 0 | 511 | 5119 | -| 11 | 5119 | 0 | 511 | 5119 | -| 11 | 5119 | 0 | 472 | 4729 | -| 11 | 5119 | 0 | 511 | 5119 | -| 11+ | 5119 | 0 | 168 | 0 | -| 12 | 5119 | 0 | 168 | 0 | -| 12 | 5119 | 0 | 169 | 0 | -| 12 | 5119 | 0 | 170 | 0 | -| 12 | 5119 | 0 | 171 | 0 | -| 12 | 5119 | 0 | 172 | 0 | -| 12 | 5119 | 0 | 173 | 0 | -| 12 | 5119 | 0 | 174 | 0 | -| 12 | 5119 | 0 | 175 | 0 | -| 12+ | 21845 | 1 | 168 | 0 | -| 13 | 21845 | 1 | 168 | 21845 | -| 13+ | 21845 | 1 | 169 | 0 | -| 14 | 21845 | 1 | 169 | 21845 | -| 14+ | 21845 | 1 | 170 | 0 | -| 15 | 21845 | 1 | 170 | 21845 | -| 15+ | 21845 | 1 | 171 | 0 | -| 16 | 21845 | 1 | 171 | 21845 | -| 16+ | 21845 | 1 | 172 | 0 | -| 17 | 21845 | 1 | 172 | 21845 | -| 17+ | 21845 | 1 | 173 | 0 | -| 18 | 21845 | 1 | 173 | 21845 | -| 18+ | 21845 | 1 | 174 | 0 | -| 19 | 21845 | 1 | 174 | 21845 | -| 19+ | 21845 | 1 | 175 | 0 | -| 20 | 21845 | 1 | 175 | 21845 | -| 20+ | 21845 | 0 | 168 | 21845 | -| 21 | 21845 | 0 | 168 | 21845 | -| 21 | 21845 | 0 | 169 | 21845 | -| 21 | 21845 | 0 | 170 | 21845 | -| 21 | 21845 | 0 | 171 | 21845 | -| 21 | 21845 | 0 | 172 | 21845 | -| 21 | 21845 | 0 | 173 | 21845 | -| 21 | 21845 | 0 | 174 | 21845 | -| 21 | 21845 | 0 | 175 | 21845 | -| 21+ | -21846 | 1 | 168 | 21845 | -| 22 | -21846 | 1 | 168 | -21846 | -| 22+ | -21846 | 0 | 168 | -21846 | -| 23 | -21846 | 0 | 168 | -21846 | -| 23 | -21846 | 0 | 169 | 21845 | -| 23 | -21846 | 0 | 170 | 21845 | -| 23 | -21846 | 0 | 171 | 21845 | -| 23 | -21846 | 0 | 172 | 21845 | -| 23 | -21846 | 0 | 173 | 21845 | -| 23 | -21846 | 0 | 174 | 21845 | -| 23 | -21846 | 0 | 175 | 21845 | -| 23+ | 21845 | 1 | 168 | -21846 | -| 24 | 21845 | 1 | 168 | 21845 | -| 24+ | -21846 | 1 | 169 | 21845 | -| 25 | -21846 | 1 | 169 | -21846 | -| 25+ | -21846 | 0 | 168 | 21845 | -| 26 | -21846 | 0 | 168 | 21845 | -| 26 | -21846 | 0 | 169 | -21846 | -| 26 | -21846 | 0 | 170 | 21845 | -| 26 | -21846 | 0 | 171 | 21845 | -| 26 | -21846 | 0 | 172 | 21845 | -| 26 | -21846 | 0 | 173 | 21845 | -| 26 | -21846 | 0 | 174 | 21845 | -| 26 | -21846 | 0 | 175 | 21845 | -| 26+ | 21845 | 1 | 169 | -21846 | -| 27 | 21845 | 1 | 169 | 21845 | -| 27+ | -21846 | 1 | 170 | 21845 | -| 28 | -21846 | 1 | 170 | -21846 | -| 28+ | -21846 | 0 | 168 | 21845 | -| 29 | -21846 | 0 | 168 | 21845 | -| 29 | -21846 | 0 | 169 | 21845 | -| 29 | -21846 | 0 | 170 | -21846 | -| 29 | -21846 | 0 | 171 | 21845 | -| 29 | -21846 | 0 | 172 | 21845 | -| 29 | -21846 | 0 | 173 | 21845 | -| 29 | -21846 | 0 | 174 | 21845 | -| 29 | -21846 | 0 | 175 | 21845 | -| 29+ | 21845 | 1 | 170 | -21846 | -| 30 | 21845 | 1 | 170 | 21845 | -| 30+ | -21846 | 1 | 171 | 21845 | -| 31 | -21846 | 1 | 171 | -21846 | -| 31+ | -21846 | 0 | 168 | 21845 | -| 32 | -21846 | 0 | 168 | 21845 | -| 32 | -21846 | 0 | 169 | 21845 | -| 32 | -21846 | 0 | 170 | 21845 | -| 32 | -21846 | 0 | 171 | -21846 | -| 32 | -21846 | 0 | 172 | 21845 | -| 32 | -21846 | 0 | 173 | 21845 | -| 32 | -21846 | 0 | 174 | 21845 | -| 32 | -21846 | 0 | 175 | 21845 | -| 32+ | 21845 | 1 | 171 | -21846 | -| 33 | 21845 | 1 | 171 | 21845 | -| 33+ | -21846 | 1 | 172 | 21845 | -| 34 | -21846 | 1 | 172 | -21846 | -| 34+ | -21846 | 0 | 168 | 21845 | -| 35 | -21846 | 0 | 168 | 21845 | -| 35 | -21846 | 0 | 169 | 21845 | -| 35 | -21846 | 0 | 170 | 21845 | -| 35 | -21846 | 0 | 171 | 21845 | -| 35 | -21846 | 0 | 172 | -21846 | -| 35 | -21846 | 0 | 173 | 21845 | -| 35 | -21846 | 0 | 174 | 21845 | -| 35 | -21846 | 0 | 175 | 21845 | -| 35+ | 21845 | 1 | 172 | -21846 | -| 36 | 21845 | 1 | 172 | 21845 | -| 36+ | -21846 | 1 | 173 | 21845 | -| 37 | -21846 | 1 | 173 | -21846 | -| 37+ | -21846 | 0 | 168 | 21845 | -| 38 | -21846 | 0 | 168 | 21845 | -| 38 | -21846 | 0 | 169 | 21845 | -| 38 | -21846 | 0 | 170 | 21845 | -| 38 | -21846 | 0 | 171 | 21845 | -| 38 | -21846 | 0 | 172 | 21845 | -| 38 | -21846 | 0 | 173 | -21846 | -| 38 | -21846 | 0 | 174 | 21845 | -| 38 | -21846 | 0 | 175 | 21845 | -| 38+ | 21845 | 1 | 173 | -21846 | -| 39 | 21845 | 1 | 173 | 21845 | -| 39+ | -21846 | 1 | 174 | 21845 | -| 40 | -21846 | 1 | 174 | -21846 | -| 40+ | -21846 | 0 | 168 | 21845 | -| 41 | -21846 | 0 | 168 | 21845 | -| 41 | -21846 | 0 | 169 | 21845 | -| 41 | -21846 | 0 | 170 | 21845 | -| 41 | -21846 | 0 | 171 | 21845 | -| 41 | -21846 | 0 | 172 | 21845 | -| 41 | -21846 | 0 | 173 | 21845 | -| 41 | -21846 | 0 | 174 | -21846 | -| 41 | -21846 | 0 | 175 | 21845 | -| 41+ | 21845 | 1 | 174 | -21846 | -| 42 | 21845 | 1 | 174 | 21845 | -| 42+ | -21846 | 1 | 175 | 21845 | -| 43 | -21846 | 1 | 175 | -21846 | -| 43+ | -21846 | 0 | 168 | 21845 | -| 44 | -21846 | 0 | 168 | 21845 | -| 44 | -21846 | 0 | 169 | 21845 | -| 44 | -21846 | 0 | 170 | 21845 | -| 44 | -21846 | 0 | 171 | 21845 | -| 44 | -21846 | 0 | 172 | 21845 | -| 44 | -21846 | 0 | 173 | 21845 | -| 44 | -21846 | 0 | 174 | 21845 | -| 44 | -21846 | 0 | 175 | -21846 | -| 44+ | 21845 | 1 | 175 | -21846 | -| 45 | 21845 | 1 | 175 | 21845 | -| 45+ | 21845 | 0 | 168 | 21845 | -| 46 | 21845 | 0 | 168 | 21845 | -| 46 | 21845 | 0 | 169 | 21845 | -| 46 | 21845 | 0 | 170 | 21845 | -| 46 | 21845 | 0 | 171 | 21845 | -| 46 | 21845 | 0 | 172 | 21845 | -| 46 | 21845 | 0 | 173 | 21845 | -| 46 | 21845 | 0 | 174 | 21845 | -| 46 | 21845 | 0 | 175 | 21845 | -| 46+ | 21845 | 0 | 42 | 0 | -| 47 | 21845 | 0 | 42 | 0 | -| 47 | 21845 | 0 | 106 | 0 | -| 47 | 21845 | 0 | 170 | 21845 | -| 47 | 21845 | 0 | 234 | 0 | -| 47 | 21845 | 0 | 298 | 0 | -| 47 | 21845 | 0 | 362 | 0 | -| 47 | 21845 | 0 | 426 | 0 | -| 47 | 21845 | 0 | 490 | 0 | -| 47+ | 21845 | 1 | 42 | 0 | -| 48 | 21845 | 1 | 42 | 21845 | -| 48+ | 21845 | 1 | 106 | 0 | -| 49 | 21845 | 1 | 106 | 21845 | -| 49+ | 21845 | 1 | 170 | 21845 | -| 50 | 21845 | 1 | 170 | 21845 | -| 50+ | 21845 | 1 | 234 | 0 | -| 51 | 21845 | 1 | 234 | 21845 | -| 51+ | 21845 | 1 | 298 | 0 | -| 52 | 21845 | 1 | 298 | 21845 | -| 52+ | 21845 | 1 | 362 | 0 | -| 53 | 21845 | 1 | 362 | 21845 | -| 53+ | 21845 | 1 | 426 | 0 | -| 54 | 21845 | 1 | 426 | 21845 | -| 54+ | 21845 | 1 | 490 | 0 | -| 55 | 21845 | 1 | 490 | 21845 | -| 55+ | 21845 | 0 | 42 | 21845 | -| 56 | 21845 | 0 | 42 | 21845 | -| 56 | 21845 | 0 | 106 | 21845 | -| 56 | 21845 | 0 | 170 | 21845 | -| 56 | 21845 | 0 | 234 | 21845 | -| 56 | 21845 | 0 | 298 | 21845 | -| 56 | 21845 | 0 | 362 | 21845 | -| 56 | 21845 | 0 | 426 | 21845 | -| 56 | 21845 | 0 | 490 | 21845 | -| 56+ | -21846 | 1 | 42 | 21845 | -| 57 | -21846 | 1 | 42 | -21846 | -| 57+ | -21846 | 0 | 42 | -21846 | -| 58 | -21846 | 0 | 42 | -21846 | -| 58 | -21846 | 0 | 106 | 21845 | -| 58 | -21846 | 0 | 170 | 21845 | -| 58 | -21846 | 0 | 234 | 21845 | -| 58 | -21846 | 0 | 298 | 21845 | -| 58 | -21846 | 0 | 362 | 21845 | -| 58 | -21846 | 0 | 426 | 21845 | -| 58 | -21846 | 0 | 490 | 21845 | -| 58+ | 21845 | 1 | 42 | -21846 | -| 59 | 21845 | 1 | 42 | 21845 | -| 59+ | -21846 | 1 | 106 | 21845 | -| 60 | -21846 | 1 | 106 | -21846 | -| 60+ | -21846 | 0 | 42 | 21845 | -| 61 | -21846 | 0 | 42 | 21845 | -| 61 | -21846 | 0 | 106 | -21846 | -| 61 | -21846 | 0 | 170 | 21845 | -| 61 | -21846 | 0 | 234 | 21845 | -| 61 | -21846 | 0 | 298 | 21845 | -| 61 | -21846 | 0 | 362 | 21845 | -| 61 | -21846 | 0 | 426 | 21845 | -| 61 | -21846 | 0 | 490 | 21845 | -| 61+ | 21845 | 1 | 106 | -21846 | -| 62 | 21845 | 1 | 106 | 21845 | -| 62+ | -21846 | 1 | 170 | 21845 | -| 63 | -21846 | 1 | 170 | -21846 | -| 63+ | -21846 | 0 | 42 | 21845 | -| 64 | -21846 | 0 | 42 | 21845 | -| 64 | -21846 | 0 | 106 | 21845 | -| 64 | -21846 | 0 | 170 | -21846 | -| 64 | -21846 | 0 | 234 | 21845 | -| 64 | -21846 | 0 | 298 | 21845 | -| 64 | -21846 | 0 | 362 | 21845 | -| 64 | -21846 | 0 | 426 | 21845 | -| 64 | -21846 | 0 | 490 | 21845 | -| 64+ | 21845 | 1 | 170 | -21846 | -| 65 | 21845 | 1 | 170 | 21845 | -| 65+ | -21846 | 1 | 234 | 21845 | -| 66 | -21846 | 1 | 234 | -21846 | -| 66+ | -21846 | 0 | 42 | 21845 | -| 67 | -21846 | 0 | 42 | 21845 | -| 67 | -21846 | 0 | 106 | 21845 | -| 67 | -21846 | 0 | 170 | 21845 | -| 67 | -21846 | 0 | 234 | -21846 | -| 67 | -21846 | 0 | 298 | 21845 | -| 67 | -21846 | 0 | 362 | 21845 | -| 67 | -21846 | 0 | 426 | 21845 | -| 67 | -21846 | 0 | 490 | 21845 | -| 67+ | 21845 | 1 | 234 | -21846 | -| 68 | 21845 | 1 | 234 | 21845 | -| 68+ | -21846 | 1 | 298 | 21845 | -| 69 | -21846 | 1 | 298 | -21846 | -| 69+ | -21846 | 0 | 42 | 21845 | -| 70 | -21846 | 0 | 42 | 21845 | -| 70 | -21846 | 0 | 106 | 21845 | -| 70 | -21846 | 0 | 170 | 21845 | -| 70 | -21846 | 0 | 234 | 21845 | -| 70 | -21846 | 0 | 298 | -21846 | -| 70 | -21846 | 0 | 362 | 21845 | -| 70 | -21846 | 0 | 426 | 21845 | -| 70 | -21846 | 0 | 490 | 21845 | -| 70+ | 21845 | 1 | 298 | -21846 | -| 71 | 21845 | 1 | 298 | 21845 | -| 71+ | -21846 | 1 | 362 | 21845 | -| 72 | -21846 | 1 | 362 | -21846 | -| 72+ | -21846 | 0 | 42 | 21845 | -| 73 | -21846 | 0 | 42 | 21845 | -| 73 | -21846 | 0 | 106 | 21845 | -| 73 | -21846 | 0 | 170 | 21845 | -| 73 | -21846 | 0 | 234 | 21845 | -| 73 | -21846 | 0 | 298 | 21845 | -| 73 | -21846 | 0 | 362 | -21846 | -| 73 | -21846 | 0 | 426 | 21845 | -| 73 | -21846 | 0 | 490 | 21845 | -| 73+ | 21845 | 1 | 362 | -21846 | -| 74 | 21845 | 1 | 362 | 21845 | -| 74+ | -21846 | 1 | 426 | 21845 | -| 75 | -21846 | 1 | 426 | -21846 | -| 75+ | -21846 | 0 | 42 | 21845 | -| 76 | -21846 | 0 | 42 | 21845 | -| 76 | -21846 | 0 | 106 | 21845 | -| 76 | -21846 | 0 | 170 | 21845 | -| 76 | -21846 | 0 | 234 | 21845 | -| 76 | -21846 | 0 | 298 | 21845 | -| 76 | -21846 | 0 | 362 | 21845 | -| 76 | -21846 | 0 | 426 | -21846 | -| 76 | -21846 | 0 | 490 | 21845 | -| 76+ | 21845 | 1 | 426 | -21846 | -| 77 | 21845 | 1 | 426 | 21845 | -| 77+ | -21846 | 1 | 490 | 21845 | -| 78 | -21846 | 1 | 490 | -21846 | -| 78+ | -21846 | 0 | 42 | 21845 | -| 79 | -21846 | 0 | 42 | 21845 | -| 79 | -21846 | 0 | 106 | 21845 | -| 79 | -21846 | 0 | 170 | 21845 | -| 79 | -21846 | 0 | 234 | 21845 | -| 79 | -21846 | 0 | 298 | 21845 | -| 79 | -21846 | 0 | 362 | 21845 | -| 79 | -21846 | 0 | 426 | 21845 | -| 79 | -21846 | 0 | 490 | -21846 | -| 79+ | 21845 | 1 | 490 | -21846 | -| 80 | 21845 | 1 | 490 | 21845 | -| 80+ | 21845 | 0 | 42 | 21845 | -| 81 | 21845 | 0 | 42 | 21845 | -| 81 | 21845 | 0 | 106 | 21845 | -| 81 | 21845 | 0 | 170 | 21845 | -| 81 | 21845 | 0 | 234 | 21845 | -| 81 | 21845 | 0 | 298 | 21845 | -| 81 | 21845 | 0 | 362 | 21845 | -| 81 | 21845 | 0 | 426 | 21845 | -| 81 | 21845 | 0 | 490 | 21845 |`; +set address %B000101010, +tick, +output; +tock, +output; +set address %B001101010, +eval, +output; +set address %B010101010, +eval, +output; +set address %B011101010, +eval, +output; +set address %B100101010, +eval, +output; +set address %B101101010, +eval, +output; +set address %B110101010, +eval, +output; +set address %B111101010, +eval, +output; +`; +export const cmp = `|time | in |load|address| out | +| 0+ | 0 | 0 | 0 | 0 | +| 1 | 0 | 0 | 0 | 0 | +| 1+ | 0 | 1 | 0 | 0 | +| 2 | 0 | 1 | 0 | 0 | +| 2+ | 13099 | 0 | 0 | 0 | +| 3 | 13099 | 0 | 0 | 0 | +| 3+ | 13099 | 1 | 130 | 0 | +| 4 | 13099 | 1 | 130 | 13099 | +| 4+ | 13099 | 0 | 0 | 0 | +| 5 | 13099 | 0 | 0 | 0 | +| 5+ | 4729 | 0 | 472 | 0 | +| 6 | 4729 | 0 | 472 | 0 | +| 6+ | 4729 | 1 | 472 | 0 | +| 7 | 4729 | 1 | 472 | 4729 | +| 7+ | 4729 | 0 | 472 | 4729 | +| 8 | 4729 | 0 | 472 | 4729 | +| 8 | 4729 | 0 | 130 | 13099 | +| 8+ | 5119 | 0 | 130 | 13099 | +| 9 | 5119 | 0 | 130 | 13099 | +| 9+ | 5119 | 1 | 511 | 0 | +| 10 | 5119 | 1 | 511 | 5119 | +| 10+ | 5119 | 0 | 511 | 5119 | +| 11 | 5119 | 0 | 511 | 5119 | +| 11 | 5119 | 0 | 472 | 4729 | +| 11 | 5119 | 0 | 511 | 5119 | +| 11+ | 5119 | 0 | 168 | 0 | +| 12 | 5119 | 0 | 168 | 0 | +| 12 | 5119 | 0 | 169 | 0 | +| 12 | 5119 | 0 | 170 | 0 | +| 12 | 5119 | 0 | 171 | 0 | +| 12 | 5119 | 0 | 172 | 0 | +| 12 | 5119 | 0 | 173 | 0 | +| 12 | 5119 | 0 | 174 | 0 | +| 12 | 5119 | 0 | 175 | 0 | +| 12+ | 21845 | 1 | 168 | 0 | +| 13 | 21845 | 1 | 168 | 21845 | +| 13+ | 21845 | 1 | 169 | 0 | +| 14 | 21845 | 1 | 169 | 21845 | +| 14+ | 21845 | 1 | 170 | 0 | +| 15 | 21845 | 1 | 170 | 21845 | +| 15+ | 21845 | 1 | 171 | 0 | +| 16 | 21845 | 1 | 171 | 21845 | +| 16+ | 21845 | 1 | 172 | 0 | +| 17 | 21845 | 1 | 172 | 21845 | +| 17+ | 21845 | 1 | 173 | 0 | +| 18 | 21845 | 1 | 173 | 21845 | +| 18+ | 21845 | 1 | 174 | 0 | +| 19 | 21845 | 1 | 174 | 21845 | +| 19+ | 21845 | 1 | 175 | 0 | +| 20 | 21845 | 1 | 175 | 21845 | +| 20+ | 21845 | 0 | 168 | 21845 | +| 21 | 21845 | 0 | 168 | 21845 | +| 21 | 21845 | 0 | 169 | 21845 | +| 21 | 21845 | 0 | 170 | 21845 | +| 21 | 21845 | 0 | 171 | 21845 | +| 21 | 21845 | 0 | 172 | 21845 | +| 21 | 21845 | 0 | 173 | 21845 | +| 21 | 21845 | 0 | 174 | 21845 | +| 21 | 21845 | 0 | 175 | 21845 | +| 21+ | -21846 | 1 | 168 | 21845 | +| 22 | -21846 | 1 | 168 | -21846 | +| 22+ | -21846 | 0 | 168 | -21846 | +| 23 | -21846 | 0 | 168 | -21846 | +| 23 | -21846 | 0 | 169 | 21845 | +| 23 | -21846 | 0 | 170 | 21845 | +| 23 | -21846 | 0 | 171 | 21845 | +| 23 | -21846 | 0 | 172 | 21845 | +| 23 | -21846 | 0 | 173 | 21845 | +| 23 | -21846 | 0 | 174 | 21845 | +| 23 | -21846 | 0 | 175 | 21845 | +| 23+ | 21845 | 1 | 168 | -21846 | +| 24 | 21845 | 1 | 168 | 21845 | +| 24+ | -21846 | 1 | 169 | 21845 | +| 25 | -21846 | 1 | 169 | -21846 | +| 25+ | -21846 | 0 | 168 | 21845 | +| 26 | -21846 | 0 | 168 | 21845 | +| 26 | -21846 | 0 | 169 | -21846 | +| 26 | -21846 | 0 | 170 | 21845 | +| 26 | -21846 | 0 | 171 | 21845 | +| 26 | -21846 | 0 | 172 | 21845 | +| 26 | -21846 | 0 | 173 | 21845 | +| 26 | -21846 | 0 | 174 | 21845 | +| 26 | -21846 | 0 | 175 | 21845 | +| 26+ | 21845 | 1 | 169 | -21846 | +| 27 | 21845 | 1 | 169 | 21845 | +| 27+ | -21846 | 1 | 170 | 21845 | +| 28 | -21846 | 1 | 170 | -21846 | +| 28+ | -21846 | 0 | 168 | 21845 | +| 29 | -21846 | 0 | 168 | 21845 | +| 29 | -21846 | 0 | 169 | 21845 | +| 29 | -21846 | 0 | 170 | -21846 | +| 29 | -21846 | 0 | 171 | 21845 | +| 29 | -21846 | 0 | 172 | 21845 | +| 29 | -21846 | 0 | 173 | 21845 | +| 29 | -21846 | 0 | 174 | 21845 | +| 29 | -21846 | 0 | 175 | 21845 | +| 29+ | 21845 | 1 | 170 | -21846 | +| 30 | 21845 | 1 | 170 | 21845 | +| 30+ | -21846 | 1 | 171 | 21845 | +| 31 | -21846 | 1 | 171 | -21846 | +| 31+ | -21846 | 0 | 168 | 21845 | +| 32 | -21846 | 0 | 168 | 21845 | +| 32 | -21846 | 0 | 169 | 21845 | +| 32 | -21846 | 0 | 170 | 21845 | +| 32 | -21846 | 0 | 171 | -21846 | +| 32 | -21846 | 0 | 172 | 21845 | +| 32 | -21846 | 0 | 173 | 21845 | +| 32 | -21846 | 0 | 174 | 21845 | +| 32 | -21846 | 0 | 175 | 21845 | +| 32+ | 21845 | 1 | 171 | -21846 | +| 33 | 21845 | 1 | 171 | 21845 | +| 33+ | -21846 | 1 | 172 | 21845 | +| 34 | -21846 | 1 | 172 | -21846 | +| 34+ | -21846 | 0 | 168 | 21845 | +| 35 | -21846 | 0 | 168 | 21845 | +| 35 | -21846 | 0 | 169 | 21845 | +| 35 | -21846 | 0 | 170 | 21845 | +| 35 | -21846 | 0 | 171 | 21845 | +| 35 | -21846 | 0 | 172 | -21846 | +| 35 | -21846 | 0 | 173 | 21845 | +| 35 | -21846 | 0 | 174 | 21845 | +| 35 | -21846 | 0 | 175 | 21845 | +| 35+ | 21845 | 1 | 172 | -21846 | +| 36 | 21845 | 1 | 172 | 21845 | +| 36+ | -21846 | 1 | 173 | 21845 | +| 37 | -21846 | 1 | 173 | -21846 | +| 37+ | -21846 | 0 | 168 | 21845 | +| 38 | -21846 | 0 | 168 | 21845 | +| 38 | -21846 | 0 | 169 | 21845 | +| 38 | -21846 | 0 | 170 | 21845 | +| 38 | -21846 | 0 | 171 | 21845 | +| 38 | -21846 | 0 | 172 | 21845 | +| 38 | -21846 | 0 | 173 | -21846 | +| 38 | -21846 | 0 | 174 | 21845 | +| 38 | -21846 | 0 | 175 | 21845 | +| 38+ | 21845 | 1 | 173 | -21846 | +| 39 | 21845 | 1 | 173 | 21845 | +| 39+ | -21846 | 1 | 174 | 21845 | +| 40 | -21846 | 1 | 174 | -21846 | +| 40+ | -21846 | 0 | 168 | 21845 | +| 41 | -21846 | 0 | 168 | 21845 | +| 41 | -21846 | 0 | 169 | 21845 | +| 41 | -21846 | 0 | 170 | 21845 | +| 41 | -21846 | 0 | 171 | 21845 | +| 41 | -21846 | 0 | 172 | 21845 | +| 41 | -21846 | 0 | 173 | 21845 | +| 41 | -21846 | 0 | 174 | -21846 | +| 41 | -21846 | 0 | 175 | 21845 | +| 41+ | 21845 | 1 | 174 | -21846 | +| 42 | 21845 | 1 | 174 | 21845 | +| 42+ | -21846 | 1 | 175 | 21845 | +| 43 | -21846 | 1 | 175 | -21846 | +| 43+ | -21846 | 0 | 168 | 21845 | +| 44 | -21846 | 0 | 168 | 21845 | +| 44 | -21846 | 0 | 169 | 21845 | +| 44 | -21846 | 0 | 170 | 21845 | +| 44 | -21846 | 0 | 171 | 21845 | +| 44 | -21846 | 0 | 172 | 21845 | +| 44 | -21846 | 0 | 173 | 21845 | +| 44 | -21846 | 0 | 174 | 21845 | +| 44 | -21846 | 0 | 175 | -21846 | +| 44+ | 21845 | 1 | 175 | -21846 | +| 45 | 21845 | 1 | 175 | 21845 | +| 45+ | 21845 | 0 | 168 | 21845 | +| 46 | 21845 | 0 | 168 | 21845 | +| 46 | 21845 | 0 | 169 | 21845 | +| 46 | 21845 | 0 | 170 | 21845 | +| 46 | 21845 | 0 | 171 | 21845 | +| 46 | 21845 | 0 | 172 | 21845 | +| 46 | 21845 | 0 | 173 | 21845 | +| 46 | 21845 | 0 | 174 | 21845 | +| 46 | 21845 | 0 | 175 | 21845 | +| 46+ | 21845 | 0 | 42 | 0 | +| 47 | 21845 | 0 | 42 | 0 | +| 47 | 21845 | 0 | 106 | 0 | +| 47 | 21845 | 0 | 170 | 21845 | +| 47 | 21845 | 0 | 234 | 0 | +| 47 | 21845 | 0 | 298 | 0 | +| 47 | 21845 | 0 | 362 | 0 | +| 47 | 21845 | 0 | 426 | 0 | +| 47 | 21845 | 0 | 490 | 0 | +| 47+ | 21845 | 1 | 42 | 0 | +| 48 | 21845 | 1 | 42 | 21845 | +| 48+ | 21845 | 1 | 106 | 0 | +| 49 | 21845 | 1 | 106 | 21845 | +| 49+ | 21845 | 1 | 170 | 21845 | +| 50 | 21845 | 1 | 170 | 21845 | +| 50+ | 21845 | 1 | 234 | 0 | +| 51 | 21845 | 1 | 234 | 21845 | +| 51+ | 21845 | 1 | 298 | 0 | +| 52 | 21845 | 1 | 298 | 21845 | +| 52+ | 21845 | 1 | 362 | 0 | +| 53 | 21845 | 1 | 362 | 21845 | +| 53+ | 21845 | 1 | 426 | 0 | +| 54 | 21845 | 1 | 426 | 21845 | +| 54+ | 21845 | 1 | 490 | 0 | +| 55 | 21845 | 1 | 490 | 21845 | +| 55+ | 21845 | 0 | 42 | 21845 | +| 56 | 21845 | 0 | 42 | 21845 | +| 56 | 21845 | 0 | 106 | 21845 | +| 56 | 21845 | 0 | 170 | 21845 | +| 56 | 21845 | 0 | 234 | 21845 | +| 56 | 21845 | 0 | 298 | 21845 | +| 56 | 21845 | 0 | 362 | 21845 | +| 56 | 21845 | 0 | 426 | 21845 | +| 56 | 21845 | 0 | 490 | 21845 | +| 56+ | -21846 | 1 | 42 | 21845 | +| 57 | -21846 | 1 | 42 | -21846 | +| 57+ | -21846 | 0 | 42 | -21846 | +| 58 | -21846 | 0 | 42 | -21846 | +| 58 | -21846 | 0 | 106 | 21845 | +| 58 | -21846 | 0 | 170 | 21845 | +| 58 | -21846 | 0 | 234 | 21845 | +| 58 | -21846 | 0 | 298 | 21845 | +| 58 | -21846 | 0 | 362 | 21845 | +| 58 | -21846 | 0 | 426 | 21845 | +| 58 | -21846 | 0 | 490 | 21845 | +| 58+ | 21845 | 1 | 42 | -21846 | +| 59 | 21845 | 1 | 42 | 21845 | +| 59+ | -21846 | 1 | 106 | 21845 | +| 60 | -21846 | 1 | 106 | -21846 | +| 60+ | -21846 | 0 | 42 | 21845 | +| 61 | -21846 | 0 | 42 | 21845 | +| 61 | -21846 | 0 | 106 | -21846 | +| 61 | -21846 | 0 | 170 | 21845 | +| 61 | -21846 | 0 | 234 | 21845 | +| 61 | -21846 | 0 | 298 | 21845 | +| 61 | -21846 | 0 | 362 | 21845 | +| 61 | -21846 | 0 | 426 | 21845 | +| 61 | -21846 | 0 | 490 | 21845 | +| 61+ | 21845 | 1 | 106 | -21846 | +| 62 | 21845 | 1 | 106 | 21845 | +| 62+ | -21846 | 1 | 170 | 21845 | +| 63 | -21846 | 1 | 170 | -21846 | +| 63+ | -21846 | 0 | 42 | 21845 | +| 64 | -21846 | 0 | 42 | 21845 | +| 64 | -21846 | 0 | 106 | 21845 | +| 64 | -21846 | 0 | 170 | -21846 | +| 64 | -21846 | 0 | 234 | 21845 | +| 64 | -21846 | 0 | 298 | 21845 | +| 64 | -21846 | 0 | 362 | 21845 | +| 64 | -21846 | 0 | 426 | 21845 | +| 64 | -21846 | 0 | 490 | 21845 | +| 64+ | 21845 | 1 | 170 | -21846 | +| 65 | 21845 | 1 | 170 | 21845 | +| 65+ | -21846 | 1 | 234 | 21845 | +| 66 | -21846 | 1 | 234 | -21846 | +| 66+ | -21846 | 0 | 42 | 21845 | +| 67 | -21846 | 0 | 42 | 21845 | +| 67 | -21846 | 0 | 106 | 21845 | +| 67 | -21846 | 0 | 170 | 21845 | +| 67 | -21846 | 0 | 234 | -21846 | +| 67 | -21846 | 0 | 298 | 21845 | +| 67 | -21846 | 0 | 362 | 21845 | +| 67 | -21846 | 0 | 426 | 21845 | +| 67 | -21846 | 0 | 490 | 21845 | +| 67+ | 21845 | 1 | 234 | -21846 | +| 68 | 21845 | 1 | 234 | 21845 | +| 68+ | -21846 | 1 | 298 | 21845 | +| 69 | -21846 | 1 | 298 | -21846 | +| 69+ | -21846 | 0 | 42 | 21845 | +| 70 | -21846 | 0 | 42 | 21845 | +| 70 | -21846 | 0 | 106 | 21845 | +| 70 | -21846 | 0 | 170 | 21845 | +| 70 | -21846 | 0 | 234 | 21845 | +| 70 | -21846 | 0 | 298 | -21846 | +| 70 | -21846 | 0 | 362 | 21845 | +| 70 | -21846 | 0 | 426 | 21845 | +| 70 | -21846 | 0 | 490 | 21845 | +| 70+ | 21845 | 1 | 298 | -21846 | +| 71 | 21845 | 1 | 298 | 21845 | +| 71+ | -21846 | 1 | 362 | 21845 | +| 72 | -21846 | 1 | 362 | -21846 | +| 72+ | -21846 | 0 | 42 | 21845 | +| 73 | -21846 | 0 | 42 | 21845 | +| 73 | -21846 | 0 | 106 | 21845 | +| 73 | -21846 | 0 | 170 | 21845 | +| 73 | -21846 | 0 | 234 | 21845 | +| 73 | -21846 | 0 | 298 | 21845 | +| 73 | -21846 | 0 | 362 | -21846 | +| 73 | -21846 | 0 | 426 | 21845 | +| 73 | -21846 | 0 | 490 | 21845 | +| 73+ | 21845 | 1 | 362 | -21846 | +| 74 | 21845 | 1 | 362 | 21845 | +| 74+ | -21846 | 1 | 426 | 21845 | +| 75 | -21846 | 1 | 426 | -21846 | +| 75+ | -21846 | 0 | 42 | 21845 | +| 76 | -21846 | 0 | 42 | 21845 | +| 76 | -21846 | 0 | 106 | 21845 | +| 76 | -21846 | 0 | 170 | 21845 | +| 76 | -21846 | 0 | 234 | 21845 | +| 76 | -21846 | 0 | 298 | 21845 | +| 76 | -21846 | 0 | 362 | 21845 | +| 76 | -21846 | 0 | 426 | -21846 | +| 76 | -21846 | 0 | 490 | 21845 | +| 76+ | 21845 | 1 | 426 | -21846 | +| 77 | 21845 | 1 | 426 | 21845 | +| 77+ | -21846 | 1 | 490 | 21845 | +| 78 | -21846 | 1 | 490 | -21846 | +| 78+ | -21846 | 0 | 42 | 21845 | +| 79 | -21846 | 0 | 42 | 21845 | +| 79 | -21846 | 0 | 106 | 21845 | +| 79 | -21846 | 0 | 170 | 21845 | +| 79 | -21846 | 0 | 234 | 21845 | +| 79 | -21846 | 0 | 298 | 21845 | +| 79 | -21846 | 0 | 362 | 21845 | +| 79 | -21846 | 0 | 426 | 21845 | +| 79 | -21846 | 0 | 490 | -21846 | +| 79+ | 21845 | 1 | 490 | -21846 | +| 80 | 21845 | 1 | 490 | 21845 | +| 80+ | 21845 | 0 | 42 | 21845 | +| 81 | 21845 | 0 | 42 | 21845 | +| 81 | 21845 | 0 | 106 | 21845 | +| 81 | 21845 | 0 | 170 | 21845 | +| 81 | 21845 | 0 | 234 | 21845 | +| 81 | 21845 | 0 | 298 | 21845 | +| 81 | 21845 | 0 | 362 | 21845 | +| 81 | 21845 | 0 | 426 | 21845 | +| 81 | 21845 | 0 | 490 | 21845 |`; diff --git a/projects/src/project_03/07_ram4k.ts b/projects/src/project_03/07_ram4k.ts index ef56d6a6c..07d518141 100644 --- a/projects/src/project_03/07_ram4k.ts +++ b/projects/src/project_03/07_ram4k.ts @@ -1,7 +1,7 @@ export const hdl = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/03/b/RAM4K.hdl +// File name: projects/3/b/RAM4K.hdl /** * Memory of 4K 16-bit registers. * If load is asserted, the value of the register selected by @@ -15,633 +15,1346 @@ CHIP RAM4K { PARTS: //// Replace this comment with your code. }`; -export const tst = `output-list time%S1.4.1 in%D1.6.1 load%B2.1.2 address%D2.4.2 out%D1.6.1; +export const tst = `// This file is part of www.nand2tetris.org +// and the book "The Elements of Computing Systems" +// by Nisan and Schocken, MIT Press. +// File name: projects/3/b/RAM4K.tst -set in 0, set load 0, set address 0, tick, output; tock, output; -set load 1, tick, output; tock, output; -set in 1111, set load 0, tick, output; tock, output; -set load 1, set address 1111, tick, output; tock, output; -set load 0, set address 0, tick, output; tock, output; -set in 3513, set address 3513, tick, output; tock, output; -set load 1, tick, output; tock, output; -set load 0, tick, output; tock, output; -set address 1111, eval, output; +output-list time%S1.3.1 in%D1.6.1 load%B2.1.1 address%D2.4.2 out%D1.6.1; -set in 4095, tick, output; tock, output; -set load 1, set address 4095, tick, output; tock, output; -set load 0, tick, output; tock, output; -set address 3513, eval, output; +set in 0, +set load 0, +set address 0, +tick, +output; +tock, +output; -set address 4095, eval, output; +set load 1, +tick, +output; +tock, +output; +set in 1111, set load 0, -set address %B101010101000, tick, output; tock, output; -set address %B101010101001, eval, output; -set address %B101010101010, eval, output; -set address %B101010101011, eval, output; -set address %B101010101100, eval, output; -set address %B101010101101, eval, output; -set address %B101010101110, eval, output; -set address %B101010101111, eval, output; +tick, +output; +tock, +output; set load 1, -set in %B0101010101010101, set address %B101010101000, tick, output; tock, output; -set address %B101010101001, tick, output, tock, output; -set address %B101010101010, tick, output, tock, output; -set address %B101010101011, tick, output, tock, output; -set address %B101010101100, tick, output, tock, output; -set address %B101010101101, tick, output, tock, output; -set address %B101010101110, tick, output, tock, output; -set address %B101010101111, tick, output, tock, output; +set address 1111, +tick, +output; +tock, +output; set load 0, -set address %B101010101000, tick, output; tock, output; -set address %B101010101001, eval, output; -set address %B101010101010, eval, output; -set address %B101010101011, eval, output; -set address %B101010101100, eval, output; -set address %B101010101101, eval, output; -set address %B101010101110, eval, output; -set address %B101010101111, eval, output; +set address 0, +tick, +output; +tock, +output; + +set in 3513, +set address 3513, +tick, +output; +tock, +output; set load 1, -set address %B101010101000, set in %B1010101010101010, tick, output; tock, output; +tick, +output; +tock, +output; + set load 0, -set address %B101010101000, tick, output; tock, output; -set address %B101010101001, eval, output; -set address %B101010101010, eval, output; -set address %B101010101011, eval, output; -set address %B101010101100, eval, output; -set address %B101010101101, eval, output; -set address %B101010101110, eval, output; -set address %B101010101111, eval, output; +tick, +output; +tock, +output; + +set address 1111, +eval, +output; + +set in 4095, +tick, +output; +tock, +output; set load 1, -set address %B101010101000, set in %B0101010101010101, tick, output, tock, output; -set address %B101010101001, set in %B1010101010101010, tick, output; tock, output; +set address 4095, +tick, +output; +tock, +output; + set load 0, -set address %B101010101000, tick, output; tock, output; -set address %B101010101001, eval, output; -set address %B101010101010, eval, output; -set address %B101010101011, eval, output; -set address %B101010101100, eval, output; -set address %B101010101101, eval, output; -set address %B101010101110, eval, output; -set address %B101010101111, eval, output; +tick, +output; +tock, +output; + +set address 3513, +eval, +output; + +set address 4095, +eval, +output; + + +set load 0, +set address %B101010101000, +tick, +output; +tock, +output; +set address %B101010101001, +eval, +output; +set address %B101010101010, +eval, +output; +set address %B101010101011, +eval, +output; +set address %B101010101100, +eval, +output; +set address %B101010101101, +eval, +output; +set address %B101010101110, +eval, +output; +set address %B101010101111, +eval, +output; set load 1, -set address %B101010101001, set in %B0101010101010101, tick, output, tock, output; -set address %B101010101010, set in %B1010101010101010, tick, output; tock, output; +set in %B0101010101010101, +set address %B101010101000, +tick, +output; +tock, +output; +set address %B101010101001, +tick, +output, +tock, +output; +set address %B101010101010, +tick, +output, +tock, +output; +set address %B101010101011, +tick, +output, +tock, +output; +set address %B101010101100, +tick, +output, +tock, +output; +set address %B101010101101, +tick, +output, +tock, +output; +set address %B101010101110, +tick, +output, +tock, +output; +set address %B101010101111, +tick, +output, +tock, +output; + set load 0, -set address %B101010101000, tick, output; tock, output; -set address %B101010101001, eval, output; -set address %B101010101010, eval, output; -set address %B101010101011, eval, output; -set address %B101010101100, eval, output; -set address %B101010101101, eval, output; -set address %B101010101110, eval, output; -set address %B101010101111, eval, output; +set address %B101010101000, +tick, +output; +tock, +output; +set address %B101010101001, +eval, +output; +set address %B101010101010, +eval, +output; +set address %B101010101011, +eval, +output; +set address %B101010101100, +eval, +output; +set address %B101010101101, +eval, +output; +set address %B101010101110, +eval, +output; +set address %B101010101111, +eval, +output; set load 1, -set address %B101010101010, set in %B0101010101010101, tick, output, tock, output; -set address %B101010101011, set in %B1010101010101010, tick, output; tock, output; +set address %B101010101000, +set in %B1010101010101010, +tick, +output; +tock, +output; + set load 0, -set address %B101010101000, tick, output; tock, output; -set address %B101010101001, eval, output; -set address %B101010101010, eval, output; -set address %B101010101011, eval, output; -set address %B101010101100, eval, output; -set address %B101010101101, eval, output; -set address %B101010101110, eval, output; -set address %B101010101111, eval, output; +set address %B101010101000, +tick, +output; +tock, +output; +set address %B101010101001, +eval, +output; +set address %B101010101010, +eval, +output; +set address %B101010101011, +eval, +output; +set address %B101010101100, +eval, +output; +set address %B101010101101, +eval, +output; +set address %B101010101110, +eval, +output; +set address %B101010101111, +eval, +output; set load 1, -set address %B101010101011, set in %B0101010101010101, tick, output, tock, output; -set address %B101010101100, set in %B1010101010101010, tick, output; tock, output; +set address %B101010101000, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address %B101010101001, +set in %B1010101010101010, +tick, +output; +tock, +output; + set load 0, -set address %B101010101000, tick, output; tock, output; -set address %B101010101001, eval, output; -set address %B101010101010, eval, output; -set address %B101010101011, eval, output; -set address %B101010101100, eval, output; -set address %B101010101101, eval, output; -set address %B101010101110, eval, output; -set address %B101010101111, eval, output; +set address %B101010101000, +tick, +output; +tock, +output; +set address %B101010101001, +eval, +output; +set address %B101010101010, +eval, +output; +set address %B101010101011, +eval, +output; +set address %B101010101100, +eval, +output; +set address %B101010101101, +eval, +output; +set address %B101010101110, +eval, +output; +set address %B101010101111, +eval, +output; set load 1, -set address %B101010101100, set in %B0101010101010101, tick, output, tock, output; -set address %B101010101101, set in %B1010101010101010, tick, output; tock, output; +set address %B101010101001, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address %B101010101010, +set in %B1010101010101010, +tick, +output; +tock, +output; + set load 0, -set address %B101010101000, tick, output; tock, output; -set address %B101010101001, eval, output; -set address %B101010101010, eval, output; -set address %B101010101011, eval, output; -set address %B101010101100, eval, output; -set address %B101010101101, eval, output; -set address %B101010101110, eval, output; -set address %B101010101111, eval, output; +set address %B101010101000, +tick, +output; +tock, +output; +set address %B101010101001, +eval, +output; +set address %B101010101010, +eval, +output; +set address %B101010101011, +eval, +output; +set address %B101010101100, +eval, +output; +set address %B101010101101, +eval, +output; +set address %B101010101110, +eval, +output; +set address %B101010101111, +eval, +output; set load 1, -set address %B101010101101, set in %B0101010101010101, tick, output, tock, output; -set address %B101010101110, set in %B1010101010101010, tick, output; tock, output; +set address %B101010101010, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address %B101010101011, +set in %B1010101010101010, +tick, +output; +tock, +output; + set load 0, -set address %B101010101000, tick, output; tock, output; -set address %B101010101001, eval, output; -set address %B101010101010, eval, output; -set address %B101010101011, eval, output; -set address %B101010101100, eval, output; -set address %B101010101101, eval, output; -set address %B101010101110, eval, output; -set address %B101010101111, eval, output; +set address %B101010101000, +tick, +output; +tock, +output; +set address %B101010101001, +eval, +output; +set address %B101010101010, +eval, +output; +set address %B101010101011, +eval, +output; +set address %B101010101100, +eval, +output; +set address %B101010101101, +eval, +output; +set address %B101010101110, +eval, +output; +set address %B101010101111, +eval, +output; set load 1, -set address %B101010101110, set in %B0101010101010101, tick, output, tock, output; -set address %B101010101111, set in %B1010101010101010, tick, output; tock, output; +set address %B101010101011, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address %B101010101100, +set in %B1010101010101010, +tick, +output; +tock, +output; + set load 0, -set address %B101010101000, tick, output; tock, output; -set address %B101010101001, eval, output; -set address %B101010101010, eval, output; -set address %B101010101011, eval, output; -set address %B101010101100, eval, output; -set address %B101010101101, eval, output; -set address %B101010101110, eval, output; -set address %B101010101111, eval, output; +set address %B101010101000, +tick, +output; +tock, +output; +set address %B101010101001, +eval, +output; +set address %B101010101010, +eval, +output; +set address %B101010101011, +eval, +output; +set address %B101010101100, +eval, +output; +set address %B101010101101, +eval, +output; +set address %B101010101110, +eval, +output; +set address %B101010101111, +eval, +output; set load 1, -set address %B101010101111, set in %B0101010101010101, tick, output, tock, output; +set address %B101010101100, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address %B101010101101, +set in %B1010101010101010, +tick, +output; +tock, +output; set load 0, -set address %B101010101000, tick, output; tock, output; -set address %B101010101001, eval, output; -set address %B101010101010, eval, output; -set address %B101010101011, eval, output; -set address %B101010101100, eval, output; -set address %B101010101101, eval, output; -set address %B101010101110, eval, output; -set address %B101010101111, eval, output; +set address %B101010101000, +tick, +output; +tock, +output; +set address %B101010101001, +eval, +output; +set address %B101010101010, +eval, +output; +set address %B101010101011, +eval, +output; +set address %B101010101100, +eval, +output; +set address %B101010101101, +eval, +output; +set address %B101010101110, +eval, +output; +set address %B101010101111, +eval, +output; + +set load 1, +set address %B101010101101, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address %B101010101110, +set in %B1010101010101010, +tick, +output; +tock, +output; + +set load 0, +set address %B101010101000, +tick, +output; +tock, +output; +set address %B101010101001, +eval, +output; +set address %B101010101010, +eval, +output; +set address %B101010101011, +eval, +output; +set address %B101010101100, +eval, +output; +set address %B101010101101, +eval, +output; +set address %B101010101110, +eval, +output; +set address %B101010101111, +eval, +output; + +set load 1, +set address %B101010101110, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address %B101010101111, +set in %B1010101010101010, +tick, +output; +tock, +output; + +set load 0, +set address %B101010101000, +tick, +output; +tock, +output; +set address %B101010101001, +eval, +output; +set address %B101010101010, +eval, +output; +set address %B101010101011, +eval, +output; +set address %B101010101100, +eval, +output; +set address %B101010101101, +eval, +output; +set address %B101010101110, +eval, +output; +set address %B101010101111, +eval, +output; + +set load 1, +set address %B101010101111, +set in %B0101010101010101, +tick, +output, +tock, +output; + +set load 0, +set address %B101010101000, +tick, +output; +tock, +output; +set address %B101010101001, +eval, +output; +set address %B101010101010, +eval, +output; +set address %B101010101011, +eval, +output; +set address %B101010101100, +eval, +output; +set address %B101010101101, +eval, +output; +set address %B101010101110, +eval, +output; +set address %B101010101111, +eval, +output; + set load 0, -set address %B000101010101, tick, output; tock, output; -set address %B001101010101, eval, output; -set address %B010101010101, eval, output; -set address %B011101010101, eval, output; -set address %B100101010101, eval, output; -set address %B101101010101, eval, output; -set address %B110101010101, eval, output; -set address %B111101010101, eval, output; +set address %B000101010101, +tick, +output; +tock, +output; +set address %B001101010101, +eval, +output; +set address %B010101010101, +eval, +output; +set address %B011101010101, +eval, +output; +set address %B100101010101, +eval, +output; +set address %B101101010101, +eval, +output; +set address %B110101010101, +eval, +output; +set address %B111101010101, +eval, +output; set load 1, -set in %B0101010101010101, set address %B000101010101, tick, output; tock, output; -set address %B001101010101, tick, output, tock, output; -set address %B010101010101, tick, output, tock, output; -set address %B011101010101, tick, output, tock, output; -set address %B100101010101, tick, output, tock, output; -set address %B101101010101, tick, output, tock, output; -set address %B110101010101, tick, output, tock, output; -set address %B111101010101, tick, output, tock, output; +set in %B0101010101010101, +set address %B000101010101, +tick, +output; +tock, +output; +set address %B001101010101, +tick, +output, +tock, +output; +set address %B010101010101, +tick, +output, +tock, +output; +set address %B011101010101, +tick, +output, +tock, +output; +set address %B100101010101, +tick, +output, +tock, +output; +set address %B101101010101, +tick, +output, +tock, +output; +set address %B110101010101, +tick, +output, +tock, +output; +set address %B111101010101, +tick, +output, +tock, +output; set load 0, -set address %B000101010101, tick, output; tock, output; -set address %B001101010101, eval, output; -set address %B010101010101, eval, output; -set address %B011101010101, eval, output; -set address %B100101010101, eval, output; -set address %B101101010101, eval, output; -set address %B110101010101, eval, output; -set address %B111101010101, eval, output; +set address %B000101010101, +tick, +output; +tock, +output; +set address %B001101010101, +eval, +output; +set address %B010101010101, +eval, +output; +set address %B011101010101, +eval, +output; +set address %B100101010101, +eval, +output; +set address %B101101010101, +eval, +output; +set address %B110101010101, +eval, +output; +set address %B111101010101, +eval, +output; set load 1, -set address %B000101010101, set in %B1010101010101010, tick, output; tock, output; +set address %B000101010101, +set in %B1010101010101010, +tick, +output; +tock, +output; + set load 0, -set address %B000101010101, tick, output; tock, output; -set address %B001101010101, eval, output; -set address %B010101010101, eval, output; -set address %B011101010101, eval, output; -set address %B100101010101, eval, output; -set address %B101101010101, eval, output; -set address %B110101010101, eval, output; -set address %B111101010101, eval, output; +set address %B000101010101, +tick, +output; +tock, +output; +set address %B001101010101, +eval, +output; +set address %B010101010101, +eval, +output; +set address %B011101010101, +eval, +output; +set address %B100101010101, +eval, +output; +set address %B101101010101, +eval, +output; +set address %B110101010101, +eval, +output; +set address %B111101010101, +eval, +output; set load 1, -set address %B000101010101, set in %B0101010101010101, tick, output, tock, output; -set address %B001101010101, set in %B1010101010101010, tick, output; tock, output; +set address %B000101010101, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address %B001101010101, +set in %B1010101010101010, +tick, +output; +tock, +output; + set load 0, -set address %B000101010101, tick, output; tock, output; -set address %B001101010101, eval, output; -set address %B010101010101, eval, output; -set address %B011101010101, eval, output; -set address %B100101010101, eval, output; -set address %B101101010101, eval, output; -set address %B110101010101, eval, output; -set address %B111101010101, eval, output; +set address %B000101010101, +tick, +output; +tock, +output; +set address %B001101010101, +eval, +output; +set address %B010101010101, +eval, +output; +set address %B011101010101, +eval, +output; +set address %B100101010101, +eval, +output; +set address %B101101010101, +eval, +output; +set address %B110101010101, +eval, +output; +set address %B111101010101, +eval, +output; set load 1, -set address %B001101010101, set in %B0101010101010101, tick, output, tock, output; -set address %B010101010101, set in %B1010101010101010, tick, output; tock, output; +set address %B001101010101, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address %B010101010101, +set in %B1010101010101010, +tick, +output; +tock, +output; + set load 0, -set address %B000101010101, tick, output; tock, output; -set address %B001101010101, eval, output; -set address %B010101010101, eval, output; -set address %B011101010101, eval, output; -set address %B100101010101, eval, output; -set address %B101101010101, eval, output; -set address %B110101010101, eval, output; -set address %B111101010101, eval, output; +set address %B000101010101, +tick, +output; +tock, +output; +set address %B001101010101, +eval, +output; +set address %B010101010101, +eval, +output; +set address %B011101010101, +eval, +output; +set address %B100101010101, +eval, +output; +set address %B101101010101, +eval, +output; +set address %B110101010101, +eval, +output; +set address %B111101010101, +eval, +output; set load 1, -set address %B010101010101, set in %B0101010101010101, tick, output, tock, output; -set address %B011101010101, set in %B1010101010101010, tick, output; tock, output; +set address %B010101010101, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address %B011101010101, +set in %B1010101010101010, +tick, +output; +tock, +output; + set load 0, -set address %B000101010101, tick, output; tock, output; -set address %B001101010101, eval, output; -set address %B010101010101, eval, output; -set address %B011101010101, eval, output; -set address %B100101010101, eval, output; -set address %B101101010101, eval, output; -set address %B110101010101, eval, output; -set address %B111101010101, eval, output; +set address %B000101010101, +tick, +output; +tock, +output; +set address %B001101010101, +eval, +output; +set address %B010101010101, +eval, +output; +set address %B011101010101, +eval, +output; +set address %B100101010101, +eval, +output; +set address %B101101010101, +eval, +output; +set address %B110101010101, +eval, +output; +set address %B111101010101, +eval, +output; set load 1, -set address %B011101010101, set in %B0101010101010101, tick, output, tock, output; -set address %B100101010101, set in %B1010101010101010, tick, output; tock, output; +set address %B011101010101, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address %B100101010101, +set in %B1010101010101010, +tick, +output; +tock, +output; + set load 0, -set address %B000101010101, tick, output; tock, output; -set address %B001101010101, eval, output; -set address %B010101010101, eval, output; -set address %B011101010101, eval, output; -set address %B100101010101, eval, output; -set address %B101101010101, eval, output; -set address %B110101010101, eval, output; -set address %B111101010101, eval, output; +set address %B000101010101, +tick, +output; +tock, +output; +set address %B001101010101, +eval, +output; +set address %B010101010101, +eval, +output; +set address %B011101010101, +eval, +output; +set address %B100101010101, +eval, +output; +set address %B101101010101, +eval, +output; +set address %B110101010101, +eval, +output; +set address %B111101010101, +eval, +output; set load 1, -set address %B100101010101, set in %B0101010101010101, tick, output, tock, output; -set address %B101101010101, set in %B1010101010101010, tick, output; tock, output; +set address %B100101010101, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address %B101101010101, +set in %B1010101010101010, +tick, +output; +tock, +output; + set load 0, -set address %B000101010101, tick, output; tock, output; -set address %B001101010101, eval, output; -set address %B010101010101, eval, output; -set address %B011101010101, eval, output; -set address %B100101010101, eval, output; -set address %B101101010101, eval, output; -set address %B110101010101, eval, output; -set address %B111101010101, eval, output; +set address %B000101010101, +tick, +output; +tock, +output; +set address %B001101010101, +eval, +output; +set address %B010101010101, +eval, +output; +set address %B011101010101, +eval, +output; +set address %B100101010101, +eval, +output; +set address %B101101010101, +eval, +output; +set address %B110101010101, +eval, +output; +set address %B111101010101, +eval, +output; set load 1, -set address %B101101010101, set in %B0101010101010101, tick, output, tock, output; -set address %B110101010101, set in %B1010101010101010, tick, output; tock, output; +set address %B101101010101, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address %B110101010101, +set in %B1010101010101010, +tick, +output; +tock, +output; + set load 0, -set address %B000101010101, tick, output; tock, output; -set address %B001101010101, eval, output; -set address %B010101010101, eval, output; -set address %B011101010101, eval, output; -set address %B100101010101, eval, output; -set address %B101101010101, eval, output; -set address %B110101010101, eval, output; -set address %B111101010101, eval, output; +set address %B000101010101, +tick, +output; +tock, +output; +set address %B001101010101, +eval, +output; +set address %B010101010101, +eval, +output; +set address %B011101010101, +eval, +output; +set address %B100101010101, +eval, +output; +set address %B101101010101, +eval, +output; +set address %B110101010101, +eval, +output; +set address %B111101010101, +eval, +output; set load 1, -set address %B110101010101, set in %B0101010101010101, tick, output, tock, output; -set address %B111101010101, set in %B1010101010101010, tick, output; tock, output; +set address %B110101010101, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address %B111101010101, +set in %B1010101010101010, +tick, +output; +tock, +output; + set load 0, -set address %B000101010101, tick, output; tock, output; -set address %B001101010101, eval, output; -set address %B010101010101, eval, output; -set address %B011101010101, eval, output; -set address %B100101010101, eval, output; -set address %B101101010101, eval, output; -set address %B110101010101, eval, output; -set address %B111101010101, eval, output; +set address %B000101010101, +tick, +output; +tock, +output; +set address %B001101010101, +eval, +output; +set address %B010101010101, +eval, +output; +set address %B011101010101, +eval, +output; +set address %B100101010101, +eval, +output; +set address %B101101010101, +eval, +output; +set address %B110101010101, +eval, +output; +set address %B111101010101, +eval, +output; set load 1, -set address %B111101010101, set in %B0101010101010101, tick, output, tock, output; +set address %B111101010101, +set in %B0101010101010101, +tick, +output, +tock, +output; set load 0, -set address %B000101010101, tick, output; tock, output; -set address %B001101010101, eval, output; -set address %B010101010101, eval, output; -set address %B011101010101, eval, output; -set address %B100101010101, eval, output; -set address %B101101010101, eval, output; -set address %B110101010101, eval, output; -set address %B111101010101, eval, output;`; -export const cmp = `| time | in |load |address | out | -| 0+ | 0 | 0 | 0 | 0 | -| 1 | 0 | 0 | 0 | 0 | -| 1+ | 0 | 1 | 0 | 0 | -| 2 | 0 | 1 | 0 | 0 | -| 2+ | 1111 | 0 | 0 | 0 | -| 3 | 1111 | 0 | 0 | 0 | -| 3+ | 1111 | 1 | 1111 | 0 | -| 4 | 1111 | 1 | 1111 | 1111 | -| 4+ | 1111 | 0 | 0 | 0 | -| 5 | 1111 | 0 | 0 | 0 | -| 5+ | 3513 | 0 | 3513 | 0 | -| 6 | 3513 | 0 | 3513 | 0 | -| 6+ | 3513 | 1 | 3513 | 0 | -| 7 | 3513 | 1 | 3513 | 3513 | -| 7+ | 3513 | 0 | 3513 | 3513 | -| 8 | 3513 | 0 | 3513 | 3513 | -| 8 | 3513 | 0 | 1111 | 1111 | -| 8+ | 4095 | 0 | 1111 | 1111 | -| 9 | 4095 | 0 | 1111 | 1111 | -| 9+ | 4095 | 1 | 4095 | 0 | -| 10 | 4095 | 1 | 4095 | 4095 | -| 10+ | 4095 | 0 | 4095 | 4095 | -| 11 | 4095 | 0 | 4095 | 4095 | -| 11 | 4095 | 0 | 3513 | 3513 | -| 11 | 4095 | 0 | 4095 | 4095 | -| 11+ | 4095 | 0 | 2728 | 0 | -| 12 | 4095 | 0 | 2728 | 0 | -| 12 | 4095 | 0 | 2729 | 0 | -| 12 | 4095 | 0 | 2730 | 0 | -| 12 | 4095 | 0 | 2731 | 0 | -| 12 | 4095 | 0 | 2732 | 0 | -| 12 | 4095 | 0 | 2733 | 0 | -| 12 | 4095 | 0 | 2734 | 0 | -| 12 | 4095 | 0 | 2735 | 0 | -| 12+ | 21845 | 1 | 2728 | 0 | -| 13 | 21845 | 1 | 2728 | 21845 | -| 13+ | 21845 | 1 | 2729 | 0 | -| 14 | 21845 | 1 | 2729 | 21845 | -| 14+ | 21845 | 1 | 2730 | 0 | -| 15 | 21845 | 1 | 2730 | 21845 | -| 15+ | 21845 | 1 | 2731 | 0 | -| 16 | 21845 | 1 | 2731 | 21845 | -| 16+ | 21845 | 1 | 2732 | 0 | -| 17 | 21845 | 1 | 2732 | 21845 | -| 17+ | 21845 | 1 | 2733 | 0 | -| 18 | 21845 | 1 | 2733 | 21845 | -| 18+ | 21845 | 1 | 2734 | 0 | -| 19 | 21845 | 1 | 2734 | 21845 | -| 19+ | 21845 | 1 | 2735 | 0 | -| 20 | 21845 | 1 | 2735 | 21845 | -| 20+ | 21845 | 0 | 2728 | 21845 | -| 21 | 21845 | 0 | 2728 | 21845 | -| 21 | 21845 | 0 | 2729 | 21845 | -| 21 | 21845 | 0 | 2730 | 21845 | -| 21 | 21845 | 0 | 2731 | 21845 | -| 21 | 21845 | 0 | 2732 | 21845 | -| 21 | 21845 | 0 | 2733 | 21845 | -| 21 | 21845 | 0 | 2734 | 21845 | -| 21 | 21845 | 0 | 2735 | 21845 | -| 21+ | -21846 | 1 | 2728 | 21845 | -| 22 | -21846 | 1 | 2728 | -21846 | -| 22+ | -21846 | 0 | 2728 | -21846 | -| 23 | -21846 | 0 | 2728 | -21846 | -| 23 | -21846 | 0 | 2729 | 21845 | -| 23 | -21846 | 0 | 2730 | 21845 | -| 23 | -21846 | 0 | 2731 | 21845 | -| 23 | -21846 | 0 | 2732 | 21845 | -| 23 | -21846 | 0 | 2733 | 21845 | -| 23 | -21846 | 0 | 2734 | 21845 | -| 23 | -21846 | 0 | 2735 | 21845 | -| 23+ | 21845 | 1 | 2728 | -21846 | -| 24 | 21845 | 1 | 2728 | 21845 | -| 24+ | -21846 | 1 | 2729 | 21845 | -| 25 | -21846 | 1 | 2729 | -21846 | -| 25+ | -21846 | 0 | 2728 | 21845 | -| 26 | -21846 | 0 | 2728 | 21845 | -| 26 | -21846 | 0 | 2729 | -21846 | -| 26 | -21846 | 0 | 2730 | 21845 | -| 26 | -21846 | 0 | 2731 | 21845 | -| 26 | -21846 | 0 | 2732 | 21845 | -| 26 | -21846 | 0 | 2733 | 21845 | -| 26 | -21846 | 0 | 2734 | 21845 | -| 26 | -21846 | 0 | 2735 | 21845 | -| 26+ | 21845 | 1 | 2729 | -21846 | -| 27 | 21845 | 1 | 2729 | 21845 | -| 27+ | -21846 | 1 | 2730 | 21845 | -| 28 | -21846 | 1 | 2730 | -21846 | -| 28+ | -21846 | 0 | 2728 | 21845 | -| 29 | -21846 | 0 | 2728 | 21845 | -| 29 | -21846 | 0 | 2729 | 21845 | -| 29 | -21846 | 0 | 2730 | -21846 | -| 29 | -21846 | 0 | 2731 | 21845 | -| 29 | -21846 | 0 | 2732 | 21845 | -| 29 | -21846 | 0 | 2733 | 21845 | -| 29 | -21846 | 0 | 2734 | 21845 | -| 29 | -21846 | 0 | 2735 | 21845 | -| 29+ | 21845 | 1 | 2730 | -21846 | -| 30 | 21845 | 1 | 2730 | 21845 | -| 30+ | -21846 | 1 | 2731 | 21845 | -| 31 | -21846 | 1 | 2731 | -21846 | -| 31+ | -21846 | 0 | 2728 | 21845 | -| 32 | -21846 | 0 | 2728 | 21845 | -| 32 | -21846 | 0 | 2729 | 21845 | -| 32 | -21846 | 0 | 2730 | 21845 | -| 32 | -21846 | 0 | 2731 | -21846 | -| 32 | -21846 | 0 | 2732 | 21845 | -| 32 | -21846 | 0 | 2733 | 21845 | -| 32 | -21846 | 0 | 2734 | 21845 | -| 32 | -21846 | 0 | 2735 | 21845 | -| 32+ | 21845 | 1 | 2731 | -21846 | -| 33 | 21845 | 1 | 2731 | 21845 | -| 33+ | -21846 | 1 | 2732 | 21845 | -| 34 | -21846 | 1 | 2732 | -21846 | -| 34+ | -21846 | 0 | 2728 | 21845 | -| 35 | -21846 | 0 | 2728 | 21845 | -| 35 | -21846 | 0 | 2729 | 21845 | -| 35 | -21846 | 0 | 2730 | 21845 | -| 35 | -21846 | 0 | 2731 | 21845 | -| 35 | -21846 | 0 | 2732 | -21846 | -| 35 | -21846 | 0 | 2733 | 21845 | -| 35 | -21846 | 0 | 2734 | 21845 | -| 35 | -21846 | 0 | 2735 | 21845 | -| 35+ | 21845 | 1 | 2732 | -21846 | -| 36 | 21845 | 1 | 2732 | 21845 | -| 36+ | -21846 | 1 | 2733 | 21845 | -| 37 | -21846 | 1 | 2733 | -21846 | -| 37+ | -21846 | 0 | 2728 | 21845 | -| 38 | -21846 | 0 | 2728 | 21845 | -| 38 | -21846 | 0 | 2729 | 21845 | -| 38 | -21846 | 0 | 2730 | 21845 | -| 38 | -21846 | 0 | 2731 | 21845 | -| 38 | -21846 | 0 | 2732 | 21845 | -| 38 | -21846 | 0 | 2733 | -21846 | -| 38 | -21846 | 0 | 2734 | 21845 | -| 38 | -21846 | 0 | 2735 | 21845 | -| 38+ | 21845 | 1 | 2733 | -21846 | -| 39 | 21845 | 1 | 2733 | 21845 | -| 39+ | -21846 | 1 | 2734 | 21845 | -| 40 | -21846 | 1 | 2734 | -21846 | -| 40+ | -21846 | 0 | 2728 | 21845 | -| 41 | -21846 | 0 | 2728 | 21845 | -| 41 | -21846 | 0 | 2729 | 21845 | -| 41 | -21846 | 0 | 2730 | 21845 | -| 41 | -21846 | 0 | 2731 | 21845 | -| 41 | -21846 | 0 | 2732 | 21845 | -| 41 | -21846 | 0 | 2733 | 21845 | -| 41 | -21846 | 0 | 2734 | -21846 | -| 41 | -21846 | 0 | 2735 | 21845 | -| 41+ | 21845 | 1 | 2734 | -21846 | -| 42 | 21845 | 1 | 2734 | 21845 | -| 42+ | -21846 | 1 | 2735 | 21845 | -| 43 | -21846 | 1 | 2735 | -21846 | -| 43+ | -21846 | 0 | 2728 | 21845 | -| 44 | -21846 | 0 | 2728 | 21845 | -| 44 | -21846 | 0 | 2729 | 21845 | -| 44 | -21846 | 0 | 2730 | 21845 | -| 44 | -21846 | 0 | 2731 | 21845 | -| 44 | -21846 | 0 | 2732 | 21845 | -| 44 | -21846 | 0 | 2733 | 21845 | -| 44 | -21846 | 0 | 2734 | 21845 | -| 44 | -21846 | 0 | 2735 | -21846 | -| 44+ | 21845 | 1 | 2735 | -21846 | -| 45 | 21845 | 1 | 2735 | 21845 | -| 45+ | 21845 | 0 | 2728 | 21845 | -| 46 | 21845 | 0 | 2728 | 21845 | -| 46 | 21845 | 0 | 2729 | 21845 | -| 46 | 21845 | 0 | 2730 | 21845 | -| 46 | 21845 | 0 | 2731 | 21845 | -| 46 | 21845 | 0 | 2732 | 21845 | -| 46 | 21845 | 0 | 2733 | 21845 | -| 46 | 21845 | 0 | 2734 | 21845 | -| 46 | 21845 | 0 | 2735 | 21845 | -| 46+ | 21845 | 0 | 341 | 0 | -| 47 | 21845 | 0 | 341 | 0 | -| 47 | 21845 | 0 | 853 | 0 | -| 47 | 21845 | 0 | 1365 | 0 | -| 47 | 21845 | 0 | 1877 | 0 | -| 47 | 21845 | 0 | 2389 | 0 | -| 47 | 21845 | 0 | 2901 | 0 | -| 47 | 21845 | 0 | 3413 | 0 | -| 47 | 21845 | 0 | 3925 | 0 | -| 47+ | 21845 | 1 | 341 | 0 | -| 48 | 21845 | 1 | 341 | 21845 | -| 48+ | 21845 | 1 | 853 | 0 | -| 49 | 21845 | 1 | 853 | 21845 | -| 49+ | 21845 | 1 | 1365 | 0 | -| 50 | 21845 | 1 | 1365 | 21845 | -| 50+ | 21845 | 1 | 1877 | 0 | -| 51 | 21845 | 1 | 1877 | 21845 | -| 51+ | 21845 | 1 | 2389 | 0 | -| 52 | 21845 | 1 | 2389 | 21845 | -| 52+ | 21845 | 1 | 2901 | 0 | -| 53 | 21845 | 1 | 2901 | 21845 | -| 53+ | 21845 | 1 | 3413 | 0 | -| 54 | 21845 | 1 | 3413 | 21845 | -| 54+ | 21845 | 1 | 3925 | 0 | -| 55 | 21845 | 1 | 3925 | 21845 | -| 55+ | 21845 | 0 | 341 | 21845 | -| 56 | 21845 | 0 | 341 | 21845 | -| 56 | 21845 | 0 | 853 | 21845 | -| 56 | 21845 | 0 | 1365 | 21845 | -| 56 | 21845 | 0 | 1877 | 21845 | -| 56 | 21845 | 0 | 2389 | 21845 | -| 56 | 21845 | 0 | 2901 | 21845 | -| 56 | 21845 | 0 | 3413 | 21845 | -| 56 | 21845 | 0 | 3925 | 21845 | -| 56+ | -21846 | 1 | 341 | 21845 | -| 57 | -21846 | 1 | 341 | -21846 | -| 57+ | -21846 | 0 | 341 | -21846 | -| 58 | -21846 | 0 | 341 | -21846 | -| 58 | -21846 | 0 | 853 | 21845 | -| 58 | -21846 | 0 | 1365 | 21845 | -| 58 | -21846 | 0 | 1877 | 21845 | -| 58 | -21846 | 0 | 2389 | 21845 | -| 58 | -21846 | 0 | 2901 | 21845 | -| 58 | -21846 | 0 | 3413 | 21845 | -| 58 | -21846 | 0 | 3925 | 21845 | -| 58+ | 21845 | 1 | 341 | -21846 | -| 59 | 21845 | 1 | 341 | 21845 | -| 59+ | -21846 | 1 | 853 | 21845 | -| 60 | -21846 | 1 | 853 | -21846 | -| 60+ | -21846 | 0 | 341 | 21845 | -| 61 | -21846 | 0 | 341 | 21845 | -| 61 | -21846 | 0 | 853 | -21846 | -| 61 | -21846 | 0 | 1365 | 21845 | -| 61 | -21846 | 0 | 1877 | 21845 | -| 61 | -21846 | 0 | 2389 | 21845 | -| 61 | -21846 | 0 | 2901 | 21845 | -| 61 | -21846 | 0 | 3413 | 21845 | -| 61 | -21846 | 0 | 3925 | 21845 | -| 61+ | 21845 | 1 | 853 | -21846 | -| 62 | 21845 | 1 | 853 | 21845 | -| 62+ | -21846 | 1 | 1365 | 21845 | -| 63 | -21846 | 1 | 1365 | -21846 | -| 63+ | -21846 | 0 | 341 | 21845 | -| 64 | -21846 | 0 | 341 | 21845 | -| 64 | -21846 | 0 | 853 | 21845 | -| 64 | -21846 | 0 | 1365 | -21846 | -| 64 | -21846 | 0 | 1877 | 21845 | -| 64 | -21846 | 0 | 2389 | 21845 | -| 64 | -21846 | 0 | 2901 | 21845 | -| 64 | -21846 | 0 | 3413 | 21845 | -| 64 | -21846 | 0 | 3925 | 21845 | -| 64+ | 21845 | 1 | 1365 | -21846 | -| 65 | 21845 | 1 | 1365 | 21845 | -| 65+ | -21846 | 1 | 1877 | 21845 | -| 66 | -21846 | 1 | 1877 | -21846 | -| 66+ | -21846 | 0 | 341 | 21845 | -| 67 | -21846 | 0 | 341 | 21845 | -| 67 | -21846 | 0 | 853 | 21845 | -| 67 | -21846 | 0 | 1365 | 21845 | -| 67 | -21846 | 0 | 1877 | -21846 | -| 67 | -21846 | 0 | 2389 | 21845 | -| 67 | -21846 | 0 | 2901 | 21845 | -| 67 | -21846 | 0 | 3413 | 21845 | -| 67 | -21846 | 0 | 3925 | 21845 | -| 67+ | 21845 | 1 | 1877 | -21846 | -| 68 | 21845 | 1 | 1877 | 21845 | -| 68+ | -21846 | 1 | 2389 | 21845 | -| 69 | -21846 | 1 | 2389 | -21846 | -| 69+ | -21846 | 0 | 341 | 21845 | -| 70 | -21846 | 0 | 341 | 21845 | -| 70 | -21846 | 0 | 853 | 21845 | -| 70 | -21846 | 0 | 1365 | 21845 | -| 70 | -21846 | 0 | 1877 | 21845 | -| 70 | -21846 | 0 | 2389 | -21846 | -| 70 | -21846 | 0 | 2901 | 21845 | -| 70 | -21846 | 0 | 3413 | 21845 | -| 70 | -21846 | 0 | 3925 | 21845 | -| 70+ | 21845 | 1 | 2389 | -21846 | -| 71 | 21845 | 1 | 2389 | 21845 | -| 71+ | -21846 | 1 | 2901 | 21845 | -| 72 | -21846 | 1 | 2901 | -21846 | -| 72+ | -21846 | 0 | 341 | 21845 | -| 73 | -21846 | 0 | 341 | 21845 | -| 73 | -21846 | 0 | 853 | 21845 | -| 73 | -21846 | 0 | 1365 | 21845 | -| 73 | -21846 | 0 | 1877 | 21845 | -| 73 | -21846 | 0 | 2389 | 21845 | -| 73 | -21846 | 0 | 2901 | -21846 | -| 73 | -21846 | 0 | 3413 | 21845 | -| 73 | -21846 | 0 | 3925 | 21845 | -| 73+ | 21845 | 1 | 2901 | -21846 | -| 74 | 21845 | 1 | 2901 | 21845 | -| 74+ | -21846 | 1 | 3413 | 21845 | -| 75 | -21846 | 1 | 3413 | -21846 | -| 75+ | -21846 | 0 | 341 | 21845 | -| 76 | -21846 | 0 | 341 | 21845 | -| 76 | -21846 | 0 | 853 | 21845 | -| 76 | -21846 | 0 | 1365 | 21845 | -| 76 | -21846 | 0 | 1877 | 21845 | -| 76 | -21846 | 0 | 2389 | 21845 | -| 76 | -21846 | 0 | 2901 | 21845 | -| 76 | -21846 | 0 | 3413 | -21846 | -| 76 | -21846 | 0 | 3925 | 21845 | -| 76+ | 21845 | 1 | 3413 | -21846 | -| 77 | 21845 | 1 | 3413 | 21845 | -| 77+ | -21846 | 1 | 3925 | 21845 | -| 78 | -21846 | 1 | 3925 | -21846 | -| 78+ | -21846 | 0 | 341 | 21845 | -| 79 | -21846 | 0 | 341 | 21845 | -| 79 | -21846 | 0 | 853 | 21845 | -| 79 | -21846 | 0 | 1365 | 21845 | -| 79 | -21846 | 0 | 1877 | 21845 | -| 79 | -21846 | 0 | 2389 | 21845 | -| 79 | -21846 | 0 | 2901 | 21845 | -| 79 | -21846 | 0 | 3413 | 21845 | -| 79 | -21846 | 0 | 3925 | -21846 | -| 79+ | 21845 | 1 | 3925 | -21846 | -| 80 | 21845 | 1 | 3925 | 21845 | -| 80+ | 21845 | 0 | 341 | 21845 | -| 81 | 21845 | 0 | 341 | 21845 | -| 81 | 21845 | 0 | 853 | 21845 | -| 81 | 21845 | 0 | 1365 | 21845 | -| 81 | 21845 | 0 | 1877 | 21845 | -| 81 | 21845 | 0 | 2389 | 21845 | -| 81 | 21845 | 0 | 2901 | 21845 | -| 81 | 21845 | 0 | 3413 | 21845 | -| 81 | 21845 | 0 | 3925 | 21845 |`; +set address %B000101010101, +tick, +output; +tock, +output; +set address %B001101010101, +eval, +output; +set address %B010101010101, +eval, +output; +set address %B011101010101, +eval, +output; +set address %B100101010101, +eval, +output; +set address %B101101010101, +eval, +output; +set address %B110101010101, +eval, +output; +set address %B111101010101, +eval, +output;`; +export const cmp = `|time | in |load|address | out | +| 0+ | 0 | 0 | 0 | 0 | +| 1 | 0 | 0 | 0 | 0 | +| 1+ | 0 | 1 | 0 | 0 | +| 2 | 0 | 1 | 0 | 0 | +| 2+ | 1111 | 0 | 0 | 0 | +| 3 | 1111 | 0 | 0 | 0 | +| 3+ | 1111 | 1 | 1111 | 0 | +| 4 | 1111 | 1 | 1111 | 1111 | +| 4+ | 1111 | 0 | 0 | 0 | +| 5 | 1111 | 0 | 0 | 0 | +| 5+ | 3513 | 0 | 3513 | 0 | +| 6 | 3513 | 0 | 3513 | 0 | +| 6+ | 3513 | 1 | 3513 | 0 | +| 7 | 3513 | 1 | 3513 | 3513 | +| 7+ | 3513 | 0 | 3513 | 3513 | +| 8 | 3513 | 0 | 3513 | 3513 | +| 8 | 3513 | 0 | 1111 | 1111 | +| 8+ | 4095 | 0 | 1111 | 1111 | +| 9 | 4095 | 0 | 1111 | 1111 | +| 9+ | 4095 | 1 | 4095 | 0 | +| 10 | 4095 | 1 | 4095 | 4095 | +| 10+ | 4095 | 0 | 4095 | 4095 | +| 11 | 4095 | 0 | 4095 | 4095 | +| 11 | 4095 | 0 | 3513 | 3513 | +| 11 | 4095 | 0 | 4095 | 4095 | +| 11+ | 4095 | 0 | 2728 | 0 | +| 12 | 4095 | 0 | 2728 | 0 | +| 12 | 4095 | 0 | 2729 | 0 | +| 12 | 4095 | 0 | 2730 | 0 | +| 12 | 4095 | 0 | 2731 | 0 | +| 12 | 4095 | 0 | 2732 | 0 | +| 12 | 4095 | 0 | 2733 | 0 | +| 12 | 4095 | 0 | 2734 | 0 | +| 12 | 4095 | 0 | 2735 | 0 | +| 12+ | 21845 | 1 | 2728 | 0 | +| 13 | 21845 | 1 | 2728 | 21845 | +| 13+ | 21845 | 1 | 2729 | 0 | +| 14 | 21845 | 1 | 2729 | 21845 | +| 14+ | 21845 | 1 | 2730 | 0 | +| 15 | 21845 | 1 | 2730 | 21845 | +| 15+ | 21845 | 1 | 2731 | 0 | +| 16 | 21845 | 1 | 2731 | 21845 | +| 16+ | 21845 | 1 | 2732 | 0 | +| 17 | 21845 | 1 | 2732 | 21845 | +| 17+ | 21845 | 1 | 2733 | 0 | +| 18 | 21845 | 1 | 2733 | 21845 | +| 18+ | 21845 | 1 | 2734 | 0 | +| 19 | 21845 | 1 | 2734 | 21845 | +| 19+ | 21845 | 1 | 2735 | 0 | +| 20 | 21845 | 1 | 2735 | 21845 | +| 20+ | 21845 | 0 | 2728 | 21845 | +| 21 | 21845 | 0 | 2728 | 21845 | +| 21 | 21845 | 0 | 2729 | 21845 | +| 21 | 21845 | 0 | 2730 | 21845 | +| 21 | 21845 | 0 | 2731 | 21845 | +| 21 | 21845 | 0 | 2732 | 21845 | +| 21 | 21845 | 0 | 2733 | 21845 | +| 21 | 21845 | 0 | 2734 | 21845 | +| 21 | 21845 | 0 | 2735 | 21845 | +| 21+ | -21846 | 1 | 2728 | 21845 | +| 22 | -21846 | 1 | 2728 | -21846 | +| 22+ | -21846 | 0 | 2728 | -21846 | +| 23 | -21846 | 0 | 2728 | -21846 | +| 23 | -21846 | 0 | 2729 | 21845 | +| 23 | -21846 | 0 | 2730 | 21845 | +| 23 | -21846 | 0 | 2731 | 21845 | +| 23 | -21846 | 0 | 2732 | 21845 | +| 23 | -21846 | 0 | 2733 | 21845 | +| 23 | -21846 | 0 | 2734 | 21845 | +| 23 | -21846 | 0 | 2735 | 21845 | +| 23+ | 21845 | 1 | 2728 | -21846 | +| 24 | 21845 | 1 | 2728 | 21845 | +| 24+ | -21846 | 1 | 2729 | 21845 | +| 25 | -21846 | 1 | 2729 | -21846 | +| 25+ | -21846 | 0 | 2728 | 21845 | +| 26 | -21846 | 0 | 2728 | 21845 | +| 26 | -21846 | 0 | 2729 | -21846 | +| 26 | -21846 | 0 | 2730 | 21845 | +| 26 | -21846 | 0 | 2731 | 21845 | +| 26 | -21846 | 0 | 2732 | 21845 | +| 26 | -21846 | 0 | 2733 | 21845 | +| 26 | -21846 | 0 | 2734 | 21845 | +| 26 | -21846 | 0 | 2735 | 21845 | +| 26+ | 21845 | 1 | 2729 | -21846 | +| 27 | 21845 | 1 | 2729 | 21845 | +| 27+ | -21846 | 1 | 2730 | 21845 | +| 28 | -21846 | 1 | 2730 | -21846 | +| 28+ | -21846 | 0 | 2728 | 21845 | +| 29 | -21846 | 0 | 2728 | 21845 | +| 29 | -21846 | 0 | 2729 | 21845 | +| 29 | -21846 | 0 | 2730 | -21846 | +| 29 | -21846 | 0 | 2731 | 21845 | +| 29 | -21846 | 0 | 2732 | 21845 | +| 29 | -21846 | 0 | 2733 | 21845 | +| 29 | -21846 | 0 | 2734 | 21845 | +| 29 | -21846 | 0 | 2735 | 21845 | +| 29+ | 21845 | 1 | 2730 | -21846 | +| 30 | 21845 | 1 | 2730 | 21845 | +| 30+ | -21846 | 1 | 2731 | 21845 | +| 31 | -21846 | 1 | 2731 | -21846 | +| 31+ | -21846 | 0 | 2728 | 21845 | +| 32 | -21846 | 0 | 2728 | 21845 | +| 32 | -21846 | 0 | 2729 | 21845 | +| 32 | -21846 | 0 | 2730 | 21845 | +| 32 | -21846 | 0 | 2731 | -21846 | +| 32 | -21846 | 0 | 2732 | 21845 | +| 32 | -21846 | 0 | 2733 | 21845 | +| 32 | -21846 | 0 | 2734 | 21845 | +| 32 | -21846 | 0 | 2735 | 21845 | +| 32+ | 21845 | 1 | 2731 | -21846 | +| 33 | 21845 | 1 | 2731 | 21845 | +| 33+ | -21846 | 1 | 2732 | 21845 | +| 34 | -21846 | 1 | 2732 | -21846 | +| 34+ | -21846 | 0 | 2728 | 21845 | +| 35 | -21846 | 0 | 2728 | 21845 | +| 35 | -21846 | 0 | 2729 | 21845 | +| 35 | -21846 | 0 | 2730 | 21845 | +| 35 | -21846 | 0 | 2731 | 21845 | +| 35 | -21846 | 0 | 2732 | -21846 | +| 35 | -21846 | 0 | 2733 | 21845 | +| 35 | -21846 | 0 | 2734 | 21845 | +| 35 | -21846 | 0 | 2735 | 21845 | +| 35+ | 21845 | 1 | 2732 | -21846 | +| 36 | 21845 | 1 | 2732 | 21845 | +| 36+ | -21846 | 1 | 2733 | 21845 | +| 37 | -21846 | 1 | 2733 | -21846 | +| 37+ | -21846 | 0 | 2728 | 21845 | +| 38 | -21846 | 0 | 2728 | 21845 | +| 38 | -21846 | 0 | 2729 | 21845 | +| 38 | -21846 | 0 | 2730 | 21845 | +| 38 | -21846 | 0 | 2731 | 21845 | +| 38 | -21846 | 0 | 2732 | 21845 | +| 38 | -21846 | 0 | 2733 | -21846 | +| 38 | -21846 | 0 | 2734 | 21845 | +| 38 | -21846 | 0 | 2735 | 21845 | +| 38+ | 21845 | 1 | 2733 | -21846 | +| 39 | 21845 | 1 | 2733 | 21845 | +| 39+ | -21846 | 1 | 2734 | 21845 | +| 40 | -21846 | 1 | 2734 | -21846 | +| 40+ | -21846 | 0 | 2728 | 21845 | +| 41 | -21846 | 0 | 2728 | 21845 | +| 41 | -21846 | 0 | 2729 | 21845 | +| 41 | -21846 | 0 | 2730 | 21845 | +| 41 | -21846 | 0 | 2731 | 21845 | +| 41 | -21846 | 0 | 2732 | 21845 | +| 41 | -21846 | 0 | 2733 | 21845 | +| 41 | -21846 | 0 | 2734 | -21846 | +| 41 | -21846 | 0 | 2735 | 21845 | +| 41+ | 21845 | 1 | 2734 | -21846 | +| 42 | 21845 | 1 | 2734 | 21845 | +| 42+ | -21846 | 1 | 2735 | 21845 | +| 43 | -21846 | 1 | 2735 | -21846 | +| 43+ | -21846 | 0 | 2728 | 21845 | +| 44 | -21846 | 0 | 2728 | 21845 | +| 44 | -21846 | 0 | 2729 | 21845 | +| 44 | -21846 | 0 | 2730 | 21845 | +| 44 | -21846 | 0 | 2731 | 21845 | +| 44 | -21846 | 0 | 2732 | 21845 | +| 44 | -21846 | 0 | 2733 | 21845 | +| 44 | -21846 | 0 | 2734 | 21845 | +| 44 | -21846 | 0 | 2735 | -21846 | +| 44+ | 21845 | 1 | 2735 | -21846 | +| 45 | 21845 | 1 | 2735 | 21845 | +| 45+ | 21845 | 0 | 2728 | 21845 | +| 46 | 21845 | 0 | 2728 | 21845 | +| 46 | 21845 | 0 | 2729 | 21845 | +| 46 | 21845 | 0 | 2730 | 21845 | +| 46 | 21845 | 0 | 2731 | 21845 | +| 46 | 21845 | 0 | 2732 | 21845 | +| 46 | 21845 | 0 | 2733 | 21845 | +| 46 | 21845 | 0 | 2734 | 21845 | +| 46 | 21845 | 0 | 2735 | 21845 | +| 46+ | 21845 | 0 | 341 | 0 | +| 47 | 21845 | 0 | 341 | 0 | +| 47 | 21845 | 0 | 853 | 0 | +| 47 | 21845 | 0 | 1365 | 0 | +| 47 | 21845 | 0 | 1877 | 0 | +| 47 | 21845 | 0 | 2389 | 0 | +| 47 | 21845 | 0 | 2901 | 0 | +| 47 | 21845 | 0 | 3413 | 0 | +| 47 | 21845 | 0 | 3925 | 0 | +| 47+ | 21845 | 1 | 341 | 0 | +| 48 | 21845 | 1 | 341 | 21845 | +| 48+ | 21845 | 1 | 853 | 0 | +| 49 | 21845 | 1 | 853 | 21845 | +| 49+ | 21845 | 1 | 1365 | 0 | +| 50 | 21845 | 1 | 1365 | 21845 | +| 50+ | 21845 | 1 | 1877 | 0 | +| 51 | 21845 | 1 | 1877 | 21845 | +| 51+ | 21845 | 1 | 2389 | 0 | +| 52 | 21845 | 1 | 2389 | 21845 | +| 52+ | 21845 | 1 | 2901 | 0 | +| 53 | 21845 | 1 | 2901 | 21845 | +| 53+ | 21845 | 1 | 3413 | 0 | +| 54 | 21845 | 1 | 3413 | 21845 | +| 54+ | 21845 | 1 | 3925 | 0 | +| 55 | 21845 | 1 | 3925 | 21845 | +| 55+ | 21845 | 0 | 341 | 21845 | +| 56 | 21845 | 0 | 341 | 21845 | +| 56 | 21845 | 0 | 853 | 21845 | +| 56 | 21845 | 0 | 1365 | 21845 | +| 56 | 21845 | 0 | 1877 | 21845 | +| 56 | 21845 | 0 | 2389 | 21845 | +| 56 | 21845 | 0 | 2901 | 21845 | +| 56 | 21845 | 0 | 3413 | 21845 | +| 56 | 21845 | 0 | 3925 | 21845 | +| 56+ | -21846 | 1 | 341 | 21845 | +| 57 | -21846 | 1 | 341 | -21846 | +| 57+ | -21846 | 0 | 341 | -21846 | +| 58 | -21846 | 0 | 341 | -21846 | +| 58 | -21846 | 0 | 853 | 21845 | +| 58 | -21846 | 0 | 1365 | 21845 | +| 58 | -21846 | 0 | 1877 | 21845 | +| 58 | -21846 | 0 | 2389 | 21845 | +| 58 | -21846 | 0 | 2901 | 21845 | +| 58 | -21846 | 0 | 3413 | 21845 | +| 58 | -21846 | 0 | 3925 | 21845 | +| 58+ | 21845 | 1 | 341 | -21846 | +| 59 | 21845 | 1 | 341 | 21845 | +| 59+ | -21846 | 1 | 853 | 21845 | +| 60 | -21846 | 1 | 853 | -21846 | +| 60+ | -21846 | 0 | 341 | 21845 | +| 61 | -21846 | 0 | 341 | 21845 | +| 61 | -21846 | 0 | 853 | -21846 | +| 61 | -21846 | 0 | 1365 | 21845 | +| 61 | -21846 | 0 | 1877 | 21845 | +| 61 | -21846 | 0 | 2389 | 21845 | +| 61 | -21846 | 0 | 2901 | 21845 | +| 61 | -21846 | 0 | 3413 | 21845 | +| 61 | -21846 | 0 | 3925 | 21845 | +| 61+ | 21845 | 1 | 853 | -21846 | +| 62 | 21845 | 1 | 853 | 21845 | +| 62+ | -21846 | 1 | 1365 | 21845 | +| 63 | -21846 | 1 | 1365 | -21846 | +| 63+ | -21846 | 0 | 341 | 21845 | +| 64 | -21846 | 0 | 341 | 21845 | +| 64 | -21846 | 0 | 853 | 21845 | +| 64 | -21846 | 0 | 1365 | -21846 | +| 64 | -21846 | 0 | 1877 | 21845 | +| 64 | -21846 | 0 | 2389 | 21845 | +| 64 | -21846 | 0 | 2901 | 21845 | +| 64 | -21846 | 0 | 3413 | 21845 | +| 64 | -21846 | 0 | 3925 | 21845 | +| 64+ | 21845 | 1 | 1365 | -21846 | +| 65 | 21845 | 1 | 1365 | 21845 | +| 65+ | -21846 | 1 | 1877 | 21845 | +| 66 | -21846 | 1 | 1877 | -21846 | +| 66+ | -21846 | 0 | 341 | 21845 | +| 67 | -21846 | 0 | 341 | 21845 | +| 67 | -21846 | 0 | 853 | 21845 | +| 67 | -21846 | 0 | 1365 | 21845 | +| 67 | -21846 | 0 | 1877 | -21846 | +| 67 | -21846 | 0 | 2389 | 21845 | +| 67 | -21846 | 0 | 2901 | 21845 | +| 67 | -21846 | 0 | 3413 | 21845 | +| 67 | -21846 | 0 | 3925 | 21845 | +| 67+ | 21845 | 1 | 1877 | -21846 | +| 68 | 21845 | 1 | 1877 | 21845 | +| 68+ | -21846 | 1 | 2389 | 21845 | +| 69 | -21846 | 1 | 2389 | -21846 | +| 69+ | -21846 | 0 | 341 | 21845 | +| 70 | -21846 | 0 | 341 | 21845 | +| 70 | -21846 | 0 | 853 | 21845 | +| 70 | -21846 | 0 | 1365 | 21845 | +| 70 | -21846 | 0 | 1877 | 21845 | +| 70 | -21846 | 0 | 2389 | -21846 | +| 70 | -21846 | 0 | 2901 | 21845 | +| 70 | -21846 | 0 | 3413 | 21845 | +| 70 | -21846 | 0 | 3925 | 21845 | +| 70+ | 21845 | 1 | 2389 | -21846 | +| 71 | 21845 | 1 | 2389 | 21845 | +| 71+ | -21846 | 1 | 2901 | 21845 | +| 72 | -21846 | 1 | 2901 | -21846 | +| 72+ | -21846 | 0 | 341 | 21845 | +| 73 | -21846 | 0 | 341 | 21845 | +| 73 | -21846 | 0 | 853 | 21845 | +| 73 | -21846 | 0 | 1365 | 21845 | +| 73 | -21846 | 0 | 1877 | 21845 | +| 73 | -21846 | 0 | 2389 | 21845 | +| 73 | -21846 | 0 | 2901 | -21846 | +| 73 | -21846 | 0 | 3413 | 21845 | +| 73 | -21846 | 0 | 3925 | 21845 | +| 73+ | 21845 | 1 | 2901 | -21846 | +| 74 | 21845 | 1 | 2901 | 21845 | +| 74+ | -21846 | 1 | 3413 | 21845 | +| 75 | -21846 | 1 | 3413 | -21846 | +| 75+ | -21846 | 0 | 341 | 21845 | +| 76 | -21846 | 0 | 341 | 21845 | +| 76 | -21846 | 0 | 853 | 21845 | +| 76 | -21846 | 0 | 1365 | 21845 | +| 76 | -21846 | 0 | 1877 | 21845 | +| 76 | -21846 | 0 | 2389 | 21845 | +| 76 | -21846 | 0 | 2901 | 21845 | +| 76 | -21846 | 0 | 3413 | -21846 | +| 76 | -21846 | 0 | 3925 | 21845 | +| 76+ | 21845 | 1 | 3413 | -21846 | +| 77 | 21845 | 1 | 3413 | 21845 | +| 77+ | -21846 | 1 | 3925 | 21845 | +| 78 | -21846 | 1 | 3925 | -21846 | +| 78+ | -21846 | 0 | 341 | 21845 | +| 79 | -21846 | 0 | 341 | 21845 | +| 79 | -21846 | 0 | 853 | 21845 | +| 79 | -21846 | 0 | 1365 | 21845 | +| 79 | -21846 | 0 | 1877 | 21845 | +| 79 | -21846 | 0 | 2389 | 21845 | +| 79 | -21846 | 0 | 2901 | 21845 | +| 79 | -21846 | 0 | 3413 | 21845 | +| 79 | -21846 | 0 | 3925 | -21846 | +| 79+ | 21845 | 1 | 3925 | -21846 | +| 80 | 21845 | 1 | 3925 | 21845 | +| 80+ | 21845 | 0 | 341 | 21845 | +| 81 | 21845 | 0 | 341 | 21845 | +| 81 | 21845 | 0 | 853 | 21845 | +| 81 | 21845 | 0 | 1365 | 21845 | +| 81 | 21845 | 0 | 1877 | 21845 | +| 81 | 21845 | 0 | 2389 | 21845 | +| 81 | 21845 | 0 | 2901 | 21845 | +| 81 | 21845 | 0 | 3413 | 21845 | +| 81 | 21845 | 0 | 3925 | 21845 |`; diff --git a/projects/src/project_03/08_ram16k.ts b/projects/src/project_03/08_ram16k.ts index d956477bd..e0afbfac0 100644 --- a/projects/src/project_03/08_ram16k.ts +++ b/projects/src/project_03/08_ram16k.ts @@ -1,7 +1,7 @@ export const hdl = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/03/b/RAM16K.hdl +// File name: projects/3/b/RAM16K.hdl /** * Memory of 16K 16-bit registers. * If load is asserted, the value of the register selected by @@ -15,642 +15,1346 @@ CHIP RAM16K { PARTS: //// Replace this comment with your code. }`; -export const tst = `output-list time%S1.4.1 in%D1.6.1 load%B2.1.2 address%D2.5.2 out%D1.6.1; - -set in 0, set load 0, set address 0, tick, output; tock, output; -set load 1, tick, output; tock, output; - -set in 4321, set load 0, tick, output; tock, output; -set load 1, set address 4321, tick, output; tock, output; -set load 0, set address 0, tick, output; tock, output; - -set in 12345, set address 12345, tick, output; tock, output; -set load 1, tick, output; tock, output; -set load 0, tick, output; tock, output; -set address 4321, eval, output; - -set in 16383, tick, output; tock, output; -set load 1, set address 16383, tick, output; tock, output; -set load 0, tick, output; tock, output; -set address 12345, eval, output; -set address 16383, eval, output; - -set load 0, set address %B10101010101000, tick, output; -tock, output; -set address %B10101010101001, eval, output; -set address %B10101010101010, eval, output; -set address %B10101010101011, eval, output; -set address %B10101010101100, eval, output; -set address %B10101010101101, eval, output; -set address %B10101010101110, eval, output; -set address %B10101010101111, eval, output; - -set load 1, set in %B0101010101010101, set address %B10101010101000, tick, output; -tock, output; -set address %B10101010101001, tick, output, tock, output; -set address %B10101010101010, tick, output, tock, output; -set address %B10101010101011, tick, output, tock, output; -set address %B10101010101100, tick, output, tock, output; -set address %B10101010101101, tick, output, tock, output; -set address %B10101010101110, tick, output, tock, output; -set address %B10101010101111, tick, output, tock, output; - -set load 0, set address %B10101010101000, tick, output; -tock, output; -set address %B10101010101001, eval, output; -set address %B10101010101010, eval, output; -set address %B10101010101011, eval, output; -set address %B10101010101100, eval, output; -set address %B10101010101101, eval, output; -set address %B10101010101110, eval, output; -set address %B10101010101111, eval, output; - -set load 1, set address %B10101010101000, set in %B1010101010101010, tick, output; -tock, output; - -set load 0, set address %B10101010101000, tick, output; -tock, output; -set address %B10101010101001, eval, output; -set address %B10101010101010, eval, output; -set address %B10101010101011, eval, output; -set address %B10101010101100, eval, output; -set address %B10101010101101, eval, output; -set address %B10101010101110, eval, output; -set address %B10101010101111, eval, output; - -set load 1, set address %B10101010101000, set in %B0101010101010101, tick, output, tock, output; -set address %B10101010101001, set in %B1010101010101010, tick, output; -tock, output; - -set load 0, set address %B10101010101000, tick, output; -tock, output; -set address %B10101010101001, eval, output; -set address %B10101010101010, eval, output; -set address %B10101010101011, eval, output; -set address %B10101010101100, eval, output; -set address %B10101010101101, eval, output; -set address %B10101010101110, eval, output; -set address %B10101010101111, eval, output; - -set load 1, set address %B10101010101001, set in %B0101010101010101, tick, output, tock, output; -set address %B10101010101010, set in %B1010101010101010, tick, output; -tock, output; - -set load 0, set address %B10101010101000, tick, output; tock, output; -set address %B10101010101001, eval, output; -set address %B10101010101010, eval, output; -set address %B10101010101011, eval, output; -set address %B10101010101100, eval, output; -set address %B10101010101101, eval, output; -set address %B10101010101110, eval, output; -set address %B10101010101111, eval, output; - -set load 1; -set address %B10101010101010, set in %B0101010101010101, tick, output, tock, output; -set address %B10101010101011, set in %B1010101010101010, tick, output; tock, output; - -set load 0, set address %B10101010101000, tick, output; tock, output; -set address %B10101010101001, eval, output; -set address %B10101010101010, eval, output; -set address %B10101010101011, eval, output; -set address %B10101010101100, eval, output; -set address %B10101010101101, eval, output; -set address %B10101010101110, eval, output; -set address %B10101010101111, eval, output; +export const tst = `// This file is part of www.nand2tetris.org +// and the book "The Elements of Computing Systems" +// by Nisan and Schocken, MIT Press. +// File name: projects/3/b/RAM16K.tst + +output-list time%S1.3.1 in%D1.6.1 load%B2.1.1 address%D2.5.2 out%D1.6.1; + +set in 0, +set load 0, +set address 0, +tick, +output; +tock, +output; + +set load 1, +tick, +output; +tock, +output; + +set in 4321, +set load 0, +tick, +output; +tock, +output; + +set load 1, +set address 4321, +tick, +output; +tock, +output; + +set load 0, +set address 0, +tick, +output; +tock, +output; + +set in 12345, +set address 12345, +tick, +output; +tock, +output; + +set load 1, +tick, +output; +tock, +output; + +set load 0, +tick, +output; +tock, +output; + +set address 4321, +eval, +output; + +set in 16383, +tick, +output; +tock, +output; + +set load 1, +set address 16383, +tick, +output; +tock, +output; + +set load 0, +tick, +output; +tock, +output; + +set address 12345, +eval, +output; + +set address 16383, +eval, +output; + + +set load 0, +set address %B10101010101000, +tick, +output; +tock, +output; +set address %B10101010101001, +eval, +output; +set address %B10101010101010, +eval, +output; +set address %B10101010101011, +eval, +output; +set address %B10101010101100, +eval, +output; +set address %B10101010101101, +eval, +output; +set address %B10101010101110, +eval, +output; +set address %B10101010101111, +eval, +output; + +set load 1, +set in %B0101010101010101, +set address %B10101010101000, +tick, +output; +tock, +output; +set address %B10101010101001, +tick, +output, +tock, +output; +set address %B10101010101010, +tick, +output, +tock, +output; +set address %B10101010101011, +tick, +output, +tock, +output; +set address %B10101010101100, +tick, +output, +tock, +output; +set address %B10101010101101, +tick, +output, +tock, +output; +set address %B10101010101110, +tick, +output, +tock, +output; +set address %B10101010101111, +tick, +output, +tock, +output; + +set load 0, +set address %B10101010101000, +tick, +output; +tock, +output; +set address %B10101010101001, +eval, +output; +set address %B10101010101010, +eval, +output; +set address %B10101010101011, +eval, +output; +set address %B10101010101100, +eval, +output; +set address %B10101010101101, +eval, +output; +set address %B10101010101110, +eval, +output; +set address %B10101010101111, +eval, +output; + +set load 1, +set address %B10101010101000, +set in %B1010101010101010, +tick, +output; +tock, +output; + +set load 0, +set address %B10101010101000, +tick, +output; +tock, +output; +set address %B10101010101001, +eval, +output; +set address %B10101010101010, +eval, +output; +set address %B10101010101011, +eval, +output; +set address %B10101010101100, +eval, +output; +set address %B10101010101101, +eval, +output; +set address %B10101010101110, +eval, +output; +set address %B10101010101111, +eval, +output; + +set load 1, +set address %B10101010101000, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address %B10101010101001, +set in %B1010101010101010, +tick, +output; +tock, +output; + +set load 0, +set address %B10101010101000, +tick, +output; +tock, +output; +set address %B10101010101001, +eval, +output; +set address %B10101010101010, +eval, +output; +set address %B10101010101011, +eval, +output; +set address %B10101010101100, +eval, +output; +set address %B10101010101101, +eval, +output; +set address %B10101010101110, +eval, +output; +set address %B10101010101111, +eval, +output; + +set load 1, +set address %B10101010101001, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address %B10101010101010, +set in %B1010101010101010, +tick, +output; +tock, +output; + +set load 0, +set address %B10101010101000, +tick, +output; +tock, +output; +set address %B10101010101001, +eval, +output; +set address %B10101010101010, +eval, +output; +set address %B10101010101011, +eval, +output; +set address %B10101010101100, +eval, +output; +set address %B10101010101101, +eval, +output; +set address %B10101010101110, +eval, +output; +set address %B10101010101111, +eval, +output; + +set load 1, +set address %B10101010101010, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address %B10101010101011, +set in %B1010101010101010, +tick, +output; +tock, +output; + +set load 0, +set address %B10101010101000, +tick, +output; +tock, +output; +set address %B10101010101001, +eval, +output; +set address %B10101010101010, +eval, +output; +set address %B10101010101011, +eval, +output; +set address %B10101010101100, +eval, +output; +set address %B10101010101101, +eval, +output; +set address %B10101010101110, +eval, +output; +set address %B10101010101111, +eval, +output; set load 1, -set address %B10101010101011, set in %B0101010101010101, tick, output, tock, output; -set address %B10101010101100, set in %B1010101010101010, tick, output; tock, output; +set address %B10101010101011, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address %B10101010101100, +set in %B1010101010101010, +tick, +output; +tock, +output; set load 0, -set address %B10101010101000, tick, output; tock, output; -set address %B10101010101001, eval, output; -set address %B10101010101010, eval, output; -set address %B10101010101011, eval, output; -set address %B10101010101100, eval, output; -set address %B10101010101101, eval, output; -set address %B10101010101110, eval, output; -set address %B10101010101111, eval, output; +set address %B10101010101000, +tick, +output; +tock, +output; +set address %B10101010101001, +eval, +output; +set address %B10101010101010, +eval, +output; +set address %B10101010101011, +eval, +output; +set address %B10101010101100, +eval, +output; +set address %B10101010101101, +eval, +output; +set address %B10101010101110, +eval, +output; +set address %B10101010101111, +eval, +output; set load 1, -set address %B10101010101100, set in %B0101010101010101, tick, output, tock, output; -set address %B10101010101101, set in %B1010101010101010, tick, output; tock, output; +set address %B10101010101100, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address %B10101010101101, +set in %B1010101010101010, +tick, +output; +tock, +output; + set load 0, -set address %B10101010101000, tick, output; tock, output; -set address %B10101010101001, eval, output; -set address %B10101010101010, eval, output; -set address %B10101010101011, eval, output; -set address %B10101010101100, eval, output; -set address %B10101010101101, eval, output; -set address %B10101010101110, eval, output; -set address %B10101010101111, eval, output; +set address %B10101010101000, +tick, +output; +tock, +output; +set address %B10101010101001, +eval, +output; +set address %B10101010101010, +eval, +output; +set address %B10101010101011, +eval, +output; +set address %B10101010101100, +eval, +output; +set address %B10101010101101, +eval, +output; +set address %B10101010101110, +eval, +output; +set address %B10101010101111, +eval, +output; set load 1, -set address %B10101010101101, set in %B0101010101010101, tick, output, tock, output; -set address %B10101010101110, set in %B1010101010101010, tick, output; tock, output; +set address %B10101010101101, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address %B10101010101110, +set in %B1010101010101010, +tick, +output; +tock, +output; + set load 0, -set address %B10101010101000, tick, output; tock, output; -set address %B10101010101001, eval, output; -set address %B10101010101010, eval, output; -set address %B10101010101011, eval, output; -set address %B10101010101100, eval, output; -set address %B10101010101101, eval, output; -set address %B10101010101110, eval, output; -set address %B10101010101111, eval, output; +set address %B10101010101000, +tick, +output; +tock, +output; +set address %B10101010101001, +eval, +output; +set address %B10101010101010, +eval, +output; +set address %B10101010101011, +eval, +output; +set address %B10101010101100, +eval, +output; +set address %B10101010101101, +eval, +output; +set address %B10101010101110, +eval, +output; +set address %B10101010101111, +eval, +output; set load 1, -set address %B10101010101110, set in %B0101010101010101, tick, output, tock, output; -set address %B10101010101111, set in %B1010101010101010, tick, output; tock, output; +set address %B10101010101110, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address %B10101010101111, +set in %B1010101010101010, +tick, +output; +tock, +output; set load 0, -set address %B10101010101000, tick, output; tock, output; -set address %B10101010101001, eval, output; -set address %B10101010101010, eval, output; -set address %B10101010101011, eval, output; -set address %B10101010101100, eval, output; -set address %B10101010101101, eval, output; -set address %B10101010101110, eval, output; -set address %B10101010101111, eval, output; +set address %B10101010101000, +tick, +output; +tock, +output; +set address %B10101010101001, +eval, +output; +set address %B10101010101010, +eval, +output; +set address %B10101010101011, +eval, +output; +set address %B10101010101100, +eval, +output; +set address %B10101010101101, +eval, +output; +set address %B10101010101110, +eval, +output; +set address %B10101010101111, +eval, +output; set load 1, -set address %B10101010101111, set in %B0101010101010101, tick, output, tock, output; +set address %B10101010101111, +set in %B0101010101010101, +tick, +output, +tock, +output; + set load 0, -set address %B10101010101000, tick, output; tock, output; -set address %B10101010101001, eval, output; -set address %B10101010101010, eval, output; -set address %B10101010101011, eval, output; -set address %B10101010101100, eval, output; -set address %B10101010101101, eval, output; -set address %B10101010101110, eval, output; -set address %B10101010101111, eval, output; +set address %B10101010101000, +tick, +output; +tock, +output; +set address %B10101010101001, +eval, +output; +set address %B10101010101010, +eval, +output; +set address %B10101010101011, +eval, +output; +set address %B10101010101100, +eval, +output; +set address %B10101010101101, +eval, +output; +set address %B10101010101110, +eval, +output; +set address %B10101010101111, +eval, +output; + set load 0, -set address %B00010101010101, tick, output; tock, output; -set address %B00110101010101, eval, output; -set address %B01010101010101, eval, output; -set address %B01110101010101, eval, output; -set address %B10010101010101, eval, output; -set address %B10110101010101, eval, output; -set address %B11010101010101, eval, output; -set address %B11110101010101, eval, output; +set address %B00010101010101, +tick, +output; +tock, +output; +set address %B00110101010101, +eval, +output; +set address %B01010101010101, +eval, +output; +set address %B01110101010101, +eval, +output; +set address %B10010101010101, +eval, +output; +set address %B10110101010101, +eval, +output; +set address %B11010101010101, +eval, +output; +set address %B11110101010101, +eval, +output; set load 1, -set in %B0101010101010101, set address %B00010101010101, tick, output; tock, output; -set address %B00110101010101, tick, output, tock, output; -set address %B01010101010101, tick, output, tock, output; -set address %B01110101010101, tick, output, tock, output; -set address %B10010101010101, tick, output, tock, output; -set address %B10110101010101, tick, output, tock, output; -set address %B11010101010101, tick, output, tock, output; -set address %B11110101010101, tick, output, tock, output; +set in %B0101010101010101, +set address %B00010101010101, +tick, +output; +tock, +output; +set address %B00110101010101, +tick, +output, +tock, +output; +set address %B01010101010101, +tick, +output, +tock, +output; +set address %B01110101010101, +tick, +output, +tock, +output; +set address %B10010101010101, +tick, +output, +tock, +output; +set address %B10110101010101, +tick, +output, +tock, +output; +set address %B11010101010101, +tick, +output, +tock, +output; +set address %B11110101010101, +tick, +output, +tock, +output; set load 0, -set address %B00010101010101, tick, output; tock, output; -set address %B00110101010101, eval, output; -set address %B01010101010101, eval, output; -set address %B01110101010101, eval, output; -set address %B10010101010101, eval, output; -set address %B10110101010101, eval, output; -set address %B11010101010101, eval, output; -set address %B11110101010101, eval, output; +set address %B00010101010101, +tick, +output; +tock, +output; +set address %B00110101010101, +eval, +output; +set address %B01010101010101, +eval, +output; +set address %B01110101010101, +eval, +output; +set address %B10010101010101, +eval, +output; +set address %B10110101010101, +eval, +output; +set address %B11010101010101, +eval, +output; +set address %B11110101010101, +eval, +output; set load 1, -set address %B00010101010101, set in %B1010101010101010, tick, output; tock, output; +set address %B00010101010101, +set in %B1010101010101010, +tick, +output; +tock, +output; + set load 0, -set address %B00010101010101, tick, output; tock, output; -set address %B00110101010101, eval, output; -set address %B01010101010101, eval, output; -set address %B01110101010101, eval, output; -set address %B10010101010101, eval, output; -set address %B10110101010101, eval, output; -set address %B11010101010101, eval, output; -set address %B11110101010101, eval, output; +set address %B00010101010101, +tick, +output; +tock, +output; +set address %B00110101010101, +eval, +output; +set address %B01010101010101, +eval, +output; +set address %B01110101010101, +eval, +output; +set address %B10010101010101, +eval, +output; +set address %B10110101010101, +eval, +output; +set address %B11010101010101, +eval, +output; +set address %B11110101010101, +eval, +output; set load 1, -set address %B00010101010101, set in %B0101010101010101, tick, output, tock, output; -set address %B00110101010101, set in %B1010101010101010, tick, output; tock, output; +set address %B00010101010101, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address %B00110101010101, +set in %B1010101010101010, +tick, +output; +tock, +output; set load 0, -set address %B00010101010101, tick, output; tock, output; -set address %B00110101010101, eval, output; -set address %B01010101010101, eval, output; -set address %B01110101010101, eval, output; -set address %B10010101010101, eval, output; -set address %B10110101010101, eval, output; -set address %B11010101010101, eval, output; -set address %B11110101010101, eval, output; +set address %B00010101010101, +tick, +output; +tock, +output; +set address %B00110101010101, +eval, +output; +set address %B01010101010101, +eval, +output; +set address %B01110101010101, +eval, +output; +set address %B10010101010101, +eval, +output; +set address %B10110101010101, +eval, +output; +set address %B11010101010101, +eval, +output; +set address %B11110101010101, +eval, +output; set load 1, -set address %B00110101010101, set in %B0101010101010101, tick, output, tock, output; -set address %B01010101010101, set in %B1010101010101010, tick, output; tock, output; +set address %B00110101010101, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address %B01010101010101, +set in %B1010101010101010, +tick, +output; +tock, +output; set load 0, -set address %B00010101010101, tick, output; tock, output; -set address %B00110101010101, eval, output; -set address %B01010101010101, eval, output; -set address %B01110101010101, eval, output; -set address %B10010101010101, eval, output; -set address %B10110101010101, eval, output; -set address %B11010101010101, eval, output; -set address %B11110101010101, eval, output; +set address %B00010101010101, +tick, +output; +tock, +output; +set address %B00110101010101, +eval, +output; +set address %B01010101010101, +eval, +output; +set address %B01110101010101, +eval, +output; +set address %B10010101010101, +eval, +output; +set address %B10110101010101, +eval, +output; +set address %B11010101010101, +eval, +output; +set address %B11110101010101, +eval, +output; set load 1, -set address %B01010101010101, set in %B0101010101010101, tick, output, tock, output; -set address %B01110101010101, set in %B1010101010101010, tick, output; tock, output; +set address %B01010101010101, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address %B01110101010101, +set in %B1010101010101010, +tick, +output; +tock, +output; set load 0, -set address %B00010101010101, tick, output; tock, output; -set address %B00110101010101, eval, output; -set address %B01010101010101, eval, output; -set address %B01110101010101, eval, output; -set address %B10010101010101, eval, output; -set address %B10110101010101, eval, output; -set address %B11010101010101, eval, output; -set address %B11110101010101, eval, output; +set address %B00010101010101, +tick, +output; +tock, +output; +set address %B00110101010101, +eval, +output; +set address %B01010101010101, +eval, +output; +set address %B01110101010101, +eval, +output; +set address %B10010101010101, +eval, +output; +set address %B10110101010101, +eval, +output; +set address %B11010101010101, +eval, +output; +set address %B11110101010101, +eval, +output; set load 1, -set address %B01110101010101, set in %B0101010101010101, tick, output, tock, output; -set address %B10010101010101, set in %B1010101010101010, tick, output; tock, output; +set address %B01110101010101, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address %B10010101010101, +set in %B1010101010101010, +tick, +output; +tock, +output; set load 0, -set address %B00010101010101, tick, output; tock, output; -set address %B00110101010101, eval, output; -set address %B01010101010101, eval, output; -set address %B01110101010101, eval, output; -set address %B10010101010101, eval, output; -set address %B10110101010101, eval, output; -set address %B11010101010101, eval, output; -set address %B11110101010101, eval, output; +set address %B00010101010101, +tick, +output; +tock, +output; +set address %B00110101010101, +eval, +output; +set address %B01010101010101, +eval, +output; +set address %B01110101010101, +eval, +output; +set address %B10010101010101, +eval, +output; +set address %B10110101010101, +eval, +output; +set address %B11010101010101, +eval, +output; +set address %B11110101010101, +eval, +output; set load 1, -set address %B10010101010101, set in %B0101010101010101, tick, output, tock, output; -set address %B10110101010101, set in %B1010101010101010, tick, output; tock, output; +set address %B10010101010101, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address %B10110101010101, +set in %B1010101010101010, +tick, +output; +tock, +output; set load 0, -set address %B00010101010101, tick, output; tock, output; -set address %B00110101010101, eval, output; -set address %B01010101010101, eval, output; -set address %B01110101010101, eval, output; -set address %B10010101010101, eval, output; -set address %B10110101010101, eval, output; -set address %B11010101010101, eval, output; -set address %B11110101010101, eval, output; +set address %B00010101010101, +tick, +output; +tock, +output; +set address %B00110101010101, +eval, +output; +set address %B01010101010101, +eval, +output; +set address %B01110101010101, +eval, +output; +set address %B10010101010101, +eval, +output; +set address %B10110101010101, +eval, +output; +set address %B11010101010101, +eval, +output; +set address %B11110101010101, +eval, +output; set load 1, -set address %B10110101010101, set in %B0101010101010101, tick, output, tock, output; -set address %B11010101010101, set in %B1010101010101010, tick, output; tock, output; +set address %B10110101010101, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address %B11010101010101, +set in %B1010101010101010, +tick, +output; +tock, +output; set load 0, -set address %B00010101010101, tick, output; tock, output; -set address %B00110101010101, eval, output; -set address %B01010101010101, eval, output; -set address %B01110101010101, eval, output; -set address %B10010101010101, eval, output; -set address %B10110101010101, eval, output; -set address %B11010101010101, eval, output; -set address %B11110101010101, eval, output; +set address %B00010101010101, +tick, +output; +tock, +output; +set address %B00110101010101, +eval, +output; +set address %B01010101010101, +eval, +output; +set address %B01110101010101, +eval, +output; +set address %B10010101010101, +eval, +output; +set address %B10110101010101, +eval, +output; +set address %B11010101010101, +eval, +output; +set address %B11110101010101, +eval, +output; set load 1, -set address %B11010101010101, set in %B0101010101010101, tick, output, tock, output; -set address %B11110101010101, set in %B1010101010101010, tick, output; tock, output; +set address %B11010101010101, +set in %B0101010101010101, +tick, +output, +tock, +output; +set address %B11110101010101, +set in %B1010101010101010, +tick, +output; +tock, +output; + set load 0, -set address %B00010101010101, tick, output; tock, output; -set address %B00110101010101, eval, output; -set address %B01010101010101, eval, output; -set address %B01110101010101, eval, output; -set address %B10010101010101, eval, output; -set address %B10110101010101, eval, output; -set address %B11010101010101, eval, output; -set address %B11110101010101, eval, output; +set address %B00010101010101, +tick, +output; +tock, +output; +set address %B00110101010101, +eval, +output; +set address %B01010101010101, +eval, +output; +set address %B01110101010101, +eval, +output; +set address %B10010101010101, +eval, +output; +set address %B10110101010101, +eval, +output; +set address %B11010101010101, +eval, +output; +set address %B11110101010101, +eval, +output; set load 1, -set address %B11110101010101, set in %B0101010101010101, tick, output, tock, output; +set address %B11110101010101, +set in %B0101010101010101, +tick, +output, +tock, +output; + set load 0, -set address %B00010101010101, tick, output; tock, output; -set address %B00110101010101, eval, output; -set address %B01010101010101, eval, output; -set address %B01110101010101, eval, output; -set address %B10010101010101, eval, output; -set address %B10110101010101, eval, output; -set address %B11010101010101, eval, output; -set address %B11110101010101, eval, output;`; -export const cmp = `| time | in |load | address | out | -| 0+ | 0 | 0 | 0 | 0 | -| 1 | 0 | 0 | 0 | 0 | -| 1+ | 0 | 1 | 0 | 0 | -| 2 | 0 | 1 | 0 | 0 | -| 2+ | 4321 | 0 | 0 | 0 | -| 3 | 4321 | 0 | 0 | 0 | -| 3+ | 4321 | 1 | 4321 | 0 | -| 4 | 4321 | 1 | 4321 | 4321 | -| 4+ | 4321 | 0 | 0 | 0 | -| 5 | 4321 | 0 | 0 | 0 | -| 5+ | 12345 | 0 | 12345 | 0 | -| 6 | 12345 | 0 | 12345 | 0 | -| 6+ | 12345 | 1 | 12345 | 0 | -| 7 | 12345 | 1 | 12345 | 12345 | -| 7+ | 12345 | 0 | 12345 | 12345 | -| 8 | 12345 | 0 | 12345 | 12345 | -| 8 | 12345 | 0 | 4321 | 4321 | -| 8+ | 16383 | 0 | 4321 | 4321 | -| 9 | 16383 | 0 | 4321 | 4321 | -| 9+ | 16383 | 1 | 16383 | 0 | -| 10 | 16383 | 1 | 16383 | 16383 | -| 10+ | 16383 | 0 | 16383 | 16383 | -| 11 | 16383 | 0 | 16383 | 16383 | -| 11 | 16383 | 0 | 12345 | 12345 | -| 11 | 16383 | 0 | 16383 | 16383 | -| 11+ | 16383 | 0 | 10920 | 0 | -| 12 | 16383 | 0 | 10920 | 0 | -| 12 | 16383 | 0 | 10921 | 0 | -| 12 | 16383 | 0 | 10922 | 0 | -| 12 | 16383 | 0 | 10923 | 0 | -| 12 | 16383 | 0 | 10924 | 0 | -| 12 | 16383 | 0 | 10925 | 0 | -| 12 | 16383 | 0 | 10926 | 0 | -| 12 | 16383 | 0 | 10927 | 0 | -| 12+ | 21845 | 1 | 10920 | 0 | -| 13 | 21845 | 1 | 10920 | 21845 | -| 13+ | 21845 | 1 | 10921 | 0 | -| 14 | 21845 | 1 | 10921 | 21845 | -| 14+ | 21845 | 1 | 10922 | 0 | -| 15 | 21845 | 1 | 10922 | 21845 | -| 15+ | 21845 | 1 | 10923 | 0 | -| 16 | 21845 | 1 | 10923 | 21845 | -| 16+ | 21845 | 1 | 10924 | 0 | -| 17 | 21845 | 1 | 10924 | 21845 | -| 17+ | 21845 | 1 | 10925 | 0 | -| 18 | 21845 | 1 | 10925 | 21845 | -| 18+ | 21845 | 1 | 10926 | 0 | -| 19 | 21845 | 1 | 10926 | 21845 | -| 19+ | 21845 | 1 | 10927 | 0 | -| 20 | 21845 | 1 | 10927 | 21845 | -| 20+ | 21845 | 0 | 10920 | 21845 | -| 21 | 21845 | 0 | 10920 | 21845 | -| 21 | 21845 | 0 | 10921 | 21845 | -| 21 | 21845 | 0 | 10922 | 21845 | -| 21 | 21845 | 0 | 10923 | 21845 | -| 21 | 21845 | 0 | 10924 | 21845 | -| 21 | 21845 | 0 | 10925 | 21845 | -| 21 | 21845 | 0 | 10926 | 21845 | -| 21 | 21845 | 0 | 10927 | 21845 | -| 21+ | -21846 | 1 | 10920 | 21845 | -| 22 | -21846 | 1 | 10920 | -21846 | -| 22+ | -21846 | 0 | 10920 | -21846 | -| 23 | -21846 | 0 | 10920 | -21846 | -| 23 | -21846 | 0 | 10921 | 21845 | -| 23 | -21846 | 0 | 10922 | 21845 | -| 23 | -21846 | 0 | 10923 | 21845 | -| 23 | -21846 | 0 | 10924 | 21845 | -| 23 | -21846 | 0 | 10925 | 21845 | -| 23 | -21846 | 0 | 10926 | 21845 | -| 23 | -21846 | 0 | 10927 | 21845 | -| 23+ | 21845 | 1 | 10920 | -21846 | -| 24 | 21845 | 1 | 10920 | 21845 | -| 24+ | -21846 | 1 | 10921 | 21845 | -| 25 | -21846 | 1 | 10921 | -21846 | -| 25+ | -21846 | 0 | 10920 | 21845 | -| 26 | -21846 | 0 | 10920 | 21845 | -| 26 | -21846 | 0 | 10921 | -21846 | -| 26 | -21846 | 0 | 10922 | 21845 | -| 26 | -21846 | 0 | 10923 | 21845 | -| 26 | -21846 | 0 | 10924 | 21845 | -| 26 | -21846 | 0 | 10925 | 21845 | -| 26 | -21846 | 0 | 10926 | 21845 | -| 26 | -21846 | 0 | 10927 | 21845 | -| 26+ | 21845 | 1 | 10921 | -21846 | -| 27 | 21845 | 1 | 10921 | 21845 | -| 27+ | -21846 | 1 | 10922 | 21845 | -| 28 | -21846 | 1 | 10922 | -21846 | -| 28+ | -21846 | 0 | 10920 | 21845 | -| 29 | -21846 | 0 | 10920 | 21845 | -| 29 | -21846 | 0 | 10921 | 21845 | -| 29 | -21846 | 0 | 10922 | -21846 | -| 29 | -21846 | 0 | 10923 | 21845 | -| 29 | -21846 | 0 | 10924 | 21845 | -| 29 | -21846 | 0 | 10925 | 21845 | -| 29 | -21846 | 0 | 10926 | 21845 | -| 29 | -21846 | 0 | 10927 | 21845 | -| 29+ | 21845 | 1 | 10922 | -21846 | -| 30 | 21845 | 1 | 10922 | 21845 | -| 30+ | -21846 | 1 | 10923 | 21845 | -| 31 | -21846 | 1 | 10923 | -21846 | -| 31+ | -21846 | 0 | 10920 | 21845 | -| 32 | -21846 | 0 | 10920 | 21845 | -| 32 | -21846 | 0 | 10921 | 21845 | -| 32 | -21846 | 0 | 10922 | 21845 | -| 32 | -21846 | 0 | 10923 | -21846 | -| 32 | -21846 | 0 | 10924 | 21845 | -| 32 | -21846 | 0 | 10925 | 21845 | -| 32 | -21846 | 0 | 10926 | 21845 | -| 32 | -21846 | 0 | 10927 | 21845 | -| 32+ | 21845 | 1 | 10923 | -21846 | -| 33 | 21845 | 1 | 10923 | 21845 | -| 33+ | -21846 | 1 | 10924 | 21845 | -| 34 | -21846 | 1 | 10924 | -21846 | -| 34+ | -21846 | 0 | 10920 | 21845 | -| 35 | -21846 | 0 | 10920 | 21845 | -| 35 | -21846 | 0 | 10921 | 21845 | -| 35 | -21846 | 0 | 10922 | 21845 | -| 35 | -21846 | 0 | 10923 | 21845 | -| 35 | -21846 | 0 | 10924 | -21846 | -| 35 | -21846 | 0 | 10925 | 21845 | -| 35 | -21846 | 0 | 10926 | 21845 | -| 35 | -21846 | 0 | 10927 | 21845 | -| 35+ | 21845 | 1 | 10924 | -21846 | -| 36 | 21845 | 1 | 10924 | 21845 | -| 36+ | -21846 | 1 | 10925 | 21845 | -| 37 | -21846 | 1 | 10925 | -21846 | -| 37+ | -21846 | 0 | 10920 | 21845 | -| 38 | -21846 | 0 | 10920 | 21845 | -| 38 | -21846 | 0 | 10921 | 21845 | -| 38 | -21846 | 0 | 10922 | 21845 | -| 38 | -21846 | 0 | 10923 | 21845 | -| 38 | -21846 | 0 | 10924 | 21845 | -| 38 | -21846 | 0 | 10925 | -21846 | -| 38 | -21846 | 0 | 10926 | 21845 | -| 38 | -21846 | 0 | 10927 | 21845 | -| 38+ | 21845 | 1 | 10925 | -21846 | -| 39 | 21845 | 1 | 10925 | 21845 | -| 39+ | -21846 | 1 | 10926 | 21845 | -| 40 | -21846 | 1 | 10926 | -21846 | -| 40+ | -21846 | 0 | 10920 | 21845 | -| 41 | -21846 | 0 | 10920 | 21845 | -| 41 | -21846 | 0 | 10921 | 21845 | -| 41 | -21846 | 0 | 10922 | 21845 | -| 41 | -21846 | 0 | 10923 | 21845 | -| 41 | -21846 | 0 | 10924 | 21845 | -| 41 | -21846 | 0 | 10925 | 21845 | -| 41 | -21846 | 0 | 10926 | -21846 | -| 41 | -21846 | 0 | 10927 | 21845 | -| 41+ | 21845 | 1 | 10926 | -21846 | -| 42 | 21845 | 1 | 10926 | 21845 | -| 42+ | -21846 | 1 | 10927 | 21845 | -| 43 | -21846 | 1 | 10927 | -21846 | -| 43+ | -21846 | 0 | 10920 | 21845 | -| 44 | -21846 | 0 | 10920 | 21845 | -| 44 | -21846 | 0 | 10921 | 21845 | -| 44 | -21846 | 0 | 10922 | 21845 | -| 44 | -21846 | 0 | 10923 | 21845 | -| 44 | -21846 | 0 | 10924 | 21845 | -| 44 | -21846 | 0 | 10925 | 21845 | -| 44 | -21846 | 0 | 10926 | 21845 | -| 44 | -21846 | 0 | 10927 | -21846 | -| 44+ | 21845 | 1 | 10927 | -21846 | -| 45 | 21845 | 1 | 10927 | 21845 | -| 45+ | 21845 | 0 | 10920 | 21845 | -| 46 | 21845 | 0 | 10920 | 21845 | -| 46 | 21845 | 0 | 10921 | 21845 | -| 46 | 21845 | 0 | 10922 | 21845 | -| 46 | 21845 | 0 | 10923 | 21845 | -| 46 | 21845 | 0 | 10924 | 21845 | -| 46 | 21845 | 0 | 10925 | 21845 | -| 46 | 21845 | 0 | 10926 | 21845 | -| 46 | 21845 | 0 | 10927 | 21845 | -| 46+ | 21845 | 0 | 1365 | 0 | -| 47 | 21845 | 0 | 1365 | 0 | -| 47 | 21845 | 0 | 3413 | 0 | -| 47 | 21845 | 0 | 5461 | 0 | -| 47 | 21845 | 0 | 7509 | 0 | -| 47 | 21845 | 0 | 9557 | 0 | -| 47 | 21845 | 0 | 11605 | 0 | -| 47 | 21845 | 0 | 13653 | 0 | -| 47 | 21845 | 0 | 15701 | 0 | -| 47+ | 21845 | 1 | 1365 | 0 | -| 48 | 21845 | 1 | 1365 | 21845 | -| 48+ | 21845 | 1 | 3413 | 0 | -| 49 | 21845 | 1 | 3413 | 21845 | -| 49+ | 21845 | 1 | 5461 | 0 | -| 50 | 21845 | 1 | 5461 | 21845 | -| 50+ | 21845 | 1 | 7509 | 0 | -| 51 | 21845 | 1 | 7509 | 21845 | -| 51+ | 21845 | 1 | 9557 | 0 | -| 52 | 21845 | 1 | 9557 | 21845 | -| 52+ | 21845 | 1 | 11605 | 0 | -| 53 | 21845 | 1 | 11605 | 21845 | -| 53+ | 21845 | 1 | 13653 | 0 | -| 54 | 21845 | 1 | 13653 | 21845 | -| 54+ | 21845 | 1 | 15701 | 0 | -| 55 | 21845 | 1 | 15701 | 21845 | -| 55+ | 21845 | 0 | 1365 | 21845 | -| 56 | 21845 | 0 | 1365 | 21845 | -| 56 | 21845 | 0 | 3413 | 21845 | -| 56 | 21845 | 0 | 5461 | 21845 | -| 56 | 21845 | 0 | 7509 | 21845 | -| 56 | 21845 | 0 | 9557 | 21845 | -| 56 | 21845 | 0 | 11605 | 21845 | -| 56 | 21845 | 0 | 13653 | 21845 | -| 56 | 21845 | 0 | 15701 | 21845 | -| 56+ | -21846 | 1 | 1365 | 21845 | -| 57 | -21846 | 1 | 1365 | -21846 | -| 57+ | -21846 | 0 | 1365 | -21846 | -| 58 | -21846 | 0 | 1365 | -21846 | -| 58 | -21846 | 0 | 3413 | 21845 | -| 58 | -21846 | 0 | 5461 | 21845 | -| 58 | -21846 | 0 | 7509 | 21845 | -| 58 | -21846 | 0 | 9557 | 21845 | -| 58 | -21846 | 0 | 11605 | 21845 | -| 58 | -21846 | 0 | 13653 | 21845 | -| 58 | -21846 | 0 | 15701 | 21845 | -| 58+ | 21845 | 1 | 1365 | -21846 | -| 59 | 21845 | 1 | 1365 | 21845 | -| 59+ | -21846 | 1 | 3413 | 21845 | -| 60 | -21846 | 1 | 3413 | -21846 | -| 60+ | -21846 | 0 | 1365 | 21845 | -| 61 | -21846 | 0 | 1365 | 21845 | -| 61 | -21846 | 0 | 3413 | -21846 | -| 61 | -21846 | 0 | 5461 | 21845 | -| 61 | -21846 | 0 | 7509 | 21845 | -| 61 | -21846 | 0 | 9557 | 21845 | -| 61 | -21846 | 0 | 11605 | 21845 | -| 61 | -21846 | 0 | 13653 | 21845 | -| 61 | -21846 | 0 | 15701 | 21845 | -| 61+ | 21845 | 1 | 3413 | -21846 | -| 62 | 21845 | 1 | 3413 | 21845 | -| 62+ | -21846 | 1 | 5461 | 21845 | -| 63 | -21846 | 1 | 5461 | -21846 | -| 63+ | -21846 | 0 | 1365 | 21845 | -| 64 | -21846 | 0 | 1365 | 21845 | -| 64 | -21846 | 0 | 3413 | 21845 | -| 64 | -21846 | 0 | 5461 | -21846 | -| 64 | -21846 | 0 | 7509 | 21845 | -| 64 | -21846 | 0 | 9557 | 21845 | -| 64 | -21846 | 0 | 11605 | 21845 | -| 64 | -21846 | 0 | 13653 | 21845 | -| 64 | -21846 | 0 | 15701 | 21845 | -| 64+ | 21845 | 1 | 5461 | -21846 | -| 65 | 21845 | 1 | 5461 | 21845 | -| 65+ | -21846 | 1 | 7509 | 21845 | -| 66 | -21846 | 1 | 7509 | -21846 | -| 66+ | -21846 | 0 | 1365 | 21845 | -| 67 | -21846 | 0 | 1365 | 21845 | -| 67 | -21846 | 0 | 3413 | 21845 | -| 67 | -21846 | 0 | 5461 | 21845 | -| 67 | -21846 | 0 | 7509 | -21846 | -| 67 | -21846 | 0 | 9557 | 21845 | -| 67 | -21846 | 0 | 11605 | 21845 | -| 67 | -21846 | 0 | 13653 | 21845 | -| 67 | -21846 | 0 | 15701 | 21845 | -| 67+ | 21845 | 1 | 7509 | -21846 | -| 68 | 21845 | 1 | 7509 | 21845 | -| 68+ | -21846 | 1 | 9557 | 21845 | -| 69 | -21846 | 1 | 9557 | -21846 | -| 69+ | -21846 | 0 | 1365 | 21845 | -| 70 | -21846 | 0 | 1365 | 21845 | -| 70 | -21846 | 0 | 3413 | 21845 | -| 70 | -21846 | 0 | 5461 | 21845 | -| 70 | -21846 | 0 | 7509 | 21845 | -| 70 | -21846 | 0 | 9557 | -21846 | -| 70 | -21846 | 0 | 11605 | 21845 | -| 70 | -21846 | 0 | 13653 | 21845 | -| 70 | -21846 | 0 | 15701 | 21845 | -| 70+ | 21845 | 1 | 9557 | -21846 | -| 71 | 21845 | 1 | 9557 | 21845 | -| 71+ | -21846 | 1 | 11605 | 21845 | -| 72 | -21846 | 1 | 11605 | -21846 | -| 72+ | -21846 | 0 | 1365 | 21845 | -| 73 | -21846 | 0 | 1365 | 21845 | -| 73 | -21846 | 0 | 3413 | 21845 | -| 73 | -21846 | 0 | 5461 | 21845 | -| 73 | -21846 | 0 | 7509 | 21845 | -| 73 | -21846 | 0 | 9557 | 21845 | -| 73 | -21846 | 0 | 11605 | -21846 | -| 73 | -21846 | 0 | 13653 | 21845 | -| 73 | -21846 | 0 | 15701 | 21845 | -| 73+ | 21845 | 1 | 11605 | -21846 | -| 74 | 21845 | 1 | 11605 | 21845 | -| 74+ | -21846 | 1 | 13653 | 21845 | -| 75 | -21846 | 1 | 13653 | -21846 | -| 75+ | -21846 | 0 | 1365 | 21845 | -| 76 | -21846 | 0 | 1365 | 21845 | -| 76 | -21846 | 0 | 3413 | 21845 | -| 76 | -21846 | 0 | 5461 | 21845 | -| 76 | -21846 | 0 | 7509 | 21845 | -| 76 | -21846 | 0 | 9557 | 21845 | -| 76 | -21846 | 0 | 11605 | 21845 | -| 76 | -21846 | 0 | 13653 | -21846 | -| 76 | -21846 | 0 | 15701 | 21845 | -| 76+ | 21845 | 1 | 13653 | -21846 | -| 77 | 21845 | 1 | 13653 | 21845 | -| 77+ | -21846 | 1 | 15701 | 21845 | -| 78 | -21846 | 1 | 15701 | -21846 | -| 78+ | -21846 | 0 | 1365 | 21845 | -| 79 | -21846 | 0 | 1365 | 21845 | -| 79 | -21846 | 0 | 3413 | 21845 | -| 79 | -21846 | 0 | 5461 | 21845 | -| 79 | -21846 | 0 | 7509 | 21845 | -| 79 | -21846 | 0 | 9557 | 21845 | -| 79 | -21846 | 0 | 11605 | 21845 | -| 79 | -21846 | 0 | 13653 | 21845 | -| 79 | -21846 | 0 | 15701 | -21846 | -| 79+ | 21845 | 1 | 15701 | -21846 | -| 80 | 21845 | 1 | 15701 | 21845 | -| 80+ | 21845 | 0 | 1365 | 21845 | -| 81 | 21845 | 0 | 1365 | 21845 | -| 81 | 21845 | 0 | 3413 | 21845 | -| 81 | 21845 | 0 | 5461 | 21845 | -| 81 | 21845 | 0 | 7509 | 21845 | -| 81 | 21845 | 0 | 9557 | 21845 | -| 81 | 21845 | 0 | 11605 | 21845 | -| 81 | 21845 | 0 | 13653 | 21845 | -| 81 | 21845 | 0 | 15701 | 21845 |`; +set address %B00010101010101, +tick, +output; +tock, +output; +set address %B00110101010101, +eval, +output; +set address %B01010101010101, +eval, +output; +set address %B01110101010101, +eval, +output; +set address %B10010101010101, +eval, +output; +set address %B10110101010101, +eval, +output; +set address %B11010101010101, +eval, +output; +set address %B11110101010101, +eval, +output;`; +export const cmp = `|time | in |load| address | out | +| 0+ | 0 | 0 | 0 | 0 | +| 1 | 0 | 0 | 0 | 0 | +| 1+ | 0 | 1 | 0 | 0 | +| 2 | 0 | 1 | 0 | 0 | +| 2+ | 4321 | 0 | 0 | 0 | +| 3 | 4321 | 0 | 0 | 0 | +| 3+ | 4321 | 1 | 4321 | 0 | +| 4 | 4321 | 1 | 4321 | 4321 | +| 4+ | 4321 | 0 | 0 | 0 | +| 5 | 4321 | 0 | 0 | 0 | +| 5+ | 12345 | 0 | 12345 | 0 | +| 6 | 12345 | 0 | 12345 | 0 | +| 6+ | 12345 | 1 | 12345 | 0 | +| 7 | 12345 | 1 | 12345 | 12345 | +| 7+ | 12345 | 0 | 12345 | 12345 | +| 8 | 12345 | 0 | 12345 | 12345 | +| 8 | 12345 | 0 | 4321 | 4321 | +| 8+ | 16383 | 0 | 4321 | 4321 | +| 9 | 16383 | 0 | 4321 | 4321 | +| 9+ | 16383 | 1 | 16383 | 0 | +| 10 | 16383 | 1 | 16383 | 16383 | +| 10+ | 16383 | 0 | 16383 | 16383 | +| 11 | 16383 | 0 | 16383 | 16383 | +| 11 | 16383 | 0 | 12345 | 12345 | +| 11 | 16383 | 0 | 16383 | 16383 | +| 11+ | 16383 | 0 | 10920 | 0 | +| 12 | 16383 | 0 | 10920 | 0 | +| 12 | 16383 | 0 | 10921 | 0 | +| 12 | 16383 | 0 | 10922 | 0 | +| 12 | 16383 | 0 | 10923 | 0 | +| 12 | 16383 | 0 | 10924 | 0 | +| 12 | 16383 | 0 | 10925 | 0 | +| 12 | 16383 | 0 | 10926 | 0 | +| 12 | 16383 | 0 | 10927 | 0 | +| 12+ | 21845 | 1 | 10920 | 0 | +| 13 | 21845 | 1 | 10920 | 21845 | +| 13+ | 21845 | 1 | 10921 | 0 | +| 14 | 21845 | 1 | 10921 | 21845 | +| 14+ | 21845 | 1 | 10922 | 0 | +| 15 | 21845 | 1 | 10922 | 21845 | +| 15+ | 21845 | 1 | 10923 | 0 | +| 16 | 21845 | 1 | 10923 | 21845 | +| 16+ | 21845 | 1 | 10924 | 0 | +| 17 | 21845 | 1 | 10924 | 21845 | +| 17+ | 21845 | 1 | 10925 | 0 | +| 18 | 21845 | 1 | 10925 | 21845 | +| 18+ | 21845 | 1 | 10926 | 0 | +| 19 | 21845 | 1 | 10926 | 21845 | +| 19+ | 21845 | 1 | 10927 | 0 | +| 20 | 21845 | 1 | 10927 | 21845 | +| 20+ | 21845 | 0 | 10920 | 21845 | +| 21 | 21845 | 0 | 10920 | 21845 | +| 21 | 21845 | 0 | 10921 | 21845 | +| 21 | 21845 | 0 | 10922 | 21845 | +| 21 | 21845 | 0 | 10923 | 21845 | +| 21 | 21845 | 0 | 10924 | 21845 | +| 21 | 21845 | 0 | 10925 | 21845 | +| 21 | 21845 | 0 | 10926 | 21845 | +| 21 | 21845 | 0 | 10927 | 21845 | +| 21+ | -21846 | 1 | 10920 | 21845 | +| 22 | -21846 | 1 | 10920 | -21846 | +| 22+ | -21846 | 0 | 10920 | -21846 | +| 23 | -21846 | 0 | 10920 | -21846 | +| 23 | -21846 | 0 | 10921 | 21845 | +| 23 | -21846 | 0 | 10922 | 21845 | +| 23 | -21846 | 0 | 10923 | 21845 | +| 23 | -21846 | 0 | 10924 | 21845 | +| 23 | -21846 | 0 | 10925 | 21845 | +| 23 | -21846 | 0 | 10926 | 21845 | +| 23 | -21846 | 0 | 10927 | 21845 | +| 23+ | 21845 | 1 | 10920 | -21846 | +| 24 | 21845 | 1 | 10920 | 21845 | +| 24+ | -21846 | 1 | 10921 | 21845 | +| 25 | -21846 | 1 | 10921 | -21846 | +| 25+ | -21846 | 0 | 10920 | 21845 | +| 26 | -21846 | 0 | 10920 | 21845 | +| 26 | -21846 | 0 | 10921 | -21846 | +| 26 | -21846 | 0 | 10922 | 21845 | +| 26 | -21846 | 0 | 10923 | 21845 | +| 26 | -21846 | 0 | 10924 | 21845 | +| 26 | -21846 | 0 | 10925 | 21845 | +| 26 | -21846 | 0 | 10926 | 21845 | +| 26 | -21846 | 0 | 10927 | 21845 | +| 26+ | 21845 | 1 | 10921 | -21846 | +| 27 | 21845 | 1 | 10921 | 21845 | +| 27+ | -21846 | 1 | 10922 | 21845 | +| 28 | -21846 | 1 | 10922 | -21846 | +| 28+ | -21846 | 0 | 10920 | 21845 | +| 29 | -21846 | 0 | 10920 | 21845 | +| 29 | -21846 | 0 | 10921 | 21845 | +| 29 | -21846 | 0 | 10922 | -21846 | +| 29 | -21846 | 0 | 10923 | 21845 | +| 29 | -21846 | 0 | 10924 | 21845 | +| 29 | -21846 | 0 | 10925 | 21845 | +| 29 | -21846 | 0 | 10926 | 21845 | +| 29 | -21846 | 0 | 10927 | 21845 | +| 29+ | 21845 | 1 | 10922 | -21846 | +| 30 | 21845 | 1 | 10922 | 21845 | +| 30+ | -21846 | 1 | 10923 | 21845 | +| 31 | -21846 | 1 | 10923 | -21846 | +| 31+ | -21846 | 0 | 10920 | 21845 | +| 32 | -21846 | 0 | 10920 | 21845 | +| 32 | -21846 | 0 | 10921 | 21845 | +| 32 | -21846 | 0 | 10922 | 21845 | +| 32 | -21846 | 0 | 10923 | -21846 | +| 32 | -21846 | 0 | 10924 | 21845 | +| 32 | -21846 | 0 | 10925 | 21845 | +| 32 | -21846 | 0 | 10926 | 21845 | +| 32 | -21846 | 0 | 10927 | 21845 | +| 32+ | 21845 | 1 | 10923 | -21846 | +| 33 | 21845 | 1 | 10923 | 21845 | +| 33+ | -21846 | 1 | 10924 | 21845 | +| 34 | -21846 | 1 | 10924 | -21846 | +| 34+ | -21846 | 0 | 10920 | 21845 | +| 35 | -21846 | 0 | 10920 | 21845 | +| 35 | -21846 | 0 | 10921 | 21845 | +| 35 | -21846 | 0 | 10922 | 21845 | +| 35 | -21846 | 0 | 10923 | 21845 | +| 35 | -21846 | 0 | 10924 | -21846 | +| 35 | -21846 | 0 | 10925 | 21845 | +| 35 | -21846 | 0 | 10926 | 21845 | +| 35 | -21846 | 0 | 10927 | 21845 | +| 35+ | 21845 | 1 | 10924 | -21846 | +| 36 | 21845 | 1 | 10924 | 21845 | +| 36+ | -21846 | 1 | 10925 | 21845 | +| 37 | -21846 | 1 | 10925 | -21846 | +| 37+ | -21846 | 0 | 10920 | 21845 | +| 38 | -21846 | 0 | 10920 | 21845 | +| 38 | -21846 | 0 | 10921 | 21845 | +| 38 | -21846 | 0 | 10922 | 21845 | +| 38 | -21846 | 0 | 10923 | 21845 | +| 38 | -21846 | 0 | 10924 | 21845 | +| 38 | -21846 | 0 | 10925 | -21846 | +| 38 | -21846 | 0 | 10926 | 21845 | +| 38 | -21846 | 0 | 10927 | 21845 | +| 38+ | 21845 | 1 | 10925 | -21846 | +| 39 | 21845 | 1 | 10925 | 21845 | +| 39+ | -21846 | 1 | 10926 | 21845 | +| 40 | -21846 | 1 | 10926 | -21846 | +| 40+ | -21846 | 0 | 10920 | 21845 | +| 41 | -21846 | 0 | 10920 | 21845 | +| 41 | -21846 | 0 | 10921 | 21845 | +| 41 | -21846 | 0 | 10922 | 21845 | +| 41 | -21846 | 0 | 10923 | 21845 | +| 41 | -21846 | 0 | 10924 | 21845 | +| 41 | -21846 | 0 | 10925 | 21845 | +| 41 | -21846 | 0 | 10926 | -21846 | +| 41 | -21846 | 0 | 10927 | 21845 | +| 41+ | 21845 | 1 | 10926 | -21846 | +| 42 | 21845 | 1 | 10926 | 21845 | +| 42+ | -21846 | 1 | 10927 | 21845 | +| 43 | -21846 | 1 | 10927 | -21846 | +| 43+ | -21846 | 0 | 10920 | 21845 | +| 44 | -21846 | 0 | 10920 | 21845 | +| 44 | -21846 | 0 | 10921 | 21845 | +| 44 | -21846 | 0 | 10922 | 21845 | +| 44 | -21846 | 0 | 10923 | 21845 | +| 44 | -21846 | 0 | 10924 | 21845 | +| 44 | -21846 | 0 | 10925 | 21845 | +| 44 | -21846 | 0 | 10926 | 21845 | +| 44 | -21846 | 0 | 10927 | -21846 | +| 44+ | 21845 | 1 | 10927 | -21846 | +| 45 | 21845 | 1 | 10927 | 21845 | +| 45+ | 21845 | 0 | 10920 | 21845 | +| 46 | 21845 | 0 | 10920 | 21845 | +| 46 | 21845 | 0 | 10921 | 21845 | +| 46 | 21845 | 0 | 10922 | 21845 | +| 46 | 21845 | 0 | 10923 | 21845 | +| 46 | 21845 | 0 | 10924 | 21845 | +| 46 | 21845 | 0 | 10925 | 21845 | +| 46 | 21845 | 0 | 10926 | 21845 | +| 46 | 21845 | 0 | 10927 | 21845 | +| 46+ | 21845 | 0 | 1365 | 0 | +| 47 | 21845 | 0 | 1365 | 0 | +| 47 | 21845 | 0 | 3413 | 0 | +| 47 | 21845 | 0 | 5461 | 0 | +| 47 | 21845 | 0 | 7509 | 0 | +| 47 | 21845 | 0 | 9557 | 0 | +| 47 | 21845 | 0 | 11605 | 0 | +| 47 | 21845 | 0 | 13653 | 0 | +| 47 | 21845 | 0 | 15701 | 0 | +| 47+ | 21845 | 1 | 1365 | 0 | +| 48 | 21845 | 1 | 1365 | 21845 | +| 48+ | 21845 | 1 | 3413 | 0 | +| 49 | 21845 | 1 | 3413 | 21845 | +| 49+ | 21845 | 1 | 5461 | 0 | +| 50 | 21845 | 1 | 5461 | 21845 | +| 50+ | 21845 | 1 | 7509 | 0 | +| 51 | 21845 | 1 | 7509 | 21845 | +| 51+ | 21845 | 1 | 9557 | 0 | +| 52 | 21845 | 1 | 9557 | 21845 | +| 52+ | 21845 | 1 | 11605 | 0 | +| 53 | 21845 | 1 | 11605 | 21845 | +| 53+ | 21845 | 1 | 13653 | 0 | +| 54 | 21845 | 1 | 13653 | 21845 | +| 54+ | 21845 | 1 | 15701 | 0 | +| 55 | 21845 | 1 | 15701 | 21845 | +| 55+ | 21845 | 0 | 1365 | 21845 | +| 56 | 21845 | 0 | 1365 | 21845 | +| 56 | 21845 | 0 | 3413 | 21845 | +| 56 | 21845 | 0 | 5461 | 21845 | +| 56 | 21845 | 0 | 7509 | 21845 | +| 56 | 21845 | 0 | 9557 | 21845 | +| 56 | 21845 | 0 | 11605 | 21845 | +| 56 | 21845 | 0 | 13653 | 21845 | +| 56 | 21845 | 0 | 15701 | 21845 | +| 56+ | -21846 | 1 | 1365 | 21845 | +| 57 | -21846 | 1 | 1365 | -21846 | +| 57+ | -21846 | 0 | 1365 | -21846 | +| 58 | -21846 | 0 | 1365 | -21846 | +| 58 | -21846 | 0 | 3413 | 21845 | +| 58 | -21846 | 0 | 5461 | 21845 | +| 58 | -21846 | 0 | 7509 | 21845 | +| 58 | -21846 | 0 | 9557 | 21845 | +| 58 | -21846 | 0 | 11605 | 21845 | +| 58 | -21846 | 0 | 13653 | 21845 | +| 58 | -21846 | 0 | 15701 | 21845 | +| 58+ | 21845 | 1 | 1365 | -21846 | +| 59 | 21845 | 1 | 1365 | 21845 | +| 59+ | -21846 | 1 | 3413 | 21845 | +| 60 | -21846 | 1 | 3413 | -21846 | +| 60+ | -21846 | 0 | 1365 | 21845 | +| 61 | -21846 | 0 | 1365 | 21845 | +| 61 | -21846 | 0 | 3413 | -21846 | +| 61 | -21846 | 0 | 5461 | 21845 | +| 61 | -21846 | 0 | 7509 | 21845 | +| 61 | -21846 | 0 | 9557 | 21845 | +| 61 | -21846 | 0 | 11605 | 21845 | +| 61 | -21846 | 0 | 13653 | 21845 | +| 61 | -21846 | 0 | 15701 | 21845 | +| 61+ | 21845 | 1 | 3413 | -21846 | +| 62 | 21845 | 1 | 3413 | 21845 | +| 62+ | -21846 | 1 | 5461 | 21845 | +| 63 | -21846 | 1 | 5461 | -21846 | +| 63+ | -21846 | 0 | 1365 | 21845 | +| 64 | -21846 | 0 | 1365 | 21845 | +| 64 | -21846 | 0 | 3413 | 21845 | +| 64 | -21846 | 0 | 5461 | -21846 | +| 64 | -21846 | 0 | 7509 | 21845 | +| 64 | -21846 | 0 | 9557 | 21845 | +| 64 | -21846 | 0 | 11605 | 21845 | +| 64 | -21846 | 0 | 13653 | 21845 | +| 64 | -21846 | 0 | 15701 | 21845 | +| 64+ | 21845 | 1 | 5461 | -21846 | +| 65 | 21845 | 1 | 5461 | 21845 | +| 65+ | -21846 | 1 | 7509 | 21845 | +| 66 | -21846 | 1 | 7509 | -21846 | +| 66+ | -21846 | 0 | 1365 | 21845 | +| 67 | -21846 | 0 | 1365 | 21845 | +| 67 | -21846 | 0 | 3413 | 21845 | +| 67 | -21846 | 0 | 5461 | 21845 | +| 67 | -21846 | 0 | 7509 | -21846 | +| 67 | -21846 | 0 | 9557 | 21845 | +| 67 | -21846 | 0 | 11605 | 21845 | +| 67 | -21846 | 0 | 13653 | 21845 | +| 67 | -21846 | 0 | 15701 | 21845 | +| 67+ | 21845 | 1 | 7509 | -21846 | +| 68 | 21845 | 1 | 7509 | 21845 | +| 68+ | -21846 | 1 | 9557 | 21845 | +| 69 | -21846 | 1 | 9557 | -21846 | +| 69+ | -21846 | 0 | 1365 | 21845 | +| 70 | -21846 | 0 | 1365 | 21845 | +| 70 | -21846 | 0 | 3413 | 21845 | +| 70 | -21846 | 0 | 5461 | 21845 | +| 70 | -21846 | 0 | 7509 | 21845 | +| 70 | -21846 | 0 | 9557 | -21846 | +| 70 | -21846 | 0 | 11605 | 21845 | +| 70 | -21846 | 0 | 13653 | 21845 | +| 70 | -21846 | 0 | 15701 | 21845 | +| 70+ | 21845 | 1 | 9557 | -21846 | +| 71 | 21845 | 1 | 9557 | 21845 | +| 71+ | -21846 | 1 | 11605 | 21845 | +| 72 | -21846 | 1 | 11605 | -21846 | +| 72+ | -21846 | 0 | 1365 | 21845 | +| 73 | -21846 | 0 | 1365 | 21845 | +| 73 | -21846 | 0 | 3413 | 21845 | +| 73 | -21846 | 0 | 5461 | 21845 | +| 73 | -21846 | 0 | 7509 | 21845 | +| 73 | -21846 | 0 | 9557 | 21845 | +| 73 | -21846 | 0 | 11605 | -21846 | +| 73 | -21846 | 0 | 13653 | 21845 | +| 73 | -21846 | 0 | 15701 | 21845 | +| 73+ | 21845 | 1 | 11605 | -21846 | +| 74 | 21845 | 1 | 11605 | 21845 | +| 74+ | -21846 | 1 | 13653 | 21845 | +| 75 | -21846 | 1 | 13653 | -21846 | +| 75+ | -21846 | 0 | 1365 | 21845 | +| 76 | -21846 | 0 | 1365 | 21845 | +| 76 | -21846 | 0 | 3413 | 21845 | +| 76 | -21846 | 0 | 5461 | 21845 | +| 76 | -21846 | 0 | 7509 | 21845 | +| 76 | -21846 | 0 | 9557 | 21845 | +| 76 | -21846 | 0 | 11605 | 21845 | +| 76 | -21846 | 0 | 13653 | -21846 | +| 76 | -21846 | 0 | 15701 | 21845 | +| 76+ | 21845 | 1 | 13653 | -21846 | +| 77 | 21845 | 1 | 13653 | 21845 | +| 77+ | -21846 | 1 | 15701 | 21845 | +| 78 | -21846 | 1 | 15701 | -21846 | +| 78+ | -21846 | 0 | 1365 | 21845 | +| 79 | -21846 | 0 | 1365 | 21845 | +| 79 | -21846 | 0 | 3413 | 21845 | +| 79 | -21846 | 0 | 5461 | 21845 | +| 79 | -21846 | 0 | 7509 | 21845 | +| 79 | -21846 | 0 | 9557 | 21845 | +| 79 | -21846 | 0 | 11605 | 21845 | +| 79 | -21846 | 0 | 13653 | 21845 | +| 79 | -21846 | 0 | 15701 | -21846 | +| 79+ | 21845 | 1 | 15701 | -21846 | +| 80 | 21845 | 1 | 15701 | 21845 | +| 80+ | 21845 | 0 | 1365 | 21845 | +| 81 | 21845 | 0 | 1365 | 21845 | +| 81 | 21845 | 0 | 3413 | 21845 | +| 81 | 21845 | 0 | 5461 | 21845 | +| 81 | 21845 | 0 | 7509 | 21845 | +| 81 | 21845 | 0 | 9557 | 21845 | +| 81 | 21845 | 0 | 11605 | 21845 | +| 81 | 21845 | 0 | 13653 | 21845 | +| 81 | 21845 | 0 | 15701 | 21845 |`; diff --git a/projects/src/project_03/index.ts b/projects/src/project_03/index.ts index 1efba7d23..58c475c89 100644 --- a/projects/src/project_03/index.ts +++ b/projects/src/project_03/index.ts @@ -66,7 +66,7 @@ export async function resetFiles(fs: FileSystem): Promise { export async function resetTests(fs: FileSystem): Promise { await fs.pushd("/projects/03"); - await resetBySuffix(fs, CHIPS, "tst"); - await resetBySuffix(fs, CHIPS, "cmp"); + await resetBySuffix(fs, CHIPS, ".tst"); + await resetBySuffix(fs, CHIPS, ".cmp"); await fs.popd(); } diff --git a/projects/src/project_04/01_mult.ts b/projects/src/project_04/01_mult.ts index 46c5297cb..eff692778 100644 --- a/projects/src/project_04/01_mult.ts +++ b/projects/src/project_04/01_mult.ts @@ -1,74 +1,76 @@ export const tst = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/04/mult/Mult.tst +// File name: projects/4/mult/Mult.tst -// Tests the Mult.hack program in the CPU emulator. +// Tests the Mult program, designed to compute R2 = R0 * R1. +// Tests the program by having it multiply several sets of +// R0 and R1 values. output-list RAM[0]%D2.6.2 RAM[1]%D2.6.2 RAM[2]%D2.6.2; -set RAM[0] 0, // sets test arguments +set RAM[0] 0, // Sets R0 and R1 to some input values set RAM[1] 0, -set RAM[2] -1; // tests that product was initialized to 0 +set RAM[2] -1; // Ensures that the program initialized R2 to 0 repeat 20 { ticktock; } -set RAM[0] 0, // restores the arguments in case the program used them +set RAM[0] 0, // Restores R0 and R1 in case the program changed them set RAM[1] 0, output; set PC 0, -set RAM[0] 1, // sets test arguments +set RAM[0] 1, // Sets R0 and R1 to some input values set RAM[1] 0, -set RAM[2] -1; // tests that product was initialized to 0 +set RAM[2] -1; // Ensures that the program initialized R2 to 0 repeat 50 { ticktock; } -set RAM[0] 1, // restores the arguments in case the program used them +set RAM[0] 1, // Restores R0 and R1 in case the program changed them set RAM[1] 0, output; set PC 0, -set RAM[0] 0, // sets test arguments +set RAM[0] 0, // Sets R0 and R1 to some input values set RAM[1] 2, -set RAM[2] -1; // tests that product was initialized to 0 +set RAM[2] -1; // Ensures that the program initialized R2 to 0 repeat 80 { ticktock; } -set RAM[0] 0, // restores the arguments in case the program used them +set RAM[0] 0, // Restores R0 and R1 in case the program changed them set RAM[1] 2, output; set PC 0, -set RAM[0] 3, // sets test arguments +set RAM[0] 3, // Sets R0 and R1 to some input values set RAM[1] 1, -set RAM[2] -1; // tests that product was initialized to 0 +set RAM[2] -1; // Ensures that the program initialized R2 to 0 repeat 120 { ticktock; } -set RAM[0] 3, // restores the arguments in case the program used them +set RAM[0] 3, // Restores R0 and R1 in case the program changed them set RAM[1] 1, output; set PC 0, -set RAM[0] 2, // sets test arguments +set RAM[0] 2, // Sets R0 and R1 to some input values set RAM[1] 4, -set RAM[2] -1; // tests that product was initialized to 0 +set RAM[2] -1; // Ensures that the program initialized R2 to 0 repeat 150 { ticktock; } -set RAM[0] 2, // restores the arguments in case the program used them +set RAM[0] 2, // Restores R0 and R1 in case the program changed them set RAM[1] 4, output; set PC 0, -set RAM[0] 6, // sets test arguments +set RAM[0] 6, // Sets R0 and R1 to some input values set RAM[1] 7, -set RAM[2] -1; // tests that product was initialized to 0 +set RAM[2] -1; // Ensures that the program initialized R2 to 0 repeat 210 { ticktock; } -set RAM[0] 6, // restores the arguments in case the program used them +set RAM[0] 6, // Restores R0 and R1 in case the program changed them set RAM[1] 7, output;`; diff --git a/projects/src/project_04/02_fill.ts b/projects/src/project_04/02_fill.ts index 9a3c76e2c..b68903f06 100644 --- a/projects/src/project_04/02_fill.ts +++ b/projects/src/project_04/02_fill.ts @@ -1,7 +1,7 @@ export const tst = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/04/fill/Fill.tst +// File name: projects/4/fill/Fill.tst // Tests the Fill.hack program in the CPU emulator. @@ -14,39 +14,36 @@ repeat { export const autoTst = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/04/fill/FillAutomatic.tst +// File name: projects/4/fill/FillAutomatic // This script can be used to test the Fill program automatically, // rather than interactively. Specifically, the script sets the keyboard -// memory map (RAM[24576]) to 0, runs a million cycles, then it sets it -// to 1, runs a million cycles, then it sets it again to 0, and runs a -// million cycles. These actions simulate the events of leaving the keyboard -// untouched, pressing some key, and then releasing the key. -// After each on of these simulated events, the script outputs the values -// of selected registers from the screen memory map (RAM[16384] - RAM[24576]). -// This is done in order to test that these registers are set to 000...0 or to -// 111....1 (-1 in decimal), as mandated by how the Fill program should -// react to keyboard events. +// memory map (RAM[24576]) to 0, 1, and then again to 0. This simulates the +// acts of leaving the keyboard untouched, pressing some key, and then releasing +// the key. After each one of these simulated events, the script outputs the values +// of some selected registers from the screen memory map (RAM[16384]-RAM[24576]). +// This is done in order to test that these registers are set to 000...0 or 111....1, +// as mandated by how the Fill program should react to the keyboard events. output-list RAM[16384]%D2.6.2 RAM[17648]%D2.6.2 RAM[18349]%D2.6.2 RAM[19444]%D2.6.2 RAM[20771]%D2.6.2 RAM[21031]%D2.6.2 RAM[22596]%D2.6.2 RAM[23754]%D2.6.2 RAM[24575]%D2.6.2; -set RAM[24576] 0; // the keyboard is untouched +set RAM[24576] 0, // the keyboard is untouched repeat 1000000 { ticktock; } output; // tests that the screen is white -set RAM[24576] 1; // a keyboard key is pressed (1 is an arbitrary non-zero value) +set RAM[24576] 1, // a keyboard key is pressed repeat 1000000 { ticktock; } output; // tests that the screen is black -set RAM[24576] 0; // the keyboard in untouched +set RAM[24576] 0, // the keyboard is untouched repeat 1000000 { ticktock; } -output;`; +output; // tests that the screen is white`; export const autoCmp = `|RAM[16384]|RAM[17648]|RAM[18349]|RAM[19444]|RAM[20771]|RAM[21031]|RAM[22596]|RAM[23754]|RAM[24575]| | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | diff --git a/projects/src/project_04/index.ts b/projects/src/project_04/index.ts index 7f8b66d1a..ffac697b5 100644 --- a/projects/src/project_04/index.ts +++ b/projects/src/project_04/index.ts @@ -24,7 +24,7 @@ export async function resetFiles(fs: FileSystem): Promise { export async function resetTests(fs: FileSystem): Promise { await fs.pushd("/projects/04"); - await resetBySuffix(fs, TESTS, "tst"); - await resetBySuffix(fs, TESTS, "cmp"); + await resetBySuffix(fs, TESTS, ".tst"); + await resetBySuffix(fs, TESTS, ".cmp"); await fs.popd(); } diff --git a/projects/src/project_05/01_memory.ts b/projects/src/project_05/01_memory.ts index 62e35abb0..dc8e6d4ca 100644 --- a/projects/src/project_05/01_memory.ts +++ b/projects/src/project_05/01_memory.ts @@ -1,51 +1,108 @@ export const hdl = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/05/Memory.hdl -/** - * The Memory chip implements the complete address space of the Hack data memory, - * including the RAM and memory mapped I/O. - * Outputs the value of the memory location specified by the address input. - * If (load == 1), sets the memory location specified by the address input - * to the value of the in input. +// File name: projects/5/Memory.hdl +/** + * The complete address space of the Hack computer's memory, + * including RAM and memory-mapped I/O. + * The chip facilitates read and write operations, as follows: + * Read: out(t) = Memory[address(t)](t) + * Write: if load(t-1) then Memory[address(t-1)](t) = in(t-1) + * In words: the chip always outputs the value stored at the memory + * location specified by address. If load=1, the in value is loaded + * into the memory location specified by address. This value becomes + * available through the out output from the next time step onward. * Address space rules: - * Only the upper 16K + 8K + 1 words of the memory are used. - * Access to address 0 to 16383 results in accessing the RAM; - * Access to address 16384 to 24575 results in accessing the Screen memory map; - * Access to address 24576 results in accessing the Keyboard memory map. - */ + * Only the upper 16K+8K+1 words of the Memory chip are used. + * Access to address>0x6000 is invalid. Access to any address in + * the range 0x4000-0x5FFF results in accessing the screen memory + * map. Access to address 0x6000 results in accessing the keyboard + * memory map. The behavior in these addresses is described in the Screen + * and Keyboard chip specifications given in the lectures and the book. + */ CHIP Memory { IN in[16], load, address[15]; OUT out[16]; PARTS: - //// Replace this comment with your code. + //// Replace this comment with your code. }`; -export const tst = `output-list in%D1.6.1 load%B2.1.2 address%B1.15.1 out%D1.6.1; +export const tst = `// This file is part of www.nand2tetris.org +// and the book "The Elements of Computing Systems" +// by Nisan and Schocken, MIT Press. +// File name: projects/05/Memory.tst + +// Tests the Memory chip by inputting values to selected addresses, +// verifying that these addresses were indeed written to, and verifying +// that other addresses were not accessed by mistake. In particular, we +// focus on probing the registers in addresses 'lower RAM', 'upper RAM', +// and 'Screen', which correspond to 0, %X2000, and %X4000 in Hexadecimal +// (0, 8192 (8K), and 16385 (16K+1) in decimal). + +output-list in%D1.6.1 load%B2.1.2 address%B1.15.1 out%D1.6.1; + +echo "Before you run this script, select the 'Screen' option from the 'View' menu"; + +// We've noticed a common design mistake in several students' Memory.hdl files. +// This error leads to zeros being written in the offset of inactive memory segments +// instead of the intended location. To identify this issue, the test should check not +// only for incorrect writes into the wrong segment but also for any unexpected changes. +// To prepare for this, we've initialized the memory with a specific number in the areas +// where these erroneous writes might happen. -// Set RAM[0] = -1 +//// Sets RAM[2000], RAM[4000] = 12345 (for the following overwrite test) +set in 12345, set load 1, set address %X2000, tick, output; tock, output; +set address %X4000, tick, output; tock, output; + +set in -1, // Sets RAM[0] = -1 +set load 1, set address 0, -set in -1, set load 1, tick, output; tock, output; +tick, +output; +tock, +output; -// RAM[0] holds value -set in 9999, set load 0, tick, output; tock, output; +set in 9999, // RAM[0] holds value +set load 0, +tick, +output; +tock, +output; -// Did not also write to upper RAM or Screen -set address %X2000, eval, output; -set address %X4000, eval, output; +set address %X2000, // Did not also write to upper RAM or Screen +eval, +output; +set address %X4000, +eval, +output; + +//// Sets RAM[0], RAM[4000] = 12345 (for following overwrite test) +set in 12345, set load 1, set address %X0000, tick, output; tock, output; +set address %X4000, tick, output; tock, output; -// Set RAM[0x2000] = 2222 +set in 2222, // Sets RAM[2000] = 2222 +set load 1, set address %X2000, -set in 2222, set load 1, tick, output; tock, output; +tick, +output; +tock, +output; -// RAM[0x2000] holds value -set in 9999, set load 0, tick, output; tock, output; +set in 9999, // RAM[2000] holds value +set load 0, +tick, +output; +tock, +output; -// Did not also write to lower RAM or Screen -set address 0, eval, output; -set address %X4000, eval, output; +set address 0, // Did not also write to lower RAM or Screen +eval, +output; +set address %X4000, +eval, +output; -set load 0, // Low order address bits connected +set load 0, // Low order address bits connected set address %X0001, eval, output; set address %X0002, eval, output; set address %X0004, eval, output; @@ -61,48 +118,75 @@ set address %X0800, eval, output; set address %X1000, eval, output; set address %X2000, eval, output; -// RAM[1234] = 1234 -set address %X1234, -set in 1234, set load 1, tick, output; tock, output; +set address %X1234, // RAM[1234] = 1234 +set in 1234, +set load 1, +tick, +output; +tock, +output; -// Did not also write to upper RAM or Screen set load 0, -set address %X2234, eval, output; -set address %X6234, eval, output; +set address %X2234, // Did not also write to upper RAM or Screen +eval, output; +set address %X6234, +eval, output; -// RAM[0x2345] = 2345 -set address %X2345, -set in 2345, set load 1, tick, output; tock, output; +set address %X2345, // RAM[2345] = 2345 +set in 2345, +set load 1, +tick, +output; +tock, +output; -// Did not also write to lower RAM or Screen set load 0, -set address %X0345, eval, output; -set address %X4345, eval, output; +set address %X0345, // Did not also write to lower RAM or Screen +eval, output; +set address %X4345, +eval, output; + +//// Clears the overwrite detection value from the screen +set in 0, set load 1, set address %X4000, tick, output; tock, output; // Keyboard test -// set address 24576, -// echo "Click the Keyboard icon and hold down the 'K' key (uppercase) until you see the next message (it should appear shortly after that) ...", +set address 24576, +echo "Click the Keyboard icon and hold down the 'K' key (uppercase) until you see the next message...", // It's important to keep holding the key down since if the system is busy, // the memory will zero itself before being outputted. -/* -set Keyboard 'K'; while out <> 75 { - eval, + tick, tock; // tick, tock prevents hang if sync. parts used in KB path. } -clear-echo, output; + +clear-echo, output; -*/ // Screen test -set load 1, set in -1, set address %X4FCF, tick, tock, output; -set address %X504F, tick, tock, output; +//// Sets RAM[0FCF], RAM[2FCF] = 12345 (for following overwrite test) +set in 12345, set load 1, set address %X0FCF, tick, output; tock, output; +set address %X2FCF, tick, output; tock, output; + +set load 1, +set in -1, +set address %X4FCF, +tick, +tock, +output, -// Did not also write to lower or upper RAM -set address %X0FCF, eval, output; -set address %X2FCF, eval, output; +set address %X504F, +tick, +tock, +output; + +set address %X0FCF, // Did not also write to lower or upper RAM +eval, +output; +set address %X2FCF, +eval, +output; set load 0, // Low order address bits connected set address %X4FCE, eval, output; @@ -119,29 +203,39 @@ set address %X4BCF, eval, output; set address %X47CF, eval, output; set address %X5FCF, eval, output; +set load 0, +set address 24576, +echo "Two horizontal lines should be in the middle of the screen. Hold down 'Y' (uppercase) until you see the next message ...", +// It's important to keep holding the key down since if the system is busy, +// the memory will zero itself before being outputted. -set load 0, set address 24576, -echo "Make sure you see ONLY two horizontal lines in the middle of the screen. Change Keyboard to 'Y' (uppercase) to continue ..."; - -/* while out <> 89 { - eval; + tick, tock; // tick, tock prevents hang if sync. parts used in KB path. } -*/ -clear-echo;`; + +clear-echo, +output;`; export const cmp = `| in |load | address | out | +| 12345 | 1 | 010000000000000 | 0 | +| 12345 | 1 | 010000000000000 | 12345 | +| 12345 | 1 | 100000000000000 | 0 | +| 12345 | 1 | 100000000000000 | 12345 | | -1 | 1 | 000000000000000 | 0 | | -1 | 1 | 000000000000000 | -1 | | 9999 | 0 | 000000000000000 | -1 | | 9999 | 0 | 000000000000000 | -1 | -| 9999 | 0 | 010000000000000 | 0 | -| 9999 | 0 | 100000000000000 | 0 | -| 2222 | 1 | 010000000000000 | 0 | +| 9999 | 0 | 010000000000000 | 12345 | +| 9999 | 0 | 100000000000000 | 12345 | +| 12345 | 1 | 000000000000000 | -1 | +| 12345 | 1 | 000000000000000 | 12345 | +| 12345 | 1 | 100000000000000 | 12345 | +| 12345 | 1 | 100000000000000 | 12345 | +| 2222 | 1 | 010000000000000 | 12345 | | 2222 | 1 | 010000000000000 | 2222 | | 9999 | 0 | 010000000000000 | 2222 | | 9999 | 0 | 010000000000000 | 2222 | -| 9999 | 0 | 000000000000000 | -1 | -| 9999 | 0 | 100000000000000 | 0 | +| 9999 | 0 | 000000000000000 | 12345 | +| 9999 | 0 | 100000000000000 | 12345 | | 9999 | 0 | 000000000000001 | 0 | | 9999 | 0 | 000000000000010 | 0 | | 9999 | 0 | 000000000000100 | 0 | @@ -164,10 +258,17 @@ export const cmp = `| in |load | address | out | | 2345 | 1 | 010001101000101 | 2345 | | 2345 | 0 | 000001101000101 | 0 | | 2345 | 0 | 100001101000101 | 0 | +| 0 | 1 | 100000000000000 | 12345 | +| 0 | 1 | 100000000000000 | 0 | +| 0 | 1 | 110000000000000 | 75 | +| 12345 | 1 | 000111111001111 | 0 | +| 12345 | 1 | 000111111001111 | 12345 | +| 12345 | 1 | 010111111001111 | 0 | +| 12345 | 1 | 010111111001111 | 12345 | | -1 | 1 | 100111111001111 | -1 | | -1 | 1 | 101000001001111 | -1 | -| -1 | 1 | 000111111001111 | 0 | -| -1 | 1 | 010111111001111 | 0 | +| -1 | 1 | 000111111001111 | 12345 | +| -1 | 1 | 010111111001111 | 12345 | | -1 | 0 | 100111111001110 | 0 | | -1 | 0 | 100111111001101 | 0 | | -1 | 0 | 100111111001011 | 0 | @@ -180,4 +281,5 @@ export const cmp = `| in |load | address | out | | -1 | 0 | 100110111001111 | 0 | | -1 | 0 | 100101111001111 | 0 | | -1 | 0 | 100011111001111 | 0 | -| -1 | 0 | 101111111001111 | 0 |`; +| -1 | 0 | 101111111001111 | 0 | +| -1 | 0 | 110000000000000 | 89 |`; diff --git a/projects/src/project_05/02_cpu.ts b/projects/src/project_05/02_cpu.ts index 28093b8d7..135f98bd4 100644 --- a/projects/src/project_05/02_cpu.ts +++ b/projects/src/project_05/02_cpu.ts @@ -1,7 +1,7 @@ export const hdl = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/05/CPU.hdl +// File name: projects/5/CPU.hdl /** * The Hack Central Processing unit (CPU). * Parses the binary code in the instruction input and executes it according to the @@ -9,7 +9,7 @@ export const hdl = `// This file is part of www.nand2tetris.org * function specified by the instruction. If the instruction specifies to read a memory * value, the inM input is expected to contain this value. If the instruction specifies * to write a value to the memory, sets the outM output to this value, sets the addressM - * output to the target address, and asserts the writeM output (when writeM == 0, any + * output to the target address, and asserts the writeM output (when writeM = 0, any * value may appear in outM). * If the reset input is 0, computes the address of the next instruction and sets the * pc output to that value. If the reset input is 1, sets pc to 0. @@ -22,20 +22,30 @@ CHIP CPU { IN inM[16], // M value input (M = contents of RAM[A]) instruction[16], // Instruction for execution - reset; // Signals whether to restart the current + reset; // Signals whether to re-start the current // program (reset==1) or continue executing // the current program (reset==0). OUT outM[16], // M value output writeM, // Write to M? addressM[15], // Address in data memory (of M) - pc[15]; // Address of next instruction + pc[15]; // address of next instruction PARTS: - //// Replace this comment with your code. + //// Replace this comment with your code. }`; -export const tst = `output-list time%S0.4.0 inM%D0.6.0 instruction%B0.16.0 reset%B2.1.2 outM%D1.6.0 writeM%B3.1.3 addressM%D0.5.0 pc%D0.5.0 DRegister[]%D1.6.1; +export const tst = `// This file is part of www.nand2tetris.org +// and the book "The Elements of Computing Systems" +// by Nisan and Schocken, MIT Press. +// File name: projects/5/CPU.tst + +// Tests the CPU by setting the instruction input to various binary values that +// code Hack instructions, and outputting the values of the registers that are +// supposed to be affected by the instructions. +// Tracks the time, the CPU inputs (inM, instruction, reset bit), the CPU +// outputs (outM, writeM bit, address, pc), and the value of the D-register. +output-list time%S1.3.1 inM%D0.6.0 instruction%B0.16.0 reset%B2.1.2 outM%D1.6.0 writeM%B3.1.2 addressM%D1.5.1 pc%D0.5.0 DRegister[]%D1.7.1; set instruction %B0011000000111001, // @12345 tick, output, tock, output; @@ -46,16 +56,16 @@ tick, output, tock, output; set instruction %B0101101110100000, // @23456 tick, output, tock, output; -set instruction %B1110000111010000, // D=A-D +set instruction %B1110000111110000, // AD=A-D tick, output, tock, output; -set instruction %B0000001111101000, // @1000 +set instruction %B0000001111101011, // @1003 tick, output, tock, output; set instruction %B1110001100001000, // M=D tick, output, tock, output; -set instruction %B0000001111101001, // @1001 +set instruction %B0000001111101100, // @1004 tick, output, tock, output; set instruction %B1110001110011000, // MD=D-1 @@ -64,7 +74,7 @@ tick, output, tock, output; set instruction %B0000001111101000, // @1000 tick, output, tock, output; -set instruction %B1111010011010000, // D=D-M +set instruction %B1111010011110000, // AD=D-M set inM 11111, tick, output, tock, output; @@ -77,12 +87,268 @@ tick, output, tock, output; set instruction %B0000001111100111, // @999 tick, output, tock, output; -set instruction %B1110110111100000, // A=A+1 +set instruction %B1111110111100000, // A=M+1 +tick, output, tock, output; + +set instruction %B1110001100101000, // AM=D +tick, output, tock, output; + +set instruction %B0000000000010101, // @21 +tick, output, tock, output; + +set instruction %B1110011111000010, // D+1;jeq +tick, output, tock, output; + +set instruction %B0000000000000010, // @2 +tick, output, tock, output; + +set instruction %B1110000010111000, // AMD=D+A +tick, output, tock, output; + +set instruction %B1111110111001000, // M=M+1 +tick, output, tock, output; + +set instruction %B1111110010101000, // AM=M-1 +tick, output, tock, output; + +set instruction %B0000001111101000, // @1000 +tick, output, tock, output; + +set instruction %B1110111010010000, // D=-1 +tick, output, tock, output; + +set instruction %B1110001100000001, // D;JGT +tick, output, tock, output; + +set instruction %B1110001100000010, // D;JEQ +tick, output, tock, output; + +set instruction %B1110001100000011, // D;JGE +tick, output, tock, output; + +set instruction %B1110001100000100, // D;JLT +tick, output, tock, output; + +set instruction %B1110001100000101, // D;JNE +tick, output, tock, output; + +set instruction %B1110001100000110, // D;JLE +tick, output, tock, output; + +set instruction %B1110001100000111, // D;JMP +tick, output, tock, output; + +set instruction %B1110101010010000, // D=0 +tick, output, tock, output; + +set instruction %B1110001100000001, // D;JGT +tick, output, tock, output; + +set instruction %B1110001100000010, // D;JEQ +tick, output, tock, output; + +set instruction %B1110001100000011, // D;JGE +tick, output, tock, output; + +set instruction %B1110001100000100, // D;JLT +tick, output, tock, output; + +set instruction %B1110001100000101, // D;JNE +tick, output, tock, output; + +set instruction %B1110001100000110, // D;JLE +tick, output, tock, output; + +set instruction %B1110001100000111, // D;JMP +tick, output, tock, output; + +set instruction %B1110111111010000, // D=1 +tick, output, tock, output; + +set instruction %B1110001100000001, // D;JGT +tick, output, tock, output; + +set instruction %B1110001100000010, // D;JEQ +tick, output, tock, output; + +set instruction %B1110001100000011, // D;JGE +tick, output, tock, output; + +set instruction %B1110001100000100, // D;JLT +tick, output, tock, output; + +set instruction %B1110001100000101, // D;JNE +tick, output, tock, output; + +set instruction %B1110001100000110, // D;JLE +tick, output, tock, output; + +set instruction %B1110001100000111, // D;JMP +tick, output, tock, output; + +set reset 1; +tick, output, tock, output; + +set instruction %B0111111111111111, // @32767 +set reset 0; +tick, output, tock, output;`; +export const cmp = `|time | inM | instruction |reset| outM |writeM|address| pc |DRegister| +| 0+ | 0|0011000000111001| 0 |*******| 0 | 0 | 0| 0 | +| 1 | 0|0011000000111001| 0 |*******| 0 | 12345 | 1| 0 | +| 1+ | 0|1110110000010000| 0 |*******| 0 | 12345 | 1| 12345 | +| 2 | 0|1110110000010000| 0 |*******| 0 | 12345 | 2| 12345 | +| 2+ | 0|0101101110100000| 0 |*******| 0 | 12345 | 2| 12345 | +| 3 | 0|0101101110100000| 0 |*******| 0 | 23456 | 3| 12345 | +| 3+ | 0|1110000111110000| 0 |*******| 0 | 23456 | 3| 11111 | +| 4 | 0|1110000111110000| 0 |*******| 0 | 11111 | 4| 11111 | +| 4+ | 0|0000001111101011| 0 |*******| 0 | 11111 | 4| 11111 | +| 5 | 0|0000001111101011| 0 |*******| 0 | 1003 | 5| 11111 | +| 5+ | 0|1110001100001000| 0 | 11111| 1 | 1003 | 5| 11111 | +| 6 | 0|1110001100001000| 0 | 11111| 1 | 1003 | 6| 11111 | +| 6+ | 0|0000001111101100| 0 |*******| 0 | 1003 | 6| 11111 | +| 7 | 0|0000001111101100| 0 |*******| 0 | 1004 | 7| 11111 | +| 7+ | 0|1110001110011000| 0 | 11110| 1 | 1004 | 7| 11110 | +| 8 | 0|1110001110011000| 0 | 11109| 1 | 1004 | 8| 11110 | +| 8+ | 0|0000001111101000| 0 |*******| 0 | 1004 | 8| 11110 | +| 9 | 0|0000001111101000| 0 |*******| 0 | 1000 | 9| 11110 | +| 9+ | 11111|1111010011110000| 0 |*******| 0 | 1000 | 9| -1 | +| 10 | 11111|1111010011110000| 0 |*******| 0 | 32767 | 10| -1 | +| 10+ | 11111|0000000000001110| 0 |*******| 0 | 32767 | 10| -1 | +| 11 | 11111|0000000000001110| 0 |*******| 0 | 14 | 11| -1 | +| 11+ | 11111|1110001100000100| 0 |*******| 0 | 14 | 11| -1 | +| 12 | 11111|1110001100000100| 0 |*******| 0 | 14 | 14| -1 | +| 12+ | 11111|0000001111100111| 0 |*******| 0 | 14 | 14| -1 | +| 13 | 11111|0000001111100111| 0 |*******| 0 | 999 | 15| -1 | +| 13+ | 11111|1111110111100000| 0 |*******| 0 | 999 | 15| -1 | +| 14 | 11111|1111110111100000| 0 |*******| 0 | 11112 | 16| -1 | +| 14+ | 11111|1110001100101000| 0 | -1| 1 | 11112 | 16| -1 | +| 15 | 11111|1110001100101000| 0 | -1| 1 | 32767 | 17| -1 | +| 15+ | 11111|0000000000010101| 0 |*******| 0 | 32767 | 17| -1 | +| 16 | 11111|0000000000010101| 0 |*******| 0 | 21 | 18| -1 | +| 16+ | 11111|1110011111000010| 0 |*******| 0 | 21 | 18| -1 | +| 17 | 11111|1110011111000010| 0 |*******| 0 | 21 | 21| -1 | +| 17+ | 11111|0000000000000010| 0 |*******| 0 | 21 | 21| -1 | +| 18 | 11111|0000000000000010| 0 |*******| 0 | 2 | 22| -1 | +| 18+ | 11111|1110000010111000| 0 | 1| 1 | 2 | 22| 1 | +| 19 | 11111|1110000010111000| 0 | 2| 1 | 1 | 23| 1 | +| 19+ | 11111|1111110111001000| 0 | 11112| 1 | 1 | 23| 1 | +| 20 | 11111|1111110111001000| 0 | 11112| 1 | 1 | 24| 1 | +| 20+ | 11111|1111110010101000| 0 | 11110| 1 | 1 | 24| 1 | +| 21 | 11111|1111110010101000| 0 | 11110| 1 | 11110 | 25| 1 | +| 21+ | 11111|0000001111101000| 0 |*******| 0 | 11110 | 25| 1 | +| 22 | 11111|0000001111101000| 0 |*******| 0 | 1000 | 26| 1 | +| 22+ | 11111|1110111010010000| 0 |*******| 0 | 1000 | 26| -1 | +| 23 | 11111|1110111010010000| 0 |*******| 0 | 1000 | 27| -1 | +| 23+ | 11111|1110001100000001| 0 |*******| 0 | 1000 | 27| -1 | +| 24 | 11111|1110001100000001| 0 |*******| 0 | 1000 | 28| -1 | +| 24+ | 11111|1110001100000010| 0 |*******| 0 | 1000 | 28| -1 | +| 25 | 11111|1110001100000010| 0 |*******| 0 | 1000 | 29| -1 | +| 25+ | 11111|1110001100000011| 0 |*******| 0 | 1000 | 29| -1 | +| 26 | 11111|1110001100000011| 0 |*******| 0 | 1000 | 30| -1 | +| 26+ | 11111|1110001100000100| 0 |*******| 0 | 1000 | 30| -1 | +| 27 | 11111|1110001100000100| 0 |*******| 0 | 1000 | 1000| -1 | +| 27+ | 11111|1110001100000101| 0 |*******| 0 | 1000 | 1000| -1 | +| 28 | 11111|1110001100000101| 0 |*******| 0 | 1000 | 1000| -1 | +| 28+ | 11111|1110001100000110| 0 |*******| 0 | 1000 | 1000| -1 | +| 29 | 11111|1110001100000110| 0 |*******| 0 | 1000 | 1000| -1 | +| 29+ | 11111|1110001100000111| 0 |*******| 0 | 1000 | 1000| -1 | +| 30 | 11111|1110001100000111| 0 |*******| 0 | 1000 | 1000| -1 | +| 30+ | 11111|1110101010010000| 0 |*******| 0 | 1000 | 1000| 0 | +| 31 | 11111|1110101010010000| 0 |*******| 0 | 1000 | 1001| 0 | +| 31+ | 11111|1110001100000001| 0 |*******| 0 | 1000 | 1001| 0 | +| 32 | 11111|1110001100000001| 0 |*******| 0 | 1000 | 1002| 0 | +| 32+ | 11111|1110001100000010| 0 |*******| 0 | 1000 | 1002| 0 | +| 33 | 11111|1110001100000010| 0 |*******| 0 | 1000 | 1000| 0 | +| 33+ | 11111|1110001100000011| 0 |*******| 0 | 1000 | 1000| 0 | +| 34 | 11111|1110001100000011| 0 |*******| 0 | 1000 | 1000| 0 | +| 34+ | 11111|1110001100000100| 0 |*******| 0 | 1000 | 1000| 0 | +| 35 | 11111|1110001100000100| 0 |*******| 0 | 1000 | 1001| 0 | +| 35+ | 11111|1110001100000101| 0 |*******| 0 | 1000 | 1001| 0 | +| 36 | 11111|1110001100000101| 0 |*******| 0 | 1000 | 1002| 0 | +| 36+ | 11111|1110001100000110| 0 |*******| 0 | 1000 | 1002| 0 | +| 37 | 11111|1110001100000110| 0 |*******| 0 | 1000 | 1000| 0 | +| 37+ | 11111|1110001100000111| 0 |*******| 0 | 1000 | 1000| 0 | +| 38 | 11111|1110001100000111| 0 |*******| 0 | 1000 | 1000| 0 | +| 38+ | 11111|1110111111010000| 0 |*******| 0 | 1000 | 1000| 1 | +| 39 | 11111|1110111111010000| 0 |*******| 0 | 1000 | 1001| 1 | +| 39+ | 11111|1110001100000001| 0 |*******| 0 | 1000 | 1001| 1 | +| 40 | 11111|1110001100000001| 0 |*******| 0 | 1000 | 1000| 1 | +| 40+ | 11111|1110001100000010| 0 |*******| 0 | 1000 | 1000| 1 | +| 41 | 11111|1110001100000010| 0 |*******| 0 | 1000 | 1001| 1 | +| 41+ | 11111|1110001100000011| 0 |*******| 0 | 1000 | 1001| 1 | +| 42 | 11111|1110001100000011| 0 |*******| 0 | 1000 | 1000| 1 | +| 42+ | 11111|1110001100000100| 0 |*******| 0 | 1000 | 1000| 1 | +| 43 | 11111|1110001100000100| 0 |*******| 0 | 1000 | 1001| 1 | +| 43+ | 11111|1110001100000101| 0 |*******| 0 | 1000 | 1001| 1 | +| 44 | 11111|1110001100000101| 0 |*******| 0 | 1000 | 1000| 1 | +| 44+ | 11111|1110001100000110| 0 |*******| 0 | 1000 | 1000| 1 | +| 45 | 11111|1110001100000110| 0 |*******| 0 | 1000 | 1001| 1 | +| 45+ | 11111|1110001100000111| 0 |*******| 0 | 1000 | 1001| 1 | +| 46 | 11111|1110001100000111| 0 |*******| 0 | 1000 | 1000| 1 | +| 46+ | 11111|1110001100000111| 1 |*******| 0 | 1000 | 1000| 1 | +| 47 | 11111|1110001100000111| 1 |*******| 0 | 1000 | 0| 1 | +| 47+ | 11111|0111111111111111| 0 |*******| 0 | 1000 | 0| 1 | +| 48 | 11111|0111111111111111| 0 |*******| 0 | 32767 | 1| 1 |`; + +export const external_tst = `// This file is part of www.nand2tetris.org +// and the book "The Elements of Computing Systems" +// by Nisan and Schocken, MIT Press. +// File name: projects/5/CPU-external.tst + +// Tests the CPU by setting the instruction input to various binary values that +// code Hack instructions, and outputting the values of the registers that are +// supposed to be affected by the instructions. + +// Tracks the time, the CPU inputs (inM, instruction, reset bit), and the CPU +// outputs (outM, writeM bit, address, pc). +output-list time%S1.3.1 inM%D0.6.0 instruction%B0.16.0 reset%B2.1.2 outM%D1.6.0 writeM%B3.1.2 addressM%D1.5.1 pc%D0.5.0; + +set instruction %B0011000000111001, // @12345 +tick, output, tock, output; + +set instruction %B1110110000010000, // D=A +tick, output, tock, output; + +set instruction %B0101101110100000, // @23456 +tick, output, tock, output; + +set instruction %B1110000111110000, // AD=A-D +tick, output, tock, output; + +set instruction %B0000001111101011, // @1003 tick, output, tock, output; set instruction %B1110001100001000, // M=D tick, output, tock, output; +set instruction %B0000001111101100, // @1004 +tick, output, tock, output; + +set instruction %B1110001110011000, // MD=D-1 +tick, output, tock, output; + +set instruction %B0000001111101000, // @1000 +tick, output, tock, output; + +set instruction %B1111010011110000, // AD=D-M +set inM 11111, +tick, output, tock, output; + +set instruction %B0000000000001110, // @14 +tick, output, tock, output; + +set instruction %B1110001100000100, // D;jlt +tick, output, tock, output; + +set instruction %B0000001111100111, // @999 +tick, output, tock, output; + +set instruction %B1111110111100000, // A=M+1 +tick, output, tock, output; + +set instruction %B1110001100101000, // AM=D +tick, output, tock, output; + set instruction %B0000000000010101, // @21 tick, output, tock, output; @@ -92,7 +358,13 @@ tick, output, tock, output; set instruction %B0000000000000010, // @2 tick, output, tock, output; -set instruction %B1110000010010000, // D=D+A +set instruction %B1110000010111000, // AMD=D+A +tick, output, tock, output; + +set instruction %B1111110111001000, // M=M+1 +tick, output, tock, output; + +set instruction %B1111110010101000, // AM=M-1 tick, output, tock, output; set instruction %B0000001111101000, // @1000 @@ -176,96 +448,101 @@ tick, output, tock, output; set instruction %B0111111111111111, // @32767 set reset 0; tick, output, tock, output;`; -export const cmp = `|time| inM | instruction |reset| outM |writeM |addre| pc |DRegiste| -|0+ | 0|0011000000111001| 0 |*******| 0 | 0| 0| 0 | -|1 | 0|0011000000111001| 0 |*******| 0 |12345| 1| 0 | -|1+ | 0|1110110000010000| 0 |*******| 0 |12345| 1| 0 | -|2 | 0|1110110000010000| 0 |*******| 0 |12345| 2| 12345 | -|2+ | 0|0101101110100000| 0 |*******| 0 |12345| 2| 12345 | -|3 | 0|0101101110100000| 0 |*******| 0 |23456| 3| 12345 | -|3+ | 0|1110000111010000| 0 |*******| 0 |23456| 3| 12345 | -|4 | 0|1110000111010000| 0 |*******| 0 |23456| 4| 11111 | -|4+ | 0|0000001111101000| 0 |*******| 0 |23456| 4| 11111 | -|5 | 0|0000001111101000| 0 |*******| 0 | 1000| 5| 11111 | -|5+ | 0|1110001100001000| 0 | 11111| 1 | 1000| 5| 11111 | -|6 | 0|1110001100001000| 0 | 11111| 1 | 1000| 6| 11111 | -|6+ | 0|0000001111101001| 0 |*******| 0 | 1000| 6| 11111 | -|7 | 0|0000001111101001| 0 |*******| 0 | 1001| 7| 11111 | -|7+ | 0|1110001110011000| 0 | 11110| 1 | 1001| 7| 11111 | -|8 | 0|1110001110011000| 0 | 11109| 1 | 1001| 8| 11110 | -|8+ | 0|0000001111101000| 0 |*******| 0 | 1001| 8| 11110 | -|9 | 0|0000001111101000| 0 |*******| 0 | 1000| 9| 11110 | -|9+ | 11111|1111010011010000| 0 |*******| 0 | 1000| 9| 11110 | -|10 | 11111|1111010011010000| 0 |*******| 0 | 1000| 10| -1 | -|10+ | 11111|0000000000001110| 0 |*******| 0 | 1000| 10| -1 | -|11 | 11111|0000000000001110| 0 |*******| 0 | 14| 11| -1 | -|11+ | 11111|1110001100000100| 0 |*******| 0 | 14| 11| -1 | -|12 | 11111|1110001100000100| 0 |*******| 0 | 14| 14| -1 | -|12+ | 11111|0000001111100111| 0 |*******| 0 | 14| 14| -1 | -|13 | 11111|0000001111100111| 0 |*******| 0 | 999| 15| -1 | -|13+ | 11111|1110110111100000| 0 |*******| 0 | 999| 15| -1 | -|14 | 11111|1110110111100000| 0 |*******| 0 | 1000| 16| -1 | -|14+ | 11111|1110001100001000| 0 | -1| 1 | 1000| 16| -1 | -|15 | 11111|1110001100001000| 0 | -1| 1 | 1000| 17| -1 | -|15+ | 11111|0000000000010101| 0 |*******| 0 | 1000| 17| -1 | -|16 | 11111|0000000000010101| 0 |*******| 0 | 21| 18| -1 | -|16+ | 11111|1110011111000010| 0 |*******| 0 | 21| 18| -1 | -|17 | 11111|1110011111000010| 0 |*******| 0 | 21| 21| -1 | -|17+ | 11111|0000000000000010| 0 |*******| 0 | 21| 21| -1 | -|18 | 11111|0000000000000010| 0 |*******| 0 | 2| 22| -1 | -|18+ | 11111|1110000010010000| 0 |*******| 0 | 2| 22| -1 | -|19 | 11111|1110000010010000| 0 |*******| 0 | 2| 23| 1 | -|19+ | 11111|0000001111101000| 0 |*******| 0 | 2| 23| 1 | -|20 | 11111|0000001111101000| 0 |*******| 0 | 1000| 24| 1 | -|20+ | 11111|1110111010010000| 0 |*******| 0 | 1000| 24| 1 | -|21 | 11111|1110111010010000| 0 |*******| 0 | 1000| 25| -1 | -|21+ | 11111|1110001100000001| 0 |*******| 0 | 1000| 25| -1 | -|22 | 11111|1110001100000001| 0 |*******| 0 | 1000| 26| -1 | -|22+ | 11111|1110001100000010| 0 |*******| 0 | 1000| 26| -1 | -|23 | 11111|1110001100000010| 0 |*******| 0 | 1000| 27| -1 | -|23+ | 11111|1110001100000011| 0 |*******| 0 | 1000| 27| -1 | -|24 | 11111|1110001100000011| 0 |*******| 0 | 1000| 28| -1 | -|24+ | 11111|1110001100000100| 0 |*******| 0 | 1000| 28| -1 | -|25 | 11111|1110001100000100| 0 |*******| 0 | 1000| 1000| -1 | -|25+ | 11111|1110001100000101| 0 |*******| 0 | 1000| 1000| -1 | -|26 | 11111|1110001100000101| 0 |*******| 0 | 1000| 1000| -1 | -|26+ | 11111|1110001100000110| 0 |*******| 0 | 1000| 1000| -1 | -|27 | 11111|1110001100000110| 0 |*******| 0 | 1000| 1000| -1 | -|27+ | 11111|1110001100000111| 0 |*******| 0 | 1000| 1000| -1 | -|28 | 11111|1110001100000111| 0 |*******| 0 | 1000| 1000| -1 | -|28+ | 11111|1110101010010000| 0 |*******| 0 | 1000| 1000| -1 | -|29 | 11111|1110101010010000| 0 |*******| 0 | 1000| 1001| 0 | -|29+ | 11111|1110001100000001| 0 |*******| 0 | 1000| 1001| 0 | -|30 | 11111|1110001100000001| 0 |*******| 0 | 1000| 1002| 0 | -|30+ | 11111|1110001100000010| 0 |*******| 0 | 1000| 1002| 0 | -|31 | 11111|1110001100000010| 0 |*******| 0 | 1000| 1000| 0 | -|31+ | 11111|1110001100000011| 0 |*******| 0 | 1000| 1000| 0 | -|32 | 11111|1110001100000011| 0 |*******| 0 | 1000| 1000| 0 | -|32+ | 11111|1110001100000100| 0 |*******| 0 | 1000| 1000| 0 | -|33 | 11111|1110001100000100| 0 |*******| 0 | 1000| 1001| 0 | -|33+ | 11111|1110001100000101| 0 |*******| 0 | 1000| 1001| 0 | -|34 | 11111|1110001100000101| 0 |*******| 0 | 1000| 1002| 0 | -|34+ | 11111|1110001100000110| 0 |*******| 0 | 1000| 1002| 0 | -|35 | 11111|1110001100000110| 0 |*******| 0 | 1000| 1000| 0 | -|35+ | 11111|1110001100000111| 0 |*******| 0 | 1000| 1000| 0 | -|36 | 11111|1110001100000111| 0 |*******| 0 | 1000| 1000| 0 | -|36+ | 11111|1110111111010000| 0 |*******| 0 | 1000| 1000| 0 | -|37 | 11111|1110111111010000| 0 |*******| 0 | 1000| 1001| 1 | -|37+ | 11111|1110001100000001| 0 |*******| 0 | 1000| 1001| 1 | -|38 | 11111|1110001100000001| 0 |*******| 0 | 1000| 1000| 1 | -|38+ | 11111|1110001100000010| 0 |*******| 0 | 1000| 1000| 1 | -|39 | 11111|1110001100000010| 0 |*******| 0 | 1000| 1001| 1 | -|39+ | 11111|1110001100000011| 0 |*******| 0 | 1000| 1001| 1 | -|40 | 11111|1110001100000011| 0 |*******| 0 | 1000| 1000| 1 | -|40+ | 11111|1110001100000100| 0 |*******| 0 | 1000| 1000| 1 | -|41 | 11111|1110001100000100| 0 |*******| 0 | 1000| 1001| 1 | -|41+ | 11111|1110001100000101| 0 |*******| 0 | 1000| 1001| 1 | -|42 | 11111|1110001100000101| 0 |*******| 0 | 1000| 1000| 1 | -|42+ | 11111|1110001100000110| 0 |*******| 0 | 1000| 1000| 1 | -|43 | 11111|1110001100000110| 0 |*******| 0 | 1000| 1001| 1 | -|43+ | 11111|1110001100000111| 0 |*******| 0 | 1000| 1001| 1 | -|44 | 11111|1110001100000111| 0 |*******| 0 | 1000| 1000| 1 | -|44+ | 11111|1110001100000111| 1 |*******| 0 | 1000| 1000| 1 | -|45 | 11111|1110001100000111| 1 |*******| 0 | 1000| 0| 1 | -|45+ | 11111|0111111111111111| 0 |*******| 0 | 1000| 0| 1 | -|46 | 11111|0111111111111111| 0 |*******| 0 |32767| 1| 1 |`; + +export const external_cmp = `|time | inM | instruction |reset| outM |writeM|address| pc | +| 0+ | 0|0011000000111001| 0 |*******| 0 | 0 | 0| +| 1 | 0|0011000000111001| 0 |*******| 0 | 12345 | 1| +| 1+ | 0|1110110000010000| 0 |*******| 0 | 12345 | 1| +| 2 | 0|1110110000010000| 0 |*******| 0 | 12345 | 2| +| 2+ | 0|0101101110100000| 0 |*******| 0 | 12345 | 2| +| 3 | 0|0101101110100000| 0 |*******| 0 | 23456 | 3| +| 3+ | 0|1110000111110000| 0 |*******| 0 | 23456 | 3| +| 4 | 0|1110000111110000| 0 |*******| 0 | 11111 | 4| +| 4+ | 0|0000001111101011| 0 |*******| 0 | 11111 | 4| +| 5 | 0|0000001111101011| 0 |*******| 0 | 1003 | 5| +| 5+ | 0|1110001100001000| 0 | 11111| 1 | 1003 | 5| +| 6 | 0|1110001100001000| 0 | 11111| 1 | 1003 | 6| +| 6+ | 0|0000001111101100| 0 |*******| 0 | 1003 | 6| +| 7 | 0|0000001111101100| 0 |*******| 0 | 1004 | 7| +| 7+ | 0|1110001110011000| 0 | 11110| 1 | 1004 | 7| +| 8 | 0|1110001110011000| 0 | 11109| 1 | 1004 | 8| +| 8+ | 0|0000001111101000| 0 |*******| 0 | 1004 | 8| +| 9 | 0|0000001111101000| 0 |*******| 0 | 1000 | 9| +| 9+ | 11111|1111010011110000| 0 |*******| 0 | 1000 | 9| +| 10 | 11111|1111010011110000| 0 |*******| 0 | 32767 | 10| +| 10+ | 11111|0000000000001110| 0 |*******| 0 | 32767 | 10| +| 11 | 11111|0000000000001110| 0 |*******| 0 | 14 | 11| +| 11+ | 11111|1110001100000100| 0 |*******| 0 | 14 | 11| +| 12 | 11111|1110001100000100| 0 |*******| 0 | 14 | 14| +| 12+ | 11111|0000001111100111| 0 |*******| 0 | 14 | 14| +| 13 | 11111|0000001111100111| 0 |*******| 0 | 999 | 15| +| 13+ | 11111|1111110111100000| 0 |*******| 0 | 999 | 15| +| 14 | 11111|1111110111100000| 0 |*******| 0 | 11112 | 16| +| 14+ | 11111|1110001100101000| 0 | -1| 1 | 11112 | 16| +| 15 | 11111|1110001100101000| 0 | -1| 1 | 32767 | 17| +| 15+ | 11111|0000000000010101| 0 |*******| 0 | 32767 | 17| +| 16 | 11111|0000000000010101| 0 |*******| 0 | 21 | 18| +| 16+ | 11111|1110011111000010| 0 |*******| 0 | 21 | 18| +| 17 | 11111|1110011111000010| 0 |*******| 0 | 21 | 21| +| 17+ | 11111|0000000000000010| 0 |*******| 0 | 21 | 21| +| 18 | 11111|0000000000000010| 0 |*******| 0 | 2 | 22| +| 18+ | 11111|1110000010111000| 0 | 1| 1 | 2 | 22| +| 19 | 11111|1110000010111000| 0 | 2| 1 | 1 | 23| +| 19+ | 11111|1111110111001000| 0 | 11112| 1 | 1 | 23| +| 20 | 11111|1111110111001000| 0 | 11112| 1 | 1 | 24| +| 20+ | 11111|1111110010101000| 0 | 11110| 1 | 1 | 24| +| 21 | 11111|1111110010101000| 0 | 11110| 1 | 11110 | 25| +| 21+ | 11111|0000001111101000| 0 |*******| 0 | 11110 | 25| +| 22 | 11111|0000001111101000| 0 |*******| 0 | 1000 | 26| +| 22+ | 11111|1110111010010000| 0 |*******| 0 | 1000 | 26| +| 23 | 11111|1110111010010000| 0 |*******| 0 | 1000 | 27| +| 23+ | 11111|1110001100000001| 0 |*******| 0 | 1000 | 27| +| 24 | 11111|1110001100000001| 0 |*******| 0 | 1000 | 28| +| 24+ | 11111|1110001100000010| 0 |*******| 0 | 1000 | 28| +| 25 | 11111|1110001100000010| 0 |*******| 0 | 1000 | 29| +| 25+ | 11111|1110001100000011| 0 |*******| 0 | 1000 | 29| +| 26 | 11111|1110001100000011| 0 |*******| 0 | 1000 | 30| +| 26+ | 11111|1110001100000100| 0 |*******| 0 | 1000 | 30| +| 27 | 11111|1110001100000100| 0 |*******| 0 | 1000 | 1000| +| 27+ | 11111|1110001100000101| 0 |*******| 0 | 1000 | 1000| +| 28 | 11111|1110001100000101| 0 |*******| 0 | 1000 | 1000| +| 28+ | 11111|1110001100000110| 0 |*******| 0 | 1000 | 1000| +| 29 | 11111|1110001100000110| 0 |*******| 0 | 1000 | 1000| +| 29+ | 11111|1110001100000111| 0 |*******| 0 | 1000 | 1000| +| 30 | 11111|1110001100000111| 0 |*******| 0 | 1000 | 1000| +| 30+ | 11111|1110101010010000| 0 |*******| 0 | 1000 | 1000| +| 31 | 11111|1110101010010000| 0 |*******| 0 | 1000 | 1001| +| 31+ | 11111|1110001100000001| 0 |*******| 0 | 1000 | 1001| +| 32 | 11111|1110001100000001| 0 |*******| 0 | 1000 | 1002| +| 32+ | 11111|1110001100000010| 0 |*******| 0 | 1000 | 1002| +| 33 | 11111|1110001100000010| 0 |*******| 0 | 1000 | 1000| +| 33+ | 11111|1110001100000011| 0 |*******| 0 | 1000 | 1000| +| 34 | 11111|1110001100000011| 0 |*******| 0 | 1000 | 1000| +| 34+ | 11111|1110001100000100| 0 |*******| 0 | 1000 | 1000| +| 35 | 11111|1110001100000100| 0 |*******| 0 | 1000 | 1001| +| 35+ | 11111|1110001100000101| 0 |*******| 0 | 1000 | 1001| +| 36 | 11111|1110001100000101| 0 |*******| 0 | 1000 | 1002| +| 36+ | 11111|1110001100000110| 0 |*******| 0 | 1000 | 1002| +| 37 | 11111|1110001100000110| 0 |*******| 0 | 1000 | 1000| +| 37+ | 11111|1110001100000111| 0 |*******| 0 | 1000 | 1000| +| 38 | 11111|1110001100000111| 0 |*******| 0 | 1000 | 1000| +| 38+ | 11111|1110111111010000| 0 |*******| 0 | 1000 | 1000| +| 39 | 11111|1110111111010000| 0 |*******| 0 | 1000 | 1001| +| 39+ | 11111|1110001100000001| 0 |*******| 0 | 1000 | 1001| +| 40 | 11111|1110001100000001| 0 |*******| 0 | 1000 | 1000| +| 40+ | 11111|1110001100000010| 0 |*******| 0 | 1000 | 1000| +| 41 | 11111|1110001100000010| 0 |*******| 0 | 1000 | 1001| +| 41+ | 11111|1110001100000011| 0 |*******| 0 | 1000 | 1001| +| 42 | 11111|1110001100000011| 0 |*******| 0 | 1000 | 1000| +| 42+ | 11111|1110001100000100| 0 |*******| 0 | 1000 | 1000| +| 43 | 11111|1110001100000100| 0 |*******| 0 | 1000 | 1001| +| 43+ | 11111|1110001100000101| 0 |*******| 0 | 1000 | 1001| +| 44 | 11111|1110001100000101| 0 |*******| 0 | 1000 | 1000| +| 44+ | 11111|1110001100000110| 0 |*******| 0 | 1000 | 1000| +| 45 | 11111|1110001100000110| 0 |*******| 0 | 1000 | 1001| +| 45+ | 11111|1110001100000111| 0 |*******| 0 | 1000 | 1001| +| 46 | 11111|1110001100000111| 0 |*******| 0 | 1000 | 1000| +| 46+ | 11111|1110001100000111| 1 |*******| 0 | 1000 | 1000| +| 47 | 11111|1110001100000111| 1 |*******| 0 | 1000 | 0| +| 47+ | 11111|0111111111111111| 0 |*******| 0 | 1000 | 0| +| 48 | 11111|0111111111111111| 0 |*******| 0 | 32767 | 1|`; diff --git a/projects/src/project_05/03_computer.ts b/projects/src/project_05/03_computer.ts index f2f9a3195..e5a576950 100644 --- a/projects/src/project_05/03_computer.ts +++ b/projects/src/project_05/03_computer.ts @@ -1,57 +1,239 @@ export const hdl = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/05/Computer.hdl +// File name: projects/5/Computer.hdl /** * The Hack computer, consisting of CPU, ROM and RAM. - * When reset is 0, the program stored in the ROM executes. - * When reset is 1, the program's execution restarts. + * When reset = 0, the program stored in the ROM executes. + * When reset = 1, the program's execution restarts. * Thus, to start running the currently loaded program, * set reset to 1, and then set it to 0. - * From this point onwards, the user is at the mercy of the software: + * From this point onwards, the user is at the mercy of the software. * Depending on the program's code, and whether the code is correct, * the screen may show some output, the user may be expected to enter * some input using the keyboard, or the program may do some procerssing. */ CHIP Computer { + IN reset; PARTS: //// Replace this comment with your code. }`; -export const tst = `output-list time%S1.4.1 reset%B2.1.2 ARegister[]%D1.7.1 DRegister[]%D1.7.1 PC[]%D0.4.0 RAM16K[0]%D1.7.1 RAM16K[1]%D1.7.1 RAM16K[2]%D1.7.1; +export const add_tst = `// This file is part of www.nand2tetris.org +// and the book "The Elements of Computing Systems" +// by Nisan and Schocken, MIT Press. +// File name: projects/5/ComputerAdd.tst + +// Tests the Computer chip by having it execute the program Add.hack. +// The program adds up the constants 2 and 3 and writes the result in RAM[0]. + +// Tracks the values of the time, reset bit, A-register, D-register, +// program counter, R0, R1, and R2. +output-list time%S1.3.1 reset%B2.1.2 ARegister[0]%D1.7.1 DRegister[0]%D1.7.1 PC[]%D0.4.0 RAM16K[0]%D1.7.1 RAM16K[1]%D1.7.1 RAM16K[2]%D1.7.1; + +// Loads the binary program Add.hack into the computer's instruction memory +ROM32K load Add.hack, +output; + +// First run (at the beginning PC=0) +repeat 6 { + tick, tock, output; +} -// Load a program written in the Hack machine language. -// The program computes the maximum of RAM[0] and RAM[1] -// and writes the result in RAM[2]. +// Resets the PC +set reset 1, +set RAM16K[0] 0, +tick, tock, output; +// Second run, to check that the PC was reset correctly. +set reset 0, + +repeat 6 { + tick, tock, output; +}`; +export const add_cmp = `|time |reset|ARegister|DRegister|PC[]|RAM16K[0]|RAM16K[1]|RAM16K[2]| +| 0 | 0 | 0 | 0 | 0| 0 | 0 | 0 | +| 1 | 0 | 2 | 0 | 1| 0 | 0 | 0 | +| 2 | 0 | 2 | 2 | 2| 0 | 0 | 0 | +| 3 | 0 | 3 | 2 | 3| 0 | 0 | 0 | +| 4 | 0 | 3 | 5 | 4| 0 | 0 | 0 | +| 5 | 0 | 0 | 5 | 5| 0 | 0 | 0 | +| 6 | 0 | 0 | 5 | 6| 5 | 0 | 0 | +| 7 | 1 | 0 | 5 | 0| 0 | 0 | 0 | +| 8 | 0 | 2 | 5 | 1| 0 | 0 | 0 | +| 9 | 0 | 2 | 2 | 2| 0 | 0 | 0 | +| 10 | 0 | 3 | 2 | 3| 0 | 0 | 0 | +| 11 | 0 | 3 | 5 | 4| 0 | 0 | 0 | +| 12 | 0 | 0 | 5 | 5| 0 | 0 | 0 | +| 13 | 0 | 0 | 5 | 6| 5 | 0 | 0 |`; +export const max_tst = `// This file is part of www.nand2tetris.org +// and the book "The Elements of Computing Systems" +// by Nisan and Schocken, MIT Press. +// File name: projects/5/ComputerMax.tst + +// Tests the Computer chip by having it execute the program Max.hack. +// The program computes maximum(R0, R1) and writes the result in RAM[2]. + +// Tracks the values of the time, reset bit, A-register, D-register, +// program counter, R0, R1, and R2. +output-list time%S1.3.1 reset%B2.1.2 ARegister[]%D1.7.1 DRegister[]%D1.7.1 PC[]%D0.4.0 RAM16K[0]%D1.7.1 RAM16K[1]%D1.7.1 RAM16K[2]%D1.7.1; + +// Loads the binary program Add.hack into the computer's instruction memory ROM32K load Max.hack, -// first run: compute max(3,5) -set Memory[0] 3, -set Memory[1] 5, +// first run: computes max(3,5) +set RAM16K[0] 3, +set RAM16K[1] 5, output; repeat 14 { tick, tock, output; } -// reset the PC +// resets the PC set reset 1, tick, tock, output; -// second run: compute max(23456,12345) +// second run: computes max(23456,12345) set reset 0, -set Memory[0] 23456, -set Memory[1] 12345, +set RAM16K[0] 23456, +set RAM16K[1] 12345, output; -// The run on these inputs needs less cycles (different branching) +// The run on these inputs requires less cycles (different branching) repeat 10 { tick, tock, output; } `; -export const hack = `0000000000000000 +export const max_cmp = `|time |reset|ARegister|DRegister|PC[]|RAM16K[0]|RAM16K[1]|RAM16K[2]| +| 0 | 0 | 0 | 0 | 0| 3 | 5 | 0 | +| 1 | 0 | 0 | 0 | 1| 3 | 5 | 0 | +| 2 | 0 | 0 | 3 | 2| 3 | 5 | 0 | +| 3 | 0 | 1 | 3 | 3| 3 | 5 | 0 | +| 4 | 0 | 1 | -2 | 4| 3 | 5 | 0 | +| 5 | 0 | 10 | -2 | 5| 3 | 5 | 0 | +| 6 | 0 | 10 | -2 | 6| 3 | 5 | 0 | +| 7 | 0 | 1 | -2 | 7| 3 | 5 | 0 | +| 8 | 0 | 1 | 5 | 8| 3 | 5 | 0 | +| 9 | 0 | 12 | 5 | 9| 3 | 5 | 0 | +| 10 | 0 | 12 | 5 | 12| 3 | 5 | 0 | +| 11 | 0 | 2 | 5 | 13| 3 | 5 | 0 | +| 12 | 0 | 2 | 5 | 14| 3 | 5 | 5 | +| 13 | 0 | 14 | 5 | 15| 3 | 5 | 5 | +| 14 | 0 | 14 | 5 | 14| 3 | 5 | 5 | +| 15 | 1 | 14 | 5 | 0| 3 | 5 | 5 | +| 15 | 0 | 14 | 5 | 0| 23456 | 12345 | 5 | +| 16 | 0 | 0 | 5 | 1| 23456 | 12345 | 5 | +| 17 | 0 | 0 | 23456 | 2| 23456 | 12345 | 5 | +| 18 | 0 | 1 | 23456 | 3| 23456 | 12345 | 5 | +| 19 | 0 | 1 | 11111 | 4| 23456 | 12345 | 5 | +| 20 | 0 | 10 | 11111 | 5| 23456 | 12345 | 5 | +| 21 | 0 | 10 | 11111 | 10| 23456 | 12345 | 5 | +| 22 | 0 | 0 | 11111 | 11| 23456 | 12345 | 5 | +| 23 | 0 | 0 | 23456 | 12| 23456 | 12345 | 5 | +| 24 | 0 | 2 | 23456 | 13| 23456 | 12345 | 5 | +| 25 | 0 | 2 | 23456 | 14| 23456 | 12345 | 23456 |`; +export const rect_tst = `// This file is part of www.nand2tetris.org +// and the book "The Elements of Computing Systems" +// by Nisan and Schocken, MIT Press. +// File name: projects/5/ComputerRect.tst + +// Tests the Computer chip by having it execute the program Rect.hack. +// The program draws a rectangle of width 16 pixels and length RAM[0] +// at the top left corner of the screen. + +// Tracks the values of the time, A-register, D-register, program counter, R0, R1, and R2. +output-list time%S1.3.1 ARegister[]%D1.7.1 DRegister[]%D1.7.1 PC[]%D0.4.0 RAM16K[0]%D1.7.1 RAM16K[1]%D1.7.1 RAM16K[2]%D1.7.1; + +// Loads the binary program Rect.hack into the computer's instruction memory +ROM32K load Rect.hack, + +echo "Before you run this script, select the 'Screen' option from the 'View' menu"; + +echo "A small rectangle should be drawn at the top left of the screen (the 'Screen' option of the 'View' menu should be selected.)"; + +// Draws a rectangle consisting of 4 rows (each 16 pixels wide) +set RAM16K[0] 4, +output; + +repeat 63 { + tick, tock, output; +}`; +export const rect_cmp = `|time |ARegister|DRegister|PC[]|RAM16K[0]|RAM16K[1]|RAM16K[2]| +| 0 | 0 | 0 | 0| 4 | 0 | 0 | +| 1 | 0 | 0 | 1| 4 | 0 | 0 | +| 2 | 0 | 4 | 2| 4 | 0 | 0 | +| 3 | 23 | 4 | 3| 4 | 0 | 0 | +| 4 | 23 | 4 | 4| 4 | 0 | 0 | +| 5 | 16 | 4 | 5| 4 | 0 | 0 | +| 6 | 16 | 4 | 6| 4 | 0 | 0 | +| 7 | 16384 | 4 | 7| 4 | 0 | 0 | +| 8 | 16384 | 16384 | 8| 4 | 0 | 0 | +| 9 | 17 | 16384 | 9| 4 | 0 | 0 | +| 10 | 17 | 16384 | 10| 4 | 0 | 0 | +| 11 | 17 | 16384 | 11| 4 | 0 | 0 | +| 12 | 16384 | 16384 | 12| 4 | 0 | 0 | +| 13 | 16384 | 16384 | 13| 4 | 0 | 0 | +| 14 | 17 | 16384 | 14| 4 | 0 | 0 | +| 15 | 17 | 16384 | 15| 4 | 0 | 0 | +| 16 | 32 | 16384 | 16| 4 | 0 | 0 | +| 17 | 32 | 16416 | 17| 4 | 0 | 0 | +| 18 | 17 | 16416 | 18| 4 | 0 | 0 | +| 19 | 17 | 16416 | 19| 4 | 0 | 0 | +| 20 | 16 | 16416 | 20| 4 | 0 | 0 | +| 21 | 16 | 3 | 21| 4 | 0 | 0 | +| 22 | 10 | 3 | 22| 4 | 0 | 0 | +| 23 | 10 | 3 | 10| 4 | 0 | 0 | +| 24 | 17 | 3 | 11| 4 | 0 | 0 | +| 25 | 16416 | 3 | 12| 4 | 0 | 0 | +| 26 | 16416 | 3 | 13| 4 | 0 | 0 | +| 27 | 17 | 3 | 14| 4 | 0 | 0 | +| 28 | 17 | 16416 | 15| 4 | 0 | 0 | +| 29 | 32 | 16416 | 16| 4 | 0 | 0 | +| 30 | 32 | 16448 | 17| 4 | 0 | 0 | +| 31 | 17 | 16448 | 18| 4 | 0 | 0 | +| 32 | 17 | 16448 | 19| 4 | 0 | 0 | +| 33 | 16 | 16448 | 20| 4 | 0 | 0 | +| 34 | 16 | 2 | 21| 4 | 0 | 0 | +| 35 | 10 | 2 | 22| 4 | 0 | 0 | +| 36 | 10 | 2 | 10| 4 | 0 | 0 | +| 37 | 17 | 2 | 11| 4 | 0 | 0 | +| 38 | 16448 | 2 | 12| 4 | 0 | 0 | +| 39 | 16448 | 2 | 13| 4 | 0 | 0 | +| 40 | 17 | 2 | 14| 4 | 0 | 0 | +| 41 | 17 | 16448 | 15| 4 | 0 | 0 | +| 42 | 32 | 16448 | 16| 4 | 0 | 0 | +| 43 | 32 | 16480 | 17| 4 | 0 | 0 | +| 44 | 17 | 16480 | 18| 4 | 0 | 0 | +| 45 | 17 | 16480 | 19| 4 | 0 | 0 | +| 46 | 16 | 16480 | 20| 4 | 0 | 0 | +| 47 | 16 | 1 | 21| 4 | 0 | 0 | +| 48 | 10 | 1 | 22| 4 | 0 | 0 | +| 49 | 10 | 1 | 10| 4 | 0 | 0 | +| 50 | 17 | 1 | 11| 4 | 0 | 0 | +| 51 | 16480 | 1 | 12| 4 | 0 | 0 | +| 52 | 16480 | 1 | 13| 4 | 0 | 0 | +| 53 | 17 | 1 | 14| 4 | 0 | 0 | +| 54 | 17 | 16480 | 15| 4 | 0 | 0 | +| 55 | 32 | 16480 | 16| 4 | 0 | 0 | +| 56 | 32 | 16512 | 17| 4 | 0 | 0 | +| 57 | 17 | 16512 | 18| 4 | 0 | 0 | +| 58 | 17 | 16512 | 19| 4 | 0 | 0 | +| 59 | 16 | 16512 | 20| 4 | 0 | 0 | +| 60 | 16 | 0 | 21| 4 | 0 | 0 | +| 61 | 10 | 0 | 22| 4 | 0 | 0 | +| 62 | 10 | 0 | 23| 4 | 0 | 0 | +| 63 | 23 | 0 | 24| 4 | 0 | 0 |`; +export const add = ` +0000000000000010 +1110110000010000 +0000000000000011 +1110000010010000 +0000000000000000 +1110001100001000 +`; +export const max = `0000000000000000 1111110000010000 0000000000000001 1111010011010000 @@ -67,31 +249,29 @@ export const hack = `0000000000000000 1110001100001000 0000000000001110 1110101010000111`; -export const cmp = `| time |reset|ARegister|DRegister|PC[]|RAM16K[0]|RAM16K[1]|RAM16K[2]| -| 0 | 0 | 0 | 0 | 0| 3 | 5 | 0 | -| 1 | 0 | 0 | 0 | 1| 3 | 5 | 0 | -| 2 | 0 | 0 | 3 | 2| 3 | 5 | 0 | -| 3 | 0 | 1 | 3 | 3| 3 | 5 | 0 | -| 4 | 0 | 1 | -2 | 4| 3 | 5 | 0 | -| 5 | 0 | 10 | -2 | 5| 3 | 5 | 0 | -| 6 | 0 | 10 | -2 | 6| 3 | 5 | 0 | -| 7 | 0 | 1 | -2 | 7| 3 | 5 | 0 | -| 8 | 0 | 1 | 5 | 8| 3 | 5 | 0 | -| 9 | 0 | 12 | 5 | 9| 3 | 5 | 0 | -| 10 | 0 | 12 | 5 | 12| 3 | 5 | 0 | -| 11 | 0 | 2 | 5 | 13| 3 | 5 | 0 | -| 12 | 0 | 2 | 5 | 14| 3 | 5 | 5 | -| 13 | 0 | 14 | 5 | 15| 3 | 5 | 5 | -| 14 | 0 | 14 | 5 | 14| 3 | 5 | 5 | -| 15 | 1 | 14 | 5 | 0| 3 | 5 | 5 | -| 15 | 0 | 14 | 5 | 0| 23456 | 12345 | 5 | -| 16 | 0 | 0 | 5 | 1| 23456 | 12345 | 5 | -| 17 | 0 | 0 | 23456 | 2| 23456 | 12345 | 5 | -| 18 | 0 | 1 | 23456 | 3| 23456 | 12345 | 5 | -| 19 | 0 | 1 | 11111 | 4| 23456 | 12345 | 5 | -| 20 | 0 | 10 | 11111 | 5| 23456 | 12345 | 5 | -| 21 | 0 | 10 | 11111 | 10| 23456 | 12345 | 5 | -| 22 | 0 | 0 | 11111 | 11| 23456 | 12345 | 5 | -| 23 | 0 | 0 | 23456 | 12| 23456 | 12345 | 5 | -| 24 | 0 | 2 | 23456 | 13| 23456 | 12345 | 5 | -| 25 | 0 | 2 | 23456 | 14| 23456 | 12345 | 23456 |`; +export const rect = ` +0000000000000000 +1111110000010000 +0000000000010111 +1110001100000110 +0000000000010000 +1110001100001000 +0100000000000000 +1110110000010000 +0000000000010001 +1110001100001000 +0000000000010001 +1111110000100000 +1110111010001000 +0000000000010001 +1111110000010000 +0000000000100000 +1110000010010000 +0000000000010001 +1110001100001000 +0000000000010000 +1111110010011000 +0000000000001010 +1110001100000001 +0000000000010111 +1110101010000111`; diff --git a/projects/src/project_05/index.ts b/projects/src/project_05/index.ts index f2b1fc9bf..ca4871977 100644 --- a/projects/src/project_05/index.ts +++ b/projects/src/project_05/index.ts @@ -20,11 +20,17 @@ export const CHIPS = { "CPU.hdl": CPU.hdl, "CPU.tst": CPU.tst, "CPU.cmp": CPU.cmp, + "CPU-external.tst": CPU.external_tst, + "CPU-external.cmp": CPU.external_cmp, }, Computer: { "Computer.hdl": Computer.hdl, - "Computer.tst": Computer.tst, - "Computer.cmp": Computer.cmp, + "Computer.tst": Computer.add_tst, + "Computer.cmp": Computer.add_cmp, + "ComputerMax.tst": Computer.max_tst, + "ComputerMax.cmp": Computer.max_cmp, + "ComputerRect.tst": Computer.rect_tst, + "ComputerRect.cmp": Computer.rect_cmp, }, }; @@ -42,14 +48,16 @@ export async function resetFiles(fs: FileSystem): Promise { await fs.popd(); // Add files needed for the test scripts to run - await fs.pushd("/test"); - await fs.writeFile("Max.hack", Computer.hack); + await fs.pushd("/samples"); + await fs.writeFile("Add.hack", Computer.add); + await fs.writeFile("Max.hack", Computer.max); + await fs.writeFile("Rect.hack", Computer.rect); await fs.popd(); } export async function resetTests(fs: FileSystem): Promise { await fs.pushd("/projects/05"); - await resetBySuffix(fs, CHIPS, "tst"); - await resetBySuffix(fs, CHIPS, "cmp"); + await resetBySuffix(fs, CHIPS, ".tst"); + await resetBySuffix(fs, CHIPS, ".cmp"); await fs.popd(); } diff --git a/projects/src/project_07/11_simple_add.ts b/projects/src/project_07/11_simple_add.ts index 9b842cc11..9865c8715 100644 --- a/projects/src/project_07/11_simple_add.ts +++ b/projects/src/project_07/11_simple_add.ts @@ -1,9 +1,10 @@ export const vm = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/07/StackArithmetic/SimpleAdd/SimpleAdd.vm +// File name: projects/7/StackArithmetic/SimpleAdd/SimpleAdd.vm // Pushes and adds two constants. + push constant 7 push constant 8 add @@ -12,39 +13,36 @@ add export const vm_tst = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/07/StackArithmetic/SimpleAdd/SimpleAddVME.tst +// File name: projects/7/StackArithmetic/SimpleAdd/SimpleAddVME.tst -load SimpleAdd.vm, -output-file SimpleAdd.out, -compare-to SimpleAdd.cmp, -output-list RAM[0]%D2.6.2 RAM[256]%D2.6.2; +// Tests and illustrates SimpleAdd.vm on the VM simulator. -set RAM[0] 256; // initializes the stack pointer +set RAM[0] 256, // initializes the stack pointer -repeat 3 { // SimpleAdd.vm has 3 instructions +repeat 3 { // SimpleAdd.vm has 3 VM commands vmstep; } -output; // the stack pointer and the stack base -`; +// Outputs the stack pointer and the value at the stack's base +output-list RAM[0]%D2.6.2 RAM[256]%D2.6.2; +output;`; export const hdl_tst = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/07/StackArithmetic/SimpleAdd/SimpleAdd.tst +// File name: projects/7/StackArithmetic/SimpleAdd/SimpleAdd.tst -load SimpleAdd.asm, -output-file SimpleAdd.out, -compare-to SimpleAdd.cmp, -output-list RAM[0]%D2.6.2 RAM[256]%D2.6.2; +// Tests SimpleAdd.asm on the CPU emulator. -set RAM[0] 256; // initializes the stack pointer +set RAM[0] 256, // initializes the stack pointer repeat 60 { // enough cycles to complete the execution ticktock; } -output; // the stack pointer and the stack base +// Outputs the stack pointer and the value at the stack's base +output-list RAM[0]%D2.6.2 RAM[256]%D2.6.2; +output; `; export const cmp = `| RAM[0] | RAM[256] | diff --git a/projects/src/project_07/12_stack_test.ts b/projects/src/project_07/12_stack_test.ts index 4c1812fce..8a8c8d737 100644 --- a/projects/src/project_07/12_stack_test.ts +++ b/projects/src/project_07/12_stack_test.ts @@ -1,10 +1,10 @@ export const vm = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/07/StackArithmetic/StackTest/StackTest.vm +// File name: projects/7/StackArithmetic/StackTest/StackTest.vm + +// Executes a sequence of arithmetic and logical operations on the stack. -// Executes a sequence of arithmetic and logical operations -// on the stack. push constant 17 push constant 17 eq @@ -48,22 +48,19 @@ not export const vm_tst = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/07/StackArithmetic/StackTest/StackTestVME.tst +// File name: projects/7/StackArithmetic/StackTest/StackTestVME.tst -load StackTest.vm, -output-file StackTest.out, -compare-to StackTest.cmp, -output-list RAM[0]%D2.6.2 - RAM[256]%D2.6.2 RAM[257]%D2.6.2 RAM[258]%D2.6.2 RAM[259]%D2.6.2 RAM[260]%D2.6.2; +// Tests and illustrates StackTest.vm on the VM simulator. -set RAM[0] 256; // initializes the stack pointer +set RAM[0] 256, // initializes the stack pointer -repeat 38 { // StackTest.vm consists of 38 instructions +repeat 38 { // StackTest.vm has 38 VM commands vmstep; } -// outputs the stack pointer (RAM[0]) and -// the stack contents: RAM[256]-RAM[265] +// Outputs the stack pointer (RAM[0]) and the stack contents: RAM[256]-RAM[265] +output-list RAM[0]%D2.6.2 + RAM[256]%D2.6.2 RAM[257]%D2.6.2 RAM[258]%D2.6.2 RAM[259]%D2.6.2 RAM[260]%D2.6.2; output; output-list RAM[261]%D2.6.2 RAM[262]%D2.6.2 RAM[263]%D2.6.2 RAM[264]%D2.6.2 RAM[265]%D2.6.2; output; @@ -72,13 +69,9 @@ output; export const hdl_tst = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/07/StackArithmetic/StackTest/StackTest.tst +// File name: projects/7/StackArithmetic/StackTest/StackTest.tst -load StackTest.asm, -output-file StackTest.out, -compare-to StackTest.cmp, -output-list RAM[0]%D2.6.2 - RAM[256]%D2.6.2 RAM[257]%D2.6.2 RAM[258]%D2.6.2 RAM[259]%D2.6.2 RAM[260]%D2.6.2; +// Tests StackTest.asm on the CPU emulator. set RAM[0] 256, // initializes the stack pointer @@ -86,8 +79,9 @@ repeat 1000 { // enough cycles to complete the execution ticktock; } -// outputs the stack pointer (RAM[0]) and -// the stack contents: RAM[256]-RAM[265] +// Outputs the stack pointer and the stack contents: RAM[256]-RAM[265] +output-list RAM[0]%D2.6.2 + RAM[256]%D2.6.2 RAM[257]%D2.6.2 RAM[258]%D2.6.2 RAM[259]%D2.6.2 RAM[260]%D2.6.2; output; output-list RAM[261]%D2.6.2 RAM[262]%D2.6.2 RAM[263]%D2.6.2 RAM[264]%D2.6.2 RAM[265]%D2.6.2; output; diff --git a/projects/src/project_07/21_basic_test.ts b/projects/src/project_07/21_basic_test.ts index 86b57ece1..bc5a8bb61 100644 --- a/projects/src/project_07/21_basic_test.ts +++ b/projects/src/project_07/21_basic_test.ts @@ -1,9 +1,10 @@ export const vm = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/07/MemoryAccess/BasicTest/BasicTest.vm +// File name: projects/7/MemoryAccess/BasicTest/BasicTest.vm + +// Executes pop and push commands. -// Executes pop and push commands using the virtual memory segments. push constant 10 pop local 0 push constant 21 @@ -34,57 +35,52 @@ add export const vm_tst = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/07/MemoryAccess/BasicTest/BasicTestVME.tst +// File name: projects/7/MemoryAccess/BasicTest/BasicTestVME.tst -load BasicTest.vm, -output-file BasicTest.out, -compare-to BasicTest.cmp, -output-list RAM[256]%D1.6.1 RAM[300]%D1.6.1 RAM[401]%D1.6.1 - RAM[402]%D1.6.1 RAM[3006]%D1.6.1 RAM[3012]%D1.6.1 - RAM[3015]%D1.6.1 RAM[11]%D1.6.1; +// Tests and illustrates BasicTest.vm on the VM simulator. +// Starts by setting the stack pointer and the base addresses +// of relevant memory segments to selected RAM addresses. set sp 256, // stack pointer set local 300, // base address of the local segment set argument 400, // base address of the argument segment set this 3000, // base address of the this segment -set that 3010; // base address of the that segment +set that 3010, // base address of the that segment -repeat 25 { // BasicTest.vm has 25 instructions +repeat 25 { // BasicTest.vm has 25 VM commands vmstep; } -// Outputs the stack base and some values -// from the tested memory segments +// Outputs the value at the stack's base and some values from the tested memory segments +output-list RAM[256]%D1.6.1 RAM[300]%D1.6.1 RAM[401]%D1.6.1 + RAM[402]%D1.6.1 RAM[3006]%D1.6.1 RAM[3012]%D1.6.1 + RAM[3015]%D1.6.1 RAM[11]%D1.6.1; output; `; export const hdl_tst = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/07/MemoryAccess/BasicTest/BasicTest.tst +// File name: projects/7/MemoryAccess/BasicTest/BasicTest.tst -load BasicTest.asm, -output-file BasicTest.out, -compare-to BasicTest.cmp, -output-list RAM[256]%D1.6.1 RAM[300]%D1.6.1 RAM[401]%D1.6.1 - RAM[402]%D1.6.1 RAM[3006]%D1.6.1 RAM[3012]%D1.6.1 - RAM[3015]%D1.6.1 RAM[11]%D1.6.1; +// Tests BasicTest.asm on the CPU emulator. set RAM[0] 256, // stack pointer set RAM[1] 300, // base address of the local segment set RAM[2] 400, // base address of the argument segment set RAM[3] 3000, // base address of the this segment -set RAM[4] 3010; // base address of the that segment +set RAM[4] 3010, // base address of the that segment repeat 600 { // enough cycles to complete the execution ticktock; } -// Outputs the stack base and some values -// from the tested memory segments +// Outputs the value at the stack's base and some values from the tested memory segments +output-list RAM[256]%D1.6.1 RAM[300]%D1.6.1 RAM[401]%D1.6.1 + RAM[402]%D1.6.1 RAM[3006]%D1.6.1 RAM[3012]%D1.6.1 + RAM[3015]%D1.6.1 RAM[11]%D1.6.1; output; `; export const cmp = `|RAM[256]|RAM[300]|RAM[401]|RAM[402]|RAM[3006|RAM[3012|RAM[3015|RAM[11] | -| 472 | 10 | 21 | 22 | 36 | 42 | 45 | 510 | -`; +| 472 | 10 | 21 | 22 | 36 | 42 | 45 | 510 |`; diff --git a/projects/src/project_07/22_pointer_test.ts b/projects/src/project_07/22_pointer_test.ts index a7c46981d..d49f1599b 100644 --- a/projects/src/project_07/22_pointer_test.ts +++ b/projects/src/project_07/22_pointer_test.ts @@ -1,10 +1,11 @@ export const vm = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/07/MemoryAccess/PointerTest/PointerTest.vm +// File name: projects/7/MemoryAccess/PointerTest/PointerTest.vm // Executes pop and push commands using the // pointer, this, and that segments. + push constant 3030 pop pointer 0 push constant 3040 @@ -25,47 +26,42 @@ add export const vm_tst = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/07/MemoryAccess/PointerTest/PointerTestVME.tst +// File name: projects/7/MemoryAccess/PointerTest/PointerTestVME.tst -load PointerTest.vm, -output-file PointerTest.out, -compare-to PointerTest.cmp, -output-list RAM[256]%D1.6.1 RAM[3]%D1.6.1 RAM[4]%D1.6.1 - RAM[3032]%D1.6.1 RAM[3046]%D1.6.1; +// Tests and illustrates PointerTest.vm on the VM simulator. -set RAM[0] 256; // initializes the stack pointer +set RAM[0] 256, // initializes the stack pointer -repeat 15 { // PointerTest.vm has 15 instructions +repeat 15 { // PointerTest.vm has 15 VM commands vmstep; } -// outputs the stack base, this, that, and +// Outputs the stack base, THIS, THAT, and // some values from the the this and that segments +output-list RAM[256]%D1.6.1 RAM[3]%D1.6.1 RAM[4]%D1.6.1 + RAM[3032]%D1.6.1 RAM[3046]%D1.6.1; output; `; export const hdl_tst = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/07/MemoryAccess/PointerTest/PointerTest.tst +// File name: projects/7/MemoryAccess/PointerTest/PointerTest.tst -load PointerTest.asm, -output-file PointerTest.out, -compare-to PointerTest.cmp, -output-list RAM[256]%D1.6.1 RAM[3]%D1.6.1 - RAM[4]%D1.6.1 RAM[3032]%D1.6.1 RAM[3046]%D1.6.1; +// Tests PointerTest.asm on the CPU emulator. -set RAM[0] 256; // initializes the stack pointer +set RAM[0] 256, // initializes the stack pointer repeat 450 { // enough cycles to complete the execution ticktock; } -// outputs the stack base, this, that, and +// Outputs the value at the stack's base, THIS, THAT, and // some values from the the this and that segments +output-list RAM[256]%D1.6.1 RAM[3]%D1.6.1 + RAM[4]%D1.6.1 RAM[3032]%D1.6.1 RAM[3046]%D1.6.1; output; `; export const cmp = `|RAM[256]| RAM[3] | RAM[4] |RAM[3032|RAM[3046| -| 6084 | 3030 | 3040 | 32 | 46 | -`; + | 6084 | 3030 | 3040 | 32 | 46 |`; diff --git a/projects/src/project_07/23_static_test.ts b/projects/src/project_07/23_static_test.ts index 0733d811d..d57b7ad7f 100644 --- a/projects/src/project_07/23_static_test.ts +++ b/projects/src/project_07/23_static_test.ts @@ -1,9 +1,10 @@ export const vm = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/07/MemoryAccess/StaticTest/StaticTest.vm +// File name: projects/7/MemoryAccess/StaticTest/StaticTest.vm // Executes pop and push commands using the static segment. + push constant 111 push constant 333 push constant 888 @@ -20,39 +21,38 @@ add export const vm_tst = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/07/MemoryAccess/StaticTest/StaticTestVME.tst +// File name: projects/7/MemoryAccess/StaticTest/StaticTestVME.tst -load StaticTest.vm, -output-file StaticTest.out, -compare-to StaticTest.cmp, -output-list RAM[256]%D1.6.1; +// Tests and illustrates StaticTest.vm on the VM simulator. -repeat 11 { // StaticTest.vm has 11 instructions +set sp 256, // initializes the stack pointer + +repeat 11 { // StaticTest.vm has 11 VM commands vmstep; } -output; // the stack base +// Outputs the value at the stack's base +output-list RAM[256]%D1.6.1; +output; `; export const hdl_tst = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/07/MemoryAccess/StaticTest/StaticTest.tst +// File name: projects/7/MemoryAccess/StaticTest/StaticTest.tst -load StaticTest.asm, -output-file StaticTest.out, -compare-to StaticTest.cmp, -output-list RAM[256]%D1.6.1; +// Tests StaticTest.asm on the CPU emulator. -set RAM[0] 256; // initializes the stack pointer +set RAM[0] 256, // initializes the stack pointer repeat 200 { // enough cycles to complete the execution ticktock; } -output; // the stack base +// Outputs the value at the stack's base +output-list RAM[256]%D1.6.1; +output; `; export const cmp = `|RAM[256]| -| 1110 | -`; +| 1110 |`; diff --git a/projects/src/project_07/index.ts b/projects/src/project_07/index.ts index c5cf881a7..f7504afa0 100644 --- a/projects/src/project_07/index.ts +++ b/projects/src/project_07/index.ts @@ -47,7 +47,8 @@ export async function resetFiles(fs: FileSystem): Promise { export async function resetTests(fs: FileSystem): Promise { await fs.pushd("/projects/07"); - await resetBySuffix(fs, VMS, "tst"); - await resetBySuffix(fs, VMS, "cmp"); + await resetBySuffix(fs, VMS, ".tst"); + await resetBySuffix(fs, VMS, "VME.tst"); + await resetBySuffix(fs, VMS, ".cmp"); await fs.popd(); } diff --git a/projects/src/project_08/11_basic_loop.ts b/projects/src/project_08/11_basic_loop.ts index 00a35f792..0d5c5a14c 100644 --- a/projects/src/project_08/11_basic_loop.ts +++ b/projects/src/project_08/11_basic_loop.ts @@ -1,68 +1,73 @@ export const vm = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/08/ProgramFlow/BasicLoop/BasicLoop.vm +// File name: projects/8/ProgramFlow/BasicLoop/BasicLoop.vm -// Computes the sum 1 + 2 + ... + argument[0] and pushes the -// result onto the stack. Argument[0] is initialized by the test -// script before this code starts running. -push constant 0 -pop local 0 // initializes sum = 0 -label LOOP_START -push argument 0 -push local 0 -add -pop local 0 // sum = sum + counter -push argument 0 -push constant 1 -sub -pop argument 0 // counter-- -push argument 0 -if-goto LOOP_START // If counter != 0, goto LOOP_START -push local 0 +// Computes the sum 1 + 2 + ... + n and pushes the result onto +// the stack. The value n is given in argument[0], which must be +// initialized by the caller of this code. + + push constant 0 + pop local 0 // sum = 0 +label LOOP + push argument 0 + push local 0 + add + pop local 0 // sum = sum + n + push argument 0 + push constant 1 + sub + pop argument 0 // n-- + push argument 0 + if-goto LOOP // if n > 0, goto LOOP + push local 0 // else, pushes sum to the stack's top `; export const vm_tst = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/08/ProgramFlow/BasicLoop/BasicLoopVME.tst +// File name: projects/8/ProgramFlow/BasicLoop/BasicLoopVME.tst -load BasicLoop.vm, -output-file BasicLoop.out, -compare-to BasicLoop.cmp, -output-list RAM[0]%D1.6.1 RAM[256]%D1.6.1; +// Tests and illustrates BasicLoop.vm on the VM emulator. +// Before executing the code, initializes the stack pointer +// and the base addresses of the local and argument segments, +// and sets argument[0]. set sp 256, set local 300, set argument 400, -set argument[0] 3; +set argument[0] 3, -repeat 34 { - vmstep; +repeat 33 { + vmstep; } +// Outputs the stack pointer and the value at the stack's base +output-list RAM[0]%D1.6.1 RAM[256]%D1.6.1; output; `; export const hdl_tst = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/08/ProgramFlow/BasicLoop/BasicLoop.tst +// File name: projects/8/ProgramFlow/BasicLoop/BasicLoop.tst -load BasicLoop.asm, -output-file BasicLoop.out, -compare-to BasicLoop.cmp, -output-list RAM[0]%D1.6.1 RAM[256]%D1.6.1; +// Tests BasicLoop.asm on the CPU emulator. +// Before executing the code, initializes the stack pointer +// and the base addresses of the local and argument segments, +// and sets argument[0]. -set RAM[0] 256, -set RAM[1] 300, -set RAM[2] 400, -set RAM[400] 3; +set RAM[0] 256, // SP +set RAM[1] 300, // LCL +set RAM[2] 400, // ARG +set RAM[400] 3, // argument 0 repeat 600 { - ticktock; + ticktock; } +// Outputs the stack pointer and the value at the stack's base +output-list RAM[0]%D1.6.1 RAM[256]%D1.6.1; output; `; diff --git a/projects/src/project_08/12_fibonacci_series.ts b/projects/src/project_08/12_fibonacci_series.ts index c95d7c679..27a0cf7ea 100644 --- a/projects/src/project_08/12_fibonacci_series.ts +++ b/projects/src/project_08/12_fibonacci_series.ts @@ -52,48 +52,53 @@ label END_PROGRAM export const vm_tst = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/08/ProgramFlow/FibonacciSeries/FibonacciSeriesVME.tst +// File name: projects/8/ProgramFlow/FibonacciSeries/FibonacciSeriesVME.tst -load FibonacciSeries.vm, -output-file FibonacciSeries.out, -compare-to FibonacciSeries.cmp, -output-list RAM[3000]%D1.6.2 RAM[3001]%D1.6.2 RAM[3002]%D1.6.2 - RAM[3003]%D1.6.2 RAM[3004]%D1.6.2 RAM[3005]%D1.6.2; +// Tests and illustrates FibonacciSeries.vm on the VM emulator. +// Before executing the code, initializes the stack pointer +// and the base addresses of the local and argument segments, +// and sets argument[0] to n and argument [1] to the base address +// of the generated series. set sp 256, set local 300, set argument 400, set argument[0] 6, -set argument[1] 3000; +set argument[1] 3000, repeat 73 { - vmstep; + vmstep; } +// Outputs the series of values generated and written by the code. +output-list RAM[3000]%D1.6.2 RAM[3001]%D1.6.2 RAM[3002]%D1.6.2 + RAM[3003]%D1.6.2 RAM[3004]%D1.6.2 RAM[3005]%D1.6.2; output; `; export const hdl_tst = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/08/ProgramFlow/FibonacciSeries/FibonacciSeries.tst +// File name: projects/8/ProgramFlow/FibonacciSeries/FibonacciSeries.tst -load FibonacciSeries.asm, -output-file FibonacciSeries.out, -compare-to FibonacciSeries.cmp, -output-list RAM[3000]%D1.6.2 RAM[3001]%D1.6.2 RAM[3002]%D1.6.2 - RAM[3003]%D1.6.2 RAM[3004]%D1.6.2 RAM[3005]%D1.6.2; +// Tests FibonacciSeries.asm on the CPU emulator. +// Before executing the code, initializes the stack pointer +// and the base addresses of the local and argument segments, +// and sets argument[0] and argument [1]. -set RAM[0] 256, -set RAM[1] 300, -set RAM[2] 400, -set RAM[400] 6, -set RAM[401] 3000, +set RAM[0] 256, // SP +set RAM[1] 300, // LCL +set RAM[2] 400, // ARG +set RAM[400] 6, // argument[0], n +set RAM[401] 3000, // argument[1], base address of the generated series repeat 1100 { - ticktock; + ticktock; } +// Outputs the series of values generated and written by the code. +output-list RAM[3000]%D1.6.2 RAM[3001]%D1.6.2 RAM[3002]%D1.6.2 + RAM[3003]%D1.6.2 RAM[3004]%D1.6.2 RAM[3005]%D1.6.2; output; `; diff --git a/projects/src/project_08/20_simple_function.ts b/projects/src/project_08/20_simple_function.ts index bec658bc0..0639f0dea 100644 --- a/projects/src/project_08/20_simple_function.ts +++ b/projects/src/project_08/20_simple_function.ts @@ -19,13 +19,12 @@ return export const vm_tst = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/08/FunctionCalls/SimpleFunction/SimpleFunctionVME.tst +// File name: projects/8/FunctionCalls/SimpleFunction/SimpleFunctionVME.tst -load SimpleFunction.vm, -output-file SimpleFunction.out, -compare-to SimpleFunction.cmp, -output-list RAM[0]%D1.6.1 RAM[1]%D1.6.1 RAM[2]%D1.6.1 - RAM[3]%D1.6.1 RAM[4]%D1.6.1 RAM[310]%D1.6.1; +// Tests and illustrates SimpleFunction.vm in the VM emulator. +// Before executing the code, initializes the stack pointer +// and the base addresses of some of the memory segments, +// and sets some values in the argument segment. set sp 317, set local 317, @@ -38,43 +37,50 @@ set argument[2] 9, set argument[3] 305, set argument[4] 300, set argument[5] 3010, -set argument[6] 4010; +set argument[6] 4010, repeat 10 { - vmstep; + vmstep; } +// Outputs SP, LCL, ARG, THIS, THAT, and the return value. +output-list RAM[0]%D1.6.1 RAM[1]%D1.6.1 RAM[2]%D1.6.1 + RAM[3]%D1.6.1 RAM[4]%D1.6.1 RAM[310]%D1.6.1; output; `; export const hdl_tst = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/08/FunctionCalls/SimpleFunction/SimpleFunction.tst +// File name: projects/8/FunctionCalls/SimpleFunction/SimpleFunction.tst -load SimpleFunction.asm, -output-file SimpleFunction.out, -compare-to SimpleFunction.cmp, -output-list RAM[0]%D1.6.1 RAM[1]%D1.6.1 RAM[2]%D1.6.1 - RAM[3]%D1.6.1 RAM[4]%D1.6.1 RAM[310]%D1.6.1; +// Tests SimpleFunction.asm in the CPU emulator. +// In particular, tests how the assembly implementation of the 'function' +// VM command initializes local variables, and how the assembly implementation +// of the 'return' VM command handles the return value, SP, LCL, ARG, THIS, and THAT. +// Before executing the code, initializes the stack pointer and the pointers of some +// of the memory segments, and sets some values in the argument segment. -set RAM[0] 317, -set RAM[1] 317, -set RAM[2] 310, -set RAM[3] 3000, -set RAM[4] 4000, -set RAM[310] 1234, -set RAM[311] 37, -set RAM[312] 1000, +set RAM[0] 317, // SP +set RAM[1] 317, // LCL +set RAM[2] 310, // ARG +set RAM[3] 3000, // THIS +set RAM[4] 4000, // THAT +set RAM[310] 1234, +set RAM[311] 37, +set RAM[312] 1000, set RAM[313] 305, set RAM[314] 300, set RAM[315] 3010, -set RAM[316] 4010, +set RAM[316] 4010, repeat 300 { - ticktock; + ticktock; } +// Outputs SP, LCL, ARG, THIS, THAT, and the return value. +output-list RAM[0]%D1.6.1 RAM[1]%D1.6.1 RAM[2]%D1.6.1 + RAM[3]%D1.6.1 RAM[4]%D1.6.1 RAM[310]%D1.6.1; output; `; diff --git a/projects/src/project_08/21_nested_call.ts b/projects/src/project_08/21_nested_call.ts index 8f408966c..27c8f6e3f 100644 --- a/projects/src/project_08/21_nested_call.ts +++ b/projects/src/project_08/21_nested_call.ts @@ -63,11 +63,10 @@ add return `; -export const vm_tst = `// Test file for NestedCall test. +export const vm_tst = `// Tests and illustrates how the VM implementation handles function-call-and-return, +// by executing the functions in Sys.vm in the VM emulator. +// In particular, loads and runs the functions in Sys.vm. -load Sys.vm, -output-file NestedCall.out, -compare-to NestedCall.cmp, output-list RAM[0]%D1.6.1 RAM[1]%D1.6.1 RAM[2]%D1.6.1 RAM[3]%D1.6.1 RAM[4]%D1.6.1 RAM[5]%D1.6.1 RAM[6]%D1.6.1; set RAM[0] 261, @@ -130,24 +129,23 @@ set this 3000, set that 4000; repeat 50 { - vmstep; + vmstep; } output; `; -export const hdl_tst = `// Test file for NestedCall test. - -load NestedCall.asm, -output-file NestedCall.out, -compare-to NestedCall.cmp, -output-list RAM[0]%D1.6.1 RAM[1]%D1.6.1 RAM[2]%D1.6.1 RAM[3]%D1.6.1 RAM[4]%D1.6.1 RAM[5]%D1.6.1 RAM[6]%D1.6.1; +export const hdl_tst = `// Tests how the VM implementation handles function-call-and-return, +// by executing the functions in Sys.vm. +// In particular, loads and runs NestedCall.asm, which results when +// the VM translator is applied to the NestedCall folder, which +// includes only one VM file: Sys.vm. set RAM[0] 261, set RAM[1] 261, set RAM[2] 256, set RAM[3] -3, set RAM[4] -4, -set RAM[5] -1, // test results +set RAM[5] -1, // test results set RAM[6] -1, set RAM[256] 1234, // fake stack frame from call Sys.init set RAM[257] -1, @@ -155,8 +153,8 @@ set RAM[258] -2, set RAM[259] -3, set RAM[260] -4, -set RAM[261] -1, // Initialize stack to check for local segment -set RAM[262] -1, // being cleared to zero. +set RAM[261] -1, // Initializes the stack, to check that the local segment +set RAM[262] -1, // is initialized to zeros by the 'function' VM command. set RAM[263] -1, set RAM[264] -1, set RAM[265] -1, @@ -193,12 +191,13 @@ set RAM[295] -1, set RAM[296] -1, set RAM[297] -1, set RAM[298] -1, -set RAM[299] -1; +set RAM[299] -1, repeat 4000 { - ticktock; + ticktock; } +output-list RAM[0]%D1.6.1 RAM[1]%D1.6.1 RAM[2]%D1.6.1 RAM[3]%D1.6.1 RAM[4]%D1.6.1 RAM[5]%D1.6.1 RAM[6]%D1.6.1; output; `; diff --git a/projects/src/project_08/22_fibonacci_element.ts b/projects/src/project_08/22_fibonacci_element.ts index b241c423a..93372fc66 100644 --- a/projects/src/project_08/22_fibonacci_element.ts +++ b/projects/src/project_08/22_fibonacci_element.ts @@ -48,39 +48,38 @@ goto WHILE // loops infinitely export const vm_tst = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/08/FunctionCalls/FibonacciElement/FibonacciElementVME.tst +// File name: projects/8/FunctionCalls/FibonacciElement/FibonacciElementVME.tst -load, // Load all the VM files from the current directory -output-file FibonacciElement.out, -compare-to FibonacciElement.cmp, -output-list RAM[0]%D1.6.1 RAM[261]%D1.6.1; +// Tests and illustrates the given Fibonacci element program on the VM emulator. -set sp 261; +set sp 261, repeat 110 { vmstep; } +// Outputs the stack pointer and the value at the stack's base. +// That's where the implementation should put the return value. +output-list RAM[0]%D1.6.1 RAM[261]%D1.6.1; output; `; export const hdl_tst = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/08/FunctionCalls/FibonacciElement/FibonacciElement.tst +// File name: projects/8/FunctionCalls/FibonacciElement/FibonacciElement.tst -// FibonacciElement.asm results from translating both Main.vm and Sys.vm into +// Tests FibonacciElement.asm on the CPU emulator. +// FibonacciElement.asm results from translating Main.vm and Sys.vm into // a single assembly program, stored in the file FibonacciElement.asm. -load FibonacciElement.asm, -output-file FibonacciElement.out, -compare-to FibonacciElement.cmp, -output-list RAM[0]%D1.6.1 RAM[261]%D1.6.1; - repeat 6000 { - ticktock; + ticktock; } +// Outputs the stack pointer and the value at the stack's base. +// That's where the implementation should put the return value. +output-list RAM[0]%D1.6.1 RAM[261]%D1.6.1; output; `; diff --git a/projects/src/project_08/23_statics_test.ts b/projects/src/project_08/23_statics_test.ts index 38886d94c..196c657ee 100644 --- a/projects/src/project_08/23_statics_test.ts +++ b/projects/src/project_08/23_statics_test.ts @@ -63,38 +63,35 @@ goto WHILE export const vm_tst = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/08/FunctionCalls/StaticsTest/StaticsTestVME.tst +// File name: projects/8/FunctionCalls/StaticsTest/StaticsTestVME.tst -load, // loads all the VM files from the current directory. -output-file StaticsTest.out, -compare-to StaticsTest.cmp, -output-list RAM[0]%D1.6.1 RAM[261]%D1.6.1 RAM[262]%D1.6.1; +// Tests and illustrates the statics test on the VM emulator. -set sp 261; +set sp 261, repeat 36 { - vmstep; + vmstep; } +output-list RAM[0]%D1.6.1 RAM[261]%D1.6.1 RAM[262]%D1.6.1; output; `; export const hdl_tst = `// This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. -// File name: projects/08/FunctionCalls/StaticsTest/StaticsTest.tst +// File name: projects/8/FunctionCalls/StaticsTest/StaticsTest.tst -load StaticsTest.asm, -output-file StaticsTest.out, -compare-to StaticsTest.cmp, -output-list RAM[0]%D1.6.1 RAM[261]%D1.6.1 RAM[262]%D1.6.1; +// Tests StaticTest.asm in the CPU emulator. +// This assembly file results from translating the staticsTest folder. -set RAM[0] 256; +set RAM[0] 256, repeat 2500 { - ticktock; + ticktock; } +output-list RAM[0]%D1.6.1 RAM[261]%D1.6.1 RAM[262]%D1.6.1; output; `; diff --git a/projects/src/project_08/index.ts b/projects/src/project_08/index.ts index 8700f8170..2ff699964 100644 --- a/projects/src/project_08/index.ts +++ b/projects/src/project_08/index.ts @@ -55,7 +55,8 @@ export async function resetFiles(fs: FileSystem): Promise { export async function resetTests(fs: FileSystem): Promise { await fs.pushd("/projects/08"); - await resetBySuffix(fs, VMS, "tst"); - await resetBySuffix(fs, VMS, "cmp"); + await resetBySuffix(fs, VMS, ".tst"); + await resetBySuffix(fs, VMS, "VME.tst"); + await resetBySuffix(fs, VMS, ".cmp"); await fs.popd(); } diff --git a/projects/src/reset.ts b/projects/src/reset.ts index 4b2fdac1a..27aacfd62 100644 --- a/projects/src/reset.ts +++ b/projects/src/reset.ts @@ -8,7 +8,7 @@ export async function resetBySuffix( ) { for (const [key, value] of Object.entries(tree)) { if (typeof value === "string") { - if (key.endsWith(`.${suffix}`)) { + if (key.endsWith(`${suffix}`)) { await fs.writeFile(key, value); } } else { diff --git a/simulator/src/chip/builtins/all.test.ts b/simulator/src/chip/builtins/all.test.ts index f3b67e9c1..e93250380 100644 --- a/simulator/src/chip/builtins/all.test.ts +++ b/simulator/src/chip/builtins/all.test.ts @@ -3,17 +3,17 @@ import { ObjectFileSystemAdapter, } from "@davidsouther/jiffies/lib/esm/fs.js"; import { Ok } from "@davidsouther/jiffies/lib/esm/result.js"; -import { Cmp, CMP } from "../../languages/cmp.js"; -import { HDL, HdlParse } from "../../languages/hdl.js"; -import { Tst, TST } from "../../languages/tst.js"; -import { ChipProjects, CHIP_PROJECTS } from "@nand2tetris/projects/index.js"; +import { CHIP_PROJECTS, ChipProjects } from "@nand2tetris/projects/index.js"; import { Max } from "@nand2tetris/projects/samples/hack.js"; import { compare } from "../../compare.js"; +import { CMP, Cmp } from "../../languages/cmp.js"; +import { HDL, HdlParse } from "../../languages/hdl.js"; +import { TST, Tst } from "../../languages/tst.js"; +import { ChipTest } from "../../test/chiptst.js"; import { build } from "../builder.js"; import { Chip } from "../chip.js"; -import { ChipTest } from "../../test/chiptst.js"; -const SKIP = new Set(["Computer"]); +const SKIP = new Set(["Computer", "Memory"]); describe("All Projects", () => { describe.each(Object.keys(CHIP_PROJECTS))("project %s", (project) => { diff --git a/simulator/src/chip/builtins/computer/computer.tsx b/simulator/src/chip/builtins/computer/computer.tsx index 7f158111e..3db1edc7a 100644 --- a/simulator/src/chip/builtins/computer/computer.tsx +++ b/simulator/src/chip/builtins/computer/computer.tsx @@ -1,6 +1,4 @@ import { FileSystem } from "@davidsouther/jiffies/lib/esm/fs.js"; -import { Chip, ClockedChip, ConstantBus, HIGH, LOW, Pin } from "../../chip.js"; -import { RAM, RAM16K } from "../sequential/ram.js"; import { CPUInput, CPUState, @@ -8,14 +6,24 @@ import { cpuTock, emptyState, } from "../../../cpu/cpu.js"; -import { int10 } from "../../../util/twos.js"; -import { load } from "../../../fs.js"; import { KEYBOARD_OFFSET, KeyboardAdapter, SCREEN_OFFSET, SCREEN_SIZE, } from "../../../cpu/memory.js"; +import { load } from "../../../fs.js"; +import { int10 } from "../../../util/twos.js"; +import { + Bus, + Chip, + ClockedChip, + ConstantBus, + HIGH, + LOW, + Pin, +} from "../../chip.js"; +import { RAM, RAM16K } from "../sequential/ram.js"; export class ROM32K extends RAM { constructor() { @@ -59,6 +67,12 @@ export class Keyboard extends Chip implements KeyboardAdapter { clearKey() { this.out().busVoltage = 0; } + + override get(name: string) { + return name === this.name + ? new ConstantBus(this.name, this.getKey()) // readonly + : super.get(name); + } } export class Memory extends ClockedChip { @@ -155,6 +169,48 @@ export class Memory extends ClockedChip { } } +class DRegisterBus extends Bus { + constructor(name: string, private cpu: CPUState) { + super(name); + } + + override get busVoltage(): number { + return this.cpu.D; + } + + override set busVoltage(num: number) { + this.cpu.D = num; + } +} + +class ARegisterBus extends Bus { + constructor(name: string, private cpu: CPUState) { + super(name); + } + + override get busVoltage(): number { + return this.cpu.A; + } + + override set busVoltage(num: number) { + this.cpu.A = num; + } +} + +class PCBus extends Bus { + constructor(name: string, private cpu: CPUState) { + super(name); + } + + override get busVoltage(): number { + return this.cpu.PC; + } + + override set busVoltage(num: number) { + this.cpu.PC = num; + } +} + export class CPU extends ClockedChip { private _state: CPUState = emptyState(); @@ -196,13 +252,13 @@ export class CPU extends ClockedChip { override get(pin: string, offset?: number): Pin | undefined { if (pin?.startsWith("ARegister")) { - return new ConstantBus("ARegister", this._state.A); + return new ARegisterBus("ARegister", this._state); } if (pin?.startsWith("DRegister")) { - return new ConstantBus("DRegister", this._state.D); + return new DRegisterBus("DRegister", this._state); } if (pin?.startsWith("PC")) { - return new ConstantBus("PC", this._state.PC); + return new PCBus("PC", this._state); } return super.get(pin, offset); } diff --git a/simulator/src/chip/builtins/sequential/bit.tsx b/simulator/src/chip/builtins/sequential/bit.tsx index 33b8e5031..fbb258227 100644 --- a/simulator/src/chip/builtins/sequential/bit.tsx +++ b/simulator/src/chip/builtins/sequential/bit.tsx @@ -1,4 +1,4 @@ -import { ClockedChip, HIGH, LOW, Pin, Voltage } from "../../chip.js"; +import { Bus, ClockedChip, HIGH, LOW, Pin, Voltage } from "../../chip.js"; export class Bit extends ClockedChip { bit: Voltage = LOW; @@ -23,6 +23,20 @@ export class Bit extends ClockedChip { } } +class RegisterBus extends Bus { + constructor(name: string, private register: { bits: number }) { + super(name); + } + + override get busVoltage(): number { + return this.register.bits & 0xffff; + } + + override set busVoltage(num: number) { + this.register.bits = num & 0xffff; + } +} + export class Register extends ClockedChip { bits = 0x00; @@ -41,7 +55,9 @@ export class Register extends ClockedChip { } override get(name: string, offset?: number): Pin | undefined { - return name === this.name ? this.out() : super.get(name, offset); + return name === this.name + ? new RegisterBus(this.name, this) + : super.get(name, offset); } override reset() { @@ -74,7 +90,9 @@ export class PC extends ClockedChip { } override get(name: string, offset?: number): Pin | undefined { - return name === this.name ? this.out() : super.get(name, offset); + return name === this.name + ? new RegisterBus(this.name, this) + : super.get(name, offset); } override reset() { diff --git a/simulator/src/chip/builtins/sequential/ram.tsx b/simulator/src/chip/builtins/sequential/ram.tsx index 48e66e1f4..b75fbd790 100644 --- a/simulator/src/chip/builtins/sequential/ram.tsx +++ b/simulator/src/chip/builtins/sequential/ram.tsx @@ -1,6 +1,6 @@ -import { Bus, ClockedChip, Pin } from "../../chip.js"; import { assert } from "@davidsouther/jiffies/lib/esm/assert.js"; import { Memory, Memory as MemoryChip } from "../../../cpu/memory.js"; +import { Bus, ClockedChip, Pin } from "../../chip.js"; export class RAM extends ClockedChip { protected _memory: MemoryChip; @@ -45,6 +45,10 @@ export class RAM extends ClockedChip { return new RamBus(`${this.name}[${idx}]`, idx, this._memory); } + override get(name: string, offset?: number) { + return name === this.name ? this.at(offset ?? 0) : super.get(name); + } + override reset(): void { this._memory.reset(); super.reset(); @@ -70,31 +74,31 @@ export class RamBus extends Bus { } export class RAM8 extends RAM { - constructor(name?: string) { - super(3, name); + constructor() { + super(3, "RAM8"); } } export class RAM64 extends RAM { - constructor(name?: string) { - super(6, name); + constructor() { + super(6, "RAM64"); } } export class RAM512 extends RAM { - constructor(name?: string) { - super(9, name); + constructor() { + super(9, "RAM512"); } } export class RAM4K extends RAM { - constructor(name?: string) { - super(12, name); + constructor() { + super(12, "RAM4K"); } } export class RAM16K extends RAM { - constructor(name?: string) { - super(14, name); + constructor() { + super(14, "RAM16K"); } } diff --git a/simulator/src/cpu/cpu.ts b/simulator/src/cpu/cpu.ts index d5e06a05b..cc86aa1fd 100644 --- a/simulator/src/cpu/cpu.ts +++ b/simulator/src/cpu/cpu.ts @@ -3,10 +3,10 @@ import { Memory, MemoryAdapter, MemoryKeyboard, - SubMemory, RAM as RAMMem, SCREEN_OFFSET, SCREEN_SIZE, + SubMemory, } from "./memory.js"; export interface CPUInput { @@ -76,6 +76,12 @@ export function cpuTick( const a = bits.am ? inM : A; const [ALU, flag] = alu(bits.op, D, a); + // While a DRegister would update during the Tock clock step, + // this implementation updates the D internal state during tick because the test will need to access the internal D state. + if (bits.d2) { + D = ALU; + } + return [{ A, D, PC: PC + 1, ALU, flag }, bits.d3]; } @@ -92,10 +98,6 @@ export function cpuTock( PC = reset ? 0 : jmp ? A : PC; - if (bits.d2) { - D = ALU; - } - if (!bits.c) { A = instruction & 0x7fff; } else if (bits.d1) { diff --git a/simulator/src/languages/grammars/tst.ohm b/simulator/src/languages/grammars/tst.ohm index a98816161..91bb9870f 100644 --- a/simulator/src/languages/grammars/tst.ohm +++ b/simulator/src/languages/grammars/tst.ohm @@ -2,9 +2,12 @@ Tst <: Base { Root := Tst Tst = (TstStatement | TstRepeat | TstWhile)+ - TstRepeat = Repeat Number? OpenBrace TstStatement+ CloseBrace - TstWhile = While Condition OpenBrace TstStatement+ CloseBrace - TstStatement = List (Semi | Bang) + TstRepeat = Repeat Number? OpenBrace TstCommand+ CloseBrace + TstWhile = While Condition OpenBrace TstCommand+ CloseBrace + TstStatement = TstCommand + + TstCommand = TstOperation Separator + Separator = (Semi | Bang | Comma) TstOperation = | TstFileOperation diff --git a/simulator/src/languages/grammars/tst.ohm.js b/simulator/src/languages/grammars/tst.ohm.js index 92b7cc585..5e3b145ae 100644 --- a/simulator/src/languages/grammars/tst.ohm.js +++ b/simulator/src/languages/grammars/tst.ohm.js @@ -3,9 +3,12 @@ Tst <: Base { Root := Tst Tst = (TstStatement | TstRepeat | TstWhile)+ - TstRepeat = Repeat Number? OpenBrace TstStatement+ CloseBrace - TstWhile = While Condition OpenBrace TstStatement+ CloseBrace - TstStatement = List (Semi | Bang) + TstRepeat = Repeat Number? OpenBrace TstCommand+ CloseBrace + TstWhile = While Condition OpenBrace TstCommand+ CloseBrace + TstStatement = TstCommand + + TstCommand = TstOperation Separator + Separator = (Semi | Bang | Comma) TstOperation = | TstFileOperation diff --git a/simulator/src/languages/tst.test.ts b/simulator/src/languages/tst.test.ts index 5ee90087e..9c2f0641f 100644 --- a/simulator/src/languages/tst.test.ts +++ b/simulator/src/languages/tst.test.ts @@ -153,8 +153,16 @@ describe("tst language", () => { expect(match).toHaveSucceeded(); expect(TST.semantics(match).tst).toEqual({ lines: [ - { ops: [{ op: "eval" }], span: { start: 0, end: 5, line: 1 } }, - { ops: [{ op: "eval" }], span: { start: 7, end: 12, line: 3 } }, + { + op: { op: "eval" }, + separator: ";", + span: { start: 0, end: 5, line: 1 }, + }, + { + op: { op: "eval" }, + separator: ";", + span: { start: 7, end: 12, line: 3 }, + }, ], }); }); @@ -165,54 +173,57 @@ describe("tst language", () => { expect(TST.semantics(match).tst).toEqual({ lines: [ { - span: { - start: 1, - end: 34, - line: 2, + op: { + op: "output-list", + spec: [ + { + id: "in", + builtin: false, + address: -1, + format: { style: "B", width: 1, lpad: 3, rpad: 3 }, + }, + { + id: "out", + builtin: false, + address: -1, + format: { style: "B", width: 1, lpad: 3, rpad: 3 }, + }, + ], }, - ops: [ - { - op: "output-list", - spec: [ - { - id: "in", - builtin: false, - address: -1, - format: { style: "B", width: 1, lpad: 3, rpad: 3 }, - }, - { - id: "out", - builtin: false, - address: -1, - format: { style: "B", width: 1, lpad: 3, rpad: 3 }, - }, - ], - }, - ], + separator: ";", + span: { line: 2, start: 1, end: 34 }, }, + { - span: { - end: 59, - start: 36, - line: 4, - }, - ops: [ - { op: "set", id: "in", value: 0 }, - { op: "eval" }, - { op: "output" }, - ], + op: { op: "set", id: "in", value: 0 }, + separator: ",", + span: { line: 4, start: 36, end: 45 }, }, { - span: { - start: 60, - end: 83, - line: 5, - }, - ops: [ - { op: "set", id: "in", value: 1 }, - { op: "eval" }, - { op: "output" }, - ], + op: { op: "eval" }, + separator: ",", + span: { line: 4, start: 46, end: 51 }, + }, + { + op: { op: "output" }, + separator: ";", + span: { line: 4, start: 52, end: 59 }, + }, + + { + op: { op: "set", id: "in", value: 1 }, + separator: ",", + span: { line: 5, start: 60, end: 69 }, + }, + { + op: { op: "eval" }, + separator: ",", + span: { line: 5, start: 70, end: 75 }, + }, + { + op: { op: "output" }, + separator: ";", + span: { line: 5, start: 76, end: 83 }, }, ], }); @@ -224,76 +235,90 @@ describe("tst language", () => { expect(TST.semantics(match).tst).toEqual({ lines: [ { - span: { - start: 1, - end: 58, - line: 2, + op: { + op: "output-list", + spec: [ + { + id: "time", + builtin: false, + address: -1, + format: { style: "S", width: 4, lpad: 1, rpad: 1 }, + }, + { + id: "in", + builtin: false, + address: -1, + format: { style: "B", width: 1, lpad: 2, rpad: 2 }, + }, + { + id: "load", + builtin: false, + address: -1, + format: { style: "B", width: 1, lpad: 2, rpad: 2 }, + }, + { + id: "out", + builtin: false, + address: -1, + format: { style: "B", width: 1, lpad: 2, rpad: 2 }, + }, + ], }, - ops: [ - { - op: "output-list", - spec: [ - { - id: "time", - builtin: false, - address: -1, - format: { style: "S", width: 4, lpad: 1, rpad: 1 }, - }, - { - id: "in", - builtin: false, - address: -1, - format: { style: "B", width: 1, lpad: 2, rpad: 2 }, - }, - { - id: "load", - builtin: false, - address: -1, - format: { style: "B", width: 1, lpad: 2, rpad: 2 }, - }, - { - id: "out", - builtin: false, - address: -1, - format: { style: "B", width: 1, lpad: 2, rpad: 2 }, - }, - ], - }, - ], + separator: ";", + span: { line: 2, start: 1, end: 58 }, }, + { - span: { - start: 59, - end: 94, - line: 3, - }, - ops: [ - { op: "set", id: "in", value: 0 }, - { op: "set", id: "load", value: 0 }, - { op: "tick" }, - { op: "output" }, - ], + op: { op: "set", id: "in", value: 0 }, + separator: ",", + span: { line: 3, start: 59, end: 68 }, }, { - span: { - start: 95, - end: 108, - line: 3, - }, - ops: [{ op: "tock" }, { op: "output" }], + op: { op: "set", id: "load", value: 0 }, + separator: ",", + span: { line: 3, start: 69, end: 80 }, }, { - span: { - start: 109, - end: 144, - line: 4, - }, - ops: [ - { op: "set", id: "in", value: 0 }, - { op: "set", id: "load", value: 1 }, - { op: "eval" }, - { op: "output" }, - ], + op: { op: "tick" }, + separator: ",", + span: { line: 3, start: 81, end: 86 }, + }, + { + op: { op: "output" }, + separator: ";", + span: { line: 3, start: 87, end: 94 }, + }, + + { + op: { op: "tock" }, + separator: ",", + span: { line: 3, start: 95, end: 100 }, + }, + { + op: { op: "output" }, + separator: ";", + span: { line: 3, start: 101, end: 108 }, + }, + + { + op: { op: "set", id: "in", value: 0 }, + separator: ",", + span: { line: 4, start: 109, end: 118 }, + }, + { + op: { op: "set", id: "load", value: 1 }, + separator: ",", + span: { line: 4, start: 119, end: 130 }, + }, + { + op: { op: "eval" }, + separator: ",", + span: { line: 4, start: 131, end: 136 }, + }, + { + op: { op: "output" }, + separator: ";", + span: { line: 4, start: 137, end: 144 }, }, ], }); @@ -306,43 +331,45 @@ describe("tst language", () => { lines: [ // output-list time%S1.2.1 in%B2.1.2; { + op: { + op: "output-list", + spec: [ + { + id: "time", + builtin: false, + address: -1, + format: { style: "S", width: 2, lpad: 1, rpad: 1 }, + }, + { + id: "in", + builtin: false, + address: -1, + format: { style: "B", width: 1, lpad: 2, rpad: 2 }, + }, + ], + }, + separator: ";", span: { start: 1, end: 35, line: 2, }, - ops: [ - { - op: "output-list", - spec: [ - { - id: "time", - builtin: false, - address: -1, - format: { style: "S", width: 2, lpad: 1, rpad: 1 }, - }, - { - id: "in", - builtin: false, - address: -1, - format: { style: "B", width: 1, lpad: 2, rpad: 2 }, - }, - ], - }, - ], }, // set in -32123, tick, output; { - span: { - start: 36, - end: 64, - line: 3, - }, - ops: [ - { op: "set", id: "in", value: 33413 /* unsigned */ }, - { op: "tick" }, - { op: "output" }, - ], + op: { op: "set", id: "in", value: 33413 /* unsigned */ }, + separator: ",", + span: { line: 3, start: 36, end: 50 }, + }, + { + op: { op: "tick" }, + separator: ",", + span: { line: 3, start: 51, end: 56 }, + }, + { + op: { op: "output" }, + separator: ";", + span: { line: 3, start: 57, end: 64 }, }, ], }); @@ -357,12 +384,14 @@ describe("tst language", () => { count: 14, statements: [ { - span: { - start: 15, - end: 28, - line: 3, - }, - ops: [{ op: "eval" }, { op: "output" }], + op: { op: "eval" }, + separator: ",", + span: { line: 3, start: 15, end: 20 }, + }, + { + op: { op: "output" }, + separator: ";", + span: { line: 3, start: 21, end: 28 }, }, ], span: { @@ -389,12 +418,14 @@ describe("tst language", () => { }, statements: [ { - span: { - start: 12, - end: 25, - line: 3, - }, - ops: [{ op: "eval" }, { op: "output" }], + op: { op: "eval" }, + separator: ",", + span: { line: 3, start: 12, end: 17 }, + }, + { + op: { op: "output" }, + separator: ";", + span: { line: 3, start: 18, end: 25 }, }, ], }, @@ -420,12 +451,13 @@ describe("tst language", () => { }, statements: [ { + op: { op: "eval" }, + separator: ";", span: { start: 20, end: 25, line: 2, }, - ops: [{ op: "eval" }], }, ], }, @@ -445,7 +477,8 @@ describe("tst language", () => { end: 21, line: 1, }, - ops: [{ op: "loadRom", file: "Max.hack" }], + op: { op: "loadRom", file: "Max.hack" }, + separator: ";", }, ], }); diff --git a/simulator/src/languages/tst.ts b/simulator/src/languages/tst.ts index d56622bff..433c2b084 100644 --- a/simulator/src/languages/tst.ts +++ b/simulator/src/languages/tst.ts @@ -66,14 +66,16 @@ export type TstOperation = | TstOutputListOperation | TstLoadROMOperation; -export interface TstLineStatement { - ops: TstOperation[]; - break?: true; +export type Separator = "," | ";" | "!"; + +export interface TstCommand { + op: TstOperation; + separator: Separator; span: Span; } export interface TstRepeat { - statements: TstLineStatement[]; + statements: TstCommand[]; count: number; span: Span; } @@ -85,12 +87,12 @@ export interface TstWhileCondition { } export interface TstWhileStatement { - statements: TstLineStatement[]; + statements: TstCommand[]; condition: TstWhileCondition; span: Span; } -export type TstStatement = TstLineStatement | TstRepeat | TstWhileStatement; +export type TstStatement = TstCommand | TstRepeat | TstWhileStatement; export interface Tst { lines: TstStatement[]; @@ -198,6 +200,16 @@ tstSemantics.addAttribute("operation", { }, }); +tstSemantics.addAttribute("command", { + TstCommand(op, sep) { + return { + op: op.operation, + separator: sep.sourceString as Separator, + span: span(this.source), + }; + }, +}); + tstSemantics.addAttribute("condition", { Condition({ value: left }, { sourceString: op }, { value: right }) { return { @@ -209,31 +221,22 @@ tstSemantics.addAttribute("condition", { }); tstSemantics.addAttribute("statement", { - TstWhile(op, cond, _o, statements, _c) { + TstWhile(op, cond, _o, commands, _c) { return { - statements: statements.children.map(({ statement }) => statement), + statements: commands.children.map((node) => node.command as TstCommand), condition: cond.condition, span: span(this.source), }; }, - TstRepeat(op, count, _o, statements, _c) { + TstRepeat(op, count, _o, commands, _c) { return { - statements: statements.children.map(({ statement }) => statement), + statements: commands.children.map((node) => node.command as TstCommand), count: count.sourceString ? Number(count.sourceString) : -1, span: span(this.source), }; }, - TstStatement(list, end) { - const stmt: TstStatement = { - ops: list - .asIteration() - .children.map((node) => node.operation as TstOperation), - span: span(this.source), - }; - if (end.sourceString === "!") { - stmt.break = true; - } - return stmt; + TstStatement(command) { + return command.command; }, }); diff --git a/simulator/src/output.ts b/simulator/src/output.ts index 93d579c17..c6d6c2658 100644 --- a/simulator/src/output.ts +++ b/simulator/src/output.ts @@ -74,7 +74,7 @@ export class Output { if (this.fmt === "D") { return this.padRight(value); } else { - return this.padCenter(value.slice(value.length - this.len)); + return this.padLeft(value.slice(value.length - this.len)); } } diff --git a/simulator/src/test/builder.ts b/simulator/src/test/builder.ts index b5dbbcedc..ca3724c78 100644 --- a/simulator/src/test/builder.ts +++ b/simulator/src/test/builder.ts @@ -1,7 +1,8 @@ import { checkExhaustive } from "@davidsouther/jiffies/lib/esm/assert.js"; +import { Span } from "../languages/base.js"; import { Tst, - TstLineStatement, + TstCommand, TstOperation, TstStatement, TstWhileStatement, @@ -11,40 +12,32 @@ import { TestTickInstruction, TestTockInstruction, } from "./chiptst.js"; +import { TestTickTockInstruction } from "./cputst.js"; import { Condition, + TestBreakInstruction, TestClearEchoInstruction, - TestCompoundInstruction, TestEchoInstruction, + TestInstruction, TestLoadROMInstruction, TestOutputInstruction, TestOutputListInstruction, TestRepeatInstruction, TestSetInstruction, + TestStopInstruction, TestWhileInstruction, } from "./instruction.js"; import { Test } from "./tst.js"; import { TestVMStepInstruction } from "./vmtst.js"; -import { TestTickTockInstruction } from "./cputst.js"; -function isTstLineStatment(line: TstStatement): line is TstLineStatement { - return (line as TstLineStatement).ops !== undefined; +function isTstCommand(line: TstStatement): line is TstCommand { + return (line as TstCommand).op !== undefined; } function isTstWhileStatement(line: TstStatement): line is TstWhileStatement { return (line as TstWhileStatement).condition !== undefined; } -function makeLineStatement(line: TstLineStatement) { - const statement = new TestCompoundInstruction(); - statement.span = line.span; - for (const op of line.ops) { - const inst = makeInstruction(op); - if (inst !== undefined) statement.addInstruction(inst); - } - return statement; -} - function makeInstruction(inst: TstOperation) { const { op } = inst; switch (op) { @@ -80,9 +73,16 @@ function makeInstruction(inst: TstOperation) { } export function fill(test: T, tst: Tst): T { + let span: Span | undefined; + let stepInstructions: TestInstruction[] = []; + + let base: T | TestWhileInstruction | TestRepeatInstruction = test; + let commands: TstCommand[] = []; + for (const line of tst.lines) { - if (isTstLineStatment(line)) { - test.addInstruction(makeLineStatement(line)); + if (isTstCommand(line)) { + base = test; + commands = [line]; } else { const repeat = isTstWhileStatement(line) ? new TestWhileInstruction( @@ -95,8 +95,34 @@ export function fill(test: T, tst: Tst): T { : new TestRepeatInstruction(line.count); repeat.span = line.span; test.addInstruction(repeat); - for (const statement of line.statements) { - repeat.addInstruction(makeLineStatement(statement)); + + base = repeat; + commands = line.statements; + } + + for (const command of commands) { + const inst = makeInstruction(command.op); + if (inst !== undefined) { + if (span === undefined) { + span = line.span; + } else { + span.end = line.span.end; + } + + base.addInstruction(inst); + stepInstructions.push(inst); + } + if (command.separator != ",") { + if (command.separator == ";") { + base.addInstruction(new TestStopInstruction(span ?? command.span)); + } else if (command.separator == "!") { + base.addInstruction(new TestBreakInstruction(span ?? command.span)); + } + for (const inst of stepInstructions) { + inst.span = span ?? command.span; + } + span = undefined; + stepInstructions = []; } } } diff --git a/simulator/src/test/chiptst.test.ts b/simulator/src/test/chiptst.test.ts index 35670f8d4..29a4952d3 100644 --- a/simulator/src/test/chiptst.test.ts +++ b/simulator/src/test/chiptst.test.ts @@ -153,17 +153,24 @@ describe("Chip Test", () => { count: 5, statements: [ { - ops: [ - { op: "tick" }, - { op: "output" }, - { op: "tock" }, - { op: "output" }, - ], - span: { - line: 1, - start: 0, - end: 27, - }, + op: { op: "tick" }, + separator: ",", + span: { start: 0, end: 27, line: 1 }, + }, + { + op: { op: "output" }, + separator: ",", + span: { start: 0, end: 27, line: 1 }, + }, + { + op: { op: "tock" }, + separator: ",", + span: { start: 0, end: 27, line: 1 }, + }, + { + op: { op: "output" }, + separator: ";", + span: { start: 0, end: 27, line: 1 }, }, ], span: { diff --git a/simulator/src/test/chiptst.ts b/simulator/src/test/chiptst.ts index 76e557381..c02ed2343 100644 --- a/simulator/src/test/chiptst.ts +++ b/simulator/src/test/chiptst.ts @@ -13,8 +13,8 @@ export class ChipTest extends Test { private clock = Clock.get(); - static from(tst: Tst): ChipTest { - const test = new ChipTest(); + static from(tst: Tst, setStatus?: (status: string) => void): ChipTest { + const test = new ChipTest(setStatus); return fill(test, tst); } diff --git a/simulator/src/test/instruction.ts b/simulator/src/test/instruction.ts index a13a6215f..c47aadc4b 100644 --- a/simulator/src/test/instruction.ts +++ b/simulator/src/test/instruction.ts @@ -8,6 +8,24 @@ export interface TestInstruction { steps(test: Test): IterableIterator; } +export class TestControlInstruction implements TestInstruction { + span: Span; + + constructor(span: Span) { + this.span = span; + } + + do() { + return; + } + *steps() { + yield this; + } +} + +export class TestStopInstruction extends TestControlInstruction {} +export class TestBreakInstruction extends TestControlInstruction {} + export class TestSetInstruction implements TestInstruction { constructor( private variable: string, diff --git a/simulator/src/test/tst.ts b/simulator/src/test/tst.ts index 0f84cdbfa..581212f9d 100644 --- a/simulator/src/test/tst.ts +++ b/simulator/src/test/tst.ts @@ -1,7 +1,12 @@ import { assertExists } from "@davidsouther/jiffies/lib/esm/assert.js"; import { FileSystem } from "@davidsouther/jiffies/lib/esm/fs.js"; import { Output } from "../output.js"; -import { OutputParams, TestInstruction } from "./instruction.js"; +import { + OutputParams, + TestBreakInstruction, + TestInstruction, + TestStopInstruction, +} from "./instruction.js"; export const DEFAULT_TIME_WIDTH = 7; @@ -10,6 +15,11 @@ export abstract class Test { protected _outputList: Output[] = []; protected _log = ""; fs: FileSystem = new FileSystem(); + protected doEcho?: (status: string) => void; + + constructor(doEcho?: (status: string) => void) { + this.doEcho = doEcho; + } setFileSystem(fs: FileSystem): this { this.fs = fs; @@ -17,10 +27,12 @@ export abstract class Test { } echo(_content: string) { - return undefined; + this.doEcho?.(_content); + return; } clearEcho() { - return undefined; + this.doEcho?.(""); + return; } async load(_filename?: string): Promise { @@ -102,10 +114,16 @@ export abstract class Test { } step() { - if (!this._step.done) { + while (!this._step.done) { this._step.value.do(this); this._step = this.steps.next(); - return false; + + if (this._step.value instanceof TestStopInstruction) { + this._step = this.steps.next(); + return false; + } else if (this._step.value instanceof TestBreakInstruction) { + return true; + } } return true; } diff --git a/simulator/src/vm/vm.test.ts b/simulator/src/vm/vm.test.ts index bcfc58202..0b1ccd665 100644 --- a/simulator/src/vm/vm.test.ts +++ b/simulator/src/vm/vm.test.ts @@ -227,7 +227,7 @@ test("08 / Program Flow / Basic Loop", () => { [400, 3], ]); - for (let i = 0; i < 26; i++) { + for (let i = 0; i < 33; i++) { vm.step(); } diff --git a/simulator/src/vm/vm.ts b/simulator/src/vm/vm.ts index 93ec6df5e..9f618fbd2 100644 --- a/simulator/src/vm/vm.ts +++ b/simulator/src/vm/vm.ts @@ -5,10 +5,10 @@ import { isErr, unwrap, } from "@davidsouther/jiffies/lib/esm/result.js"; -import { FunctionInstruction, VmInstruction } from "../languages/vm.js"; -import { VmMemory } from "./memory.js"; import { MemoryAdapter, RAM } from "../cpu/memory.js"; +import { FunctionInstruction, VmInstruction } from "../languages/vm.js"; import { VM_BUILTINS } from "./builtins.js"; +import { VmMemory } from "./memory.js"; export type VmOperation = | FunctionOperation @@ -428,7 +428,13 @@ export class Vm { } step() { - const operation = this.operation ?? { op: "return" }; // Implicit return if the function doesn't end on its own. + let operation = this.operation ?? { op: "return" }; // Implicit return if the function doesn't end on its own. + + if (operation.op === "label") { + this.invocation.opPtr += 1; + operation = this.operation ?? { op: "return" }; + } + switch (operation.op) { case "push": { const value = this.memory.getSegment( diff --git a/web/src/pages/chip.tsx b/web/src/pages/chip.tsx index dd62310f8..157092d7f 100644 --- a/web/src/pages/chip.tsx +++ b/web/src/pages/chip.tsx @@ -367,6 +367,10 @@ export const Chip = () => { tst={[tst, setTst, state.controls.span]} cmp={[cmp, setCmp]} out={[out, setOut]} + onLoadTest={(tst, cmp) => { + compile.current({ tst, cmp }); + actions.reset(); + }} /> ); diff --git a/web/src/versions.ts b/web/src/versions.ts index e4e305d0b..9dcfd8bd1 100644 --- a/web/src/versions.ts +++ b/web/src/versions.ts @@ -2,7 +2,7 @@ import { FileSystem } from "@davidsouther/jiffies/lib/esm/fs"; import { resetFiles, resetTests } from "@nand2tetris/projects/index"; const VERSION_KEY = "version"; -const CURRENT_VERSION = 3; +const CURRENT_VERSION = 4; export function getVersion() { return Number(localStorage.getItem(VERSION_KEY) ?? "0"); @@ -43,4 +43,7 @@ const versionUpdates: Record Promise> = { 2: async (fs: FileSystem) => { await resetTests(fs, [1]); }, + 3: async (fs: FileSystem) => { + await resetTests(fs); + }, }; From 5beae4ae3972119be88ce481fcaa3aec5d5fffb3 Mon Sep 17 00:00:00 2001 From: netalondon <67196883+netalondon@users.noreply.github.com> Date: Mon, 26 Feb 2024 13:15:59 +0200 Subject: [PATCH 2/2] Improve converter tool (#231) --- simulator/src/util/asm.ts | 2 + simulator/src/util/twos.ts | 2 +- web/src/pages/util.tsx | 156 +++++++++++++++++++++++++++---------- 3 files changed, 117 insertions(+), 43 deletions(-) diff --git a/simulator/src/util/asm.ts b/simulator/src/util/asm.ts index 31d2b7d92..c419b2714 100644 --- a/simulator/src/util/asm.ts +++ b/simulator/src/util/asm.ts @@ -84,10 +84,12 @@ function cop(asm: string): number { assign = assign ?? (assignExists ? undefined : ""); jump = jump ?? (jumpExists ? undefined : ""); if ( + parts?.[0] != asm || // match is not exhaustive !isAssignAsm(assign) || !isJumpAsm(jump) || (!isCommandAsm(operation) && !isCommandAsm(operation.replace("M", "A"))) ) { + // TODO: This should return Result<> instead of throw throw new Error("Invalid c instruction"); } diff --git a/simulator/src/util/twos.ts b/simulator/src/util/twos.ts index 969cc82e1..bdd0d65d2 100644 --- a/simulator/src/util/twos.ts +++ b/simulator/src/util/twos.ts @@ -115,7 +115,7 @@ export function dec(i: number): string { return `${i}`; } -export function uns(i: number): string { +export function unsigned(i: number): string { i = i & 0xffff; return `${i}`; } diff --git a/web/src/pages/util.tsx b/web/src/pages/util.tsx index 11ebf4e45..56e49dac0 100644 --- a/web/src/pages/util.tsx +++ b/web/src/pages/util.tsx @@ -1,4 +1,3 @@ -import { ChangeEvent, useState } from "react"; import { asm, op } from "@nand2tetris/simulator/util/asm.js"; import { bin, @@ -7,34 +6,91 @@ import { int10, int16, int2, - uns, + unsigned, } from "@nand2tetris/simulator/util/twos.js"; +import { ChangeEvent, Dispatch, SetStateAction, useState } from "react"; import "./util.scss"; -export const Util = () => { - const [value, setValue] = useState(0); - const [asmValue, setAsmValue] = useState("@0"); +function validBin(value: string) { + return /^[01]+$/.test(value) && value.length <= 16; +} + +function validDec(value: string) { + return ( + /^-?\d+$/.test(value) && Number(value) <= 32767 && Number(value) >= -32768 + ); +} + +function validUnsigned(value: string) { + return /^\d+$/.test(value) && Number(value) <= 65535; +} + +function validHex(value: string) { + return /^0x[0-9a-fA-F]+$/.test(value) && value.length <= 6; +} - const doSetValue = - (conv: (arg: string) => number) => - ({ target: { value } }: ChangeEvent) => { - value = value === "-" ? "-1" : value; - const iValue = conv(value); - setValue(iValue); - setAsmValue(asm(iValue)); - }; +function validAsm(value: string) { + try { + op(value); + return true; + } catch { + return false; + } +} - const setBin = doSetValue(int2); - const setInt = doSetValue(int10); - const setUns = doSetValue(int10); - const setHex = doSetValue(int16); +export const FormattedInput = (props: { + id: string; + value?: number; + setValue: Dispatch>; + setError: Dispatch>; + isValid: (value: string) => boolean; + parse: (value: string) => number; + format: (value: number) => string; +}) => { + const [selected, setSelected] = useState(false); + const [rawValue, setRawValue] = useState(""); - const setAsm = ({ target: { value } }: ChangeEvent) => { - setAsmValue(value); - setValue(op(value)); + const onChange = ({ target: { value } }: ChangeEvent) => { + if (!selected) { + return; + } + setRawValue(value); + if (!props.isValid(value)) { + props.setError("Invalid value"); + props.setValue(undefined); + } else { + props.setError(undefined); + const parsed = props.parse(value); + props.setValue(parsed); + } }; + return ( + { + setSelected(true); + setRawValue(props.value !== undefined ? props.format(props.value) : ""); + }} + onBlur={() => setSelected(false)} + /> + ); +}; + +export const Util = () => { + const [value, setValue] = useState(); + const [error, setError] = useState(); + return (
@@ -46,58 +102,74 @@ export const Util = () => {
-
-
- +
-
-
-
+ {error &&

{error}

}
);