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When doing FPGA measurements, I noticed that - at least for AES - we no longer have range / saturation checks for Husky. If the user chooses a gain value which is to high, the ADC will just saturate which invalidates measurements. It's pretty difficult to detect such issues without these automated checks. I am strongly in favor for re-adding them again.
The text was updated successfully, but these errors were encountered:
We have the plots after capture which are super helpful to assess whether capture was meaningful. I think users should always run with low amount of traces, check the plot for sanity and then start longer captures.
In many cases, there are spikes from e.g. GPIO trigger toggles that would be misleading.
I think it is extremely important to point all users to inspecting plots instead of console output only. One danger from simple going from console output is that users use low gains and reduce signal just because of spikes that are not relevant.
Thanks for your feedback @johannheyszl . This makes a lot of sense, especially now when we thing about the real chip when more things will go on in the background. I agree that people should always carefully inspect the waves first. Let's at least de-prioritize this.
When doing FPGA measurements, I noticed that - at least for AES - we no longer have range / saturation checks for Husky. If the user chooses a gain value which is to high, the ADC will just saturate which invalidates measurements. It's pretty difficult to detect such issues without these automated checks. I am strongly in favor for re-adding them again.
The text was updated successfully, but these errors were encountered: