From 60dee0d670672d5e67b4eee8c34d42411230393a Mon Sep 17 00:00:00 2001 From: Samuel Ortiz Date: Fri, 29 Mar 2024 20:21:47 +0100 Subject: [PATCH 1/3] [sw,device,rom] Remove extra CFI counter increment Signed-off-by: Samuel Ortiz --- sw/device/silicon_creator/rom/second_rom.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/sw/device/silicon_creator/rom/second_rom.c b/sw/device/silicon_creator/rom/second_rom.c index 9f3c4499b39c3..55537c454f0f0 100644 --- a/sw/device/silicon_creator/rom/second_rom.c +++ b/sw/device/silicon_creator/rom/second_rom.c @@ -192,11 +192,9 @@ static void rom_pre_boot_check(void) { HARDENED_CHECK_EQ(lc_state_check, lc_state); CFI_FUNC_COUNTER_INCREMENT(rom_counters, kCfiRomPreBootCheck, 3); - CFI_FUNC_COUNTER_INCREMENT(rom_counters, kCfiRomPreBootCheck, 4); - // Check the ePMP state SHUTDOWN_IF_ERROR(epmp_state_check()); - CFI_FUNC_COUNTER_INCREMENT(rom_counters, kCfiRomPreBootCheck, 5); + CFI_FUNC_COUNTER_INCREMENT(rom_counters, kCfiRomPreBootCheck, 4); // Check the cpuctrl CSR. uint32_t cpuctrl_csr; @@ -213,10 +211,10 @@ static void rom_pre_boot_check(void) { // Check rstmgr alert and cpu info collection configuration. SHUTDOWN_IF_ERROR( rstmgr_info_en_check(retention_sram_get()->creator.reset_reasons)); - CFI_FUNC_COUNTER_INCREMENT(rom_counters, kCfiRomPreBootCheck, 6); + CFI_FUNC_COUNTER_INCREMENT(rom_counters, kCfiRomPreBootCheck, 5); sec_mmio_check_counters(/*expected_check_count=*/2); - CFI_FUNC_COUNTER_INCREMENT(rom_counters, kCfiRomPreBootCheck, 7); + CFI_FUNC_COUNTER_INCREMENT(rom_counters, kCfiRomPreBootCheck, 6); } /** @@ -231,7 +229,7 @@ static rom_error_t rom_try_boot(void) { kCfiRomPreBootCheck); rom_pre_boot_check(); CFI_FUNC_COUNTER_INCREMENT(rom_counters, kCfiRomTryBoot, 4); - CFI_FUNC_COUNTER_CHECK(rom_counters, kCfiRomPreBootCheck, 8); + CFI_FUNC_COUNTER_CHECK(rom_counters, kCfiRomPreBootCheck, 7); // TODO: Do not hardcode that. uintptr_t rom_ext_lma = 0x41080000; From 649fff5d741a7c3f9ea0fa63d151d98f4d35d356 Mon Sep 17 00:00:00 2001 From: Samuel Ortiz Date: Tue, 2 Apr 2024 18:27:52 +0200 Subject: [PATCH 2/3] [sw,device,silicon_creator] Remove AST initialization Integrated has custom AST IP blocks and blindly copying the AST OTP values in the AST memory mapped region may generate undefined behaviour. Signed-off-by: Samuel Ortiz --- sw/device/silicon_creator/rom/base_rom_start.S | 16 ---------------- 1 file changed, 16 deletions(-) diff --git a/sw/device/silicon_creator/rom/base_rom_start.S b/sw/device/silicon_creator/rom/base_rom_start.S index 6993651856f9b..7cf1128954ef5 100644 --- a/sw/device/silicon_creator/rom/base_rom_start.S +++ b/sw/device/silicon_creator/rom/base_rom_start.S @@ -211,21 +211,6 @@ LABEL_FOR_TEST(kRomStartWatchdogEnabled) li t0, 0x00000888 csrc mie, t0 - // Check if AST initialization should be skipped. - li a0, (TOP_DARJEELING_OTP_CTRL_CORE_BASE_ADDR + \ - OTP_CTRL_SW_CFG_WINDOW_REG_OFFSET) - lw t0, OTP_CTRL_PARAM_CREATOR_SW_CFG_AST_INIT_EN_OFFSET(a0) - li t1, MULTIBIT_ASM_BOOL4_TRUE - bne t0, t1, .L_entropy_enable - - // Copy the AST configuration from OTP. - li a0, (TOP_DARJEELING_AST_BASE_ADDR) - li a1, (TOP_DARJEELING_AST_BASE_ADDR + AST_REGAL_REG_OFFSET + 4) - li a2, (TOP_DARJEELING_OTP_CTRL_CORE_BASE_ADDR + \ - OTP_CTRL_SW_CFG_WINDOW_REG_OFFSET + \ - OTP_CTRL_PARAM_CREATOR_SW_CFG_AST_CFG_OFFSET) - call crt_section_copy - // Enable jittery clock if enabled in OTP. li a0, (TOP_DARJEELING_OTP_CTRL_CORE_BASE_ADDR + \ OTP_CTRL_SW_CFG_WINDOW_REG_OFFSET) @@ -233,7 +218,6 @@ LABEL_FOR_TEST(kRomStartWatchdogEnabled) li a0, TOP_DARJEELING_CLKMGR_AON_BASE_ADDR sw t0, CLKMGR_JITTER_ENABLE_REG_OFFSET(a0) -.L_entropy_enable: // The following sequence enables the minimum level of entropy required to // initialize memory scrambling, as well as the entropy distribution network. li a0, TOP_DARJEELING_CSRNG_BASE_ADDR From 0a5d9ad8dc0f908798350cabcb2d5024ff4f2813 Mon Sep 17 00:00:00 2001 From: Samuel Ortiz Date: Fri, 12 Apr 2024 15:10:33 +0200 Subject: [PATCH 3/3] [hw,darjeeling,dv] Fix base address for ROM1 Signed-off-by: Samuel Ortiz --- hw/top_darjeeling/dv/tb/tb.sv | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/top_darjeeling/dv/tb/tb.sv b/hw/top_darjeeling/dv/tb/tb.sv index fd453575a23f4..5299112ca6912 100644 --- a/hw/top_darjeeling/dv/tb/tb.sv +++ b/hw/top_darjeeling/dv/tb/tb.sv @@ -430,7 +430,7 @@ module tb; `else .err_detection_scheme(mem_bkdr_util_pkg::EccInv_39_32), `endif - .system_base_addr (top_darjeeling_pkg::TOP_DARJEELING_ROM0_BASE_ADDR)); + .system_base_addr (top_darjeeling_pkg::TOP_DARJEELING_ROM1_BASE_ADDR)); `MEM_BKDR_UTIL_FILE_OP(m_mem_bkdr_util[Rom1], `ROM1_MEM_HIER) `uvm_info("tb.sv", "Creating mem_bkdr_util instance for OTBN IMEM", UVM_MEDIUM)