From 3be00e322a414f16ab7e3141aa4c4c87c020ed76 Mon Sep 17 00:00:00 2001 From: Pascal Nasahl Date: Fri, 8 Mar 2024 16:15:16 +0100 Subject: [PATCH] [pentest] OTBN FI key sideloading & load integrity This commits adds the following two FI penetration tests for OTBN: - otbn.fi.load_integrity - otbn.fi.key_sideload The first test aims to check whether the CRC checksum over the DMEM can be manipulated. The second test aims to test whether a fault can manipulate a key that gets sideloaded from the key manager. The host code is located in lowRISC/ot-sca#338 Signed-off-by: Pascal Nasahl --- sw/device/lib/dif/dif_otbn.c | 21 ++ sw/device/lib/dif/dif_otbn.h | 24 ++ .../tests/crypto/cryptotest/firmware/BUILD | 5 + .../crypto/cryptotest/firmware/ibex_fi.c | 2 +- .../crypto/cryptotest/firmware/otbn/BUILD | 14 + .../firmware/otbn/otbn_key_sideload.s | 53 ++++ .../firmware/otbn/otbn_load_integrity.s | 31 +++ .../crypto/cryptotest/firmware/otbn_fi.c | 241 +++++++++++++++++- .../crypto/cryptotest/firmware/otbn_fi.h | 5 + .../tests/crypto/cryptotest/firmware/status.h | 7 + .../crypto/cryptotest/json/otbn_fi_commands.h | 10 +- 11 files changed, 408 insertions(+), 5 deletions(-) create mode 100644 sw/device/tests/crypto/cryptotest/firmware/otbn/otbn_key_sideload.s create mode 100644 sw/device/tests/crypto/cryptotest/firmware/otbn/otbn_load_integrity.s diff --git a/sw/device/lib/dif/dif_otbn.c b/sw/device/lib/dif/dif_otbn.c index b840c3736a13e..f33f465af32b3 100644 --- a/sw/device/lib/dif/dif_otbn.c +++ b/sw/device/lib/dif/dif_otbn.c @@ -123,6 +123,27 @@ dif_result_t dif_otbn_get_insn_cnt(const dif_otbn_t *otbn, uint32_t *insn_cnt) { return kDifOk; } +dif_result_t dif_otbn_get_load_checksum(const dif_otbn_t *otbn, + uint32_t *checksum) { + if (otbn == NULL || checksum == NULL) { + return kDifBadArg; + } + + *checksum = + mmio_region_read32(otbn->base_addr, OTBN_LOAD_CHECKSUM_REG_OFFSET); + return kDifOk; +} + +dif_result_t dif_otbn_clear_load_checksum(const dif_otbn_t *otbn) { + if (otbn == NULL) { + return kDifBadArg; + } + + mmio_region_write32(otbn->base_addr, OTBN_LOAD_CHECKSUM_REG_OFFSET, 0); + + return kDifOk; +} + dif_result_t dif_otbn_imem_write(const dif_otbn_t *otbn, uint32_t offset_bytes, const void *src, size_t len_bytes) { if (otbn == NULL || src == NULL || diff --git a/sw/device/lib/dif/dif_otbn.h b/sw/device/lib/dif/dif_otbn.h index 134b0aa2745e5..4c664a3dff1da 100644 --- a/sw/device/lib/dif/dif_otbn.h +++ b/sw/device/lib/dif/dif_otbn.h @@ -140,6 +140,30 @@ dif_result_t dif_otbn_get_err_bits(const dif_otbn_t *otbn, OT_WARN_UNUSED_RESULT dif_result_t dif_otbn_get_insn_cnt(const dif_otbn_t *otbn, uint32_t *insn_cnt); +/** + * Gets the content of the load checksum register. + * + * Gets the 32-bit CRC checksum of data written to memory. + * + * @param otbn OTBN instance. + * @param[out] insn_cnt The number of instructions executed by OTBN. + * @return The result of the operation. + */ +OT_WARN_UNUSED_RESULT +dif_result_t dif_otbn_get_load_checksum(const dif_otbn_t *otbn, + uint32_t *insn_cnt); + +/** + * Clears the load checksum register. + * + * Writes 0 to the load checksum register to clear it. + * + * @param otbn OTBN instance. + * @return The result of the operation. + */ +OT_WARN_UNUSED_RESULT +dif_result_t dif_otbn_clear_load_checksum(const dif_otbn_t *otbn); + /** * Write an OTBN application into its instruction memory (IMEM). * diff --git a/sw/device/tests/crypto/cryptotest/firmware/BUILD b/sw/device/tests/crypto/cryptotest/firmware/BUILD index 9587343042250..4bc72537e058e 100644 --- a/sw/device/tests/crypto/cryptotest/firmware/BUILD +++ b/sw/device/tests/crypto/cryptotest/firmware/BUILD @@ -144,17 +144,22 @@ cc_library( deps = [ "//sw/device/lib/base:memory", "//sw/device/lib/base:status", + "//sw/device/lib/crypto/drivers:keymgr", "//sw/device/lib/crypto/drivers:otbn", "//sw/device/lib/dif:otbn", "//sw/device/lib/runtime:log", "//sw/device/lib/testing:entropy_testutils", + "//sw/device/lib/testing:keymgr_testutils", "//sw/device/lib/testing/test_framework:ujson_ottf", "//sw/device/lib/ujson", "//sw/device/sca/lib:sca", + "//sw/device/tests/crypto/cryptotest/firmware:sca_lib", "//sw/device/tests/crypto/cryptotest/firmware/otbn:otbn_char_hardware_dmem_op_loop", "//sw/device/tests/crypto/cryptotest/firmware/otbn:otbn_char_hardware_reg_op_loop", "//sw/device/tests/crypto/cryptotest/firmware/otbn:otbn_char_unrolled_dmem_op_loop", "//sw/device/tests/crypto/cryptotest/firmware/otbn:otbn_char_unrolled_reg_op_loop", + "//sw/device/tests/crypto/cryptotest/firmware/otbn:otbn_key_sideload", + "//sw/device/tests/crypto/cryptotest/firmware/otbn:otbn_load_integrity", "//sw/device/tests/crypto/cryptotest/json:otbn_fi_commands", ], ) diff --git a/sw/device/tests/crypto/cryptotest/firmware/ibex_fi.c b/sw/device/tests/crypto/cryptotest/firmware/ibex_fi.c index 01b7ec291432a..5e9d4af74e060 100644 --- a/sw/device/tests/crypto/cryptotest/firmware/ibex_fi.c +++ b/sw/device/tests/crypto/cryptotest/firmware/ibex_fi.c @@ -396,7 +396,7 @@ status_t handle_ibex_fi_char_register_file_read(ujson_t *uj) { } /** - * Initializes the SCA trigger. + * Initializes the trigger. * * * @param uj The received uJSON data. diff --git a/sw/device/tests/crypto/cryptotest/firmware/otbn/BUILD b/sw/device/tests/crypto/cryptotest/firmware/otbn/BUILD index 3f5d92414df37..4ddcae1f3201c 100644 --- a/sw/device/tests/crypto/cryptotest/firmware/otbn/BUILD +++ b/sw/device/tests/crypto/cryptotest/firmware/otbn/BUILD @@ -33,3 +33,17 @@ otbn_binary( "otbn_char_unrolled_reg_op_loop.s", ], ) + +otbn_binary( + name = "otbn_key_sideload", + srcs = [ + "otbn_key_sideload.s", + ], +) + +otbn_binary( + name = "otbn_load_integrity", + srcs = [ + "otbn_load_integrity.s", + ], +) diff --git a/sw/device/tests/crypto/cryptotest/firmware/otbn/otbn_key_sideload.s b/sw/device/tests/crypto/cryptotest/firmware/otbn/otbn_key_sideload.s new file mode 100644 index 0000000000000..a1e5915841045 --- /dev/null +++ b/sw/device/tests/crypto/cryptotest/firmware/otbn/otbn_key_sideload.s @@ -0,0 +1,53 @@ +/* Copyright lowRISC contributors. */ +/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */ +/* SPDX-License-Identifier: Apache-2.0 */ +/* + OBTN.KEY_SIDELOAD FI Penetration Test +*/ +.section .text.start + + /* Load all key shares into w20...w23. */ + bn.wsrr w20, KEY_S0_L + bn.wsrr w21, KEY_S1_L + bn.wsrr w22, KEY_S0_H + bn.wsrr w23, KEY_S1_H + + /* Write key shared into accessible DMEM. */ + li x2, 20 + la x3, k_s0_l + bn.sid x2, 0(x3) + + li x2, 21 + la x3, k_s0_h + bn.sid x2, 0(x3) + + li x2, 22 + la x3, k_s1_l + bn.sid x2, 0(x3) + + li x2, 23 + la x3, k_s1_h + bn.sid x2, 0(x3) + + ecall + +.data + .globl k_s0_l + .balign 32 + k_s0_l: + .zero 32 + + .globl k_s0_h + .balign 32 + k_s0_h: + .zero 32 + + .globl k_s1_l + .balign 32 + k_s1_l: + .zero 32 + + .globl k_s1_h + .balign 32 + k_s1_h: + .zero 32 diff --git a/sw/device/tests/crypto/cryptotest/firmware/otbn/otbn_load_integrity.s b/sw/device/tests/crypto/cryptotest/firmware/otbn/otbn_load_integrity.s new file mode 100644 index 0000000000000..947c9dc6b3bd8 --- /dev/null +++ b/sw/device/tests/crypto/cryptotest/firmware/otbn/otbn_load_integrity.s @@ -0,0 +1,31 @@ +/* Copyright lowRISC contributors. */ +/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */ +/* SPDX-License-Identifier: Apache-2.0 */ +/* + OBTN.LOAD_INTEGRITY FI Penetration Test +*/ +.section .text.start + + /* Execute 10 NOPs. */ + li x1, 10 + loop x1, 1 + nop + + ecall + +.data + /* Reference values. */ + .balign 32 + .globl refval1 + refval1: + .word 0x1BADB002 + + .balign 32 + .globl refval2 + refval2: + .word 0x8BADF00D + + .balign 32 + .globl refval3 + refval3: + .word 0xA5A5A5A5 diff --git a/sw/device/tests/crypto/cryptotest/firmware/otbn_fi.c b/sw/device/tests/crypto/cryptotest/firmware/otbn_fi.c index 26fe307d148bc..ff0c627e8ee5f 100644 --- a/sw/device/tests/crypto/cryptotest/firmware/otbn_fi.c +++ b/sw/device/tests/crypto/cryptotest/firmware/otbn_fi.c @@ -6,20 +6,39 @@ #include "sw/device/lib/base/memory.h" #include "sw/device/lib/base/status.h" +#include "sw/device/lib/crypto/drivers/keymgr.h" #include "sw/device/lib/runtime/log.h" #include "sw/device/lib/testing/entropy_testutils.h" +#include "sw/device/lib/testing/keymgr_testutils.h" #include "sw/device/lib/testing/test_framework/ottf_test_config.h" #include "sw/device/lib/testing/test_framework/ujson_ottf.h" #include "sw/device/lib/ujson/ujson.h" #include "sw/device/sca/lib/sca.h" +#include "sw/device/tests/crypto/cryptotest/firmware/sca_lib.h" #include "sw/device/tests/crypto/cryptotest/firmware/status.h" #include "sw/device/tests/crypto/cryptotest/json/otbn_fi_commands.h" #include "hw/top_earlgrey/sw/autogen/top_earlgrey.h" #include "otbn_regs.h" +// Key diversification data for testing +static const keymgr_diversification_t kTestDiversification = { + .salt = + { + 0x00112233, + 0x44556677, + 0x8899aabb, + 0xccddeeff, + 0x00010203, + 0x04050607, + 0x08090a0b, + 0x0c0d0e0f, + }, + .version = 0x9, +}; + /** - * Reat the error bits of the OTBN accelerator. + * Read the error bits of the OTBN accelerator. * * @returns Error bits. */ @@ -31,6 +50,193 @@ status_t read_otbn_err_bits(dif_otbn_err_bits_t *err_bits) { return OK_STATUS(0); } +/** + * Read the OTBN load checksum. + * + * @returns Load checksum. + */ +status_t read_otbn_load_checksum(uint32_t *checksum) { + dif_otbn_t otbn; + UJSON_CHECK_DIF_OK( + dif_otbn_init(mmio_region_from_addr(TOP_EARLGREY_OTBN_BASE_ADDR), &otbn)); + UJSON_CHECK_DIF_OK(dif_otbn_get_load_checksum(&otbn, checksum)); + return OK_STATUS(0); +} + +/** + * Clear the OTBN load checksum. + */ +status_t clear_otbn_load_checksum(void) { + dif_otbn_t otbn; + UJSON_CHECK_DIF_OK( + dif_otbn_init(mmio_region_from_addr(TOP_EARLGREY_OTBN_BASE_ADDR), &otbn)); + UJSON_CHECK_DIF_OK(dif_otbn_clear_load_checksum(&otbn)); + return OK_STATUS(0); +} + +/** + * otbn.fi.key_sideload command handler. + * + * Injects a fault when a key is sideloaded from the key manager into OTBN. + * + * Faults are injected during the trigger_high & trigger_low. + * + * @param uj The received uJSON data. + */ +status_t handle_otbn_fi_key_sideload(ujson_t *uj) { + // Initialize OTBN app, load it, and get interface to OTBN data memory. + OTBN_DECLARE_APP_SYMBOLS(otbn_key_sideload); + OTBN_DECLARE_SYMBOL_ADDR(otbn_key_sideload, k_s0_l); + OTBN_DECLARE_SYMBOL_ADDR(otbn_key_sideload, k_s0_h); + OTBN_DECLARE_SYMBOL_ADDR(otbn_key_sideload, k_s1_l); + OTBN_DECLARE_SYMBOL_ADDR(otbn_key_sideload, k_s1_h); + const otbn_app_t kOtbnAppKeySideload = OTBN_APP_T_INIT(otbn_key_sideload); + static const otbn_addr_t kOtbnAppKeySideloadks0l = + OTBN_ADDR_T_INIT(otbn_key_sideload, k_s0_l); + static const otbn_addr_t kOtbnAppKeySideloadks0h = + OTBN_ADDR_T_INIT(otbn_key_sideload, k_s0_h); + static const otbn_addr_t kOtbnAppKeySideloadks1l = + OTBN_ADDR_T_INIT(otbn_key_sideload, k_s1_l); + static const otbn_addr_t kOtbnAppKeySideloadks1h = + OTBN_ADDR_T_INIT(otbn_key_sideload, k_s1_h); + + // Setup keymanager for sideloading key into OTBN. + otbn_load_app(kOtbnAppKeySideload); + + // FI code target. + sca_set_trigger_high(); + status_t keymgr_res = keymgr_generate_key_otbn(kTestDiversification); + otbn_execute(); + otbn_busy_wait_for_done(); + sca_set_trigger_low(); + + // Read loop counter from OTBN data memory. + uint32_t key_share_0_l, key_share_0_l_ref; + uint32_t key_share_0_h, key_share_0_h_ref; + uint32_t key_share_1_l, key_share_1_l_ref; + uint32_t key_share_1_h, key_share_1_h_ref; + otbn_dmem_read(1, kOtbnAppKeySideloadks0l, &key_share_0_l); + otbn_dmem_read(1, kOtbnAppKeySideloadks0h, &key_share_0_h); + otbn_dmem_read(1, kOtbnAppKeySideloadks1l, &key_share_1_l); + otbn_dmem_read(1, kOtbnAppKeySideloadks1h, &key_share_1_h); + + // Read ERR_STATUS register from OTBN. + dif_otbn_err_bits_t err_bits; + read_otbn_err_bits(&err_bits); + + // Set error value to 1 if key sideloading failed. + uint32_t res = 0; + if (keymgr_res.value != kHardenedBoolTrue) { + res = 1; + } + + // Read key again and compare. + otbn_load_app(kOtbnAppKeySideload); + keymgr_res = keymgr_generate_key_otbn(kTestDiversification); + if (keymgr_res.value != kHardenedBoolTrue) { + return ABORTED(); + } + otbn_execute(); + otbn_busy_wait_for_done(); + + otbn_dmem_read(1, kOtbnAppKeySideloadks0l, &key_share_0_l_ref); + otbn_dmem_read(1, kOtbnAppKeySideloadks0h, &key_share_0_h_ref); + otbn_dmem_read(1, kOtbnAppKeySideloadks1l, &key_share_1_l_ref); + otbn_dmem_read(1, kOtbnAppKeySideloadks1h, &key_share_1_h_ref); + + if ((key_share_0_l != key_share_0_l_ref) || + (key_share_0_h != key_share_0_h_ref) || + (key_share_1_l != key_share_1_l_ref) || + (key_share_1_h != key_share_1_h_ref)) { + res |= 2; + } + + // Send result & ERR_STATUS to host. + otbn_fi_result_t uj_output; + uj_output.result = res; + uj_output.err_status = err_bits; + RESP_OK(ujson_serialize_otbn_fi_result_t, uj, &uj_output); + return OK_STATUS(0); +} + +/** + * otbn.fi.load_integrity command handler. + * + * Tests, whether a fault during loading the OTBN app can manipulate data in + * DMEM without changing the CRC-32 checksum that is used to check the + * integrity of the DMEM and IMEM. + * + * As the OTBN app itself is not the target of this FI analysis, it only + * consists of NOPs. The DMEM is initialized with reference values that + * are checked. + * + * Faults are injected during the trigger_high & trigger_low. + * + * @param uj The received uJSON data. + */ +status_t handle_otbn_fi_load_integrity(ujson_t *uj) { + // Initialize OTBN app, load it, and get interface to OTBN data memory. + OTBN_DECLARE_APP_SYMBOLS(otbn_load_integrity); + OTBN_DECLARE_SYMBOL_ADDR(otbn_load_integrity, refval1); + OTBN_DECLARE_SYMBOL_ADDR(otbn_load_integrity, refval2); + OTBN_DECLARE_SYMBOL_ADDR(otbn_load_integrity, refval3); + const otbn_app_t kOtbnAppLoadIntegrity = OTBN_APP_T_INIT(otbn_load_integrity); + static const otbn_addr_t kOtbnAppLoadIntegrityRefVal1 = + OTBN_ADDR_T_INIT(otbn_load_integrity, refval1); + static const otbn_addr_t kOtbnAppLoadIntegrityRefVal2 = + OTBN_ADDR_T_INIT(otbn_load_integrity, refval2); + static const otbn_addr_t kOtbnAppLoadIntegrityRefVal3 = + OTBN_ADDR_T_INIT(otbn_load_integrity, refval3); + + // Load the OTBN app and read the load checksum without FI to retrieve + // reference value. + uint32_t load_checksum_ref; + clear_otbn_load_checksum(); + otbn_load_app(kOtbnAppLoadIntegrity); + read_otbn_load_checksum(&load_checksum_ref); + clear_otbn_load_checksum(); + + // FI code target. + sca_set_trigger_high(); + otbn_load_app(kOtbnAppLoadIntegrity); + sca_set_trigger_low(); + + // Read back checksum. + uint32_t load_checksum; + read_otbn_load_checksum(&load_checksum); + + // Read loop counter from OTBN data memory. + uint32_t ref_val1, ref_val2, ref_val3; + otbn_dmem_read(1, kOtbnAppLoadIntegrityRefVal1, &ref_val1); + otbn_dmem_read(1, kOtbnAppLoadIntegrityRefVal2, &ref_val2); + otbn_dmem_read(1, kOtbnAppLoadIntegrityRefVal3, &ref_val3); + + // Check if DMEM is corrupted. + bool dmem_corrupted = false; + if ((ref_val1 != 0x1BADB002) || (ref_val2 != 0x8BADF00D) || + (ref_val3 != 0xA5A5A5A5)) { + dmem_corrupted = true; + } + + // If DMEM is corrupted and the checksum is still correct, we achieved the + // attack goal. + uint32_t res = 0; + if ((load_checksum_ref == load_checksum) && dmem_corrupted) { + res = 1; + } + + // Read ERR_STATUS register from OTBN. + dif_otbn_err_bits_t err_bits; + read_otbn_err_bits(&err_bits); + + // Send result & ERR_STATUS to host. + otbn_fi_result_t uj_output; + uj_output.result = res; + uj_output.err_status = err_bits; + RESP_OK(ujson_serialize_otbn_fi_result_t, uj, &uj_output); + return OK_STATUS(0); +} + /** * otbn.fi.char.hardware.dmem.op.loop command handler. * @@ -219,7 +425,26 @@ status_t handle_otbn_fi_char_unrolled_reg_op_loop(ujson_t *uj) { } /** - * Initializes the SCA trigger. + * Initializes the key manager. + * + * @param uj The received uJSON data. + */ +status_t handle_otbn_fi_init_keymgr(ujson_t *uj) { + dif_keymgr_t keymgr; + dif_kmac_t kmac; + UJSON_CHECK_STATUS_OK(keymgr_testutils_startup(&keymgr, &kmac)); + UJSON_CHECK_STATUS_OK( + keymgr_testutils_advance_state(&keymgr, &kOwnerIntParams)); + UJSON_CHECK_STATUS_OK( + keymgr_testutils_advance_state(&keymgr, &kOwnerRootKeyParams)); + UJSON_CHECK_STATUS_OK( + keymgr_testutils_check_state(&keymgr, kDifKeymgrStateOwnerRootKey)); + + return OK_STATUS(0); +} + +/** + * Initializes the trigger. * * @param uj The received uJSON data. */ @@ -228,7 +453,11 @@ status_t handle_otbn_fi_init_trigger(ujson_t *uj) { sca_select_trigger_type(kScaTriggerTypeSw); sca_init(kScaTriggerSourceOtbn, kScaPeripheralEntropy | kScaPeripheralIoDiv4 | kScaPeripheralOtbn | kScaPeripheralCsrng | - kScaPeripheralEdn | kScaPeripheralHmac); + kScaPeripheralEdn | kScaPeripheralKmac); + + // Disable the instruction cache and dummy instructions for FI attacks. + sca_configure_cpu(); + return err; } @@ -245,6 +474,8 @@ status_t handle_otbn_fi(ujson_t *uj) { switch (cmd) { case kOtbnFiSubcommandInitTrigger: return handle_otbn_fi_init_trigger(uj); + case kOtbnFiSubcommandInitKeyMgr: + return handle_otbn_fi_init_keymgr(uj); case kOtbnFiSubcommandCharUnrolledRegOpLoop: return handle_otbn_fi_char_unrolled_reg_op_loop(uj); case kOtbnFiSubcommandCharUnrolledDmemOpLoop: @@ -253,6 +484,10 @@ status_t handle_otbn_fi(ujson_t *uj) { return handle_otbn_fi_char_hardware_reg_op_loop(uj); case kOtbnFiSubcommandCharHardwareDmemOpLoop: return handle_otbn_fi_char_hardware_dmem_op_loop(uj); + case kOtbnFiSubcommandLoadIntegrity: + return handle_otbn_fi_load_integrity(uj); + case kOtbnFiSubcommandKeySideload: + return handle_otbn_fi_key_sideload(uj); default: LOG_ERROR("Unrecognized OTBN FI subcommand: %d", cmd); return INVALID_ARGUMENT(); diff --git a/sw/device/tests/crypto/cryptotest/firmware/otbn_fi.h b/sw/device/tests/crypto/cryptotest/firmware/otbn_fi.h index e402faad9fef4..e118dd30d85e1 100644 --- a/sw/device/tests/crypto/cryptotest/firmware/otbn_fi.h +++ b/sw/device/tests/crypto/cryptotest/firmware/otbn_fi.h @@ -10,12 +10,17 @@ #include "sw/device/lib/dif/dif_otbn.h" #include "sw/device/lib/ujson/ujson.h" +status_t clear_otbn_load_checksum(void); status_t read_otbn_err_bits(dif_otbn_err_bits_t *err_bits); +status_t read_otbn_load_checksum(uint32_t *checksum); +status_t handle_otbn_fi_key_sideload(ujson_t *uj); +status_t handle_otbn_fi_load_integrity(ujson_t *uj); status_t handle_otbn_fi_char_hardware_dmem_op_loop(ujson_t *uj); status_t handle_otbn_fi_char_hardware_reg_op_loop(ujson_t *uj); status_t handle_otbn_fi_char_unrolled_dmem_op_loop(ujson_t *uj); status_t handle_otbn_fi_char_unrolled_reg_op_loop(ujson_t *uj); +status_t handle_otbn_fi_init_keymgr(ujson_t *uj); status_t handle_otbn_init_trigger(ujson_t *uj); status_t handle_otbn_fi(ujson_t *uj); diff --git a/sw/device/tests/crypto/cryptotest/firmware/status.h b/sw/device/tests/crypto/cryptotest/firmware/status.h index 63b7998f079d6..69d67a14a7c80 100644 --- a/sw/device/tests/crypto/cryptotest/firmware/status.h +++ b/sw/device/tests/crypto/cryptotest/firmware/status.h @@ -12,4 +12,11 @@ } \ } while (false) +#define UJSON_CHECK_STATUS_OK(status) \ + do { \ + if (status.value != 0) { \ + return ABORTED(); \ + } \ + } while (false) + #endif // OPENTITAN_SW_DEVICE_TESTS_CRYPTO_CRYPTOTEST_FIRMWARE_STATUS_H_ diff --git a/sw/device/tests/crypto/cryptotest/json/otbn_fi_commands.h b/sw/device/tests/crypto/cryptotest/json/otbn_fi_commands.h index e4666f361844d..0d04c53365f16 100644 --- a/sw/device/tests/crypto/cryptotest/json/otbn_fi_commands.h +++ b/sw/device/tests/crypto/cryptotest/json/otbn_fi_commands.h @@ -13,10 +13,13 @@ extern "C" { #define OTBNFI_SUBCOMMAND(_, value) \ value(_, InitTrigger) \ + value(_, InitKeyMgr) \ value(_, CharUnrolledRegOpLoop) \ value(_, CharUnrolledDmemOpLoop) \ value(_, CharHardwareRegOpLoop) \ - value(_, CharHardwareDmemOpLoop) + value(_, CharHardwareDmemOpLoop) \ + value(_, LoadIntegrity) \ + value(_, KeySideload) UJSON_SERDE_ENUM(OtbnFiSubcommand, otbn_fi_subcommand_t, OTBNFI_SUBCOMMAND); #define OTBNFI_LOOP_COUNTER_OUTPUT(field, string) \ @@ -24,6 +27,11 @@ UJSON_SERDE_ENUM(OtbnFiSubcommand, otbn_fi_subcommand_t, OTBNFI_SUBCOMMAND); field(err_status, uint32_t) UJSON_SERDE_STRUCT(OtbnFiLoopCounterOutput, otbn_fi_loop_counter_t, OTBNFI_LOOP_COUNTER_OUTPUT); +#define OTBNFI_RESULT_OUTPUT(field, string) \ + field(result, uint32_t) \ + field(err_status, uint32_t) +UJSON_SERDE_STRUCT(OtbnFiResultOutput, otbn_fi_result_t, OTBNFI_RESULT_OUTPUT); + // clang-format on #ifdef __cplusplus