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[chip-test] flash_init #19796

Closed
7 of 10 tasks
jdonjdon opened this issue Sep 29, 2023 · 2 comments
Closed
7 of 10 tasks

[chip-test] flash_init #19796

jdonjdon opened this issue Sep 29, 2023 · 2 comments
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@jdonjdon
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Component:ChipLevelTest Used to filter the chip-level test backlog Priority:P1 Priority: high
Milestone
Earlgrey ES SV0

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@jdonjdon
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jdonjdon commented Sep 29, 2023 •
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Test point name

chip_sw_flash_init
chip_sw_flash_scramble

Host side component

None

OpenTitanTool infrastructure implemented

No

Silicon Validation (SiVal)

Yes

Emulation Targets

  • None
  • CW310
  • Hyperdebug + CW310

Contact person

jdonjdon

Checklist

Please fill out this checklist as items are completed. Link to PRs and issues as appropriate.

  • Check if existing test covers most or all of this testpoint (if so, either extend said test to cover all points, or skip the next 3 checkboxes)
  • Device-side (C) component developed
  • Bazel build rules developed
  • Host-side component developed--NA
  • HJSON test plan updated with test name (so it shows up in the dashboard)
  • Test added to dvsim nightly regression (and passing at time of checking)
  • For SiVal test cases, test is running relevant FPGA or silicon regression
@jdonjdon jdonjdon added the Component:ChipLevelTest Used to filter the chip-level test backlog label Sep 29, 2023
@jdonjdon jdonjdon self-assigned this Sep 29, 2023
@jdonjdon jdonjdon added this to the Earlgrey ES SV0 milestone Sep 29, 2023
@jdonjdon jdonjdon changed the title [chip-test] [chip-test] chip_sw_flash_init_sival Sep 29, 2023
@jdonjdon jdonjdon changed the title [chip-test] chip_sw_flash_init_sival [chip-test] sival_flash_init Sep 29, 2023
@jdonjdon jdonjdon added the Priority:P1 Priority: high label Sep 29, 2023
@jdonjdon jdonjdon changed the title [chip-test] sival_flash_init [chip-test] flash_init Sep 29, 2023
@jdonjdon
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jdonjdon commented Nov 1, 2023

This will be covered by manuf_ft_provision_rma_token_and_personalization

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Closed with #20865

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Component:ChipLevelTest Used to filter the chip-level test backlog Priority:P1 Priority: high
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Milestone
Earlgrey ES SV0
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@jdonjdon