diff --git a/hw/ip/flash_ctrl/data/flash_ctrl.hjson b/hw/ip/flash_ctrl/data/flash_ctrl.hjson index 18f5b04837954..72e8802b38b98 100644 --- a/hw/ip/flash_ctrl/data/flash_ctrl.hjson +++ b/hw/ip/flash_ctrl/data/flash_ctrl.hjson @@ -32,7 +32,7 @@ { version: "2.0.0", life_stage: "L1", - design_stage: "D1", + design_stage: "D2S", verification_stage: "V1", dif_stage: "S2", }, diff --git a/hw/ip/flash_ctrl/data/flash_ctrl.hjson.tpl b/hw/ip/flash_ctrl/data/flash_ctrl.hjson.tpl index a2522e77349d7..f05618267b146 100644 --- a/hw/ip/flash_ctrl/data/flash_ctrl.hjson.tpl +++ b/hw/ip/flash_ctrl/data/flash_ctrl.hjson.tpl @@ -43,7 +43,7 @@ { version: "2.0.0", life_stage: "L1", - design_stage: "D1", + design_stage: "D2S", verification_stage: "V1", dif_stage: "S2", }, diff --git a/hw/ip_templates/flash_ctrl/data/flash_ctrl.hjson.tpl b/hw/ip_templates/flash_ctrl/data/flash_ctrl.hjson.tpl index 603b48ca01ee3..d8afb2eeab333 100644 --- a/hw/ip_templates/flash_ctrl/data/flash_ctrl.hjson.tpl +++ b/hw/ip_templates/flash_ctrl/data/flash_ctrl.hjson.tpl @@ -43,7 +43,7 @@ { version: "2.0.0", life_stage: "L1", - design_stage: "D1", + design_stage: "D2S", verification_stage: "V1", dif_stage: "S2", }, diff --git a/hw/top_earlgrey/ip/flash_ctrl/data/autogen/flash_ctrl.hjson b/hw/top_earlgrey/ip/flash_ctrl/data/autogen/flash_ctrl.hjson index 8b4005f269e17..1a7ef1d913c4f 100644 --- a/hw/top_earlgrey/ip/flash_ctrl/data/autogen/flash_ctrl.hjson +++ b/hw/top_earlgrey/ip/flash_ctrl/data/autogen/flash_ctrl.hjson @@ -38,7 +38,7 @@ { version: "2.0.0", life_stage: "L1", - design_stage: "D1", + design_stage: "D2S", verification_stage: "V1", dif_stage: "S2", }, diff --git a/hw/top_earlgrey/ip_autogen/flash_ctrl/data/flash_ctrl.hjson b/hw/top_earlgrey/ip_autogen/flash_ctrl/data/flash_ctrl.hjson index 18f5b04837954..72e8802b38b98 100644 --- a/hw/top_earlgrey/ip_autogen/flash_ctrl/data/flash_ctrl.hjson +++ b/hw/top_earlgrey/ip_autogen/flash_ctrl/data/flash_ctrl.hjson @@ -32,7 +32,7 @@ { version: "2.0.0", life_stage: "L1", - design_stage: "D1", + design_stage: "D2S", verification_stage: "V1", dif_stage: "S2", },