diff --git a/hw/ip/mbx/dv/env/seq_lib/mbx_base_vseq.sv b/hw/ip/mbx/dv/env/seq_lib/mbx_base_vseq.sv index e7722bdfab70e6..8e08ab10262502 100644 --- a/hw/ip/mbx/dv/env/seq_lib/mbx_base_vseq.sv +++ b/hw/ip/mbx/dv/env/seq_lib/mbx_base_vseq.sv @@ -136,7 +136,7 @@ class mbx_base_vseq extends cip_base_vseq #( endtask: start_device_seq virtual task set_mem_range_regwen(mubi4_t regwen); - `uvm_info(`gfn, $sformatf("Setting memory range regwen to 0x%x", regwen), UVM_LOW) + `uvm_info(`gfn, $sformatf("Setting memory range regwen to 0x%x", regwen), UVM_MEDIUM) ral.address_range_regwen.regwen.set(int'(regwen)); csr_update(ral.address_range_regwen); @@ -201,7 +201,7 @@ class mbx_base_vseq extends cip_base_vseq #( endtask: mbx_init virtual task mbx_abort(); - `uvm_info(`gfn, "ABORTing operation", UVM_LOW) + `uvm_info(`gfn, "ABORTing operation", UVM_HIGH) m_mbx_soc_ral.soc_control.go.set(1'b0); m_mbx_soc_ral.soc_control.abort.set(1'b1); csr_update(m_mbx_soc_ral.soc_control); @@ -403,17 +403,17 @@ class mbx_base_vseq extends cip_base_vseq #( rsp_size = mbx_config.response_dwords; `uvm_info(`gfn, $sformatf("Request size %x DWORD(s), Response size %x DWORD(s)", - req_size, rsp_size), UVM_LOW) + req_size, rsp_size), UVM_MEDIUM) `uvm_info(`gfn, $sformatf("Inbox should use address range [%x,%x)", mbx_config.ibmbx_base_addr, mbx_config.ibmbx_base_addr + req_size * 4), - UVM_LOW) + UVM_MEDIUM) `uvm_info(`gfn, $sformatf("Outbox should use address range [%x,%x)", mbx_config.obmbx_base_addr, mbx_config.obmbx_base_addr + rsp_size * 4), - UVM_LOW) + UVM_MEDIUM) - `uvm_info(`gfn, $sformatf("Constructing Request of 0x%0x DWORDs", req_size), UVM_LOW) + `uvm_info(`gfn, $sformatf("Constructing Request of 0x%0x DWORDs", req_size), UVM_MEDIUM) for(int unsigned ii = 0; ii < req_size; ii++) begin stressors(aborted, errored, panicked); @@ -430,7 +430,7 @@ class mbx_base_vseq extends cip_base_vseq #( break; end else begin wr_data = $urandom(); - `uvm_info(`gfn, $sformatf(" - Offset 0x%0x : 0x%0x", ii, wr_data), UVM_LOW) + `uvm_info(`gfn, $sformatf(" - Offset 0x%0x : 0x%0x", ii, wr_data), UVM_HIGH) req.push_back(wr_data); tl_access(.addr(m_mbx_soc_ral.get_addr_from_offset(mbx_reg_pkg::MBX_WDATA_OFFSET)), .write(1'b1), .data(wr_data), .mask(4'hF), .blocking(1'b1), @@ -480,16 +480,16 @@ class mbx_base_vseq extends cip_base_vseq #( ii, qd, ii, req[ii])) end end - `uvm_info(`gfn, "Request data matched expectations", UVM_LOW) + `uvm_info(`gfn, "Request data matched expectations", UVM_MEDIUM) end if (send_response) begin // Data from ROT to R-code q.delete(); - `uvm_info(`gfn, $sformatf("Constructing Response of 0x%0x DWORDs", rsp_size), UVM_LOW) + `uvm_info(`gfn, $sformatf("Constructing Response of 0x%0x DWORDs", rsp_size), UVM_MEDIUM) for(int unsigned ii = 0 ; ii < rsp_size; ii++) begin mbx_dword_t data = $urandom; - `uvm_info(`gfn, $sformatf(" - Offset 0x%0x : 0x%0x", ii, data), UVM_LOW) + `uvm_info(`gfn, $sformatf(" - Offset 0x%0x : 0x%0x", ii, data), UVM_HIGH) // TODO: replace this byte queue with DWORDs q.push_back(data[7:0]); q.push_back(data[15:8]); @@ -538,7 +538,7 @@ class mbx_base_vseq extends cip_base_vseq #( .blocking(1'b1), .tl_sequencer_h(p_sequencer.tl_sequencer_hs[cfg.mbx_soc_ral_name])); - `uvm_info(`gfn, $sformatf("Mailbox read data is : 'h%0h", rd_data), UVM_LOW) + `uvm_info(`gfn, $sformatf("Mailbox read data is : 'h%0h", rd_data), UVM_HIGH) rsp.push_back(rd_data); @@ -590,7 +590,7 @@ class mbx_base_vseq extends cip_base_vseq #( if (obs_error) begin `DV_CHECK_EQ(errored, 1'b1, "Unsignaled ERROR occurred") - `uvm_info(`gfn, "Clearing ERROR condition from SoC side using ABORT mechanism", UVM_LOW) + `uvm_info(`gfn, "Clearing ERROR condition from SoC side using ABORT mechanism", UVM_HIGH) mbx_abort(); aborted = 1'b1; @@ -605,7 +605,7 @@ class mbx_base_vseq extends cip_base_vseq #( `DV_CHECK_EQ(aborted, 1'b1, "BUSY asserted but not ABORTed") // Abort occurred, clear it from the OT FW side - `uvm_info(`gfn, "Clearing ABORT condition from OT FW side", UVM_LOW) + `uvm_info(`gfn, "Clearing ABORT condition from OT FW side", UVM_HIGH) ral.control.abort.set(1'b1); ral.control.error.set(1'b0); // Don't raise another ERROR! csr_update(ral.control);