diff --git a/sw/device/silicon_creator/lib/drivers/BUILD b/sw/device/silicon_creator/lib/drivers/BUILD index 0cc5ba7931b4ab..aef3ea81edef91 100644 --- a/sw/device/silicon_creator/lib/drivers/BUILD +++ b/sw/device/silicon_creator/lib/drivers/BUILD @@ -117,6 +117,35 @@ cc_test( ], ) +dual_cc_library( + name = "ctn_sram", + srcs = dual_inputs( + device = ["ctn_sram.c"], + host = ["mock_ctn_sram.cc"], + ), + hdrs = dual_inputs( + host = ["mock_ctn_sram.h"], + shared = ["ctn_sram.h"], + ), + deps = dual_inputs( + host = [ + "//sw/lib/sw/device/silicon_creator/testing:rom_test", + "//sw/lib/sw/device/base:global_mock", + "@googletest//:gtest", + ], + shared = [ + "//hw/ip/sram_ctrl/data:sram_ctrl_regs", + "//hw/top_darjeeling/ip/flash_ctrl/data/autogen:flash_ctrl_regs", + "//hw/top_darjeeling/sw/autogen:top_darjeeling", + "//sw/lib/sw/device/base:abs_mmio", + "//sw/lib/sw/device/base:hardened", + "//sw/lib/sw/device/base:memory", + "//sw/lib/sw/device/base:multibits", + "//sw/lib/sw/device/silicon_creator:error", + ], + ), +) + dual_cc_library( name = "flash_ctrl", srcs = dual_inputs( diff --git a/sw/device/silicon_creator/lib/drivers/ctn_sram.c b/sw/device/silicon_creator/lib/drivers/ctn_sram.c new file mode 100644 index 00000000000000..768222ab924a59 --- /dev/null +++ b/sw/device/silicon_creator/lib/drivers/ctn_sram.c @@ -0,0 +1,127 @@ +// Copyright lowRISC contributors. +// Licensed under the Apache License, Version 2.0, see LICENSE for details. +// SPDX-License-Identifier: Apache-2.0 + +#include "sw/device/silicon_creator/lib/drivers/ctn_sram.h" + +#include + +#include "sw/lib/sw/device/base/abs_mmio.h" +#include "sw/lib/sw/device/base/hardened.h" +#include "sw/lib/sw/device/base/memory.h" +#include "sw/lib/sw/device/base/multibits.h" + +#include "flash_ctrl_regs.h" // Generated. +#include "hw/top_darjeeling/sw/autogen/top_darjeeling.h" +#include "sram_ctrl_regs.h" // Generated. + +enum { + /* + * Base ctn sram address, exclusive. + */ + kBaseAddress = TOP_DARJEELING_RAM_CTN_BASE_ADDR, + /* + * Maximum ctn sram size to be used as flash, exclusive. + */ + kMaxSize = FLASH_CTRL_PARAM_BYTES_PER_BANK * FLASH_CTRL_PARAM_REG_NUM_BANKS, + /** + * Value of a word in sram after erase. + */ + kErasedWord = UINT32_MAX, +}; + +static_assert(kMaxSize <= TOP_DARJEELING_RAM_CTN_SIZE_BYTES, + "CTN SRAM area for image bootstap must be smaller than total."); + +rom_error_t ctn_sram_data_write(uint32_t addr, uint32_t len, const void *data) { + if (addr + len * sizeof(uint32_t) >= kMaxSize) { + return kErrorFlashCtrlDataWrite; + } + memcpy((void *)(kBaseAddress + addr), data, len * sizeof(uint32_t)); + return kErrorOk; +} + +rom_error_t ctn_sram_data_erase(uint32_t addr, + ctn_sram_erase_type_t erase_type) { + static_assert(__builtin_popcount(FLASH_CTRL_PARAM_BYTES_PER_BANK) == 1, + "Bytes per bank must be a power of two."); + + if (addr >= kMaxSize) { + return kErrorFlashCtrlDataErase; + } + size_t byte_count = 0; + switch (erase_type) { + case kCtnSramEraseTypeBank: + HARDENED_CHECK_EQ(erase_type, kCtnSramEraseTypeBank); + byte_count = FLASH_CTRL_PARAM_BYTES_PER_BANK; + break; + case kCtnSramEraseTypePage: + HARDENED_CHECK_EQ(erase_type, kCtnSramEraseTypePage); + byte_count = FLASH_CTRL_PARAM_BYTES_PER_PAGE; + break; + default: + HARDENED_TRAP(); + byte_count = 0U; + break; + } + // Truncate to the closest lower bank/page aligned address. + addr &= ~byte_count + 1; + memset((void *)(kBaseAddress + addr), 0xff, byte_count); + return kErrorOk; +} + +rom_error_t ctn_sram_data_erase_verify(uint32_t addr, + ctn_sram_erase_type_t erase_type) { + static_assert(__builtin_popcount(FLASH_CTRL_PARAM_BYTES_PER_BANK) == 1, + "Bytes per bank must be a power of two."); + + if (addr >= kMaxSize) { + return kErrorFlashCtrlDataErase; + } + size_t byte_count = 0; + rom_error_t error = kErrorFlashCtrlDataEraseVerify; + switch (launder32(erase_type)) { + case kCtnSramEraseTypeBank: + HARDENED_CHECK_EQ(erase_type, kCtnSramEraseTypeBank); + byte_count = FLASH_CTRL_PARAM_BYTES_PER_BANK; + error = kErrorOk ^ (byte_count - 1); + break; + case kCtnSramEraseTypePage: + HARDENED_CHECK_EQ(erase_type, kCtnSramEraseTypePage); + byte_count = FLASH_CTRL_PARAM_BYTES_PER_PAGE; + error = kErrorOk ^ (byte_count - 1); + break; + default: + HARDENED_TRAP(); + byte_count = 0U; + break; + } + + // Truncate to the closest lower bank/page aligned address. + addr &= ~byte_count + 1; + uint32_t mask = kErasedWord; + size_t i = 0, r = byte_count - 1; + for (; launder32(i) < byte_count && launder32(r) < byte_count; + i += sizeof(uint32_t), r -= sizeof(uint32_t)) { + uint32_t word = abs_mmio_read32(kBaseAddress + addr + i); + mask &= word; + error &= word; + } + HARDENED_CHECK_EQ(i, byte_count); + HARDENED_CHECK_EQ((uint32_t)r, UINT32_MAX); + + if (launder32(mask) == kErasedWord) { + HARDENED_CHECK_EQ(mask, kErasedWord); + return error ^ (byte_count - 1); + } + + return kErrorFlashCtrlDataEraseVerify; +} + +void ctn_sram_data_default_perms_set(ctn_sram_perms_t perms) { + // Note: provided to maintain compatibility with flash controller +} + +void ctn_sram_bank_erase_perms_set(hardened_bool_t enable) { + // Note: provided to maintain compatibility with flash controller +} diff --git a/sw/device/silicon_creator/lib/drivers/ctn_sram.h b/sw/device/silicon_creator/lib/drivers/ctn_sram.h new file mode 100644 index 00000000000000..62ec260cab46b7 --- /dev/null +++ b/sw/device/silicon_creator/lib/drivers/ctn_sram.h @@ -0,0 +1,123 @@ +// Copyright lowRISC contributors. +// Licensed under the Apache License, Version 2.0, see LICENSE for details. +// SPDX-License-Identifier: Apache-2.0 + +#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_DRIVERS_CTN_SRAM_H_ +#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_DRIVERS_CTN_SRAM_H_ + +#include "sw/lib/sw/device/base/hardened.h" +#include "sw/lib/sw/device/base/multibits.h" +#include "sw/lib/sw/device/silicon_creator/error.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * Write data into CTN SRAM at a specific address. + * + * @param addr starting address to write data into sram. + * @param len number of words of data to write into sram. + * @param data data to write into sram. + * @return Result of the operation. + */ +rom_error_t ctn_sram_data_write(uint32_t addr, uint32_t len, const void *data); + +/* + * Encoding generated with + * $ ./util/design/sparse-fsm-encode.py -d 5 -m 2 -n 32 \ + * -s 2181785819 --language=c + * + * Minimum Hamming distance: 14 + * Maximum Hamming distance: 14 + * Minimum Hamming weight: 14 + * Maximum Hamming weight: 18 + */ + +typedef enum ctn_sram_erase_type { + /** + * Erase a page. + */ + kCtnSramEraseTypePage = 0xaf0eab8b, + /** + * Erase a bank. + */ + kCtnSramEraseTypeBank = 0x80329be9, +} ctn_sram_erase_type_t; + +/** + * Erases a data partition page or bank. + * + * The flash controller will truncate to the closest page boundary for page + * erase operations, and to the nearest bank aligned boundary for bank erase + * operations. + * + * @param addr Address that falls within the bank or page being deleted. + * @param erase_type Whether to erase a page or a bank. + * @return Result of the operation. + */ +OT_WARN_UNUSED_RESULT +rom_error_t ctn_sram_data_erase(uint32_t addr, + ctn_sram_erase_type_t erase_type); + +/** + * Verifies that a data partition page or bank was erased. + * + * @param addr Address that falls within the bank or page erased. + * @param erase_type Whether to verify a page or a bank. + * @return Result of the operation. + */ +OT_WARN_UNUSED_RESULT +rom_error_t ctn_sram_data_erase_verify(uint32_t addr, + ctn_sram_erase_type_t erase_type); + +/** + * A struct for specifying access permissions. + * + * ctn_sram config registers use 4-bits for boolean values. Use + * `kMultiBitBool4True` to enable and `kMultiBitBool4False` to disable + * permissions. + * + * Note: provided to maintain compatibility with flash controller + */ +typedef struct ctn_sram_perms { + /** + * Read. + */ + multi_bit_bool_t read; + /** + * Write. + */ + multi_bit_bool_t write; + /** + * Erase. + */ + multi_bit_bool_t erase; +} ctn_sram_perms_t; + +/** + * Sets default access permissions for the data partition. + * + * A permission is enabled only if the corresponding field in `perms` is + * `kMultiBitBool4True`. + * + * Note: provided to maintain compatibility with flash controller + * + * @param perms New permissions. + */ +void ctn_sram_data_default_perms_set(ctn_sram_perms_t perms); + +/** + * Set bank erase permissions for both flash banks. + * + * Note: provided to maintain compatibility with flash controller + * + * @param enable Whether to enable bank erase. + */ +void ctn_sram_bank_erase_perms_set(hardened_bool_t enable); + +#ifdef __cplusplus +} +#endif + +#endif // OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_DRIVERS_CTN_SRAM_H_ diff --git a/sw/device/silicon_creator/lib/drivers/mock_ctn_sram.cc b/sw/device/silicon_creator/lib/drivers/mock_ctn_sram.cc new file mode 100644 index 00000000000000..f21fc72e4d119f --- /dev/null +++ b/sw/device/silicon_creator/lib/drivers/mock_ctn_sram.cc @@ -0,0 +1,33 @@ +// Copyright lowRISC contributors. +// Licensed under the Apache License, Version 2.0, see LICENSE for details. +// SPDX-License-Identifier: Apache-2.0 + +#include "sw/device/silicon_creator/lib/drivers/mock_ctn_sram.h" + +namespace rom_test { +extern "C" { + +rom_error_t ctn_sram_data_write(uint32_t addr, uint32_t len, const void *data) { + return MockCtnSram::Instance().DataWrite(addr, len, data); +} + +rom_error_t ctn_sram_data_erase(uint32_t addr, + ctn_sram_erase_type_t erase_type) { + return MockCtnSram::Instance().DataErase(addr, erase_type); +} + +rom_error_t ctn_sram_data_erase_verify(uint32_t addr, + ctn_sram_erase_type_t erase_type) { + return MockCtnSram::Instance().DataEraseVerify(addr, erase_type); +} + +void ctn_sram_data_default_perms_set(ctn_sram_perms_t perms) { + MockCtnSram::Instance().DataDefaultPermsSet(perms); +} + +void ctn_sram_bank_erase_perms_set(hardened_bool_t enable) { + MockCtnSram::Instance().BankErasePermsSet(enable); +} + +} // extern "C" +} // namespace rom_test diff --git a/sw/device/silicon_creator/lib/drivers/mock_ctn_sram.h b/sw/device/silicon_creator/lib/drivers/mock_ctn_sram.h new file mode 100644 index 00000000000000..5555a147cd072f --- /dev/null +++ b/sw/device/silicon_creator/lib/drivers/mock_ctn_sram.h @@ -0,0 +1,32 @@ +// Copyright lowRISC contributors. +// Licensed under the Apache License, Version 2.0, see LICENSE for details. +// SPDX-License-Identifier: Apache-2.0 + +#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_DRIVERS_MOCK_CTN_SRAM_H_ +#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_DRIVERS_MOCK_CTN_SRAM_H_ + +#include "sw/device/silicon_creator/lib/drivers/ctn_sram.h" +#include "sw/lib/sw/device/base/global_mock.h" + +namespace rom_test { +namespace internal { + +/** + * Mock class for ctn_sram.c. + */ +class MockCtnSram : public global_mock::GlobalMock { + public: + MOCK_METHOD(rom_error_t, DataWrite, (uint32_t, uint32_t, const void *)); + MOCK_METHOD(rom_error_t, DataErase, (uint32_t, ctn_sram_erase_type_t)); + MOCK_METHOD(rom_error_t, DataEraseVerify, (uint32_t, ctn_sram_erase_type_t)); + MOCK_METHOD(void, DataDefaultPermsSet, (ctn_sram_perms_t)); + MOCK_METHOD(void, BankErasePermsSet, (hardened_bool_t)); +}; + +} // namespace internal + +using MockCtnSram = testing::StrictMock; + +} // namespace rom_test + +#endif // OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_DRIVERS_MOCK_CTN_SRAM_H_ diff --git a/sw/device/silicon_creator/rom/BUILD b/sw/device/silicon_creator/rom/BUILD index afe6e9694e667e..553a30e5d4ce51 100644 --- a/sw/device/silicon_creator/rom/BUILD +++ b/sw/device/silicon_creator/rom/BUILD @@ -539,7 +539,7 @@ cc_library( "//hw/ip/otp_ctrl/data:otp_ctrl_regs", "//hw/top_darjeeling/ip/flash_ctrl/data/autogen:flash_ctrl_regs", "//hw/top_darjeeling/sw/autogen:top_darjeeling", - "//sw/device/silicon_creator/lib/drivers:flash_ctrl", + "//sw/device/silicon_creator/lib/drivers:ctn_sram", "//sw/device/silicon_creator/lib/drivers:otp", "//sw/device/silicon_creator/lib/drivers:rstmgr", "//sw/device/silicon_creator/lib/drivers:spi_device", diff --git a/sw/device/silicon_creator/rom/bootstrap.c b/sw/device/silicon_creator/rom/bootstrap.c index d6c5ab8bb095be..9e9f42256b70cc 100644 --- a/sw/device/silicon_creator/rom/bootstrap.c +++ b/sw/device/silicon_creator/rom/bootstrap.c @@ -4,8 +4,9 @@ #include "sw/device/silicon_creator/rom/bootstrap.h" -#include +#include +#include "sw/device/silicon_creator/lib/drivers/ctn_sram.h" #include "sw/device/silicon_creator/lib/drivers/otp.h" #include "sw/device/silicon_creator/lib/drivers/rstmgr.h" #include "sw/device/silicon_creator/lib/drivers/spi_device.h" @@ -15,21 +16,21 @@ #include "sw/lib/sw/device/silicon_creator/base/chip.h" #include "sw/lib/sw/device/silicon_creator/error.h" +#include "flash_ctrl_regs.h" #include "gpio_regs.h" #include "hw/top_darjeeling/sw/autogen/top_darjeeling.h" #include "otp_ctrl_regs.h" enum { /* - * Base ctn sram address, exclusive. + * Maximum flash address, exclusive. */ - kBaseAddress = TOP_DARJEELING_RAM_CTN_BASE_ADDR, - /* - * Maximum ctn sram size, exclusive. - */ - kMaxSize = TOP_DARJEELING_RAM_CTN_SIZE_BYTES, + kMaxAddress = + FLASH_CTRL_PARAM_BYTES_PER_BANK * FLASH_CTRL_PARAM_REG_NUM_BANKS, }; +static_assert(FLASH_CTRL_PARAM_REG_NUM_BANKS == 2, "Flash must have 2 banks"); + /** * Bootstrap states. * @@ -70,9 +71,14 @@ typedef enum bootstrap_state { */ OT_WARN_UNUSED_RESULT static rom_error_t bootstrap_chip_erase(void) { - memset((void *)kBaseAddress, 0x0, kMaxSize); + ctn_sram_bank_erase_perms_set(kHardenedBoolTrue); + rom_error_t err_0 = ctn_sram_data_erase(0, kCtnSramEraseTypeBank); + rom_error_t err_1 = ctn_sram_data_erase(FLASH_CTRL_PARAM_BYTES_PER_BANK, + kCtnSramEraseTypeBank); + ctn_sram_bank_erase_perms_set(kHardenedBoolFalse); - return kErrorOk; + HARDENED_RETURN_IF_ERROR(err_0); + return err_1; } /** @@ -84,6 +90,8 @@ static rom_error_t bootstrap_chip_erase(void) { */ OT_WARN_UNUSED_RESULT static rom_error_t bootstrap_sector_erase(uint32_t addr) { + static_assert(FLASH_CTRL_PARAM_BYTES_PER_PAGE == 2048, + "Page size must be 2 KiB"); enum { /** * Mask for truncating `addr` to the lower 4 KiB aligned address. @@ -91,21 +99,34 @@ static rom_error_t bootstrap_sector_erase(uint32_t addr) { kPageAddrMask = ~UINT32_C(4096) + 1, }; - if (addr >= kMaxSize) { + if (addr >= kMaxAddress) { return kErrorBootstrapEraseAddress; } addr &= kPageAddrMask; - memset((void *)(kBaseAddress + addr), 0x0, 4096); + ctn_sram_data_default_perms_set((ctn_sram_perms_t){ + .read = kMultiBitBool4False, + .write = kMultiBitBool4False, + .erase = kMultiBitBool4True, + }); + rom_error_t err_0 = ctn_sram_data_erase(addr, kCtnSramEraseTypePage); + rom_error_t err_1 = ctn_sram_data_erase( + addr + FLASH_CTRL_PARAM_BYTES_PER_PAGE, kCtnSramEraseTypePage); + ctn_sram_data_default_perms_set((ctn_sram_perms_t){ + .read = kMultiBitBool4False, + .write = kMultiBitBool4False, + .erase = kMultiBitBool4False, + }); - return kErrorOk; + HARDENED_RETURN_IF_ERROR(err_0); + return err_1; } /** * Handles access permissions and programs up to 256 bytes of memory * starting at `addr`. * - * @param addr Address to write to data into memory. + * @param addr Address to write data into memory. * @param byte_count Number of bytes to write into memory. * @param data Data to write into memory. * @return Result of the operation. @@ -113,11 +134,75 @@ static rom_error_t bootstrap_sector_erase(uint32_t addr) { OT_WARN_UNUSED_RESULT static rom_error_t bootstrap_page_program(uint32_t addr, size_t byte_count, uint8_t *data) { - if (addr + byte_count >= kMaxSize) { + static_assert(__builtin_popcount(FLASH_CTRL_PARAM_BYTES_PER_WORD) == 1, + "Bytes per flash word must be a power of two."); + enum { + /** + * Mask for checking that `addr` is flash word aligned. + */ + kFlashWordMask = FLASH_CTRL_PARAM_BYTES_PER_WORD - 1, + /** + * SPI flash programming page size in bytes. + */ + kFlashProgPageSize = 256, + /** + * Mask for checking whether `addr` is flash programming page aligned. + * + * Flash programming page size is 256 bytes, writes that start at an `addr` + * with a non-zero LSB wrap to the start of the 256 byte region. + */ + kFlashProgPageMask = kFlashProgPageSize - 1, + }; + + if (addr & kFlashWordMask || addr >= kMaxAddress) { return kErrorBootstrapProgramAddress; } - memcpy((void *)(kBaseAddress + addr), data, byte_count); - return kErrorOk; + + // Round up to next flash word and fill missing bytes with `0xff`. + size_t flash_word_misalignment = byte_count & kFlashWordMask; + if (flash_word_misalignment > 0) { + size_t padding_byte_count = + FLASH_CTRL_PARAM_BYTES_PER_WORD - flash_word_misalignment; + for (size_t i = 0; i < padding_byte_count; ++i) { + data[byte_count++] = 0xff; + } + } + size_t rem_word_count = byte_count / sizeof(uint32_t); + + ctn_sram_data_default_perms_set((ctn_sram_perms_t){ + .read = kMultiBitBool4False, + .write = kMultiBitBool4True, + .erase = kMultiBitBool4False, + }); + // Perform two writes if the start address is not page-aligned (256 bytes). + // Note: Address is flash-word-aligned (8 bytes) due to the check above. + rom_error_t err_0 = kErrorOk; + size_t prog_page_misalignment = addr & kFlashProgPageMask; + if (prog_page_misalignment > 0) { + size_t word_count = + (kFlashProgPageSize - prog_page_misalignment) / sizeof(uint32_t); + if (word_count > rem_word_count) { + word_count = rem_word_count; + } + err_0 = ctn_sram_data_write(addr, word_count, data); + rem_word_count -= word_count; + data += word_count * sizeof(uint32_t); + // Wrap to the beginning of the current page since PAGE_PROGRAM modifies + // a single page only. + addr &= ~(uint32_t)kFlashProgPageMask; + } + rom_error_t err_1 = kErrorOk; + if (rem_word_count > 0) { + err_1 = ctn_sram_data_write(addr, rem_word_count, data); + } + ctn_sram_data_default_perms_set((ctn_sram_perms_t){ + .read = kMultiBitBool4False, + .write = kMultiBitBool4False, + .erase = kMultiBitBool4False, + }); + + HARDENED_RETURN_IF_ERROR(err_0); + return err_1; } /** @@ -170,28 +255,11 @@ OT_WARN_UNUSED_RESULT static rom_error_t bootstrap_handle_erase_verify(bootstrap_state_t *state) { HARDENED_CHECK_EQ(*state, kBootstrapStateEraseVerify); - memset((void *)kBaseAddress, 0x0, kMaxSize); - - rom_error_t err_0 = kErrorOk; - // Check first page for zero - for (uint32_t i = 0; i < 4096 / 4; i++) { - uint32_t zero = 0x0; - if (memcmp((void *)(kBaseAddress + 4 * i), (void *)&zero, 4)) { - err_0 = kErrorFlashCtrlDataEraseVerify; - break; - } - } - if (err_0 == kErrorOk) { - // Check subsequent pages for zero - for (uint32_t i = 1; i < kMaxSize / 4096; i++) { - if (memcmp((void *)(kBaseAddress), (void *)(kBaseAddress + 4096 * i), - 4096)) { - err_0 = kErrorFlashCtrlDataEraseVerify; - break; - } - } - } + rom_error_t err_0 = ctn_sram_data_erase_verify(0, kCtnSramEraseTypeBank); + rom_error_t err_1 = ctn_sram_data_erase_verify( + FLASH_CTRL_PARAM_BYTES_PER_BANK, kCtnSramEraseTypeBank); HARDENED_RETURN_IF_ERROR(err_0); + HARDENED_RETURN_IF_ERROR(err_1); *state = kBootstrapStateProgram; spi_device_flash_status_clear(); @@ -209,6 +277,11 @@ static rom_error_t bootstrap_handle_program(bootstrap_state_t *state) { static_assert(alignof(spi_device_cmd_t) >= sizeof(uint32_t) && offsetof(spi_device_cmd_t, payload) >= sizeof(uint32_t), "Payload must be word aligned."); + static_assert( + sizeof((spi_device_cmd_t){0}.payload) % FLASH_CTRL_PARAM_BYTES_PER_WORD == + 0, + "Payload size must be a multiple of flash word size."); + HARDENED_CHECK_EQ(*state, kBootstrapStateProgram); spi_device_cmd_t cmd; diff --git a/sw/device/silicon_creator/rom/bootstrap_unittest.cc b/sw/device/silicon_creator/rom/bootstrap_unittest.cc index 5f942a577ad1e7..b08aec5fb26f3d 100644 --- a/sw/device/silicon_creator/rom/bootstrap_unittest.cc +++ b/sw/device/silicon_creator/rom/bootstrap_unittest.cc @@ -8,7 +8,7 @@ #include #include "gtest/gtest.h" -#include "sw/device/silicon_creator/lib/drivers/mock_flash_ctrl.h" +#include "sw/device/silicon_creator/lib/drivers/mock_ctn_sram.h" #include "sw/device/silicon_creator/lib/drivers/mock_otp.h" #include "sw/device/silicon_creator/lib/drivers/mock_rstmgr.h" #include "sw/device/silicon_creator/lib/drivers/mock_spi_device.h" @@ -21,8 +21,8 @@ #include "hw/top_darjeeling/sw/autogen/top_darjeeling.h" #include "otp_ctrl_regs.h" -bool operator==(flash_ctrl_perms_t lhs, flash_ctrl_perms_t rhs) { - return std::memcmp(&lhs, &rhs, sizeof(flash_ctrl_perms_t)) == 0; +bool operator==(ctn_sram_perms_t lhs, ctn_sram_perms_t rhs) { + return std::memcmp(&lhs, &rhs, sizeof(ctn_sram_perms_t)) == 0; } namespace bootstrap_unittest { @@ -79,23 +79,23 @@ class BootstrapTest : public rom_test::RomTest { /** * Sets an expectation for enabling write for the data partition. */ - void ExpectFlashCtrlWriteEnable() { - EXPECT_CALL(flash_ctrl_, DataDefaultPermsSet((flash_ctrl_perms_t){ - .read = kMultiBitBool4False, - .write = kMultiBitBool4True, - .erase = kMultiBitBool4False, - })); + void ExpectCtnSramWriteEnable() { + EXPECT_CALL(ctn_sram_, DataDefaultPermsSet((ctn_sram_perms_t){ + .read = kMultiBitBool4False, + .write = kMultiBitBool4True, + .erase = kMultiBitBool4False, + })); } /** * Sets an expectation for disabling all permissions for the data partition. */ - void ExpectFlashCtrlAllDisable() { - EXPECT_CALL(flash_ctrl_, DataDefaultPermsSet((flash_ctrl_perms_t){ - .read = kMultiBitBool4False, - .write = kMultiBitBool4False, - .erase = kMultiBitBool4False, - })); + void ExpectCtnSramAllDisable() { + EXPECT_CALL(ctn_sram_, DataDefaultPermsSet((ctn_sram_perms_t){ + .read = kMultiBitBool4False, + .write = kMultiBitBool4False, + .erase = kMultiBitBool4False, + })); } /** @@ -104,14 +104,14 @@ class BootstrapTest : public rom_test::RomTest { * @param err0 Result of erase for the first bank. * @param err1 Result of erase for the second bank. */ - void ExpectFlashCtrlChipErase(rom_error_t err0, rom_error_t err1) { - EXPECT_CALL(flash_ctrl_, BankErasePermsSet(kHardenedBoolTrue)); - EXPECT_CALL(flash_ctrl_, DataErase(0, kFlashCtrlEraseTypeBank)) + void ExpectCtnSramChipErase(rom_error_t err0, rom_error_t err1) { + EXPECT_CALL(ctn_sram_, BankErasePermsSet(kHardenedBoolTrue)); + EXPECT_CALL(ctn_sram_, DataErase(0, kCtnSramEraseTypeBank)) .WillOnce(Return(err0)); - EXPECT_CALL(flash_ctrl_, DataErase(FLASH_CTRL_PARAM_BYTES_PER_BANK, - kFlashCtrlEraseTypeBank)) + EXPECT_CALL(ctn_sram_, DataErase(FLASH_CTRL_PARAM_BYTES_PER_BANK, + kCtnSramEraseTypeBank)) .WillOnce(Return(err1)); - EXPECT_CALL(flash_ctrl_, BankErasePermsSet(kHardenedBoolFalse)); + EXPECT_CALL(ctn_sram_, BankErasePermsSet(kHardenedBoolFalse)); } /** @@ -121,19 +121,19 @@ class BootstrapTest : public rom_test::RomTest { * @param err1 Result of erase for the second page. * @param addr Erase start address. */ - void ExpectFlashCtrlSectorErase(rom_error_t err0, rom_error_t err1, - uint32_t addr) { - EXPECT_CALL(flash_ctrl_, DataDefaultPermsSet((flash_ctrl_perms_t){ - .read = kMultiBitBool4False, - .write = kMultiBitBool4False, - .erase = kMultiBitBool4True, - })); - EXPECT_CALL(flash_ctrl_, DataErase(addr, kFlashCtrlEraseTypePage)) + void ExpectCtnSramSectorErase(rom_error_t err0, rom_error_t err1, + uint32_t addr) { + EXPECT_CALL(ctn_sram_, DataDefaultPermsSet((ctn_sram_perms_t){ + .read = kMultiBitBool4False, + .write = kMultiBitBool4False, + .erase = kMultiBitBool4True, + })); + EXPECT_CALL(ctn_sram_, DataErase(addr, kCtnSramEraseTypePage)) .WillOnce(Return(err0)); - EXPECT_CALL(flash_ctrl_, DataErase(addr + FLASH_CTRL_PARAM_BYTES_PER_PAGE, - kFlashCtrlEraseTypePage)) + EXPECT_CALL(ctn_sram_, DataErase(addr + FLASH_CTRL_PARAM_BYTES_PER_PAGE, + kCtnSramEraseTypePage)) .WillOnce(Return(err1)); - ExpectFlashCtrlAllDisable(); + ExpectCtnSramAllDisable(); } /** @@ -142,16 +142,16 @@ class BootstrapTest : public rom_test::RomTest { * @param err0 Result of erase verification for the first bank. * @param err1 Result of erase verification for the second bank. */ - void ExpectFlashCtrlEraseVerify(rom_error_t err0, rom_error_t err1) { - EXPECT_CALL(flash_ctrl_, DataEraseVerify(0, kFlashCtrlEraseTypeBank)) + void ExpectCtnSramEraseVerify(rom_error_t err0, rom_error_t err1) { + EXPECT_CALL(ctn_sram_, DataEraseVerify(0, kCtnSramEraseTypeBank)) .WillOnce(Return(err0)); - EXPECT_CALL(flash_ctrl_, DataEraseVerify(FLASH_CTRL_PARAM_BYTES_PER_BANK, - kFlashCtrlEraseTypeBank)) + EXPECT_CALL(ctn_sram_, DataEraseVerify(FLASH_CTRL_PARAM_BYTES_PER_BANK, + kCtnSramEraseTypeBank)) .WillOnce(Return(err1)); } rom_test::MockAbsMmio mmio_; - rom_test::MockFlashCtrl flash_ctrl_; + rom_test::MockCtnSram ctn_sram_; rom_test::MockOtp otp_; rom_test::MockRstmgr rstmgr_; rom_test::MockSpiDevice spi_device_; @@ -255,9 +255,9 @@ TEST_F(BootstrapTest, PayloadOverflowProgram) { EXPECT_CALL(spi_device_, Init()); ExpectSpiCmd(ChipEraseCmd()); ExpectSpiFlashStatusGet(true); - ExpectFlashCtrlChipErase(kErrorOk, kErrorOk); + ExpectCtnSramChipErase(kErrorOk, kErrorOk); // Verify - ExpectFlashCtrlEraseVerify(kErrorOk, kErrorOk); + ExpectCtnSramEraseVerify(kErrorOk, kErrorOk); EXPECT_CALL(spi_device_, FlashStatusClear()); // Program EXPECT_CALL(spi_device_, CmdGet(NotNull())) @@ -272,9 +272,9 @@ TEST_F(BootstrapTest, BootstrapSimple) { EXPECT_CALL(spi_device_, Init()); ExpectSpiCmd(ChipEraseCmd()); ExpectSpiFlashStatusGet(true); - ExpectFlashCtrlChipErase(kErrorOk, kErrorOk); + ExpectCtnSramChipErase(kErrorOk, kErrorOk); // Verify - ExpectFlashCtrlEraseVerify(kErrorOk, kErrorOk); + ExpectCtnSramEraseVerify(kErrorOk, kErrorOk); EXPECT_CALL(spi_device_, FlashStatusClear()); // Program auto cmd = PageProgramCmd(0, 16); @@ -284,10 +284,10 @@ TEST_F(BootstrapTest, BootstrapSimple) { std::vector flash_bytes(cmd.payload, cmd.payload + cmd.payload_byte_count); - ExpectFlashCtrlWriteEnable(); - EXPECT_CALL(flash_ctrl_, DataWrite(0, 4, HasBytes(flash_bytes))) + ExpectCtnSramWriteEnable(); + EXPECT_CALL(ctn_sram_, DataWrite(0, 4, HasBytes(flash_bytes))) .WillOnce(Return(kErrorOk)); - ExpectFlashCtrlAllDisable(); + ExpectCtnSramAllDisable(); EXPECT_CALL(spi_device_, FlashStatusClear()); // Reset @@ -303,9 +303,9 @@ TEST_F(BootstrapTest, BootstrapOddPayload) { EXPECT_CALL(spi_device_, Init()); ExpectSpiCmd(ChipEraseCmd()); ExpectSpiFlashStatusGet(true); - ExpectFlashCtrlChipErase(kErrorOk, kErrorOk); + ExpectCtnSramChipErase(kErrorOk, kErrorOk); // Verify - ExpectFlashCtrlEraseVerify(kErrorOk, kErrorOk); + ExpectCtnSramEraseVerify(kErrorOk, kErrorOk); EXPECT_CALL(spi_device_, FlashStatusClear()); // Program auto cmd = PageProgramCmd(0, 17); @@ -318,10 +318,10 @@ TEST_F(BootstrapTest, BootstrapOddPayload) { flash_bytes.push_back(0xff); } - ExpectFlashCtrlWriteEnable(); - EXPECT_CALL(flash_ctrl_, DataWrite(cmd.address, 6, HasBytes(flash_bytes))) + ExpectCtnSramWriteEnable(); + EXPECT_CALL(ctn_sram_, DataWrite(cmd.address, 6, HasBytes(flash_bytes))) .WillOnce(Return(kErrorOk)); - ExpectFlashCtrlAllDisable(); + ExpectCtnSramAllDisable(); EXPECT_CALL(spi_device_, FlashStatusClear()); // Reset @@ -337,9 +337,9 @@ TEST_F(BootstrapTest, BootstrapMisalignedAddrLongPayload) { EXPECT_CALL(spi_device_, Init()); ExpectSpiCmd(ChipEraseCmd()); ExpectSpiFlashStatusGet(true); - ExpectFlashCtrlChipErase(kErrorOk, kErrorOk); + ExpectCtnSramChipErase(kErrorOk, kErrorOk); // Verify - ExpectFlashCtrlEraseVerify(kErrorOk, kErrorOk); + ExpectCtnSramEraseVerify(kErrorOk, kErrorOk); EXPECT_CALL(spi_device_, FlashStatusClear()); // Program auto cmd = PageProgramCmd(0xfff0, 256); @@ -350,12 +350,12 @@ TEST_F(BootstrapTest, BootstrapMisalignedAddrLongPayload) { std::vector flash_bytes_1(cmd.payload + 16, cmd.payload + cmd.payload_byte_count); - ExpectFlashCtrlWriteEnable(); - EXPECT_CALL(flash_ctrl_, DataWrite(0xfff0, 4, HasBytes(flash_bytes_0))) + ExpectCtnSramWriteEnable(); + EXPECT_CALL(ctn_sram_, DataWrite(0xfff0, 4, HasBytes(flash_bytes_0))) .WillOnce(Return(kErrorOk)); - EXPECT_CALL(flash_ctrl_, DataWrite(0xff00, 60, HasBytes(flash_bytes_1))) + EXPECT_CALL(ctn_sram_, DataWrite(0xff00, 60, HasBytes(flash_bytes_1))) .WillOnce(Return(kErrorOk)); - ExpectFlashCtrlAllDisable(); + ExpectCtnSramAllDisable(); EXPECT_CALL(spi_device_, FlashStatusClear()); // Reset @@ -371,9 +371,9 @@ TEST_F(BootstrapTest, BootstrapMisalignedAddrShortPayload) { EXPECT_CALL(spi_device_, Init()); ExpectSpiCmd(ChipEraseCmd()); ExpectSpiFlashStatusGet(true); - ExpectFlashCtrlChipErase(kErrorOk, kErrorOk); + ExpectCtnSramChipErase(kErrorOk, kErrorOk); // Verify - ExpectFlashCtrlEraseVerify(kErrorOk, kErrorOk); + ExpectCtnSramEraseVerify(kErrorOk, kErrorOk); EXPECT_CALL(spi_device_, FlashStatusClear()); // Program auto cmd = PageProgramCmd(816, 8); @@ -383,10 +383,10 @@ TEST_F(BootstrapTest, BootstrapMisalignedAddrShortPayload) { std::vector flash_bytes(cmd.payload, cmd.payload + cmd.payload_byte_count); - ExpectFlashCtrlWriteEnable(); - EXPECT_CALL(flash_ctrl_, DataWrite(816, 2, HasBytes(flash_bytes))) + ExpectCtnSramWriteEnable(); + EXPECT_CALL(ctn_sram_, DataWrite(816, 2, HasBytes(flash_bytes))) .WillOnce(Return(kErrorOk)); - ExpectFlashCtrlAllDisable(); + ExpectCtnSramAllDisable(); EXPECT_CALL(spi_device_, FlashStatusClear()); // Reset @@ -402,9 +402,9 @@ TEST_F(BootstrapTest, BootstrapStartWithSectorErase) { EXPECT_CALL(spi_device_, Init()); ExpectSpiCmd(SectorEraseCmd(0)); ExpectSpiFlashStatusGet(true); - ExpectFlashCtrlChipErase(kErrorOk, kErrorOk); + ExpectCtnSramChipErase(kErrorOk, kErrorOk); // Verify - ExpectFlashCtrlEraseVerify(kErrorOk, kErrorOk); + ExpectCtnSramEraseVerify(kErrorOk, kErrorOk); EXPECT_CALL(spi_device_, FlashStatusClear()); // Program auto cmd = PageProgramCmd(0, 16); @@ -414,12 +414,12 @@ TEST_F(BootstrapTest, BootstrapStartWithSectorErase) { std::vector flash_bytes(cmd.payload, cmd.payload + cmd.payload_byte_count); - ExpectFlashCtrlWriteEnable(); - EXPECT_CALL(flash_ctrl_, + ExpectCtnSramWriteEnable(); + EXPECT_CALL(ctn_sram_, DataWrite(cmd.address, cmd.payload_byte_count / sizeof(uint32_t), HasBytes(flash_bytes))) .WillOnce(Return(kErrorOk)); - ExpectFlashCtrlAllDisable(); + ExpectCtnSramAllDisable(); EXPECT_CALL(spi_device_, FlashStatusClear()); // Reset @@ -435,9 +435,9 @@ TEST_F(BootstrapTest, BootstrapProgramWithErase) { EXPECT_CALL(spi_device_, Init()); ExpectSpiCmd(ChipEraseCmd()); ExpectSpiFlashStatusGet(true); - ExpectFlashCtrlChipErase(kErrorOk, kErrorOk); + ExpectCtnSramChipErase(kErrorOk, kErrorOk); // Verify - ExpectFlashCtrlEraseVerify(kErrorOk, kErrorOk); + ExpectCtnSramEraseVerify(kErrorOk, kErrorOk); EXPECT_CALL(spi_device_, FlashStatusClear()); // Program auto cmd = PageProgramCmd(0, 16); @@ -447,23 +447,23 @@ TEST_F(BootstrapTest, BootstrapProgramWithErase) { std::vector flash_bytes(cmd.payload, cmd.payload + cmd.payload_byte_count); - ExpectFlashCtrlWriteEnable(); - EXPECT_CALL(flash_ctrl_, + ExpectCtnSramWriteEnable(); + EXPECT_CALL(ctn_sram_, DataWrite(cmd.address, cmd.payload_byte_count / sizeof(uint32_t), HasBytes(flash_bytes))) .WillOnce(Return(kErrorOk)); - ExpectFlashCtrlAllDisable(); + ExpectCtnSramAllDisable(); EXPECT_CALL(spi_device_, FlashStatusClear()); // Chip erase ExpectSpiCmd(ChipEraseCmd()); ExpectSpiFlashStatusGet(true); - ExpectFlashCtrlChipErase(kErrorOk, kErrorOk); + ExpectCtnSramChipErase(kErrorOk, kErrorOk); EXPECT_CALL(spi_device_, FlashStatusClear()); // Sector erase ExpectSpiCmd(SectorEraseCmd(0)); ExpectSpiFlashStatusGet(true); - ExpectFlashCtrlSectorErase(kErrorOk, kErrorOk, 0); + ExpectCtnSramSectorErase(kErrorOk, kErrorOk, 0); EXPECT_CALL(spi_device_, FlashStatusClear()); // Reset @@ -479,24 +479,24 @@ TEST_F(BootstrapTest, MisalignedEraseAddress) { EXPECT_CALL(spi_device_, Init()); ExpectSpiCmd(ChipEraseCmd()); ExpectSpiFlashStatusGet(true); - ExpectFlashCtrlChipErase(kErrorOk, kErrorOk); + ExpectCtnSramChipErase(kErrorOk, kErrorOk); // Verify - ExpectFlashCtrlEraseVerify(kErrorOk, kErrorOk); + ExpectCtnSramEraseVerify(kErrorOk, kErrorOk); EXPECT_CALL(spi_device_, FlashStatusClear()); // Erase with misaligned and aligned addresses ExpectSpiCmd(SectorEraseCmd(5)); ExpectSpiFlashStatusGet(true); - ExpectFlashCtrlSectorErase(kErrorOk, kErrorOk, 0); + ExpectCtnSramSectorErase(kErrorOk, kErrorOk, 0); EXPECT_CALL(spi_device_, FlashStatusClear()); ExpectSpiCmd(SectorEraseCmd(4096)); ExpectSpiFlashStatusGet(true); - ExpectFlashCtrlSectorErase(kErrorOk, kErrorOk, 4096); + ExpectCtnSramSectorErase(kErrorOk, kErrorOk, 4096); EXPECT_CALL(spi_device_, FlashStatusClear()); ExpectSpiCmd(SectorEraseCmd(8195)); ExpectSpiFlashStatusGet(true); - ExpectFlashCtrlSectorErase(kErrorOk, kErrorOk, 8192); + ExpectCtnSramSectorErase(kErrorOk, kErrorOk, 8192); EXPECT_CALL(spi_device_, FlashStatusClear()); // Reset ExpectSpiCmd(ResetCmd()); @@ -516,9 +516,9 @@ TEST_F(BootstrapTest, IgnoredCommands) { EXPECT_CALL(spi_device_, FlashStatusClear()); ExpectSpiCmd(ChipEraseCmd()); ExpectSpiFlashStatusGet(true); - ExpectFlashCtrlChipErase(kErrorOk, kErrorOk); + ExpectCtnSramChipErase(kErrorOk, kErrorOk); // Phase 1: Verify - ExpectFlashCtrlEraseVerify(kErrorOk, kErrorOk); + ExpectCtnSramEraseVerify(kErrorOk, kErrorOk); EXPECT_CALL(spi_device_, FlashStatusClear()); // Phase 2: Erase/Program ExpectSpiCmd(SectorEraseCmd(0)); @@ -539,7 +539,7 @@ TEST_F(BootstrapTest, EraseBank0Error) { EXPECT_CALL(spi_device_, Init()); ExpectSpiCmd(ChipEraseCmd()); ExpectSpiFlashStatusGet(true); - ExpectFlashCtrlChipErase(kErrorUnknown, kErrorOk); + ExpectCtnSramChipErase(kErrorUnknown, kErrorOk); EXPECT_EQ(bootstrap(), kErrorUnknown); } @@ -549,7 +549,7 @@ TEST_F(BootstrapTest, EraseBank1Error) { EXPECT_CALL(spi_device_, Init()); ExpectSpiCmd(ChipEraseCmd()); ExpectSpiFlashStatusGet(true); - ExpectFlashCtrlChipErase(kErrorOk, kErrorUnknown); + ExpectCtnSramChipErase(kErrorOk, kErrorUnknown); EXPECT_EQ(bootstrap(), kErrorUnknown); } @@ -560,9 +560,9 @@ TEST_F(BootstrapTest, EraseVerifyBank0Error) { EXPECT_CALL(spi_device_, Init()); ExpectSpiCmd(ChipEraseCmd()); ExpectSpiFlashStatusGet(true); - ExpectFlashCtrlChipErase(kErrorOk, kErrorOk); + ExpectCtnSramChipErase(kErrorOk, kErrorOk); // Verify - ExpectFlashCtrlEraseVerify(kErrorUnknown, kErrorOk); + ExpectCtnSramEraseVerify(kErrorUnknown, kErrorOk); EXPECT_EQ(bootstrap(), kErrorUnknown); } @@ -573,9 +573,9 @@ TEST_F(BootstrapTest, EraseVerifyBank1Error) { EXPECT_CALL(spi_device_, Init()); ExpectSpiCmd(ChipEraseCmd()); ExpectSpiFlashStatusGet(true); - ExpectFlashCtrlChipErase(kErrorOk, kErrorOk); + ExpectCtnSramChipErase(kErrorOk, kErrorOk); // Verify - ExpectFlashCtrlEraseVerify(kErrorOk, kErrorUnknown); + ExpectCtnSramEraseVerify(kErrorOk, kErrorUnknown); EXPECT_EQ(bootstrap(), kErrorUnknown); } @@ -586,9 +586,9 @@ TEST_F(BootstrapTest, DataWriteError) { EXPECT_CALL(spi_device_, Init()); ExpectSpiCmd(ChipEraseCmd()); ExpectSpiFlashStatusGet(true); - ExpectFlashCtrlChipErase(kErrorOk, kErrorOk); + ExpectCtnSramChipErase(kErrorOk, kErrorOk); // Verify - ExpectFlashCtrlEraseVerify(kErrorOk, kErrorOk); + ExpectCtnSramEraseVerify(kErrorOk, kErrorOk); EXPECT_CALL(spi_device_, FlashStatusClear()); // Program auto cmd = PageProgramCmd(0, 16); @@ -598,12 +598,12 @@ TEST_F(BootstrapTest, DataWriteError) { std::vector flash_bytes(cmd.payload, cmd.payload + cmd.payload_byte_count); - ExpectFlashCtrlWriteEnable(); - EXPECT_CALL(flash_ctrl_, + ExpectCtnSramWriteEnable(); + EXPECT_CALL(ctn_sram_, DataWrite(cmd.address, cmd.payload_byte_count / sizeof(uint32_t), HasBytes(flash_bytes))) .WillOnce(Return(kErrorUnknown)); - ExpectFlashCtrlAllDisable(); + ExpectCtnSramAllDisable(); EXPECT_EQ(bootstrap(), kErrorUnknown); } @@ -614,9 +614,9 @@ TEST_F(BootstrapTest, DataWriteErrorMisalignedAddr) { EXPECT_CALL(spi_device_, Init()); ExpectSpiCmd(ChipEraseCmd()); ExpectSpiFlashStatusGet(true); - ExpectFlashCtrlChipErase(kErrorOk, kErrorOk); + ExpectCtnSramChipErase(kErrorOk, kErrorOk); // Verify - ExpectFlashCtrlEraseVerify(kErrorOk, kErrorOk); + ExpectCtnSramEraseVerify(kErrorOk, kErrorOk); EXPECT_CALL(spi_device_, FlashStatusClear()); // Program auto cmd = PageProgramCmd(0xf0, 16); @@ -626,10 +626,10 @@ TEST_F(BootstrapTest, DataWriteErrorMisalignedAddr) { std::vector flash_bytes(cmd.payload, cmd.payload + cmd.payload_byte_count); - ExpectFlashCtrlWriteEnable(); - EXPECT_CALL(flash_ctrl_, DataWrite(0xf0, 4, HasBytes(flash_bytes))) + ExpectCtnSramWriteEnable(); + EXPECT_CALL(ctn_sram_, DataWrite(0xf0, 4, HasBytes(flash_bytes))) .WillOnce(Return(kErrorUnknown)); - ExpectFlashCtrlAllDisable(); + ExpectCtnSramAllDisable(); EXPECT_EQ(bootstrap(), kErrorUnknown); } @@ -640,9 +640,9 @@ TEST_F(BootstrapTest, BadProgramAddress) { EXPECT_CALL(spi_device_, Init()); ExpectSpiCmd(ChipEraseCmd()); ExpectSpiFlashStatusGet(true); - ExpectFlashCtrlChipErase(kErrorOk, kErrorOk); + ExpectCtnSramChipErase(kErrorOk, kErrorOk); // Verify - ExpectFlashCtrlEraseVerify(kErrorOk, kErrorOk); + ExpectCtnSramEraseVerify(kErrorOk, kErrorOk); EXPECT_CALL(spi_device_, FlashStatusClear()); // Program auto page_program_cmd = PageProgramCmd(3, 16); @@ -658,9 +658,9 @@ TEST_F(BootstrapTest, BadEraseAddress) { EXPECT_CALL(spi_device_, Init()); ExpectSpiCmd(ChipEraseCmd()); ExpectSpiFlashStatusGet(true); - ExpectFlashCtrlChipErase(kErrorOk, kErrorOk); + ExpectCtnSramChipErase(kErrorOk, kErrorOk); // Verify - ExpectFlashCtrlEraseVerify(kErrorOk, kErrorOk); + ExpectCtnSramEraseVerify(kErrorOk, kErrorOk); EXPECT_CALL(spi_device_, FlashStatusClear()); // Erase ExpectSpiCmd(SectorEraseCmd(FLASH_CTRL_PARAM_BYTES_PER_BANK *