diff --git a/hw/ip/otbn/dv/uvm/env/seq_lib/otbn_rf_base_intg_err_vseq.sv b/hw/ip/otbn/dv/uvm/env/seq_lib/otbn_rf_base_intg_err_vseq.sv
index 737a4689faad5..946410d8b1e12 100644
--- a/hw/ip/otbn/dv/uvm/env/seq_lib/otbn_rf_base_intg_err_vseq.sv
+++ b/hw/ip/otbn/dv/uvm/env/seq_lib/otbn_rf_base_intg_err_vseq.sv
@@ -11,6 +11,11 @@ class otbn_rf_base_intg_err_vseq extends otbn_base_vseq;
   `uvm_object_new
   rand bit insert_intg_err_to_a;
 
+  // Wait until the selected register file is being used
+  //
+  // This will normally just be a couple of cycles (because most instructions read from the register
+  // file), but it might be a bit longer if we happen to be stalled waiting for the EDN, which
+  // happens on a RND read.
   task await_use();
     logic rd_en;
     `uvm_info(`gfn, "Waiting for selected RF to be used", UVM_LOW)
@@ -20,7 +25,8 @@ class otbn_rf_base_intg_err_vseq extends otbn_base_vseq;
         rd_en = insert_intg_err_to_a ? cfg.trace_vif.rf_base_rd_en_a :
                                        cfg.trace_vif.rf_base_rd_en_b;
       end while(!rd_en);,
-      cfg.clk_rst_vif.wait_clks(20000);)
+      cfg.clk_rst_vif.wait_clks(20000);
+    )
     if (!rd_en) begin
       `uvm_fatal(`gfn,
                  $sformatf("Timeout while waiting for register file %s to be used",