diff --git a/sw/device/tests/autogen/BUILD b/sw/device/tests/autogen/BUILD index 8b44b36c7bc00..8f5f83cc24a42 100644 --- a/sw/device/tests/autogen/BUILD +++ b/sw/device/tests/autogen/BUILD @@ -16,66 +16,6 @@ load( package(default_visibility = ["//visibility:public"]) -# IP Integration Tests -opentitan_test( - name = "plic_all_irqs_test_0".format(min), - srcs = ["plic_all_irqs_test.c"], - copts = [ - "-DTEST_MIN_IRQ_PERIPHERAL=0", - "-DTEST_MAX_IRQ_PERIPHERAL=10", - ], - exec_env = { - "//hw/top_earlgrey:fpga_cw310_sival": None, - "//hw/top_earlgrey:fpga_cw310_test_rom": None, - "//hw/top_earlgrey:silicon_creator": None, - "//hw/top_earlgrey:silicon_owner_sival_rom_ext": "silicon_owner", - "//hw/top_earlgrey:sim_dv": None, - "//hw/top_earlgrey:sim_verilator": None, - }, - silicon_owner = silicon_params( - # TODO(lowrisc/opentitan#20747): Enable silicon_owner when fixed. - tags = ["broken"], - ), - verilator = verilator_params( - timeout = "eternal", - tags = ["flaky"], - # often times out in 3600s on 4 cores - ), - deps = [ - "//hw/top_earlgrey/sw/autogen:top_earlgrey", - "//sw/device/lib/arch:boot_stage", - "//sw/device/lib/base:mmio", - "//sw/device/lib/dif:adc_ctrl", - "//sw/device/lib/dif:alert_handler", - "//sw/device/lib/dif:aon_timer", - "//sw/device/lib/dif:csrng", - "//sw/device/lib/dif:edn", - "//sw/device/lib/dif:entropy_src", - "//sw/device/lib/dif:flash_ctrl", - "//sw/device/lib/dif:gpio", - "//sw/device/lib/dif:hmac", - "//sw/device/lib/dif:i2c", - "//sw/device/lib/dif:keymgr", - "//sw/device/lib/dif:kmac", - "//sw/device/lib/dif:otbn", - "//sw/device/lib/dif:otp_ctrl", - "//sw/device/lib/dif:pattgen", - "//sw/device/lib/dif:pwrmgr", - "//sw/device/lib/dif:rv_plic", - "//sw/device/lib/dif:rv_timer", - "//sw/device/lib/dif:sensor_ctrl", - "//sw/device/lib/dif:spi_device", - "//sw/device/lib/dif:spi_host", - "//sw/device/lib/dif:sysrst_ctrl", - "//sw/device/lib/dif:uart", - "//sw/device/lib/dif:usbdev", - "//sw/device/lib/runtime:irq", - "//sw/device/lib/runtime:log", - "//sw/device/lib/testing:rv_plic_testutils", - "//sw/device/lib/testing/test_framework:ottf_main", - ], -) - [ opentitan_test( name = "plic_all_irqs_test_{}".format(min), @@ -86,6 +26,7 @@ opentitan_test( ], exec_env = { "//hw/top_earlgrey:fpga_cw310_sival": None, + "//hw/top_earlgrey:fpga_cw310_sival_rom_ext": None, "//hw/top_earlgrey:fpga_cw310_test_rom": None, "//hw/top_earlgrey:silicon_creator": None, "//hw/top_earlgrey:silicon_owner_sival_rom_ext": None, @@ -131,7 +72,7 @@ opentitan_test( "//sw/device/lib/testing/test_framework:ottf_main", ], ) - for min in range(10, 23, 10) + for min in range(0, 23, 10) ] test_suite( diff --git a/sw/device/tests/autogen/plic_all_irqs_test.c b/sw/device/tests/autogen/plic_all_irqs_test.c index b445511b4db66..cd6c4fe69e64e 100644 --- a/sw/device/tests/autogen/plic_all_irqs_test.c +++ b/sw/device/tests/autogen/plic_all_irqs_test.c @@ -73,9 +73,9 @@ static dif_alert_handler_t alert_handler; static dif_aon_timer_t aon_timer_aon; #endif -#if TEST_MIN_IRQ_PERIPHERAL <= 3 && 3 < TEST_MAX_IRQ_PERIPHERAL +// TODO(lowrisc/opentitan#20747) Adjust csrng special handling once this is +// fixed. static dif_csrng_t csrng; -#endif #if TEST_MIN_IRQ_PERIPHERAL <= 4 && 4 < TEST_MAX_IRQ_PERIPHERAL static dif_edn_t edn0; @@ -315,6 +315,13 @@ static volatile dif_usbdev_irq_t usbdev_irq_expected; static volatile dif_usbdev_irq_t usbdev_irq_serviced; #endif + +#if TEST_MIN_IRQ_PERIPHERAL <= 3 < TEST_MAX_IRQ_PERIPHERAL +static volatile bool allow_csrng_irq = true; +#else +static volatile bool allow_csrng_irq = false; +#endif + /** * Provides external IRQ handling for this test. * @@ -334,736 +341,760 @@ void ottf_external_isr(uint32_t *exc_info) { top_earlgrey_plic_peripheral_t peripheral = (top_earlgrey_plic_peripheral_t) top_earlgrey_plic_interrupt_for_peripheral[plic_irq_id]; - CHECK(peripheral == peripheral_expected, - "Interrupt from incorrect peripheral: exp = %d, obs = %d", - peripheral_expected, peripheral); - - switch (peripheral) { + // TODO(lowrisc/opentitan#20747) Adjust code once this issue is fixed. + if (allow_csrng_irq && kBootStage == kBootStageOwner && + peripheral != peripheral_expected && + peripheral == kTopEarlgreyPlicPeripheralCsrng) { + dif_csrng_irq_t irq = (dif_csrng_irq_t)( + plic_irq_id - + (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdCsrngCsCmdReqDone); + + dif_csrng_irq_state_snapshot_t snapshot; + CHECK_DIF_OK(dif_csrng_irq_get_state(&csrng, &snapshot)); + CHECK(snapshot == (dif_csrng_irq_state_snapshot_t)(1 << irq), + "Only csrng IRQ %d expected to fire. Actual interrupt status = %x", + irq, snapshot); + + // TODO: Check Interrupt type then clear INTR_TEST if needed. + CHECK_DIF_OK(dif_csrng_irq_force(&csrng, irq, false)); + CHECK_DIF_OK(dif_csrng_irq_acknowledge(&csrng, irq)); + } else { + CHECK(peripheral == peripheral_expected, + "Interrupt from incorrect peripheral: exp = %d, obs = %d", + peripheral_expected, peripheral); + + switch (peripheral) { #if TEST_MIN_IRQ_PERIPHERAL <= 0 && 0 < TEST_MAX_IRQ_PERIPHERAL - case kTopEarlgreyPlicPeripheralAdcCtrlAon: { - dif_adc_ctrl_irq_t irq = (dif_adc_ctrl_irq_t)( - plic_irq_id - - (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdAdcCtrlAonMatchDone); - CHECK(irq == adc_ctrl_irq_expected, - "Incorrect adc_ctrl_aon IRQ triggered: exp = %d, obs = %d", - adc_ctrl_irq_expected, irq); - adc_ctrl_irq_serviced = irq; - - dif_adc_ctrl_irq_state_snapshot_t snapshot; - CHECK_DIF_OK(dif_adc_ctrl_irq_get_state(&adc_ctrl_aon, &snapshot)); - CHECK(snapshot == (dif_adc_ctrl_irq_state_snapshot_t)(1 << irq), - "Only adc_ctrl_aon IRQ %d expected to fire. Actual interrupt " - "status = %x", - irq, snapshot); - - // TODO: Check Interrupt type then clear INTR_TEST if needed. - CHECK_DIF_OK(dif_adc_ctrl_irq_force(&adc_ctrl_aon, irq, false)); - CHECK_DIF_OK(dif_adc_ctrl_irq_acknowledge(&adc_ctrl_aon, irq)); - break; - } + case kTopEarlgreyPlicPeripheralAdcCtrlAon: { + dif_adc_ctrl_irq_t irq = (dif_adc_ctrl_irq_t)( + plic_irq_id - + (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdAdcCtrlAonMatchDone); + CHECK(irq == adc_ctrl_irq_expected, + "Incorrect adc_ctrl_aon IRQ triggered: exp = %d, obs = %d", + adc_ctrl_irq_expected, irq); + adc_ctrl_irq_serviced = irq; + + dif_adc_ctrl_irq_state_snapshot_t snapshot; + CHECK_DIF_OK(dif_adc_ctrl_irq_get_state(&adc_ctrl_aon, &snapshot)); + CHECK(snapshot == (dif_adc_ctrl_irq_state_snapshot_t)(1 << irq), + "Only adc_ctrl_aon IRQ %d expected to fire. Actual interrupt " + "status = %x", + irq, snapshot); + + // TODO: Check Interrupt type then clear INTR_TEST if needed. + CHECK_DIF_OK(dif_adc_ctrl_irq_force(&adc_ctrl_aon, irq, false)); + CHECK_DIF_OK(dif_adc_ctrl_irq_acknowledge(&adc_ctrl_aon, irq)); + break; + } #endif #if TEST_MIN_IRQ_PERIPHERAL <= 1 && 1 < TEST_MAX_IRQ_PERIPHERAL - case kTopEarlgreyPlicPeripheralAlertHandler: { - dif_alert_handler_irq_t irq = (dif_alert_handler_irq_t)( - plic_irq_id - - (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdAlertHandlerClassa); - CHECK(irq == alert_handler_irq_expected, - "Incorrect alert_handler IRQ triggered: exp = %d, obs = %d", - alert_handler_irq_expected, irq); - alert_handler_irq_serviced = irq; - - dif_alert_handler_irq_state_snapshot_t snapshot; - CHECK_DIF_OK(dif_alert_handler_irq_get_state(&alert_handler, &snapshot)); - CHECK(snapshot == (dif_alert_handler_irq_state_snapshot_t)(1 << irq), - "Only alert_handler IRQ %d expected to fire. Actual interrupt " - "status = %x", - irq, snapshot); - - // TODO: Check Interrupt type then clear INTR_TEST if needed. - CHECK_DIF_OK(dif_alert_handler_irq_force(&alert_handler, irq, false)); - CHECK_DIF_OK(dif_alert_handler_irq_acknowledge(&alert_handler, irq)); - break; - } + case kTopEarlgreyPlicPeripheralAlertHandler: { + dif_alert_handler_irq_t irq = (dif_alert_handler_irq_t)( + plic_irq_id - + (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdAlertHandlerClassa); + CHECK(irq == alert_handler_irq_expected, + "Incorrect alert_handler IRQ triggered: exp = %d, obs = %d", + alert_handler_irq_expected, irq); + alert_handler_irq_serviced = irq; + + dif_alert_handler_irq_state_snapshot_t snapshot; + CHECK_DIF_OK(dif_alert_handler_irq_get_state(&alert_handler, &snapshot)); + CHECK(snapshot == (dif_alert_handler_irq_state_snapshot_t)(1 << irq), + "Only alert_handler IRQ %d expected to fire. Actual interrupt " + "status = %x", + irq, snapshot); + + // TODO: Check Interrupt type then clear INTR_TEST if needed. + CHECK_DIF_OK(dif_alert_handler_irq_force(&alert_handler, irq, false)); + CHECK_DIF_OK(dif_alert_handler_irq_acknowledge(&alert_handler, irq)); + break; + } #endif #if TEST_MIN_IRQ_PERIPHERAL <= 2 && 2 < TEST_MAX_IRQ_PERIPHERAL - case kTopEarlgreyPlicPeripheralAonTimerAon: { - dif_aon_timer_irq_t irq = (dif_aon_timer_irq_t)( - plic_irq_id - - (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdAonTimerAonWkupTimerExpired); - CHECK(irq == aon_timer_irq_expected, - "Incorrect aon_timer_aon IRQ triggered: exp = %d, obs = %d", - aon_timer_irq_expected, irq); - aon_timer_irq_serviced = irq; - - dif_aon_timer_irq_state_snapshot_t snapshot; - CHECK_DIF_OK(dif_aon_timer_irq_get_state(&aon_timer_aon, &snapshot)); - CHECK(snapshot == (dif_aon_timer_irq_state_snapshot_t)(1 << irq), - "Only aon_timer_aon IRQ %d expected to fire. Actual interrupt " - "status = %x", - irq, snapshot); - - // TODO: Check Interrupt type then clear INTR_TEST if needed. - CHECK_DIF_OK(dif_aon_timer_irq_force(&aon_timer_aon, irq, false)); - CHECK_DIF_OK(dif_aon_timer_irq_acknowledge(&aon_timer_aon, irq)); - break; - } + case kTopEarlgreyPlicPeripheralAonTimerAon: { + dif_aon_timer_irq_t irq = (dif_aon_timer_irq_t)( + plic_irq_id - + (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdAonTimerAonWkupTimerExpired); + CHECK(irq == aon_timer_irq_expected, + "Incorrect aon_timer_aon IRQ triggered: exp = %d, obs = %d", + aon_timer_irq_expected, irq); + aon_timer_irq_serviced = irq; + + dif_aon_timer_irq_state_snapshot_t snapshot; + CHECK_DIF_OK(dif_aon_timer_irq_get_state(&aon_timer_aon, &snapshot)); + CHECK(snapshot == (dif_aon_timer_irq_state_snapshot_t)(1 << irq), + "Only aon_timer_aon IRQ %d expected to fire. Actual interrupt " + "status = %x", + irq, snapshot); + + // TODO: Check Interrupt type then clear INTR_TEST if needed. + CHECK_DIF_OK(dif_aon_timer_irq_force(&aon_timer_aon, irq, false)); + CHECK_DIF_OK(dif_aon_timer_irq_acknowledge(&aon_timer_aon, irq)); + break; + } #endif #if TEST_MIN_IRQ_PERIPHERAL <= 3 && 3 < TEST_MAX_IRQ_PERIPHERAL - case kTopEarlgreyPlicPeripheralCsrng: { - dif_csrng_irq_t irq = (dif_csrng_irq_t)( - plic_irq_id - - (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdCsrngCsCmdReqDone); - CHECK(irq == csrng_irq_expected, - "Incorrect csrng IRQ triggered: exp = %d, obs = %d", - csrng_irq_expected, irq); - csrng_irq_serviced = irq; - - dif_csrng_irq_state_snapshot_t snapshot; - CHECK_DIF_OK(dif_csrng_irq_get_state(&csrng, &snapshot)); - CHECK(snapshot == (dif_csrng_irq_state_snapshot_t)(1 << irq), - "Only csrng IRQ %d expected to fire. Actual interrupt " - "status = %x", - irq, snapshot); - - // TODO: Check Interrupt type then clear INTR_TEST if needed. - CHECK_DIF_OK(dif_csrng_irq_force(&csrng, irq, false)); - CHECK_DIF_OK(dif_csrng_irq_acknowledge(&csrng, irq)); - break; - } + case kTopEarlgreyPlicPeripheralCsrng: { + dif_csrng_irq_t irq = (dif_csrng_irq_t)( + plic_irq_id - + (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdCsrngCsCmdReqDone); + // This special handling of CSRNG is because it is configured + // to constantly generate interrupts. There may be better ways + // to configure the entropy complex so it is less noisy. + // TODO(lowrisc/opentitan#20747) Adjust code once this is fixed. + if (kBootStage != kBootStageOwner) { + CHECK(irq == csrng_irq_expected, + "Incorrect csrng IRQ triggered: exp = %d, obs = %d", + csrng_irq_expected, irq); + } + csrng_irq_serviced = irq; + + dif_csrng_irq_state_snapshot_t snapshot; + CHECK_DIF_OK(dif_csrng_irq_get_state(&csrng, &snapshot)); + CHECK(snapshot == (dif_csrng_irq_state_snapshot_t)(1 << irq), + "Only csrng IRQ %d expected to fire. Actual interrupt " + "status = %x", + irq, snapshot); + + // TODO: Check Interrupt type then clear INTR_TEST if needed. + CHECK_DIF_OK(dif_csrng_irq_force(&csrng, irq, false)); + CHECK_DIF_OK(dif_csrng_irq_acknowledge(&csrng, irq)); + break; + } #endif #if TEST_MIN_IRQ_PERIPHERAL <= 4 && 4 < TEST_MAX_IRQ_PERIPHERAL - case kTopEarlgreyPlicPeripheralEdn0: { - dif_edn_irq_t irq = (dif_edn_irq_t)( - plic_irq_id - - (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdEdn0EdnCmdReqDone); - CHECK(irq == edn_irq_expected, - "Incorrect edn0 IRQ triggered: exp = %d, obs = %d", - edn_irq_expected, irq); - edn_irq_serviced = irq; - - dif_edn_irq_state_snapshot_t snapshot; - CHECK_DIF_OK(dif_edn_irq_get_state(&edn0, &snapshot)); - CHECK(snapshot == (dif_edn_irq_state_snapshot_t)(1 << irq), - "Only edn0 IRQ %d expected to fire. Actual interrupt " - "status = %x", - irq, snapshot); - - // TODO: Check Interrupt type then clear INTR_TEST if needed. - CHECK_DIF_OK(dif_edn_irq_force(&edn0, irq, false)); - CHECK_DIF_OK(dif_edn_irq_acknowledge(&edn0, irq)); - break; - } + case kTopEarlgreyPlicPeripheralEdn0: { + dif_edn_irq_t irq = (dif_edn_irq_t)( + plic_irq_id - + (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdEdn0EdnCmdReqDone); + CHECK(irq == edn_irq_expected, + "Incorrect edn0 IRQ triggered: exp = %d, obs = %d", + edn_irq_expected, irq); + edn_irq_serviced = irq; + + dif_edn_irq_state_snapshot_t snapshot; + CHECK_DIF_OK(dif_edn_irq_get_state(&edn0, &snapshot)); + CHECK(snapshot == (dif_edn_irq_state_snapshot_t)(1 << irq), + "Only edn0 IRQ %d expected to fire. Actual interrupt " + "status = %x", + irq, snapshot); + + // TODO: Check Interrupt type then clear INTR_TEST if needed. + CHECK_DIF_OK(dif_edn_irq_force(&edn0, irq, false)); + CHECK_DIF_OK(dif_edn_irq_acknowledge(&edn0, irq)); + break; + } #endif #if TEST_MIN_IRQ_PERIPHERAL <= 4 && 4 < TEST_MAX_IRQ_PERIPHERAL - case kTopEarlgreyPlicPeripheralEdn1: { - dif_edn_irq_t irq = (dif_edn_irq_t)( - plic_irq_id - - (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdEdn1EdnCmdReqDone); - CHECK(irq == edn_irq_expected, - "Incorrect edn1 IRQ triggered: exp = %d, obs = %d", - edn_irq_expected, irq); - edn_irq_serviced = irq; - - dif_edn_irq_state_snapshot_t snapshot; - CHECK_DIF_OK(dif_edn_irq_get_state(&edn1, &snapshot)); - CHECK(snapshot == (dif_edn_irq_state_snapshot_t)(1 << irq), - "Only edn1 IRQ %d expected to fire. Actual interrupt " - "status = %x", - irq, snapshot); - - // TODO: Check Interrupt type then clear INTR_TEST if needed. - CHECK_DIF_OK(dif_edn_irq_force(&edn1, irq, false)); - CHECK_DIF_OK(dif_edn_irq_acknowledge(&edn1, irq)); - break; - } + case kTopEarlgreyPlicPeripheralEdn1: { + dif_edn_irq_t irq = (dif_edn_irq_t)( + plic_irq_id - + (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdEdn1EdnCmdReqDone); + CHECK(irq == edn_irq_expected, + "Incorrect edn1 IRQ triggered: exp = %d, obs = %d", + edn_irq_expected, irq); + edn_irq_serviced = irq; + + dif_edn_irq_state_snapshot_t snapshot; + CHECK_DIF_OK(dif_edn_irq_get_state(&edn1, &snapshot)); + CHECK(snapshot == (dif_edn_irq_state_snapshot_t)(1 << irq), + "Only edn1 IRQ %d expected to fire. Actual interrupt " + "status = %x", + irq, snapshot); + + // TODO: Check Interrupt type then clear INTR_TEST if needed. + CHECK_DIF_OK(dif_edn_irq_force(&edn1, irq, false)); + CHECK_DIF_OK(dif_edn_irq_acknowledge(&edn1, irq)); + break; + } #endif #if TEST_MIN_IRQ_PERIPHERAL <= 5 && 5 < TEST_MAX_IRQ_PERIPHERAL - case kTopEarlgreyPlicPeripheralEntropySrc: { - dif_entropy_src_irq_t irq = (dif_entropy_src_irq_t)( - plic_irq_id - - (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdEntropySrcEsEntropyValid); - CHECK(irq == entropy_src_irq_expected, - "Incorrect entropy_src IRQ triggered: exp = %d, obs = %d", - entropy_src_irq_expected, irq); - entropy_src_irq_serviced = irq; - - dif_entropy_src_irq_state_snapshot_t snapshot; - CHECK_DIF_OK(dif_entropy_src_irq_get_state(&entropy_src, &snapshot)); - CHECK(snapshot == (dif_entropy_src_irq_state_snapshot_t)(1 << irq), - "Only entropy_src IRQ %d expected to fire. Actual interrupt " - "status = %x", - irq, snapshot); - - // TODO: Check Interrupt type then clear INTR_TEST if needed. - CHECK_DIF_OK(dif_entropy_src_irq_force(&entropy_src, irq, false)); - CHECK_DIF_OK(dif_entropy_src_irq_acknowledge(&entropy_src, irq)); - break; - } + case kTopEarlgreyPlicPeripheralEntropySrc: { + dif_entropy_src_irq_t irq = (dif_entropy_src_irq_t)( + plic_irq_id - + (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdEntropySrcEsEntropyValid); + CHECK(irq == entropy_src_irq_expected, + "Incorrect entropy_src IRQ triggered: exp = %d, obs = %d", + entropy_src_irq_expected, irq); + entropy_src_irq_serviced = irq; + + dif_entropy_src_irq_state_snapshot_t snapshot; + CHECK_DIF_OK(dif_entropy_src_irq_get_state(&entropy_src, &snapshot)); + CHECK(snapshot == (dif_entropy_src_irq_state_snapshot_t)(1 << irq), + "Only entropy_src IRQ %d expected to fire. Actual interrupt " + "status = %x", + irq, snapshot); + + // TODO: Check Interrupt type then clear INTR_TEST if needed. + CHECK_DIF_OK(dif_entropy_src_irq_force(&entropy_src, irq, false)); + CHECK_DIF_OK(dif_entropy_src_irq_acknowledge(&entropy_src, irq)); + break; + } #endif #if TEST_MIN_IRQ_PERIPHERAL <= 6 && 6 < TEST_MAX_IRQ_PERIPHERAL - case kTopEarlgreyPlicPeripheralFlashCtrl: { - dif_flash_ctrl_irq_t irq = (dif_flash_ctrl_irq_t)( - plic_irq_id - - (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdFlashCtrlProgEmpty); - CHECK(irq == flash_ctrl_irq_expected, - "Incorrect flash_ctrl IRQ triggered: exp = %d, obs = %d", - flash_ctrl_irq_expected, irq); - flash_ctrl_irq_serviced = irq; - - dif_flash_ctrl_irq_state_snapshot_t snapshot; - CHECK_DIF_OK(dif_flash_ctrl_irq_get_state(&flash_ctrl, &snapshot)); - CHECK(snapshot == (dif_flash_ctrl_irq_state_snapshot_t)(1 << irq), - "Only flash_ctrl IRQ %d expected to fire. Actual interrupt " - "status = %x", - irq, snapshot); - - // TODO: Check Interrupt type then clear INTR_TEST if needed. - CHECK_DIF_OK(dif_flash_ctrl_irq_force(&flash_ctrl, irq, false)); - CHECK_DIF_OK(dif_flash_ctrl_irq_acknowledge(&flash_ctrl, irq)); - break; - } + case kTopEarlgreyPlicPeripheralFlashCtrl: { + dif_flash_ctrl_irq_t irq = (dif_flash_ctrl_irq_t)( + plic_irq_id - + (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdFlashCtrlProgEmpty); + CHECK(irq == flash_ctrl_irq_expected, + "Incorrect flash_ctrl IRQ triggered: exp = %d, obs = %d", + flash_ctrl_irq_expected, irq); + flash_ctrl_irq_serviced = irq; + + dif_flash_ctrl_irq_state_snapshot_t snapshot; + CHECK_DIF_OK(dif_flash_ctrl_irq_get_state(&flash_ctrl, &snapshot)); + CHECK(snapshot == (dif_flash_ctrl_irq_state_snapshot_t)(1 << irq), + "Only flash_ctrl IRQ %d expected to fire. Actual interrupt " + "status = %x", + irq, snapshot); + + // TODO: Check Interrupt type then clear INTR_TEST if needed. + CHECK_DIF_OK(dif_flash_ctrl_irq_force(&flash_ctrl, irq, false)); + CHECK_DIF_OK(dif_flash_ctrl_irq_acknowledge(&flash_ctrl, irq)); + break; + } #endif #if TEST_MIN_IRQ_PERIPHERAL <= 7 && 7 < TEST_MAX_IRQ_PERIPHERAL - case kTopEarlgreyPlicPeripheralGpio: { - dif_gpio_irq_t irq = (dif_gpio_irq_t)( - plic_irq_id - - (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdGpioGpio0); - CHECK(irq == gpio_irq_expected, - "Incorrect gpio IRQ triggered: exp = %d, obs = %d", - gpio_irq_expected, irq); - gpio_irq_serviced = irq; - - dif_gpio_irq_state_snapshot_t snapshot; - CHECK_DIF_OK(dif_gpio_irq_get_state(&gpio, &snapshot)); - CHECK(snapshot == (dif_gpio_irq_state_snapshot_t)(1 << irq), - "Only gpio IRQ %d expected to fire. Actual interrupt " - "status = %x", - irq, snapshot); - - // TODO: Check Interrupt type then clear INTR_TEST if needed. - CHECK_DIF_OK(dif_gpio_irq_force(&gpio, irq, false)); - CHECK_DIF_OK(dif_gpio_irq_acknowledge(&gpio, irq)); - break; - } + case kTopEarlgreyPlicPeripheralGpio: { + dif_gpio_irq_t irq = (dif_gpio_irq_t)( + plic_irq_id - + (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdGpioGpio0); + CHECK(irq == gpio_irq_expected, + "Incorrect gpio IRQ triggered: exp = %d, obs = %d", + gpio_irq_expected, irq); + gpio_irq_serviced = irq; + + dif_gpio_irq_state_snapshot_t snapshot; + CHECK_DIF_OK(dif_gpio_irq_get_state(&gpio, &snapshot)); + CHECK(snapshot == (dif_gpio_irq_state_snapshot_t)(1 << irq), + "Only gpio IRQ %d expected to fire. Actual interrupt " + "status = %x", + irq, snapshot); + + // TODO: Check Interrupt type then clear INTR_TEST if needed. + CHECK_DIF_OK(dif_gpio_irq_force(&gpio, irq, false)); + CHECK_DIF_OK(dif_gpio_irq_acknowledge(&gpio, irq)); + break; + } #endif #if TEST_MIN_IRQ_PERIPHERAL <= 8 && 8 < TEST_MAX_IRQ_PERIPHERAL - case kTopEarlgreyPlicPeripheralHmac: { - dif_hmac_irq_t irq = (dif_hmac_irq_t)( - plic_irq_id - - (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdHmacHmacDone); - CHECK(irq == hmac_irq_expected, - "Incorrect hmac IRQ triggered: exp = %d, obs = %d", - hmac_irq_expected, irq); - hmac_irq_serviced = irq; - - dif_hmac_irq_state_snapshot_t snapshot; - CHECK_DIF_OK(dif_hmac_irq_get_state(&hmac, &snapshot)); - CHECK(snapshot == (dif_hmac_irq_state_snapshot_t)(1 << irq), - "Only hmac IRQ %d expected to fire. Actual interrupt " - "status = %x", - irq, snapshot); - - // TODO: Check Interrupt type then clear INTR_TEST if needed. - CHECK_DIF_OK(dif_hmac_irq_force(&hmac, irq, false)); - CHECK_DIF_OK(dif_hmac_irq_acknowledge(&hmac, irq)); - break; - } + case kTopEarlgreyPlicPeripheralHmac: { + dif_hmac_irq_t irq = (dif_hmac_irq_t)( + plic_irq_id - + (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdHmacHmacDone); + CHECK(irq == hmac_irq_expected, + "Incorrect hmac IRQ triggered: exp = %d, obs = %d", + hmac_irq_expected, irq); + hmac_irq_serviced = irq; + + dif_hmac_irq_state_snapshot_t snapshot; + CHECK_DIF_OK(dif_hmac_irq_get_state(&hmac, &snapshot)); + CHECK(snapshot == (dif_hmac_irq_state_snapshot_t)(1 << irq), + "Only hmac IRQ %d expected to fire. Actual interrupt " + "status = %x", + irq, snapshot); + + // TODO: Check Interrupt type then clear INTR_TEST if needed. + CHECK_DIF_OK(dif_hmac_irq_force(&hmac, irq, false)); + CHECK_DIF_OK(dif_hmac_irq_acknowledge(&hmac, irq)); + break; + } #endif #if TEST_MIN_IRQ_PERIPHERAL <= 9 && 9 < TEST_MAX_IRQ_PERIPHERAL - case kTopEarlgreyPlicPeripheralI2c0: { - dif_i2c_irq_t irq = (dif_i2c_irq_t)( - plic_irq_id - - (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdI2c0FmtThreshold); - CHECK(irq == i2c_irq_expected, - "Incorrect i2c0 IRQ triggered: exp = %d, obs = %d", - i2c_irq_expected, irq); - i2c_irq_serviced = irq; - - dif_i2c_irq_state_snapshot_t snapshot; - CHECK_DIF_OK(dif_i2c_irq_get_state(&i2c0, &snapshot)); - CHECK(snapshot == (dif_i2c_irq_state_snapshot_t)(1 << irq), - "Only i2c0 IRQ %d expected to fire. Actual interrupt " - "status = %x", - irq, snapshot); - - // TODO: Check Interrupt type then clear INTR_TEST if needed. - CHECK_DIF_OK(dif_i2c_irq_force(&i2c0, irq, false)); - CHECK_DIF_OK(dif_i2c_irq_acknowledge(&i2c0, irq)); - break; - } + case kTopEarlgreyPlicPeripheralI2c0: { + dif_i2c_irq_t irq = (dif_i2c_irq_t)( + plic_irq_id - + (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdI2c0FmtThreshold); + CHECK(irq == i2c_irq_expected, + "Incorrect i2c0 IRQ triggered: exp = %d, obs = %d", + i2c_irq_expected, irq); + i2c_irq_serviced = irq; + + dif_i2c_irq_state_snapshot_t snapshot; + CHECK_DIF_OK(dif_i2c_irq_get_state(&i2c0, &snapshot)); + CHECK(snapshot == (dif_i2c_irq_state_snapshot_t)(1 << irq), + "Only i2c0 IRQ %d expected to fire. Actual interrupt " + "status = %x", + irq, snapshot); + + // TODO: Check Interrupt type then clear INTR_TEST if needed. + CHECK_DIF_OK(dif_i2c_irq_force(&i2c0, irq, false)); + CHECK_DIF_OK(dif_i2c_irq_acknowledge(&i2c0, irq)); + break; + } #endif #if TEST_MIN_IRQ_PERIPHERAL <= 9 && 9 < TEST_MAX_IRQ_PERIPHERAL - case kTopEarlgreyPlicPeripheralI2c1: { - dif_i2c_irq_t irq = (dif_i2c_irq_t)( - plic_irq_id - - (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdI2c1FmtThreshold); - CHECK(irq == i2c_irq_expected, - "Incorrect i2c1 IRQ triggered: exp = %d, obs = %d", - i2c_irq_expected, irq); - i2c_irq_serviced = irq; - - dif_i2c_irq_state_snapshot_t snapshot; - CHECK_DIF_OK(dif_i2c_irq_get_state(&i2c1, &snapshot)); - CHECK(snapshot == (dif_i2c_irq_state_snapshot_t)(1 << irq), - "Only i2c1 IRQ %d expected to fire. Actual interrupt " - "status = %x", - irq, snapshot); - - // TODO: Check Interrupt type then clear INTR_TEST if needed. - CHECK_DIF_OK(dif_i2c_irq_force(&i2c1, irq, false)); - CHECK_DIF_OK(dif_i2c_irq_acknowledge(&i2c1, irq)); - break; - } + case kTopEarlgreyPlicPeripheralI2c1: { + dif_i2c_irq_t irq = (dif_i2c_irq_t)( + plic_irq_id - + (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdI2c1FmtThreshold); + CHECK(irq == i2c_irq_expected, + "Incorrect i2c1 IRQ triggered: exp = %d, obs = %d", + i2c_irq_expected, irq); + i2c_irq_serviced = irq; + + dif_i2c_irq_state_snapshot_t snapshot; + CHECK_DIF_OK(dif_i2c_irq_get_state(&i2c1, &snapshot)); + CHECK(snapshot == (dif_i2c_irq_state_snapshot_t)(1 << irq), + "Only i2c1 IRQ %d expected to fire. Actual interrupt " + "status = %x", + irq, snapshot); + + // TODO: Check Interrupt type then clear INTR_TEST if needed. + CHECK_DIF_OK(dif_i2c_irq_force(&i2c1, irq, false)); + CHECK_DIF_OK(dif_i2c_irq_acknowledge(&i2c1, irq)); + break; + } #endif #if TEST_MIN_IRQ_PERIPHERAL <= 9 && 9 < TEST_MAX_IRQ_PERIPHERAL - case kTopEarlgreyPlicPeripheralI2c2: { - dif_i2c_irq_t irq = (dif_i2c_irq_t)( - plic_irq_id - - (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdI2c2FmtThreshold); - CHECK(irq == i2c_irq_expected, - "Incorrect i2c2 IRQ triggered: exp = %d, obs = %d", - i2c_irq_expected, irq); - i2c_irq_serviced = irq; - - dif_i2c_irq_state_snapshot_t snapshot; - CHECK_DIF_OK(dif_i2c_irq_get_state(&i2c2, &snapshot)); - CHECK(snapshot == (dif_i2c_irq_state_snapshot_t)(1 << irq), - "Only i2c2 IRQ %d expected to fire. Actual interrupt " - "status = %x", - irq, snapshot); - - // TODO: Check Interrupt type then clear INTR_TEST if needed. - CHECK_DIF_OK(dif_i2c_irq_force(&i2c2, irq, false)); - CHECK_DIF_OK(dif_i2c_irq_acknowledge(&i2c2, irq)); - break; - } + case kTopEarlgreyPlicPeripheralI2c2: { + dif_i2c_irq_t irq = (dif_i2c_irq_t)( + plic_irq_id - + (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdI2c2FmtThreshold); + CHECK(irq == i2c_irq_expected, + "Incorrect i2c2 IRQ triggered: exp = %d, obs = %d", + i2c_irq_expected, irq); + i2c_irq_serviced = irq; + + dif_i2c_irq_state_snapshot_t snapshot; + CHECK_DIF_OK(dif_i2c_irq_get_state(&i2c2, &snapshot)); + CHECK(snapshot == (dif_i2c_irq_state_snapshot_t)(1 << irq), + "Only i2c2 IRQ %d expected to fire. Actual interrupt " + "status = %x", + irq, snapshot); + + // TODO: Check Interrupt type then clear INTR_TEST if needed. + CHECK_DIF_OK(dif_i2c_irq_force(&i2c2, irq, false)); + CHECK_DIF_OK(dif_i2c_irq_acknowledge(&i2c2, irq)); + break; + } #endif #if TEST_MIN_IRQ_PERIPHERAL <= 10 && 10 < TEST_MAX_IRQ_PERIPHERAL - case kTopEarlgreyPlicPeripheralKeymgr: { - dif_keymgr_irq_t irq = (dif_keymgr_irq_t)( - plic_irq_id - - (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdKeymgrOpDone); - CHECK(irq == keymgr_irq_expected, - "Incorrect keymgr IRQ triggered: exp = %d, obs = %d", - keymgr_irq_expected, irq); - keymgr_irq_serviced = irq; - - dif_keymgr_irq_state_snapshot_t snapshot; - CHECK_DIF_OK(dif_keymgr_irq_get_state(&keymgr, &snapshot)); - CHECK(snapshot == (dif_keymgr_irq_state_snapshot_t)(1 << irq), - "Only keymgr IRQ %d expected to fire. Actual interrupt " - "status = %x", - irq, snapshot); - - // TODO: Check Interrupt type then clear INTR_TEST if needed. - CHECK_DIF_OK(dif_keymgr_irq_force(&keymgr, irq, false)); - CHECK_DIF_OK(dif_keymgr_irq_acknowledge(&keymgr, irq)); - break; - } + case kTopEarlgreyPlicPeripheralKeymgr: { + dif_keymgr_irq_t irq = (dif_keymgr_irq_t)( + plic_irq_id - + (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdKeymgrOpDone); + CHECK(irq == keymgr_irq_expected, + "Incorrect keymgr IRQ triggered: exp = %d, obs = %d", + keymgr_irq_expected, irq); + keymgr_irq_serviced = irq; + + dif_keymgr_irq_state_snapshot_t snapshot; + CHECK_DIF_OK(dif_keymgr_irq_get_state(&keymgr, &snapshot)); + CHECK(snapshot == (dif_keymgr_irq_state_snapshot_t)(1 << irq), + "Only keymgr IRQ %d expected to fire. Actual interrupt " + "status = %x", + irq, snapshot); + + // TODO: Check Interrupt type then clear INTR_TEST if needed. + CHECK_DIF_OK(dif_keymgr_irq_force(&keymgr, irq, false)); + CHECK_DIF_OK(dif_keymgr_irq_acknowledge(&keymgr, irq)); + break; + } #endif #if TEST_MIN_IRQ_PERIPHERAL <= 11 && 11 < TEST_MAX_IRQ_PERIPHERAL - case kTopEarlgreyPlicPeripheralKmac: { - dif_kmac_irq_t irq = (dif_kmac_irq_t)( - plic_irq_id - - (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdKmacKmacDone); - CHECK(irq == kmac_irq_expected, - "Incorrect kmac IRQ triggered: exp = %d, obs = %d", - kmac_irq_expected, irq); - kmac_irq_serviced = irq; - - dif_kmac_irq_state_snapshot_t snapshot; - CHECK_DIF_OK(dif_kmac_irq_get_state(&kmac, &snapshot)); - CHECK(snapshot == (dif_kmac_irq_state_snapshot_t)(1 << irq), - "Only kmac IRQ %d expected to fire. Actual interrupt " - "status = %x", - irq, snapshot); - - // TODO: Check Interrupt type then clear INTR_TEST if needed. - CHECK_DIF_OK(dif_kmac_irq_force(&kmac, irq, false)); - CHECK_DIF_OK(dif_kmac_irq_acknowledge(&kmac, irq)); - break; - } + case kTopEarlgreyPlicPeripheralKmac: { + dif_kmac_irq_t irq = (dif_kmac_irq_t)( + plic_irq_id - + (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdKmacKmacDone); + CHECK(irq == kmac_irq_expected, + "Incorrect kmac IRQ triggered: exp = %d, obs = %d", + kmac_irq_expected, irq); + kmac_irq_serviced = irq; + + dif_kmac_irq_state_snapshot_t snapshot; + CHECK_DIF_OK(dif_kmac_irq_get_state(&kmac, &snapshot)); + CHECK(snapshot == (dif_kmac_irq_state_snapshot_t)(1 << irq), + "Only kmac IRQ %d expected to fire. Actual interrupt " + "status = %x", + irq, snapshot); + + // TODO: Check Interrupt type then clear INTR_TEST if needed. + CHECK_DIF_OK(dif_kmac_irq_force(&kmac, irq, false)); + CHECK_DIF_OK(dif_kmac_irq_acknowledge(&kmac, irq)); + break; + } #endif #if TEST_MIN_IRQ_PERIPHERAL <= 12 && 12 < TEST_MAX_IRQ_PERIPHERAL - case kTopEarlgreyPlicPeripheralOtbn: { - dif_otbn_irq_t irq = (dif_otbn_irq_t)( - plic_irq_id - - (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdOtbnDone); - CHECK(irq == otbn_irq_expected, - "Incorrect otbn IRQ triggered: exp = %d, obs = %d", - otbn_irq_expected, irq); - otbn_irq_serviced = irq; - - dif_otbn_irq_state_snapshot_t snapshot; - CHECK_DIF_OK(dif_otbn_irq_get_state(&otbn, &snapshot)); - CHECK(snapshot == (dif_otbn_irq_state_snapshot_t)(1 << irq), - "Only otbn IRQ %d expected to fire. Actual interrupt " - "status = %x", - irq, snapshot); - - // TODO: Check Interrupt type then clear INTR_TEST if needed. - CHECK_DIF_OK(dif_otbn_irq_force(&otbn, irq, false)); - CHECK_DIF_OK(dif_otbn_irq_acknowledge(&otbn, irq)); - break; - } + case kTopEarlgreyPlicPeripheralOtbn: { + dif_otbn_irq_t irq = (dif_otbn_irq_t)( + plic_irq_id - + (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdOtbnDone); + CHECK(irq == otbn_irq_expected, + "Incorrect otbn IRQ triggered: exp = %d, obs = %d", + otbn_irq_expected, irq); + otbn_irq_serviced = irq; + + dif_otbn_irq_state_snapshot_t snapshot; + CHECK_DIF_OK(dif_otbn_irq_get_state(&otbn, &snapshot)); + CHECK(snapshot == (dif_otbn_irq_state_snapshot_t)(1 << irq), + "Only otbn IRQ %d expected to fire. Actual interrupt " + "status = %x", + irq, snapshot); + + // TODO: Check Interrupt type then clear INTR_TEST if needed. + CHECK_DIF_OK(dif_otbn_irq_force(&otbn, irq, false)); + CHECK_DIF_OK(dif_otbn_irq_acknowledge(&otbn, irq)); + break; + } #endif #if TEST_MIN_IRQ_PERIPHERAL <= 13 && 13 < TEST_MAX_IRQ_PERIPHERAL - case kTopEarlgreyPlicPeripheralOtpCtrl: { - dif_otp_ctrl_irq_t irq = (dif_otp_ctrl_irq_t)( - plic_irq_id - - (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdOtpCtrlOtpOperationDone); - CHECK(irq == otp_ctrl_irq_expected, - "Incorrect otp_ctrl IRQ triggered: exp = %d, obs = %d", - otp_ctrl_irq_expected, irq); - otp_ctrl_irq_serviced = irq; - - dif_otp_ctrl_irq_state_snapshot_t snapshot; - CHECK_DIF_OK(dif_otp_ctrl_irq_get_state(&otp_ctrl, &snapshot)); - CHECK(snapshot == (dif_otp_ctrl_irq_state_snapshot_t)(1 << irq), - "Only otp_ctrl IRQ %d expected to fire. Actual interrupt " - "status = %x", - irq, snapshot); - - // TODO: Check Interrupt type then clear INTR_TEST if needed. - CHECK_DIF_OK(dif_otp_ctrl_irq_force(&otp_ctrl, irq, false)); - CHECK_DIF_OK(dif_otp_ctrl_irq_acknowledge(&otp_ctrl, irq)); - break; - } + case kTopEarlgreyPlicPeripheralOtpCtrl: { + dif_otp_ctrl_irq_t irq = (dif_otp_ctrl_irq_t)( + plic_irq_id - + (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdOtpCtrlOtpOperationDone); + CHECK(irq == otp_ctrl_irq_expected, + "Incorrect otp_ctrl IRQ triggered: exp = %d, obs = %d", + otp_ctrl_irq_expected, irq); + otp_ctrl_irq_serviced = irq; + + dif_otp_ctrl_irq_state_snapshot_t snapshot; + CHECK_DIF_OK(dif_otp_ctrl_irq_get_state(&otp_ctrl, &snapshot)); + CHECK(snapshot == (dif_otp_ctrl_irq_state_snapshot_t)(1 << irq), + "Only otp_ctrl IRQ %d expected to fire. Actual interrupt " + "status = %x", + irq, snapshot); + + // TODO: Check Interrupt type then clear INTR_TEST if needed. + CHECK_DIF_OK(dif_otp_ctrl_irq_force(&otp_ctrl, irq, false)); + CHECK_DIF_OK(dif_otp_ctrl_irq_acknowledge(&otp_ctrl, irq)); + break; + } #endif #if TEST_MIN_IRQ_PERIPHERAL <= 14 && 14 < TEST_MAX_IRQ_PERIPHERAL - case kTopEarlgreyPlicPeripheralPattgen: { - dif_pattgen_irq_t irq = (dif_pattgen_irq_t)( - plic_irq_id - - (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdPattgenDoneCh0); - CHECK(irq == pattgen_irq_expected, - "Incorrect pattgen IRQ triggered: exp = %d, obs = %d", - pattgen_irq_expected, irq); - pattgen_irq_serviced = irq; - - dif_pattgen_irq_state_snapshot_t snapshot; - CHECK_DIF_OK(dif_pattgen_irq_get_state(&pattgen, &snapshot)); - CHECK(snapshot == (dif_pattgen_irq_state_snapshot_t)(1 << irq), - "Only pattgen IRQ %d expected to fire. Actual interrupt " - "status = %x", - irq, snapshot); - - // TODO: Check Interrupt type then clear INTR_TEST if needed. - CHECK_DIF_OK(dif_pattgen_irq_force(&pattgen, irq, false)); - CHECK_DIF_OK(dif_pattgen_irq_acknowledge(&pattgen, irq)); - break; - } + case kTopEarlgreyPlicPeripheralPattgen: { + dif_pattgen_irq_t irq = (dif_pattgen_irq_t)( + plic_irq_id - + (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdPattgenDoneCh0); + CHECK(irq == pattgen_irq_expected, + "Incorrect pattgen IRQ triggered: exp = %d, obs = %d", + pattgen_irq_expected, irq); + pattgen_irq_serviced = irq; + + dif_pattgen_irq_state_snapshot_t snapshot; + CHECK_DIF_OK(dif_pattgen_irq_get_state(&pattgen, &snapshot)); + CHECK(snapshot == (dif_pattgen_irq_state_snapshot_t)(1 << irq), + "Only pattgen IRQ %d expected to fire. Actual interrupt " + "status = %x", + irq, snapshot); + + // TODO: Check Interrupt type then clear INTR_TEST if needed. + CHECK_DIF_OK(dif_pattgen_irq_force(&pattgen, irq, false)); + CHECK_DIF_OK(dif_pattgen_irq_acknowledge(&pattgen, irq)); + break; + } #endif #if TEST_MIN_IRQ_PERIPHERAL <= 15 && 15 < TEST_MAX_IRQ_PERIPHERAL - case kTopEarlgreyPlicPeripheralPwrmgrAon: { - dif_pwrmgr_irq_t irq = (dif_pwrmgr_irq_t)( - plic_irq_id - - (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdPwrmgrAonWakeup); - CHECK(irq == pwrmgr_irq_expected, - "Incorrect pwrmgr_aon IRQ triggered: exp = %d, obs = %d", - pwrmgr_irq_expected, irq); - pwrmgr_irq_serviced = irq; - - dif_pwrmgr_irq_state_snapshot_t snapshot; - CHECK_DIF_OK(dif_pwrmgr_irq_get_state(&pwrmgr_aon, &snapshot)); - CHECK(snapshot == (dif_pwrmgr_irq_state_snapshot_t)(1 << irq), - "Only pwrmgr_aon IRQ %d expected to fire. Actual interrupt " - "status = %x", - irq, snapshot); - - // TODO: Check Interrupt type then clear INTR_TEST if needed. - CHECK_DIF_OK(dif_pwrmgr_irq_force(&pwrmgr_aon, irq, false)); - CHECK_DIF_OK(dif_pwrmgr_irq_acknowledge(&pwrmgr_aon, irq)); - break; - } + case kTopEarlgreyPlicPeripheralPwrmgrAon: { + dif_pwrmgr_irq_t irq = (dif_pwrmgr_irq_t)( + plic_irq_id - + (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdPwrmgrAonWakeup); + CHECK(irq == pwrmgr_irq_expected, + "Incorrect pwrmgr_aon IRQ triggered: exp = %d, obs = %d", + pwrmgr_irq_expected, irq); + pwrmgr_irq_serviced = irq; + + dif_pwrmgr_irq_state_snapshot_t snapshot; + CHECK_DIF_OK(dif_pwrmgr_irq_get_state(&pwrmgr_aon, &snapshot)); + CHECK(snapshot == (dif_pwrmgr_irq_state_snapshot_t)(1 << irq), + "Only pwrmgr_aon IRQ %d expected to fire. Actual interrupt " + "status = %x", + irq, snapshot); + + // TODO: Check Interrupt type then clear INTR_TEST if needed. + CHECK_DIF_OK(dif_pwrmgr_irq_force(&pwrmgr_aon, irq, false)); + CHECK_DIF_OK(dif_pwrmgr_irq_acknowledge(&pwrmgr_aon, irq)); + break; + } #endif #if TEST_MIN_IRQ_PERIPHERAL <= 16 && 16 < TEST_MAX_IRQ_PERIPHERAL - case kTopEarlgreyPlicPeripheralRvTimer: { - dif_rv_timer_irq_t irq = (dif_rv_timer_irq_t)( - plic_irq_id - - (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdRvTimerTimerExpiredHart0Timer0); - CHECK(irq == rv_timer_irq_expected, - "Incorrect rv_timer IRQ triggered: exp = %d, obs = %d", - rv_timer_irq_expected, irq); - rv_timer_irq_serviced = irq; - - dif_rv_timer_irq_state_snapshot_t snapshot; - CHECK_DIF_OK(dif_rv_timer_irq_get_state(&rv_timer, kHart, &snapshot)); - CHECK(snapshot == (dif_rv_timer_irq_state_snapshot_t)(1 << irq), - "Only rv_timer IRQ %d expected to fire. Actual interrupt " - "status = %x", - irq, snapshot); - - // TODO: Check Interrupt type then clear INTR_TEST if needed. - CHECK_DIF_OK(dif_rv_timer_irq_force(&rv_timer, irq, false)); - CHECK_DIF_OK(dif_rv_timer_irq_acknowledge(&rv_timer, irq)); - break; - } + case kTopEarlgreyPlicPeripheralRvTimer: { + dif_rv_timer_irq_t irq = (dif_rv_timer_irq_t)( + plic_irq_id - + (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdRvTimerTimerExpiredHart0Timer0); + CHECK(irq == rv_timer_irq_expected, + "Incorrect rv_timer IRQ triggered: exp = %d, obs = %d", + rv_timer_irq_expected, irq); + rv_timer_irq_serviced = irq; + + dif_rv_timer_irq_state_snapshot_t snapshot; + CHECK_DIF_OK(dif_rv_timer_irq_get_state(&rv_timer, kHart, &snapshot)); + CHECK(snapshot == (dif_rv_timer_irq_state_snapshot_t)(1 << irq), + "Only rv_timer IRQ %d expected to fire. Actual interrupt " + "status = %x", + irq, snapshot); + + // TODO: Check Interrupt type then clear INTR_TEST if needed. + CHECK_DIF_OK(dif_rv_timer_irq_force(&rv_timer, irq, false)); + CHECK_DIF_OK(dif_rv_timer_irq_acknowledge(&rv_timer, irq)); + break; + } #endif #if TEST_MIN_IRQ_PERIPHERAL <= 17 && 17 < TEST_MAX_IRQ_PERIPHERAL - case kTopEarlgreyPlicPeripheralSensorCtrlAon: { - dif_sensor_ctrl_irq_t irq = (dif_sensor_ctrl_irq_t)( - plic_irq_id - - (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdSensorCtrlAonIoStatusChange); - CHECK(irq == sensor_ctrl_irq_expected, - "Incorrect sensor_ctrl_aon IRQ triggered: exp = %d, obs = %d", - sensor_ctrl_irq_expected, irq); - sensor_ctrl_irq_serviced = irq; - - dif_sensor_ctrl_irq_state_snapshot_t snapshot; - CHECK_DIF_OK(dif_sensor_ctrl_irq_get_state(&sensor_ctrl_aon, &snapshot)); - CHECK(snapshot == (dif_sensor_ctrl_irq_state_snapshot_t)(1 << irq), - "Only sensor_ctrl_aon IRQ %d expected to fire. Actual interrupt " - "status = %x", - irq, snapshot); - - // TODO: Check Interrupt type then clear INTR_TEST if needed. - CHECK_DIF_OK(dif_sensor_ctrl_irq_force(&sensor_ctrl_aon, irq, false)); - CHECK_DIF_OK(dif_sensor_ctrl_irq_acknowledge(&sensor_ctrl_aon, irq)); - break; - } + case kTopEarlgreyPlicPeripheralSensorCtrlAon: { + dif_sensor_ctrl_irq_t irq = (dif_sensor_ctrl_irq_t)( + plic_irq_id - + (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdSensorCtrlAonIoStatusChange); + CHECK(irq == sensor_ctrl_irq_expected, + "Incorrect sensor_ctrl_aon IRQ triggered: exp = %d, obs = %d", + sensor_ctrl_irq_expected, irq); + sensor_ctrl_irq_serviced = irq; + + dif_sensor_ctrl_irq_state_snapshot_t snapshot; + CHECK_DIF_OK(dif_sensor_ctrl_irq_get_state(&sensor_ctrl_aon, &snapshot)); + CHECK(snapshot == (dif_sensor_ctrl_irq_state_snapshot_t)(1 << irq), + "Only sensor_ctrl_aon IRQ %d expected to fire. Actual interrupt " + "status = %x", + irq, snapshot); + + // TODO: Check Interrupt type then clear INTR_TEST if needed. + CHECK_DIF_OK(dif_sensor_ctrl_irq_force(&sensor_ctrl_aon, irq, false)); + CHECK_DIF_OK(dif_sensor_ctrl_irq_acknowledge(&sensor_ctrl_aon, irq)); + break; + } #endif #if TEST_MIN_IRQ_PERIPHERAL <= 18 && 18 < TEST_MAX_IRQ_PERIPHERAL - case kTopEarlgreyPlicPeripheralSpiDevice: { - dif_spi_device_irq_t irq = (dif_spi_device_irq_t)( - plic_irq_id - - (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdSpiDeviceGenericRxFull); - CHECK(irq == spi_device_irq_expected, - "Incorrect spi_device IRQ triggered: exp = %d, obs = %d", - spi_device_irq_expected, irq); - spi_device_irq_serviced = irq; - - dif_spi_device_irq_state_snapshot_t snapshot; - CHECK_DIF_OK(dif_spi_device_irq_get_state(&spi_device, &snapshot)); - CHECK(snapshot == (dif_spi_device_irq_state_snapshot_t)(1 << irq), - "Only spi_device IRQ %d expected to fire. Actual interrupt " - "status = %x", - irq, snapshot); - - // TODO: Check Interrupt type then clear INTR_TEST if needed. - CHECK_DIF_OK(dif_spi_device_irq_force(&spi_device, irq, false)); - CHECK_DIF_OK(dif_spi_device_irq_acknowledge(&spi_device, irq)); - break; - } + case kTopEarlgreyPlicPeripheralSpiDevice: { + dif_spi_device_irq_t irq = (dif_spi_device_irq_t)( + plic_irq_id - + (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdSpiDeviceGenericRxFull); + CHECK(irq == spi_device_irq_expected, + "Incorrect spi_device IRQ triggered: exp = %d, obs = %d", + spi_device_irq_expected, irq); + spi_device_irq_serviced = irq; + + dif_spi_device_irq_state_snapshot_t snapshot; + CHECK_DIF_OK(dif_spi_device_irq_get_state(&spi_device, &snapshot)); + CHECK(snapshot == (dif_spi_device_irq_state_snapshot_t)(1 << irq), + "Only spi_device IRQ %d expected to fire. Actual interrupt " + "status = %x", + irq, snapshot); + + // TODO: Check Interrupt type then clear INTR_TEST if needed. + CHECK_DIF_OK(dif_spi_device_irq_force(&spi_device, irq, false)); + CHECK_DIF_OK(dif_spi_device_irq_acknowledge(&spi_device, irq)); + break; + } #endif #if TEST_MIN_IRQ_PERIPHERAL <= 19 && 19 < TEST_MAX_IRQ_PERIPHERAL - case kTopEarlgreyPlicPeripheralSpiHost0: { - dif_spi_host_irq_t irq = (dif_spi_host_irq_t)( - plic_irq_id - - (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdSpiHost0Error); - CHECK(irq == spi_host_irq_expected, - "Incorrect spi_host0 IRQ triggered: exp = %d, obs = %d", - spi_host_irq_expected, irq); - spi_host_irq_serviced = irq; - - dif_spi_host_irq_state_snapshot_t snapshot; - CHECK_DIF_OK(dif_spi_host_irq_get_state(&spi_host0, &snapshot)); - CHECK(snapshot == (dif_spi_host_irq_state_snapshot_t)(1 << irq), - "Only spi_host0 IRQ %d expected to fire. Actual interrupt " - "status = %x", - irq, snapshot); - - // TODO: Check Interrupt type then clear INTR_TEST if needed. - CHECK_DIF_OK(dif_spi_host_irq_force(&spi_host0, irq, false)); - CHECK_DIF_OK(dif_spi_host_irq_acknowledge(&spi_host0, irq)); - break; - } + case kTopEarlgreyPlicPeripheralSpiHost0: { + dif_spi_host_irq_t irq = (dif_spi_host_irq_t)( + plic_irq_id - + (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdSpiHost0Error); + CHECK(irq == spi_host_irq_expected, + "Incorrect spi_host0 IRQ triggered: exp = %d, obs = %d", + spi_host_irq_expected, irq); + spi_host_irq_serviced = irq; + + dif_spi_host_irq_state_snapshot_t snapshot; + CHECK_DIF_OK(dif_spi_host_irq_get_state(&spi_host0, &snapshot)); + CHECK(snapshot == (dif_spi_host_irq_state_snapshot_t)(1 << irq), + "Only spi_host0 IRQ %d expected to fire. Actual interrupt " + "status = %x", + irq, snapshot); + + // TODO: Check Interrupt type then clear INTR_TEST if needed. + CHECK_DIF_OK(dif_spi_host_irq_force(&spi_host0, irq, false)); + CHECK_DIF_OK(dif_spi_host_irq_acknowledge(&spi_host0, irq)); + break; + } #endif #if TEST_MIN_IRQ_PERIPHERAL <= 19 && 19 < TEST_MAX_IRQ_PERIPHERAL - case kTopEarlgreyPlicPeripheralSpiHost1: { - dif_spi_host_irq_t irq = (dif_spi_host_irq_t)( - plic_irq_id - - (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdSpiHost1Error); - CHECK(irq == spi_host_irq_expected, - "Incorrect spi_host1 IRQ triggered: exp = %d, obs = %d", - spi_host_irq_expected, irq); - spi_host_irq_serviced = irq; - - dif_spi_host_irq_state_snapshot_t snapshot; - CHECK_DIF_OK(dif_spi_host_irq_get_state(&spi_host1, &snapshot)); - CHECK(snapshot == (dif_spi_host_irq_state_snapshot_t)(1 << irq), - "Only spi_host1 IRQ %d expected to fire. Actual interrupt " - "status = %x", - irq, snapshot); - - // TODO: Check Interrupt type then clear INTR_TEST if needed. - CHECK_DIF_OK(dif_spi_host_irq_force(&spi_host1, irq, false)); - CHECK_DIF_OK(dif_spi_host_irq_acknowledge(&spi_host1, irq)); - break; - } + case kTopEarlgreyPlicPeripheralSpiHost1: { + dif_spi_host_irq_t irq = (dif_spi_host_irq_t)( + plic_irq_id - + (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdSpiHost1Error); + CHECK(irq == spi_host_irq_expected, + "Incorrect spi_host1 IRQ triggered: exp = %d, obs = %d", + spi_host_irq_expected, irq); + spi_host_irq_serviced = irq; + + dif_spi_host_irq_state_snapshot_t snapshot; + CHECK_DIF_OK(dif_spi_host_irq_get_state(&spi_host1, &snapshot)); + CHECK(snapshot == (dif_spi_host_irq_state_snapshot_t)(1 << irq), + "Only spi_host1 IRQ %d expected to fire. Actual interrupt " + "status = %x", + irq, snapshot); + + // TODO: Check Interrupt type then clear INTR_TEST if needed. + CHECK_DIF_OK(dif_spi_host_irq_force(&spi_host1, irq, false)); + CHECK_DIF_OK(dif_spi_host_irq_acknowledge(&spi_host1, irq)); + break; + } #endif #if TEST_MIN_IRQ_PERIPHERAL <= 20 && 20 < TEST_MAX_IRQ_PERIPHERAL - case kTopEarlgreyPlicPeripheralSysrstCtrlAon: { - dif_sysrst_ctrl_irq_t irq = (dif_sysrst_ctrl_irq_t)( - plic_irq_id - - (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdSysrstCtrlAonEventDetected); - CHECK(irq == sysrst_ctrl_irq_expected, - "Incorrect sysrst_ctrl_aon IRQ triggered: exp = %d, obs = %d", - sysrst_ctrl_irq_expected, irq); - sysrst_ctrl_irq_serviced = irq; - - dif_sysrst_ctrl_irq_state_snapshot_t snapshot; - CHECK_DIF_OK(dif_sysrst_ctrl_irq_get_state(&sysrst_ctrl_aon, &snapshot)); - CHECK(snapshot == (dif_sysrst_ctrl_irq_state_snapshot_t)(1 << irq), - "Only sysrst_ctrl_aon IRQ %d expected to fire. Actual interrupt " - "status = %x", - irq, snapshot); - - // TODO: Check Interrupt type then clear INTR_TEST if needed. - CHECK_DIF_OK(dif_sysrst_ctrl_irq_force(&sysrst_ctrl_aon, irq, false)); - CHECK_DIF_OK(dif_sysrst_ctrl_irq_acknowledge(&sysrst_ctrl_aon, irq)); - break; - } + case kTopEarlgreyPlicPeripheralSysrstCtrlAon: { + dif_sysrst_ctrl_irq_t irq = (dif_sysrst_ctrl_irq_t)( + plic_irq_id - + (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdSysrstCtrlAonEventDetected); + CHECK(irq == sysrst_ctrl_irq_expected, + "Incorrect sysrst_ctrl_aon IRQ triggered: exp = %d, obs = %d", + sysrst_ctrl_irq_expected, irq); + sysrst_ctrl_irq_serviced = irq; + + dif_sysrst_ctrl_irq_state_snapshot_t snapshot; + CHECK_DIF_OK(dif_sysrst_ctrl_irq_get_state(&sysrst_ctrl_aon, &snapshot)); + CHECK(snapshot == (dif_sysrst_ctrl_irq_state_snapshot_t)(1 << irq), + "Only sysrst_ctrl_aon IRQ %d expected to fire. Actual interrupt " + "status = %x", + irq, snapshot); + + // TODO: Check Interrupt type then clear INTR_TEST if needed. + CHECK_DIF_OK(dif_sysrst_ctrl_irq_force(&sysrst_ctrl_aon, irq, false)); + CHECK_DIF_OK(dif_sysrst_ctrl_irq_acknowledge(&sysrst_ctrl_aon, irq)); + break; + } #endif #if TEST_MIN_IRQ_PERIPHERAL <= 21 && 21 < TEST_MAX_IRQ_PERIPHERAL - case kTopEarlgreyPlicPeripheralUart0: { - dif_uart_irq_t irq = (dif_uart_irq_t)( - plic_irq_id - - (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdUart0TxWatermark); - CHECK(irq == uart_irq_expected, - "Incorrect uart0 IRQ triggered: exp = %d, obs = %d", - uart_irq_expected, irq); - uart_irq_serviced = irq; - - dif_uart_irq_state_snapshot_t snapshot; - CHECK_DIF_OK(dif_uart_irq_get_state(&uart0, &snapshot)); - CHECK(snapshot == (dif_uart_irq_state_snapshot_t)(1 << irq), - "Only uart0 IRQ %d expected to fire. Actual interrupt " - "status = %x", - irq, snapshot); - - // TODO: Check Interrupt type then clear INTR_TEST if needed. - CHECK_DIF_OK(dif_uart_irq_force(&uart0, irq, false)); - CHECK_DIF_OK(dif_uart_irq_acknowledge(&uart0, irq)); - break; - } + case kTopEarlgreyPlicPeripheralUart0: { + dif_uart_irq_t irq = (dif_uart_irq_t)( + plic_irq_id - + (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdUart0TxWatermark); + CHECK(irq == uart_irq_expected, + "Incorrect uart0 IRQ triggered: exp = %d, obs = %d", + uart_irq_expected, irq); + uart_irq_serviced = irq; + + dif_uart_irq_state_snapshot_t snapshot; + CHECK_DIF_OK(dif_uart_irq_get_state(&uart0, &snapshot)); + CHECK(snapshot == (dif_uart_irq_state_snapshot_t)(1 << irq), + "Only uart0 IRQ %d expected to fire. Actual interrupt " + "status = %x", + irq, snapshot); + + // TODO: Check Interrupt type then clear INTR_TEST if needed. + CHECK_DIF_OK(dif_uart_irq_force(&uart0, irq, false)); + CHECK_DIF_OK(dif_uart_irq_acknowledge(&uart0, irq)); + break; + } #endif #if TEST_MIN_IRQ_PERIPHERAL <= 21 && 21 < TEST_MAX_IRQ_PERIPHERAL - case kTopEarlgreyPlicPeripheralUart1: { - dif_uart_irq_t irq = (dif_uart_irq_t)( - plic_irq_id - - (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdUart1TxWatermark); - CHECK(irq == uart_irq_expected, - "Incorrect uart1 IRQ triggered: exp = %d, obs = %d", - uart_irq_expected, irq); - uart_irq_serviced = irq; - - dif_uart_irq_state_snapshot_t snapshot; - CHECK_DIF_OK(dif_uart_irq_get_state(&uart1, &snapshot)); - CHECK(snapshot == (dif_uart_irq_state_snapshot_t)(1 << irq), - "Only uart1 IRQ %d expected to fire. Actual interrupt " - "status = %x", - irq, snapshot); - - // TODO: Check Interrupt type then clear INTR_TEST if needed. - CHECK_DIF_OK(dif_uart_irq_force(&uart1, irq, false)); - CHECK_DIF_OK(dif_uart_irq_acknowledge(&uart1, irq)); - break; - } + case kTopEarlgreyPlicPeripheralUart1: { + dif_uart_irq_t irq = (dif_uart_irq_t)( + plic_irq_id - + (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdUart1TxWatermark); + CHECK(irq == uart_irq_expected, + "Incorrect uart1 IRQ triggered: exp = %d, obs = %d", + uart_irq_expected, irq); + uart_irq_serviced = irq; + + dif_uart_irq_state_snapshot_t snapshot; + CHECK_DIF_OK(dif_uart_irq_get_state(&uart1, &snapshot)); + CHECK(snapshot == (dif_uart_irq_state_snapshot_t)(1 << irq), + "Only uart1 IRQ %d expected to fire. Actual interrupt " + "status = %x", + irq, snapshot); + + // TODO: Check Interrupt type then clear INTR_TEST if needed. + CHECK_DIF_OK(dif_uart_irq_force(&uart1, irq, false)); + CHECK_DIF_OK(dif_uart_irq_acknowledge(&uart1, irq)); + break; + } #endif #if TEST_MIN_IRQ_PERIPHERAL <= 21 && 21 < TEST_MAX_IRQ_PERIPHERAL - case kTopEarlgreyPlicPeripheralUart2: { - dif_uart_irq_t irq = (dif_uart_irq_t)( - plic_irq_id - - (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdUart2TxWatermark); - CHECK(irq == uart_irq_expected, - "Incorrect uart2 IRQ triggered: exp = %d, obs = %d", - uart_irq_expected, irq); - uart_irq_serviced = irq; - - dif_uart_irq_state_snapshot_t snapshot; - CHECK_DIF_OK(dif_uart_irq_get_state(&uart2, &snapshot)); - CHECK(snapshot == (dif_uart_irq_state_snapshot_t)(1 << irq), - "Only uart2 IRQ %d expected to fire. Actual interrupt " - "status = %x", - irq, snapshot); - - // TODO: Check Interrupt type then clear INTR_TEST if needed. - CHECK_DIF_OK(dif_uart_irq_force(&uart2, irq, false)); - CHECK_DIF_OK(dif_uart_irq_acknowledge(&uart2, irq)); - break; - } + case kTopEarlgreyPlicPeripheralUart2: { + dif_uart_irq_t irq = (dif_uart_irq_t)( + plic_irq_id - + (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdUart2TxWatermark); + CHECK(irq == uart_irq_expected, + "Incorrect uart2 IRQ triggered: exp = %d, obs = %d", + uart_irq_expected, irq); + uart_irq_serviced = irq; + + dif_uart_irq_state_snapshot_t snapshot; + CHECK_DIF_OK(dif_uart_irq_get_state(&uart2, &snapshot)); + CHECK(snapshot == (dif_uart_irq_state_snapshot_t)(1 << irq), + "Only uart2 IRQ %d expected to fire. Actual interrupt " + "status = %x", + irq, snapshot); + + // TODO: Check Interrupt type then clear INTR_TEST if needed. + CHECK_DIF_OK(dif_uart_irq_force(&uart2, irq, false)); + CHECK_DIF_OK(dif_uart_irq_acknowledge(&uart2, irq)); + break; + } #endif #if TEST_MIN_IRQ_PERIPHERAL <= 21 && 21 < TEST_MAX_IRQ_PERIPHERAL - case kTopEarlgreyPlicPeripheralUart3: { - dif_uart_irq_t irq = (dif_uart_irq_t)( - plic_irq_id - - (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdUart3TxWatermark); - CHECK(irq == uart_irq_expected, - "Incorrect uart3 IRQ triggered: exp = %d, obs = %d", - uart_irq_expected, irq); - uart_irq_serviced = irq; - - dif_uart_irq_state_snapshot_t snapshot; - CHECK_DIF_OK(dif_uart_irq_get_state(&uart3, &snapshot)); - CHECK(snapshot == (dif_uart_irq_state_snapshot_t)(1 << irq), - "Only uart3 IRQ %d expected to fire. Actual interrupt " - "status = %x", - irq, snapshot); - - // TODO: Check Interrupt type then clear INTR_TEST if needed. - CHECK_DIF_OK(dif_uart_irq_force(&uart3, irq, false)); - CHECK_DIF_OK(dif_uart_irq_acknowledge(&uart3, irq)); - break; - } + case kTopEarlgreyPlicPeripheralUart3: { + dif_uart_irq_t irq = (dif_uart_irq_t)( + plic_irq_id - + (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdUart3TxWatermark); + CHECK(irq == uart_irq_expected, + "Incorrect uart3 IRQ triggered: exp = %d, obs = %d", + uart_irq_expected, irq); + uart_irq_serviced = irq; + + dif_uart_irq_state_snapshot_t snapshot; + CHECK_DIF_OK(dif_uart_irq_get_state(&uart3, &snapshot)); + CHECK(snapshot == (dif_uart_irq_state_snapshot_t)(1 << irq), + "Only uart3 IRQ %d expected to fire. Actual interrupt " + "status = %x", + irq, snapshot); + + // TODO: Check Interrupt type then clear INTR_TEST if needed. + CHECK_DIF_OK(dif_uart_irq_force(&uart3, irq, false)); + CHECK_DIF_OK(dif_uart_irq_acknowledge(&uart3, irq)); + break; + } #endif #if TEST_MIN_IRQ_PERIPHERAL <= 22 && 22 < TEST_MAX_IRQ_PERIPHERAL - case kTopEarlgreyPlicPeripheralUsbdev: { - dif_usbdev_irq_t irq = (dif_usbdev_irq_t)( - plic_irq_id - - (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdUsbdevPktReceived); - CHECK(irq == usbdev_irq_expected, - "Incorrect usbdev IRQ triggered: exp = %d, obs = %d", - usbdev_irq_expected, irq); - usbdev_irq_serviced = irq; - - dif_usbdev_irq_state_snapshot_t snapshot; - CHECK_DIF_OK(dif_usbdev_irq_get_state(&usbdev, &snapshot)); - CHECK(snapshot == (dif_usbdev_irq_state_snapshot_t)(1 << irq), - "Only usbdev IRQ %d expected to fire. Actual interrupt " - "status = %x", - irq, snapshot); - - // TODO: Check Interrupt type then clear INTR_TEST if needed. - CHECK_DIF_OK(dif_usbdev_irq_force(&usbdev, irq, false)); - CHECK_DIF_OK(dif_usbdev_irq_acknowledge(&usbdev, irq)); - break; + case kTopEarlgreyPlicPeripheralUsbdev: { + dif_usbdev_irq_t irq = (dif_usbdev_irq_t)( + plic_irq_id - + (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdUsbdevPktReceived); + CHECK(irq == usbdev_irq_expected, + "Incorrect usbdev IRQ triggered: exp = %d, obs = %d", + usbdev_irq_expected, irq); + usbdev_irq_serviced = irq; + + dif_usbdev_irq_state_snapshot_t snapshot; + CHECK_DIF_OK(dif_usbdev_irq_get_state(&usbdev, &snapshot)); + CHECK(snapshot == (dif_usbdev_irq_state_snapshot_t)(1 << irq), + "Only usbdev IRQ %d expected to fire. Actual interrupt " + "status = %x", + irq, snapshot); + + // TODO: Check Interrupt type then clear INTR_TEST if needed. + CHECK_DIF_OK(dif_usbdev_irq_force(&usbdev, irq, false)); + CHECK_DIF_OK(dif_usbdev_irq_acknowledge(&usbdev, irq)); + break; + } +#endif + + default: + LOG_FATAL("ISR is not implemented!"); + test_status_set(kTestStatusFailed); } -#endif - - default: - LOG_FATAL("ISR is not implemented!"); - test_status_set(kTestStatusFailed); } - // Complete the IRQ at PLIC. CHECK_DIF_OK(dif_rv_plic_irq_complete(&plic, kHart, plic_irq_id)); } diff --git a/util/topgen/templates/BUILD.tpl b/util/topgen/templates/BUILD.tpl index e6b39ff609134..fdee2225ee2f3 100644 --- a/util/topgen/templates/BUILD.tpl +++ b/util/topgen/templates/BUILD.tpl @@ -16,45 +16,6 @@ load( package(default_visibility = ["//visibility:public"]) -# IP Integration Tests -opentitan_test( - name = "plic_all_irqs_test_0".format(min), - srcs = ["plic_all_irqs_test.c"], - copts = [ - "-DTEST_MIN_IRQ_PERIPHERAL=0", - "-DTEST_MAX_IRQ_PERIPHERAL=10", - ], - exec_env = { - "//hw/top_earlgrey:fpga_cw310_sival": None, - "//hw/top_earlgrey:fpga_cw310_test_rom": None, - "//hw/top_earlgrey:silicon_creator": None, - "//hw/top_earlgrey:silicon_owner_sival_rom_ext": "silicon_owner", - "//hw/top_earlgrey:sim_dv": None, - "//hw/top_earlgrey:sim_verilator": None, - }, - silicon_owner = silicon_params( - # TODO(lowrisc/opentitan#20747): Enable silicon_owner when fixed. - tags = ["broken"], - ), - verilator = verilator_params( - timeout = "eternal", - tags = ["flaky"], - # often times out in 3600s on 4 cores - ), - deps = [ - "//hw/top_earlgrey/sw/autogen:top_earlgrey", - "//sw/device/lib/arch:boot_stage", - "//sw/device/lib/base:mmio", -% for n in sorted(irq_peripheral_names + ["rv_plic"]): - "//sw/device/lib/dif:${n}", -% endfor - "//sw/device/lib/runtime:irq", - "//sw/device/lib/runtime:log", - "//sw/device/lib/testing:rv_plic_testutils", - "//sw/device/lib/testing/test_framework:ottf_main", - ], -) - [ opentitan_test( name = "plic_all_irqs_test_{}".format(min), @@ -65,6 +26,7 @@ opentitan_test( ], exec_env = { "//hw/top_earlgrey:fpga_cw310_sival": None, + "//hw/top_earlgrey:fpga_cw310_sival_rom_ext": None, "//hw/top_earlgrey:fpga_cw310_test_rom": None, "//hw/top_earlgrey:silicon_creator": None, "//hw/top_earlgrey:silicon_owner_sival_rom_ext": None, @@ -89,7 +51,7 @@ opentitan_test( "//sw/device/lib/testing/test_framework:ottf_main", ], ) - for min in range(10, ${len(irq_peripheral_names)}, 10) + for min in range(0, ${len(irq_peripheral_names)}, 10) ] test_suite( diff --git a/util/topgen/templates/plic_all_irqs_test.c.tpl b/util/topgen/templates/plic_all_irqs_test.c.tpl index 4a5574a7b5d11..8a3f7c61675b2 100644 --- a/util/topgen/templates/plic_all_irqs_test.c.tpl +++ b/util/topgen/templates/plic_all_irqs_test.c.tpl @@ -47,10 +47,17 @@ def args(p): % for p in helper.irq_peripherals: <% i = irq_peripheral_names.index(p.name) + csrng_index = irq_peripheral_names.index("csrng") %>\ +% if i == csrng_index: +// TODO(lowrisc/opentitan#20747) Adjust csrng special handling once this is +// fixed. +static dif_${p.name}_t ${p.inst_name}; +% else: #if TEST_MIN_IRQ_PERIPHERAL <= ${i} && ${i} < TEST_MAX_IRQ_PERIPHERAL static dif_${p.name}_t ${p.inst_name}; #endif +% endif % endfor static dif_rv_plic_t plic; @@ -79,6 +86,13 @@ static volatile dif_${n}_irq_t ${n}_irq_serviced; #endif % endfor + +#if TEST_MIN_IRQ_PERIPHERAL <= ${csrng_index} < TEST_MAX_IRQ_PERIPHERAL +static volatile bool allow_csrng_irq = true; +#else +static volatile bool allow_csrng_irq = false; +#endif + /** * Provides external IRQ handling for this test. * @@ -98,45 +112,75 @@ void ottf_external_isr(uint32_t *exc_info) { top_${top["name"]}_plic_peripheral_t peripheral = (top_${top["name"]}_plic_peripheral_t) top_${top["name"]}_plic_interrupt_for_peripheral[plic_irq_id]; - CHECK(peripheral == peripheral_expected, - "Interrupt from incorrect peripheral: exp = %d, obs = %d", - peripheral_expected, peripheral); + // TODO(lowrisc/opentitan#20747) Adjust code once this issue is fixed. + if (allow_csrng_irq && kBootStage == kBootStageOwner && + peripheral != peripheral_expected && + peripheral == kTopEarlgreyPlicPeripheralCsrng) { + dif_csrng_irq_t irq = (dif_csrng_irq_t)( + plic_irq_id - + (dif_rv_plic_irq_id_t)kTopEarlgreyPlicIrqIdCsrngCsCmdReqDone); + + dif_csrng_irq_state_snapshot_t snapshot; + CHECK_DIF_OK(dif_csrng_irq_get_state(&csrng, &snapshot)); + CHECK(snapshot == (dif_csrng_irq_state_snapshot_t)(1 << irq), + "Only csrng IRQ %d expected to fire. Actual interrupt status = %x", + irq, snapshot); + + // TODO: Check Interrupt type then clear INTR_TEST if needed. + CHECK_DIF_OK(dif_csrng_irq_force(&csrng, irq, false)); + CHECK_DIF_OK(dif_csrng_irq_acknowledge(&csrng, irq)); + } else { + CHECK(peripheral == peripheral_expected, + "Interrupt from incorrect peripheral: exp = %d, obs = %d", + peripheral_expected, peripheral); - switch (peripheral) { + switch (peripheral) { % for p in helper.irq_peripherals: <% i = irq_peripheral_names.index(p.name) %>\ #if TEST_MIN_IRQ_PERIPHERAL <= ${i} && ${i} < TEST_MAX_IRQ_PERIPHERAL - case ${p.plic_name}: { - dif_${p.name}_irq_t irq = (dif_${p.name}_irq_t)( - plic_irq_id - - (dif_rv_plic_irq_id_t)${p.plic_start_irq}); - CHECK(irq == ${p.name}_irq_expected, - "Incorrect ${p.inst_name} IRQ triggered: exp = %d, obs = %d", - ${p.name}_irq_expected, irq); - ${p.name}_irq_serviced = irq; - - dif_${p.name}_irq_state_snapshot_t snapshot; - CHECK_DIF_OK(dif_${p.name}_irq_get_state(${args(p)}, &snapshot)); - CHECK(snapshot == (dif_${p.name}_irq_state_snapshot_t)(1 << irq), - "Only ${p.inst_name} IRQ %d expected to fire. Actual interrupt " - "status = %x", - irq, snapshot); - - // TODO: Check Interrupt type then clear INTR_TEST if needed. - CHECK_DIF_OK(dif_${p.name}_irq_force(&${p.inst_name}, irq, false)); - CHECK_DIF_OK(dif_${p.name}_irq_acknowledge(&${p.inst_name}, irq)); - break; - } + case ${p.plic_name}: { + dif_${p.name}_irq_t irq = (dif_${p.name}_irq_t)( + plic_irq_id - + (dif_rv_plic_irq_id_t)${p.plic_start_irq}); + % if i == irq_peripheral_names.index("csrng"): + // This special handling of CSRNG is because it is configured + // to constantly generate interrupts. There may be better ways + // to configure the entropy complex so it is less noisy. + // TODO(lowrisc/opentitan#20747) Adjust code once this is fixed. + if (kBootStage != kBootStageOwner) { + CHECK(irq == ${p.name}_irq_expected, + "Incorrect ${p.inst_name} IRQ triggered: exp = %d, obs = %d", + ${p.name}_irq_expected, irq); + } + % else: + CHECK(irq == ${p.name}_irq_expected, + "Incorrect ${p.inst_name} IRQ triggered: exp = %d, obs = %d", + ${p.name}_irq_expected, irq); + % endif + ${p.name}_irq_serviced = irq; + + dif_${p.name}_irq_state_snapshot_t snapshot; + CHECK_DIF_OK(dif_${p.name}_irq_get_state(${args(p)}, &snapshot)); + CHECK(snapshot == (dif_${p.name}_irq_state_snapshot_t)(1 << irq), + "Only ${p.inst_name} IRQ %d expected to fire. Actual interrupt " + "status = %x", + irq, snapshot); + + // TODO: Check Interrupt type then clear INTR_TEST if needed. + CHECK_DIF_OK(dif_${p.name}_irq_force(&${p.inst_name}, irq, false)); + CHECK_DIF_OK(dif_${p.name}_irq_acknowledge(&${p.inst_name}, irq)); + break; + } #endif % endfor - default: - LOG_FATAL("ISR is not implemented!"); - test_status_set(kTestStatusFailed); + default: + LOG_FATAL("ISR is not implemented!"); + test_status_set(kTestStatusFailed); + } } - // Complete the IRQ at PLIC. CHECK_DIF_OK(dif_rv_plic_irq_complete(&plic, kHart, plic_irq_id)); }