From 5d240959f272ab1be91bb6dbc4a4383a32e1f2b3 Mon Sep 17 00:00:00 2001 From: Douglas Reis Date: Mon, 16 Dec 2024 13:07:38 +0000 Subject: [PATCH] [SiVal, crypto] Add cw340 exec_env to SiVal tests Signed-off-by: Douglas Reis --- sw/device/tests/crypto/BUILD | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/sw/device/tests/crypto/BUILD b/sw/device/tests/crypto/BUILD index f591a26e8c104..99e1fd4b87b02 100644 --- a/sw/device/tests/crypto/BUILD +++ b/sw/device/tests/crypto/BUILD @@ -805,12 +805,11 @@ autogen_cryptotest_header( opentitan_test( name = "rsa_3072_verify_functest_wycheproof", srcs = ["rsa_3072_verify_functest.c"], - # The test vectors don't fit in the flash allocated for ROM_EXT stage, so - # we have to restrict the environments to run with the test_rom. exec_env = dicts.add( EARLGREY_SILICON_OWNER_ROM_EXT_ENVS, { "//hw/top_earlgrey:fpga_cw310_test_rom": None, + "//hw/top_earlgrey:fpga_cw340_sival_rom_ext": None, "//hw/top_earlgrey:sim_verilator": None, }, ), @@ -1043,6 +1042,7 @@ opentitan_test( EARLGREY_SILICON_OWNER_ROM_EXT_ENVS, { "//hw/top_earlgrey:fpga_cw310_rom_ext": None, + "//hw/top_earlgrey:fpga_cw340_sival_rom_ext": None, }, ), deps = [ @@ -1061,6 +1061,7 @@ opentitan_test( EARLGREY_SILICON_OWNER_ROM_EXT_ENVS, { "//hw/top_earlgrey:fpga_cw310_rom_ext": None, + "//hw/top_earlgrey:fpga_cw340_sival_rom_ext": None, }, ), deps = [