From 3fd461fb662f538c4ab5b129f9bd7fa9ab44a084 Mon Sep 17 00:00:00 2001 From: Ghada Dessouky Date: Sat, 6 Jul 2024 04:07:38 +0000 Subject: [PATCH] [hmac,dv] Additional UNR exclusions This excludes the invalid st_q FSM transitions from coverage until the triggering RTL is removed. Signed-off-by: Ghada Dessouky --- hw/ip/hmac/dv/cov/hmac_cov_excl.el | 121 ++++------------------------- 1 file changed, 17 insertions(+), 104 deletions(-) diff --git a/hw/ip/hmac/dv/cov/hmac_cov_excl.el b/hw/ip/hmac/dv/cov/hmac_cov_excl.el index cba71d634c680..e4f09b1f70408 100644 --- a/hw/ip/hmac/dv/cov/hmac_cov_excl.el +++ b/hw/ip/hmac/dv/cov/hmac_cov_excl.el @@ -1,112 +1,25 @@ // Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 + //================================================== // This file contains the Excluded objects -// Generated By User: jdonjdon +// Generated By User: gdessouky // Format Version: 2 -// Date: Tue Jan 17 09:53:14 2023 +// Date: Sat Jul 6 04:05:21 2024 // ExclMode: default //================================================== -CHECKSUM: "999092902 1653597412" -INSTANCE: tb.dut.u_packer -ANNOTATION: "[UNR] cannot have (ack_in & ack_out) = 1" -Branch 8 "1280311922" "{ack_in, ack_out}" (4) "{ack_in, ack_out} 2'b11 ,-,1" -CHECKSUM: "999092902 1688756168" -INSTANCE: tb.dut.u_packer -ANNOTATION: "[UNR] cannot have (ack_in & ack_out) = 1" -Condition 4 "787104413" "((int'(pos_with_input) <= OutW) ? '0 : ((pos_with_input - 7'(OutW)))) 1 -1" -CHECKSUM: "2480142477 4234532693" -INSTANCE: tb.dut.u_hmac -ANNOTATION: "[UNR] sha_rready=1 requires sha_rvalid=1." -Condition 35 "2274840451" "(sha_rready && sha_rvalid) 1 -1" -ANNOTATION: "[UNR] tl_adapter with outstanding=1 drains fifo faster than it pushes. So it cannot have fifo full condition" -Condition 12 "4243391834" "(fifo_wready && (fifo_wdata_sel == 3'h7)) 1 -1" -CHECKSUM: "295805079 2786204945" -INSTANCE: tb.dut.u_reg.u_key_0 -ANNOTATION: "[UNR] Assigned by constant '0'" -Block 2 "1004401251" "assign qs = d;" -ANNOTATION: "[UNR] Assigned by constant '0'" -Block 1 "531057943" "assign ds = d;" -CHECKSUM: "295805079 2786204945" -INSTANCE: tb.dut.u_reg.u_key_1 -ANNOTATION: "[UNR] Assigned by constant '0'" -Block 1 "531057943" "assign ds = d;" -ANNOTATION: "[UNR] Assigned by constant '0'" -Block 2 "1004401251" "assign qs = d;" -CHECKSUM: "295805079 2786204945" -INSTANCE: tb.dut.u_reg.u_key_2 -ANNOTATION: "[UNR] Assigned by constant '0'" -Block 1 "531057943" "assign ds = d;" -ANNOTATION: "[UNR] Assigned by constant '0'" -Block 2 "1004401251" "assign qs = d;" -CHECKSUM: "295805079 2786204945" -INSTANCE: tb.dut.u_reg.u_key_3 -ANNOTATION: "[UNR] Assigned by constant '0'" -Block 1 "531057943" "assign ds = d;" -ANNOTATION: "[UNR] Assigned by constant '0'" -Block 2 "1004401251" "assign qs = d;" -CHECKSUM: "295805079 2786204945" -INSTANCE: tb.dut.u_reg.u_key_4 -ANNOTATION: "[UNR] Assigned by constant '0'" -Block 1 "531057943" "assign ds = d;" -ANNOTATION: "[UNR] Assigned by constant '0'" -Block 2 "1004401251" "assign qs = d;" -CHECKSUM: "295805079 2786204945" -INSTANCE: tb.dut.u_reg.u_key_5 -ANNOTATION: "[UNR] Assigned by constant '0'" -Block 1 "531057943" "assign ds = d;" -ANNOTATION: "[UNR] Assigned by constant '0'" -Block 2 "1004401251" "assign qs = d;" -CHECKSUM: "295805079 2786204945" -INSTANCE: tb.dut.u_reg.u_key_6 -ANNOTATION: "[UNR] Assigned by constant '0'" -Block 1 "531057943" "assign ds = d;" -ANNOTATION: "[UNR] Assigned by constant '0'" -Block 2 "1004401251" "assign qs = d;" -CHECKSUM: "295805079 2786204945" -INSTANCE: tb.dut.u_reg.u_key_7 -ANNOTATION: "[UNR] Assigned by constant '0'" -Block 1 "531057943" "assign ds = d;" -ANNOTATION: "[UNR] Assigned by constant '0'" -Block 2 "1004401251" "assign qs = d;" -CHECKSUM: "2972535896 223073768" -INSTANCE: tb.dut.u_reg.u_msg_length_upper -ANNOTATION: "[UNR] Assigned by constant '1'" -Block 7 "1375076151" "assign qe = wr_en;" -CHECKSUM: "2972535896 223073768" -INSTANCE: tb.dut.u_reg.u_msg_length_lower -ANNOTATION: "[UNR] Assigned by constant '1'" -Block 7 "1375076151" "assign qe = wr_en;" -CHECKSUM: "1706182284 132761700" -INSTANCE: tb.dut.u_reg.u_reg_if.u_rsp_intg_gen -ANNOTATION: "[UNR] EnableRspIntgGen = '0'" -Block 1 "461445014" "assign rsp_intg = tl_i.d_user.rsp_intg;" -ANNOTATION: "[UNR] EnableRspIntgGen = '0'" -Block 2 "2643129081" "assign data_intg = tl_i.d_user.data_intg;" -CHECKSUM: "1424864498" -ANNOTATION: "[UNR] Assigned by constant '0'" -INSTANCE:tb.dut.u_tlul_adapter.u_tlul_data_integ_enc_instr.u_data_gen -CHECKSUM: "1424864498" -ANNOTATION: "[UNR] Assigned by constant '1'" -INSTANCE:tb.dut.u_tlul_adapter.u_tlul_data_integ_enc_data.u_data_gen -CHECKSUM: "835220981 190418284" -INSTANCE: tb.dut.u_tlul_adapter.u_sramreqfifo -ANNOTATION: "[UNR] Pass is always '1'" -Block 18 "1525963788" "assign gen_normal_fifo.storage_rdata = gen_normal_fifo.storage[0];" -CHECKSUM: "1706182284 132761700" -INSTANCE: tb.dut.u_tlul_adapter.u_rsp_gen -ANNOTATION: "[UNR] EnableRspIntgGen = '0'" -Block 1 "461445014" "assign rsp_intg = tl_i.d_user.rsp_intg;" -CHECKSUM: "2580048842" -INSTANCE: tb.dut.u_tlul_adapter.u_rspfifo -ANNOTATION: "[UNSUPPORTED] excluded by fpv" -Assert gen_normal_fifo.depthShallNotExceedParamDepth "assertion" -ANNOTATION: "[UNSUPPORTED] excluded by fpv" -Assert DataKnown_A "assertion" -CHECKSUM: "2580048842" -INSTANCE: tb.dut.u_tlul_adapter.u_sramreqfifo -ANNOTATION: "[UNSUPPORTED] excluded by fpv" -Assert gen_normal_fifo.depthShallNotExceedParamDepth "assertion" -ANNOTATION: "[UNSUPPORTED] excluded by fpv" -Assert DataKnown_A "assertion" +CHECKSUM: "1683432060 1171249183" +INSTANCE: tb.dut.u_prim_sha2_512.gen_multimode_logic.u_prim_sha2_multimode.u_pad +Fsm st_q "1171249183" +ANNOTATION: "[INVALID] Intend to remove transition" +Transition StLenHi->StFifoReceive "4->1" +Fsm st_q "1171249183" +ANNOTATION: "[INVALID] Intend to remove transition" +Transition StPad80->StFifoReceive "2->1" +Fsm st_q "1171249183" +ANNOTATION: "[INVALID] Intend to remove transition" +Transition StPad00->StFifoReceive "3->1" +Fsm st_q "1171249183" +ANNOTATION: "[INVALID] Intend to remove transition" +Transition StLenLo->StFifoReceive "5->1"