From 37796001465a5ae37b7601437bae7436e2903f60 Mon Sep 17 00:00:00 2001 From: Douglas Reis Date: Wed, 24 Apr 2024 15:43:10 +0100 Subject: [PATCH] [rstmgr, sival] Fix alert_info test on ROM_EXT + FPGA The test generates a kTopEarlgreyAlertIdFlashCtrlFatalErr alert only on the FPGA and with ROM_EXT. It doesn't happens on Silicon probrably because it has the seeds. Signed-off-by: Douglas Reis --- sw/device/tests/rstmgr_alert_info_test.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/sw/device/tests/rstmgr_alert_info_test.c b/sw/device/tests/rstmgr_alert_info_test.c index 62b1b8cf26ff1c..a24c3de68b8b87 100644 --- a/sw/device/tests/rstmgr_alert_info_test.c +++ b/sw/device/tests/rstmgr_alert_info_test.c @@ -701,6 +701,12 @@ static void init_expected_cause(void) { .alert_info.alert_cause[kTopEarlgreyAlertIdI2c0FatalFault] = 1; kExpectedInfo[kRound3] .alert_info.alert_cause[kTopEarlgreyAlertIdSpiHost0FatalFault] = 1; + + if (kBootStage == kBootStageOwner && + (kDeviceType == kDeviceFpgaCw310 || kDeviceType == kDeviceFpgaCw340)) { + kExpectedInfo[kRound3] + .alert_info.alert_cause[kTopEarlgreyAlertIdFlashCtrlFatalErr] = 1; + } } bool test_main(void) { uint32_t event_idx = 0; @@ -805,7 +811,7 @@ bool test_main(void) { CHECK_DIF_OK(dif_alert_handler_irq_set_enabled( &alert_handler, kDifAlertHandlerIrqClassb, kDifToggleEnabled)); } else { - LOG_INFO("Skipping OTP test due to ROM_EXT"); + LOG_INFO("Skipping OTP test due to ROM_EXT ePMP configuration"); } CHECK_DIF_OK(dif_alert_handler_irq_set_enabled( &alert_handler, kDifAlertHandlerIrqClassc, kDifToggleEnabled));