From 22a1c109a73e368a52d09a5167cd9b2327500677 Mon Sep 17 00:00:00 2001 From: Michael Schaffner <msf@opentitan.org> Date: Tue, 13 Feb 2024 22:55:24 +0100 Subject: [PATCH] [cip/dv] Increase timeout when waiting for access Some CSR accesses via JTAG take a long time, hence the timeout in wait_to_issue_reset() needs to be higher so that the function does not error out unexpectedly. Signed-off-by: Michael Schaffner <msf@opentitan.org> --- hw/dv/sv/cip_lib/seq_lib/cip_base_vseq.sv | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/dv/sv/cip_lib/seq_lib/cip_base_vseq.sv b/hw/dv/sv/cip_lib/seq_lib/cip_base_vseq.sv index be90f174d7f35..c88de17bc3102 100644 --- a/hw/dv/sv/cip_lib/seq_lib/cip_base_vseq.sv +++ b/hw/dv/sv/cip_lib/seq_lib/cip_base_vseq.sv @@ -746,10 +746,10 @@ class cip_base_vseq #( // Wait a random number of cycles (up to reset_delay_bound) before triggering the reset. cfg.clk_rst_vif.wait_clks(rand_reset_delay); - // If there is an outstanding access, wait up to 1000 more cycles to allow it to clear. If it + // If there is an outstanding access, wait up to 10000 more cycles to allow it to clear. If it // doesn't clear, something has gone wrong: we don't expect there to permanently be CSR // accesses. - for (int i = 0; i < 1000; i++) begin + for (int i = 0; i < 10000; i++) begin if (!has_outstanding_access()) break; cfg.clk_rst_vif.wait_clks(1); end