From 212349920f8282442c1e646d84311547c07a2efb Mon Sep 17 00:00:00 2001 From: Douglas Reis Date: Thu, 2 May 2024 11:19:33 +0100 Subject: [PATCH] [dv, rstmgr] Increate dvsim timeout for alert_info test Signed-off-by: Douglas Reis --- hw/top_earlgrey/dv/chip_sim_cfg.hjson | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/top_earlgrey/dv/chip_sim_cfg.hjson b/hw/top_earlgrey/dv/chip_sim_cfg.hjson index 95a342b6eee506..de3b0d17276576 100644 --- a/hw/top_earlgrey/dv/chip_sim_cfg.hjson +++ b/hw/top_earlgrey/dv/chip_sim_cfg.hjson @@ -971,7 +971,7 @@ uvm_test_seq: chip_sw_base_vseq sw_images: ["//sw/device/tests:rstmgr_alert_info_test:1:new_rules"] en_run_modes: ["sw_test_mode_test_rom"] - run_opts: ["+sw_test_timeout_ns=30_000_000", "+en_scb_tl_err_chk=0"] + run_opts: ["+sw_test_timeout_ns=40_000_000", "+en_scb_tl_err_chk=0"] run_timeout_mins: 120 } {