diff --git a/vendor/lowrisc_ip.lock.hjson b/vendor/lowrisc_ip.lock.hjson
index 2e9f5a9d74..9c3698bbcf 100644
--- a/vendor/lowrisc_ip.lock.hjson
+++ b/vendor/lowrisc_ip.lock.hjson
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
@@ -9,6 +9,6 @@
   upstream:
   {
     url: https://github.com/lowRISC/opentitan
-    rev: e0c40265019aa0c74e6903d3b3a144c48a3815ec
+    rev: d268f271f4f75aeb8f3bf9624a497ae5bfb9c47e
   }
 }
diff --git a/vendor/lowrisc_ip/dv/sv/common_ifs/clk_if.sv b/vendor/lowrisc_ip/dv/sv/common_ifs/clk_if.sv
index 49030ec475..1ec154bb46 100644
--- a/vendor/lowrisc_ip/dv/sv/common_ifs/clk_if.sv
+++ b/vendor/lowrisc_ip/dv/sv/common_ifs/clk_if.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/sv/common_ifs/clk_rst_if.sv b/vendor/lowrisc_ip/dv/sv/common_ifs/clk_rst_if.sv
index de3f38488a..2f5c3b4082 100644
--- a/vendor/lowrisc_ip/dv/sv/common_ifs/clk_rst_if.sv
+++ b/vendor/lowrisc_ip/dv/sv/common_ifs/clk_rst_if.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
@@ -136,6 +136,7 @@ interface clk_rst_if #(
 
   // set the clk frequency in khz
   function automatic void set_freq_khz(int freq_khz);
+    `DV_CHECK_FATAL(freq_khz > 0, , msg_id)
     clk_freq_mhz = $itor(freq_khz) / 1000;
     clk_period_ps = 1000_000 / clk_freq_mhz;
     recompute = 1'b1;
@@ -143,6 +144,7 @@ interface clk_rst_if #(
 
   // set the clk frequency in mhz
   function automatic void set_freq_mhz(int freq_mhz);
+    `DV_CHECK_FATAL(freq_mhz > 0, , msg_id)
     set_freq_khz(freq_mhz * 1000);
   endfunction
 
diff --git a/vendor/lowrisc_ip/dv/sv/common_ifs/common_ifs.core b/vendor/lowrisc_ip/dv/sv/common_ifs/common_ifs.core
index efa3872f83..e6467984cb 100644
--- a/vendor/lowrisc_ip/dv/sv/common_ifs/common_ifs.core
+++ b/vendor/lowrisc_ip/dv/sv/common_ifs/common_ifs.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:dv:common_ifs"
diff --git a/vendor/lowrisc_ip/dv/sv/common_ifs/common_ifs_pkg.sv b/vendor/lowrisc_ip/dv/sv/common_ifs/common_ifs_pkg.sv
index 4a1fd9a0a8..d240966567 100644
--- a/vendor/lowrisc_ip/dv/sv/common_ifs/common_ifs_pkg.sv
+++ b/vendor/lowrisc_ip/dv/sv/common_ifs/common_ifs_pkg.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/sv/common_ifs/entropy_subsys_fifo_exception_if.core b/vendor/lowrisc_ip/dv/sv/common_ifs/entropy_subsys_fifo_exception_if.core
index 3e2b9c5cc6..981934f878 100644
--- a/vendor/lowrisc_ip/dv/sv/common_ifs/entropy_subsys_fifo_exception_if.core
+++ b/vendor/lowrisc_ip/dv/sv/common_ifs/entropy_subsys_fifo_exception_if.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:dv:entropy_subsys_fifo_exception_if"
diff --git a/vendor/lowrisc_ip/dv/sv/common_ifs/entropy_subsys_fifo_exception_if.sv b/vendor/lowrisc_ip/dv/sv/common_ifs/entropy_subsys_fifo_exception_if.sv
index ab3636a089..41cdd15b74 100644
--- a/vendor/lowrisc_ip/dv/sv/common_ifs/entropy_subsys_fifo_exception_if.sv
+++ b/vendor/lowrisc_ip/dv/sv/common_ifs/entropy_subsys_fifo_exception_if.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/dv/sv/common_ifs/entropy_subsys_fifo_exception_pkg.sv b/vendor/lowrisc_ip/dv/sv/common_ifs/entropy_subsys_fifo_exception_pkg.sv
index 9ca3e6d0de..700e42979e 100644
--- a/vendor/lowrisc_ip/dv/sv/common_ifs/entropy_subsys_fifo_exception_pkg.sv
+++ b/vendor/lowrisc_ip/dv/sv/common_ifs/entropy_subsys_fifo_exception_pkg.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/sv/common_ifs/pins_if.sv b/vendor/lowrisc_ip/dv/sv/common_ifs/pins_if.sv
index 2316880978..bf90c272f6 100644
--- a/vendor/lowrisc_ip/dv/sv/common_ifs/pins_if.sv
+++ b/vendor/lowrisc_ip/dv/sv/common_ifs/pins_if.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/sv/common_ifs/pins_ifs.core b/vendor/lowrisc_ip/dv/sv/common_ifs/pins_ifs.core
index f528e12d4b..4663365818 100644
--- a/vendor/lowrisc_ip/dv/sv/common_ifs/pins_ifs.core
+++ b/vendor/lowrisc_ip/dv/sv/common_ifs/pins_ifs.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:dv:pins_if"
diff --git a/vendor/lowrisc_ip/dv/sv/common_ifs/rst_shadowed_if.core b/vendor/lowrisc_ip/dv/sv/common_ifs/rst_shadowed_if.core
index 082921dd8d..8cbbcaf158 100644
--- a/vendor/lowrisc_ip/dv/sv/common_ifs/rst_shadowed_if.core
+++ b/vendor/lowrisc_ip/dv/sv/common_ifs/rst_shadowed_if.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:dv:rst_shadowed_if"
diff --git a/vendor/lowrisc_ip/dv/sv/common_ifs/rst_shadowed_if.sv b/vendor/lowrisc_ip/dv/sv/common_ifs/rst_shadowed_if.sv
index 233f36862a..3a7e02efcf 100644
--- a/vendor/lowrisc_ip/dv/sv/common_ifs/rst_shadowed_if.sv
+++ b/vendor/lowrisc_ip/dv/sv/common_ifs/rst_shadowed_if.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/sv/csr_utils/csr_seq_lib.sv b/vendor/lowrisc_ip/dv/sv/csr_utils/csr_seq_lib.sv
index 075ab6d7cd..1ef67731c0 100644
--- a/vendor/lowrisc_ip/dv/sv/csr_utils/csr_seq_lib.sv
+++ b/vendor/lowrisc_ip/dv/sv/csr_utils/csr_seq_lib.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
@@ -329,7 +329,19 @@ class csr_bit_bash_seq extends csr_base_seq;
   `uvm_object_new
 
   virtual task body();
+    int unsigned total_count = test_csrs.size();
+    int unsigned done_count = 0;
+
+    `uvm_info(`gtn,
+              $sformatf("Running bit bash sequence for %0d registers", total_count),
+              UVM_MEDIUM)
     foreach (test_csrs[i]) begin
+      done_count++;
+      `uvm_info(`gtn,
+                $sformatf("Verifying register bit bash for %0s (register %0d/%0d)",
+                          test_csrs[i].get_full_name(), done_count, total_count),
+                UVM_MEDIUM)
+
       // check if parent block or register is excluded from write
       if (is_excl(test_csrs[i], CsrExclWrite, CsrBitBashTest) ||
           is_excl(test_csrs[i], CsrExclWriteCheck, CsrBitBashTest)) begin
@@ -338,9 +350,6 @@ class csr_bit_bash_seq extends csr_base_seq;
         continue;
       end
 
-      `uvm_info(`gtn, $sformatf("Verifying register bit bash for %0s",
-                test_csrs[i].get_full_name()), UVM_MEDIUM)
-
       begin
         uvm_reg_field   fields[$];
         string          mode[`UVM_REG_DATA_WIDTH];
diff --git a/vendor/lowrisc_ip/dv/sv/csr_utils/csr_utils.core b/vendor/lowrisc_ip/dv/sv/csr_utils/csr_utils.core
index 0b2cbf4101..256e57a354 100644
--- a/vendor/lowrisc_ip/dv/sv/csr_utils/csr_utils.core
+++ b/vendor/lowrisc_ip/dv/sv/csr_utils/csr_utils.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:dv:csr_utils"
diff --git a/vendor/lowrisc_ip/dv/sv/csr_utils/csr_utils_pkg.sv b/vendor/lowrisc_ip/dv/sv/csr_utils/csr_utils_pkg.sv
index 305d4ec8cc..94ce5d15c8 100644
--- a/vendor/lowrisc_ip/dv/sv/csr_utils/csr_utils_pkg.sv
+++ b/vendor/lowrisc_ip/dv/sv/csr_utils/csr_utils_pkg.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
@@ -26,10 +26,14 @@ package csr_utils_pkg;
 
   function automatic void increment_outstanding_access();
     outstanding_accesses++;
+    `uvm_info("csr_utils_pkg", $sformatf("increment_outstanding_access %0d", outstanding_accesses),
+              UVM_HIGH)
   endfunction
 
   function automatic void decrement_outstanding_access();
     outstanding_accesses--;
+    `uvm_info("csr_utils_pkg", $sformatf("decrement_outstanding_access %0d", outstanding_accesses),
+              UVM_HIGH)
   endfunction
 
   task automatic wait_no_outstanding_access();
@@ -549,6 +553,7 @@ package csr_utils_pkg;
         fork
           while (!under_reset) begin
             if (spinwait_delay_ns) #(spinwait_delay_ns * 1ns);
+            `uvm_info("csr_utils_pkg", "In csr_spinwait", verbosity)
             csr_rd(.ptr(ptr), .value(read_data), .check(check), .path(path),
                    .blocking(1), .map(map), .user_ftdr(user_ftdr), .backdoor(backdoor));
             `uvm_info(msg_id, $sformatf("ptr %0s == 0x%0h",
diff --git a/vendor/lowrisc_ip/dv/sv/dv_base_reg/csr_excl_item.sv b/vendor/lowrisc_ip/dv/sv/dv_base_reg/csr_excl_item.sv
index b577d3bcbc..fa6f57774c 100644
--- a/vendor/lowrisc_ip/dv/sv/dv_base_reg/csr_excl_item.sv
+++ b/vendor/lowrisc_ip/dv/sv/dv_base_reg/csr_excl_item.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/sv/dv_base_reg/dv_base_lockable_field_cov.sv b/vendor/lowrisc_ip/dv/sv/dv_base_reg/dv_base_lockable_field_cov.sv
index 65f852e407..62e8c9d0a4 100644
--- a/vendor/lowrisc_ip/dv/sv/dv_base_reg/dv_base_lockable_field_cov.sv
+++ b/vendor/lowrisc_ip/dv/sv/dv_base_reg/dv_base_lockable_field_cov.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/dv/sv/dv_base_reg/dv_base_mem.sv b/vendor/lowrisc_ip/dv/sv/dv_base_reg/dv_base_mem.sv
index b8cd99bdf2..631c457bd7 100644
--- a/vendor/lowrisc_ip/dv/sv/dv_base_reg/dv_base_mem.sv
+++ b/vendor/lowrisc_ip/dv/sv/dv_base_reg/dv_base_mem.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/dv/sv/dv_base_reg/dv_base_mubi_cov.sv b/vendor/lowrisc_ip/dv/sv/dv_base_reg/dv_base_mubi_cov.sv
index f3af2b9e8d..2cbe9fe55d 100644
--- a/vendor/lowrisc_ip/dv/sv/dv_base_reg/dv_base_mubi_cov.sv
+++ b/vendor/lowrisc_ip/dv/sv/dv_base_reg/dv_base_mubi_cov.sv
@@ -1,12 +1,11 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
 // coverage object for a fixed width mubi
 class mubi_cov #(parameter int Width = 4,
-                parameter int ValueTrue = prim_mubi_pkg::MuBi4True,
-                parameter int ValueFalse = prim_mubi_pkg::MuBi4False
-                ) extends uvm_object;
+                 parameter int unsigned ValueTrue = prim_mubi_pkg::MuBi4True,
+                 parameter int unsigned ValueFalse = prim_mubi_pkg::MuBi4False) extends uvm_object;
   `uvm_object_param_utils(mubi_cov #(Width, ValueTrue, ValueFalse))
 
   // Collect true, false and at least N other values (N = Width)
@@ -43,6 +42,18 @@ typedef mubi_cov #(.Width(12),
 typedef mubi_cov #(.Width(16),
                    .ValueTrue(prim_mubi_pkg::MuBi16True),
                    .ValueFalse(prim_mubi_pkg::MuBi16False)) mubi16_cov;
+typedef mubi_cov #(.Width(20),
+                   .ValueTrue(prim_mubi_pkg::MuBi20True),
+                   .ValueFalse(prim_mubi_pkg::MuBi20False)) mubi20_cov;
+typedef mubi_cov #(.Width(24),
+                   .ValueTrue(prim_mubi_pkg::MuBi24True),
+                   .ValueFalse(prim_mubi_pkg::MuBi24False)) mubi24_cov;
+typedef mubi_cov #(.Width(28),
+                   .ValueTrue(prim_mubi_pkg::MuBi28True),
+                   .ValueFalse(prim_mubi_pkg::MuBi28False)) mubi28_cov;
+typedef mubi_cov #(.Width(32),
+                   .ValueTrue(prim_mubi_pkg::MuBi32True),
+                   .ValueFalse(prim_mubi_pkg::MuBi32False)) mubi32_cov;
 
 // a mubi coverage object, which allows to dynamically select the width of mubi
 class dv_base_mubi_cov extends uvm_object;
@@ -53,6 +64,10 @@ class dv_base_mubi_cov extends uvm_object;
   mubi8_cov m_mubi8_cov;
   mubi12_cov m_mubi12_cov;
   mubi16_cov m_mubi16_cov;
+  mubi20_cov m_mubi20_cov;
+  mubi24_cov m_mubi24_cov;
+  mubi28_cov m_mubi28_cov;
+  mubi32_cov m_mubi32_cov;
 
   `uvm_object_utils(dv_base_mubi_cov)
   `uvm_object_new
@@ -70,6 +85,10 @@ class dv_base_mubi_cov extends uvm_object;
       8:  m_mubi8_cov  = mubi8_cov::type_id::create(cov_name);
       12: m_mubi12_cov = mubi12_cov::type_id::create(cov_name);
       16: m_mubi16_cov = mubi16_cov::type_id::create(cov_name);
+      20: m_mubi20_cov = mubi20_cov::type_id::create(cov_name);
+      24: m_mubi24_cov = mubi24_cov::type_id::create(cov_name);
+      28: m_mubi28_cov = mubi28_cov::type_id::create(cov_name);
+      32: m_mubi32_cov = mubi32_cov::type_id::create(cov_name);
       default: `uvm_fatal(`gfn, $sformatf("Unsupported mubi width (%0d) is used", mubi_width))
     endcase
   endfunction : create_cov
@@ -80,9 +99,11 @@ class dv_base_mubi_cov extends uvm_object;
       8:  m_mubi8_cov.sample(value);
       12: m_mubi12_cov.sample(value);
       16: m_mubi16_cov.sample(value);
+      20: m_mubi20_cov.sample(value);
+      24: m_mubi24_cov.sample(value);
+      28: m_mubi28_cov.sample(value);
+      32: m_mubi32_cov.sample(value);
       default: `uvm_fatal(`gfn, $sformatf("Unsupported mubi width (%0d) is used", mubi_width))
     endcase
   endfunction : sample
 endclass : dv_base_mubi_cov
-
-
diff --git a/vendor/lowrisc_ip/dv/sv/dv_base_reg/dv_base_reg.core b/vendor/lowrisc_ip/dv/sv/dv_base_reg/dv_base_reg.core
index d961118ca6..cbae5d75c5 100644
--- a/vendor/lowrisc_ip/dv/sv/dv_base_reg/dv_base_reg.core
+++ b/vendor/lowrisc_ip/dv/sv/dv_base_reg/dv_base_reg.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:dv:dv_base_reg"
diff --git a/vendor/lowrisc_ip/dv/sv/dv_base_reg/dv_base_reg.sv b/vendor/lowrisc_ip/dv/sv/dv_base_reg/dv_base_reg.sv
index 9db80908bb..f25f6abd1b 100644
--- a/vendor/lowrisc_ip/dv/sv/dv_base_reg/dv_base_reg.sv
+++ b/vendor/lowrisc_ip/dv/sv/dv_base_reg/dv_base_reg.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
@@ -102,6 +102,15 @@ class dv_base_reg extends uvm_reg;
     end
   endfunction
 
+  // Return a mask of read-only bits in the register.
+  virtual function uvm_reg_data_t get_ro_mask();
+    dv_base_reg_field flds[$];
+    this.get_dv_base_reg_fields(flds);
+    foreach (flds[i]) begin
+      get_ro_mask |= flds[i].get_ro_mask();
+    end
+  endfunction
+
   // this function can only be called when this reg is intr_state reg
   // Example: ral.intr_state.get_intr_pins_exp_value(). And it returns value of
   // intr_state & intr_enable, which represents value of interrupt pins
diff --git a/vendor/lowrisc_ip/dv/sv/dv_base_reg/dv_base_reg_block.sv b/vendor/lowrisc_ip/dv/sv/dv_base_reg/dv_base_reg_block.sv
index 84d7dc1327..74c3f733fc 100644
--- a/vendor/lowrisc_ip/dv/sv/dv_base_reg/dv_base_reg_block.sv
+++ b/vendor/lowrisc_ip/dv/sv/dv_base_reg/dv_base_reg_block.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/dv/sv/dv_base_reg/dv_base_reg_field.sv b/vendor/lowrisc_ip/dv/sv/dv_base_reg/dv_base_reg_field.sv
index 1862f17704..f20f832e03 100644
--- a/vendor/lowrisc_ip/dv/sv/dv_base_reg/dv_base_reg_field.sv
+++ b/vendor/lowrisc_ip/dv/sv/dv_base_reg/dv_base_reg_field.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
@@ -143,7 +143,7 @@ class dv_base_reg_field extends uvm_reg_field;
       uvm_reg_field intr_state_fld = get_intr_state_field();
       uvm_reg_data_t predict_val;
       if (intr_state_fld.get_access == "RO") begin // status interrupt
-        predict_val = field_val;
+        predict_val = field_val | intr_state_fld.get_reset();
       end else begin // regular W1C interrupt
         `DV_CHECK_STREQ(intr_state_fld.get_access, "W1C")
         predict_val = field_val | `gmv(intr_state_fld);
@@ -188,11 +188,19 @@ class dv_base_reg_field extends uvm_reg_field;
     return m_original_access;
   endfunction
 
+  // Return a mask of valid bits in the field.
   virtual function uvm_reg_data_t get_field_mask();
     get_field_mask = (1'b1 << this.get_n_bits()) - 1;
     get_field_mask = get_field_mask << this.get_lsb_pos();
   endfunction
 
+  // Return a mask of read-only bits in the field.
+  virtual function uvm_reg_data_t get_ro_mask();
+    bit is_ro = (this.get_access() == "RO");
+    get_ro_mask = (is_ro << this.get_n_bits()) - is_ro;
+    get_ro_mask = get_ro_mask << this.get_lsb_pos();
+  endfunction
+
   virtual function void set_original_access(string access);
     if (m_original_access == "") begin
       m_original_access = access;
diff --git a/vendor/lowrisc_ip/dv/sv/dv_base_reg/dv_base_reg_map.sv b/vendor/lowrisc_ip/dv/sv/dv_base_reg/dv_base_reg_map.sv
index cce6d6eccb..ee748f51b4 100644
--- a/vendor/lowrisc_ip/dv/sv/dv_base_reg/dv_base_reg_map.sv
+++ b/vendor/lowrisc_ip/dv/sv/dv_base_reg/dv_base_reg_map.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/dv/sv/dv_base_reg/dv_base_reg_pkg.sv b/vendor/lowrisc_ip/dv/sv/dv_base_reg/dv_base_reg_pkg.sv
index 827d5ac45a..95fe70dd0e 100644
--- a/vendor/lowrisc_ip/dv/sv/dv_base_reg/dv_base_reg_pkg.sv
+++ b/vendor/lowrisc_ip/dv/sv/dv_base_reg/dv_base_reg_pkg.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/sv/dv_base_reg/dv_base_shadowed_field_cov.sv b/vendor/lowrisc_ip/dv/sv/dv_base_reg/dv_base_shadowed_field_cov.sv
index e1dc3c67e6..bae4a6a1fa 100644
--- a/vendor/lowrisc_ip/dv/sv/dv_base_reg/dv_base_shadowed_field_cov.sv
+++ b/vendor/lowrisc_ip/dv/sv/dv_base_reg/dv_base_shadowed_field_cov.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_agent.sv b/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_agent.sv
index a909aa1fa0..0d561de5bf 100644
--- a/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_agent.sv
+++ b/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_agent.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
@@ -65,4 +65,3 @@ class dv_base_agent #(type CFG_T            = dv_base_agent_cfg,
   endfunction
 
 endclass
-
diff --git a/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_agent_cfg.sv b/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_agent_cfg.sv
index 338fadf70a..0caf0f7860 100644
--- a/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_agent_cfg.sv
+++ b/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_agent_cfg.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_agent_cov.sv b/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_agent_cov.sv
index 545f67646f..03b9e268b8 100644
--- a/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_agent_cov.sv
+++ b/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_agent_cov.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_driver.sv b/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_driver.sv
index 43810076da..264f5e9364 100644
--- a/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_driver.sv
+++ b/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_driver.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
@@ -34,4 +34,3 @@ class dv_base_driver #(type ITEM_T     = uvm_sequence_item,
   endtask
 
 endclass
-
diff --git a/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_env.sv b/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_env.sv
index 2c5e865c45..2ce662fa87 100644
--- a/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_env.sv
+++ b/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_env.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_env_cfg.sv b/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_env_cfg.sv
index 221be2536d..106d812f7c 100644
--- a/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_env_cfg.sv
+++ b/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_env_cfg.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_env_cov.sv b/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_env_cov.sv
index 48bf92ad0c..47064386ea 100644
--- a/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_env_cov.sv
+++ b/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_env_cov.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_monitor.sv b/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_monitor.sv
index 472081425a..b535934a26 100644
--- a/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_monitor.sv
+++ b/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_monitor.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
@@ -38,12 +38,12 @@ class dv_base_monitor #(type ITEM_T = uvm_sequence_item,
 
   virtual task run_phase(uvm_phase phase);
     fork
-      collect_trans(phase);
+      collect_trans();
     join
   endtask
 
   // collect transactions forever
-  virtual protected task collect_trans(uvm_phase phase);
+  virtual protected task collect_trans();
     `uvm_fatal(`gfn, "this method is not supposed to be called directly!")
   endtask
 
diff --git a/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_scoreboard.sv b/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_scoreboard.sv
index facd89db81..c8b4acc67d 100644
--- a/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_scoreboard.sv
+++ b/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_scoreboard.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
@@ -78,4 +78,3 @@ class dv_base_scoreboard #(type RAL_T = dv_base_reg_block,
   endfunction : pre_abort
 
 endclass
-
diff --git a/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_seq.sv b/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_seq.sv
index 8c6aca9726..616b47f34a 100644
--- a/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_seq.sv
+++ b/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_seq.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_sequencer.sv b/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_sequencer.sv
index 501929a2b8..33d4310948 100644
--- a/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_sequencer.sv
+++ b/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_sequencer.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_test.sv b/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_test.sv
index 8227de6952..d4c564a272 100644
--- a/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_test.sv
+++ b/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_test.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_virtual_sequencer.sv b/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_virtual_sequencer.sv
index 3fe7428105..1b39b874eb 100644
--- a/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_virtual_sequencer.sv
+++ b/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_virtual_sequencer.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_vseq.sv b/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_vseq.sv
index 081863ea3a..d196fe462b 100644
--- a/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_vseq.sv
+++ b/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_vseq.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/sv/dv_lib/dv_lib.core b/vendor/lowrisc_ip/dv/sv/dv_lib/dv_lib.core
index 306152897b..a7b7277291 100644
--- a/vendor/lowrisc_ip/dv/sv/dv_lib/dv_lib.core
+++ b/vendor/lowrisc_ip/dv/sv/dv_lib/dv_lib.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:dv:dv_lib"
diff --git a/vendor/lowrisc_ip/dv/sv/dv_lib/dv_lib_pkg.sv b/vendor/lowrisc_ip/dv/sv/dv_lib/dv_lib_pkg.sv
index a53733ebd8..d7eafc0d15 100644
--- a/vendor/lowrisc_ip/dv/sv/dv_lib/dv_lib_pkg.sv
+++ b/vendor/lowrisc_ip/dv/sv/dv_lib/dv_lib_pkg.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/sv/dv_utils/dv_fcov_macros.core b/vendor/lowrisc_ip/dv/sv/dv_utils/dv_fcov_macros.core
index 02c033560e..45428865bf 100644
--- a/vendor/lowrisc_ip/dv/sv/dv_utils/dv_fcov_macros.core
+++ b/vendor/lowrisc_ip/dv/sv/dv_utils/dv_fcov_macros.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:dv:dv_fcov_macros"
diff --git a/vendor/lowrisc_ip/dv/sv/dv_utils/dv_fcov_macros.svh b/vendor/lowrisc_ip/dv/sv/dv_utils/dv_fcov_macros.svh
index 8ca12cdc8f..6b5111eb77 100644
--- a/vendor/lowrisc_ip/dv/sv/dv_utils/dv_fcov_macros.svh
+++ b/vendor/lowrisc_ip/dv/sv/dv_utils/dv_fcov_macros.svh
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/sv/dv_utils/dv_macros.core b/vendor/lowrisc_ip/dv/sv/dv_utils/dv_macros.core
index 5f2fb800bd..61a236b55d 100644
--- a/vendor/lowrisc_ip/dv/sv/dv_utils/dv_macros.core
+++ b/vendor/lowrisc_ip/dv/sv/dv_utils/dv_macros.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:dv:dv_macros"
diff --git a/vendor/lowrisc_ip/dv/sv/dv_utils/dv_macros.svh b/vendor/lowrisc_ip/dv/sv/dv_utils/dv_macros.svh
index 2fd9e31d14..f922b1a926 100644
--- a/vendor/lowrisc_ip/dv/sv/dv_utils/dv_macros.svh
+++ b/vendor/lowrisc_ip/dv/sv/dv_utils/dv_macros.svh
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/sv/dv_utils/dv_report_catcher.sv b/vendor/lowrisc_ip/dv/sv/dv_utils/dv_report_catcher.sv
index 91e3337e69..7ab687a72e 100644
--- a/vendor/lowrisc_ip/dv/sv/dv_utils/dv_report_catcher.sv
+++ b/vendor/lowrisc_ip/dv/sv/dv_utils/dv_report_catcher.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 // Report catcher/demoter
diff --git a/vendor/lowrisc_ip/dv/sv/dv_utils/dv_report_server.sv b/vendor/lowrisc_ip/dv/sv/dv_utils/dv_report_server.sv
index a5d7440eb9..f48f62e197 100644
--- a/vendor/lowrisc_ip/dv/sv/dv_utils/dv_report_server.sv
+++ b/vendor/lowrisc_ip/dv/sv/dv_utils/dv_report_server.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/sv/dv_utils/dv_test_status.core b/vendor/lowrisc_ip/dv/sv/dv_utils/dv_test_status.core
index e11cfd4b72..fdeea3eb35 100644
--- a/vendor/lowrisc_ip/dv/sv/dv_utils/dv_test_status.core
+++ b/vendor/lowrisc_ip/dv/sv/dv_utils/dv_test_status.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:dv:dv_test_status"
diff --git a/vendor/lowrisc_ip/dv/sv/dv_utils/dv_test_status_pkg.sv b/vendor/lowrisc_ip/dv/sv/dv_utils/dv_test_status_pkg.sv
index 3933673ee5..d1516a2b5f 100644
--- a/vendor/lowrisc_ip/dv/sv/dv_utils/dv_test_status_pkg.sv
+++ b/vendor/lowrisc_ip/dv/sv/dv_utils/dv_test_status_pkg.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/sv/dv_utils/dv_utils.core b/vendor/lowrisc_ip/dv/sv/dv_utils/dv_utils.core
index 95ffd58d0b..f8e0a4ef30 100644
--- a/vendor/lowrisc_ip/dv/sv/dv_utils/dv_utils.core
+++ b/vendor/lowrisc_ip/dv/sv/dv_utils/dv_utils.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:dv:dv_utils"
diff --git a/vendor/lowrisc_ip/dv/sv/dv_utils/dv_utils_pkg.sv b/vendor/lowrisc_ip/dv/sv/dv_utils/dv_utils_pkg.sv
index 778c2d1f6b..00a6cd7375 100644
--- a/vendor/lowrisc_ip/dv/sv/dv_utils/dv_utils_pkg.sv
+++ b/vendor/lowrisc_ip/dv/sv/dv_utils/dv_utils_pkg.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/sv/dv_utils/dv_vif_wrap.sv b/vendor/lowrisc_ip/dv/sv/dv_utils/dv_vif_wrap.sv
index 61d99479e7..528eb97887 100644
--- a/vendor/lowrisc_ip/dv/sv/dv_utils/dv_vif_wrap.sv
+++ b/vendor/lowrisc_ip/dv/sv/dv_utils/dv_vif_wrap.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/sv/mem_bkdr_util/mem_bkdr_util.core b/vendor/lowrisc_ip/dv/sv/mem_bkdr_util/mem_bkdr_util.core
index 0ab9509ab1..63e06e97d6 100644
--- a/vendor/lowrisc_ip/dv/sv/mem_bkdr_util/mem_bkdr_util.core
+++ b/vendor/lowrisc_ip/dv/sv/mem_bkdr_util/mem_bkdr_util.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:dv:mem_bkdr_util"
@@ -15,7 +15,7 @@ filesets:
       - lowrisc:prim:cipher_pkg:0.1
       - lowrisc:prim:secded:0.1
       - lowrisc:ip:otp_ctrl_pkg:1.0
-      - lowrisc:ip:flash_ctrl_pkg
+      - lowrisc:ip_interfaces:flash_ctrl_pkg
       - lowrisc:dv:digestpp_dpi
       - lowrisc:ip:kmac_pkg
     files:
diff --git a/vendor/lowrisc_ip/dv/sv/mem_bkdr_util/mem_bkdr_util.sv b/vendor/lowrisc_ip/dv/sv/mem_bkdr_util/mem_bkdr_util.sv
index 69b2d47521..c3354bb743 100644
--- a/vendor/lowrisc_ip/dv/sv/mem_bkdr_util/mem_bkdr_util.sv
+++ b/vendor/lowrisc_ip/dv/sv/mem_bkdr_util/mem_bkdr_util.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/sv/mem_bkdr_util/mem_bkdr_util__flash.sv b/vendor/lowrisc_ip/dv/sv/mem_bkdr_util/mem_bkdr_util__flash.sv
index 66bf585a79..56a961482d 100644
--- a/vendor/lowrisc_ip/dv/sv/mem_bkdr_util/mem_bkdr_util__flash.sv
+++ b/vendor/lowrisc_ip/dv/sv/mem_bkdr_util/mem_bkdr_util__flash.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/sv/mem_bkdr_util/mem_bkdr_util__otp.sv b/vendor/lowrisc_ip/dv/sv/mem_bkdr_util/mem_bkdr_util__otp.sv
index d1202dccc6..3ce18e438e 100644
--- a/vendor/lowrisc_ip/dv/sv/mem_bkdr_util/mem_bkdr_util__otp.sv
+++ b/vendor/lowrisc_ip/dv/sv/mem_bkdr_util/mem_bkdr_util__otp.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
@@ -136,7 +136,7 @@ virtual function void otp_write_hw_cfg0_partition(
     write32(i + ManufStateOffset, manuf_state[i*8+:32]);
   end
 
-  hw_cfg0_data = {<<32 {32'h0, manuf_state, device_id}};
+  hw_cfg0_data = {<<32 {manuf_state, device_id}};
   digest = cal_digest(HwCfg0Idx, hw_cfg0_data);
 
   write64(HwCfg0DigestOffset, digest);
@@ -144,14 +144,15 @@ endfunction
 
 virtual function void otp_write_hw_cfg1_partition(
     bit [EnCsrngSwAppReadSize*8-1:0] en_csrng_sw_app_read,
-    bit [EnSramIfetchSize*8-1:0] en_sram_ifetch);
+    bit [EnSramIfetchSize*8-1:0] en_sram_ifetch,
+    bit [EnSramIfetchSize*8-1:0] dis_rv_dm_late_debug);
   bit [HwCfg1DigestSize*8-1:0] digest;
 
   bit [bus_params_pkg::BUS_DW-1:0] hw_cfg1_data[$];
 
-  write32(EnSramIfetchOffset, {en_csrng_sw_app_read, en_sram_ifetch});
+  write32(EnSramIfetchOffset, {dis_rv_dm_late_debug, en_csrng_sw_app_read, en_sram_ifetch});
 
-  hw_cfg1_data = {<<32 {32'h0, en_csrng_sw_app_read, en_sram_ifetch}};
+  hw_cfg1_data = {<<32 {32'h0, dis_rv_dm_late_debug, en_csrng_sw_app_read, en_sram_ifetch}};
   digest = cal_digest(HwCfg1Idx, hw_cfg1_data);
 
   write64(HwCfg1DigestOffset, digest);
diff --git a/vendor/lowrisc_ip/dv/sv/mem_bkdr_util/mem_bkdr_util__rom.sv b/vendor/lowrisc_ip/dv/sv/mem_bkdr_util/mem_bkdr_util__rom.sv
index e96c15bc41..b2904435fd 100644
--- a/vendor/lowrisc_ip/dv/sv/mem_bkdr_util/mem_bkdr_util__rom.sv
+++ b/vendor/lowrisc_ip/dv/sv/mem_bkdr_util/mem_bkdr_util__rom.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/sv/mem_bkdr_util/mem_bkdr_util__sram.sv b/vendor/lowrisc_ip/dv/sv/mem_bkdr_util/mem_bkdr_util__sram.sv
index f5edc53768..9fe8a69ce4 100644
--- a/vendor/lowrisc_ip/dv/sv/mem_bkdr_util/mem_bkdr_util__sram.sv
+++ b/vendor/lowrisc_ip/dv/sv/mem_bkdr_util/mem_bkdr_util__sram.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
@@ -9,7 +9,7 @@
 function logic [bus_params_pkg::BUS_AW-1:0] get_sram_encrypt_addr (
   logic [bus_params_pkg::BUS_AW-1:0] addr,
   logic [SRAM_BLOCK_WIDTH-1:0] nonce,
-  logic [31:0] extra_addr_bits = '0);
+  logic [31:0] extra_addr_bits);
 
   int full_addr_width = addr_width + extra_addr_bits;
 
@@ -43,8 +43,8 @@ function logic [38:0] get_sram_encrypt32_intg_data (
   logic [31:0]                       data,
   logic [SRAM_KEY_WIDTH-1:0]         key,
   logic [SRAM_BLOCK_WIDTH-1:0]       nonce,
-  bit   [38:0]                       flip_bits = '0,
-  int                                extra_addr_bits=0);
+  int                                extra_addr_bits,
+  bit   [38:0]                       flip_bits = '0);
 
   logic [38:0]                       integ_data;
   logic [38:0]                       scrambled_data;
@@ -77,9 +77,10 @@ endfunction : get_sram_encrypt32_intg_data
 // It simply ignores the integrity bits.
 virtual function logic [38:0] sram_encrypt_read32_integ(logic [bus_params_pkg::BUS_AW-1:0] addr,
                                                         logic [SRAM_KEY_WIDTH-1:0]         key,
-                                                        logic [SRAM_BLOCK_WIDTH-1:0]       nonce);
-  logic [bus_params_pkg::BUS_AW-1:0] scr_addr = get_sram_encrypt_addr(addr, nonce);
-  logic [38:0] rdata39 = _sram_decrypt_read39(addr, scr_addr, key, nonce);
+                                                        logic [SRAM_BLOCK_WIDTH-1:0]       nonce,
+                                                        int extra_addr_bits);
+  logic [bus_params_pkg::BUS_AW-1:0] scr_addr = get_sram_encrypt_addr(addr, nonce, extra_addr_bits);
+  logic [38:0] rdata39 = _sram_decrypt_read39(addr, scr_addr, key, nonce, extra_addr_bits);
   return rdata39[31:0];
 endfunction : sram_encrypt_read32_integ
 
@@ -89,17 +90,19 @@ local function logic [38:0] _sram_decrypt_read39(
     logic [bus_params_pkg::BUS_AW-1:0] addr,
     logic [bus_params_pkg::BUS_AW-1:0] scr_addr,
     logic [SRAM_KEY_WIDTH-1:0]   key,
-    logic [SRAM_BLOCK_WIDTH-1:0] nonce);
+    logic [SRAM_BLOCK_WIDTH-1:0] nonce,
+    int extra_addr_bits);
   logic [38:0]                       rdata39 = '0;
 
   logic rdata_arr     [] = new[39];
   logic addr_arr      [] = new[addr_width];
   logic key_arr       [] = new[SRAM_KEY_WIDTH];
   logic nonce_arr     [] = new[SRAM_BLOCK_WIDTH];
+  int   full_addr_width = addr_width + extra_addr_bits;
 
   key_arr   = {<<{key}};
   nonce_arr = {<<{nonce}};
-  for (int i = 0; i < addr_width; i++) begin
+  for (int i = 0; i < full_addr_width; i++) begin
     addr_arr[i] = addr[addr_lsb + i];
   end
 
@@ -107,7 +110,7 @@ local function logic [38:0] _sram_decrypt_read39(
   `uvm_info(`gfn, $sformatf("scr data: 0x%0x", rdata39), UVM_HIGH)
   rdata_arr = {<<{rdata39}};
   rdata_arr = sram_scrambler_pkg::decrypt_sram_data(
-      rdata_arr, 39, 39, addr_arr, addr_width, key_arr, nonce_arr
+      rdata_arr, 39, 39, addr_arr, full_addr_width, key_arr, nonce_arr
   );
   rdata39 = {<<{rdata_arr}};
   return rdata39;
@@ -119,11 +122,13 @@ virtual function void sram_encrypt_write32_integ(logic [bus_params_pkg::BUS_AW-1
                                                  logic [31:0]                       data,
                                                  logic [SRAM_KEY_WIDTH-1:0]         key,
                                                  logic [SRAM_BLOCK_WIDTH-1:0]       nonce,
+                                                 int                                extra_addr_bits,
                                                  bit   [38:0]                       flip_bits = 0);
-  logic [bus_params_pkg::BUS_AW-1:0] scr_addr = get_sram_encrypt_addr(addr, nonce);
-  _sram_encrypt_write39(addr, scr_addr, data, key, nonce, flip_bits);
+  logic [bus_params_pkg::BUS_AW-1:0] scr_addr = get_sram_encrypt_addr(addr, nonce, extra_addr_bits);
+  _sram_encrypt_write39(addr, scr_addr, data, key, nonce, extra_addr_bits, flip_bits);
 endfunction : sram_encrypt_write32_integ
 
+
 // This encrypts, possibly flips some bits to inject errors, and writes the resulting data
 // to a scrambled address.
 local function void _sram_encrypt_write39(logic [bus_params_pkg::BUS_AW-1:0] addr,
@@ -131,8 +136,9 @@ local function void _sram_encrypt_write39(logic [bus_params_pkg::BUS_AW-1:0] add
                                           logic [31:0]                 data,
                                           logic [SRAM_KEY_WIDTH-1:0]   key,
                                           logic [SRAM_BLOCK_WIDTH-1:0] nonce,
+                                          int                          extra_addr_bits,
                                           bit [38:0]                   flip_bits);
-  logic [38:0] scrambled_data = get_sram_encrypt32_intg_data(addr, data, key, nonce, flip_bits);
+  logic [38:0] scrambled_data = get_sram_encrypt32_intg_data(addr, data, key, nonce, extra_addr_bits, flip_bits);
   write39integ(scr_addr, scrambled_data);
 endfunction : _sram_encrypt_write39
 
@@ -145,7 +151,8 @@ endfunction : _sram_encrypt_write39
 virtual function void sram_inject_integ_error(logic [bus_params_pkg::BUS_AW-1:0] addr,
                                               logic [bus_params_pkg::BUS_AW-1:0] scr_addr,
                                               logic [SRAM_KEY_WIDTH-1:0]   key,
-                                              logic [SRAM_BLOCK_WIDTH-1:0] nonce);
+                                              logic [SRAM_BLOCK_WIDTH-1:0] nonce,
+                                              int extra_addr_bits);
   int max_attempts = 40;
   int attempt = 0;
 
@@ -154,8 +161,8 @@ virtual function void sram_inject_integ_error(logic [bus_params_pkg::BUS_AW-1:0]
     bit [38:0] rdata_integ;
     prim_secded_pkg::secded_inv_39_32_t dec;
     // The specific bits to be flipped should be irrelevant.
-    _sram_encrypt_write39(addr, scr_addr, data, key, nonce, 39'h1001);
-    rdata_integ = _sram_decrypt_read39(addr, scr_addr, key, nonce);
+    _sram_encrypt_write39(addr, scr_addr, data, key, nonce, extra_addr_bits, 39'h1001);
+    rdata_integ = _sram_decrypt_read39(addr, scr_addr, key, nonce, extra_addr_bits);
     dec = prim_secded_pkg::prim_secded_inv_39_32_dec(rdata_integ);
     if (dec.err) begin
       `uvm_info(`gfn, $sformatf(
diff --git a/vendor/lowrisc_ip/dv/sv/mem_bkdr_util/mem_bkdr_util_pkg.sv b/vendor/lowrisc_ip/dv/sv/mem_bkdr_util/mem_bkdr_util_pkg.sv
index 68e205f0f8..b9bc489062 100644
--- a/vendor/lowrisc_ip/dv/sv/mem_bkdr_util/mem_bkdr_util_pkg.sv
+++ b/vendor/lowrisc_ip/dv/sv/mem_bkdr_util/mem_bkdr_util_pkg.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/sv/mem_bkdr_util/otp_scrambler_pkg.sv b/vendor/lowrisc_ip/dv/sv/mem_bkdr_util/otp_scrambler_pkg.sv
index 4ea062ec73..74a8cf6ced 100644
--- a/vendor/lowrisc_ip/dv/sv/mem_bkdr_util/otp_scrambler_pkg.sv
+++ b/vendor/lowrisc_ip/dv/sv/mem_bkdr_util/otp_scrambler_pkg.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/sv/mem_bkdr_util/sram_scrambler_pkg.sv b/vendor/lowrisc_ip/dv/sv/mem_bkdr_util/sram_scrambler_pkg.sv
index 69d3c94668..b86dd4368c 100644
--- a/vendor/lowrisc_ip/dv/sv/mem_bkdr_util/sram_scrambler_pkg.sv
+++ b/vendor/lowrisc_ip/dv/sv/mem_bkdr_util/sram_scrambler_pkg.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
@@ -40,7 +40,8 @@ package sram_scrambler_pkg;
   // Fixed data block size - PRINCE cipher operates on 64-bit data blocks.
   parameter int SRAM_BLOCK_WIDTH = 64;
 
-  parameter int NUM_ROUNDS = 2;
+  parameter int NUM_PRINCE_ROUNDS_HALF = 3;
+  parameter int NUM_SP_ROUNDS = 2;
 
   // Create a generic typedef for dynamic array of logic to be able to return these values.
   typedef logic state_t[];
@@ -97,10 +98,10 @@ package sram_scrambler_pkg;
     return state_out;
   endfunction : perm_layer
 
-  // Performs NUM_ROUNDS full encryption rounds
+  // Performs NUM_SP_ROUNDS full encryption rounds
   function automatic state_t sp_encrypt(state_t data, int width, state_t key);
     logic state[] = new[width](data);
-    for (int i = 0; i < NUM_ROUNDS; i++) begin
+    for (int i = 0; i < NUM_SP_ROUNDS; i++) begin
       // xor the data and key
       for (int j = 0; j < width; j++) begin
         state[j] = state[j] ^ key[j];
@@ -119,10 +120,10 @@ package sram_scrambler_pkg;
     return state;
   endfunction : sp_encrypt
 
-  // Performs NUM_ROUNDS full decryption rounds
+  // Performs NUM_SP_ROUNDS full decryption rounds
   function automatic state_t sp_decrypt(state_t data, int width, state_t key);
     logic state[] = new[width](data);
-    for (int i = 0; i < NUM_ROUNDS; i++) begin
+    for (int i = 0; i < NUM_SP_ROUNDS; i++) begin
       // xor data and key
       for (int j = 0; j < width; j++) begin
         state[j] = state[j] ^ key[j];
@@ -147,7 +148,7 @@ package sram_scrambler_pkg;
   // Should not be called directly.
   function automatic state_t gen_keystream(logic addr[], int addr_width,
                                            logic key[], logic nonce[]);
-    logic [NUM_ROUNDS-1:0][SRAM_BLOCK_WIDTH-1:0] prince_result_arr;
+    logic [NUM_PRINCE_ROUNDS_HALF-1:0][SRAM_BLOCK_WIDTH-1:0] prince_result_arr;
 
     logic [SRAM_BLOCK_WIDTH-1:0]  prince_plaintext;
     logic [SRAM_KEY_WIDTH-1:0]    prince_key;
@@ -182,7 +183,7 @@ package sram_scrambler_pkg;
                                                  .key(prince_key),
                                                  .old_key_schedule(0),
                                                  .ciphertext(prince_result_arr));
-    prince_result = prince_result_arr[NUM_ROUNDS-1];
+    prince_result = prince_result_arr[NUM_PRINCE_ROUNDS_HALF-1];
 
     key_out = {<< {prince_result}};
 
@@ -234,7 +235,7 @@ package sram_scrambler_pkg;
 
   endfunction : decrypt_sram_addr
 
-  // SRAM data encryption is more involved, we need to run 2 rounds of PRINCE on the nonce and key
+  // SRAM data encryption is more involved, we need to run 3 rounds of PRINCE on the nonce and key
   // and then XOR the result with the data.
   //
   // Optionally, the XORed data can be passed through the S&P network.
diff --git a/vendor/lowrisc_ip/dv/sv/mem_model/mem_model.core b/vendor/lowrisc_ip/dv/sv/mem_model/mem_model.core
index 5eadedce7a..a7abbf3a91 100644
--- a/vendor/lowrisc_ip/dv/sv/mem_model/mem_model.core
+++ b/vendor/lowrisc_ip/dv/sv/mem_model/mem_model.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:dv:mem_model"
diff --git a/vendor/lowrisc_ip/dv/sv/mem_model/mem_model.sv b/vendor/lowrisc_ip/dv/sv/mem_model/mem_model.sv
index d89f163631..f4579b866a 100644
--- a/vendor/lowrisc_ip/dv/sv/mem_model/mem_model.sv
+++ b/vendor/lowrisc_ip/dv/sv/mem_model/mem_model.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/sv/mem_model/mem_model_pkg.sv b/vendor/lowrisc_ip/dv/sv/mem_model/mem_model_pkg.sv
index 5e3653c954..975e3bd490 100644
--- a/vendor/lowrisc_ip/dv/sv/mem_model/mem_model_pkg.sv
+++ b/vendor/lowrisc_ip/dv/sv/mem_model/mem_model_pkg.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/sv/push_pull_agent/push_pull_agent.core b/vendor/lowrisc_ip/dv/sv/push_pull_agent/push_pull_agent.core
index 9ba58d6376..85a59bbb17 100644
--- a/vendor/lowrisc_ip/dv/sv/push_pull_agent/push_pull_agent.core
+++ b/vendor/lowrisc_ip/dv/sv/push_pull_agent/push_pull_agent.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:dv:push_pull_agent:0.1"
diff --git a/vendor/lowrisc_ip/dv/sv/push_pull_agent/push_pull_agent.sv b/vendor/lowrisc_ip/dv/sv/push_pull_agent/push_pull_agent.sv
index e9c9910d4a..ecb01035f9 100644
--- a/vendor/lowrisc_ip/dv/sv/push_pull_agent/push_pull_agent.sv
+++ b/vendor/lowrisc_ip/dv/sv/push_pull_agent/push_pull_agent.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/sv/push_pull_agent/push_pull_agent_cfg.sv b/vendor/lowrisc_ip/dv/sv/push_pull_agent/push_pull_agent_cfg.sv
index f9d24e6fb3..75eee996b5 100644
--- a/vendor/lowrisc_ip/dv/sv/push_pull_agent/push_pull_agent_cfg.sv
+++ b/vendor/lowrisc_ip/dv/sv/push_pull_agent/push_pull_agent_cfg.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
@@ -142,12 +142,14 @@ class push_pull_agent_cfg #(parameter int HostDataWidth = 32,
   // Setter method for the user data queues - must be called externally to place specific user-data
   // to be sent by the driver.
   function void add_h_user_data(bit [HostDataWidth-1:0] data);
+    `uvm_info(`gfn, $sformatf("Added h user data %p", data), UVM_HIGH)
     h_user_data_q.push_back(data);
   endfunction
 
   // Setter method for the user data queues - must be called externally to place specific user-data
   // to be sent by the driver.
   function void add_d_user_data(bit [DeviceDataWidth-1:0] data);
+    `uvm_info(`gfn, $sformatf("Added d user data %p", data), UVM_HIGH)
     d_user_data_q.push_back(data);
   endfunction
 
diff --git a/vendor/lowrisc_ip/dv/sv/push_pull_agent/push_pull_agent_cov.sv b/vendor/lowrisc_ip/dv/sv/push_pull_agent/push_pull_agent_cov.sv
index 9f9ddead2c..eddeff027e 100644
--- a/vendor/lowrisc_ip/dv/sv/push_pull_agent/push_pull_agent_cov.sv
+++ b/vendor/lowrisc_ip/dv/sv/push_pull_agent/push_pull_agent_cov.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/sv/push_pull_agent/push_pull_agent_pkg.sv b/vendor/lowrisc_ip/dv/sv/push_pull_agent/push_pull_agent_pkg.sv
index 41b5fc8bca..0b2e6cccae 100644
--- a/vendor/lowrisc_ip/dv/sv/push_pull_agent/push_pull_agent_pkg.sv
+++ b/vendor/lowrisc_ip/dv/sv/push_pull_agent/push_pull_agent_pkg.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/sv/push_pull_agent/push_pull_driver_lib.sv b/vendor/lowrisc_ip/dv/sv/push_pull_agent/push_pull_driver_lib.sv
index 92dca5306f..6d1e3e6a50 100644
--- a/vendor/lowrisc_ip/dv/sv/push_pull_agent/push_pull_driver_lib.sv
+++ b/vendor/lowrisc_ip/dv/sv/push_pull_agent/push_pull_driver_lib.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/sv/push_pull_agent/push_pull_if.sv b/vendor/lowrisc_ip/dv/sv/push_pull_agent/push_pull_if.sv
index 49c8c49a59..ee28a0218f 100644
--- a/vendor/lowrisc_ip/dv/sv/push_pull_agent/push_pull_if.sv
+++ b/vendor/lowrisc_ip/dv/sv/push_pull_agent/push_pull_if.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/sv/push_pull_agent/push_pull_item.sv b/vendor/lowrisc_ip/dv/sv/push_pull_agent/push_pull_item.sv
index 7a80659861..07c1386837 100644
--- a/vendor/lowrisc_ip/dv/sv/push_pull_agent/push_pull_item.sv
+++ b/vendor/lowrisc_ip/dv/sv/push_pull_agent/push_pull_item.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/sv/push_pull_agent/push_pull_monitor.sv b/vendor/lowrisc_ip/dv/sv/push_pull_agent/push_pull_monitor.sv
index 240831be96..2f8cd057bf 100644
--- a/vendor/lowrisc_ip/dv/sv/push_pull_agent/push_pull_monitor.sv
+++ b/vendor/lowrisc_ip/dv/sv/push_pull_agent/push_pull_monitor.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
@@ -21,9 +21,10 @@ class push_pull_monitor #(parameter int HostDataWidth = 32,
 
   task run_phase(uvm_phase phase);
     @(posedge cfg.vif.rst_n);
+    cfg.in_reset = 0;
     fork
       monitor_reset();
-      collect_trans(phase);
+      collect_trans();
       // Collect partial pull reqs for the reactive pull device agent.
       collect_pull_req();
       collect_cov();
@@ -49,7 +50,7 @@ class push_pull_monitor #(parameter int HostDataWidth = 32,
   // Collect fully-completed transactions.
   //
   // TODO : sample covergroups
-  virtual protected task collect_trans(uvm_phase phase);
+  virtual protected task collect_trans();
     if (cfg.agent_type == PushAgent) begin
       forever begin
         @(cfg.vif.mon_cb);
diff --git a/vendor/lowrisc_ip/dv/sv/push_pull_agent/push_pull_sequencer.sv b/vendor/lowrisc_ip/dv/sv/push_pull_agent/push_pull_sequencer.sv
index 06c64595e9..510f60a42a 100644
--- a/vendor/lowrisc_ip/dv/sv/push_pull_agent/push_pull_sequencer.sv
+++ b/vendor/lowrisc_ip/dv/sv/push_pull_agent/push_pull_sequencer.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/sv/push_pull_agent/seq_lib/push_pull_base_seq.sv b/vendor/lowrisc_ip/dv/sv/push_pull_agent/seq_lib/push_pull_base_seq.sv
index 66b858ab7d..e91bce8180 100644
--- a/vendor/lowrisc_ip/dv/sv/push_pull_agent/seq_lib/push_pull_base_seq.sv
+++ b/vendor/lowrisc_ip/dv/sv/push_pull_agent/seq_lib/push_pull_base_seq.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/sv/push_pull_agent/seq_lib/push_pull_device_seq.sv b/vendor/lowrisc_ip/dv/sv/push_pull_agent/seq_lib/push_pull_device_seq.sv
index 0b15f3f77c..6b7ef97da2 100644
--- a/vendor/lowrisc_ip/dv/sv/push_pull_agent/seq_lib/push_pull_device_seq.sv
+++ b/vendor/lowrisc_ip/dv/sv/push_pull_agent/seq_lib/push_pull_device_seq.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/sv/push_pull_agent/seq_lib/push_pull_host_seq.sv b/vendor/lowrisc_ip/dv/sv/push_pull_agent/seq_lib/push_pull_host_seq.sv
index 98c3b0296f..f1aa3c7306 100644
--- a/vendor/lowrisc_ip/dv/sv/push_pull_agent/seq_lib/push_pull_host_seq.sv
+++ b/vendor/lowrisc_ip/dv/sv/push_pull_agent/seq_lib/push_pull_host_seq.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/sv/push_pull_agent/seq_lib/push_pull_indefinite_host_seq.sv b/vendor/lowrisc_ip/dv/sv/push_pull_agent/seq_lib/push_pull_indefinite_host_seq.sv
index 90c1226770..ebee124498 100644
--- a/vendor/lowrisc_ip/dv/sv/push_pull_agent/seq_lib/push_pull_indefinite_host_seq.sv
+++ b/vendor/lowrisc_ip/dv/sv/push_pull_agent/seq_lib/push_pull_indefinite_host_seq.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/sv/push_pull_agent/seq_lib/push_pull_seq_list.sv b/vendor/lowrisc_ip/dv/sv/push_pull_agent/seq_lib/push_pull_seq_list.sv
index d591fb7f6b..ec836cac16 100644
--- a/vendor/lowrisc_ip/dv/sv/push_pull_agent/seq_lib/push_pull_seq_list.sv
+++ b/vendor/lowrisc_ip/dv/sv/push_pull_agent/seq_lib/push_pull_seq_list.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/sv/str_utils/str_utils.core b/vendor/lowrisc_ip/dv/sv/str_utils/str_utils.core
index 565c2ee431..14eebda7ed 100644
--- a/vendor/lowrisc_ip/dv/sv/str_utils/str_utils.core
+++ b/vendor/lowrisc_ip/dv/sv/str_utils/str_utils.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:dv:str_utils"
diff --git a/vendor/lowrisc_ip/dv/sv/str_utils/str_utils_pkg.sv b/vendor/lowrisc_ip/dv/sv/str_utils/str_utils_pkg.sv
index dfd73a4ffd..5bd5ac9744 100644
--- a/vendor/lowrisc_ip/dv/sv/str_utils/str_utils_pkg.sv
+++ b/vendor/lowrisc_ip/dv/sv/str_utils/str_utils_pkg.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/tools/common.tcl b/vendor/lowrisc_ip/dv/tools/common.tcl
index 81f7b98516..cfa0b37bdf 100644
--- a/vendor/lowrisc_ip/dv/tools/common.tcl
+++ b/vendor/lowrisc_ip/dv/tools/common.tcl
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/tools/dvsim/bazel.hjson b/vendor/lowrisc_ip/dv/tools/dvsim/bazel.hjson
index 8453b27932..407bfb119b 100644
--- a/vendor/lowrisc_ip/dv/tools/dvsim/bazel.hjson
+++ b/vendor/lowrisc_ip/dv/tools/dvsim/bazel.hjson
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 {
diff --git a/vendor/lowrisc_ip/dv/tools/dvsim/common_modes.hjson b/vendor/lowrisc_ip/dv/tools/dvsim/common_modes.hjson
index 7cdf710245..d74d13ebfe 100644
--- a/vendor/lowrisc_ip/dv/tools/dvsim/common_modes.hjson
+++ b/vendor/lowrisc_ip/dv/tools/dvsim/common_modes.hjson
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 {
@@ -52,14 +52,14 @@
     // in two ways. One of them is setting the pre-processor macro `BUILD_SEED` to the seed value,
     // which is done below. The SystemVerilog testbench sources can use the `BUILD_SEED` macro
     // value to set some design constants (such as parameters) upon instantiation. The `BUILD_SEED`,
-    // if not set externally (by passing the --build-seed switch) is set to 1 in 
-    // `hw/dv/sv/dv_utils/dv_macros.svh`. The other way is by passing the {seed} value to utility 
-    // scripts that generate packages that contain randomized constants. These utility scripts can 
-    // be invoked as a `pre_build_cmd`, wrapped within the `build_seed` sim mode in the DUT 
+    // if not set externally (by passing the --build-seed switch) is set to 1 in
+    // `hw/dv/sv/dv_utils/dv_macros.svh`. The other way is by passing the {seed} value to utility
+    // scripts that generate packages that contain randomized constants. These utility scripts can
+    // be invoked as a `pre_build_cmd`, wrapped within the `build_seed` sim mode in the DUT
     // simulation configuration Hjson file. All forms of build randomization must be wrapped within
-    // this `build_seed` sim mode. They will all use the same {seed} value, which allows us to 
-    // deterministically reproduce failures. The `--build-seed` switch is expected to be passed 
-    // when running the nightly regressions. The `seed` value set by dvsim is a 32-bit unsigned 
+    // this `build_seed` sim mode. They will all use the same {seed} value, which allows us to
+    // deterministically reproduce failures. The `--build-seed` switch is expected to be passed
+    // when running the nightly regressions. The `seed` value set by dvsim is a 32-bit unsigned
     // integer (unless specified on the command-line).
     {
       name: build_seed
diff --git a/vendor/lowrisc_ip/dv/tools/dvsim/common_sim_cfg.hjson b/vendor/lowrisc_ip/dv/tools/dvsim/common_sim_cfg.hjson
index e2a3e0a242..1cf530b02c 100644
--- a/vendor/lowrisc_ip/dv/tools/dvsim/common_sim_cfg.hjson
+++ b/vendor/lowrisc_ip/dv/tools/dvsim/common_sim_cfg.hjson
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 {
diff --git a/vendor/lowrisc_ip/dv/tools/dvsim/dsim.hjson b/vendor/lowrisc_ip/dv/tools/dvsim/dsim.hjson
index 42171a587a..84f354618a 100644
--- a/vendor/lowrisc_ip/dv/tools/dvsim/dsim.hjson
+++ b/vendor/lowrisc_ip/dv/tools/dvsim/dsim.hjson
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 {
diff --git a/vendor/lowrisc_ip/dv/tools/dvsim/fusesoc.hjson b/vendor/lowrisc_ip/dv/tools/dvsim/fusesoc.hjson
index c085052b1a..1e44166888 100644
--- a/vendor/lowrisc_ip/dv/tools/dvsim/fusesoc.hjson
+++ b/vendor/lowrisc_ip/dv/tools/dvsim/fusesoc.hjson
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 {
diff --git a/vendor/lowrisc_ip/dv/tools/dvsim/questa.hjson b/vendor/lowrisc_ip/dv/tools/dvsim/questa.hjson
index 794fd90457..5e6abec097 100644
--- a/vendor/lowrisc_ip/dv/tools/dvsim/questa.hjson
+++ b/vendor/lowrisc_ip/dv/tools/dvsim/questa.hjson
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 {
diff --git a/vendor/lowrisc_ip/dv/tools/dvsim/riviera.hjson b/vendor/lowrisc_ip/dv/tools/dvsim/riviera.hjson
index 1169fdd0ee..303527525b 100644
--- a/vendor/lowrisc_ip/dv/tools/dvsim/riviera.hjson
+++ b/vendor/lowrisc_ip/dv/tools/dvsim/riviera.hjson
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 {
diff --git a/vendor/lowrisc_ip/dv/tools/dvsim/sim.mk b/vendor/lowrisc_ip/dv/tools/dvsim/sim.mk
index a1719eb99f..692b5aad02 100644
--- a/vendor/lowrisc_ip/dv/tools/dvsim/sim.mk
+++ b/vendor/lowrisc_ip/dv/tools/dvsim/sim.mk
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -124,8 +124,7 @@ ifneq (${sw_images},)
 				--output=label_kind | cut -f1 -d' '); \
 			if [[ $${kind} == "opentitan_test" \
 					|| $${bazel_label} == "//sw/device/lib/testing/test_rom:test_rom_sim_dv" \
-					|| $${bazel_label} == "//sw/device/silicon_creator/rom:rom_with_real_keys_sim_dv" \
-					|| $${bazel_label} == "//sw/device/silicon_creator/rom:rom_with_fake_keys_sim_dv" ]]; then \
+					|| $${bazel_label} == "//sw/device/silicon_creator/rom:mask_rom_sim_dv" ]]; then \
 				for artifact in $$($${bazel_cmd} cquery $${bazel_airgapped_opts} \
 					$${bazel_label} \
 					--ui_event_filters=-info \
diff --git a/vendor/lowrisc_ip/dv/tools/dvsim/testplans/alert_test_testplan.hjson b/vendor/lowrisc_ip/dv/tools/dvsim/testplans/alert_test_testplan.hjson
index 0e673ca6b4..505e3bfc51 100644
--- a/vendor/lowrisc_ip/dv/tools/dvsim/testplans/alert_test_testplan.hjson
+++ b/vendor/lowrisc_ip/dv/tools/dvsim/testplans/alert_test_testplan.hjson
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 {
diff --git a/vendor/lowrisc_ip/dv/tools/dvsim/testplans/csr_testplan.hjson b/vendor/lowrisc_ip/dv/tools/dvsim/testplans/csr_testplan.hjson
index d31480cc82..fb8319b3bf 100644
--- a/vendor/lowrisc_ip/dv/tools/dvsim/testplans/csr_testplan.hjson
+++ b/vendor/lowrisc_ip/dv/tools/dvsim/testplans/csr_testplan.hjson
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 {
diff --git a/vendor/lowrisc_ip/dv/tools/dvsim/testplans/fpv_csr_testplan.hjson b/vendor/lowrisc_ip/dv/tools/dvsim/testplans/fpv_csr_testplan.hjson
index 8c5c7cce9b..88ad3b9b65 100644
--- a/vendor/lowrisc_ip/dv/tools/dvsim/testplans/fpv_csr_testplan.hjson
+++ b/vendor/lowrisc_ip/dv/tools/dvsim/testplans/fpv_csr_testplan.hjson
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 {
diff --git a/vendor/lowrisc_ip/dv/tools/dvsim/testplans/intr_test_testplan.hjson b/vendor/lowrisc_ip/dv/tools/dvsim/testplans/intr_test_testplan.hjson
index 0db9d533b4..905c6ae7f4 100644
--- a/vendor/lowrisc_ip/dv/tools/dvsim/testplans/intr_test_testplan.hjson
+++ b/vendor/lowrisc_ip/dv/tools/dvsim/testplans/intr_test_testplan.hjson
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 {
diff --git a/vendor/lowrisc_ip/dv/tools/dvsim/testplans/mem_testplan.hjson b/vendor/lowrisc_ip/dv/tools/dvsim/testplans/mem_testplan.hjson
index ec6f59dec8..82f5751b44 100644
--- a/vendor/lowrisc_ip/dv/tools/dvsim/testplans/mem_testplan.hjson
+++ b/vendor/lowrisc_ip/dv/tools/dvsim/testplans/mem_testplan.hjson
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 {
diff --git a/vendor/lowrisc_ip/dv/tools/dvsim/testplans/passthru_mem_intg_testplan.hjson b/vendor/lowrisc_ip/dv/tools/dvsim/testplans/passthru_mem_intg_testplan.hjson
index 20ddfcbd8e..b2a4c199b8 100644
--- a/vendor/lowrisc_ip/dv/tools/dvsim/testplans/passthru_mem_intg_testplan.hjson
+++ b/vendor/lowrisc_ip/dv/tools/dvsim/testplans/passthru_mem_intg_testplan.hjson
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 {
diff --git a/vendor/lowrisc_ip/dv/tools/dvsim/testplans/sec_cm_count_testplan.hjson b/vendor/lowrisc_ip/dv/tools/dvsim/testplans/sec_cm_count_testplan.hjson
index 5e2b86ca29..c66deb7b60 100644
--- a/vendor/lowrisc_ip/dv/tools/dvsim/testplans/sec_cm_count_testplan.hjson
+++ b/vendor/lowrisc_ip/dv/tools/dvsim/testplans/sec_cm_count_testplan.hjson
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 {
diff --git a/vendor/lowrisc_ip/dv/tools/dvsim/testplans/sec_cm_double_lfsr_testplan.hjson b/vendor/lowrisc_ip/dv/tools/dvsim/testplans/sec_cm_double_lfsr_testplan.hjson
index e81e054f63..b2807a2b90 100644
--- a/vendor/lowrisc_ip/dv/tools/dvsim/testplans/sec_cm_double_lfsr_testplan.hjson
+++ b/vendor/lowrisc_ip/dv/tools/dvsim/testplans/sec_cm_double_lfsr_testplan.hjson
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 {
diff --git a/vendor/lowrisc_ip/dv/tools/dvsim/testplans/sec_cm_fsm_testplan.hjson b/vendor/lowrisc_ip/dv/tools/dvsim/testplans/sec_cm_fsm_testplan.hjson
index 65c442507d..e205cc9ab1 100644
--- a/vendor/lowrisc_ip/dv/tools/dvsim/testplans/sec_cm_fsm_testplan.hjson
+++ b/vendor/lowrisc_ip/dv/tools/dvsim/testplans/sec_cm_fsm_testplan.hjson
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 {
diff --git a/vendor/lowrisc_ip/dv/tools/dvsim/testplans/sec_cm_one_hot_testplan.hjson b/vendor/lowrisc_ip/dv/tools/dvsim/testplans/sec_cm_one_hot_testplan.hjson
index ac54631d2b..631e2f0c0e 100644
--- a/vendor/lowrisc_ip/dv/tools/dvsim/testplans/sec_cm_one_hot_testplan.hjson
+++ b/vendor/lowrisc_ip/dv/tools/dvsim/testplans/sec_cm_one_hot_testplan.hjson
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 {
diff --git a/vendor/lowrisc_ip/dv/tools/dvsim/testplans/shadow_reg_errors_testplan.hjson b/vendor/lowrisc_ip/dv/tools/dvsim/testplans/shadow_reg_errors_testplan.hjson
index 6cc6455775..8e642c5e32 100644
--- a/vendor/lowrisc_ip/dv/tools/dvsim/testplans/shadow_reg_errors_testplan.hjson
+++ b/vendor/lowrisc_ip/dv/tools/dvsim/testplans/shadow_reg_errors_testplan.hjson
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 {
diff --git a/vendor/lowrisc_ip/dv/tools/dvsim/testplans/stress_all_with_reset_testplan.hjson b/vendor/lowrisc_ip/dv/tools/dvsim/testplans/stress_all_with_reset_testplan.hjson
index 3e8097cc32..2785f3aff0 100644
--- a/vendor/lowrisc_ip/dv/tools/dvsim/testplans/stress_all_with_reset_testplan.hjson
+++ b/vendor/lowrisc_ip/dv/tools/dvsim/testplans/stress_all_with_reset_testplan.hjson
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 {
diff --git a/vendor/lowrisc_ip/dv/tools/dvsim/testplans/tl_device_access_types_testplan.hjson b/vendor/lowrisc_ip/dv/tools/dvsim/testplans/tl_device_access_types_testplan.hjson
index f3c63d6cf8..f405656a9a 100644
--- a/vendor/lowrisc_ip/dv/tools/dvsim/testplans/tl_device_access_types_testplan.hjson
+++ b/vendor/lowrisc_ip/dv/tools/dvsim/testplans/tl_device_access_types_testplan.hjson
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 {
diff --git a/vendor/lowrisc_ip/dv/tools/dvsim/testplans/tl_device_access_types_wo_intg_testplan.hjson b/vendor/lowrisc_ip/dv/tools/dvsim/testplans/tl_device_access_types_wo_intg_testplan.hjson
index 496067f892..13dfb93397 100644
--- a/vendor/lowrisc_ip/dv/tools/dvsim/testplans/tl_device_access_types_wo_intg_testplan.hjson
+++ b/vendor/lowrisc_ip/dv/tools/dvsim/testplans/tl_device_access_types_wo_intg_testplan.hjson
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 {
diff --git a/vendor/lowrisc_ip/dv/tools/dvsim/tests/alert_test.hjson b/vendor/lowrisc_ip/dv/tools/dvsim/tests/alert_test.hjson
index 808d01ec76..21c8ddff43 100644
--- a/vendor/lowrisc_ip/dv/tools/dvsim/tests/alert_test.hjson
+++ b/vendor/lowrisc_ip/dv/tools/dvsim/tests/alert_test.hjson
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 {
diff --git a/vendor/lowrisc_ip/dv/tools/dvsim/tests/csr_tests.hjson b/vendor/lowrisc_ip/dv/tools/dvsim/tests/csr_tests.hjson
index 2f17aec289..af3d97b6a7 100644
--- a/vendor/lowrisc_ip/dv/tools/dvsim/tests/csr_tests.hjson
+++ b/vendor/lowrisc_ip/dv/tools/dvsim/tests/csr_tests.hjson
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 {
diff --git a/vendor/lowrisc_ip/dv/tools/dvsim/tests/intr_test.hjson b/vendor/lowrisc_ip/dv/tools/dvsim/tests/intr_test.hjson
index 41132b76d3..e83c96f89c 100644
--- a/vendor/lowrisc_ip/dv/tools/dvsim/tests/intr_test.hjson
+++ b/vendor/lowrisc_ip/dv/tools/dvsim/tests/intr_test.hjson
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 {
diff --git a/vendor/lowrisc_ip/dv/tools/dvsim/tests/mem_tests.hjson b/vendor/lowrisc_ip/dv/tools/dvsim/tests/mem_tests.hjson
index b376014451..de9fa5c247 100644
--- a/vendor/lowrisc_ip/dv/tools/dvsim/tests/mem_tests.hjson
+++ b/vendor/lowrisc_ip/dv/tools/dvsim/tests/mem_tests.hjson
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 {
diff --git a/vendor/lowrisc_ip/dv/tools/dvsim/tests/passthru_mem_intg_tests.hjson b/vendor/lowrisc_ip/dv/tools/dvsim/tests/passthru_mem_intg_tests.hjson
index ec89813416..46df8854a9 100644
--- a/vendor/lowrisc_ip/dv/tools/dvsim/tests/passthru_mem_intg_tests.hjson
+++ b/vendor/lowrisc_ip/dv/tools/dvsim/tests/passthru_mem_intg_tests.hjson
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 {
diff --git a/vendor/lowrisc_ip/dv/tools/dvsim/tests/sec_cm_tests.hjson b/vendor/lowrisc_ip/dv/tools/dvsim/tests/sec_cm_tests.hjson
index 593f912d5e..6ac55da5cd 100644
--- a/vendor/lowrisc_ip/dv/tools/dvsim/tests/sec_cm_tests.hjson
+++ b/vendor/lowrisc_ip/dv/tools/dvsim/tests/sec_cm_tests.hjson
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 {
diff --git a/vendor/lowrisc_ip/dv/tools/dvsim/tests/shadow_reg_errors_tests.hjson b/vendor/lowrisc_ip/dv/tools/dvsim/tests/shadow_reg_errors_tests.hjson
index 8f52b84c98..1f1848da72 100644
--- a/vendor/lowrisc_ip/dv/tools/dvsim/tests/shadow_reg_errors_tests.hjson
+++ b/vendor/lowrisc_ip/dv/tools/dvsim/tests/shadow_reg_errors_tests.hjson
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/tools/dvsim/tests/stress_all_test.hjson b/vendor/lowrisc_ip/dv/tools/dvsim/tests/stress_all_test.hjson
index 88d3bfaaf1..297ef1aafb 100644
--- a/vendor/lowrisc_ip/dv/tools/dvsim/tests/stress_all_test.hjson
+++ b/vendor/lowrisc_ip/dv/tools/dvsim/tests/stress_all_test.hjson
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
@@ -10,7 +10,7 @@
     {
       name: "{name}_stress_all"
       uvm_test_seq: "{name}_stress_all_vseq"
-      // 10ms
+      // 10s
       run_opts: ["+test_timeout_ns=10000000000"]
       run_timeout_mins: 180
     }
diff --git a/vendor/lowrisc_ip/dv/tools/dvsim/tests/stress_tests.hjson b/vendor/lowrisc_ip/dv/tools/dvsim/tests/stress_tests.hjson
index 10e1db7ba9..2fe58c6500 100644
--- a/vendor/lowrisc_ip/dv/tools/dvsim/tests/stress_tests.hjson
+++ b/vendor/lowrisc_ip/dv/tools/dvsim/tests/stress_tests.hjson
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
@@ -10,7 +10,7 @@
       name: "{name}_stress_all_with_rand_reset"
       uvm_test_seq: "{name}_common_vseq"
       run_opts: ["+run_stress_all_with_rand_reset",
-                 // 10ms
+                 // 10s
                  "+test_timeout_ns=10000000000",
                  "+stress_seq={name}_stress_all_vseq"]
       run_timeout_mins: 180
diff --git a/vendor/lowrisc_ip/dv/tools/dvsim/tests/tl_access_tests.hjson b/vendor/lowrisc_ip/dv/tools/dvsim/tests/tl_access_tests.hjson
index af3e1d04d5..fd0d1a16e7 100644
--- a/vendor/lowrisc_ip/dv/tools/dvsim/tests/tl_access_tests.hjson
+++ b/vendor/lowrisc_ip/dv/tools/dvsim/tests/tl_access_tests.hjson
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 {
diff --git a/vendor/lowrisc_ip/dv/tools/dvsim/vcs.hjson b/vendor/lowrisc_ip/dv/tools/dvsim/vcs.hjson
index 6777761d3a..b11e601f81 100644
--- a/vendor/lowrisc_ip/dv/tools/dvsim/vcs.hjson
+++ b/vendor/lowrisc_ip/dv/tools/dvsim/vcs.hjson
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 {
diff --git a/vendor/lowrisc_ip/dv/tools/dvsim/verilator.hjson b/vendor/lowrisc_ip/dv/tools/dvsim/verilator.hjson
index 2f8f5017c0..56ab5d25ba 100644
--- a/vendor/lowrisc_ip/dv/tools/dvsim/verilator.hjson
+++ b/vendor/lowrisc_ip/dv/tools/dvsim/verilator.hjson
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 {
diff --git a/vendor/lowrisc_ip/dv/tools/dvsim/xcelium.hjson b/vendor/lowrisc_ip/dv/tools/dvsim/xcelium.hjson
index 5ee39791a7..b523e4c1ab 100644
--- a/vendor/lowrisc_ip/dv/tools/dvsim/xcelium.hjson
+++ b/vendor/lowrisc_ip/dv/tools/dvsim/xcelium.hjson
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 {
diff --git a/vendor/lowrisc_ip/dv/tools/questa/sim.tcl b/vendor/lowrisc_ip/dv/tools/questa/sim.tcl
index 8291676945..7279a28461 100644
--- a/vendor/lowrisc_ip/dv/tools/questa/sim.tcl
+++ b/vendor/lowrisc_ip/dv/tools/questa/sim.tcl
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/tools/ralgen/ralgen.core b/vendor/lowrisc_ip/dv/tools/ralgen/ralgen.core
index b277f413f1..8a451c480e 100644
--- a/vendor/lowrisc_ip/dv/tools/ralgen/ralgen.core
+++ b/vendor/lowrisc_ip/dv/tools/ralgen/ralgen.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/tools/ralgen/ralgen.py b/vendor/lowrisc_ip/dv/tools/ralgen/ralgen.py
index b8680511e7..4281666e13 100755
--- a/vendor/lowrisc_ip/dv/tools/ralgen/ralgen.py
+++ b/vendor/lowrisc_ip/dv/tools/ralgen/ralgen.py
@@ -1,5 +1,5 @@
 #!/usr/bin/env python3
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 r"""FuseSoc generator for UVM RAL package created with either regtool or
diff --git a/vendor/lowrisc_ip/dv/tools/riviera/riviera_run.do b/vendor/lowrisc_ip/dv/tools/riviera/riviera_run.do
index 68c40759e0..6a9de01d61 100644
--- a/vendor/lowrisc_ip/dv/tools/riviera/riviera_run.do
+++ b/vendor/lowrisc_ip/dv/tools/riviera/riviera_run.do
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/tools/sim.tcl b/vendor/lowrisc_ip/dv/tools/sim.tcl
index c513490e87..98a5694d8a 100644
--- a/vendor/lowrisc_ip/dv/tools/sim.tcl
+++ b/vendor/lowrisc_ip/dv/tools/sim.tcl
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/tools/vcs/common_cov_excl.cfg b/vendor/lowrisc_ip/dv/tools/vcs/common_cov_excl.cfg
index 35a32c4151..7c5b5c4c07 100644
--- a/vendor/lowrisc_ip/dv/tools/vcs/common_cov_excl.cfg
+++ b/vendor/lowrisc_ip/dv/tools/vcs/common_cov_excl.cfg
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/tools/vcs/cover.cfg b/vendor/lowrisc_ip/dv/tools/vcs/cover.cfg
index ccde34a68f..79068f07b7 100644
--- a/vendor/lowrisc_ip/dv/tools/vcs/cover.cfg
+++ b/vendor/lowrisc_ip/dv/tools/vcs/cover.cfg
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/tools/vcs/cover_reg_top.cfg b/vendor/lowrisc_ip/dv/tools/vcs/cover_reg_top.cfg
index 771cd56345..430f2be9a1 100644
--- a/vendor/lowrisc_ip/dv/tools/vcs/cover_reg_top.cfg
+++ b/vendor/lowrisc_ip/dv/tools/vcs/cover_reg_top.cfg
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/tools/vcs/fsm_reset_cov.cfg b/vendor/lowrisc_ip/dv/tools/vcs/fsm_reset_cov.cfg
index 6207462b95..1b66a19811 100644
--- a/vendor/lowrisc_ip/dv/tools/vcs/fsm_reset_cov.cfg
+++ b/vendor/lowrisc_ip/dv/tools/vcs/fsm_reset_cov.cfg
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/tools/vcs/unr.cfg b/vendor/lowrisc_ip/dv/tools/vcs/unr.cfg
index 290f3a45ed..ca91d13e14 100644
--- a/vendor/lowrisc_ip/dv/tools/vcs/unr.cfg
+++ b/vendor/lowrisc_ip/dv/tools/vcs/unr.cfg
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/tools/vcs/xprop.cfg b/vendor/lowrisc_ip/dv/tools/vcs/xprop.cfg
index da9650f8c9..aaf7edfe35 100644
--- a/vendor/lowrisc_ip/dv/tools/vcs/xprop.cfg
+++ b/vendor/lowrisc_ip/dv/tools/vcs/xprop.cfg
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/tools/waves.tcl b/vendor/lowrisc_ip/dv/tools/waves.tcl
index eeb76e2b2f..3a4ac3ba4a 100644
--- a/vendor/lowrisc_ip/dv/tools/waves.tcl
+++ b/vendor/lowrisc_ip/dv/tools/waves.tcl
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/tools/xcelium/common.ccf b/vendor/lowrisc_ip/dv/tools/xcelium/common.ccf
index 9d003aed8e..bf12983361 100644
--- a/vendor/lowrisc_ip/dv/tools/xcelium/common.ccf
+++ b/vendor/lowrisc_ip/dv/tools/xcelium/common.ccf
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/tools/xcelium/common_cov_excl.tcl b/vendor/lowrisc_ip/dv/tools/xcelium/common_cov_excl.tcl
index 6c9243f9fa..3708338998 100644
--- a/vendor/lowrisc_ip/dv/tools/xcelium/common_cov_excl.tcl
+++ b/vendor/lowrisc_ip/dv/tools/xcelium/common_cov_excl.tcl
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/tools/xcelium/cov_merge.tcl b/vendor/lowrisc_ip/dv/tools/xcelium/cov_merge.tcl
index c369810c6e..1a31385793 100644
--- a/vendor/lowrisc_ip/dv/tools/xcelium/cov_merge.tcl
+++ b/vendor/lowrisc_ip/dv/tools/xcelium/cov_merge.tcl
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/tools/xcelium/cov_report.tcl b/vendor/lowrisc_ip/dv/tools/xcelium/cov_report.tcl
index 3d5c23563e..cecbc956b4 100644
--- a/vendor/lowrisc_ip/dv/tools/xcelium/cov_report.tcl
+++ b/vendor/lowrisc_ip/dv/tools/xcelium/cov_report.tcl
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -8,6 +8,10 @@
 # exclusion script and the coverage refinement files are passed to the IMC invocation using the
 # -load, -init and -load_refinement switches respectively (whichever ones are applicable).
 
+# Generate "detachable" reports that work despite browser Cross-Origin Request Security protection.
+# They have the downside that you have to select the .report file yourself in-browser.
+config reports.detachable_report_data -set true
+
 # Set the output directory for the reports database using the env var 'cov_report_dir'.
 # The supplied env var may have quotes or spaces that needs to be trimmed.
 set cov_report_dir [string trim $::env(cov_report_dir) " \"'"]
diff --git a/vendor/lowrisc_ip/dv/tools/xcelium/cover.ccf b/vendor/lowrisc_ip/dv/tools/xcelium/cover.ccf
index 7752f4894d..9a80e7f265 100644
--- a/vendor/lowrisc_ip/dv/tools/xcelium/cover.ccf
+++ b/vendor/lowrisc_ip/dv/tools/xcelium/cover.ccf
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/tools/xcelium/cover_reg_top.ccf b/vendor/lowrisc_ip/dv/tools/xcelium/cover_reg_top.ccf
index ba86d3d4a9..3bd0f5e926 100644
--- a/vendor/lowrisc_ip/dv/tools/xcelium/cover_reg_top.ccf
+++ b/vendor/lowrisc_ip/dv/tools/xcelium/cover_reg_top.ccf
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/tools/xcelium/cover_reg_top_toggle_excl b/vendor/lowrisc_ip/dv/tools/xcelium/cover_reg_top_toggle_excl
index ae30c55332..caf1bc0357 100644
--- a/vendor/lowrisc_ip/dv/tools/xcelium/cover_reg_top_toggle_excl
+++ b/vendor/lowrisc_ip/dv/tools/xcelium/cover_reg_top_toggle_excl
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/tools/xcelium/unr.cfg b/vendor/lowrisc_ip/dv/tools/xcelium/unr.cfg
index 9dbea90de7..7918effde9 100644
--- a/vendor/lowrisc_ip/dv/tools/xcelium/unr.cfg
+++ b/vendor/lowrisc_ip/dv/tools/xcelium/unr.cfg
@@ -1,9 +1,9 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
-check_unr -setup 
+check_unr -setup
 
-#Setup the clock and reset the design 
+#Setup the clock and reset the design
 clock -infer
 reset ~dut.rst_ni
 get_reset_info
diff --git a/vendor/lowrisc_ip/dv/verilator/cpp/dpi_memutil.cc b/vendor/lowrisc_ip/dv/verilator/cpp/dpi_memutil.cc
index a6fc452d74..945ea3923d 100644
--- a/vendor/lowrisc_ip/dv/verilator/cpp/dpi_memutil.cc
+++ b/vendor/lowrisc_ip/dv/verilator/cpp/dpi_memutil.cc
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/verilator/cpp/dpi_memutil.h b/vendor/lowrisc_ip/dv/verilator/cpp/dpi_memutil.h
index a41aae996e..48656796ca 100644
--- a/vendor/lowrisc_ip/dv/verilator/cpp/dpi_memutil.h
+++ b/vendor/lowrisc_ip/dv/verilator/cpp/dpi_memutil.h
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 #ifndef OPENTITAN_HW_DV_VERILATOR_CPP_DPI_MEMUTIL_H_
diff --git a/vendor/lowrisc_ip/dv/verilator/cpp/ecc32_mem_area.cc b/vendor/lowrisc_ip/dv/verilator/cpp/ecc32_mem_area.cc
index d5926fa15a..5136d9c3e5 100644
--- a/vendor/lowrisc_ip/dv/verilator/cpp/ecc32_mem_area.cc
+++ b/vendor/lowrisc_ip/dv/verilator/cpp/ecc32_mem_area.cc
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/verilator/cpp/ecc32_mem_area.h b/vendor/lowrisc_ip/dv/verilator/cpp/ecc32_mem_area.h
index e42ea2dd73..1ba0053027 100644
--- a/vendor/lowrisc_ip/dv/verilator/cpp/ecc32_mem_area.h
+++ b/vendor/lowrisc_ip/dv/verilator/cpp/ecc32_mem_area.h
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/verilator/cpp/mem_area.cc b/vendor/lowrisc_ip/dv/verilator/cpp/mem_area.cc
index 4b29f1fca7..58455e4991 100644
--- a/vendor/lowrisc_ip/dv/verilator/cpp/mem_area.cc
+++ b/vendor/lowrisc_ip/dv/verilator/cpp/mem_area.cc
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/verilator/cpp/mem_area.h b/vendor/lowrisc_ip/dv/verilator/cpp/mem_area.h
index 84b57d94bb..05cabf5084 100644
--- a/vendor/lowrisc_ip/dv/verilator/cpp/mem_area.h
+++ b/vendor/lowrisc_ip/dv/verilator/cpp/mem_area.h
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/verilator/cpp/ranged_map.h b/vendor/lowrisc_ip/dv/verilator/cpp/ranged_map.h
index 4bc7cbae70..9dcd8d16cc 100644
--- a/vendor/lowrisc_ip/dv/verilator/cpp/ranged_map.h
+++ b/vendor/lowrisc_ip/dv/verilator/cpp/ranged_map.h
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 #ifndef OPENTITAN_HW_DV_VERILATOR_CPP_RANGED_MAP_H_
diff --git a/vendor/lowrisc_ip/dv/verilator/cpp/scrambled_ecc32_mem_area.cc b/vendor/lowrisc_ip/dv/verilator/cpp/scrambled_ecc32_mem_area.cc
index 1206c86569..c67a92917b 100644
--- a/vendor/lowrisc_ip/dv/verilator/cpp/scrambled_ecc32_mem_area.cc
+++ b/vendor/lowrisc_ip/dv/verilator/cpp/scrambled_ecc32_mem_area.cc
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/verilator/cpp/scrambled_ecc32_mem_area.h b/vendor/lowrisc_ip/dv/verilator/cpp/scrambled_ecc32_mem_area.h
index 31055b1a3d..e3443878ec 100644
--- a/vendor/lowrisc_ip/dv/verilator/cpp/scrambled_ecc32_mem_area.h
+++ b/vendor/lowrisc_ip/dv/verilator/cpp/scrambled_ecc32_mem_area.h
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/verilator/cpp/sv_scoped.cc b/vendor/lowrisc_ip/dv/verilator/cpp/sv_scoped.cc
index 6f537ae83a..52a001a86d 100644
--- a/vendor/lowrisc_ip/dv/verilator/cpp/sv_scoped.cc
+++ b/vendor/lowrisc_ip/dv/verilator/cpp/sv_scoped.cc
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/verilator/cpp/sv_scoped.h b/vendor/lowrisc_ip/dv/verilator/cpp/sv_scoped.h
index e9c75ff277..49ca1fc37c 100644
--- a/vendor/lowrisc_ip/dv/verilator/cpp/sv_scoped.h
+++ b/vendor/lowrisc_ip/dv/verilator/cpp/sv_scoped.h
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/verilator/cpp/verilator_memutil.cc b/vendor/lowrisc_ip/dv/verilator/cpp/verilator_memutil.cc
index 66ee5d7a7f..951152814f 100644
--- a/vendor/lowrisc_ip/dv/verilator/cpp/verilator_memutil.cc
+++ b/vendor/lowrisc_ip/dv/verilator/cpp/verilator_memutil.cc
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/verilator/cpp/verilator_memutil.h b/vendor/lowrisc_ip/dv/verilator/cpp/verilator_memutil.h
index 128500ba05..961554bfb3 100644
--- a/vendor/lowrisc_ip/dv/verilator/cpp/verilator_memutil.h
+++ b/vendor/lowrisc_ip/dv/verilator/cpp/verilator_memutil.h
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 #ifndef OPENTITAN_HW_DV_VERILATOR_CPP_VERILATOR_MEMUTIL_H_
diff --git a/vendor/lowrisc_ip/dv/verilator/memutil_dpi.core b/vendor/lowrisc_ip/dv/verilator/memutil_dpi.core
index 7de37f055a..a8957e16ad 100644
--- a/vendor/lowrisc_ip/dv/verilator/memutil_dpi.core
+++ b/vendor/lowrisc_ip/dv/verilator/memutil_dpi.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/verilator/memutil_dpi_scrambled.core b/vendor/lowrisc_ip/dv/verilator/memutil_dpi_scrambled.core
index 8467e2384d..6c27c642fb 100644
--- a/vendor/lowrisc_ip/dv/verilator/memutil_dpi_scrambled.core
+++ b/vendor/lowrisc_ip/dv/verilator/memutil_dpi_scrambled.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/verilator/memutil_dpi_scrambled_opts.hjson b/vendor/lowrisc_ip/dv/verilator/memutil_dpi_scrambled_opts.hjson
index fc9cca6045..ee8ae81fa7 100644
--- a/vendor/lowrisc_ip/dv/verilator/memutil_dpi_scrambled_opts.hjson
+++ b/vendor/lowrisc_ip/dv/verilator/memutil_dpi_scrambled_opts.hjson
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 {
diff --git a/vendor/lowrisc_ip/dv/verilator/memutil_verilator.core b/vendor/lowrisc_ip/dv/verilator/memutil_verilator.core
index b2f27c1537..5c2e199de1 100644
--- a/vendor/lowrisc_ip/dv/verilator/memutil_verilator.core
+++ b/vendor/lowrisc_ip/dv/verilator/memutil_verilator.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/verilator/simutil_verilator/cpp/sim_ctrl_extension.h b/vendor/lowrisc_ip/dv/verilator/simutil_verilator/cpp/sim_ctrl_extension.h
index 87c42b508d..96460cfbb0 100644
--- a/vendor/lowrisc_ip/dv/verilator/simutil_verilator/cpp/sim_ctrl_extension.h
+++ b/vendor/lowrisc_ip/dv/verilator/simutil_verilator/cpp/sim_ctrl_extension.h
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/verilator/simutil_verilator/cpp/verilated_toplevel.cc b/vendor/lowrisc_ip/dv/verilator/simutil_verilator/cpp/verilated_toplevel.cc
index 9c2ef91fcc..6f054ab366 100644
--- a/vendor/lowrisc_ip/dv/verilator/simutil_verilator/cpp/verilated_toplevel.cc
+++ b/vendor/lowrisc_ip/dv/verilator/simutil_verilator/cpp/verilated_toplevel.cc
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/verilator/simutil_verilator/cpp/verilated_toplevel.h b/vendor/lowrisc_ip/dv/verilator/simutil_verilator/cpp/verilated_toplevel.h
index 1d7cc7dee0..f8af5b368d 100644
--- a/vendor/lowrisc_ip/dv/verilator/simutil_verilator/cpp/verilated_toplevel.h
+++ b/vendor/lowrisc_ip/dv/verilator/simutil_verilator/cpp/verilated_toplevel.h
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/verilator/simutil_verilator/cpp/verilator_sim_ctrl.cc b/vendor/lowrisc_ip/dv/verilator/simutil_verilator/cpp/verilator_sim_ctrl.cc
index d92b1b36ef..8ae0622d00 100644
--- a/vendor/lowrisc_ip/dv/verilator/simutil_verilator/cpp/verilator_sim_ctrl.cc
+++ b/vendor/lowrisc_ip/dv/verilator/simutil_verilator/cpp/verilator_sim_ctrl.cc
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/verilator/simutil_verilator/cpp/verilator_sim_ctrl.h b/vendor/lowrisc_ip/dv/verilator/simutil_verilator/cpp/verilator_sim_ctrl.h
index 9e60d1ab6b..5e90e97585 100644
--- a/vendor/lowrisc_ip/dv/verilator/simutil_verilator/cpp/verilator_sim_ctrl.h
+++ b/vendor/lowrisc_ip/dv/verilator/simutil_verilator/cpp/verilator_sim_ctrl.h
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/dv/verilator/simutil_verilator/simutil_verilator.core b/vendor/lowrisc_ip/dv/verilator/simutil_verilator/simutil_verilator.core
index d14327ae9a..9e2dfc1d15 100644
--- a/vendor/lowrisc_ip/dv/verilator/simutil_verilator/simutil_verilator.core
+++ b/vendor/lowrisc_ip/dv/verilator/simutil_verilator/simutil_verilator.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/BUILD b/vendor/lowrisc_ip/ip/prim/BUILD
index c87fb863cc..f42854cd1b 100644
--- a/vendor/lowrisc_ip/ip/prim/BUILD
+++ b/vendor/lowrisc_ip/ip/prim/BUILD
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/doc/prim_ram_1p_scr.md b/vendor/lowrisc_ip/ip/prim/doc/prim_ram_1p_scr.md
index ffdaebcd1d..ad67d18fe2 100644
--- a/vendor/lowrisc_ip/ip/prim/doc/prim_ram_1p_scr.md
+++ b/vendor/lowrisc_ip/ip/prim/doc/prim_ram_1p_scr.md
@@ -2,9 +2,9 @@
 
 # Overview
 
-The scrambling primitive `prim_ram_1p_scr` employs a reduced-round (5 instead of 11) PRINCE block cipher in CTR mode to scramble the data.
+The scrambling primitive `prim_ram_1p_scr` employs a reduced-round (7 instead of 11) PRINCE block cipher in CTR mode to scramble the data.
 The PRINCE lightweight block cipher has been selected due to its low latency and low area characteristics, see also [prim_prince](./prim_prince.md) for more information on PRINCE.
-The number of rounds is reduced to 5 in order to ease timing pressure and ensure single cycle operation (the number of rounds can always be increased if it turns out that there is enough timing slack).
+The number of rounds is reduced to 7 in order to ease timing pressure and ensure single cycle operation (the number of rounds can always be increased if it turns out that there is enough timing slack).
 
 In [CTR mode](https://en.wikipedia.org/wiki/Block_cipher_mode_of_operation#Counter_(CTR)), the block cipher is used to encrypt a 64bit IV with the scrambling key in order to create a 64bit keystream block that is bitwise XOR'ed with the data in order to transform plaintext into ciphertext and vice versa.
 The IV is assembled by concatenating a nonce with the word address.
@@ -13,13 +13,16 @@ If the word width of the scrambled memory is smaller than 64bit, the keystream b
 If the word width is wider than 64bit, the scrambling primitive by default instantiates multiple PRINCE primitives in order to create a unique keystream for the full datawidth.
 For area constrained settings, the parameter `ReplicateKeyStream` in `prim_ram_1p_scr` can be set to 1 in order to replicate the keystream block generated by one single primitive instead of using multiple parallel PRINCE instances (but it should be understood that this lowers the level of security).
 
-Since plain CTR mode does not diffuse the data bits due to the bitwise XOR, the scheme is augmented by passing each individual word through a two-layer substitution-permutation (S&P) network implemented with the `prim_subst_perm` primitive (the diffusion chunk width can be parameterized via the `DiffWidth` parameter).
-The S&P network employed is similar to the one employed in PRESENT and will be explained in more detail [further below](#custom-substitution-permutation-network).
-Note that if individual bytes need to be writable without having to perform a read-modify-write operation, the diffusion chunk width should be set to 8.
+In order to break the linear address space, the CTR mode is augmented with an S&P network to non-linearly remap the SRAM address as shown in the block diagram above.
+The S&P network employed is similar to the one employed in PRESENT and is explained in more detail [further below](#custom-substitution-permutation-network).
+This particular address scrambling network additionally XOR's in a nonce that has the same width as the address.
 
-Another CTR mode augmentation that is aimed at breaking the linear address space is SRAM address scrambling.
-The same two-layer S&P network that is used for byte diffusion is leveraged to non-linearly remap the SRAM address as shown in the block diagram above.
-As opposed to the byte diffusion S&P networks, this particular address scrambling network additionally XOR's in a nonce that has the same width as the address.
+Optionally, the scheme can be augmented by passing each individual data word through a substitution-permutation (S&P) network implemented with the `prim_subst_perm` primitive to diffuse the data bits.
+The number of diffusion rounds and the diffusion chunk width can be parameterized via the `NumDiffRounds` and the `DiffWidth` parameter, respectively.
+The same S&P network that is used for address scrambling is leveraged for the data diffusion.
+For details, see [below](#custom-substitution-permutation-network).
+If individual bytes need to be writable without having to perform a read-modify-write operation, the diffusion chunk width should be set to 8.
+Note that since this optional data diffusion can affect end-to-end bus and memory integrity schemes, it is disabled by default.
 
 ## Parameters
 
@@ -33,8 +36,8 @@ Parameter                   | Default (Max)         | Top Earlgrey | Description
 `DataBitsPerMask`           | 8                     | 8            | Number of data bits per write mask.
 `EnableParity`              | 1                     | 1            | This parameter enables byte parity.
 `CfgWidth`                  | 8                     | 8            | Width of SRAM attributes field.
-`NumPrinceRoundsHalf`       | 2 (5)                 | 2            | Number of PRINCE half-rounds.
-`NumDiffRounds`             | 2                     | 2            | Number of additional diffusion rounds, set to 0 to disable.
+`NumPrinceRoundsHalf`       | 3 (5)                 | 3            | Number of PRINCE half-rounds.
+`NumDiffRounds`             | 0                     | 0            | Number of additional diffusion rounds, set to 0 to disable.
 `DiffWidth`                 | 8                     | 8            | Width of additional diffusion rounds, set to 8 for intra-byte diffusion.
 `NumAddrScrRounds`          | 2                     | 2            | Number of address scrambling rounds, set to 0 to disable.
 `ReplicateKeyStream`        | 0 (1)                 | 0            | If set to 1, the same 64bit key stream is replicated if the data port is wider than 64bit. Otherwise, multiple PRINCE primitives are employed to generate a unique keystream for the full data width.
diff --git a/vendor/lowrisc_ip/ip/prim/dv/prim_alert/data/prim_alert_cover.cfg b/vendor/lowrisc_ip/ip/prim/dv/prim_alert/data/prim_alert_cover.cfg
index 597ed647d2..8d2b896238 100644
--- a/vendor/lowrisc_ip/ip/prim/dv/prim_alert/data/prim_alert_cover.cfg
+++ b/vendor/lowrisc_ip/ip/prim/dv/prim_alert/data/prim_alert_cover.cfg
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/dv/prim_alert/data/prim_alert_testplan.hjson b/vendor/lowrisc_ip/ip/prim/dv/prim_alert/data/prim_alert_testplan.hjson
index c044171509..e55ac1d472 100644
--- a/vendor/lowrisc_ip/ip/prim/dv/prim_alert/data/prim_alert_testplan.hjson
+++ b/vendor/lowrisc_ip/ip/prim/dv/prim_alert/data/prim_alert_testplan.hjson
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 {
diff --git a/vendor/lowrisc_ip/ip/prim/dv/prim_alert/prim_alert_sim.core b/vendor/lowrisc_ip/ip/prim/dv/prim_alert/prim_alert_sim.core
index 1967637566..b9dcc28e24 100644
--- a/vendor/lowrisc_ip/ip/prim/dv/prim_alert/prim_alert_sim.core
+++ b/vendor/lowrisc_ip/ip/prim/dv/prim_alert/prim_alert_sim.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:dv:prim_alert_sim:0.1"
@@ -29,4 +29,3 @@ targets:
 
   lint:
     <<: *sim_target
-
diff --git a/vendor/lowrisc_ip/ip/prim/dv/prim_alert/prim_alert_sim_cfg.hjson b/vendor/lowrisc_ip/ip/prim/dv/prim_alert/prim_alert_sim_cfg.hjson
index b36d23b745..a3154db05d 100644
--- a/vendor/lowrisc_ip/ip/prim/dv/prim_alert/prim_alert_sim_cfg.hjson
+++ b/vendor/lowrisc_ip/ip/prim/dv/prim_alert/prim_alert_sim_cfg.hjson
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 {
diff --git a/vendor/lowrisc_ip/ip/prim/dv/prim_alert/tb/prim_alert_tb.sv b/vendor/lowrisc_ip/ip/prim/dv/prim_alert/tb/prim_alert_tb.sv
index 228ecd2054..4f45cd2d3a 100644
--- a/vendor/lowrisc_ip/ip/prim/dv/prim_alert/tb/prim_alert_tb.sv
+++ b/vendor/lowrisc_ip/ip/prim/dv/prim_alert/tb/prim_alert_tb.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/dv/prim_esc/data/prim_esc_cover.cfg b/vendor/lowrisc_ip/ip/prim/dv/prim_esc/data/prim_esc_cover.cfg
index 38463867c0..0ebe0b1066 100644
--- a/vendor/lowrisc_ip/ip/prim/dv/prim_esc/data/prim_esc_cover.cfg
+++ b/vendor/lowrisc_ip/ip/prim/dv/prim_esc/data/prim_esc_cover.cfg
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/dv/prim_esc/data/prim_esc_testplan.hjson b/vendor/lowrisc_ip/ip/prim/dv/prim_esc/data/prim_esc_testplan.hjson
index 4a2a5ebc79..29c3137f3a 100644
--- a/vendor/lowrisc_ip/ip/prim/dv/prim_esc/data/prim_esc_testplan.hjson
+++ b/vendor/lowrisc_ip/ip/prim/dv/prim_esc/data/prim_esc_testplan.hjson
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 {
diff --git a/vendor/lowrisc_ip/ip/prim/dv/prim_esc/prim_esc_sim.core b/vendor/lowrisc_ip/ip/prim/dv/prim_esc/prim_esc_sim.core
index ef00ab6ffa..2216ff03b0 100644
--- a/vendor/lowrisc_ip/ip/prim/dv/prim_esc/prim_esc_sim.core
+++ b/vendor/lowrisc_ip/ip/prim/dv/prim_esc/prim_esc_sim.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:dv:prim_esc_sim:0.1"
diff --git a/vendor/lowrisc_ip/ip/prim/dv/prim_esc/prim_esc_sim_cfg.hjson b/vendor/lowrisc_ip/ip/prim/dv/prim_esc/prim_esc_sim_cfg.hjson
index 6658a556ef..129c044621 100644
--- a/vendor/lowrisc_ip/ip/prim/dv/prim_esc/prim_esc_sim_cfg.hjson
+++ b/vendor/lowrisc_ip/ip/prim/dv/prim_esc/prim_esc_sim_cfg.hjson
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 {
diff --git a/vendor/lowrisc_ip/ip/prim/dv/prim_esc/tb/prim_esc_tb.sv b/vendor/lowrisc_ip/ip/prim/dv/prim_esc/tb/prim_esc_tb.sv
index 592abefff6..e3572df1dc 100644
--- a/vendor/lowrisc_ip/ip/prim/dv/prim_esc/tb/prim_esc_tb.sv
+++ b/vendor/lowrisc_ip/ip/prim/dv/prim_esc/tb/prim_esc_tb.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/dv/prim_lfsr/data/prim_lfsr_cov_excl.el b/vendor/lowrisc_ip/ip/prim/dv/prim_lfsr/data/prim_lfsr_cov_excl.el
index 45f15b4521..100712917e 100644
--- a/vendor/lowrisc_ip/ip/prim/dv/prim_lfsr/data/prim_lfsr_cov_excl.el
+++ b/vendor/lowrisc_ip/ip/prim/dv/prim_lfsr/data/prim_lfsr_cov_excl.el
@@ -1,3 +1,3 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
diff --git a/vendor/lowrisc_ip/ip/prim/dv/prim_lfsr/data/prim_lfsr_cover.cfg b/vendor/lowrisc_ip/ip/prim/dv/prim_lfsr/data/prim_lfsr_cover.cfg
index 533abbcd53..5d98b184aa 100644
--- a/vendor/lowrisc_ip/ip/prim/dv/prim_lfsr/data/prim_lfsr_cover.cfg
+++ b/vendor/lowrisc_ip/ip/prim/dv/prim_lfsr/data/prim_lfsr_cover.cfg
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/dv/prim_lfsr/prim_lfsr_sim.core b/vendor/lowrisc_ip/ip/prim/dv/prim_lfsr/prim_lfsr_sim.core
index ec82c167f2..3733ede73b 100644
--- a/vendor/lowrisc_ip/ip/prim/dv/prim_lfsr/prim_lfsr_sim.core
+++ b/vendor/lowrisc_ip/ip/prim/dv/prim_lfsr/prim_lfsr_sim.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:dv:prim_lfsr_sim:0.1"
diff --git a/vendor/lowrisc_ip/ip/prim/dv/prim_lfsr/prim_lfsr_sim_cfg.hjson b/vendor/lowrisc_ip/ip/prim/dv/prim_lfsr/prim_lfsr_sim_cfg.hjson
index 4fb68ce85c..b84ba65b52 100644
--- a/vendor/lowrisc_ip/ip/prim/dv/prim_lfsr/prim_lfsr_sim_cfg.hjson
+++ b/vendor/lowrisc_ip/ip/prim/dv/prim_lfsr/prim_lfsr_sim_cfg.hjson
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 {
diff --git a/vendor/lowrisc_ip/ip/prim/dv/prim_lfsr/prim_lfsr_tb.sv b/vendor/lowrisc_ip/ip/prim/dv/prim_lfsr/prim_lfsr_tb.sv
index 9855615529..d7bcc79d8a 100644
--- a/vendor/lowrisc_ip/ip/prim/dv/prim_lfsr/prim_lfsr_tb.sv
+++ b/vendor/lowrisc_ip/ip/prim/dv/prim_lfsr/prim_lfsr_tb.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/dv/prim_present/crypto_dpi_present/crypto_dpi_present.cc b/vendor/lowrisc_ip/ip/prim/dv/prim_present/crypto_dpi_present/crypto_dpi_present.cc
index 782d0e18a6..25cfa42f2c 100644
--- a/vendor/lowrisc_ip/ip/prim/dv/prim_present/crypto_dpi_present/crypto_dpi_present.cc
+++ b/vendor/lowrisc_ip/ip/prim/dv/prim_present/crypto_dpi_present/crypto_dpi_present.cc
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/dv/prim_present/crypto_dpi_present/crypto_dpi_present.core b/vendor/lowrisc_ip/ip/prim/dv/prim_present/crypto_dpi_present/crypto_dpi_present.core
index ed0085556b..59cf0a2fe0 100644
--- a/vendor/lowrisc_ip/ip/prim/dv/prim_present/crypto_dpi_present/crypto_dpi_present.core
+++ b/vendor/lowrisc_ip/ip/prim/dv/prim_present/crypto_dpi_present/crypto_dpi_present.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:dv:crypto_dpi_present:0.1"
diff --git a/vendor/lowrisc_ip/ip/prim/dv/prim_present/crypto_dpi_present/crypto_dpi_present_pkg.sv b/vendor/lowrisc_ip/ip/prim/dv/prim_present/crypto_dpi_present/crypto_dpi_present_pkg.sv
index 2565512c8c..4f237dec6d 100644
--- a/vendor/lowrisc_ip/ip/prim/dv/prim_present/crypto_dpi_present/crypto_dpi_present_pkg.sv
+++ b/vendor/lowrisc_ip/ip/prim/dv/prim_present/crypto_dpi_present/crypto_dpi_present_pkg.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/dv/prim_present/data/prim_present_cover.cfg b/vendor/lowrisc_ip/ip/prim/dv/prim_present/data/prim_present_cover.cfg
index 8789a92af7..e2afdd8757 100644
--- a/vendor/lowrisc_ip/ip/prim/dv/prim_present/data/prim_present_cover.cfg
+++ b/vendor/lowrisc_ip/ip/prim/dv/prim_present/data/prim_present_cover.cfg
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/dv/prim_present/prim_present_sim.core b/vendor/lowrisc_ip/ip/prim/dv/prim_present/prim_present_sim.core
index 5fcb3d42b2..0755f0a086 100644
--- a/vendor/lowrisc_ip/ip/prim/dv/prim_present/prim_present_sim.core
+++ b/vendor/lowrisc_ip/ip/prim/dv/prim_present/prim_present_sim.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:dv:prim_present_sim:0.1"
diff --git a/vendor/lowrisc_ip/ip/prim/dv/prim_present/prim_present_sim_cfg.hjson b/vendor/lowrisc_ip/ip/prim/dv/prim_present/prim_present_sim_cfg.hjson
index 9b4b82821c..64fc62865d 100644
--- a/vendor/lowrisc_ip/ip/prim/dv/prim_present/prim_present_sim_cfg.hjson
+++ b/vendor/lowrisc_ip/ip/prim/dv/prim_present/prim_present_sim_cfg.hjson
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 {
diff --git a/vendor/lowrisc_ip/ip/prim/dv/prim_present/tb/prim_present_tb.sv b/vendor/lowrisc_ip/ip/prim/dv/prim_present/tb/prim_present_tb.sv
index 4a80b1832c..e70ab69de2 100644
--- a/vendor/lowrisc_ip/ip/prim/dv/prim_present/tb/prim_present_tb.sv
+++ b/vendor/lowrisc_ip/ip/prim/dv/prim_present/tb/prim_present_tb.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/dv/prim_prince/crypto_dpi_prince/crypto_dpi_prince.c b/vendor/lowrisc_ip/ip/prim/dv/prim_prince/crypto_dpi_prince/crypto_dpi_prince.c
index fba3a5b4d2..833574e3d6 100644
--- a/vendor/lowrisc_ip/ip/prim/dv/prim_prince/crypto_dpi_prince/crypto_dpi_prince.c
+++ b/vendor/lowrisc_ip/ip/prim/dv/prim_prince/crypto_dpi_prince/crypto_dpi_prince.c
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/dv/prim_prince/crypto_dpi_prince/crypto_dpi_prince.core b/vendor/lowrisc_ip/ip/prim/dv/prim_prince/crypto_dpi_prince/crypto_dpi_prince.core
index 1ce8133533..a8d14964ad 100644
--- a/vendor/lowrisc_ip/ip/prim/dv/prim_prince/crypto_dpi_prince/crypto_dpi_prince.core
+++ b/vendor/lowrisc_ip/ip/prim/dv/prim_prince/crypto_dpi_prince/crypto_dpi_prince.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:dv:crypto_dpi_prince:0.1"
diff --git a/vendor/lowrisc_ip/ip/prim/dv/prim_prince/crypto_dpi_prince/crypto_dpi_prince_pkg.sv b/vendor/lowrisc_ip/ip/prim/dv/prim_prince/crypto_dpi_prince/crypto_dpi_prince_pkg.sv
index 8535e98833..5625cc67d8 100644
--- a/vendor/lowrisc_ip/ip/prim/dv/prim_prince/crypto_dpi_prince/crypto_dpi_prince_pkg.sv
+++ b/vendor/lowrisc_ip/ip/prim/dv/prim_prince/crypto_dpi_prince/crypto_dpi_prince_pkg.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/dv/prim_prince/crypto_dpi_prince/crypto_dpi_prince_sim_opts.hjson b/vendor/lowrisc_ip/ip/prim/dv/prim_prince/crypto_dpi_prince/crypto_dpi_prince_sim_opts.hjson
index 8c5b0f7cfd..9f2e9c6fd8 100644
--- a/vendor/lowrisc_ip/ip/prim/dv/prim_prince/crypto_dpi_prince/crypto_dpi_prince_sim_opts.hjson
+++ b/vendor/lowrisc_ip/ip/prim/dv/prim_prince/crypto_dpi_prince/crypto_dpi_prince_sim_opts.hjson
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 {
diff --git a/vendor/lowrisc_ip/ip/prim/dv/prim_prince/crypto_dpi_prince/crypto_prince_ref.core b/vendor/lowrisc_ip/ip/prim/dv/prim_prince/crypto_dpi_prince/crypto_prince_ref.core
index 20868bc116..9072879594 100644
--- a/vendor/lowrisc_ip/ip/prim/dv/prim_prince/crypto_dpi_prince/crypto_prince_ref.core
+++ b/vendor/lowrisc_ip/ip/prim/dv/prim_prince/crypto_dpi_prince/crypto_prince_ref.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:dv:crypto_prince_ref:0.1"
diff --git a/vendor/lowrisc_ip/ip/prim/dv/prim_prince/crypto_dpi_prince/prince_ref.h b/vendor/lowrisc_ip/ip/prim/dv/prim_prince/crypto_dpi_prince/prince_ref.h
index a807869a01..b1ada83e50 100644
--- a/vendor/lowrisc_ip/ip/prim/dv/prim_prince/crypto_dpi_prince/prince_ref.h
+++ b/vendor/lowrisc_ip/ip/prim/dv/prim_prince/crypto_dpi_prince/prince_ref.h
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Copyright 2016 Sebastien Riou
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
diff --git a/vendor/lowrisc_ip/ip/prim/dv/prim_prince/data/prim_prince_cover.cfg b/vendor/lowrisc_ip/ip/prim/dv/prim_prince/data/prim_prince_cover.cfg
index 574da3b3fb..d61d0f0128 100644
--- a/vendor/lowrisc_ip/ip/prim/dv/prim_prince/data/prim_prince_cover.cfg
+++ b/vendor/lowrisc_ip/ip/prim/dv/prim_prince/data/prim_prince_cover.cfg
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/dv/prim_prince/prim_prince_sim.core b/vendor/lowrisc_ip/ip/prim/dv/prim_prince/prim_prince_sim.core
index 38007c0852..35169eb250 100644
--- a/vendor/lowrisc_ip/ip/prim/dv/prim_prince/prim_prince_sim.core
+++ b/vendor/lowrisc_ip/ip/prim/dv/prim_prince/prim_prince_sim.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:dv:prim_prince_sim:0.1"
diff --git a/vendor/lowrisc_ip/ip/prim/dv/prim_prince/prim_prince_sim_cfg.hjson b/vendor/lowrisc_ip/ip/prim/dv/prim_prince/prim_prince_sim_cfg.hjson
index c1253abf2d..6b7504cd00 100644
--- a/vendor/lowrisc_ip/ip/prim/dv/prim_prince/prim_prince_sim_cfg.hjson
+++ b/vendor/lowrisc_ip/ip/prim/dv/prim_prince/prim_prince_sim_cfg.hjson
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 {
diff --git a/vendor/lowrisc_ip/ip/prim/dv/prim_prince/tb/prim_prince_tb.sv b/vendor/lowrisc_ip/ip/prim/dv/prim_prince/tb/prim_prince_tb.sv
index 4d54ba89fc..6a2bb7b3ad 100644
--- a/vendor/lowrisc_ip/ip/prim/dv/prim_prince/tb/prim_prince_tb.sv
+++ b/vendor/lowrisc_ip/ip/prim/dv/prim_prince/tb/prim_prince_tb.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/dv/prim_ram_scr/cpp/scramble_model.cc b/vendor/lowrisc_ip/ip/prim/dv/prim_ram_scr/cpp/scramble_model.cc
index 14a67901c6..da3da525f1 100644
--- a/vendor/lowrisc_ip/ip/prim/dv/prim_ram_scr/cpp/scramble_model.cc
+++ b/vendor/lowrisc_ip/ip/prim/dv/prim_ram_scr/cpp/scramble_model.cc
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
@@ -21,7 +21,7 @@ uint8_t PRESENT_SBOX4_INV[] = {0x5, 0xe, 0xf, 0x8, 0xc, 0x1, 0x2, 0xd,
 
 static const uint32_t kNumAddrSubstPermRounds = 2;
 static const uint32_t kNumDataSubstPermRounds = 2;
-static const uint32_t kNumPrinceHalfRounds = 2;
+static const uint32_t kNumPrinceHalfRounds = 3;
 
 static std::vector<uint8_t> byte_reverse_vector(
     const std::vector<uint8_t> &vec_in) {
diff --git a/vendor/lowrisc_ip/ip/prim/dv/prim_ram_scr/cpp/scramble_model.core b/vendor/lowrisc_ip/ip/prim/dv/prim_ram_scr/cpp/scramble_model.core
index 2ab96b8f51..a7fe162a1c 100644
--- a/vendor/lowrisc_ip/ip/prim/dv/prim_ram_scr/cpp/scramble_model.core
+++ b/vendor/lowrisc_ip/ip/prim/dv/prim_ram_scr/cpp/scramble_model.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/dv/prim_ram_scr/cpp/scramble_model.h b/vendor/lowrisc_ip/ip/prim/dv/prim_ram_scr/cpp/scramble_model.h
index 0092cfab6e..92a214fa94 100644
--- a/vendor/lowrisc_ip/ip/prim/dv/prim_ram_scr/cpp/scramble_model.h
+++ b/vendor/lowrisc_ip/ip/prim/dv/prim_ram_scr/cpp/scramble_model.h
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/dv/prim_secded/secded_enc.c b/vendor/lowrisc_ip/ip/prim/dv/prim_secded/secded_enc.c
index e61909f796..c4e447c954 100644
--- a/vendor/lowrisc_ip/ip/prim/dv/prim_secded/secded_enc.c
+++ b/vendor/lowrisc_ip/ip/prim/dv/prim_secded/secded_enc.c
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/dv/prim_secded/secded_enc.core b/vendor/lowrisc_ip/ip/prim/dv/prim_secded/secded_enc.core
index 702da67819..f8d3641ad7 100644
--- a/vendor/lowrisc_ip/ip/prim/dv/prim_secded/secded_enc.core
+++ b/vendor/lowrisc_ip/ip/prim/dv/prim_secded/secded_enc.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim/dv/prim_secded/secded_enc.h b/vendor/lowrisc_ip/ip/prim/dv/prim_secded/secded_enc.h
index 776dbc8712..f046f1d995 100644
--- a/vendor/lowrisc_ip/ip/prim/dv/prim_secded/secded_enc.h
+++ b/vendor/lowrisc_ip/ip/prim/dv/prim_secded/secded_enc.h
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/prim_alert_rxtx_async_fatal_fpv.core b/vendor/lowrisc_ip/ip/prim/fpv/prim_alert_rxtx_async_fatal_fpv.core
index 677a3fef15..bb423db925 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/prim_alert_rxtx_async_fatal_fpv.core
+++ b/vendor/lowrisc_ip/ip/prim/fpv/prim_alert_rxtx_async_fatal_fpv.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:fpv:prim_alert_rxtx_async_fatal_fpv:0.1"
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/prim_alert_rxtx_async_fpv.core b/vendor/lowrisc_ip/ip/prim/fpv/prim_alert_rxtx_async_fpv.core
index c1907feff6..52fa7bc33f 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/prim_alert_rxtx_async_fpv.core
+++ b/vendor/lowrisc_ip/ip/prim/fpv/prim_alert_rxtx_async_fpv.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:fpv:prim_alert_rxtx_async_fpv:0.1"
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/prim_alert_rxtx_fatal_fpv.core b/vendor/lowrisc_ip/ip/prim/fpv/prim_alert_rxtx_fatal_fpv.core
index 28a286cd8f..abb7ff0418 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/prim_alert_rxtx_fatal_fpv.core
+++ b/vendor/lowrisc_ip/ip/prim/fpv/prim_alert_rxtx_fatal_fpv.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:fpv:prim_alert_rxtx_fatal_fpv:0.1"
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/prim_alert_rxtx_fpv.core b/vendor/lowrisc_ip/ip/prim/fpv/prim_alert_rxtx_fpv.core
index 8c87903430..415258407d 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/prim_alert_rxtx_fpv.core
+++ b/vendor/lowrisc_ip/ip/prim/fpv/prim_alert_rxtx_fpv.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:fpv:prim_alert_rxtx_fpv:0.1"
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/prim_arbiter_fixed_fpv.core b/vendor/lowrisc_ip/ip/prim/fpv/prim_arbiter_fixed_fpv.core
index e1334220c1..8388ce6220 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/prim_arbiter_fixed_fpv.core
+++ b/vendor/lowrisc_ip/ip/prim/fpv/prim_arbiter_fixed_fpv.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:fpv:prim_arbiter_fixed_fpv:0.1"
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/prim_arbiter_ppc_fpv.core b/vendor/lowrisc_ip/ip/prim/fpv/prim_arbiter_ppc_fpv.core
index 48c883558e..e6c85849f1 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/prim_arbiter_ppc_fpv.core
+++ b/vendor/lowrisc_ip/ip/prim/fpv/prim_arbiter_ppc_fpv.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:fpv:prim_arbiter_ppc_fpv:0.1"
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/prim_arbiter_tree_fpv.core b/vendor/lowrisc_ip/ip/prim/fpv/prim_arbiter_tree_fpv.core
index 684d5c3d63..ecdff0cf89 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/prim_arbiter_tree_fpv.core
+++ b/vendor/lowrisc_ip/ip/prim/fpv/prim_arbiter_tree_fpv.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:fpv:prim_arbiter_tree_fpv:0.1"
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/prim_count_expected_failure.hjson b/vendor/lowrisc_ip/ip/prim/fpv/prim_count_expected_failure.hjson
deleted file mode 100644
index 30df389f5b..0000000000
--- a/vendor/lowrisc_ip/ip/prim/fpv/prim_count_expected_failure.hjson
+++ /dev/null
@@ -1,13 +0,0 @@
-// Copyright lowRISC contributors.
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-//
-// These two assertions are unreachable in the prim_count environment unless the counters are
-// forced to have different output.
-{
-  unreachable:
-  [
-    prim_count_tb.u_counter.CntErrForward_A:precondition1
-    prim_count_tb.u_counter.CntErrBackward_A:precondition1
-  ]
-}
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/prim_count_fpv.core b/vendor/lowrisc_ip/ip/prim/fpv/prim_count_fpv.core
index dcd2bde345..2a2b93032d 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/prim_count_fpv.core
+++ b/vendor/lowrisc_ip/ip/prim/fpv/prim_count_fpv.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:fpv:prim_count_fpv:0.1"
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/prim_esc_rxtx_fpv.core b/vendor/lowrisc_ip/ip/prim/fpv/prim_esc_rxtx_fpv.core
index 7538ca351d..006e4adac9 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/prim_esc_rxtx_fpv.core
+++ b/vendor/lowrisc_ip/ip/prim/fpv/prim_esc_rxtx_fpv.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:fpv:prim_esc_rxtx_fpv:0.1"
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/prim_fifo_async_sram_adapter_fpv.core b/vendor/lowrisc_ip/ip/prim/fpv/prim_fifo_async_sram_adapter_fpv.core
index 4c8c9241e0..5578121586 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/prim_fifo_async_sram_adapter_fpv.core
+++ b/vendor/lowrisc_ip/ip/prim/fpv/prim_fifo_async_sram_adapter_fpv.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:fpv:prim_fifo_async_sram_adapter_fpv:0.1"
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/prim_fifo_sync_fpv.core b/vendor/lowrisc_ip/ip/prim/fpv/prim_fifo_sync_fpv.core
index d3f1baadda..e3d1560def 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/prim_fifo_sync_fpv.core
+++ b/vendor/lowrisc_ip/ip/prim/fpv/prim_fifo_sync_fpv.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:fpv:prim_fifo_sync_fpv:0.1"
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/prim_keccak_fpv.core b/vendor/lowrisc_ip/ip/prim/fpv/prim_keccak_fpv.core
index b60df136b6..ae1a1cd838 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/prim_keccak_fpv.core
+++ b/vendor/lowrisc_ip/ip/prim/fpv/prim_keccak_fpv.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:fpv:prim_keccak_fpv:0.1"
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/prim_lfsr_fpv.core b/vendor/lowrisc_ip/ip/prim/fpv/prim_lfsr_fpv.core
index 824f212933..1b50392c52 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/prim_lfsr_fpv.core
+++ b/vendor/lowrisc_ip/ip/prim/fpv/prim_lfsr_fpv.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:fpv:prim_lfsr_fpv:0.1"
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/prim_packer_fpv.core b/vendor/lowrisc_ip/ip/prim/fpv/prim_packer_fpv.core
index 3e147f7d58..d05eb7717d 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/prim_packer_fpv.core
+++ b/vendor/lowrisc_ip/ip/prim/fpv/prim_packer_fpv.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_22_16_fpv.core b/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_22_16_fpv.core
index 5d9ab391f5..cd4dfb98ab 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_22_16_fpv.core
+++ b/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_22_16_fpv.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:fpv:prim_secded_22_16_fpv:0.1"
@@ -30,4 +30,3 @@ targets:
 
   lint:
     <<: *default_target
-
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_28_22_fpv.core b/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_28_22_fpv.core
index 97f4f4eb52..2dadba8771 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_28_22_fpv.core
+++ b/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_28_22_fpv.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:fpv:prim_secded_28_22_fpv:0.1"
@@ -30,4 +30,3 @@ targets:
 
   lint:
     <<: *default_target
-
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_39_32_fpv.core b/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_39_32_fpv.core
index c2391519fc..fe938bb162 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_39_32_fpv.core
+++ b/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_39_32_fpv.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:fpv:prim_secded_39_32_fpv:0.1"
@@ -30,4 +30,3 @@ targets:
 
   lint:
     <<: *default_target
-
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_64_57_fpv.core b/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_64_57_fpv.core
index 2ab02bcfa6..51f8ec680d 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_64_57_fpv.core
+++ b/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_64_57_fpv.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:fpv:prim_secded_64_57_fpv:0.1"
@@ -30,4 +30,3 @@ targets:
 
   lint:
     <<: *default_target
-
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_72_64_fpv.core b/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_72_64_fpv.core
index cc5aeb8785..768459b832 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_72_64_fpv.core
+++ b/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_72_64_fpv.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:fpv:prim_secded_72_64_fpv:0.1"
@@ -30,4 +30,3 @@ targets:
 
   lint:
     <<: *default_target
-
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_hamming_22_16_fpv.core b/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_hamming_22_16_fpv.core
index 4910804091..93295d0898 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_hamming_22_16_fpv.core
+++ b/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_hamming_22_16_fpv.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:fpv:prim_secded_hamming_22_16_fpv:0.1"
@@ -30,4 +30,3 @@ targets:
 
   lint:
     <<: *default_target
-
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_hamming_39_32_fpv.core b/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_hamming_39_32_fpv.core
index b73f22b995..26328be42c 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_hamming_39_32_fpv.core
+++ b/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_hamming_39_32_fpv.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:fpv:prim_secded_hamming_39_32_fpv:0.1"
@@ -30,4 +30,3 @@ targets:
 
   lint:
     <<: *default_target
-
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_hamming_72_64_fpv.core b/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_hamming_72_64_fpv.core
index 5f9f10218c..0d7d9f84af 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_hamming_72_64_fpv.core
+++ b/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_hamming_72_64_fpv.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:fpv:prim_secded_hamming_72_64_fpv:0.1"
@@ -30,4 +30,3 @@ targets:
 
   lint:
     <<: *default_target
-
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_hamming_76_68_fpv.core b/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_hamming_76_68_fpv.core
index 0ea18cb2f8..2b45f51ee2 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_hamming_76_68_fpv.core
+++ b/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_hamming_76_68_fpv.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:fpv:prim_secded_hamming_76_68_fpv:0.1"
@@ -30,4 +30,3 @@ targets:
 
   lint:
     <<: *default_target
-
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_inv_22_16_fpv.core b/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_inv_22_16_fpv.core
index 4094c008f5..8f23957c93 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_inv_22_16_fpv.core
+++ b/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_inv_22_16_fpv.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:fpv:prim_secded_inv_22_16_fpv:0.1"
@@ -30,4 +30,3 @@ targets:
 
   lint:
     <<: *default_target
-
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_inv_28_22_fpv.core b/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_inv_28_22_fpv.core
index d68bb35359..21c9627a6b 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_inv_28_22_fpv.core
+++ b/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_inv_28_22_fpv.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:fpv:prim_secded_inv_28_22_fpv:0.1"
@@ -30,4 +30,3 @@ targets:
 
   lint:
     <<: *default_target
-
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_inv_39_32_fpv.core b/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_inv_39_32_fpv.core
index 07df9f1360..953cb683ee 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_inv_39_32_fpv.core
+++ b/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_inv_39_32_fpv.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:fpv:prim_secded_inv_39_32_fpv:0.1"
@@ -30,4 +30,3 @@ targets:
 
   lint:
     <<: *default_target
-
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_inv_64_57_fpv.core b/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_inv_64_57_fpv.core
index d5d7f57a47..09919615ea 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_inv_64_57_fpv.core
+++ b/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_inv_64_57_fpv.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:fpv:prim_secded_inv_64_57_fpv:0.1"
@@ -30,4 +30,3 @@ targets:
 
   lint:
     <<: *default_target
-
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_inv_72_64_fpv.core b/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_inv_72_64_fpv.core
index 755eaf01ef..78f6c76a34 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_inv_72_64_fpv.core
+++ b/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_inv_72_64_fpv.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:fpv:prim_secded_inv_72_64_fpv:0.1"
@@ -30,4 +30,3 @@ targets:
 
   lint:
     <<: *default_target
-
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_inv_hamming_22_16_fpv.core b/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_inv_hamming_22_16_fpv.core
index 9ab87ff20b..77c801ea21 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_inv_hamming_22_16_fpv.core
+++ b/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_inv_hamming_22_16_fpv.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:fpv:prim_secded_inv_hamming_22_16_fpv:0.1"
@@ -30,4 +30,3 @@ targets:
 
   lint:
     <<: *default_target
-
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_inv_hamming_39_32_fpv.core b/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_inv_hamming_39_32_fpv.core
index 786a289830..e5a5b2a30c 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_inv_hamming_39_32_fpv.core
+++ b/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_inv_hamming_39_32_fpv.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:fpv:prim_secded_inv_hamming_39_32_fpv:0.1"
@@ -30,4 +30,3 @@ targets:
 
   lint:
     <<: *default_target
-
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_inv_hamming_72_64_fpv.core b/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_inv_hamming_72_64_fpv.core
index 08ef86aa56..0046ce365b 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_inv_hamming_72_64_fpv.core
+++ b/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_inv_hamming_72_64_fpv.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:fpv:prim_secded_inv_hamming_72_64_fpv:0.1"
@@ -30,4 +30,3 @@ targets:
 
   lint:
     <<: *default_target
-
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_inv_hamming_76_68_fpv.core b/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_inv_hamming_76_68_fpv.core
index 750f67acaf..1c7a6e2162 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_inv_hamming_76_68_fpv.core
+++ b/vendor/lowrisc_ip/ip/prim/fpv/prim_secded_inv_hamming_76_68_fpv.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:fpv:prim_secded_inv_hamming_76_68_fpv:0.1"
@@ -30,4 +30,3 @@ targets:
 
   lint:
     <<: *default_target
-
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_alert_rxtx_async_bind_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_alert_rxtx_async_bind_fpv.sv
index db33bf2854..3a3254a07c 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_alert_rxtx_async_bind_fpv.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_alert_rxtx_async_bind_fpv.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_alert_rxtx_async_fatal_bind_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_alert_rxtx_async_fatal_bind_fpv.sv
index 3a66f27056..796496e83c 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_alert_rxtx_async_fatal_bind_fpv.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_alert_rxtx_async_fatal_bind_fpv.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_alert_rxtx_async_fatal_tb.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_alert_rxtx_async_fatal_tb.sv
index 267a0ab46f..e0bf1f2c63 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_alert_rxtx_async_fatal_tb.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_alert_rxtx_async_fatal_tb.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_alert_rxtx_async_tb.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_alert_rxtx_async_tb.sv
index 0327985ff8..d36700eb64 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_alert_rxtx_async_tb.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_alert_rxtx_async_tb.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_alert_rxtx_bind_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_alert_rxtx_bind_fpv.sv
index f3ac2efd5b..696dddda1d 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_alert_rxtx_bind_fpv.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_alert_rxtx_bind_fpv.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_alert_rxtx_fatal_bind_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_alert_rxtx_fatal_bind_fpv.sv
index c3f33b654e..958325f646 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_alert_rxtx_fatal_bind_fpv.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_alert_rxtx_fatal_bind_fpv.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_alert_rxtx_fatal_tb.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_alert_rxtx_fatal_tb.sv
index 86376d2f26..0e1b0eae9c 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_alert_rxtx_fatal_tb.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_alert_rxtx_fatal_tb.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_alert_rxtx_tb.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_alert_rxtx_tb.sv
index a7575afeda..a77f582954 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_alert_rxtx_tb.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_alert_rxtx_tb.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_arbiter_fixed_tb.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_arbiter_fixed_tb.sv
index be7a57276a..1ec1ffe0bd 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_arbiter_fixed_tb.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_arbiter_fixed_tb.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_arbiter_ppc_tb.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_arbiter_ppc_tb.sv
index 087b2dd39f..9de968776e 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_arbiter_ppc_tb.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_arbiter_ppc_tb.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_arbiter_tree_tb.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_arbiter_tree_tb.sv
index d37ea889ef..43fe0a6ac1 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_arbiter_tree_tb.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_arbiter_tree_tb.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_count_tb.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_count_tb.sv
index a3cb8daec6..83c7cd7948 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_count_tb.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_count_tb.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
@@ -19,8 +19,9 @@ module prim_count_tb #(
   input incr_en_i,
   input decr_en_i,
   input [Width-1:0] step_i,
+  input commit_i,
   output logic [Width-1:0] cnt_o,
-  output logic [Width-1:0] cnt_next_o,
+  output logic [Width-1:0] cnt_after_commit_o,
   output logic err_o
 );
 
@@ -36,8 +37,9 @@ module prim_count_tb #(
     .incr_en_i,
     .decr_en_i,
     .step_i,
+    .commit_i,
     .cnt_o,
-    .cnt_next_o,
+    .cnt_after_commit_o,
     .err_o
   );
 
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_esc_rxtx_bind_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_esc_rxtx_bind_fpv.sv
index 80c47bbd24..34468ec396 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_esc_rxtx_bind_fpv.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_esc_rxtx_bind_fpv.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
@@ -6,18 +6,19 @@
 module prim_esc_rxtx_bind_fpv;
 
   bind prim_esc_rxtx_fpv
-        prim_esc_rxtx_assert_fpv prim_esc_rxtx_assert_fpv (
-    .clk_i       ,
-    .rst_ni      ,
-    .resp_err_pi ,
-    .resp_err_ni ,
-    .esc_err_pi  ,
-    .esc_err_ni  ,
-    .esc_req_i   ,
-    .ping_req_i  ,
-    .ping_ok_o   ,
-    .integ_fail_o,
-    .esc_req_o
-  );
+    prim_esc_rxtx_assert_fpv #(TimeoutCntDw(TimeoutCntDw))
+    prim_esc_rxtx_assert_fpv (
+      .clk_i       ,
+      .rst_ni      ,
+      .resp_err_pi ,
+      .resp_err_ni ,
+      .esc_err_pi  ,
+      .esc_err_ni  ,
+      .esc_req_i   ,
+      .ping_req_i  ,
+      .ping_ok_o   ,
+      .integ_fail_o,
+      .esc_req_o
+    );
 
 endmodule : prim_esc_rxtx_bind_fpv
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_esc_rxtx_tb.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_esc_rxtx_tb.sv
index 7e27902ee4..f7d77ce59d 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_esc_rxtx_tb.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_esc_rxtx_tb.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
@@ -23,6 +23,10 @@ module prim_esc_rxtx_tb
   output logic esc_req_o
 );
 
+  // This gets passed to the prim_esc_receiver that we instantiate below. Doing so reduces the state
+  // space for the counter from 2**24 to 2**6, speeding up convergence.
+  localparam int TimeoutCntDw = 6;
+
   esc_rx_t esc_rx_in, esc_rx_out;
   esc_tx_t esc_tx_in, esc_tx_out;
 
@@ -43,9 +47,7 @@ module prim_esc_rxtx_tb
   );
 
   prim_esc_receiver #(
-    // This reduces the state space for this counter
-    // from 2**24 to 2**6 to speed up convergence.
-    .TimeoutCntDw(6)
+    .TimeoutCntDw(TimeoutCntDw)
   ) u_prim_esc_receiver (
     .clk_i    ,
     .rst_ni   ,
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_fifo_async_sram_adapter_tb.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_fifo_async_sram_adapter_tb.sv
index 889796eae5..4faac74935 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_fifo_async_sram_adapter_tb.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_fifo_async_sram_adapter_tb.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_fifo_sync_bind_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_fifo_sync_bind_fpv.sv
index e734d98088..895a9e280f 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_fifo_sync_bind_fpv.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_fifo_sync_bind_fpv.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_fifo_sync_tb.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_fifo_sync_tb.sv
index 5dfa5bc926..a879001ec2 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_fifo_sync_tb.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_fifo_sync_tb.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_keccak_tb.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_keccak_tb.sv
index f5d0c3d526..dec2c83f84 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_keccak_tb.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_keccak_tb.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
@@ -71,4 +71,3 @@ module prim_keccak_tb #(
   `ASSERT(DigestForData0TestSHA3_256_A, done_o |-> state_o[255:0] == digest_0)
 
 endmodule
-
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_lfsr_tb.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_lfsr_tb.sv
index dd2c9eb5a7..362fb4639c 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_lfsr_tb.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_lfsr_tb.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_packer_tb.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_packer_tb.sv
index 61469635e7..91ef8f0672 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_packer_tb.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_packer_tb.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_22_16_bind_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_22_16_bind_fpv.sv
index 1102d95663..81f32a25fc 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_22_16_bind_fpv.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_22_16_bind_fpv.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_22_16_tb.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_22_16_tb.sv
index e7da60e9fd..63adab839a 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_22_16_tb.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_22_16_tb.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_28_22_bind_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_28_22_bind_fpv.sv
index 06a0ab797a..3d4ccd7f7c 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_28_22_bind_fpv.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_28_22_bind_fpv.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_28_22_tb.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_28_22_tb.sv
index 6a6ff79279..1774a70021 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_28_22_tb.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_28_22_tb.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_39_32_bind_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_39_32_bind_fpv.sv
index 1215d79e34..b75a16962f 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_39_32_bind_fpv.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_39_32_bind_fpv.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_39_32_tb.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_39_32_tb.sv
index a497af987b..b79de1aa45 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_39_32_tb.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_39_32_tb.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_64_57_bind_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_64_57_bind_fpv.sv
index 0acfbe8e6f..e1bbf48391 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_64_57_bind_fpv.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_64_57_bind_fpv.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_64_57_tb.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_64_57_tb.sv
index 9cc9ef368b..fd338c148e 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_64_57_tb.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_64_57_tb.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_72_64_bind_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_72_64_bind_fpv.sv
index 31a1657ca9..5f205965fa 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_72_64_bind_fpv.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_72_64_bind_fpv.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_72_64_tb.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_72_64_tb.sv
index f653524d8d..f20c24bc10 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_72_64_tb.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_72_64_tb.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_22_16_bind_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_22_16_bind_fpv.sv
index 8ecfc23479..d036c6aaaa 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_22_16_bind_fpv.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_22_16_bind_fpv.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_22_16_tb.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_22_16_tb.sv
index cffae6b684..8eb152716c 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_22_16_tb.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_22_16_tb.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_39_32_bind_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_39_32_bind_fpv.sv
index 35eb0bf22a..141a4a2c1e 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_39_32_bind_fpv.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_39_32_bind_fpv.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_39_32_tb.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_39_32_tb.sv
index 5a59e1510a..fcd7bc6702 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_39_32_tb.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_39_32_tb.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_72_64_bind_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_72_64_bind_fpv.sv
index bf09d37601..90d73217b3 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_72_64_bind_fpv.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_72_64_bind_fpv.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_72_64_tb.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_72_64_tb.sv
index 5f4c8e3bb5..2e222631fd 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_72_64_tb.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_72_64_tb.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_76_68_bind_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_76_68_bind_fpv.sv
index 4962eb1a1d..44a8a1dac6 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_76_68_bind_fpv.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_76_68_bind_fpv.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_76_68_tb.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_76_68_tb.sv
index a599ce1d95..bef37cfafe 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_76_68_tb.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_76_68_tb.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_22_16_bind_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_22_16_bind_fpv.sv
index 96d0c95a44..404c4649f1 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_22_16_bind_fpv.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_22_16_bind_fpv.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_22_16_tb.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_22_16_tb.sv
index aaa51230df..6f6ef0a581 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_22_16_tb.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_22_16_tb.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_28_22_bind_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_28_22_bind_fpv.sv
index 5b114b2c37..27eb0cbb5a 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_28_22_bind_fpv.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_28_22_bind_fpv.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_28_22_tb.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_28_22_tb.sv
index ff4caf40d4..cc70790b98 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_28_22_tb.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_28_22_tb.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_39_32_bind_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_39_32_bind_fpv.sv
index a115964894..03a366e673 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_39_32_bind_fpv.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_39_32_bind_fpv.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_39_32_tb.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_39_32_tb.sv
index b1c5af62a8..71ec6b0f45 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_39_32_tb.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_39_32_tb.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_64_57_bind_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_64_57_bind_fpv.sv
index 81bb663f05..311459b65b 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_64_57_bind_fpv.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_64_57_bind_fpv.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_64_57_tb.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_64_57_tb.sv
index fd0751dde3..34799d5f3d 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_64_57_tb.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_64_57_tb.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_72_64_bind_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_72_64_bind_fpv.sv
index 3a37a45bbb..2aa9b43603 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_72_64_bind_fpv.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_72_64_bind_fpv.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_72_64_tb.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_72_64_tb.sv
index 1d2c6d8d45..700e92bfaa 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_72_64_tb.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_72_64_tb.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_22_16_bind_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_22_16_bind_fpv.sv
index 07e95af133..f7afc99c49 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_22_16_bind_fpv.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_22_16_bind_fpv.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_22_16_tb.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_22_16_tb.sv
index 6397d77b8d..b572bbc87d 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_22_16_tb.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_22_16_tb.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_39_32_bind_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_39_32_bind_fpv.sv
index a364b15de9..2be0b2af7c 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_39_32_bind_fpv.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_39_32_bind_fpv.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_39_32_tb.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_39_32_tb.sv
index 7d1fcdf58c..fd4b03a133 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_39_32_tb.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_39_32_tb.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_72_64_bind_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_72_64_bind_fpv.sv
index 4c4bc3a3c2..0d5e275d3b 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_72_64_bind_fpv.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_72_64_bind_fpv.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_72_64_tb.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_72_64_tb.sv
index 52acaddb20..561e53c70f 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_72_64_tb.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_72_64_tb.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_76_68_bind_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_76_68_bind_fpv.sv
index 8c2bac91ca..fb71614689 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_76_68_bind_fpv.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_76_68_bind_fpv.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_76_68_tb.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_76_68_tb.sv
index c635bb11b6..2f7275d284 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_76_68_tb.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_76_68_tb.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_alert_rxtx_assert_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_alert_rxtx_assert_fpv.sv
index ebdaf70401..22d219415b 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_alert_rxtx_assert_fpv.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_alert_rxtx_assert_fpv.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_alert_rxtx_async_assert_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_alert_rxtx_async_assert_fpv.sv
index eaa8c03572..486c5f6f5c 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_alert_rxtx_async_assert_fpv.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_alert_rxtx_async_assert_fpv.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_esc_rxtx_assert_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_esc_rxtx_assert_fpv.sv
index 165f85ee4a..d39fae3ff1 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_esc_rxtx_assert_fpv.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_esc_rxtx_assert_fpv.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
@@ -7,7 +7,11 @@
 
 `include "prim_assert.sv"
 
-module prim_esc_rxtx_assert_fpv (
+module prim_esc_rxtx_assert_fpv
+#(
+  // Specialise this as part of the binding to shrink the state space that we expect in the counter.
+  parameter int TimeoutCntDw = 32
+) (
   input        clk_i,
   input        rst_ni,
   // for sigint error injection only
@@ -138,13 +142,18 @@ module prim_esc_rxtx_assert_fpv (
       rst_ni ||
       error_present)
 
+  // The assertions below use TimeoutCntDw to bound some sequence lengths. Add an assertion to check
+  // it matches the parameter in the design.
+  `ASSERT(TimeoutCntDwConsistent_A,
+          TimeoutCntDw == prim_esc_rxtx_fpv.u_prim_esc_receiver.TimeoutCntDw)
+
   // check that auto escalation timeout does not trigger prematurely.
   // this requires that no errors have been present so far.
   `ASSERT(AutoEscalation0_A,
       ping_req_i &&
       ping_ok_o &&
       !esc_req_o ##1
-      !ping_req_i [*0 : 2**prim_esc_rxtx_fpv.u_prim_esc_receiver.TimeoutCntDw - 4]
+      !ping_req_i [*0 : 2**TimeoutCntDw - 4]
       |->
       !esc_req_o,
       clk_i,
@@ -158,7 +167,7 @@ module prim_esc_rxtx_assert_fpv (
       ping_req_i &&
       ping_ok_o &&
       !esc_req_o ##1
-      !ping_req_i [* 2**prim_esc_rxtx_fpv.u_prim_esc_receiver.TimeoutCntDw - 3 : $]
+      !ping_req_i [* 2**TimeoutCntDw - 3 : $]
       |->
       esc_req_o,
       clk_i,
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_fifo_sync_assert_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_fifo_sync_assert_fpv.sv
index 8cd7a3f43a..7dd9bfa891 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_fifo_sync_assert_fpv.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_fifo_sync_assert_fpv.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
@@ -63,9 +63,9 @@ module prim_fifo_sync_assert_fpv #(
               fifo <= wdata_i;
             end else if (wvalid_i && wready_o) begin
               fifo <= wdata_i;
-              ref_depth <= ref_depth + 1;
+              ref_depth <= ref_depth + (DepthW+2)'(1);
             end else if (rvalid_o && rready_i) begin
-              ref_depth <= ref_depth - 1;
+              ref_depth <= ref_depth - (DepthW+2)'(1);
             end
           end
         end
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_22_16_assert_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_22_16_assert_fpv.sv
index 8e65474384..aa7629c3b7 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_22_16_assert_fpv.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_22_16_assert_fpv.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_28_22_assert_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_28_22_assert_fpv.sv
index 31da73c900..cd697b2500 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_28_22_assert_fpv.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_28_22_assert_fpv.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_39_32_assert_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_39_32_assert_fpv.sv
index ba927d9714..c06972da6d 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_39_32_assert_fpv.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_39_32_assert_fpv.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_64_57_assert_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_64_57_assert_fpv.sv
index 746d181643..836129fb36 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_64_57_assert_fpv.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_64_57_assert_fpv.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_72_64_assert_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_72_64_assert_fpv.sv
index 5313f5dcfd..182b9b7207 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_72_64_assert_fpv.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_72_64_assert_fpv.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_hamming_22_16_assert_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_hamming_22_16_assert_fpv.sv
index 6e0a0790d6..d42cf38e82 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_hamming_22_16_assert_fpv.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_hamming_22_16_assert_fpv.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_hamming_39_32_assert_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_hamming_39_32_assert_fpv.sv
index 9bd5e30d46..eb37711f5d 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_hamming_39_32_assert_fpv.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_hamming_39_32_assert_fpv.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_hamming_72_64_assert_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_hamming_72_64_assert_fpv.sv
index c3eadf4b0b..f9071ae468 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_hamming_72_64_assert_fpv.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_hamming_72_64_assert_fpv.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_hamming_76_68_assert_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_hamming_76_68_assert_fpv.sv
index 748a0910a6..36486b8d49 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_hamming_76_68_assert_fpv.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_hamming_76_68_assert_fpv.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_22_16_assert_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_22_16_assert_fpv.sv
index 2e9cb54a26..2d73f7062a 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_22_16_assert_fpv.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_22_16_assert_fpv.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_28_22_assert_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_28_22_assert_fpv.sv
index 42632ed3dd..450e4aa3fd 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_28_22_assert_fpv.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_28_22_assert_fpv.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_39_32_assert_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_39_32_assert_fpv.sv
index 0d0b7d74bb..1e9f89c821 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_39_32_assert_fpv.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_39_32_assert_fpv.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_64_57_assert_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_64_57_assert_fpv.sv
index 6c7e8ac46f..7d77538324 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_64_57_assert_fpv.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_64_57_assert_fpv.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_72_64_assert_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_72_64_assert_fpv.sv
index 625af5274c..43a2f69911 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_72_64_assert_fpv.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_72_64_assert_fpv.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_hamming_22_16_assert_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_hamming_22_16_assert_fpv.sv
index 30b9bfea63..8914863f83 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_hamming_22_16_assert_fpv.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_hamming_22_16_assert_fpv.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_hamming_39_32_assert_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_hamming_39_32_assert_fpv.sv
index 05a414ae04..10c81b9b30 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_hamming_39_32_assert_fpv.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_hamming_39_32_assert_fpv.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_hamming_72_64_assert_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_hamming_72_64_assert_fpv.sv
index 229ae7c221..74d3368937 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_hamming_72_64_assert_fpv.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_hamming_72_64_assert_fpv.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_hamming_76_68_assert_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_hamming_76_68_assert_fpv.sv
index 41024b95d5..734d078eba 100644
--- a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_hamming_76_68_assert_fpv.sv
+++ b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_hamming_76_68_assert_fpv.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim.vlt b/vendor/lowrisc_ip/ip/prim/lint/prim.vlt
index bff544e585..755169237a 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim.vlt
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim.vlt
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim.waiver b/vendor/lowrisc_ip/ip/prim/lint/prim.waiver
index 1a495fe9f1..877ff83192 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim.waiver
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_and2.waiver b/vendor/lowrisc_ip/ip/prim/lint/prim_and2.waiver
index 25e90e76e2..0bb3867df5 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_and2.waiver
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_and2.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_arbiter.vlt b/vendor/lowrisc_ip/ip/prim/lint/prim_arbiter.vlt
index 42e44b2baf..5bd76efb2d 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_arbiter.vlt
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_arbiter.vlt
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_arbiter.waiver b/vendor/lowrisc_ip/ip/prim/lint/prim_arbiter.waiver
index 278740cad0..466aae2b10 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_arbiter.waiver
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_arbiter.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_assert.vlt b/vendor/lowrisc_ip/ip/prim/lint/prim_assert.vlt
index affe7509e6..ed01d25f06 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_assert.vlt
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_assert.vlt
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_assert.waiver b/vendor/lowrisc_ip/ip/prim/lint/prim_assert.waiver
index 83286a7cf5..a8e89a4dc7 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_assert.waiver
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_assert.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_buf.waiver b/vendor/lowrisc_ip/ip/prim/lint/prim_buf.waiver
index ea04aab855..99697a0462 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_buf.waiver
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_buf.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_cdc_rand_delay.vlt b/vendor/lowrisc_ip/ip/prim/lint/prim_cdc_rand_delay.vlt
index 6416525da8..bf1b6d9e08 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_cdc_rand_delay.vlt
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_cdc_rand_delay.vlt
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_cdc_rand_delay.waiver b/vendor/lowrisc_ip/ip/prim/lint/prim_cdc_rand_delay.waiver
index db67e54066..ebbcda59ad 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_cdc_rand_delay.waiver
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_cdc_rand_delay.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_cipher.vlt b/vendor/lowrisc_ip/ip/prim/lint/prim_cipher.vlt
index 533b1cd912..ff6555c0cd 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_cipher.vlt
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_cipher.vlt
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_cipher_pkg.waiver b/vendor/lowrisc_ip/ip/prim/lint/prim_cipher_pkg.waiver
index faf69add3b..3c1acb1019 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_cipher_pkg.waiver
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_cipher_pkg.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_clock_buf.waiver b/vendor/lowrisc_ip/ip/prim/lint/prim_clock_buf.waiver
index 9e030adb1a..ec243529aa 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_clock_buf.waiver
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_clock_buf.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_clock_div.waiver b/vendor/lowrisc_ip/ip/prim/lint/prim_clock_div.waiver
index c62bfacc9e..ed3b1237f7 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_clock_div.waiver
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_clock_div.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_clock_gating.waiver b/vendor/lowrisc_ip/ip/prim/lint/prim_clock_gating.waiver
index 0e10939d29..2577668092 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_clock_gating.waiver
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_clock_gating.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_clock_inv.waiver b/vendor/lowrisc_ip/ip/prim/lint/prim_clock_inv.waiver
index 0893e78622..c0db17f2c1 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_clock_inv.waiver
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_clock_inv.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_clock_mux2.waiver b/vendor/lowrisc_ip/ip/prim/lint/prim_clock_mux2.waiver
index 6a82aaa62c..4e7c35b701 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_clock_mux2.waiver
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_clock_mux2.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_count.vlt b/vendor/lowrisc_ip/ip/prim/lint/prim_count.vlt
index b47f59e7fe..d06d166edc 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_count.vlt
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_count.vlt
@@ -1,8 +1,9 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
 `verilator_config
 
-// This parameter is only used in DV/FPV.
+// These parameters are only used in DV/FPV.
 lint_off -rule UNUSED -file "*/rtl/prim_count.sv" -match "*EnableAlertTriggerSVA*"
+lint_off -rule UNUSED -file "*/rtl/prim_count.sv" -match "*PossibleActions*"
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_count.waiver b/vendor/lowrisc_ip/ip/prim/lint/prim_count.waiver
index c0b59c9780..0d8b75e062 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_count.waiver
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_count.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
@@ -6,6 +6,8 @@
 
 waive -rules {PARAM_NOT_USED} -location {prim_count.sv} -regexp {.*EnableAlertTriggerSVA.*} \
       -comment "The disable parameter is used only during DV / FPV."
+waive -rules {PARAM_NOT_USED} -location {prim_count.sv} -regexp {.*PossibleActions.*} \
+      -comment "The parameter is just used to control assertions in DV / FPV."
 
-waive -rules {IFDEF_CODE} -location {prim_count.sv} -msg {Assignment to 'fpv_force' contained within `ifndef 'FPV_SEC_CM_ON' block at} \
-      -comment "This ifdef segment is ok, since it is used to provide the tool with a symbolic variable for error injection during FPV."
+waive -rules {IFDEF_CODE} -location {prim_count.sv} -msg {Assignment to 'fpv_force' contained within `ifndef 'PrimCountFpv' block at} \
+      -comment "This ifdef segment allows us to allow error injection during prim_count FPV."
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_crc32.vlt b/vendor/lowrisc_ip/ip/prim/lint/prim_crc32.vlt
index 85805e661d..7878b6547a 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_crc32.vlt
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_crc32.vlt
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_double_lfsr.vlt b/vendor/lowrisc_ip/ip/prim/lint/prim_double_lfsr.vlt
index fe7645debc..369f066055 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_double_lfsr.vlt
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_double_lfsr.vlt
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
@@ -7,4 +7,3 @@
 // The EnableAlertTriggerSVA parameter is only used by modules bound
 // in for DV testing. Waive the warning that we don't read it.
 lint_off -rule UNUSED -file "*/rtl/prim_double_lfsr.sv" -match "*EnableAlertTriggerSVA*"
-
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_double_lfsr.waiver b/vendor/lowrisc_ip/ip/prim/lint/prim_double_lfsr.waiver
index 5cbfa7eca9..01bcef0f3e 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_double_lfsr.waiver
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_double_lfsr.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_fifo.vlt b/vendor/lowrisc_ip/ip/prim/lint/prim_fifo.vlt
index a05e93724c..63cb741072 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_fifo.vlt
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_fifo.vlt
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_fifo.waiver b/vendor/lowrisc_ip/ip/prim/lint/prim_fifo.waiver
index bf1bb227dc..b8c503a358 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_fifo.waiver
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_fifo.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_flash.waiver b/vendor/lowrisc_ip/ip/prim/lint/prim_flash.waiver
index 3833a524fc..3cb57f8eee 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_flash.waiver
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_flash.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_flop.waiver b/vendor/lowrisc_ip/ip/prim/lint/prim_flop.waiver
index 8659dddb6e..412b43b8a0 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_flop.waiver
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_flop.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_flop_2sync.waiver b/vendor/lowrisc_ip/ip/prim/lint/prim_flop_2sync.waiver
index ea071ebab3..1f6544386a 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_flop_2sync.waiver
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_flop_2sync.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_flop_en.waiver b/vendor/lowrisc_ip/ip/prim/lint/prim_flop_en.waiver
index 3ccaaa7916..3fe276d44d 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_flop_en.waiver
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_flop_en.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_lc_sender.waiver b/vendor/lowrisc_ip/ip/prim/lint/prim_lc_sender.waiver
index e1b921ecb0..337643eea9 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_lc_sender.waiver
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_lc_sender.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
@@ -6,6 +6,3 @@
 
 waive -rules {SAME_NAME_TYPE} -location {prim_lc_sender.sv} -regexp {'ResetValue' is used as an enumeration value here, and as a parameter at prim.*} \
       -comment "Parameter name reuse"
-
-
-
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_lfsr.waiver b/vendor/lowrisc_ip/ip/prim/lint/prim_lfsr.waiver
index 0ce77e4c8d..699015288d 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_lfsr.waiver
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_lfsr.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_max_tree.vlt b/vendor/lowrisc_ip/ip/prim/lint/prim_max_tree.vlt
index fe2485c89c..a05e598490 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_max_tree.vlt
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_max_tree.vlt
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_max_tree.waiver b/vendor/lowrisc_ip/ip/prim/lint/prim_max_tree.waiver
index 8708020109..39c947b449 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_max_tree.waiver
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_max_tree.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_mubi.waiver b/vendor/lowrisc_ip/ip/prim/lint/prim_mubi.waiver
index c7527fbc71..e168a8013e 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_mubi.waiver
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_mubi.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
@@ -6,6 +6,3 @@
 
 waive -rules {SAME_NAME_TYPE} -location {prim_mubi*.sv} -regexp {'ResetValue' is used as an enumeration value here, and as a parameter at prim.*} \
       -comment "Parameter name reuse"
-
-
-
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_onehot_check.vlt b/vendor/lowrisc_ip/ip/prim/lint/prim_onehot_check.vlt
index d7d927baec..15cc9719bb 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_onehot_check.vlt
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_onehot_check.vlt
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_onehot_check.waiver b/vendor/lowrisc_ip/ip/prim/lint/prim_onehot_check.waiver
index 65d5b0b331..f78c4210fd 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_onehot_check.waiver
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_onehot_check.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_onehot_mux.waiver b/vendor/lowrisc_ip/ip/prim/lint/prim_onehot_mux.waiver
index f4b38e2b77..47c88c55c4 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_onehot_mux.waiver
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_onehot_mux.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_otp.waiver b/vendor/lowrisc_ip/ip/prim/lint/prim_otp.waiver
index 593bbc53de..5257870cce 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_otp.waiver
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_otp.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_pad_attr.waiver b/vendor/lowrisc_ip/ip/prim/lint/prim_pad_attr.waiver
index e7bbc6927a..ab5fcaf3aa 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_pad_attr.waiver
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_pad_attr.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_pad_wrapper.waiver b/vendor/lowrisc_ip/ip/prim/lint/prim_pad_wrapper.waiver
index c03e039055..9c1371d5e9 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_pad_wrapper.waiver
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_pad_wrapper.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_ram_1p.waiver b/vendor/lowrisc_ip/ip/prim/lint/prim_ram_1p.waiver
index 5e3de12fbe..0ed0b68718 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_ram_1p.waiver
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_ram_1p.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_ram_1p_adv.waiver b/vendor/lowrisc_ip/ip/prim/lint/prim_ram_1p_adv.waiver
index 6e49dff4c5..dfd8d6f485 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_ram_1p_adv.waiver
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_ram_1p_adv.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_ram_1p_scr.vlt b/vendor/lowrisc_ip/ip/prim/lint/prim_ram_1p_scr.vlt
index 3397d483cb..19b12dc07d 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_ram_1p_scr.vlt
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_ram_1p_scr.vlt
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_ram_1r1w.waiver b/vendor/lowrisc_ip/ip/prim/lint/prim_ram_1r1w.waiver
index b247f1f81d..df081fc0d2 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_ram_1r1w.waiver
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_ram_1r1w.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_ram_2p.waiver b/vendor/lowrisc_ip/ip/prim/lint/prim_ram_2p.waiver
index 474975e478..127ba791db 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_ram_2p.waiver
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_ram_2p.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_reg_we_check.waiver b/vendor/lowrisc_ip/ip/prim/lint/prim_reg_we_check.waiver
index 0c13a949f8..d4306c33e0 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_reg_we_check.waiver
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_reg_we_check.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_rom.waiver b/vendor/lowrisc_ip/ip/prim/lint/prim_rom.waiver
index 5b588b41d4..ac01674def 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_rom.waiver
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_rom.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_rst_sync.waiver b/vendor/lowrisc_ip/ip/prim/lint/prim_rst_sync.waiver
index e05268b2a4..157e36c5f9 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_rst_sync.waiver
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_rst_sync.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_secded.waiver b/vendor/lowrisc_ip/ip/prim/lint/prim_secded.waiver
index ace5295c0a..f419c53548 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_secded.waiver
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_secded.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_sha2.vbl b/vendor/lowrisc_ip/ip/prim/lint/prim_sha2.vbl
index 909ffbd105..f1e966a126 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_sha2.vbl
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_sha2.vbl
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_sha2.vlt b/vendor/lowrisc_ip/ip/prim/lint/prim_sha2.vlt
index 0fdd4a542e..938334012c 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_sha2.vlt
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_sha2.vlt
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_sha2.waiver b/vendor/lowrisc_ip/ip/prim/lint/prim_sha2.waiver
index 16df310f5e..cb5b908e72 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_sha2.waiver
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_sha2.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_sparse_fsm_flop.vlt b/vendor/lowrisc_ip/ip/prim/lint/prim_sparse_fsm_flop.vlt
index 1ae4299afc..3c2a8465ac 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_sparse_fsm_flop.vlt
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_sparse_fsm_flop.vlt
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_sparse_fsm_flop.waiver b/vendor/lowrisc_ip/ip/prim/lint/prim_sparse_fsm_flop.waiver
index 03a5ee8688..c9c9ad4975 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_sparse_fsm_flop.waiver
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_sparse_fsm_flop.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_subreg.vlt b/vendor/lowrisc_ip/ip/prim/lint/prim_subreg.vlt
index 620f1d23b6..689134ef51 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_subreg.vlt
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_subreg.vlt
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_subreg.waiver b/vendor/lowrisc_ip/ip/prim/lint/prim_subreg.waiver
index fe378348a0..d66498b7de 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_subreg.waiver
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_subreg.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_sum_tree.vlt b/vendor/lowrisc_ip/ip/prim/lint/prim_sum_tree.vlt
index bb990bd782..77919bb672 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_sum_tree.vlt
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_sum_tree.vlt
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_sum_tree.waiver b/vendor/lowrisc_ip/ip/prim/lint/prim_sum_tree.waiver
index 7f2fa7c936..60736ce3d3 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_sum_tree.waiver
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_sum_tree.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_trivium.vlt b/vendor/lowrisc_ip/ip/prim/lint/prim_trivium.vlt
index d6149e32e4..d8d9af5607 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_trivium.vlt
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_trivium.vlt
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_trivium.waiver b/vendor/lowrisc_ip/ip/prim/lint/prim_trivium.waiver
index 5f6dec1d0e..71819a5f54 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_trivium.waiver
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_trivium.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_usb_diff_rx.waiver b/vendor/lowrisc_ip/ip/prim/lint/prim_usb_diff_rx.waiver
index 30c0bdbc6d..ed04584b39 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_usb_diff_rx.waiver
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_usb_diff_rx.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_xnor2.waiver b/vendor/lowrisc_ip/ip/prim/lint/prim_xnor2.waiver
index 77f1c6a012..37962c5542 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_xnor2.waiver
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_xnor2.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_xor2.waiver b/vendor/lowrisc_ip/ip/prim/lint/prim_xor2.waiver
index c2625ae025..28da4f0fdd 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_xor2.waiver
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_xor2.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_xoshiro256pp.vlt b/vendor/lowrisc_ip/ip/prim/lint/prim_xoshiro256pp.vlt
index 4fa210f92c..be4fbfe68a 100644
--- a/vendor/lowrisc_ip/ip/prim/lint/prim_xoshiro256pp.vlt
+++ b/vendor/lowrisc_ip/ip/prim/lint/prim_xoshiro256pp.vlt
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/pre_dv/prim_crc32/expected_out.py b/vendor/lowrisc_ip/ip/prim/pre_dv/prim_crc32/expected_out.py
index 62a27eefae..ee474a327c 100644
--- a/vendor/lowrisc_ip/ip/prim/pre_dv/prim_crc32/expected_out.py
+++ b/vendor/lowrisc_ip/ip/prim/pre_dv/prim_crc32/expected_out.py
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/pre_dv/prim_crc32/prim_crc32_sim.cc b/vendor/lowrisc_ip/ip/prim/pre_dv/prim_crc32/prim_crc32_sim.cc
index 9403703df6..1be56fac30 100644
--- a/vendor/lowrisc_ip/ip/prim/pre_dv/prim_crc32/prim_crc32_sim.cc
+++ b/vendor/lowrisc_ip/ip/prim/pre_dv/prim_crc32/prim_crc32_sim.cc
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/pre_dv/prim_crc32/prim_crc32_sim.core b/vendor/lowrisc_ip/ip/prim/pre_dv/prim_crc32/prim_crc32_sim.core
index 7c6e9d4d29..23118823d1 100644
--- a/vendor/lowrisc_ip/ip/prim/pre_dv/prim_crc32/prim_crc32_sim.core
+++ b/vendor/lowrisc_ip/ip/prim/pre_dv/prim_crc32/prim_crc32_sim.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:prim:crc32_sim"
diff --git a/vendor/lowrisc_ip/ip/prim/pre_dv/prim_crc32/prim_crc32_sim.sv b/vendor/lowrisc_ip/ip/prim/pre_dv/prim_crc32/prim_crc32_sim.sv
index 041da16a39..a736ca4119 100644
--- a/vendor/lowrisc_ip/ip/prim/pre_dv/prim_crc32/prim_crc32_sim.sv
+++ b/vendor/lowrisc_ip/ip/prim/pre_dv/prim_crc32/prim_crc32_sim.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/pre_dv/prim_crc32/run_predv.sh b/vendor/lowrisc_ip/ip/prim/pre_dv/prim_crc32/run_predv.sh
index d10fe46caa..3f5a7aeb8c 100755
--- a/vendor/lowrisc_ip/ip/prim/pre_dv/prim_crc32/run_predv.sh
+++ b/vendor/lowrisc_ip/ip/prim/pre_dv/prim_crc32/run_predv.sh
@@ -1,5 +1,5 @@
 #!/bin/bash
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/pre_dv/prim_flop_2sync/prim_flop_2sync_sim.core b/vendor/lowrisc_ip/ip/prim/pre_dv/prim_flop_2sync/prim_flop_2sync_sim.core
index e2b9c59394..a716d77421 100644
--- a/vendor/lowrisc_ip/ip/prim/pre_dv/prim_flop_2sync/prim_flop_2sync_sim.core
+++ b/vendor/lowrisc_ip/ip/prim/pre_dv/prim_flop_2sync/prim_flop_2sync_sim.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:dv:prim_flop_2sync_sim:0.1"
diff --git a/vendor/lowrisc_ip/ip/prim/pre_dv/prim_flop_2sync/prim_flop_2sync_sim_cfg.hjson b/vendor/lowrisc_ip/ip/prim/pre_dv/prim_flop_2sync/prim_flop_2sync_sim_cfg.hjson
index 660a6e30f6..4e460838bd 100644
--- a/vendor/lowrisc_ip/ip/prim/pre_dv/prim_flop_2sync/prim_flop_2sync_sim_cfg.hjson
+++ b/vendor/lowrisc_ip/ip/prim/pre_dv/prim_flop_2sync/prim_flop_2sync_sim_cfg.hjson
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 {
diff --git a/vendor/lowrisc_ip/ip/prim/pre_dv/prim_flop_2sync/tb.sv b/vendor/lowrisc_ip/ip/prim/pre_dv/prim_flop_2sync/tb.sv
index 4d91ce511c..1ee9500401 100644
--- a/vendor/lowrisc_ip/ip/prim/pre_dv/prim_flop_2sync/tb.sv
+++ b/vendor/lowrisc_ip/ip/prim/pre_dv/prim_flop_2sync/tb.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/pre_dv/prim_sync_reqack/cpp/prim_sync_reqack_tb.cc b/vendor/lowrisc_ip/ip/prim/pre_dv/prim_sync_reqack/cpp/prim_sync_reqack_tb.cc
index 1b8adf2125..34032ac0ba 100644
--- a/vendor/lowrisc_ip/ip/prim/pre_dv/prim_sync_reqack/cpp/prim_sync_reqack_tb.cc
+++ b/vendor/lowrisc_ip/ip/prim/pre_dv/prim_sync_reqack/cpp/prim_sync_reqack_tb.cc
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/pre_dv/prim_sync_reqack/prim_sync_reqack_tb.core b/vendor/lowrisc_ip/ip/prim/pre_dv/prim_sync_reqack/prim_sync_reqack_tb.core
index 99f272e225..21fd9adc3f 100644
--- a/vendor/lowrisc_ip/ip/prim/pre_dv/prim_sync_reqack/prim_sync_reqack_tb.core
+++ b/vendor/lowrisc_ip/ip/prim/pre_dv/prim_sync_reqack/prim_sync_reqack_tb.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:dv_verilator:prim_sync_reqack_tb"
diff --git a/vendor/lowrisc_ip/ip/prim/pre_dv/prim_sync_reqack/rtl/prim_sync_reqack_tb.sv b/vendor/lowrisc_ip/ip/prim/pre_dv/prim_sync_reqack/rtl/prim_sync_reqack_tb.sv
index 36b881c5a1..b7e0cf732c 100644
--- a/vendor/lowrisc_ip/ip/prim/pre_dv/prim_sync_reqack/rtl/prim_sync_reqack_tb.sv
+++ b/vendor/lowrisc_ip/ip/prim/pre_dv/prim_sync_reqack/rtl/prim_sync_reqack_tb.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/pre_dv/prim_trivium/cpp/prim_trivium_tb.cc b/vendor/lowrisc_ip/ip/prim/pre_dv/prim_trivium/cpp/prim_trivium_tb.cc
index df0a8c642c..3b0201c7c8 100644
--- a/vendor/lowrisc_ip/ip/prim/pre_dv/prim_trivium/cpp/prim_trivium_tb.cc
+++ b/vendor/lowrisc_ip/ip/prim/pre_dv/prim_trivium/cpp/prim_trivium_tb.cc
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/pre_dv/prim_trivium/prim_trivium_tb.core b/vendor/lowrisc_ip/ip/prim/pre_dv/prim_trivium/prim_trivium_tb.core
index 6c942c516e..f86d00c8ce 100644
--- a/vendor/lowrisc_ip/ip/prim/pre_dv/prim_trivium/prim_trivium_tb.core
+++ b/vendor/lowrisc_ip/ip/prim/pre_dv/prim_trivium/prim_trivium_tb.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:dv_verilator:prim_trivium_tb"
diff --git a/vendor/lowrisc_ip/ip/prim/pre_dv/prim_trivium/rtl/prim_trivium_tb.sv b/vendor/lowrisc_ip/ip/prim/pre_dv/prim_trivium/rtl/prim_trivium_tb.sv
index cbc06a702f..653d263f2a 100644
--- a/vendor/lowrisc_ip/ip/prim/pre_dv/prim_trivium/rtl/prim_trivium_tb.sv
+++ b/vendor/lowrisc_ip/ip/prim/pre_dv/prim_trivium/rtl/prim_trivium_tb.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/prim.core b/vendor/lowrisc_ip/ip/prim/prim.core
index d96d61c384..5aa7a57ca5 100644
--- a/vendor/lowrisc_ip/ip/prim/prim.core
+++ b/vendor/lowrisc_ip/ip/prim/prim.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim/prim_alert.core b/vendor/lowrisc_ip/ip/prim/prim_alert.core
index c92db58a8b..8574c8b506 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_alert.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_alert.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/prim_and2.core b/vendor/lowrisc_ip/ip/prim/prim_and2.core
index 92654431aa..10cfee5c45 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_and2.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_and2.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -16,7 +16,6 @@ filesets:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
     file_type: vlt
 
   files_ascentlint_waiver:
diff --git a/vendor/lowrisc_ip/ip/prim/prim_arbiter.core b/vendor/lowrisc_ip/ip/prim/prim_arbiter.core
index a15386d4e1..784de057ff 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_arbiter.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_arbiter.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/prim_assert.core b/vendor/lowrisc_ip/ip/prim/prim_assert.core
index 26e88e43a9..8c7c79b1df 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_assert.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_assert.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/prim_blanker.core b/vendor/lowrisc_ip/ip/prim/prim_blanker.core
index c8b7a9a06e..3d7121c1ad 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_blanker.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_blanker.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -17,15 +17,11 @@ filesets:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-    file_type: vlt
 
   files_ascentlint_waiver:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-    file_type: waiver
 
   files_veriblelint_waiver:
     depend:
diff --git a/vendor/lowrisc_ip/ip/prim/prim_buf.core b/vendor/lowrisc_ip/ip/prim/prim_buf.core
index 648fcec336..9f10e8d670 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_buf.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_buf.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -16,7 +16,6 @@ filesets:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
     file_type: vlt
 
   files_ascentlint_waiver:
diff --git a/vendor/lowrisc_ip/ip/prim/prim_cdc_rand_delay.core b/vendor/lowrisc_ip/ip/prim/prim_cdc_rand_delay.core
index 38fb5382fe..5ae1c71a76 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_cdc_rand_delay.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_cdc_rand_delay.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:prim:cdc_rand_delay"
diff --git a/vendor/lowrisc_ip/ip/prim/prim_cipher.core b/vendor/lowrisc_ip/ip/prim/prim_cipher.core
index a32c1d8b86..780b386de4 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_cipher.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_cipher.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/prim_cipher_pkg.core b/vendor/lowrisc_ip/ip/prim/prim_cipher_pkg.core
index cdc3a296fc..24911ebf6b 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_cipher_pkg.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_cipher_pkg.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/prim_clock_buf.core b/vendor/lowrisc_ip/ip/prim/prim_clock_buf.core
index 4f571fbfb1..54b95ae1bf 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_clock_buf.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_clock_buf.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -16,8 +16,6 @@ filesets:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-    file_type: vlt
 
   files_ascentlint_waiver:
     depend:
diff --git a/vendor/lowrisc_ip/ip/prim/prim_clock_div.core b/vendor/lowrisc_ip/ip/prim/prim_clock_div.core
index 755f17d53a..954f08d185 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_clock_div.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_clock_div.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -15,8 +15,6 @@ filesets:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-    file_type: vlt
 
   files_ascentlint_waiver:
     depend:
diff --git a/vendor/lowrisc_ip/ip/prim/prim_clock_gating.core b/vendor/lowrisc_ip/ip/prim/prim_clock_gating.core
index 20be120954..04cf68bd1e 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_clock_gating.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_clock_gating.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -16,8 +16,6 @@ filesets:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-    file_type: vlt
 
   files_ascentlint_waiver:
     depend:
diff --git a/vendor/lowrisc_ip/ip/prim/prim_clock_gp_mux2.core b/vendor/lowrisc_ip/ip/prim/prim_clock_gp_mux2.core
index 3918b32222..2c9894d465 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_clock_gp_mux2.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_clock_gp_mux2.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/prim_clock_inv.core b/vendor/lowrisc_ip/ip/prim/prim_clock_inv.core
index 9711919904..a6dcab935a 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_clock_inv.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_clock_inv.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -16,8 +16,6 @@ filesets:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-    file_type: vlt
 
   files_ascentlint_waiver:
     depend:
diff --git a/vendor/lowrisc_ip/ip/prim/prim_clock_meas.core b/vendor/lowrisc_ip/ip/prim/prim_clock_meas.core
index 4510675127..af4c865605 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_clock_meas.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_clock_meas.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/prim_clock_mux2.core b/vendor/lowrisc_ip/ip/prim/prim_clock_mux2.core
index 68566ac946..5f703aded3 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_clock_mux2.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_clock_mux2.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -16,8 +16,6 @@ filesets:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-    file_type: vlt
 
   files_ascentlint_waiver:
     depend:
diff --git a/vendor/lowrisc_ip/ip/prim/prim_count.core b/vendor/lowrisc_ip/ip/prim/prim_count.core
index f65bc6a926..5ceca227be 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_count.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_count.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -10,6 +10,7 @@ filesets:
     depend:
       - lowrisc:prim:assert
     files:
+      - rtl/prim_count_pkg.sv
       - rtl/prim_count.sv
     file_type: systemVerilogSource
 
diff --git a/vendor/lowrisc_ip/ip/prim/prim_crc32.core b/vendor/lowrisc_ip/ip/prim/prim_crc32.core
index 178b68c711..51f3eaf228 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_crc32.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_crc32.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/prim_diff_decode.core b/vendor/lowrisc_ip/ip/prim/prim_diff_decode.core
index a91367f78a..996c37dd79 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_diff_decode.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_diff_decode.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -10,6 +10,7 @@ filesets:
     depend:
       - lowrisc:prim:assert
       - lowrisc:prim:flop_2sync
+      - lowrisc:prim:xnor2
     files:
       - rtl/prim_diff_decode.sv
     file_type: systemVerilogSource
diff --git a/vendor/lowrisc_ip/ip/prim/prim_dom_and_2share.core b/vendor/lowrisc_ip/ip/prim/prim_dom_and_2share.core
index 9376d66503..d2f5b46fc0 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_dom_and_2share.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_dom_and_2share.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -47,5 +47,3 @@ targets:
     filesets:
       - files_rtl
     toplevel: prim_dom_and_2share
-
-
diff --git a/vendor/lowrisc_ip/ip/prim/prim_double_lfsr.core b/vendor/lowrisc_ip/ip/prim/prim_double_lfsr.core
index 5edcb08b05..28b632b48b 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_double_lfsr.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_double_lfsr.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/prim_edge_detector.core b/vendor/lowrisc_ip/ip/prim/prim_edge_detector.core
index 1d6d52fba5..f0b1437d23 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_edge_detector.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_edge_detector.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim/prim_edn_req.core b/vendor/lowrisc_ip/ip/prim/prim_edn_req.core
index 8c07aabda3..6727b6a04d 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_edn_req.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_edn_req.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/prim_esc.core b/vendor/lowrisc_ip/ip/prim/prim_esc.core
index d796bbb5ee..d9b891ed11 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_esc.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_esc.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/prim_fifo.core b/vendor/lowrisc_ip/ip/prim/prim_fifo.core
index 002f96c97f..dd0fc7eb14 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_fifo.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_fifo.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/prim_flash.core b/vendor/lowrisc_ip/ip/prim/prim_flash.core
index 849506b25a..7e293a1dde 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_flash.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_flash.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -21,8 +21,6 @@ filesets:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-    file_type: vlt
 
   files_ascentlint_waiver:
     depend:
diff --git a/vendor/lowrisc_ip/ip/prim/prim_flop.core b/vendor/lowrisc_ip/ip/prim/prim_flop.core
index ced2c180b0..b707f1c473 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_flop.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_flop.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -16,7 +16,6 @@ filesets:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
     file_type: vlt
 
   files_ascentlint_waiver:
diff --git a/vendor/lowrisc_ip/ip/prim/prim_flop_2sync.core b/vendor/lowrisc_ip/ip/prim/prim_flop_2sync.core
index 82f99fe23d..dc1fdb6fb6 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_flop_2sync.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_flop_2sync.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -21,7 +21,6 @@ filesets:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
     file_type: vlt
 
   files_ascentlint_waiver:
diff --git a/vendor/lowrisc_ip/ip/prim/prim_flop_en.core b/vendor/lowrisc_ip/ip/prim/prim_flop_en.core
index 3dc1c8880b..608384d18b 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_flop_en.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_flop_en.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -15,7 +15,6 @@ filesets:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
     file_type: vlt
 
   files_ascentlint_waiver:
diff --git a/vendor/lowrisc_ip/ip/prim/prim_gf_mult.core b/vendor/lowrisc_ip/ip/prim/prim_gf_mult.core
index 361fb27e92..ccc94bb147 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_gf_mult.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_gf_mult.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/prim_lc_and_hardened.core b/vendor/lowrisc_ip/ip/prim/prim_lc_and_hardened.core
index a44be205ff..329259f3bc 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_lc_and_hardened.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_lc_and_hardened.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -19,16 +19,11 @@ filesets:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-    file_type: vlt
 
   files_ascentlint_waiver:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-      # - lint/prim_lc_and_hardened.waiver
-    file_type: waiver
 
   files_veriblelint_waiver:
     depend:
diff --git a/vendor/lowrisc_ip/ip/prim/prim_lc_combine.core b/vendor/lowrisc_ip/ip/prim/prim_lc_combine.core
index 1437edc231..94a7602faf 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_lc_combine.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_lc_combine.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -17,16 +17,11 @@ filesets:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-    file_type: vlt
 
   files_ascentlint_waiver:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-      # - lint/prim_lc_combine.waiver
-    file_type: waiver
 
   files_veriblelint_waiver:
     depend:
diff --git a/vendor/lowrisc_ip/ip/prim/prim_lc_dec.core b/vendor/lowrisc_ip/ip/prim/prim_lc_dec.core
index c22e4b6d8e..2559e9b780 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_lc_dec.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_lc_dec.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -18,16 +18,11 @@ filesets:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-    file_type: vlt
 
   files_ascentlint_waiver:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-      # - lint/prim_lc_sync.waiver
-    file_type: waiver
 
   files_veriblelint_waiver:
     depend:
diff --git a/vendor/lowrisc_ip/ip/prim/prim_lc_or_hardened.core b/vendor/lowrisc_ip/ip/prim/prim_lc_or_hardened.core
index 47bfb43b73..9dbafef5e0 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_lc_or_hardened.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_lc_or_hardened.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -19,16 +19,11 @@ filesets:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-    file_type: vlt
 
   files_ascentlint_waiver:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-      # - lint/prim_lc_or_hardened.waiver
-    file_type: waiver
 
   files_veriblelint_waiver:
     depend:
diff --git a/vendor/lowrisc_ip/ip/prim/prim_lc_sender.core b/vendor/lowrisc_ip/ip/prim/prim_lc_sender.core
index 378b9abe54..9ebb4cc10f 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_lc_sender.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_lc_sender.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -19,8 +19,6 @@ filesets:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-    file_type: vlt
 
   files_ascentlint_waiver:
     depend:
diff --git a/vendor/lowrisc_ip/ip/prim/prim_lc_sync.core b/vendor/lowrisc_ip/ip/prim/prim_lc_sync.core
index 0a8d4491e3..05a6b5f74b 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_lc_sync.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_lc_sync.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -20,15 +20,12 @@ filesets:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
     file_type: vlt
 
   files_ascentlint_waiver:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-      # - lint/prim_lc_sync.waiver
     file_type: waiver
 
   files_veriblelint_waiver:
diff --git a/vendor/lowrisc_ip/ip/prim/prim_lfsr.core b/vendor/lowrisc_ip/ip/prim/prim_lfsr.core
index 417e818333..752bd82ad0 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_lfsr.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_lfsr.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -18,8 +18,6 @@ filesets:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-    file_type: vlt
 
   files_ascentlint_waiver:
     depend:
diff --git a/vendor/lowrisc_ip/ip/prim/prim_macros.core b/vendor/lowrisc_ip/ip/prim/prim_macros.core
index 70b9debdfb..67df40c2f2 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_macros.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_macros.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/prim_max_tree.core b/vendor/lowrisc_ip/ip/prim/prim_max_tree.core
index 891da179f9..583714bdb2 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_max_tree.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_max_tree.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -41,9 +41,8 @@ targets:
       - tool_ascentlint  ? (files_ascentlint_waiver)
       - tool_veriblelint ? (files_veriblelint_waiver)
       - files_rtl
-  
+
   formal:
     filesets:
       - files_rtl
     toplevel: prim_max_tree
-    
\ No newline at end of file
diff --git a/vendor/lowrisc_ip/ip/prim/prim_msb_extend.core b/vendor/lowrisc_ip/ip/prim/prim_msb_extend.core
index 5738854430..2895792b03 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_msb_extend.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_msb_extend.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -22,7 +22,6 @@ filesets:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
     file_type: waiver
 
   files_veriblelint_waiver:
diff --git a/vendor/lowrisc_ip/ip/prim/prim_mubi.core b/vendor/lowrisc_ip/ip/prim/prim_mubi.core
index f51e4550e1..45aa85f7ae 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_mubi.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_mubi.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
@@ -30,14 +30,24 @@ filesets:
       - rtl/prim_mubi16_sender.sv
       - rtl/prim_mubi16_sync.sv
       - rtl/prim_mubi16_dec.sv
+      - rtl/prim_mubi20_sender.sv
+      - rtl/prim_mubi20_sync.sv
+      - rtl/prim_mubi20_dec.sv
+      - rtl/prim_mubi24_sender.sv
+      - rtl/prim_mubi24_sync.sv
+      - rtl/prim_mubi24_dec.sv
+      - rtl/prim_mubi28_sender.sv
+      - rtl/prim_mubi28_sync.sv
+      - rtl/prim_mubi28_dec.sv
+      - rtl/prim_mubi32_sender.sv
+      - rtl/prim_mubi32_sync.sv
+      - rtl/prim_mubi32_dec.sv
     file_type: systemVerilogSource
 
   files_verilator_waiver:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-    file_type: vlt
 
   files_ascentlint_waiver:
     depend:
diff --git a/vendor/lowrisc_ip/ip/prim/prim_multibit_sync.core b/vendor/lowrisc_ip/ip/prim/prim_multibit_sync.core
index 9ce56ee387..8cc4fd072f 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_multibit_sync.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_multibit_sync.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/prim_onehot.core b/vendor/lowrisc_ip/ip/prim/prim_onehot.core
index 2e5a52d7ef..f2ab8a1e4f 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_onehot.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_onehot.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/prim_onehot_check.core b/vendor/lowrisc_ip/ip/prim/prim_onehot_check.core
index f62943d79d..ed8a7aaf17 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_onehot_check.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_onehot_check.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/prim_otp.core b/vendor/lowrisc_ip/ip/prim/prim_otp.core
index 87cb491f41..90d0eca468 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_otp.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_otp.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -19,8 +19,6 @@ filesets:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-    file_type: vlt
 
   files_ascentlint_waiver:
     depend:
diff --git a/vendor/lowrisc_ip/ip/prim/prim_otp_pkg.core b/vendor/lowrisc_ip/ip/prim/prim_otp_pkg.core
index 9b603ec431..58c2630975 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_otp_pkg.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_otp_pkg.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -15,15 +15,11 @@ filesets:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-    file_type: vlt
 
   files_ascentlint_waiver:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-    file_type: waiver
 
   files_veriblelint_waiver:
     depend:
diff --git a/vendor/lowrisc_ip/ip/prim/prim_pad_attr.core b/vendor/lowrisc_ip/ip/prim/prim_pad_attr.core
index 6ac83a1564..10219fbfcb 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_pad_attr.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_pad_attr.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -17,8 +17,6 @@ filesets:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-    file_type: vlt
 
   files_ascentlint_waiver:
     depend:
diff --git a/vendor/lowrisc_ip/ip/prim/prim_pad_wrapper.core b/vendor/lowrisc_ip/ip/prim/prim_pad_wrapper.core
index 05a35938ba..e700faf1ce 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_pad_wrapper.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_pad_wrapper.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -17,7 +17,6 @@ filesets:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
     file_type: vlt
 
   files_ascentlint_waiver:
diff --git a/vendor/lowrisc_ip/ip/prim/prim_pad_wrapper_pkg.core b/vendor/lowrisc_ip/ip/prim/prim_pad_wrapper_pkg.core
index 76816d8b46..17c7938574 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_pad_wrapper_pkg.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_pad_wrapper_pkg.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -15,15 +15,11 @@ filesets:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-    file_type: vlt
 
   files_ascentlint_waiver:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-    file_type: waiver
 
   files_veriblelint_waiver:
     depend:
diff --git a/vendor/lowrisc_ip/ip/prim/prim_pkg.core b/vendor/lowrisc_ip/ip/prim/prim_pkg.core
index f054f66604..eea8326962 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_pkg.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_pkg.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:prim:prim_pkg:0.1"
diff --git a/vendor/lowrisc_ip/ip/prim/prim_ram_1p.core b/vendor/lowrisc_ip/ip/prim/prim_ram_1p.core
index cedb5e10e2..b12882c61c 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_ram_1p.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_ram_1p.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -17,8 +17,6 @@ filesets:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-    file_type: vlt
 
   files_ascentlint_waiver:
     depend:
diff --git a/vendor/lowrisc_ip/ip/prim/prim_ram_1p_adv.core b/vendor/lowrisc_ip/ip/prim/prim_ram_1p_adv.core
index e0bed14a52..ed465ba7a3 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_ram_1p_adv.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_ram_1p_adv.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -19,8 +19,6 @@ filesets:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-    file_type: vlt
 
   files_ascentlint_waiver:
     depend:
diff --git a/vendor/lowrisc_ip/ip/prim/prim_ram_1p_pkg.core b/vendor/lowrisc_ip/ip/prim/prim_ram_1p_pkg.core
index c1d9324d31..8f66fbb03f 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_ram_1p_pkg.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_ram_1p_pkg.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -7,7 +7,6 @@ name: "lowrisc:prim:ram_1p_pkg"
 description: "Ram 1p package"
 filesets:
   files_rtl:
-    depend:
     files:
       - rtl/prim_ram_1p_pkg.sv
     file_type: systemVerilogSource
diff --git a/vendor/lowrisc_ip/ip/prim/prim_ram_1p_scr.core b/vendor/lowrisc_ip/ip/prim/prim_ram_1p_scr.core
index fa96c76b74..dea8ca6774 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_ram_1p_scr.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_ram_1p_scr.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/prim_ram_1r1w.core b/vendor/lowrisc_ip/ip/prim/prim_ram_1r1w.core
index 3730ff2a7b..18acb86209 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_ram_1r1w.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_ram_1r1w.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -17,8 +17,6 @@ filesets:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-    file_type: vlt
 
   files_ascentlint_waiver:
     depend:
diff --git a/vendor/lowrisc_ip/ip/prim/prim_ram_1r1w_adv.core b/vendor/lowrisc_ip/ip/prim/prim_ram_1r1w_adv.core
index 218bea9ab6..33e0f91ee9 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_ram_1r1w_adv.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_ram_1r1w_adv.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/prim_ram_1r1w_async_adv.core b/vendor/lowrisc_ip/ip/prim/prim_ram_1r1w_async_adv.core
index a1caaa65ac..6a4c35431b 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_ram_1r1w_async_adv.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_ram_1r1w_async_adv.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/prim_ram_2p.core b/vendor/lowrisc_ip/ip/prim/prim_ram_2p.core
index e265b83818..696c2248d6 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_ram_2p.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_ram_2p.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -17,8 +17,6 @@ filesets:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-    file_type: vlt
 
   files_ascentlint_waiver:
     depend:
diff --git a/vendor/lowrisc_ip/ip/prim/prim_ram_2p_adv.core b/vendor/lowrisc_ip/ip/prim/prim_ram_2p_adv.core
index 3ff2dcd8b7..7a301db07e 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_ram_2p_adv.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_ram_2p_adv.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/prim_ram_2p_async_adv.core b/vendor/lowrisc_ip/ip/prim/prim_ram_2p_async_adv.core
index e5eda9d04c..54b5e8e100 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_ram_2p_async_adv.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_ram_2p_async_adv.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/prim_ram_2p_pkg.core b/vendor/lowrisc_ip/ip/prim/prim_ram_2p_pkg.core
index 34b3ad2fe6..074bc6c382 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_ram_2p_pkg.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_ram_2p_pkg.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -7,7 +7,6 @@ name: "lowrisc:prim:ram_2p_pkg"
 description: "Ram 2p package"
 filesets:
   files_rtl:
-    depend:
     files:
       - rtl/prim_ram_2p_pkg.sv
     file_type: systemVerilogSource
diff --git a/vendor/lowrisc_ip/ip/prim/prim_reg_we_check.core b/vendor/lowrisc_ip/ip/prim/prim_reg_we_check.core
index 4761664310..87e5640214 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_reg_we_check.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_reg_we_check.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/prim_rom.core b/vendor/lowrisc_ip/ip/prim/prim_rom.core
index 86f188c998..0aa76a4e31 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_rom.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_rom.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -17,8 +17,6 @@ filesets:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-    file_type: vlt
 
   files_ascentlint_waiver:
     depend:
diff --git a/vendor/lowrisc_ip/ip/prim/prim_rom_adv.core b/vendor/lowrisc_ip/ip/prim/prim_rom_adv.core
index 249d6dd0a4..fea85f95ff 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_rom_adv.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_rom_adv.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/prim_rom_pkg.core b/vendor/lowrisc_ip/ip/prim/prim_rom_pkg.core
index 73f4c6c1d1..f8a827cecb 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_rom_pkg.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_rom_pkg.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -7,7 +7,6 @@ name: "lowrisc:prim:rom_pkg"
 description: "Rom package"
 filesets:
   files_rtl:
-    depend:
     files:
       - rtl/prim_rom_pkg.sv
     file_type: systemVerilogSource
diff --git a/vendor/lowrisc_ip/ip/prim/prim_rst_sync.core b/vendor/lowrisc_ip/ip/prim/prim_rst_sync.core
index 7d207004e1..9657f87716 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_rst_sync.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_rst_sync.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -22,7 +22,6 @@ filesets:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
     file_type: vlt
 
   files_ascentlint_waiver:
diff --git a/vendor/lowrisc_ip/ip/prim/prim_sec_anchor.core b/vendor/lowrisc_ip/ip/prim/prim_sec_anchor.core
index 2825284871..12f574927f 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_sec_anchor.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_sec_anchor.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/prim_secded.core b/vendor/lowrisc_ip/ip/prim/prim_secded.core
index 13f89c2053..38cb2d36ac 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_secded.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_secded.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -51,8 +51,6 @@ filesets:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-      # - lint/prim_secded.vlt
     file_type: vlt
 
   files_ascentlint_waiver:
@@ -75,4 +73,3 @@ targets:
       - tool_ascentlint  ? (files_ascentlint_waiver)
       - tool_veriblelint ? (files_veriblelint_waiver)
       - files_rtl
-
diff --git a/vendor/lowrisc_ip/ip/prim/prim_sha2.core b/vendor/lowrisc_ip/ip/prim/prim_sha2.core
index 85ca06ae2d..18b27cb4d6 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_sha2.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_sha2.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/prim_sha2_pkg.core b/vendor/lowrisc_ip/ip/prim/prim_sha2_pkg.core
index cf89e79fa5..c0e95b4be4 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_sha2_pkg.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_sha2_pkg.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/prim_sparse_fsm.core b/vendor/lowrisc_ip/ip/prim/prim_sparse_fsm.core
index 385a9f5614..4334c94585 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_sparse_fsm.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_sparse_fsm.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/prim_subreg.core b/vendor/lowrisc_ip/ip/prim/prim_subreg.core
index 9f326c2b9a..45d2a040a8 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_subreg.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_subreg.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/prim_sum_tree.core b/vendor/lowrisc_ip/ip/prim/prim_sum_tree.core
index d984bd1db8..fff6ce1ebe 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_sum_tree.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_sum_tree.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/prim_trivium.core b/vendor/lowrisc_ip/ip/prim/prim_trivium.core
index 0c191502a1..eb05a453d2 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_trivium.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_trivium.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:prim:trivium:0.1"
diff --git a/vendor/lowrisc_ip/ip/prim/prim_usb_diff_rx.core b/vendor/lowrisc_ip/ip/prim/prim_usb_diff_rx.core
index f62fc02937..c323df0a2a 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_usb_diff_rx.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_usb_diff_rx.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -16,7 +16,6 @@ filesets:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
     file_type: vlt
 
   files_ascentlint_waiver:
diff --git a/vendor/lowrisc_ip/ip/prim/prim_util.core b/vendor/lowrisc_ip/ip/prim/prim_util.core
index 5f224118c8..1af57c66d5 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_util.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_util.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/prim_util_get_scramble_params.core b/vendor/lowrisc_ip/ip/prim/prim_util_get_scramble_params.core
index 57dc1ecea3..a6262872fd 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_util_get_scramble_params.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_util_get_scramble_params.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/prim_util_memload.core b/vendor/lowrisc_ip/ip/prim/prim_util_memload.core
index 0371bd83f9..44af599db3 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_util_memload.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_util_memload.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/prim_xnor2.core b/vendor/lowrisc_ip/ip/prim/prim_xnor2.core
index 360cb2c279..becb3067a2 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_xnor2.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_xnor2.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -16,7 +16,6 @@ filesets:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
     file_type: vlt
 
   files_ascentlint_waiver:
diff --git a/vendor/lowrisc_ip/ip/prim/prim_xor2.core b/vendor/lowrisc_ip/ip/prim/prim_xor2.core
index 07f486d5ad..7bf51d9f4c 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_xor2.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_xor2.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -16,7 +16,6 @@ filesets:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
     file_type: vlt
 
   files_ascentlint_waiver:
diff --git a/vendor/lowrisc_ip/ip/prim/prim_xoshiro256pp.core b/vendor/lowrisc_ip/ip/prim/prim_xoshiro256pp.core
index 258a474940..ff74e23cb5 100644
--- a/vendor/lowrisc_ip/ip/prim/prim_xoshiro256pp.core
+++ b/vendor/lowrisc_ip/ip/prim/prim_xoshiro256pp.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -25,8 +25,6 @@ filesets:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-    file_type: waiver
 
   files_veriblelint_waiver:
     depend:
diff --git a/vendor/lowrisc_ip/ip/prim/primgen.core b/vendor/lowrisc_ip/ip/prim/primgen.core
index 3a143ee636..167f796593 100644
--- a/vendor/lowrisc_ip/ip/prim/primgen.core
+++ b/vendor/lowrisc_ip/ip/prim/primgen.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:prim:primgen:0.1"
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_alert_pkg.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_alert_pkg.sv
index a3594b6192..394c2bdbf4 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_alert_pkg.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_alert_pkg.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_alert_receiver.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_alert_receiver.sv
index 24631172cc..5ffc4a97ad 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_alert_receiver.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_alert_receiver.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
@@ -286,9 +286,13 @@ module prim_alert_receiver
   `ASSERT(InitReq_A, mubi4_test_true_strict(init_trig_i) &&
           !(state_q inside {InitReq, InitAckWait}) |=> send_init)
 
-  // ping request at input -> need to see encoded ping request
-  `ASSERT(PingRequest0_A, ##1 $rose(ping_req_i) && !state_q inside {InitReq, InitAckWait}
-      |=> $changed(alert_rx_o.ping_p))
+  // If there is a ping request on the input then we should see an encoded ping request. This is
+  // squashed if we are in state InitReq or InitAckWait (because we are still initialising), or if
+  // we see the init_trig_i signal go high (because it will start an initialisation).
+  `ASSERT(PingRequest0_A,
+          $rose(ping_req_i) |=> $changed(alert_rx_o.ping_p),
+          clk_i, !rst_ni || init_trig_i || state_q inside {InitReq, InitAckWait})
+
   // ping response implies it has been requested
   `ASSERT(PingResponse0_A, ping_ok_o |-> ping_pending_q)
   // correctly latch ping request
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_alert_sender.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_alert_sender.sv
index 88249b5437..9288758767 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_alert_sender.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_alert_sender.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_arbiter_fixed.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_arbiter_fixed.sv
index d9677dd24b..efe122e2ff 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_arbiter_fixed.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_arbiter_fixed.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_arbiter_ppc.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_arbiter_ppc.sv
index 17f3e19ad5..ddd70173d3 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_arbiter_ppc.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_arbiter_ppc.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
@@ -177,7 +177,7 @@ end
 // FPV-only assertions with symbolic variables
 `ifdef FPV_ON
   // symbolic variables
-  int unsigned k;
+  bit [IdxW-1:0] k;
   bit ReadyIsStable;
   bit ReqsAreStable;
 
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_arbiter_tree.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_arbiter_tree.sv
index 93d809e98e..712eb8bfb6 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_arbiter_tree.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_arbiter_tree.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_arbiter_tree_dup.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_arbiter_tree_dup.sv
index 8ed2a7c20d..79652a6251 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_arbiter_tree_dup.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_arbiter_tree_dup.sv
@@ -1,8 +1,8 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
-// This is a wrapper module that instantiates two prim_aribter_tree modules.
+// This is a wrapper module that instantiates two prim_arbiter_tree modules.
 // The reason for two is similar to modules such as prim_count/prim_lfsr where
 // we use spatial redundancy to ensure the arbitration results are not altered.
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_assert.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_assert.sv
index 540808b127..94c31188df 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_assert.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_assert.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_assert_dummy_macros.svh b/vendor/lowrisc_ip/ip/prim/rtl/prim_assert_dummy_macros.svh
index c2a5313359..c4421093b9 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_assert_dummy_macros.svh
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_assert_dummy_macros.svh
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_assert_sec_cm.svh b/vendor/lowrisc_ip/ip/prim/rtl/prim_assert_sec_cm.svh
index b9f077fa96..a2fe824bdf 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_assert_sec_cm.svh
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_assert_sec_cm.svh
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
@@ -9,54 +9,75 @@
 
 `define _SEC_CM_ALERT_MAX_CYC 30
 
-// Helper macros
-`define ASSERT_ERROR_TRIGGER_ALERT(NAME_, PRIM_HIER_, ALERT_, GATE_, MAX_CYCLES_, ERR_NAME_) \
-  `ASSERT(FpvSecCm``NAME_``, \
-          $rose(PRIM_HIER_.ERR_NAME_) && !(GATE_) \
-          |-> ##[0:MAX_CYCLES_] (ALERT_.alert_p)) \
-  `ifdef INC_ASSERT \
-  assign PRIM_HIER_.unused_assert_connected = 1'b1; \
-  `endif \
-  `ASSUME_FPV(``NAME_``TriggerAfterAlertInit_S, $stable(rst_ni) == 0 |-> \
-              PRIM_HIER_.ERR_NAME_ == 0 [*10])
-
-`define ASSERT_ERROR_TRIGGER_ERR(NAME_, PRIM_HIER_, ERR_, GATE_, MAX_CYCLES_, ERR_NAME_, CLK_, RST_) \
-  `ASSERT(FpvSecCm``NAME_``, \
-          $rose(PRIM_HIER_.ERR_NAME_) && !(GATE_) \
-          |-> ##[0:MAX_CYCLES_] (ERR_), CLK_, RST_) \
-  `ifdef INC_ASSERT \
-  assign PRIM_HIER_.unused_assert_connected = 1'b1; \
+// When a named error signal rises, expect to see an associated error in at most MAX_CYCLES_ cycles.
+//
+// The NAME_ argument gets included in the name of the generated assertion, following an FpSecCm
+// prefix. The error signal should be at HIER_.ERR_NAME_ and the posedge is ignored if GATE_ is
+// true.
+//
+// This macro drives a magic "unused_assert_connected" signal, which is used for a static check to
+// ensure the assertions are in place.
+`define ASSERT_ERROR_TRIGGER_ERR(NAME_, HIER_, ERR_, GATE_, MAX_CYCLES_, ERR_NAME_, CLK_, RST_) \
+  `ASSERT(FpvSecCm``NAME_``,                                                                    \
+          $rose(HIER_.ERR_NAME_) && !(GATE_) |-> ##[0:MAX_CYCLES_] (ERR_),                      \
+          CLK_, RST_)                                                                           \
+  `ifdef INC_ASSERT                                                                             \
+    assign HIER_.unused_assert_connected = 1'b1;                                                \
   `endif
 
-// macros for security countermeasures that will trigger alert
-`define ASSERT_PRIM_COUNT_ERROR_TRIGGER_ALERT(NAME_, PRIM_HIER_, ALERT_, GATE_ = 0, MAX_CYCLES_ = `_SEC_CM_ALERT_MAX_CYC) \
-  `ASSERT_ERROR_TRIGGER_ALERT(NAME_, PRIM_HIER_, ALERT_, GATE_, MAX_CYCLES_, err_o)
-
-`define ASSERT_PRIM_DOUBLE_LFSR_ERROR_TRIGGER_ALERT(NAME_, PRIM_HIER_, ALERT_, GATE_ = 0, MAX_CYCLES_ = `_SEC_CM_ALERT_MAX_CYC) \
-  `ASSERT_ERROR_TRIGGER_ALERT(NAME_, PRIM_HIER_, ALERT_, GATE_, MAX_CYCLES_, err_o)
-
-`define ASSERT_PRIM_FSM_ERROR_TRIGGER_ALERT(NAME_, PRIM_HIER_, ALERT_, GATE_ = 0, MAX_CYCLES_ = `_SEC_CM_ALERT_MAX_CYC) \
-  `ASSERT_ERROR_TRIGGER_ALERT(NAME_, PRIM_HIER_, ALERT_, GATE_, MAX_CYCLES_, unused_err_o)
-
-`define ASSERT_PRIM_ONEHOT_ERROR_TRIGGER_ALERT(NAME_, PRIM_HIER_, ALERT_, GATE_ = 0, MAX_CYCLES_ = `_SEC_CM_ALERT_MAX_CYC) \
-  `ASSERT_ERROR_TRIGGER_ALERT(NAME_, PRIM_HIER_, ALERT_, GATE_, MAX_CYCLES_, err_o)
+// When an error signal rises, expect to see the associated alert in at most MAX_CYCLE_ cycles.
+//
+// The NAME_, HIER_, GATE_, MAX_CYCLES_ and ERR_NAME_ arguments are the same as for
+// `ASSERT_ERROR_TRIGGER_ERR. The ALERT_ argument is the name of the alert that we expect to be
+// asserted.
+//
+// This macro adds an assumption that says the named error signal will stay low for the first 10
+// cycles after reset.
+`define ASSERT_ERROR_TRIGGER_ALERT(NAME_, HIER_, ALERT_, GATE_, MAX_CYCLES_, ERR_NAME_)    \
+  `ASSERT_ERROR_TRIGGER_ERR(NAME_, HIER_, (ALERT_.alert_p), GATE_, MAX_CYCLES_, ERR_NAME_, \
+                            `ASSERT_DEFAULT_CLK, `ASSERT_DEFAULT_RST)                      \
+  `ASSUME_FPV(``NAME_``TriggerAfterAlertInit_S,                                            \
+              $stable(rst_ni) == 0 |-> HIER_.ERR_NAME_ == 0 [*10])
+
+////////////////////////////////////////////////////////////////////////////////
+//
+// Assertions for CMs that trigger alerts
+//
+////////////////////////////////////////////////////////////////////////////////
+
+`define ASSERT_PRIM_COUNT_ERROR_TRIGGER_ALERT(NAME_, HIER_, ALERT_, GATE_ = 0, MAX_CYCLES_ = `_SEC_CM_ALERT_MAX_CYC) \
+  `ASSERT_ERROR_TRIGGER_ALERT(NAME_, HIER_, ALERT_, GATE_, MAX_CYCLES_, err_o)
+
+`define ASSERT_PRIM_DOUBLE_LFSR_ERROR_TRIGGER_ALERT(NAME_, HIER_, ALERT_, GATE_ = 0, MAX_CYCLES_ = `_SEC_CM_ALERT_MAX_CYC) \
+  `ASSERT_ERROR_TRIGGER_ALERT(NAME_, HIER_, ALERT_, GATE_, MAX_CYCLES_, err_o)
+
+`define ASSERT_PRIM_FSM_ERROR_TRIGGER_ALERT(NAME_, HIER_, ALERT_, GATE_ = 0, MAX_CYCLES_ = `_SEC_CM_ALERT_MAX_CYC) \
+  `ASSERT_ERROR_TRIGGER_ALERT(NAME_, HIER_, ALERT_, GATE_, MAX_CYCLES_, unused_err_o)
+
+`define ASSERT_PRIM_ONEHOT_ERROR_TRIGGER_ALERT(NAME_, HIER_, ALERT_, GATE_ = 0, MAX_CYCLES_ = `_SEC_CM_ALERT_MAX_CYC) \
+  `ASSERT_ERROR_TRIGGER_ALERT(NAME_, HIER_, ALERT_, GATE_, MAX_CYCLES_, err_o)
 
 `define ASSERT_PRIM_REG_WE_ONEHOT_ERROR_TRIGGER_ALERT(NAME_, REG_TOP_HIER_, ALERT_, GATE_ = 0, MAX_CYCLES_ = `_SEC_CM_ALERT_MAX_CYC) \
   `ASSERT_PRIM_ONEHOT_ERROR_TRIGGER_ALERT(NAME_, \
     REG_TOP_HIER_.u_prim_reg_we_check.u_prim_onehot_check, ALERT_, GATE_, MAX_CYCLES_)
 
-// macros for security countermeasures that will trigger other errors
-`define ASSERT_PRIM_FSM_ERROR_TRIGGER_ERR(NAME_, PRIM_HIER_, ERR_, GATE_ = 0, MAX_CYCLES_ = 2, CLK_ = clk_i, RST_ = !rst_ni) \
-  `ASSERT_ERROR_TRIGGER_ERR(NAME_, PRIM_HIER_, ERR_, GATE_, MAX_CYCLES_, unused_err_o, CLK_, RST_)
+////////////////////////////////////////////////////////////////////////////////
+//
+// Assertions for CMs that trigger some other form of error
+//
+////////////////////////////////////////////////////////////////////////////////
+
+`define ASSERT_PRIM_FSM_ERROR_TRIGGER_ERR(NAME_, HIER_, ERR_, GATE_ = 0, MAX_CYCLES_ = 2, CLK_ = clk_i, RST_ = !rst_ni) \
+  `ASSERT_ERROR_TRIGGER_ERR(NAME_, HIER_, ERR_, GATE_, MAX_CYCLES_, unused_err_o, CLK_, RST_)
 
-`define ASSERT_PRIM_COUNT_ERROR_TRIGGER_ERR(NAME_, PRIM_HIER_, ERR_, GATE_ = 0, MAX_CYCLES_ = 2, CLK_ = clk_i, RST_ = !rst_ni) \
-  `ASSERT_ERROR_TRIGGER_ERR(NAME_, PRIM_HIER_, ERR_, GATE_, MAX_CYCLES_, err_o, CLK_, RST_)
+`define ASSERT_PRIM_COUNT_ERROR_TRIGGER_ERR(NAME_, HIER_, ERR_, GATE_ = 0, MAX_CYCLES_ = 2, CLK_ = clk_i, RST_ = !rst_ni) \
+  `ASSERT_ERROR_TRIGGER_ERR(NAME_, HIER_, ERR_, GATE_, MAX_CYCLES_, err_o, CLK_, RST_)
 
-`define ASSERT_PRIM_DOUBLE_LFSR_ERROR_TRIGGER_ERR(NAME_, PRIM_HIER_, ERR_, GATE_ = 0, MAX_CYCLES_ = 2, CLK_ = clk_i, RST_ = !rst_ni) \
-  `ASSERT_ERROR_TRIGGER_ERR(NAME_, PRIM_HIER_, ERR_, GATE_, MAX_CYCLES_, err_o, CLK_, RST_)
+`define ASSERT_PRIM_DOUBLE_LFSR_ERROR_TRIGGER_ERR(NAME_, HIER_, ERR_, GATE_ = 0, MAX_CYCLES_ = 2, CLK_ = clk_i, RST_ = !rst_ni) \
+  `ASSERT_ERROR_TRIGGER_ERR(NAME_, HIER_, ERR_, GATE_, MAX_CYCLES_, err_o, CLK_, RST_)
 
-`define ASSERT_PRIM_ONEHOT_ERROR_TRIGGER_ERR(NAME_, PRIM_HIER_, ERR_, GATE_ = 0, MAX_CYCLES_ = `_SEC_CM_ALERT_MAX_CYC, CLK_ = clk_i, RST_ = !rst_ni) \
-  `ASSERT_ERROR_TRIGGER_ERR(NAME_, PRIM_HIER_, ERR_, GATE_, MAX_CYCLES_, err_o, CLK_, RST_)
+`define ASSERT_PRIM_ONEHOT_ERROR_TRIGGER_ERR(NAME_, HIER_, ERR_, GATE_ = 0, MAX_CYCLES_ = `_SEC_CM_ALERT_MAX_CYC, CLK_ = clk_i, RST_ = !rst_ni) \
+  `ASSERT_ERROR_TRIGGER_ERR(NAME_, HIER_, ERR_, GATE_, MAX_CYCLES_, err_o, CLK_, RST_)
 
 `define ASSERT_PRIM_REG_WE_ONEHOT_ERROR_TRIGGER_ERR(NAME_, REG_TOP_HIER_, ERR_, GATE_ = 0, MAX_CYCLES_ = `_SEC_CM_ALERT_MAX_CYC, CLK_ = clk_i, RST_ = !rst_ni) \
   `ASSERT_PRIM_ONEHOT_ERROR_TRIGGER_ERR(NAME_, \
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_assert_standard_macros.svh b/vendor/lowrisc_ip/ip/prim/rtl/prim_assert_standard_macros.svh
index bfa07380f4..9dead6cf63 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_assert_standard_macros.svh
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_assert_standard_macros.svh
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
@@ -41,12 +41,14 @@
   end                                                                                \
 
 `define ASSERT_FINAL(__name, __prop)                                         \
+`ifndef FPV_ON                                                               \
   final begin                                                                \
     __name: assert (__prop || $test$plusargs("disable_assert_final_checks")) \
       else begin                                                             \
         `ASSERT_ERROR(__name)                                                \
       end                                                                    \
-  end
+  end                                                                        \
+`endif
 
 `define ASSERT_AT_RESET(__name, __prop, __rst = `ASSERT_DEFAULT_RST)         \
   // `__rst` is active-high for these macros, so trigger on its posedge.     \
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_assert_yosys_macros.svh b/vendor/lowrisc_ip/ip/prim/rtl/prim_assert_yosys_macros.svh
index 81102ec8a9..48a0473d78 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_assert_yosys_macros.svh
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_assert_yosys_macros.svh
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_blanker.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_blanker.sv
index 2253da31fe..1589b7baf0 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_blanker.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_blanker.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_cdc_rand_delay.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_cdc_rand_delay.sv
index 0318e2c14b..acb79ae304 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_cdc_rand_delay.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_cdc_rand_delay.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_cipher_pkg.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_cipher_pkg.sv
index 742c925363..3c48f39758 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_cipher_pkg.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_cipher_pkg.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_clock_gating_sync.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_clock_gating_sync.sv
index bcc8f75fe6..76dd6eb04f 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_clock_gating_sync.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_clock_gating_sync.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_clock_gp_mux2.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_clock_gp_mux2.sv
index f4d786027f..ac259ab863 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_clock_gp_mux2.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_clock_gp_mux2.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
@@ -28,7 +28,7 @@ assign stage_d = {sel_i & !stage_q[0], !sel_i & !stage_q[1]};
 
 generate
   genvar i;
-  for (i = 0; i < 2; i = i++) begin: gen_two_flops
+  for (i = 0; i < 2; i++) begin: gen_two_flops
     always_ff @(posedge clk_gp[i] or negedge rst_ni) begin: stage1
       if (!rst_ni) begin
         intq[i] <= 1'b0;
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_clock_meas.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_clock_meas.sv
index e2c2b7f2e3..45c0ec2ee4 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_clock_meas.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_clock_meas.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_clock_timeout.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_clock_timeout.sv
index 4b02ee3bd4..b4c972bb22 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_clock_timeout.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_clock_timeout.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_count.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_count.sv
index d5b5aff61b..c0e77647f4 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_count.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_count.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
@@ -25,14 +25,26 @@
 
 `include "prim_assert.sv"
 
-module prim_count #(
-  parameter int Width = 2,
+module prim_count
+  import prim_count_pkg::*;
+#(
+  parameter int               Width = 2,
   // Can be used to reset the counter to a different value than 0, for example when
   // the counter is used as a down-counter.
   parameter logic [Width-1:0] ResetValue = '0,
   // This should only be disabled in special circumstances, for example
   // in non-comportable IPs where an error does not trigger an alert.
-  parameter bit EnableAlertTriggerSVA = 1
+  parameter bit               EnableAlertTriggerSVA = 1,
+
+  // We have some assertions below with preconditions that depend on particular input actions
+  // (clear, set, incr, decr). If the design has instantiated prim_count with one of these actions
+  // tied to zero, the preconditions for the associated assertions will not be satisfiable. The
+  // result is an unreachable item, which we treat as a failed assertion in the report.
+  //
+  // To avoid this, we the instantiation to specify the actions which might happen. If this is not
+  // '1, we will have an assertion which assert the corresponding action is never triggered. We can
+  // then use this to avoid the unreachable assertions.
+  parameter action_mask_t     PossibleActions = {$bits(action_mask_t){1'b1}}
 ) (
   input clk_i,
   input rst_ni,
@@ -57,10 +69,14 @@ module prim_count #(
   localparam logic [NumCnt-1:0][Width-1:0] ResetValues = {{Width{1'b1}} - ResetValue, // secondary
                                                           ResetValue};                // primary
 
-  logic [NumCnt-1:0][Width-1:0] cnt_d, cnt_d_committed, cnt_q, fpv_force;
+  logic [NumCnt-1:0][Width-1:0] cnt_d, cnt_d_committed, cnt_q;
 
-`ifndef FPV_SEC_CM_ON
-  // This becomes a free variable in FPV.
+  // The fpv_force signal can be used in FPV runs to make the internal counters (cnt_q) jump
+  // unexpectedly. We only want to use this mechanism when we're doing FPV on prim_count itself. In
+  // that situation, we will have the PrimCountFpv define and wish to leave fpv_force undriven so
+  // that it becomes a free variable in FPV. In any other situation, we drive the signal with zero.
+  logic [NumCnt-1:0][Width-1:0] fpv_force;
+`ifndef PrimCountFpv
   assign fpv_force = '0;
 `endif
 
@@ -156,6 +172,19 @@ module prim_count #(
   //VCS coverage on
   // pragma coverage on
 
+  if (!(PossibleActions & Clr)) begin : g_check_no_clr
+    `ASSERT(ClrNeverTrue_A, clr_i !== 1'b1)
+  end
+  if (!(PossibleActions & Set)) begin : g_check_no_set
+    `ASSERT(SetNeverTrue_A, set_i !== 1'b1)
+  end
+  if (!(PossibleActions & Incr)) begin : g_check_no_incr
+    `ASSERT(IncrNeverTrue_A, incr_en_i !== 1'b1)
+  end
+  if (!(PossibleActions & Decr)) begin : g_check_no_decr
+    `ASSERT(DecrNeverTrue_A, decr_en_i !== 1'b1)
+  end
+
   // Cnt next
   `ASSERT(CntNext_A,
       rst_ni
@@ -164,97 +193,99 @@ module prim_count #(
       clk_i, err_o || fpv_err_present || !rst_ni)
 
   // Clear
-  `ASSERT(ClrFwd_A,
-      rst_ni && clr_i
-      |=>
-      (cnt_o == ResetValue) &&
-      (cnt_q[1] == ({Width{1'b1}} - ResetValue)),
-      clk_i, err_o || fpv_err_present || !rst_ni)
-  `ASSERT(ClrBkwd_A,
-      rst_ni && !(incr_en_i || decr_en_i || set_i) ##1
-      $changed(cnt_o) && $changed(cnt_q[1])
-      |->
-      $past(clr_i),
-      clk_i, err_o || fpv_err_present || !rst_ni)
+  if (PossibleActions & Clr) begin : g_check_clr_fwd_a
+    `ASSERT(ClrFwd_A,
+            rst_ni && commit_i && clr_i
+            |=>
+            (cnt_o == ResetValue) &&
+            (cnt_q[1] == ({Width{1'b1}} - ResetValue)),
+            clk_i, err_o || fpv_err_present || !rst_ni)
+  end
 
   // Set
-  `ASSERT(SetFwd_A,
-      rst_ni && set_i && !clr_i
-      |=>
-      (cnt_o == $past(set_cnt_i)) &&
-      (cnt_q[1] == ({Width{1'b1}} - $past(set_cnt_i))),
-      clk_i, err_o || fpv_err_present || !rst_ni)
-  `ASSERT(SetBkwd_A,
-      rst_ni && !(incr_en_i || decr_en_i || clr_i) ##1
-      $changed(cnt_o) && $changed(cnt_q[1])
-      |->
-      $past(set_i),
-      clk_i, err_o || fpv_err_present || !rst_ni)
+  if (PossibleActions & Set) begin : g_check_set_fwd_a
+    `ASSERT(SetFwd_A,
+        rst_ni && commit_i && set_i && !clr_i
+        |=>
+        (cnt_o == $past(set_cnt_i)) &&
+        (cnt_q[1] == ({Width{1'b1}} - $past(set_cnt_i))),
+        clk_i, err_o || fpv_err_present || !rst_ni)
+  end
 
   // Do not count if both increment and decrement are asserted.
-  `ASSERT(IncrDecrUpDnCnt_A,
-      rst_ni && incr_en_i && decr_en_i && !(clr_i || set_i)
-      |=>
-      $stable(cnt_o) && $stable(cnt_q[1]),
-      clk_i, err_o || fpv_err_present || !rst_ni)
+  if ((PossibleActions & Incr) && (PossibleActions & Decr)) begin : g_check_inc_and_dec
+    `ASSERT(IncrDecrUpDnCnt_A,
+        rst_ni && incr_en_i && decr_en_i && !(clr_i || set_i)
+        |=>
+        $stable(cnt_o) && $stable(cnt_q[1]),
+        clk_i, err_o || fpv_err_present || !rst_ni)
+  end
 
-  // Up counter
-  `ASSERT(IncrUpCnt_A,
-      rst_ni && incr_en_i && !(clr_i || set_i || decr_en_i) && commit_i
-      |=>
-      cnt_o == min($past(cnt_o) + $past({2'b0, step_i}), {2'b0, {Width{1'b1}}}),
-      clk_i, err_o || fpv_err_present || !rst_ni)
-  `ASSERT(IncrDnCnt_A,
-      rst_ni && incr_en_i && !(clr_i || set_i || decr_en_i) && commit_i
-      |=>
-      cnt_q[1] == max($past(signed'({2'b0, cnt_q[1]})) - $past({2'b0, step_i}), '0),
-      clk_i, err_o || fpv_err_present || !rst_ni)
-  `ASSERT(UpCntIncrStable_A,
-      incr_en_i && !(clr_i || set_i || decr_en_i) &&
-      cnt_o == {Width{1'b1}}
-      |=>
-      $stable(cnt_o),
-      clk_i, err_o || fpv_err_present || !rst_ni)
-  `ASSERT(UpCntDecrStable_A,
-      decr_en_i && !(clr_i || set_i || incr_en_i) &&
-      cnt_o == '0
-      |=>
-      $stable(cnt_o),
-      clk_i, err_o || fpv_err_present || !rst_ni)
+  // Increment
+  if ((PossibleActions & Incr)) begin : g_check_incr
+    `ASSERT(IncrUpCnt_A,
+        rst_ni && incr_en_i && !(clr_i || set_i || decr_en_i) && commit_i
+        |=>
+        cnt_o == min($past(cnt_o) + $past({2'b0, step_i}), {2'b0, {Width{1'b1}}}),
+        clk_i, err_o || fpv_err_present || !rst_ni)
+    `ASSERT(IncrDnCnt_A,
+        rst_ni && incr_en_i && !(clr_i || set_i || decr_en_i) && commit_i
+        |=>
+        cnt_q[1] == max($past(signed'({2'b0, cnt_q[1]})) - $past({2'b0, step_i}), '0),
+        clk_i, err_o || fpv_err_present || !rst_ni)
+    `ASSERT(UpCntIncrStable_A,
+        incr_en_i && !(clr_i || set_i || decr_en_i) &&
+        cnt_o == {Width{1'b1}}
+        |=>
+        $stable(cnt_o),
+        clk_i, err_o || fpv_err_present || !rst_ni)
+    `ASSERT(DnCntIncrStable_A,
+        rst_ni && incr_en_i && !(clr_i || set_i || decr_en_i) &&
+        cnt_q[1] == '0
+        |=>
+        $stable(cnt_q[1]),
+        clk_i, err_o || fpv_err_present || !rst_ni)
+  end
 
-  // Down counter
-  `ASSERT(DecrUpCnt_A,
-      rst_ni && decr_en_i && !(clr_i || set_i || incr_en_i) && commit_i
-      |=>
-      cnt_o == max($past(signed'({2'b0, cnt_o})) - $past({2'b0, step_i}), '0),
-      clk_i, err_o || fpv_err_present || !rst_ni)
-  `ASSERT(DecrDnCnt_A,
-      rst_ni && decr_en_i && !(clr_i || set_i || incr_en_i) && commit_i
-      |=>
-      cnt_q[1] == min($past(cnt_q[1]) + $past({2'b0, step_i}), {2'b0, {Width{1'b1}}}),
-      clk_i, err_o || fpv_err_present || !rst_ni)
-  `ASSERT(DnCntIncrStable_A,
-      rst_ni && incr_en_i && !(clr_i || set_i || decr_en_i) &&
-      cnt_q[1] == '0
-      |=>
-      $stable(cnt_q[1]),
-      clk_i, err_o || fpv_err_present || !rst_ni)
-  `ASSERT(DnCntDecrStable_A,
-      rst_ni && decr_en_i && !(clr_i || set_i || incr_en_i) &&
-      cnt_q[1] == {Width{1'b1}}
-      |=>
-      $stable(cnt_q[1]),
-      clk_i, err_o || fpv_err_present || !rst_ni)
+  // Decrement
+  if ((PossibleActions & Decr)) begin : g_check_decr
+    `ASSERT(DecrUpCnt_A,
+        rst_ni && decr_en_i && !(clr_i || set_i || incr_en_i) && commit_i
+        |=>
+        cnt_o == max($past(signed'({2'b0, cnt_o})) - $past({2'b0, step_i}), '0),
+        clk_i, err_o || fpv_err_present || !rst_ni)
+    `ASSERT(DecrDnCnt_A,
+        rst_ni && decr_en_i && !(clr_i || set_i || incr_en_i) && commit_i
+        |=>
+        cnt_q[1] == min($past(cnt_q[1]) + $past({2'b0, step_i}), {2'b0, {Width{1'b1}}}),
+        clk_i, err_o || fpv_err_present || !rst_ni)
+    `ASSERT(UpCntDecrStable_A,
+        decr_en_i && !(clr_i || set_i || incr_en_i) &&
+        cnt_o == '0
+        |=>
+        $stable(cnt_o),
+        clk_i, err_o || fpv_err_present || !rst_ni)
+    `ASSERT(DnCntDecrStable_A,
+        rst_ni && decr_en_i && !(clr_i || set_i || incr_en_i) &&
+        cnt_q[1] == {Width{1'b1}}
+        |=>
+        $stable(cnt_q[1]),
+        clk_i, err_o || fpv_err_present || !rst_ni)
+  end
+
+  // A backwards check for count changes. This asserts that the count only changes if one of the
+  // inputs that should tell it to change (clear, set, increment, decrement) does so.
+  `ASSERT(ChangeBackward_A,
+          rst_ni ##1 $changed(cnt_o) && $changed(cnt_q[1])
+          |->
+          $past(clr_i || set_i || (commit_i && (incr_en_i || decr_en_i))),
+          clk_i, err_o || fpv_err_present || !rst_ni)
 
-  // Error
-  `ASSERT(CntErrForward_A,
-      (cnt_q[1] + cnt_q[0]) != {Width{1'b1}}
-      |->
-      err_o)
-  `ASSERT(CntErrBackward_A,
-      err_o
-      |->
-      (cnt_q[1] + cnt_q[0]) != {Width{1'b1}})
+  // Check that count errors are reported properly in err_o
+  `ASSERT(CntErrReported_A, ((cnt_q[1] + cnt_q[0]) != {Width{1'b1}}) == err_o)
+ `ifdef PrimCountFpv
+  `COVER(CntErr_C, err_o)
+ `endif
 
   // This logic that will be assign to one, when user adds macro
   // ASSERT_PRIM_COUNT_ERROR_TRIGGER_ALERT to check the error with alert, in case that prim_count
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_count_pkg.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_count_pkg.sv
new file mode 100644
index 0000000000..f87139fc23
--- /dev/null
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_count_pkg.sv
@@ -0,0 +1,15 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+package prim_count_pkg;
+
+  // An enum that names the possible actions that the inputs might ask for. See the PossibleActions
+  // parameter in prim_count for how this is used.
+  typedef logic [3:0] action_mask_t;
+  typedef enum action_mask_t {Clr  = 4'h1,
+                              Set  = 4'h2,
+                              Incr = 4'h4,
+                              Decr = 4'h8} action_e;
+
+endpackage : prim_count_pkg
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_crc32.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_crc32.sv
index 762fd48cb3..f077c07719 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_crc32.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_crc32.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_diff_decode.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_diff_decode.sv
index caf321996a..8c2804cb11 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_diff_decode.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_diff_decode.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
@@ -182,8 +182,16 @@ module prim_diff_decode #(
     // one reg for edge detection
     assign diff_pd = diff_pi;
 
-    // incorrect encoding -> signal integrity issue
-    assign sigint_o = ~(diff_pi ^ diff_ni);
+    // Raise a signal integrity error when the differential signals have equal values.  This is
+    // implemented with a `prim_xnor2` instead of behavioral code to prevent the synthesis tool from
+    // optimizing away combinational logic on the complementary differential signals.
+    prim_xnor2 #(
+      .Width (1)
+    ) u_xnor2_sigint (
+      .in0_i (diff_pi),
+      .in1_i (diff_ni),
+      .out_o (sigint_o)
+    );
 
     assign level_o = (sigint_o) ? level_q : diff_pi;
     assign level_d = level_o;
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_dom_and_2share.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_dom_and_2share.sv
index b45db9ae48..ac3c5dd919 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_dom_and_2share.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_dom_and_2share.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_double_lfsr.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_double_lfsr.sv
index 8fce7b7657..68cc98de5f 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_double_lfsr.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_double_lfsr.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_edge_detector.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_edge_detector.sv
index 2b0a92fb76..94b45cd7b8 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_edge_detector.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_edge_detector.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_edn_req.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_edn_req.sv
index 70efb2e55f..f0d79ffdf9 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_edn_req.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_edn_req.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_esc_pkg.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_esc_pkg.sv
index 8cd9c4ec65..721b0d4837 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_esc_pkg.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_esc_pkg.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_esc_receiver.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_esc_receiver.sv
index 269e390893..2f01b93f0c 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_esc_receiver.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_esc_receiver.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
@@ -97,13 +97,16 @@ module prim_esc_receiver
   logic timeout_cnt_set, timeout_cnt_en;
   logic [TimeoutCntDw-1:0] timeout_cnt;
   assign timeout_cnt_set = (ping_en && !(&timeout_cnt));
-  assign timeout_cnt_en = ((timeout_cnt > '0) && !(&timeout_cnt));
+  assign timeout_cnt_en = (timeout_cnt > '0);
 
   prim_count #(
     .Width(TimeoutCntDw),
     // The escalation receiver behaves differently than other comportable IP. I.e., instead of
     // sending out an alert signal, this condition is handled internally in the alert handler.
-    .EnableAlertTriggerSVA(0)
+    .EnableAlertTriggerSVA(0),
+    // Pass a parameter to disable coverage for some assertions that are unreachable because
+    // clr_i and decr_en_i are tied to zero.
+    .PossibleActions(prim_count_pkg::Set | prim_count_pkg::Incr)
   ) u_prim_count (
     .clk_i,
     .rst_ni,
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_esc_sender.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_esc_sender.sv
index 7987e6ccda..fba0bab890 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_esc_sender.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_esc_sender.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_fifo_async.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_fifo_async.sv
index 0edebc768e..bbdfcf9029 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_fifo_async.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_fifo_async.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_fifo_async_simple.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_fifo_async_simple.sv
index 5dbeed037d..76ee140d7f 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_fifo_async_simple.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_fifo_async_simple.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_fifo_async_sram_adapter.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_fifo_async_sram_adapter.sv
index 4d4911c99f..5d6462d722 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_fifo_async_sram_adapter.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_fifo_async_sram_adapter.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_fifo_sync.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_fifo_sync.sv
index 5e9ee9c3e5..6fc3560cbe 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_fifo_sync.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_fifo_sync.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
@@ -40,7 +40,7 @@ module prim_fifo_sync #(
 
     assign depth_o = 1'b0; //output is meaningless
 
-    // devie facing
+    // device facing
     assign rvalid_o = wvalid_i;
     assign rdata_o = wdata_i;
 
@@ -58,11 +58,10 @@ module prim_fifo_sync #(
   // Normal FIFO construction
   end else begin : gen_normal_fifo
 
-    localparam int unsigned PTRV_W    = prim_util_pkg::vbits(Depth);
-    localparam int unsigned PTR_WIDTH = PTRV_W+1;
+    localparam int unsigned PtrW = prim_util_pkg::vbits(Depth);
 
-    logic [PTR_WIDTH-1:0] fifo_wptr, fifo_rptr;
-    logic                 fifo_incr_wptr, fifo_incr_rptr, fifo_empty;
+    logic [PtrW-1:0] fifo_wptr, fifo_rptr;
+    logic            fifo_incr_wptr, fifo_incr_rptr, fifo_empty;
 
     // module under reset flag
     logic under_rst;
@@ -74,33 +73,15 @@ module prim_fifo_sync #(
       end
     end
 
-    // create the write and read pointers
-    logic  full, empty;
-    logic  wptr_msb;
-    logic  rptr_msb;
-    logic  [PTRV_W-1:0] wptr_value;
-    logic  [PTRV_W-1:0] rptr_value;
-
-    assign wptr_msb = fifo_wptr[PTR_WIDTH-1];
-    assign rptr_msb = fifo_rptr[PTR_WIDTH-1];
-    assign wptr_value = fifo_wptr[0+:PTRV_W];
-    assign rptr_value = fifo_rptr[0+:PTRV_W];
-    assign depth_o = (full)                 ? DepthW'(Depth) :
-                     (wptr_msb == rptr_msb) ? DepthW'(wptr_value) - DepthW'(rptr_value) :
-                     (DepthW'(Depth) - DepthW'(rptr_value) + DepthW'(wptr_value)) ;
-
-    assign fifo_incr_wptr = wvalid_i & wready_o & ~under_rst;
-    assign fifo_incr_rptr = rvalid_o & rready_i & ~under_rst;
+    logic empty;
 
     // full and not ready for write are two different concepts.
     // The latter can be '0' when under reset, while the former is an indication that no more
     // entries can be written.
-    assign wready_o = ~full & ~under_rst;
-    assign full_o   = full;
+    assign wready_o = ~full_o & ~under_rst;
     assign rvalid_o = ~empty & ~under_rst;
 
     prim_fifo_sync_cnt #(
-      .Width(PTR_WIDTH),
       .Depth(Depth),
       .Secure(Secure)
     ) u_fifo_cnt (
@@ -111,40 +92,13 @@ module prim_fifo_sync #(
       .incr_rptr_i(fifo_incr_rptr),
       .wptr_o(fifo_wptr),
       .rptr_o(fifo_rptr),
+      .full_o,
+      .empty_o(fifo_empty),
+      .depth_o,
       .err_o
     );
-
-    //always_ff @(posedge clk_i or negedge rst_ni) begin
-    //  if (!rst_ni) begin
-    //    fifo_wptr <= {(PTR_WIDTH){1'b0}};
-    //  end else if (clr_i) begin
-    //    fifo_wptr <= {(PTR_WIDTH){1'b0}};
-    //  end else if (fifo_incr_wptr) begin
-    //    if (fifo_wptr[PTR_WIDTH-2:0] == (PTR_WIDTH-1)'(Depth-1)) begin
-    //      fifo_wptr <= {~fifo_wptr[PTR_WIDTH-1],{(PTR_WIDTH-1){1'b0}}};
-    //    end else begin
-    //      fifo_wptr <= fifo_wptr + {{(PTR_WIDTH-1){1'b0}},1'b1};
-    //    end
-    //  end
-    //end
-    //
-    //always_ff @(posedge clk_i or negedge rst_ni) begin
-    //  if (!rst_ni) begin
-    //    fifo_rptr <= {(PTR_WIDTH){1'b0}};
-    //  end else if (clr_i) begin
-    //    fifo_rptr <= {(PTR_WIDTH){1'b0}};
-    //  end else if (fifo_incr_rptr) begin
-    //    if (fifo_rptr[PTR_WIDTH-2:0] == (PTR_WIDTH-1)'(Depth-1)) begin
-    //      fifo_rptr <= {~fifo_rptr[PTR_WIDTH-1],{(PTR_WIDTH-1){1'b0}}};
-    //    end else begin
-    //      fifo_rptr <= fifo_rptr + {{(PTR_WIDTH-1){1'b0}},1'b1};
-    //    end
-    //  end
-    //end
-
-    assign  full       = (fifo_wptr == (fifo_rptr ^ {1'b1,{(PTR_WIDTH-1){1'b0}}}));
-    assign  fifo_empty = (fifo_wptr ==  fifo_rptr);
-
+    assign fifo_incr_wptr = wvalid_i & wready_o & ~under_rst;
+    assign fifo_incr_rptr = rvalid_o & rready_i & ~under_rst;
 
     // the generate blocks below are needed to avoid lint errors due to array indexing
     // in the where the fifo only has one storage element
@@ -157,13 +111,17 @@ module prim_fifo_sync #(
         if (fifo_incr_wptr) begin
           storage[0] <= wdata_i;
         end
+
+      logic unused_ptrs;
+      assign unused_ptrs = ^{fifo_wptr, fifo_rptr};
+
     // fifo with more than one storage element
     end else begin : gen_depth_gt1
-      assign storage_rdata = storage[fifo_rptr[PTR_WIDTH-2:0]];
+      assign storage_rdata = storage[fifo_rptr];
 
       always_ff @(posedge clk_i)
         if (fifo_incr_wptr) begin
-          storage[fifo_wptr[PTR_WIDTH-2:0]] <= wdata_i;
+          storage[fifo_wptr] <= wdata_i;
         end
     end
 
@@ -177,7 +135,7 @@ module prim_fifo_sync #(
     end
 
     if (OutputZeroIfEmpty == 1'b1) begin : gen_output_zero
-      assign rdata_o = empty ? 'b0 : rdata_int;
+      assign rdata_o = empty ? Width'(0) : rdata_int;
     end else begin : gen_no_output_zero
       assign rdata_o = rdata_int;
     end
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_fifo_sync_cnt.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_fifo_sync_cnt.sv
index d54977c769..1f0670ddb7 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_fifo_sync_cnt.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_fifo_sync_cnt.sv
@@ -1,70 +1,107 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
-// Generic synchronous fifo for use in a variety of devices.
+// Read and write pointer logic for synchronous FIFOs
 
 `include "prim_assert.sv"
 
 module prim_fifo_sync_cnt #(
-  parameter int Depth = 4,
-  parameter int Width = 16,
-  parameter bit Secure = 1'b0
+  // Depth of the FIFO, i.e., maximum number of entries the FIFO can contain
+  parameter int unsigned Depth = 4,
+  // Whether to instantiate hardened counters
+  parameter bit Secure = 1'b0,
+  // Width of the read and write pointers for the FIFO
+  localparam int unsigned PtrW = prim_util_pkg::vbits(Depth),
+  // Width of the 'current depth' output
+  localparam int unsigned DepthW = prim_util_pkg::vbits(Depth+1)
 ) (
   input clk_i,
   input rst_ni,
   input clr_i,
   input incr_wptr_i,
   input incr_rptr_i,
-  output logic [Width-1:0] wptr_o,
-  output logic [Width-1:0] rptr_o,
+  // Write and read pointers.  Value range: [0, Depth-1]
+  output logic [PtrW-1:0] wptr_o,
+  output logic [PtrW-1:0] rptr_o,
+  output logic full_o,
+  output logic empty_o,
+  // Current depth of the FIFO, i.e., number of entries the FIFO currently contains.
+  // Value range: [0, Depth]
+  output logic [DepthW-1:0] depth_o,
   output logic err_o
 );
 
-  logic wptr_wrap;
-  logic [Width-1:0] wptr_wrap_cnt;
-  logic rptr_wrap;
-  logic [Width-1:0] rptr_wrap_cnt;
+  // Internal 'wrap' pointers that have an extra leading bit to account for wraparounds.
+  localparam int unsigned WrapPtrW = PtrW + 1;
+  logic [WrapPtrW-1:0] wptr_wrap_cnt_q, wptr_wrap_set_cnt,
+                       rptr_wrap_cnt_q, rptr_wrap_set_cnt;
 
-  assign wptr_wrap = incr_wptr_i & (wptr_o[Width-2:0] == unsigned'((Width-1)'(Depth-1)));
-  assign rptr_wrap = incr_rptr_i & (rptr_o[Width-2:0] == unsigned'((Width-1)'(Depth-1)));
+  // Derive real read and write pointers by truncating the internal 'wrap' pointers.
+  assign wptr_o = wptr_wrap_cnt_q[PtrW-1:0];
+  assign rptr_o = rptr_wrap_cnt_q[PtrW-1:0];
 
-  assign wptr_wrap_cnt = {~wptr_o[Width-1],{(Width-1){1'b0}}};
-  assign rptr_wrap_cnt = {~rptr_o[Width-1],{(Width-1){1'b0}}};
+  // Extract the MSB of the 'wrap' pointers.
+  logic wptr_wrap_msb, rptr_wrap_msb;
+  assign wptr_wrap_msb = wptr_wrap_cnt_q[WrapPtrW-1];
+  assign rptr_wrap_msb = rptr_wrap_cnt_q[WrapPtrW-1];
+
+  // Wrap pointers when they have reached the maximum value and are about to get incremented.
+  logic wptr_wrap_set, rptr_wrap_set;
+  assign wptr_wrap_set = incr_wptr_i & (wptr_o == PtrW'(Depth-1));
+  assign rptr_wrap_set = incr_rptr_i & (rptr_o == PtrW'(Depth-1));
+
+  // When wrapping, invert the MSB and reset all lower bits to zero.
+  assign wptr_wrap_set_cnt = {~wptr_wrap_msb, {(WrapPtrW-1){1'b0}}};
+  assign rptr_wrap_set_cnt = {~rptr_wrap_msb, {(WrapPtrW-1){1'b0}}};
+
+  // Full when both 'wrap' counters have a different MSB but all lower bits are equal.
+  assign full_o = wptr_wrap_cnt_q == (rptr_wrap_cnt_q ^ {1'b1, {(WrapPtrW-1){1'b0}}});
+  // Empty when both 'wrap' counters are equal in all bits including the MSB.
+  assign empty_o = wptr_wrap_cnt_q == rptr_wrap_cnt_q;
+
+  // The current depth is equal to:
+  // - when full: the maximum depth;
+  // - when both or none of the 'wrap' pointers are wrapped: the difference of the real pointers;
+  // - when only one of the two 'wrap' pointers is wrapped: the maximum depth minus the difference
+  //   of the real pointers.
+  assign depth_o = full_o                         ? DepthW'(Depth) :
+                   wptr_wrap_msb == rptr_wrap_msb ? DepthW'(wptr_o) - DepthW'(rptr_o) :
+                   DepthW'(Depth) - DepthW'(rptr_o) + DepthW'(wptr_o);
 
   if (Secure) begin : gen_secure_ptrs
     logic wptr_err;
     prim_count #(
-      .Width(Width)
+      .Width(WrapPtrW)
     ) u_wptr (
       .clk_i,
       .rst_ni,
       .clr_i,
-      .set_i(wptr_wrap),
-      .set_cnt_i(wptr_wrap_cnt),
+      .set_i(wptr_wrap_set),
+      .set_cnt_i(wptr_wrap_set_cnt),
       .incr_en_i(incr_wptr_i),
       .decr_en_i(1'b0),
-      .step_i(Width'(1'b1)),
+      .step_i(WrapPtrW'(1'b1)),
       .commit_i(1'b1),
-      .cnt_o(wptr_o),
+      .cnt_o(wptr_wrap_cnt_q),
       .cnt_after_commit_o(),
       .err_o(wptr_err)
     );
 
     logic rptr_err;
     prim_count #(
-      .Width(Width)
+      .Width(WrapPtrW)
     ) u_rptr (
       .clk_i,
       .rst_ni,
       .clr_i,
-      .set_i(rptr_wrap),
-      .set_cnt_i(rptr_wrap_cnt),
+      .set_i(rptr_wrap_set),
+      .set_cnt_i(rptr_wrap_set_cnt),
       .incr_en_i(incr_rptr_i),
       .decr_en_i(1'b0),
-      .step_i(Width'(1'b1)),
+      .step_i(WrapPtrW'(1'b1)),
       .commit_i(1'b1),
-      .cnt_o(rptr_o),
+      .cnt_o(rptr_wrap_cnt_q),
       .cnt_after_commit_o(),
       .err_o(rptr_err)
     );
@@ -74,31 +111,29 @@ module prim_fifo_sync_cnt #(
   end else begin : gen_normal_ptrs
     always_ff @(posedge clk_i or negedge rst_ni) begin
       if (!rst_ni) begin
-        wptr_o <= {(Width){1'b0}};
+        wptr_wrap_cnt_q <= {WrapPtrW{1'b0}};
       end else if (clr_i) begin
-        wptr_o <= {(Width){1'b0}};
-      end else if (wptr_wrap) begin
-        wptr_o <= wptr_wrap_cnt;
+        wptr_wrap_cnt_q <= {WrapPtrW{1'b0}};
+      end else if (wptr_wrap_set) begin
+        wptr_wrap_cnt_q <= wptr_wrap_set_cnt;
       end else if (incr_wptr_i) begin
-        wptr_o <= wptr_o + {{(Width-1){1'b0}},1'b1};
+        wptr_wrap_cnt_q <= wptr_wrap_cnt_q + {{(WrapPtrW-1){1'b0}}, 1'b1};
       end
     end
 
     always_ff @(posedge clk_i or negedge rst_ni) begin
       if (!rst_ni) begin
-        rptr_o <= {(Width){1'b0}};
+        rptr_wrap_cnt_q <= {WrapPtrW{1'b0}};
       end else if (clr_i) begin
-        rptr_o <= {(Width){1'b0}};
-      end else if (rptr_wrap) begin
-         rptr_o <= rptr_wrap_cnt;
+        rptr_wrap_cnt_q <= {WrapPtrW{1'b0}};
+      end else if (rptr_wrap_set) begin
+        rptr_wrap_cnt_q <= rptr_wrap_set_cnt;
       end else if (incr_rptr_i) begin
-         rptr_o <= rptr_o + {{(Width-1){1'b0}},1'b1};
+        rptr_wrap_cnt_q <= rptr_wrap_cnt_q + {{(WrapPtrW-1){1'b0}}, 1'b1};
       end
     end
 
     assign err_o = '0;
   end
 
-
-
 endmodule // prim_fifo_sync_cnt
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_filter.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_filter.sv
index a9d5dcdcaa..9878e5a861 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_filter.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_filter.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
@@ -70,4 +70,3 @@ module prim_filter #(
   assign filter_o = enable_i ? stored_value_q : filter_synced;
 
 endmodule
-
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_filter_ctr.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_filter_ctr.sv
index 435b16155e..1a39205700 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_filter_ctr.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_filter_ctr.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
@@ -79,4 +79,3 @@ module prim_filter_ctr #(
   assign filter_o = enable_i ? stored_value_q : filter_synced;
 
 endmodule
-
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_flop_2sync.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_flop_2sync.sv
index 7ff3c76ae8..5b46928624 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_flop_2sync.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_flop_2sync.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_flop_macros.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_flop_macros.sv
index edae459a2e..ce59bb29d4 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_flop_macros.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_flop_macros.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_gate_gen.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_gate_gen.sv
index dac761fd9d..01cf18135d 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_gate_gen.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_gate_gen.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_gf_mult.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_gf_mult.sv
index aa47c22ee8..f8f34eea69 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_gf_mult.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_gf_mult.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_intr_hw.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_intr_hw.sv
index 941b995827..e2a6e438f2 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_intr_hw.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_intr_hw.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_keccak.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_keccak.sv
index 16b3178504..42984515c3 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_keccak.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_keccak.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
@@ -292,4 +292,3 @@ module prim_keccak #(
   //endfunction : keccak_rnd
 
 endmodule
-
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_lc_and_hardened.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_lc_and_hardened.sv
index ae10f6a489..5905b3c3f1 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_lc_and_hardened.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_lc_and_hardened.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_lc_combine.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_lc_combine.sv
index 2b3cce93de..25aeb60d08 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_lc_combine.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_lc_combine.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_lc_dec.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_lc_dec.sv
index d10e0ce3e6..aeee8a7568 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_lc_dec.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_lc_dec.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_lc_or_hardened.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_lc_or_hardened.sv
index a1c1df1719..dce7664692 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_lc_or_hardened.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_lc_or_hardened.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_lc_sender.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_lc_sender.sv
index ae95a2c7f9..849eba82fc 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_lc_sender.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_lc_sender.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_lc_sync.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_lc_sync.sv
index d1536c6b90..5f2f7d5ff7 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_lc_sync.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_lc_sync.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_lfsr.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_lfsr.sv
index d6d12445a9..e2400a101d 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_lfsr.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_lfsr.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_macros.svh b/vendor/lowrisc_ip/ip/prim/rtl/prim_macros.svh
index 5561f141aa..c4f739c637 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_macros.svh
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_macros.svh
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_max_tree.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_max_tree.sv
index e23a76f307..9422d6d0a9 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_max_tree.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_max_tree.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_msb_extend.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_msb_extend.sv
index 9b37c64a14..9cb303802f 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_msb_extend.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_msb_extend.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi12_dec.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi12_dec.sv
index 1bc8503310..6c983e0bd1 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi12_dec.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi12_dec.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi12_sender.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi12_sender.sv
index 230efdcafc..168b39e175 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi12_sender.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi12_sender.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi12_sync.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi12_sync.sv
index 30ee2d6a55..6376682d3d 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi12_sync.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi12_sync.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi16_dec.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi16_dec.sv
index 17411474c4..a2d04a8d82 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi16_dec.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi16_dec.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi16_sender.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi16_sender.sv
index e12b99d2a7..190d13435f 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi16_sender.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi16_sender.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi16_sync.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi16_sync.sv
index 02be5a0c41..f73f5bb2e9 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi16_sync.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi16_sync.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi20_dec.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi20_dec.sv
new file mode 100644
index 0000000000..447a199d0d
--- /dev/null
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi20_dec.sv
@@ -0,0 +1,48 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+//
+// ------------------- W A R N I N G: A U T O - G E N E R A T E D   C O D E !! -------------------//
+// PLEASE DO NOT HAND-EDIT THIS FILE. IT HAS BEEN AUTO-GENERATED WITH THE FOLLOWING COMMAND:
+//
+//    util/design/gen-mubi.py
+//
+// Decoder for multibit control signals with additional input buffers.
+
+`include "prim_assert.sv"
+
+module prim_mubi20_dec
+  import prim_mubi_pkg::*;
+#(
+  parameter bit TestTrue = 1,
+  parameter bit TestStrict = 1
+) (
+  input  mubi20_t mubi_i,
+  output logic           mubi_dec_o
+);
+
+logic [MuBi20Width-1:0] mubi, mubi_out;
+assign mubi = MuBi20Width'(mubi_i);
+
+// The buffer cells have a don't touch constraint on them
+// such that synthesis tools won't collapse them
+for (genvar k = 0; k < MuBi20Width; k++) begin : gen_bits
+  prim_buf u_prim_buf (
+    .in_i  ( mubi[k]     ),
+    .out_o ( mubi_out[k] )
+  );
+end
+
+if (TestTrue && TestStrict) begin : gen_test_true_strict
+  assign mubi_dec_o = mubi20_test_true_strict(mubi20_t'(mubi_out));
+end else if (TestTrue && !TestStrict) begin : gen_test_true_loose
+  assign mubi_dec_o = mubi20_test_true_loose(mubi20_t'(mubi_out));
+end else if (!TestTrue && TestStrict) begin : gen_test_false_strict
+  assign mubi_dec_o = mubi20_test_false_strict(mubi20_t'(mubi_out));
+end else if (!TestTrue && !TestStrict) begin : gen_test_false_loose
+  assign mubi_dec_o = mubi20_test_false_loose(mubi20_t'(mubi_out));
+end else begin : gen_unknown_config
+  `ASSERT_INIT(UnknownConfig_A, 0)
+end
+
+endmodule : prim_mubi20_dec
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi20_sender.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi20_sender.sv
new file mode 100644
index 0000000000..73fc7d021c
--- /dev/null
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi20_sender.sv
@@ -0,0 +1,94 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+//
+// ------------------- W A R N I N G: A U T O - G E N E R A T E D   C O D E !! -------------------//
+// PLEASE DO NOT HAND-EDIT THIS FILE. IT HAS BEEN AUTO-GENERATED WITH THE FOLLOWING COMMAND:
+//
+//    util/design/gen-mubi.py
+//
+// Multibit sender module. This module is instantiates a hand-picked flop cell for each bit in the
+// multibit signal such that tools do not optimize the multibit encoding.
+
+`include "prim_assert.sv"
+
+module prim_mubi20_sender
+  import prim_mubi_pkg::*;
+#(
+  // This flops the output if set to 1.
+  // In special cases where the sender is in the same clock domain as the receiver,
+  // this can be set to 0. However, it is recommended to leave this at 1.
+  parameter bit AsyncOn = 1,
+  // Enable anchor buffer
+  parameter bit EnSecBuf = 0,
+  // Reset value for the sender flops
+  parameter mubi20_t ResetValue = MuBi20False
+) (
+  input          clk_i,
+  input          rst_ni,
+  input  mubi20_t mubi_i,
+  output mubi20_t mubi_o
+);
+
+  logic [MuBi20Width-1:0] mubi, mubi_int, mubi_out;
+  assign mubi = MuBi20Width'(mubi_i);
+
+  // first generation block decides whether a flop should be present
+  if (AsyncOn) begin : gen_flops
+    prim_flop #(
+      .Width(MuBi20Width),
+      .ResetValue(MuBi20Width'(ResetValue))
+    ) u_prim_flop (
+      .clk_i,
+      .rst_ni,
+      .d_i   ( mubi     ),
+      .q_o   ( mubi_int )
+    );
+  end else begin : gen_no_flops
+    assign mubi_int = mubi;
+
+    // This unused companion logic helps remove lint errors
+    // for modules where clock and reset are used for assertions only
+    // This logic will be removed for sythesis since it is unloaded.
+    mubi20_t unused_logic;
+    always_ff @(posedge clk_i or negedge rst_ni) begin
+      if (!rst_ni) begin
+         unused_logic <= MuBi20False;
+      end else begin
+         unused_logic <= mubi_i;
+      end
+    end
+  end
+
+  // second generation block determines output buffer type
+  // 1. If EnSecBuf -> always leads to a sec buffer regardless of first block
+  // 2. If not EnSecBuf and not AsyncOn -> use normal buffer
+  // 3. If not EnSecBuf and AsyncOn -> feed through
+  if (EnSecBuf) begin : gen_sec_buf
+    prim_sec_anchor_buf #(
+      .Width(20)
+    ) u_prim_sec_buf (
+      .in_i(mubi_int),
+      .out_o(mubi_out)
+    );
+  end else if (!AsyncOn) begin : gen_prim_buf
+    prim_buf #(
+      .Width(20)
+    ) u_prim_buf (
+      .in_i(mubi_int),
+      .out_o(mubi_out)
+    );
+  end else begin : gen_feedthru
+    assign mubi_out = mubi_int;
+  end
+
+  assign mubi_o = mubi20_t'(mubi_out);
+
+  ////////////////
+  // Assertions //
+  ////////////////
+
+  // The outputs should be known at all times.
+  `ASSERT_KNOWN(OutputsKnown_A, mubi_o)
+
+endmodule : prim_mubi20_sender
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi20_sync.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi20_sync.sv
new file mode 100644
index 0000000000..e54c6214fa
--- /dev/null
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi20_sync.sv
@@ -0,0 +1,178 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+//
+// ------------------- W A R N I N G: A U T O - G E N E R A T E D   C O D E !! -------------------//
+// PLEASE DO NOT HAND-EDIT THIS FILE. IT HAS BEEN AUTO-GENERATED WITH THE FOLLOWING COMMAND:
+//
+//    util/design/gen-mubi.py
+//
+// Double-synchronizer flop for multibit signals with additional output buffers.
+
+`include "prim_assert.sv"
+
+module prim_mubi20_sync
+  import prim_mubi_pkg::*;
+#(
+  // Number of separately buffered output signals.
+  // The buffer cells have a don't touch constraint
+  // on them such that synthesis tools won't collapse
+  // all copies into one signal.
+  parameter int NumCopies = 1,
+  // This instantiates the synchronizer flops if set to 1.
+  // In special cases where the receiver is in the same clock domain as the sender,
+  // this can be set to 0. However, it is recommended to leave this at 1.
+  parameter bit AsyncOn = 1,
+  // This controls whether the mubi module institutes stability checks when
+  // AsyncOn is set.  If stability checks are on, a 3rd stage of storage is
+  // added after the synchronizers and the outputs only updated if the 3rd
+  // stage and sychronizer agree.  If they do not agree, the ResetValue is
+  // output instead.
+  parameter bit StabilityCheck = 0,
+  // Reset value for the sync flops
+  parameter mubi20_t ResetValue = MuBi20False
+) (
+  input                          clk_i,
+  input                          rst_ni,
+  input  mubi20_t                 mubi_i,
+  output mubi20_t [NumCopies-1:0] mubi_o
+);
+
+  `ASSERT_INIT(NumCopiesMustBeGreaterZero_A, NumCopies > 0)
+
+  logic [MuBi20Width-1:0] mubi;
+  if (AsyncOn) begin : gen_flops
+    logic [MuBi20Width-1:0] mubi_sync;
+    prim_flop_2sync #(
+      .Width(MuBi20Width),
+      .ResetValue(MuBi20Width'(ResetValue))
+    ) u_prim_flop_2sync (
+      .clk_i,
+      .rst_ni,
+      .d_i(MuBi20Width'(mubi_i)),
+      .q_o(mubi_sync)
+    );
+
+    if (StabilityCheck) begin : gen_stable_chks
+      logic [MuBi20Width-1:0] mubi_q;
+      prim_flop #(
+        .Width(MuBi20Width),
+        .ResetValue(MuBi20Width'(ResetValue))
+      ) u_prim_flop_3rd_stage (
+        .clk_i,
+        .rst_ni,
+        .d_i(mubi_sync),
+        .q_o(mubi_q)
+      );
+
+      logic [MuBi20Width-1:0] sig_unstable;
+      prim_xor2 #(
+        .Width(MuBi20Width)
+      ) u_mubi_xor (
+        .in0_i(mubi_sync),
+        .in1_i(mubi_q),
+        .out_o(sig_unstable)
+      );
+
+      logic [MuBi20Width-1:0] reset_value;
+      assign reset_value = ResetValue;
+
+      for (genvar k = 0; k < MuBi20Width; k++) begin : gen_bufs_muxes
+        logic [MuBi20Width-1:0] sig_unstable_buf;
+
+        // each mux gets its own buffered output, this ensures the OR-ing
+        // cannot be defeated in one place.
+        prim_sec_anchor_buf #(
+          .Width(MuBi20Width)
+        ) u_sig_unstable_buf (
+          .in_i(sig_unstable),
+          .out_o(sig_unstable_buf)
+        );
+
+        // if any xor indicates signal is unstable, output the reset
+        // value. note that the input and output signals of this mux
+        // are driven/read by constrained primitive cells (regs, buffers),
+        // hence this mux can be implemented behaviorally.
+        assign mubi[k] = (|sig_unstable_buf) ? reset_value[k] : mubi_q[k];
+      end
+
+// Note regarding SVAs below:
+//
+// 1) Without the sampled rst_ni pre-condition, this may cause false assertion failures right after
+// a reset release, since the "disable iff" condition with the rst_ni is sampled in the "observed"
+// SV scheduler region after all assignments have been evaluated (see also LRM section 16.12, page
+// 423). This is a simulation artifact due to reset synchronization in RTL, which releases rst_ni
+// on the active clock edge. This causes the assertion to evaluate although the reset was actually
+// 0 when entering this simulation cycle.
+//
+// 2) Similarly to 1) there can be sampling mismatches of the lc_en_i signal since that signal may
+// originate from a different clock domain. I.e., in cases where the lc_en_i signal changes exactly
+// at the same time that the clk_i signal rises, the SVA will not pick up that change in that clock
+// cycle, whereas RTL will because SVAs sample values in the "preponed" region. To that end we make
+// use of an RTL helper variable to sample the lc_en_i signal, hence ensuring that there are no
+// sampling mismatches.
+`ifdef INC_ASSERT
+      mubi20_t mubi_in_sva_q;
+      always_ff @(posedge clk_i) begin
+        mubi_in_sva_q <= mubi_i;
+      end
+      `ASSERT(OutputIfUnstable_A, sig_unstable |-> mubi_o == {NumCopies{reset_value}})
+      `ASSERT(OutputDelay_A,
+              rst_ni |-> ##[3:4] sig_unstable || mubi_o == {NumCopies{$past(mubi_in_sva_q, 2)}})
+`endif
+    end else begin : gen_no_stable_chks
+      assign mubi = mubi_sync;
+`ifdef INC_ASSERT
+      mubi20_t mubi_in_sva_q;
+      always_ff @(posedge clk_i) begin
+        mubi_in_sva_q <= mubi_i;
+      end
+      `ASSERT(OutputDelay_A,
+              rst_ni |-> ##3 (mubi_o == {NumCopies{$past(mubi_in_sva_q, 2)}} ||
+                              $past(mubi_in_sva_q, 2) != $past(mubi_in_sva_q, 1)))
+`endif
+    end
+  end else begin : gen_no_flops
+
+    //VCS coverage off
+    // pragma coverage off
+
+    // This unused companion logic helps remove lint errors
+    // for modules where clock and reset are used for assertions only
+    // This logic will be removed for synthesis since it is unloaded.
+    mubi20_t unused_logic;
+    always_ff @(posedge clk_i or negedge rst_ni) begin
+      if (!rst_ni) begin
+         unused_logic <= MuBi20False;
+      end else begin
+         unused_logic <= mubi_i;
+      end
+    end
+
+    //VCS coverage on
+    // pragma coverage on
+
+    assign mubi = MuBi20Width'(mubi_i);
+
+    `ASSERT(OutputDelay_A, mubi_o == {NumCopies{mubi_i}})
+  end
+
+  for (genvar j = 0; j < NumCopies; j++) begin : gen_buffs
+    logic [MuBi20Width-1:0] mubi_out;
+    for (genvar k = 0; k < MuBi20Width; k++) begin : gen_bits
+      prim_buf u_prim_buf (
+        .in_i(mubi[k]),
+        .out_o(mubi_out[k])
+      );
+    end
+    assign mubi_o[j] = mubi20_t'(mubi_out);
+  end
+
+  ////////////////
+  // Assertions //
+  ////////////////
+
+  // The outputs should be known at all times.
+  `ASSERT_KNOWN(OutputsKnown_A, mubi_o)
+
+endmodule : prim_mubi20_sync
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi24_dec.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi24_dec.sv
new file mode 100644
index 0000000000..7bb07314bf
--- /dev/null
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi24_dec.sv
@@ -0,0 +1,48 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+//
+// ------------------- W A R N I N G: A U T O - G E N E R A T E D   C O D E !! -------------------//
+// PLEASE DO NOT HAND-EDIT THIS FILE. IT HAS BEEN AUTO-GENERATED WITH THE FOLLOWING COMMAND:
+//
+//    util/design/gen-mubi.py
+//
+// Decoder for multibit control signals with additional input buffers.
+
+`include "prim_assert.sv"
+
+module prim_mubi24_dec
+  import prim_mubi_pkg::*;
+#(
+  parameter bit TestTrue = 1,
+  parameter bit TestStrict = 1
+) (
+  input  mubi24_t mubi_i,
+  output logic           mubi_dec_o
+);
+
+logic [MuBi24Width-1:0] mubi, mubi_out;
+assign mubi = MuBi24Width'(mubi_i);
+
+// The buffer cells have a don't touch constraint on them
+// such that synthesis tools won't collapse them
+for (genvar k = 0; k < MuBi24Width; k++) begin : gen_bits
+  prim_buf u_prim_buf (
+    .in_i  ( mubi[k]     ),
+    .out_o ( mubi_out[k] )
+  );
+end
+
+if (TestTrue && TestStrict) begin : gen_test_true_strict
+  assign mubi_dec_o = mubi24_test_true_strict(mubi24_t'(mubi_out));
+end else if (TestTrue && !TestStrict) begin : gen_test_true_loose
+  assign mubi_dec_o = mubi24_test_true_loose(mubi24_t'(mubi_out));
+end else if (!TestTrue && TestStrict) begin : gen_test_false_strict
+  assign mubi_dec_o = mubi24_test_false_strict(mubi24_t'(mubi_out));
+end else if (!TestTrue && !TestStrict) begin : gen_test_false_loose
+  assign mubi_dec_o = mubi24_test_false_loose(mubi24_t'(mubi_out));
+end else begin : gen_unknown_config
+  `ASSERT_INIT(UnknownConfig_A, 0)
+end
+
+endmodule : prim_mubi24_dec
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi24_sender.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi24_sender.sv
new file mode 100644
index 0000000000..d01239b660
--- /dev/null
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi24_sender.sv
@@ -0,0 +1,94 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+//
+// ------------------- W A R N I N G: A U T O - G E N E R A T E D   C O D E !! -------------------//
+// PLEASE DO NOT HAND-EDIT THIS FILE. IT HAS BEEN AUTO-GENERATED WITH THE FOLLOWING COMMAND:
+//
+//    util/design/gen-mubi.py
+//
+// Multibit sender module. This module is instantiates a hand-picked flop cell for each bit in the
+// multibit signal such that tools do not optimize the multibit encoding.
+
+`include "prim_assert.sv"
+
+module prim_mubi24_sender
+  import prim_mubi_pkg::*;
+#(
+  // This flops the output if set to 1.
+  // In special cases where the sender is in the same clock domain as the receiver,
+  // this can be set to 0. However, it is recommended to leave this at 1.
+  parameter bit AsyncOn = 1,
+  // Enable anchor buffer
+  parameter bit EnSecBuf = 0,
+  // Reset value for the sender flops
+  parameter mubi24_t ResetValue = MuBi24False
+) (
+  input          clk_i,
+  input          rst_ni,
+  input  mubi24_t mubi_i,
+  output mubi24_t mubi_o
+);
+
+  logic [MuBi24Width-1:0] mubi, mubi_int, mubi_out;
+  assign mubi = MuBi24Width'(mubi_i);
+
+  // first generation block decides whether a flop should be present
+  if (AsyncOn) begin : gen_flops
+    prim_flop #(
+      .Width(MuBi24Width),
+      .ResetValue(MuBi24Width'(ResetValue))
+    ) u_prim_flop (
+      .clk_i,
+      .rst_ni,
+      .d_i   ( mubi     ),
+      .q_o   ( mubi_int )
+    );
+  end else begin : gen_no_flops
+    assign mubi_int = mubi;
+
+    // This unused companion logic helps remove lint errors
+    // for modules where clock and reset are used for assertions only
+    // This logic will be removed for sythesis since it is unloaded.
+    mubi24_t unused_logic;
+    always_ff @(posedge clk_i or negedge rst_ni) begin
+      if (!rst_ni) begin
+         unused_logic <= MuBi24False;
+      end else begin
+         unused_logic <= mubi_i;
+      end
+    end
+  end
+
+  // second generation block determines output buffer type
+  // 1. If EnSecBuf -> always leads to a sec buffer regardless of first block
+  // 2. If not EnSecBuf and not AsyncOn -> use normal buffer
+  // 3. If not EnSecBuf and AsyncOn -> feed through
+  if (EnSecBuf) begin : gen_sec_buf
+    prim_sec_anchor_buf #(
+      .Width(24)
+    ) u_prim_sec_buf (
+      .in_i(mubi_int),
+      .out_o(mubi_out)
+    );
+  end else if (!AsyncOn) begin : gen_prim_buf
+    prim_buf #(
+      .Width(24)
+    ) u_prim_buf (
+      .in_i(mubi_int),
+      .out_o(mubi_out)
+    );
+  end else begin : gen_feedthru
+    assign mubi_out = mubi_int;
+  end
+
+  assign mubi_o = mubi24_t'(mubi_out);
+
+  ////////////////
+  // Assertions //
+  ////////////////
+
+  // The outputs should be known at all times.
+  `ASSERT_KNOWN(OutputsKnown_A, mubi_o)
+
+endmodule : prim_mubi24_sender
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi24_sync.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi24_sync.sv
new file mode 100644
index 0000000000..f7a5328145
--- /dev/null
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi24_sync.sv
@@ -0,0 +1,178 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+//
+// ------------------- W A R N I N G: A U T O - G E N E R A T E D   C O D E !! -------------------//
+// PLEASE DO NOT HAND-EDIT THIS FILE. IT HAS BEEN AUTO-GENERATED WITH THE FOLLOWING COMMAND:
+//
+//    util/design/gen-mubi.py
+//
+// Double-synchronizer flop for multibit signals with additional output buffers.
+
+`include "prim_assert.sv"
+
+module prim_mubi24_sync
+  import prim_mubi_pkg::*;
+#(
+  // Number of separately buffered output signals.
+  // The buffer cells have a don't touch constraint
+  // on them such that synthesis tools won't collapse
+  // all copies into one signal.
+  parameter int NumCopies = 1,
+  // This instantiates the synchronizer flops if set to 1.
+  // In special cases where the receiver is in the same clock domain as the sender,
+  // this can be set to 0. However, it is recommended to leave this at 1.
+  parameter bit AsyncOn = 1,
+  // This controls whether the mubi module institutes stability checks when
+  // AsyncOn is set.  If stability checks are on, a 3rd stage of storage is
+  // added after the synchronizers and the outputs only updated if the 3rd
+  // stage and sychronizer agree.  If they do not agree, the ResetValue is
+  // output instead.
+  parameter bit StabilityCheck = 0,
+  // Reset value for the sync flops
+  parameter mubi24_t ResetValue = MuBi24False
+) (
+  input                          clk_i,
+  input                          rst_ni,
+  input  mubi24_t                 mubi_i,
+  output mubi24_t [NumCopies-1:0] mubi_o
+);
+
+  `ASSERT_INIT(NumCopiesMustBeGreaterZero_A, NumCopies > 0)
+
+  logic [MuBi24Width-1:0] mubi;
+  if (AsyncOn) begin : gen_flops
+    logic [MuBi24Width-1:0] mubi_sync;
+    prim_flop_2sync #(
+      .Width(MuBi24Width),
+      .ResetValue(MuBi24Width'(ResetValue))
+    ) u_prim_flop_2sync (
+      .clk_i,
+      .rst_ni,
+      .d_i(MuBi24Width'(mubi_i)),
+      .q_o(mubi_sync)
+    );
+
+    if (StabilityCheck) begin : gen_stable_chks
+      logic [MuBi24Width-1:0] mubi_q;
+      prim_flop #(
+        .Width(MuBi24Width),
+        .ResetValue(MuBi24Width'(ResetValue))
+      ) u_prim_flop_3rd_stage (
+        .clk_i,
+        .rst_ni,
+        .d_i(mubi_sync),
+        .q_o(mubi_q)
+      );
+
+      logic [MuBi24Width-1:0] sig_unstable;
+      prim_xor2 #(
+        .Width(MuBi24Width)
+      ) u_mubi_xor (
+        .in0_i(mubi_sync),
+        .in1_i(mubi_q),
+        .out_o(sig_unstable)
+      );
+
+      logic [MuBi24Width-1:0] reset_value;
+      assign reset_value = ResetValue;
+
+      for (genvar k = 0; k < MuBi24Width; k++) begin : gen_bufs_muxes
+        logic [MuBi24Width-1:0] sig_unstable_buf;
+
+        // each mux gets its own buffered output, this ensures the OR-ing
+        // cannot be defeated in one place.
+        prim_sec_anchor_buf #(
+          .Width(MuBi24Width)
+        ) u_sig_unstable_buf (
+          .in_i(sig_unstable),
+          .out_o(sig_unstable_buf)
+        );
+
+        // if any xor indicates signal is unstable, output the reset
+        // value. note that the input and output signals of this mux
+        // are driven/read by constrained primitive cells (regs, buffers),
+        // hence this mux can be implemented behaviorally.
+        assign mubi[k] = (|sig_unstable_buf) ? reset_value[k] : mubi_q[k];
+      end
+
+// Note regarding SVAs below:
+//
+// 1) Without the sampled rst_ni pre-condition, this may cause false assertion failures right after
+// a reset release, since the "disable iff" condition with the rst_ni is sampled in the "observed"
+// SV scheduler region after all assignments have been evaluated (see also LRM section 16.12, page
+// 423). This is a simulation artifact due to reset synchronization in RTL, which releases rst_ni
+// on the active clock edge. This causes the assertion to evaluate although the reset was actually
+// 0 when entering this simulation cycle.
+//
+// 2) Similarly to 1) there can be sampling mismatches of the lc_en_i signal since that signal may
+// originate from a different clock domain. I.e., in cases where the lc_en_i signal changes exactly
+// at the same time that the clk_i signal rises, the SVA will not pick up that change in that clock
+// cycle, whereas RTL will because SVAs sample values in the "preponed" region. To that end we make
+// use of an RTL helper variable to sample the lc_en_i signal, hence ensuring that there are no
+// sampling mismatches.
+`ifdef INC_ASSERT
+      mubi24_t mubi_in_sva_q;
+      always_ff @(posedge clk_i) begin
+        mubi_in_sva_q <= mubi_i;
+      end
+      `ASSERT(OutputIfUnstable_A, sig_unstable |-> mubi_o == {NumCopies{reset_value}})
+      `ASSERT(OutputDelay_A,
+              rst_ni |-> ##[3:4] sig_unstable || mubi_o == {NumCopies{$past(mubi_in_sva_q, 2)}})
+`endif
+    end else begin : gen_no_stable_chks
+      assign mubi = mubi_sync;
+`ifdef INC_ASSERT
+      mubi24_t mubi_in_sva_q;
+      always_ff @(posedge clk_i) begin
+        mubi_in_sva_q <= mubi_i;
+      end
+      `ASSERT(OutputDelay_A,
+              rst_ni |-> ##3 (mubi_o == {NumCopies{$past(mubi_in_sva_q, 2)}} ||
+                              $past(mubi_in_sva_q, 2) != $past(mubi_in_sva_q, 1)))
+`endif
+    end
+  end else begin : gen_no_flops
+
+    //VCS coverage off
+    // pragma coverage off
+
+    // This unused companion logic helps remove lint errors
+    // for modules where clock and reset are used for assertions only
+    // This logic will be removed for synthesis since it is unloaded.
+    mubi24_t unused_logic;
+    always_ff @(posedge clk_i or negedge rst_ni) begin
+      if (!rst_ni) begin
+         unused_logic <= MuBi24False;
+      end else begin
+         unused_logic <= mubi_i;
+      end
+    end
+
+    //VCS coverage on
+    // pragma coverage on
+
+    assign mubi = MuBi24Width'(mubi_i);
+
+    `ASSERT(OutputDelay_A, mubi_o == {NumCopies{mubi_i}})
+  end
+
+  for (genvar j = 0; j < NumCopies; j++) begin : gen_buffs
+    logic [MuBi24Width-1:0] mubi_out;
+    for (genvar k = 0; k < MuBi24Width; k++) begin : gen_bits
+      prim_buf u_prim_buf (
+        .in_i(mubi[k]),
+        .out_o(mubi_out[k])
+      );
+    end
+    assign mubi_o[j] = mubi24_t'(mubi_out);
+  end
+
+  ////////////////
+  // Assertions //
+  ////////////////
+
+  // The outputs should be known at all times.
+  `ASSERT_KNOWN(OutputsKnown_A, mubi_o)
+
+endmodule : prim_mubi24_sync
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi28_dec.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi28_dec.sv
new file mode 100644
index 0000000000..1a027e1c86
--- /dev/null
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi28_dec.sv
@@ -0,0 +1,48 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+//
+// ------------------- W A R N I N G: A U T O - G E N E R A T E D   C O D E !! -------------------//
+// PLEASE DO NOT HAND-EDIT THIS FILE. IT HAS BEEN AUTO-GENERATED WITH THE FOLLOWING COMMAND:
+//
+//    util/design/gen-mubi.py
+//
+// Decoder for multibit control signals with additional input buffers.
+
+`include "prim_assert.sv"
+
+module prim_mubi28_dec
+  import prim_mubi_pkg::*;
+#(
+  parameter bit TestTrue = 1,
+  parameter bit TestStrict = 1
+) (
+  input  mubi28_t mubi_i,
+  output logic           mubi_dec_o
+);
+
+logic [MuBi28Width-1:0] mubi, mubi_out;
+assign mubi = MuBi28Width'(mubi_i);
+
+// The buffer cells have a don't touch constraint on them
+// such that synthesis tools won't collapse them
+for (genvar k = 0; k < MuBi28Width; k++) begin : gen_bits
+  prim_buf u_prim_buf (
+    .in_i  ( mubi[k]     ),
+    .out_o ( mubi_out[k] )
+  );
+end
+
+if (TestTrue && TestStrict) begin : gen_test_true_strict
+  assign mubi_dec_o = mubi28_test_true_strict(mubi28_t'(mubi_out));
+end else if (TestTrue && !TestStrict) begin : gen_test_true_loose
+  assign mubi_dec_o = mubi28_test_true_loose(mubi28_t'(mubi_out));
+end else if (!TestTrue && TestStrict) begin : gen_test_false_strict
+  assign mubi_dec_o = mubi28_test_false_strict(mubi28_t'(mubi_out));
+end else if (!TestTrue && !TestStrict) begin : gen_test_false_loose
+  assign mubi_dec_o = mubi28_test_false_loose(mubi28_t'(mubi_out));
+end else begin : gen_unknown_config
+  `ASSERT_INIT(UnknownConfig_A, 0)
+end
+
+endmodule : prim_mubi28_dec
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi28_sender.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi28_sender.sv
new file mode 100644
index 0000000000..633a693a61
--- /dev/null
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi28_sender.sv
@@ -0,0 +1,94 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+//
+// ------------------- W A R N I N G: A U T O - G E N E R A T E D   C O D E !! -------------------//
+// PLEASE DO NOT HAND-EDIT THIS FILE. IT HAS BEEN AUTO-GENERATED WITH THE FOLLOWING COMMAND:
+//
+//    util/design/gen-mubi.py
+//
+// Multibit sender module. This module is instantiates a hand-picked flop cell for each bit in the
+// multibit signal such that tools do not optimize the multibit encoding.
+
+`include "prim_assert.sv"
+
+module prim_mubi28_sender
+  import prim_mubi_pkg::*;
+#(
+  // This flops the output if set to 1.
+  // In special cases where the sender is in the same clock domain as the receiver,
+  // this can be set to 0. However, it is recommended to leave this at 1.
+  parameter bit AsyncOn = 1,
+  // Enable anchor buffer
+  parameter bit EnSecBuf = 0,
+  // Reset value for the sender flops
+  parameter mubi28_t ResetValue = MuBi28False
+) (
+  input          clk_i,
+  input          rst_ni,
+  input  mubi28_t mubi_i,
+  output mubi28_t mubi_o
+);
+
+  logic [MuBi28Width-1:0] mubi, mubi_int, mubi_out;
+  assign mubi = MuBi28Width'(mubi_i);
+
+  // first generation block decides whether a flop should be present
+  if (AsyncOn) begin : gen_flops
+    prim_flop #(
+      .Width(MuBi28Width),
+      .ResetValue(MuBi28Width'(ResetValue))
+    ) u_prim_flop (
+      .clk_i,
+      .rst_ni,
+      .d_i   ( mubi     ),
+      .q_o   ( mubi_int )
+    );
+  end else begin : gen_no_flops
+    assign mubi_int = mubi;
+
+    // This unused companion logic helps remove lint errors
+    // for modules where clock and reset are used for assertions only
+    // This logic will be removed for sythesis since it is unloaded.
+    mubi28_t unused_logic;
+    always_ff @(posedge clk_i or negedge rst_ni) begin
+      if (!rst_ni) begin
+         unused_logic <= MuBi28False;
+      end else begin
+         unused_logic <= mubi_i;
+      end
+    end
+  end
+
+  // second generation block determines output buffer type
+  // 1. If EnSecBuf -> always leads to a sec buffer regardless of first block
+  // 2. If not EnSecBuf and not AsyncOn -> use normal buffer
+  // 3. If not EnSecBuf and AsyncOn -> feed through
+  if (EnSecBuf) begin : gen_sec_buf
+    prim_sec_anchor_buf #(
+      .Width(28)
+    ) u_prim_sec_buf (
+      .in_i(mubi_int),
+      .out_o(mubi_out)
+    );
+  end else if (!AsyncOn) begin : gen_prim_buf
+    prim_buf #(
+      .Width(28)
+    ) u_prim_buf (
+      .in_i(mubi_int),
+      .out_o(mubi_out)
+    );
+  end else begin : gen_feedthru
+    assign mubi_out = mubi_int;
+  end
+
+  assign mubi_o = mubi28_t'(mubi_out);
+
+  ////////////////
+  // Assertions //
+  ////////////////
+
+  // The outputs should be known at all times.
+  `ASSERT_KNOWN(OutputsKnown_A, mubi_o)
+
+endmodule : prim_mubi28_sender
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi28_sync.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi28_sync.sv
new file mode 100644
index 0000000000..1c63536b7c
--- /dev/null
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi28_sync.sv
@@ -0,0 +1,178 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+//
+// ------------------- W A R N I N G: A U T O - G E N E R A T E D   C O D E !! -------------------//
+// PLEASE DO NOT HAND-EDIT THIS FILE. IT HAS BEEN AUTO-GENERATED WITH THE FOLLOWING COMMAND:
+//
+//    util/design/gen-mubi.py
+//
+// Double-synchronizer flop for multibit signals with additional output buffers.
+
+`include "prim_assert.sv"
+
+module prim_mubi28_sync
+  import prim_mubi_pkg::*;
+#(
+  // Number of separately buffered output signals.
+  // The buffer cells have a don't touch constraint
+  // on them such that synthesis tools won't collapse
+  // all copies into one signal.
+  parameter int NumCopies = 1,
+  // This instantiates the synchronizer flops if set to 1.
+  // In special cases where the receiver is in the same clock domain as the sender,
+  // this can be set to 0. However, it is recommended to leave this at 1.
+  parameter bit AsyncOn = 1,
+  // This controls whether the mubi module institutes stability checks when
+  // AsyncOn is set.  If stability checks are on, a 3rd stage of storage is
+  // added after the synchronizers and the outputs only updated if the 3rd
+  // stage and sychronizer agree.  If they do not agree, the ResetValue is
+  // output instead.
+  parameter bit StabilityCheck = 0,
+  // Reset value for the sync flops
+  parameter mubi28_t ResetValue = MuBi28False
+) (
+  input                          clk_i,
+  input                          rst_ni,
+  input  mubi28_t                 mubi_i,
+  output mubi28_t [NumCopies-1:0] mubi_o
+);
+
+  `ASSERT_INIT(NumCopiesMustBeGreaterZero_A, NumCopies > 0)
+
+  logic [MuBi28Width-1:0] mubi;
+  if (AsyncOn) begin : gen_flops
+    logic [MuBi28Width-1:0] mubi_sync;
+    prim_flop_2sync #(
+      .Width(MuBi28Width),
+      .ResetValue(MuBi28Width'(ResetValue))
+    ) u_prim_flop_2sync (
+      .clk_i,
+      .rst_ni,
+      .d_i(MuBi28Width'(mubi_i)),
+      .q_o(mubi_sync)
+    );
+
+    if (StabilityCheck) begin : gen_stable_chks
+      logic [MuBi28Width-1:0] mubi_q;
+      prim_flop #(
+        .Width(MuBi28Width),
+        .ResetValue(MuBi28Width'(ResetValue))
+      ) u_prim_flop_3rd_stage (
+        .clk_i,
+        .rst_ni,
+        .d_i(mubi_sync),
+        .q_o(mubi_q)
+      );
+
+      logic [MuBi28Width-1:0] sig_unstable;
+      prim_xor2 #(
+        .Width(MuBi28Width)
+      ) u_mubi_xor (
+        .in0_i(mubi_sync),
+        .in1_i(mubi_q),
+        .out_o(sig_unstable)
+      );
+
+      logic [MuBi28Width-1:0] reset_value;
+      assign reset_value = ResetValue;
+
+      for (genvar k = 0; k < MuBi28Width; k++) begin : gen_bufs_muxes
+        logic [MuBi28Width-1:0] sig_unstable_buf;
+
+        // each mux gets its own buffered output, this ensures the OR-ing
+        // cannot be defeated in one place.
+        prim_sec_anchor_buf #(
+          .Width(MuBi28Width)
+        ) u_sig_unstable_buf (
+          .in_i(sig_unstable),
+          .out_o(sig_unstable_buf)
+        );
+
+        // if any xor indicates signal is unstable, output the reset
+        // value. note that the input and output signals of this mux
+        // are driven/read by constrained primitive cells (regs, buffers),
+        // hence this mux can be implemented behaviorally.
+        assign mubi[k] = (|sig_unstable_buf) ? reset_value[k] : mubi_q[k];
+      end
+
+// Note regarding SVAs below:
+//
+// 1) Without the sampled rst_ni pre-condition, this may cause false assertion failures right after
+// a reset release, since the "disable iff" condition with the rst_ni is sampled in the "observed"
+// SV scheduler region after all assignments have been evaluated (see also LRM section 16.12, page
+// 423). This is a simulation artifact due to reset synchronization in RTL, which releases rst_ni
+// on the active clock edge. This causes the assertion to evaluate although the reset was actually
+// 0 when entering this simulation cycle.
+//
+// 2) Similarly to 1) there can be sampling mismatches of the lc_en_i signal since that signal may
+// originate from a different clock domain. I.e., in cases where the lc_en_i signal changes exactly
+// at the same time that the clk_i signal rises, the SVA will not pick up that change in that clock
+// cycle, whereas RTL will because SVAs sample values in the "preponed" region. To that end we make
+// use of an RTL helper variable to sample the lc_en_i signal, hence ensuring that there are no
+// sampling mismatches.
+`ifdef INC_ASSERT
+      mubi28_t mubi_in_sva_q;
+      always_ff @(posedge clk_i) begin
+        mubi_in_sva_q <= mubi_i;
+      end
+      `ASSERT(OutputIfUnstable_A, sig_unstable |-> mubi_o == {NumCopies{reset_value}})
+      `ASSERT(OutputDelay_A,
+              rst_ni |-> ##[3:4] sig_unstable || mubi_o == {NumCopies{$past(mubi_in_sva_q, 2)}})
+`endif
+    end else begin : gen_no_stable_chks
+      assign mubi = mubi_sync;
+`ifdef INC_ASSERT
+      mubi28_t mubi_in_sva_q;
+      always_ff @(posedge clk_i) begin
+        mubi_in_sva_q <= mubi_i;
+      end
+      `ASSERT(OutputDelay_A,
+              rst_ni |-> ##3 (mubi_o == {NumCopies{$past(mubi_in_sva_q, 2)}} ||
+                              $past(mubi_in_sva_q, 2) != $past(mubi_in_sva_q, 1)))
+`endif
+    end
+  end else begin : gen_no_flops
+
+    //VCS coverage off
+    // pragma coverage off
+
+    // This unused companion logic helps remove lint errors
+    // for modules where clock and reset are used for assertions only
+    // This logic will be removed for synthesis since it is unloaded.
+    mubi28_t unused_logic;
+    always_ff @(posedge clk_i or negedge rst_ni) begin
+      if (!rst_ni) begin
+         unused_logic <= MuBi28False;
+      end else begin
+         unused_logic <= mubi_i;
+      end
+    end
+
+    //VCS coverage on
+    // pragma coverage on
+
+    assign mubi = MuBi28Width'(mubi_i);
+
+    `ASSERT(OutputDelay_A, mubi_o == {NumCopies{mubi_i}})
+  end
+
+  for (genvar j = 0; j < NumCopies; j++) begin : gen_buffs
+    logic [MuBi28Width-1:0] mubi_out;
+    for (genvar k = 0; k < MuBi28Width; k++) begin : gen_bits
+      prim_buf u_prim_buf (
+        .in_i(mubi[k]),
+        .out_o(mubi_out[k])
+      );
+    end
+    assign mubi_o[j] = mubi28_t'(mubi_out);
+  end
+
+  ////////////////
+  // Assertions //
+  ////////////////
+
+  // The outputs should be known at all times.
+  `ASSERT_KNOWN(OutputsKnown_A, mubi_o)
+
+endmodule : prim_mubi28_sync
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi32_dec.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi32_dec.sv
new file mode 100644
index 0000000000..c225fd5c99
--- /dev/null
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi32_dec.sv
@@ -0,0 +1,48 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+//
+// ------------------- W A R N I N G: A U T O - G E N E R A T E D   C O D E !! -------------------//
+// PLEASE DO NOT HAND-EDIT THIS FILE. IT HAS BEEN AUTO-GENERATED WITH THE FOLLOWING COMMAND:
+//
+//    util/design/gen-mubi.py
+//
+// Decoder for multibit control signals with additional input buffers.
+
+`include "prim_assert.sv"
+
+module prim_mubi32_dec
+  import prim_mubi_pkg::*;
+#(
+  parameter bit TestTrue = 1,
+  parameter bit TestStrict = 1
+) (
+  input  mubi32_t mubi_i,
+  output logic           mubi_dec_o
+);
+
+logic [MuBi32Width-1:0] mubi, mubi_out;
+assign mubi = MuBi32Width'(mubi_i);
+
+// The buffer cells have a don't touch constraint on them
+// such that synthesis tools won't collapse them
+for (genvar k = 0; k < MuBi32Width; k++) begin : gen_bits
+  prim_buf u_prim_buf (
+    .in_i  ( mubi[k]     ),
+    .out_o ( mubi_out[k] )
+  );
+end
+
+if (TestTrue && TestStrict) begin : gen_test_true_strict
+  assign mubi_dec_o = mubi32_test_true_strict(mubi32_t'(mubi_out));
+end else if (TestTrue && !TestStrict) begin : gen_test_true_loose
+  assign mubi_dec_o = mubi32_test_true_loose(mubi32_t'(mubi_out));
+end else if (!TestTrue && TestStrict) begin : gen_test_false_strict
+  assign mubi_dec_o = mubi32_test_false_strict(mubi32_t'(mubi_out));
+end else if (!TestTrue && !TestStrict) begin : gen_test_false_loose
+  assign mubi_dec_o = mubi32_test_false_loose(mubi32_t'(mubi_out));
+end else begin : gen_unknown_config
+  `ASSERT_INIT(UnknownConfig_A, 0)
+end
+
+endmodule : prim_mubi32_dec
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi32_sender.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi32_sender.sv
new file mode 100644
index 0000000000..ba6343c84c
--- /dev/null
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi32_sender.sv
@@ -0,0 +1,94 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+//
+// ------------------- W A R N I N G: A U T O - G E N E R A T E D   C O D E !! -------------------//
+// PLEASE DO NOT HAND-EDIT THIS FILE. IT HAS BEEN AUTO-GENERATED WITH THE FOLLOWING COMMAND:
+//
+//    util/design/gen-mubi.py
+//
+// Multibit sender module. This module is instantiates a hand-picked flop cell for each bit in the
+// multibit signal such that tools do not optimize the multibit encoding.
+
+`include "prim_assert.sv"
+
+module prim_mubi32_sender
+  import prim_mubi_pkg::*;
+#(
+  // This flops the output if set to 1.
+  // In special cases where the sender is in the same clock domain as the receiver,
+  // this can be set to 0. However, it is recommended to leave this at 1.
+  parameter bit AsyncOn = 1,
+  // Enable anchor buffer
+  parameter bit EnSecBuf = 0,
+  // Reset value for the sender flops
+  parameter mubi32_t ResetValue = MuBi32False
+) (
+  input          clk_i,
+  input          rst_ni,
+  input  mubi32_t mubi_i,
+  output mubi32_t mubi_o
+);
+
+  logic [MuBi32Width-1:0] mubi, mubi_int, mubi_out;
+  assign mubi = MuBi32Width'(mubi_i);
+
+  // first generation block decides whether a flop should be present
+  if (AsyncOn) begin : gen_flops
+    prim_flop #(
+      .Width(MuBi32Width),
+      .ResetValue(MuBi32Width'(ResetValue))
+    ) u_prim_flop (
+      .clk_i,
+      .rst_ni,
+      .d_i   ( mubi     ),
+      .q_o   ( mubi_int )
+    );
+  end else begin : gen_no_flops
+    assign mubi_int = mubi;
+
+    // This unused companion logic helps remove lint errors
+    // for modules where clock and reset are used for assertions only
+    // This logic will be removed for sythesis since it is unloaded.
+    mubi32_t unused_logic;
+    always_ff @(posedge clk_i or negedge rst_ni) begin
+      if (!rst_ni) begin
+         unused_logic <= MuBi32False;
+      end else begin
+         unused_logic <= mubi_i;
+      end
+    end
+  end
+
+  // second generation block determines output buffer type
+  // 1. If EnSecBuf -> always leads to a sec buffer regardless of first block
+  // 2. If not EnSecBuf and not AsyncOn -> use normal buffer
+  // 3. If not EnSecBuf and AsyncOn -> feed through
+  if (EnSecBuf) begin : gen_sec_buf
+    prim_sec_anchor_buf #(
+      .Width(32)
+    ) u_prim_sec_buf (
+      .in_i(mubi_int),
+      .out_o(mubi_out)
+    );
+  end else if (!AsyncOn) begin : gen_prim_buf
+    prim_buf #(
+      .Width(32)
+    ) u_prim_buf (
+      .in_i(mubi_int),
+      .out_o(mubi_out)
+    );
+  end else begin : gen_feedthru
+    assign mubi_out = mubi_int;
+  end
+
+  assign mubi_o = mubi32_t'(mubi_out);
+
+  ////////////////
+  // Assertions //
+  ////////////////
+
+  // The outputs should be known at all times.
+  `ASSERT_KNOWN(OutputsKnown_A, mubi_o)
+
+endmodule : prim_mubi32_sender
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi32_sync.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi32_sync.sv
new file mode 100644
index 0000000000..afae3b316a
--- /dev/null
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi32_sync.sv
@@ -0,0 +1,178 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+//
+// ------------------- W A R N I N G: A U T O - G E N E R A T E D   C O D E !! -------------------//
+// PLEASE DO NOT HAND-EDIT THIS FILE. IT HAS BEEN AUTO-GENERATED WITH THE FOLLOWING COMMAND:
+//
+//    util/design/gen-mubi.py
+//
+// Double-synchronizer flop for multibit signals with additional output buffers.
+
+`include "prim_assert.sv"
+
+module prim_mubi32_sync
+  import prim_mubi_pkg::*;
+#(
+  // Number of separately buffered output signals.
+  // The buffer cells have a don't touch constraint
+  // on them such that synthesis tools won't collapse
+  // all copies into one signal.
+  parameter int NumCopies = 1,
+  // This instantiates the synchronizer flops if set to 1.
+  // In special cases where the receiver is in the same clock domain as the sender,
+  // this can be set to 0. However, it is recommended to leave this at 1.
+  parameter bit AsyncOn = 1,
+  // This controls whether the mubi module institutes stability checks when
+  // AsyncOn is set.  If stability checks are on, a 3rd stage of storage is
+  // added after the synchronizers and the outputs only updated if the 3rd
+  // stage and sychronizer agree.  If they do not agree, the ResetValue is
+  // output instead.
+  parameter bit StabilityCheck = 0,
+  // Reset value for the sync flops
+  parameter mubi32_t ResetValue = MuBi32False
+) (
+  input                          clk_i,
+  input                          rst_ni,
+  input  mubi32_t                 mubi_i,
+  output mubi32_t [NumCopies-1:0] mubi_o
+);
+
+  `ASSERT_INIT(NumCopiesMustBeGreaterZero_A, NumCopies > 0)
+
+  logic [MuBi32Width-1:0] mubi;
+  if (AsyncOn) begin : gen_flops
+    logic [MuBi32Width-1:0] mubi_sync;
+    prim_flop_2sync #(
+      .Width(MuBi32Width),
+      .ResetValue(MuBi32Width'(ResetValue))
+    ) u_prim_flop_2sync (
+      .clk_i,
+      .rst_ni,
+      .d_i(MuBi32Width'(mubi_i)),
+      .q_o(mubi_sync)
+    );
+
+    if (StabilityCheck) begin : gen_stable_chks
+      logic [MuBi32Width-1:0] mubi_q;
+      prim_flop #(
+        .Width(MuBi32Width),
+        .ResetValue(MuBi32Width'(ResetValue))
+      ) u_prim_flop_3rd_stage (
+        .clk_i,
+        .rst_ni,
+        .d_i(mubi_sync),
+        .q_o(mubi_q)
+      );
+
+      logic [MuBi32Width-1:0] sig_unstable;
+      prim_xor2 #(
+        .Width(MuBi32Width)
+      ) u_mubi_xor (
+        .in0_i(mubi_sync),
+        .in1_i(mubi_q),
+        .out_o(sig_unstable)
+      );
+
+      logic [MuBi32Width-1:0] reset_value;
+      assign reset_value = ResetValue;
+
+      for (genvar k = 0; k < MuBi32Width; k++) begin : gen_bufs_muxes
+        logic [MuBi32Width-1:0] sig_unstable_buf;
+
+        // each mux gets its own buffered output, this ensures the OR-ing
+        // cannot be defeated in one place.
+        prim_sec_anchor_buf #(
+          .Width(MuBi32Width)
+        ) u_sig_unstable_buf (
+          .in_i(sig_unstable),
+          .out_o(sig_unstable_buf)
+        );
+
+        // if any xor indicates signal is unstable, output the reset
+        // value. note that the input and output signals of this mux
+        // are driven/read by constrained primitive cells (regs, buffers),
+        // hence this mux can be implemented behaviorally.
+        assign mubi[k] = (|sig_unstable_buf) ? reset_value[k] : mubi_q[k];
+      end
+
+// Note regarding SVAs below:
+//
+// 1) Without the sampled rst_ni pre-condition, this may cause false assertion failures right after
+// a reset release, since the "disable iff" condition with the rst_ni is sampled in the "observed"
+// SV scheduler region after all assignments have been evaluated (see also LRM section 16.12, page
+// 423). This is a simulation artifact due to reset synchronization in RTL, which releases rst_ni
+// on the active clock edge. This causes the assertion to evaluate although the reset was actually
+// 0 when entering this simulation cycle.
+//
+// 2) Similarly to 1) there can be sampling mismatches of the lc_en_i signal since that signal may
+// originate from a different clock domain. I.e., in cases where the lc_en_i signal changes exactly
+// at the same time that the clk_i signal rises, the SVA will not pick up that change in that clock
+// cycle, whereas RTL will because SVAs sample values in the "preponed" region. To that end we make
+// use of an RTL helper variable to sample the lc_en_i signal, hence ensuring that there are no
+// sampling mismatches.
+`ifdef INC_ASSERT
+      mubi32_t mubi_in_sva_q;
+      always_ff @(posedge clk_i) begin
+        mubi_in_sva_q <= mubi_i;
+      end
+      `ASSERT(OutputIfUnstable_A, sig_unstable |-> mubi_o == {NumCopies{reset_value}})
+      `ASSERT(OutputDelay_A,
+              rst_ni |-> ##[3:4] sig_unstable || mubi_o == {NumCopies{$past(mubi_in_sva_q, 2)}})
+`endif
+    end else begin : gen_no_stable_chks
+      assign mubi = mubi_sync;
+`ifdef INC_ASSERT
+      mubi32_t mubi_in_sva_q;
+      always_ff @(posedge clk_i) begin
+        mubi_in_sva_q <= mubi_i;
+      end
+      `ASSERT(OutputDelay_A,
+              rst_ni |-> ##3 (mubi_o == {NumCopies{$past(mubi_in_sva_q, 2)}} ||
+                              $past(mubi_in_sva_q, 2) != $past(mubi_in_sva_q, 1)))
+`endif
+    end
+  end else begin : gen_no_flops
+
+    //VCS coverage off
+    // pragma coverage off
+
+    // This unused companion logic helps remove lint errors
+    // for modules where clock and reset are used for assertions only
+    // This logic will be removed for synthesis since it is unloaded.
+    mubi32_t unused_logic;
+    always_ff @(posedge clk_i or negedge rst_ni) begin
+      if (!rst_ni) begin
+         unused_logic <= MuBi32False;
+      end else begin
+         unused_logic <= mubi_i;
+      end
+    end
+
+    //VCS coverage on
+    // pragma coverage on
+
+    assign mubi = MuBi32Width'(mubi_i);
+
+    `ASSERT(OutputDelay_A, mubi_o == {NumCopies{mubi_i}})
+  end
+
+  for (genvar j = 0; j < NumCopies; j++) begin : gen_buffs
+    logic [MuBi32Width-1:0] mubi_out;
+    for (genvar k = 0; k < MuBi32Width; k++) begin : gen_bits
+      prim_buf u_prim_buf (
+        .in_i(mubi[k]),
+        .out_o(mubi_out[k])
+      );
+    end
+    assign mubi_o[j] = mubi32_t'(mubi_out);
+  end
+
+  ////////////////
+  // Assertions //
+  ////////////////
+
+  // The outputs should be known at all times.
+  `ASSERT_KNOWN(OutputsKnown_A, mubi_o)
+
+endmodule : prim_mubi32_sync
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi4_dec.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi4_dec.sv
index b822fa89c5..4561f54f01 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi4_dec.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi4_dec.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi4_sender.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi4_sender.sv
index 85b7af8708..b69eefd275 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi4_sender.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi4_sender.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi4_sync.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi4_sync.sv
index 02395409ac..b5aa0aa194 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi4_sync.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi4_sync.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi8_dec.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi8_dec.sv
index 0f7171f2ed..e79ed824da 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi8_dec.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi8_dec.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi8_sender.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi8_sender.sv
index 7fb81f5087..e3379ad6b6 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi8_sender.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi8_sender.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi8_sync.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi8_sync.sv
index 14e9254ce5..9e1151dd8b 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi8_sync.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi8_sync.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi_pkg.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi_pkg.sv
index 13e167db7e..0277329a8c 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi_pkg.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_mubi_pkg.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
@@ -542,4 +542,532 @@ package prim_mubi_pkg;
     return mubi16_and(a, b, MuBi16False);
   endfunction : mubi16_and_lo
 
+  //////////////////////////////////////////////
+  // 20 Bit Multibit Type and Functions //
+  //////////////////////////////////////////////
+
+  parameter int MuBi20Width = 20;
+  typedef enum logic [MuBi20Width-1:0] {
+    MuBi20True = 20'h69696, // enabled
+    MuBi20False = 20'h96969  // disabled
+  } mubi20_t;
+
+  // This is a prerequisite for the multibit functions below to work.
+  `ASSERT_STATIC_IN_PACKAGE(CheckMuBi20ValsComplementary_A, MuBi20True == ~MuBi20False)
+
+  // Test whether the multibit value is one of the valid enumerations
+  function automatic logic mubi20_test_invalid(mubi20_t val);
+    return ~(val inside {MuBi20True, MuBi20False});
+  endfunction : mubi20_test_invalid
+
+  // Convert a 1 input value to a mubi output
+  function automatic mubi20_t mubi20_bool_to_mubi(logic val);
+    return (val ? MuBi20True : MuBi20False);
+  endfunction : mubi20_bool_to_mubi
+
+  // Test whether the multibit value signals an "enabled" condition.
+  // The strict version of this function requires
+  // the multibit value to equal True.
+  function automatic logic mubi20_test_true_strict(mubi20_t val);
+    return MuBi20True == val;
+  endfunction : mubi20_test_true_strict
+
+  // Test whether the multibit value signals a "disabled" condition.
+  // The strict version of this function requires
+  // the multibit value to equal False.
+  function automatic logic mubi20_test_false_strict(mubi20_t val);
+    return MuBi20False == val;
+  endfunction : mubi20_test_false_strict
+
+  // Test whether the multibit value signals an "enabled" condition.
+  // The loose version of this function interprets all
+  // values other than False as "enabled".
+  function automatic logic mubi20_test_true_loose(mubi20_t val);
+    return MuBi20False != val;
+  endfunction : mubi20_test_true_loose
+
+  // Test whether the multibit value signals a "disabled" condition.
+  // The loose version of this function interprets all
+  // values other than True as "disabled".
+  function automatic logic mubi20_test_false_loose(mubi20_t val);
+    return MuBi20True != val;
+  endfunction : mubi20_test_false_loose
+
+
+  // Performs a logical OR operation between two multibit values.
+  // This treats "act" as logical 1, and all other values are
+  // treated as 0. Truth table:
+  //
+  // A    | B    | OUT
+  //------+------+-----
+  // !act | !act | !act
+  // act  | !act | act
+  // !act | act  | act
+  // act  | act  | act
+  //
+  function automatic mubi20_t mubi20_or(mubi20_t a, mubi20_t b, mubi20_t act);
+    logic [MuBi20Width-1:0] a_in, b_in, act_in, out;
+    a_in = a;
+    b_in = b;
+    act_in = act;
+    for (int k = 0; k < MuBi20Width; k++) begin
+      if (act_in[k]) begin
+        out[k] = a_in[k] || b_in[k];
+      end else begin
+        out[k] = a_in[k] && b_in[k];
+      end
+    end
+    return mubi20_t'(out);
+  endfunction : mubi20_or
+
+  // Performs a logical AND operation between two multibit values.
+  // This treats "act" as logical 1, and all other values are
+  // treated as 0. Truth table:
+  //
+  // A    | B    | OUT
+  //------+------+-----
+  // !act | !act | !act
+  // act  | !act | !act
+  // !act | act  | !act
+  // act  | act  | act
+  //
+  function automatic mubi20_t mubi20_and(mubi20_t a, mubi20_t b, mubi20_t act);
+    logic [MuBi20Width-1:0] a_in, b_in, act_in, out;
+    a_in = a;
+    b_in = b;
+    act_in = act;
+    for (int k = 0; k < MuBi20Width; k++) begin
+      if (act_in[k]) begin
+        out[k] = a_in[k] && b_in[k];
+      end else begin
+        out[k] = a_in[k] || b_in[k];
+      end
+    end
+    return mubi20_t'(out);
+  endfunction : mubi20_and
+
+  // Performs a logical OR operation between two multibit values.
+  // This treats "True" as logical 1, and all other values are
+  // treated as 0.
+  function automatic mubi20_t mubi20_or_hi(mubi20_t a, mubi20_t b);
+    return mubi20_or(a, b, MuBi20True);
+  endfunction : mubi20_or_hi
+
+  // Performs a logical AND operation between two multibit values.
+  // This treats "True" as logical 1, and all other values are
+  // treated as 0.
+  function automatic mubi20_t mubi20_and_hi(mubi20_t a, mubi20_t b);
+    return mubi20_and(a, b, MuBi20True);
+  endfunction : mubi20_and_hi
+
+  // Performs a logical OR operation between two multibit values.
+  // This treats "False" as logical 1, and all other values are
+  // treated as 0.
+  function automatic mubi20_t mubi20_or_lo(mubi20_t a, mubi20_t b);
+    return mubi20_or(a, b, MuBi20False);
+  endfunction : mubi20_or_lo
+
+  // Performs a logical AND operation between two multibit values.
+  // This treats "False" as logical 1, and all other values are
+  // treated as 0.
+  function automatic mubi20_t mubi20_and_lo(mubi20_t a, mubi20_t b);
+    return mubi20_and(a, b, MuBi20False);
+  endfunction : mubi20_and_lo
+
+  //////////////////////////////////////////////
+  // 24 Bit Multibit Type and Functions //
+  //////////////////////////////////////////////
+
+  parameter int MuBi24Width = 24;
+  typedef enum logic [MuBi24Width-1:0] {
+    MuBi24True = 24'h969696, // enabled
+    MuBi24False = 24'h696969  // disabled
+  } mubi24_t;
+
+  // This is a prerequisite for the multibit functions below to work.
+  `ASSERT_STATIC_IN_PACKAGE(CheckMuBi24ValsComplementary_A, MuBi24True == ~MuBi24False)
+
+  // Test whether the multibit value is one of the valid enumerations
+  function automatic logic mubi24_test_invalid(mubi24_t val);
+    return ~(val inside {MuBi24True, MuBi24False});
+  endfunction : mubi24_test_invalid
+
+  // Convert a 1 input value to a mubi output
+  function automatic mubi24_t mubi24_bool_to_mubi(logic val);
+    return (val ? MuBi24True : MuBi24False);
+  endfunction : mubi24_bool_to_mubi
+
+  // Test whether the multibit value signals an "enabled" condition.
+  // The strict version of this function requires
+  // the multibit value to equal True.
+  function automatic logic mubi24_test_true_strict(mubi24_t val);
+    return MuBi24True == val;
+  endfunction : mubi24_test_true_strict
+
+  // Test whether the multibit value signals a "disabled" condition.
+  // The strict version of this function requires
+  // the multibit value to equal False.
+  function automatic logic mubi24_test_false_strict(mubi24_t val);
+    return MuBi24False == val;
+  endfunction : mubi24_test_false_strict
+
+  // Test whether the multibit value signals an "enabled" condition.
+  // The loose version of this function interprets all
+  // values other than False as "enabled".
+  function automatic logic mubi24_test_true_loose(mubi24_t val);
+    return MuBi24False != val;
+  endfunction : mubi24_test_true_loose
+
+  // Test whether the multibit value signals a "disabled" condition.
+  // The loose version of this function interprets all
+  // values other than True as "disabled".
+  function automatic logic mubi24_test_false_loose(mubi24_t val);
+    return MuBi24True != val;
+  endfunction : mubi24_test_false_loose
+
+
+  // Performs a logical OR operation between two multibit values.
+  // This treats "act" as logical 1, and all other values are
+  // treated as 0. Truth table:
+  //
+  // A    | B    | OUT
+  //------+------+-----
+  // !act | !act | !act
+  // act  | !act | act
+  // !act | act  | act
+  // act  | act  | act
+  //
+  function automatic mubi24_t mubi24_or(mubi24_t a, mubi24_t b, mubi24_t act);
+    logic [MuBi24Width-1:0] a_in, b_in, act_in, out;
+    a_in = a;
+    b_in = b;
+    act_in = act;
+    for (int k = 0; k < MuBi24Width; k++) begin
+      if (act_in[k]) begin
+        out[k] = a_in[k] || b_in[k];
+      end else begin
+        out[k] = a_in[k] && b_in[k];
+      end
+    end
+    return mubi24_t'(out);
+  endfunction : mubi24_or
+
+  // Performs a logical AND operation between two multibit values.
+  // This treats "act" as logical 1, and all other values are
+  // treated as 0. Truth table:
+  //
+  // A    | B    | OUT
+  //------+------+-----
+  // !act | !act | !act
+  // act  | !act | !act
+  // !act | act  | !act
+  // act  | act  | act
+  //
+  function automatic mubi24_t mubi24_and(mubi24_t a, mubi24_t b, mubi24_t act);
+    logic [MuBi24Width-1:0] a_in, b_in, act_in, out;
+    a_in = a;
+    b_in = b;
+    act_in = act;
+    for (int k = 0; k < MuBi24Width; k++) begin
+      if (act_in[k]) begin
+        out[k] = a_in[k] && b_in[k];
+      end else begin
+        out[k] = a_in[k] || b_in[k];
+      end
+    end
+    return mubi24_t'(out);
+  endfunction : mubi24_and
+
+  // Performs a logical OR operation between two multibit values.
+  // This treats "True" as logical 1, and all other values are
+  // treated as 0.
+  function automatic mubi24_t mubi24_or_hi(mubi24_t a, mubi24_t b);
+    return mubi24_or(a, b, MuBi24True);
+  endfunction : mubi24_or_hi
+
+  // Performs a logical AND operation between two multibit values.
+  // This treats "True" as logical 1, and all other values are
+  // treated as 0.
+  function automatic mubi24_t mubi24_and_hi(mubi24_t a, mubi24_t b);
+    return mubi24_and(a, b, MuBi24True);
+  endfunction : mubi24_and_hi
+
+  // Performs a logical OR operation between two multibit values.
+  // This treats "False" as logical 1, and all other values are
+  // treated as 0.
+  function automatic mubi24_t mubi24_or_lo(mubi24_t a, mubi24_t b);
+    return mubi24_or(a, b, MuBi24False);
+  endfunction : mubi24_or_lo
+
+  // Performs a logical AND operation between two multibit values.
+  // This treats "False" as logical 1, and all other values are
+  // treated as 0.
+  function automatic mubi24_t mubi24_and_lo(mubi24_t a, mubi24_t b);
+    return mubi24_and(a, b, MuBi24False);
+  endfunction : mubi24_and_lo
+
+  //////////////////////////////////////////////
+  // 28 Bit Multibit Type and Functions //
+  //////////////////////////////////////////////
+
+  parameter int MuBi28Width = 28;
+  typedef enum logic [MuBi28Width-1:0] {
+    MuBi28True = 28'h6969696, // enabled
+    MuBi28False = 28'h9696969  // disabled
+  } mubi28_t;
+
+  // This is a prerequisite for the multibit functions below to work.
+  `ASSERT_STATIC_IN_PACKAGE(CheckMuBi28ValsComplementary_A, MuBi28True == ~MuBi28False)
+
+  // Test whether the multibit value is one of the valid enumerations
+  function automatic logic mubi28_test_invalid(mubi28_t val);
+    return ~(val inside {MuBi28True, MuBi28False});
+  endfunction : mubi28_test_invalid
+
+  // Convert a 1 input value to a mubi output
+  function automatic mubi28_t mubi28_bool_to_mubi(logic val);
+    return (val ? MuBi28True : MuBi28False);
+  endfunction : mubi28_bool_to_mubi
+
+  // Test whether the multibit value signals an "enabled" condition.
+  // The strict version of this function requires
+  // the multibit value to equal True.
+  function automatic logic mubi28_test_true_strict(mubi28_t val);
+    return MuBi28True == val;
+  endfunction : mubi28_test_true_strict
+
+  // Test whether the multibit value signals a "disabled" condition.
+  // The strict version of this function requires
+  // the multibit value to equal False.
+  function automatic logic mubi28_test_false_strict(mubi28_t val);
+    return MuBi28False == val;
+  endfunction : mubi28_test_false_strict
+
+  // Test whether the multibit value signals an "enabled" condition.
+  // The loose version of this function interprets all
+  // values other than False as "enabled".
+  function automatic logic mubi28_test_true_loose(mubi28_t val);
+    return MuBi28False != val;
+  endfunction : mubi28_test_true_loose
+
+  // Test whether the multibit value signals a "disabled" condition.
+  // The loose version of this function interprets all
+  // values other than True as "disabled".
+  function automatic logic mubi28_test_false_loose(mubi28_t val);
+    return MuBi28True != val;
+  endfunction : mubi28_test_false_loose
+
+
+  // Performs a logical OR operation between two multibit values.
+  // This treats "act" as logical 1, and all other values are
+  // treated as 0. Truth table:
+  //
+  // A    | B    | OUT
+  //------+------+-----
+  // !act | !act | !act
+  // act  | !act | act
+  // !act | act  | act
+  // act  | act  | act
+  //
+  function automatic mubi28_t mubi28_or(mubi28_t a, mubi28_t b, mubi28_t act);
+    logic [MuBi28Width-1:0] a_in, b_in, act_in, out;
+    a_in = a;
+    b_in = b;
+    act_in = act;
+    for (int k = 0; k < MuBi28Width; k++) begin
+      if (act_in[k]) begin
+        out[k] = a_in[k] || b_in[k];
+      end else begin
+        out[k] = a_in[k] && b_in[k];
+      end
+    end
+    return mubi28_t'(out);
+  endfunction : mubi28_or
+
+  // Performs a logical AND operation between two multibit values.
+  // This treats "act" as logical 1, and all other values are
+  // treated as 0. Truth table:
+  //
+  // A    | B    | OUT
+  //------+------+-----
+  // !act | !act | !act
+  // act  | !act | !act
+  // !act | act  | !act
+  // act  | act  | act
+  //
+  function automatic mubi28_t mubi28_and(mubi28_t a, mubi28_t b, mubi28_t act);
+    logic [MuBi28Width-1:0] a_in, b_in, act_in, out;
+    a_in = a;
+    b_in = b;
+    act_in = act;
+    for (int k = 0; k < MuBi28Width; k++) begin
+      if (act_in[k]) begin
+        out[k] = a_in[k] && b_in[k];
+      end else begin
+        out[k] = a_in[k] || b_in[k];
+      end
+    end
+    return mubi28_t'(out);
+  endfunction : mubi28_and
+
+  // Performs a logical OR operation between two multibit values.
+  // This treats "True" as logical 1, and all other values are
+  // treated as 0.
+  function automatic mubi28_t mubi28_or_hi(mubi28_t a, mubi28_t b);
+    return mubi28_or(a, b, MuBi28True);
+  endfunction : mubi28_or_hi
+
+  // Performs a logical AND operation between two multibit values.
+  // This treats "True" as logical 1, and all other values are
+  // treated as 0.
+  function automatic mubi28_t mubi28_and_hi(mubi28_t a, mubi28_t b);
+    return mubi28_and(a, b, MuBi28True);
+  endfunction : mubi28_and_hi
+
+  // Performs a logical OR operation between two multibit values.
+  // This treats "False" as logical 1, and all other values are
+  // treated as 0.
+  function automatic mubi28_t mubi28_or_lo(mubi28_t a, mubi28_t b);
+    return mubi28_or(a, b, MuBi28False);
+  endfunction : mubi28_or_lo
+
+  // Performs a logical AND operation between two multibit values.
+  // This treats "False" as logical 1, and all other values are
+  // treated as 0.
+  function automatic mubi28_t mubi28_and_lo(mubi28_t a, mubi28_t b);
+    return mubi28_and(a, b, MuBi28False);
+  endfunction : mubi28_and_lo
+
+  //////////////////////////////////////////////
+  // 32 Bit Multibit Type and Functions //
+  //////////////////////////////////////////////
+
+  parameter int MuBi32Width = 32;
+  typedef enum logic [MuBi32Width-1:0] {
+    MuBi32True = 32'h96969696, // enabled
+    MuBi32False = 32'h69696969  // disabled
+  } mubi32_t;
+
+  // This is a prerequisite for the multibit functions below to work.
+  `ASSERT_STATIC_IN_PACKAGE(CheckMuBi32ValsComplementary_A, MuBi32True == ~MuBi32False)
+
+  // Test whether the multibit value is one of the valid enumerations
+  function automatic logic mubi32_test_invalid(mubi32_t val);
+    return ~(val inside {MuBi32True, MuBi32False});
+  endfunction : mubi32_test_invalid
+
+  // Convert a 1 input value to a mubi output
+  function automatic mubi32_t mubi32_bool_to_mubi(logic val);
+    return (val ? MuBi32True : MuBi32False);
+  endfunction : mubi32_bool_to_mubi
+
+  // Test whether the multibit value signals an "enabled" condition.
+  // The strict version of this function requires
+  // the multibit value to equal True.
+  function automatic logic mubi32_test_true_strict(mubi32_t val);
+    return MuBi32True == val;
+  endfunction : mubi32_test_true_strict
+
+  // Test whether the multibit value signals a "disabled" condition.
+  // The strict version of this function requires
+  // the multibit value to equal False.
+  function automatic logic mubi32_test_false_strict(mubi32_t val);
+    return MuBi32False == val;
+  endfunction : mubi32_test_false_strict
+
+  // Test whether the multibit value signals an "enabled" condition.
+  // The loose version of this function interprets all
+  // values other than False as "enabled".
+  function automatic logic mubi32_test_true_loose(mubi32_t val);
+    return MuBi32False != val;
+  endfunction : mubi32_test_true_loose
+
+  // Test whether the multibit value signals a "disabled" condition.
+  // The loose version of this function interprets all
+  // values other than True as "disabled".
+  function automatic logic mubi32_test_false_loose(mubi32_t val);
+    return MuBi32True != val;
+  endfunction : mubi32_test_false_loose
+
+
+  // Performs a logical OR operation between two multibit values.
+  // This treats "act" as logical 1, and all other values are
+  // treated as 0. Truth table:
+  //
+  // A    | B    | OUT
+  //------+------+-----
+  // !act | !act | !act
+  // act  | !act | act
+  // !act | act  | act
+  // act  | act  | act
+  //
+  function automatic mubi32_t mubi32_or(mubi32_t a, mubi32_t b, mubi32_t act);
+    logic [MuBi32Width-1:0] a_in, b_in, act_in, out;
+    a_in = a;
+    b_in = b;
+    act_in = act;
+    for (int k = 0; k < MuBi32Width; k++) begin
+      if (act_in[k]) begin
+        out[k] = a_in[k] || b_in[k];
+      end else begin
+        out[k] = a_in[k] && b_in[k];
+      end
+    end
+    return mubi32_t'(out);
+  endfunction : mubi32_or
+
+  // Performs a logical AND operation between two multibit values.
+  // This treats "act" as logical 1, and all other values are
+  // treated as 0. Truth table:
+  //
+  // A    | B    | OUT
+  //------+------+-----
+  // !act | !act | !act
+  // act  | !act | !act
+  // !act | act  | !act
+  // act  | act  | act
+  //
+  function automatic mubi32_t mubi32_and(mubi32_t a, mubi32_t b, mubi32_t act);
+    logic [MuBi32Width-1:0] a_in, b_in, act_in, out;
+    a_in = a;
+    b_in = b;
+    act_in = act;
+    for (int k = 0; k < MuBi32Width; k++) begin
+      if (act_in[k]) begin
+        out[k] = a_in[k] && b_in[k];
+      end else begin
+        out[k] = a_in[k] || b_in[k];
+      end
+    end
+    return mubi32_t'(out);
+  endfunction : mubi32_and
+
+  // Performs a logical OR operation between two multibit values.
+  // This treats "True" as logical 1, and all other values are
+  // treated as 0.
+  function automatic mubi32_t mubi32_or_hi(mubi32_t a, mubi32_t b);
+    return mubi32_or(a, b, MuBi32True);
+  endfunction : mubi32_or_hi
+
+  // Performs a logical AND operation between two multibit values.
+  // This treats "True" as logical 1, and all other values are
+  // treated as 0.
+  function automatic mubi32_t mubi32_and_hi(mubi32_t a, mubi32_t b);
+    return mubi32_and(a, b, MuBi32True);
+  endfunction : mubi32_and_hi
+
+  // Performs a logical OR operation between two multibit values.
+  // This treats "False" as logical 1, and all other values are
+  // treated as 0.
+  function automatic mubi32_t mubi32_or_lo(mubi32_t a, mubi32_t b);
+    return mubi32_or(a, b, MuBi32False);
+  endfunction : mubi32_or_lo
+
+  // Performs a logical AND operation between two multibit values.
+  // This treats "False" as logical 1, and all other values are
+  // treated as 0.
+  function automatic mubi32_t mubi32_and_lo(mubi32_t a, mubi32_t b);
+    return mubi32_and(a, b, MuBi32False);
+  endfunction : mubi32_and_lo
+
 endpackage : prim_mubi_pkg
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_multibit_sync.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_multibit_sync.sv
index 79a3ab6d8d..0a1a7956a0 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_multibit_sync.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_multibit_sync.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_onehot_check.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_onehot_check.sv
index b70ec76ef5..9e76d79c4f 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_onehot_check.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_onehot_check.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_onehot_enc.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_onehot_enc.sv
index 35ecee1daa..dd58753bf7 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_onehot_enc.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_onehot_enc.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_onehot_mux.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_onehot_mux.sv
index 70bd2c3831..16d377d634 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_onehot_mux.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_onehot_mux.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_otp_pkg.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_otp_pkg.sv
index e32586c3dd..cefe43a57f 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_otp_pkg.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_otp_pkg.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
@@ -6,16 +6,37 @@
 
 package prim_otp_pkg;
 
-  parameter int CmdWidth = 3;
+  // The command is sparsely encoded to make it more difficult to tamper with.
+  parameter int CmdWidth = 7;
   parameter int ErrWidth = 3;
 
+  // Encoding generated with:
+  // $ ./util/design/sparse-fsm-encode.py -d 4 -m 5 -n 7 \
+  //     -s 696743973 --language=sv
+  //
+  // Hamming distance histogram:
+  //
+  //  0: --
+  //  1: --
+  //  2: --
+  //  3: --
+  //  4: |||||||||||||||||||| (100.00%)
+  //  5: --
+  //  6: --
+  //  7: --
+  //
+  // Minimum Hamming distance: 4
+  // Maximum Hamming distance: 4
+  // Minimum Hamming weight: 3
+  // Maximum Hamming weight: 5
+  //
   typedef enum logic [CmdWidth-1:0] {
-    Read     = 3'b000,
-    Write    = 3'b001,
+    Read     = 7'b1000101,
+    Write    = 7'b0110111,
     // Raw commands ignore integrity
-    ReadRaw  = 3'b010,
-    WriteRaw = 3'b011,
-    Init     = 3'b111
+    ReadRaw  = 7'b1111001,
+    WriteRaw = 7'b1100010,
+    Init     = 7'b0101100
   } cmd_e;
 
   typedef enum logic [ErrWidth-1:0] {
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_packer.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_packer.sv
index 2ee6a696d4..76339b4291 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_packer.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_packer.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_packer_fifo.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_packer_fifo.sv
index 95c143da52..1f78e7770e 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_packer_fifo.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_packer_fifo.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
@@ -66,6 +66,7 @@ module prim_packer_fifo #(
 
   localparam int unsigned   WidthRatio = MaxW / MinW;
   localparam bit [DepthW:0] FullDepth = WidthRatio[DepthW:0];
+  localparam bit [DepthW:0] DepthOne = 1;
 
   // signals
   logic  load_data;
@@ -103,7 +104,7 @@ module prim_packer_fifo #(
     assign load_data = wvalid_i && wready_o;
 
     assign depth_d =  clear_status ? '0 :
-           load_data ? depth_q+1 :
+           load_data ? (depth_q + DepthOne):
            depth_q;
 
     assign data_d = clear_data ? '0 :
@@ -140,11 +141,11 @@ module prim_packer_fifo #(
 
     assign depth_d =  clear_status ? '0 :
            load_data ? max_value :
-           pull_data ? depth_q-1 :
+           pull_data ? (depth_q - DepthOne) :
            depth_q;
 
     assign ptr_d =  clear_status ? '0 :
-           pull_data ? ptr_q+1 :
+           pull_data ? (ptr_q + DepthOne) :
            ptr_q;
 
     assign data_d = clear_data ? '0 :
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_pad_wrapper_pkg.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_pad_wrapper_pkg.sv
index 05acab6aab..668706698e 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_pad_wrapper_pkg.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_pad_wrapper_pkg.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
@@ -27,6 +27,7 @@ package prim_pad_wrapper_pkg;
   typedef struct packed {
     logic [DriveStrDw-1:0] drive_strength; // Drive strength (0000: weakest, 1111: strongest).
     logic [SlewRateDw-1:0] slew_rate;      // Slew rate (0: slowest, 11: fastest).
+    logic input_disable;                   // Input disable.
     logic od_en;                           // Open-drain enable
     logic schmitt_en;                      // Schmitt trigger enable.
     logic keep_en;                         // Keeper enable.
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_present.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_present.sv
index 76c03bc366..d36215582e 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_present.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_present.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_prince.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_prince.sv
index 779999c19f..5878823d4a 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_prince.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_prince.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_pulse_sync.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_pulse_sync.sv
index 4ce7a7e9e7..44d9b5f86e 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_pulse_sync.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_pulse_sync.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
@@ -7,6 +7,9 @@
 // cycle of its respective clock domain. Consecutive pulses need to be spaced
 // appropriately apart from each other depending on the clock frequency ratio
 // of the two clock domains.
+//
+// Also note that a reset of either the source domain or the destination domain
+// in isolation may create a pulse at the destination.
 
 module prim_pulse_sync (
   // source clock domain
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_ram_1p_adv.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_ram_1p_adv.sv
index 71bd99b013..73a973e3df 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_ram_1p_adv.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_ram_1p_adv.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
@@ -47,9 +47,20 @@ module prim_ram_1p_adv import prim_ram_1p_pkg::*; #(
   output logic [1:0]         rerror_o, // Bit1: Uncorrectable, Bit0: Correctable
 
   // config
-  input ram_1p_cfg_t         cfg_i
+  input ram_1p_cfg_t         cfg_i,
+
+  // When detecting multi-bit encoding errors, raise alert.
+  output logic               alert_o
 );
 
+  import prim_mubi_pkg::mubi4_t;
+  import prim_mubi_pkg::mubi4_and_hi;
+  import prim_mubi_pkg::mubi4_bool_to_mubi;
+  import prim_mubi_pkg::mubi4_test_invalid;
+  import prim_mubi_pkg::mubi4_test_true_loose;
+  import prim_mubi_pkg::MuBi4True;
+  import prim_mubi_pkg::MuBi4False;
+  import prim_mubi_pkg::MuBi4Width;
 
   `ASSERT_INIT(CannotHaveEccAndParity_A, !(EnableParity && EnableECC))
 
@@ -74,15 +85,22 @@ module prim_ram_1p_adv import prim_ram_1p_pkg::*; #(
   // RAM Primitive Instance //
   ////////////////////////////
 
-  logic                    req_q,    req_d ;
-  logic                    write_q,  write_d ;
-  logic [Aw-1:0]           addr_q,   addr_d ;
-  logic [TotalWidth-1:0]   wdata_q,  wdata_d ;
-  logic [TotalWidth-1:0]   wmask_q,  wmask_d ;
-  logic                    rvalid_q, rvalid_d, rvalid_sram_q ;
-  logic [Width-1:0]        rdata_q,  rdata_d ;
+  mubi4_t                  req_q,     req_d,    req_buf_d ;
+  logic [MuBi4Width-1:0]   req_buf_b_d;
+  logic                    req_q_b ;
+  mubi4_t                  write_q,   write_d,  write_buf_d ;
+  logic [MuBi4Width-1:0]   write_buf_b_d;
+  logic                    write_q_b ;
+  logic [Aw-1:0]           addr_q,    addr_d ;
+  logic [TotalWidth-1:0]   wdata_q,   wdata_d ;
+  logic [TotalWidth-1:0]   wmask_q,   wmask_d ;
+  mubi4_t                  rvalid_q,  rvalid_d, rvalid_sram_q, rvalid_sram_d ;
+  logic [Width-1:0]        rdata_q,   rdata_d ;
   logic [TotalWidth-1:0]   rdata_sram ;
-  logic [1:0]              rerror_q, rerror_d ;
+  logic [1:0]              rerror_q,  rerror_d ;
+
+  assign req_q_b = mubi4_test_true_loose(req_q);
+  assign write_q_b = mubi4_test_true_loose(write_q);
 
   prim_ram_1p #(
     .MemInitFile     (MemInitFile),
@@ -93,8 +111,8 @@ module prim_ram_1p_adv import prim_ram_1p_pkg::*; #(
   ) u_mem (
     .clk_i,
 
-    .req_i    (req_q),
-    .write_i  (write_q),
+    .req_i    (req_q_b),
+    .write_i  (write_q_b),
     .addr_i   (addr_q),
     .wdata_i  (wdata_q),
     .wmask_i  (wmask_q),
@@ -102,21 +120,41 @@ module prim_ram_1p_adv import prim_ram_1p_pkg::*; #(
     .cfg_i
   );
 
+  assign rvalid_sram_d = mubi4_and_hi(req_q, mubi4_t'(~write_q));
+
   always_ff @(posedge clk_i or negedge rst_ni) begin
     if (!rst_ni) begin
-      rvalid_sram_q <= 1'b0;
+      rvalid_sram_q <= MuBi4False;
     end else begin
-      rvalid_sram_q <= req_q & ~write_q;
+      rvalid_sram_q <= rvalid_sram_d;
     end
   end
 
-  assign req_d              = req_i;
-  assign write_d            = write_i;
+  assign req_d              = mubi4_bool_to_mubi(req_i);
+  assign write_d            = mubi4_bool_to_mubi(write_i);
   assign addr_d             = addr_i;
-  assign rvalid_o           = rvalid_q;
+  assign rvalid_o           = mubi4_test_true_loose(rvalid_q);
   assign rdata_o            = rdata_q;
   assign rerror_o           = rerror_q;
 
+  prim_buf #(
+    .Width(MuBi4Width)
+  ) u_req_d_buf (
+    .in_i (req_d),
+    .out_o(req_buf_b_d)
+  );
+
+  assign req_buf_d = mubi4_t'(req_buf_b_d);
+
+  prim_buf #(
+    .Width(MuBi4Width)
+  ) u_write_d_buf (
+    .in_i (write_d),
+    .out_o(write_buf_b_d)
+  );
+
+  assign write_buf_d = mubi4_t'(write_buf_b_d);
+
   /////////////////////////////
   // ECC / Parity Generation //
   /////////////////////////////
@@ -222,24 +260,55 @@ module prim_ram_1p_adv import prim_ram_1p_pkg::*; #(
 
   if (EnableInputPipeline) begin : gen_regslice_input
     // Put the register slices between ECC encoding to SRAM port
+
+    // If no ECC or parity is used, do not use prim_flop to allow synthesis
+    // tool to optimize the registers.
+    if (EnableECC || EnableParity) begin : gen_prim_flop
+      prim_flop #(
+        .Width(MuBi4Width),
+        .ResetValue(MuBi4Width'(MuBi4False))
+      ) u_write_flop (
+        .clk_i,
+        .rst_ni,
+        .d_i(MuBi4Width'(write_buf_d)),
+        .q_o({write_q})
+      );
+
+      prim_flop #(
+        .Width(MuBi4Width),
+        .ResetValue(MuBi4Width'(MuBi4False))
+      ) u_req_flop (
+        .clk_i,
+        .rst_ni,
+        .d_i(MuBi4Width'(req_buf_d)),
+        .q_o({req_q})
+      );
+    end else begin: gen_no_prim_flop
+      always_ff @(posedge clk_i or negedge rst_ni) begin
+        if (!rst_ni) begin
+          write_q <= MuBi4False;
+          req_q   <= MuBi4False;
+        end else begin
+          write_q <= write_buf_d;
+          req_q   <= req_buf_d;
+        end
+      end
+    end
+
     always_ff @(posedge clk_i or negedge rst_ni) begin
       if (!rst_ni) begin
-        req_q   <= '0;
-        write_q <= '0;
         addr_q  <= '0;
         wdata_q <= '0;
         wmask_q <= '0;
       end else begin
-        req_q   <= req_d;
-        write_q <= write_d;
         addr_q  <= addr_d;
         wdata_q <= wdata_d;
         wmask_q <= wmask_d;
       end
     end
   end else begin : gen_dirconnect_input
-    assign req_q   = req_d;
-    assign write_q = write_d;
+    assign req_q   = req_buf_d;
+    assign write_q = write_buf_d;
     assign addr_q  = addr_d;
     assign wdata_q = wdata_d;
     assign wmask_q = wmask_d;
@@ -247,23 +316,47 @@ module prim_ram_1p_adv import prim_ram_1p_pkg::*; #(
 
   if (EnableOutputPipeline) begin : gen_regslice_output
     // Put the register slices between ECC decoding to output
+
+    // If no ECC or parity is used, do not use prim_flop to allow synthesis
+    // tool to optimize the registers.
+    if (EnableECC || EnableParity) begin : gen_prim_rvalid_flop
+      prim_flop #(
+        .Width(MuBi4Width),
+        .ResetValue(MuBi4Width'(MuBi4False))
+      ) u_rvalid_flop (
+        .clk_i,
+        .rst_ni,
+        .d_i(MuBi4Width'(rvalid_d)),
+        .q_o({rvalid_q})
+      );
+    end else begin: gen_no_prim_rvalid_flop
+      always_ff @(posedge clk_i or negedge rst_ni) begin
+        if (!rst_ni) begin
+          rvalid_q <= MuBi4False;
+        end else begin
+          rvalid_q <= rvalid_d;
+        end
+      end
+    end
+
     always_ff @(posedge clk_i or negedge rst_ni) begin
       if (!rst_ni) begin
-        rvalid_q <= '0;
         rdata_q  <= '0;
         rerror_q <= '0;
       end else begin
-        rvalid_q <= rvalid_d;
         rdata_q  <= rdata_d;
         // tie to zero if the read data is not valid
-        rerror_q <= rerror_d & {2{rvalid_d}};
+        rerror_q <= rerror_d & {2{mubi4_test_true_loose(rvalid_d)}};
       end
     end
   end else begin : gen_dirconnect_output
     assign rvalid_q = rvalid_d;
     assign rdata_q  = rdata_d;
     // tie to zero if the read data is not valid
-    assign rerror_q = rerror_d & {2{rvalid_d}};
+    assign rerror_q = rerror_d & {2{mubi4_test_true_loose(rvalid_d)}};
   end
 
+  assign alert_o = mubi4_test_invalid(req_q) | mubi4_test_invalid(write_q) |
+                   mubi4_test_invalid(rvalid_q) | mubi4_test_invalid(rvalid_sram_q);
+
 endmodule : prim_ram_1p_adv
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_ram_1p_pkg.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_ram_1p_pkg.sv
index d47962929a..4aefd25f87 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_ram_1p_pkg.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_ram_1p_pkg.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_ram_1p_scr.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_ram_1p_scr.sv
index 36f786a7c2..d31a7d5ca0 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_ram_1p_scr.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_ram_1p_scr.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
@@ -31,9 +31,9 @@ module prim_ram_1p_scr import prim_ram_1p_pkg::*; #(
 
   // Scrambling parameters. Note that this needs to be low-latency, hence we have to keep the
   // amount of cipher rounds low. PRINCE has 5 half rounds in its original form, which corresponds
-  // to 2*5 + 1 effective rounds. Setting this to 2 halves this to approximately 5 effective rounds.
+  // to 2*5 + 1 effective rounds. Setting this to 3 lowers this to approximately 7 effective rounds.
   // Number of PRINCE half rounds, can be [1..5]
-  parameter  int NumPrinceRoundsHalf = 2,
+  parameter  int NumPrinceRoundsHalf = 3,
   // Number of extra diffusion rounds. Setting this to 0 to disables diffusion.
   // NOTE: this is zero by default, since the non-linear transformation of data bits can interact
   // adversely with end-to-end ECC integrity. Only enable this if you know what you are doing
@@ -83,9 +83,26 @@ module prim_ram_1p_scr import prim_ram_1p_pkg::*; #(
   output logic [31:0]               raddr_o,  // Read address for error reporting.
 
   // config
-  input ram_1p_cfg_t                cfg_i
+  input ram_1p_cfg_t                cfg_i,
+
+  // Write currently pending inside this module.
+  output logic                      wr_collision_o,
+  output logic                      write_pending_o,
+
+  // When detecting multi-bit encoding errors, raise alert.
+  output logic                      alert_o
 );
 
+  import prim_mubi_pkg::mubi4_t;
+  import prim_mubi_pkg::mubi4_and_hi;
+  import prim_mubi_pkg::mubi4_bool_to_mubi;
+  import prim_mubi_pkg::mubi4_or_hi;
+  import prim_mubi_pkg::mubi4_test_invalid;
+  import prim_mubi_pkg::mubi4_test_true_loose;
+  import prim_mubi_pkg::MuBi4True;
+  import prim_mubi_pkg::MuBi4False;
+  import prim_mubi_pkg::MuBi4Width;
+
   //////////////////////
   // Parameter Checks //
   //////////////////////
@@ -108,17 +125,51 @@ module prim_ram_1p_scr import prim_ram_1p_pkg::*; #(
   // the data from the write holding register.
 
   // Read / write strobes
-  logic read_en, write_en_d, write_en_q;
+  mubi4_t read_en, read_en_buf;
+  logic   read_en_b;
+  mubi4_t write_en_d, write_en_buf_d, write_en_q;
+  logic   write_en_b;
+  logic [MuBi4Width-1:0] read_en_b_buf, write_en_buf_b_d;
   assign gnt_o = req_i & key_valid_i;
 
-  assign read_en = gnt_o & ~write_i;
-  assign write_en_d = gnt_o & write_i;
+  assign read_en = mubi4_bool_to_mubi(gnt_o & ~write_i);
+  assign write_en_d = mubi4_bool_to_mubi(gnt_o & write_i);
+
+  prim_buf #(
+    .Width(MuBi4Width)
+  ) u_read_en_buf (
+    .in_i (read_en),
+    .out_o(read_en_b_buf)
+  );
+
+  assign read_en_buf = mubi4_t'(read_en_b_buf);
+
+  prim_buf #(
+    .Width(MuBi4Width)
+  ) u_write_en_d_buf (
+    .in_i (write_en_d),
+    .out_o(write_en_buf_b_d)
+  );
+
+  assign write_en_buf_d = mubi4_t'(write_en_buf_b_d);
 
-  logic write_pending_q;
-  logic addr_collision_d, addr_collision_q;
+  mubi4_t write_pending_q;
+  mubi4_t addr_collision_d, addr_collision_q;
   logic [AddrWidth-1:0] addr_scr;
   logic [AddrWidth-1:0] waddr_scr_q;
-  assign addr_collision_d = read_en & (write_en_q | write_pending_q) & (addr_scr == waddr_scr_q);
+  mubi4_t addr_match;
+  logic [MuBi4Width-1:0] addr_match_buf;
+
+  assign addr_match = (addr_scr == waddr_scr_q) ? MuBi4True : MuBi4False;
+  prim_buf #(
+    .Width(MuBi4Width)
+  ) u_addr_match_buf (
+    .in_i (addr_match),
+    .out_o(addr_match_buf)
+  );
+
+  assign addr_collision_d = mubi4_and_hi(mubi4_and_hi(mubi4_or_hi(write_en_q,
+      write_pending_q), read_en_buf), mubi4_t'(addr_match_buf));
 
   // Macro requests and write strobe
   // The macro operation is silenced if an integrity error is seen
@@ -128,13 +179,23 @@ module prim_ram_1p_scr import prim_ram_1p_pkg::*; #(
     .out_o(intg_error_buf)
   );
   logic macro_req;
-  assign macro_req   = ~intg_error_w_q & ~intg_error_buf & (read_en | write_en_q | write_pending_q);
+  assign macro_req   = ~intg_error_w_q & ~intg_error_buf &
+      mubi4_test_true_loose(mubi4_or_hi(mubi4_or_hi(read_en_buf, write_en_q), write_pending_q));
   // We are allowed to write a pending write transaction to the memory if there is no incoming read.
   logic macro_write;
-  assign macro_write = (write_en_q | write_pending_q) & ~read_en & ~intg_error_w_q;
+  assign macro_write = mubi4_test_true_loose(mubi4_or_hi(write_en_q, write_pending_q)) &
+    ~mubi4_test_true_loose(read_en_buf) & ~intg_error_w_q;
   // New read write collision
   logic rw_collision;
-  assign rw_collision = write_en_q & read_en;
+  assign rw_collision = mubi4_test_true_loose(mubi4_and_hi(write_en_q, read_en_buf));
+
+  // Write currently processed inside this module. Although we are sending an immediate d_valid
+  // back to the host, the write could take longer due to the scrambling.
+  assign write_pending_o = macro_write | mubi4_test_true_loose(write_en_buf_d);
+
+  // When a read is followed after a write with the same address, we return the data from the
+  // holding register.
+  assign wr_collision_o = mubi4_test_true_loose(addr_collision_q);
 
   ////////////////////////
   // Address Scrambling //
@@ -142,7 +203,7 @@ module prim_ram_1p_scr import prim_ram_1p_pkg::*; #(
 
   // We only select the pending write address in case there is no incoming read transaction.
   logic [AddrWidth-1:0] addr_mux;
-  assign addr_mux = (read_en) ? addr_scr : waddr_scr_q;
+  assign addr_mux = (mubi4_test_true_loose(read_en_buf)) ? addr_scr : waddr_scr_q;
 
   // This creates a bijective address mapping using a substitution / permutation network.
   if (NumAddrScrRounds > 0) begin : gen_addr_scr
@@ -296,9 +357,9 @@ module prim_ram_1p_scr import prim_ram_1p_pkg::*; #(
 
   // Clear this if we can write the memory in this cycle. Set only if the current write cannot
   // proceed due to an incoming read operation.
-  logic write_scr_pending_d;
-  assign write_scr_pending_d = (macro_write)  ? 1'b0 :
-                               (rw_collision) ? 1'b1 :
+  mubi4_t write_scr_pending_d;
+  assign write_scr_pending_d = (macro_write)  ? MuBi4False :
+                               (rw_collision) ? MuBi4True :
                                                 write_pending_q;
 
   // Select the correct scrambled word to be written, based on whether the word in the scrambled
@@ -306,20 +367,20 @@ module prim_ram_1p_scr import prim_ram_1p_pkg::*; #(
   // combined with the wdata_q register. We don't do that here for timing reasons, since that would
   // require another read data mux to inject the scrambled data into the read descrambling path.
   logic [Width-1:0] wdata_scr;
-  assign wdata_scr = (write_pending_q) ? wdata_scr_q : wdata_scr_d;
+  assign wdata_scr = (mubi4_test_true_loose(write_pending_q)) ? wdata_scr_q : wdata_scr_d;
 
-  logic rvalid_q;
+  mubi4_t rvalid_q;
   logic intg_error_r_q;
   logic [Width-1:0] wmask_q;
   always_comb begin : p_forward_mux
     rdata_o = '0;
     rvalid_o = 1'b0;
     // Kill the read response in case an integrity error was seen.
-    if (!intg_error_r_q && rvalid_q) begin
+    if (!intg_error_r_q && mubi4_test_true_loose(rvalid_q)) begin
       rvalid_o = 1'b1;
       // In case of a collision, we forward the valid bytes of the write data from the unscrambled
       // holding register.
-      if (addr_collision_q) begin
+      if (mubi4_test_true_loose(addr_collision_q)) begin
         for (int k = 0; k < Width; k++) begin
           if (wmask_q[k]) begin
             rdata_o[k] = wdata_q[k];
@@ -338,13 +399,57 @@ module prim_ram_1p_scr import prim_ram_1p_pkg::*; #(
   ///////////////
   // Registers //
   ///////////////
+  logic ram_alert;
+
+  assign alert_o = mubi4_test_invalid(write_en_q) | mubi4_test_invalid(addr_collision_q) |
+                   mubi4_test_invalid(write_pending_q) | mubi4_test_invalid(rvalid_q) |
+                   ram_alert;
+
+  prim_flop #(
+    .Width(MuBi4Width),
+    .ResetValue(MuBi4Width'(MuBi4False))
+  ) u_write_en_flop (
+    .clk_i,
+    .rst_ni,
+    .d_i(MuBi4Width'(write_en_buf_d)),
+    .q_o({write_en_q})
+  );
+
+  prim_flop #(
+    .Width(MuBi4Width),
+    .ResetValue(MuBi4Width'(MuBi4False))
+  ) u_addr_collision_flop (
+    .clk_i,
+    .rst_ni,
+    .d_i(MuBi4Width'(addr_collision_d)),
+    .q_o({addr_collision_q})
+  );
+
+  prim_flop #(
+    .Width(MuBi4Width),
+    .ResetValue(MuBi4Width'(MuBi4False))
+  ) u_write_pending_flop (
+    .clk_i,
+    .rst_ni,
+    .d_i(MuBi4Width'(write_scr_pending_d)),
+    .q_o({write_pending_q})
+  );
+
+  prim_flop #(
+    .Width(MuBi4Width),
+    .ResetValue(MuBi4Width'(MuBi4False))
+  ) u_rvalid_flop (
+    .clk_i,
+    .rst_ni,
+    .d_i(MuBi4Width'(read_en_buf)),
+    .q_o({rvalid_q})
+  );
+
+  assign read_en_b = mubi4_test_true_loose(read_en_buf);
+  assign write_en_b = mubi4_test_true_loose(write_en_buf_d);
 
   always_ff @(posedge clk_i or negedge rst_ni) begin : p_wdata_buf
     if (!rst_ni) begin
-      write_pending_q     <= 1'b0;
-      addr_collision_q    <= 1'b0;
-      rvalid_q            <= 1'b0;
-      write_en_q          <= 1'b0;
       intg_error_r_q      <= 1'b0;
       intg_error_w_q      <= 1'b0;
       raddr_q             <= '0;
@@ -353,16 +458,12 @@ module prim_ram_1p_scr import prim_ram_1p_pkg::*; #(
       wdata_q             <= '0;
       wdata_scr_q         <= '0;
     end else begin
-      write_pending_q     <= write_scr_pending_d;
-      addr_collision_q    <= addr_collision_d;
-      rvalid_q            <= read_en;
-      write_en_q          <= write_en_d;
       intg_error_r_q      <= intg_error_buf;
 
-      if (read_en) begin
+      if (read_en_b) begin
         raddr_q <= addr_i;
       end
-      if (write_en_d) begin
+      if (write_en_b) begin
         waddr_scr_q    <= addr_scr;
         wmask_q        <= wmask_i;
         wdata_q        <= wdata_i;
@@ -397,7 +498,8 @@ module prim_ram_1p_scr import prim_ram_1p_pkg::*; #(
     .rdata_o  ( rdata_scr   ),
     .rvalid_o ( ),
     .rerror_o,
-    .cfg_i
+    .cfg_i,
+    .alert_o  ( ram_alert   )
   );
 
   `include "prim_util_get_scramble_params.svh"
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_ram_1r1w_adv.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_ram_1r1w_adv.sv
index ddcb4f9d87..a2924433c0 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_ram_1r1w_adv.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_ram_1r1w_adv.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_ram_1r1w_async_adv.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_ram_1r1w_async_adv.sv
index a6b2bc9858..6e9d31b512 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_ram_1r1w_async_adv.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_ram_1r1w_async_adv.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_ram_2p_adv.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_ram_2p_adv.sv
index 866217a64b..951ae981c8 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_ram_2p_adv.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_ram_2p_adv.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_ram_2p_async_adv.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_ram_2p_async_adv.sv
index d3de6f67d9..5c93fe2855 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_ram_2p_async_adv.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_ram_2p_async_adv.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_ram_2p_pkg.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_ram_2p_pkg.sv
index 4ae04271be..0b002b4ecc 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_ram_2p_pkg.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_ram_2p_pkg.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_reg_cdc.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_reg_cdc.sv
index f323100b5f..94a1f50c81 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_reg_cdc.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_reg_cdc.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
@@ -11,6 +11,17 @@
 //
 // If in the future this assumption changes, we can modify this module easily to
 // support the new behavior.
+//
+// Note on domain resets
+//
+// When a single domain is reset, assertions of the internal signals 'dst_req'
+// and/or 'src_ack' may occur as the two ends of a pulse synchronizer
+// (prim_pulse_sync or prim_sync_reqack, NRZ option) are briefly inconsistent,
+// generating a spurious pulse at the destination.
+//
+// These pulses are prevented from propagating outside of this module, provided
+// that the reset does not occur whilst a transaction is in progress; firmware
+// is responsible for preventing that.
 
 `include "prim_assert.sv"
 
@@ -77,7 +88,7 @@ module prim_reg_cdc #(
   // register.
   // When software performs a write, the write data is captured in src_q for
   // CDC purposes.  When not performing a write, the src_q reflects the most recent
-  // hardware value. For registes with no hardware access, this is simply the
+  // hardware value. For registers with no hardware access, this is simply the
   // the value programmed by software (or in the case R1C, W1C etc) the value after
   // the operation. For registers with hardware access, this reflects a potentially
   // delayed version of the real value, as the software facing updates lag real
@@ -115,7 +126,7 @@ module prim_reg_cdc #(
       // sample data whenever a busy transaction finishes OR
       // when an update pulse is seen.
       // TODO: We should add a cover group to test different sync timings
-      // between src_ack and src_update. Ie, there can be 3 scearios:
+      // between src_ack and src_update. ie. there can be 3 scenarios:
       // 1. update one cycle before ack
       // 2. ack one cycle before update
       // 3. update / ack on the same cycle
@@ -183,7 +194,9 @@ module prim_reg_cdc #(
   );
 
 
-  // Each is valid only when destination request pulse is high
+  // Each is valid only when destination request pulse is high; this is important in not propagating
+  // the internal assertion of 'dst_req' by the 'prim_pulse_sync' channel when just one domain is
+  // reset.
   assign {dst_we_o, dst_re_o, dst_regwen_o} = txn_bits_q & {TxnWidth{dst_req}};
 
   `ASSERT_KNOWN(SrcBusyKnown_A, src_busy_o, clk_src_i, !rst_src_ni)
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_reg_cdc_arb.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_reg_cdc_arb.sv
index 815fef8963..77fe83a414 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_reg_cdc_arb.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_reg_cdc_arb.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
@@ -93,7 +93,7 @@ module prim_reg_cdc_arb #(
   } state_e;
 
 
-  // Only honor the incoming destinate update request if the incoming
+  // Only honor the incoming destination update request if the incoming
   // value is actually different from what is already completed in the
   // handshake
   logic dst_update;
@@ -107,7 +107,6 @@ module prim_reg_cdc_arb #(
     req_sel_e id_q;
 
     state_e state_q, state_d;
-    // Make sure to indent the following later
     always_ff @(posedge clk_dst_i or negedge rst_dst_ni) begin
       if (!rst_dst_ni) begin
         state_q <= StIdle;
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_reg_we_check.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_reg_we_check.sv
index 51373ca370..0734ec879e 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_reg_we_check.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_reg_we_check.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_rom_adv.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_rom_adv.sv
index dbeec644a7..bfa0c5b3cb 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_rom_adv.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_rom_adv.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_rom_pkg.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_rom_pkg.sv
index 1ac84ee04c..c6c4be04df 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_rom_pkg.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_rom_pkg.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_rst_sync.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_rst_sync.sv
index b499a1a8ea..f90a7ab497 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_rst_sync.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_rst_sync.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_sec_anchor_buf.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_sec_anchor_buf.sv
index 1ea71841a4..3639f144f5 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_sec_anchor_buf.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_sec_anchor_buf.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_sec_anchor_flop.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_sec_anchor_flop.sv
index ce18b47d4d..68dec7ea93 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_sec_anchor_flop.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_sec_anchor_flop.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_22_16_dec.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_22_16_dec.sv
index 4fa1196ca4..1bd7590fa3 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_22_16_dec.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_22_16_dec.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_22_16_enc.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_22_16_enc.sv
index 41ad31b953..ae80637a0f 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_22_16_enc.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_22_16_enc.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_28_22_dec.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_28_22_dec.sv
index 7df02e24dc..80e8117d91 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_28_22_dec.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_28_22_dec.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_28_22_enc.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_28_22_enc.sv
index f4e451af1c..4814d576fa 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_28_22_enc.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_28_22_enc.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_39_32_dec.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_39_32_dec.sv
index 10ee733e0d..94959c88e7 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_39_32_dec.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_39_32_dec.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_39_32_enc.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_39_32_enc.sv
index 5668ff3af7..347b1dd62a 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_39_32_enc.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_39_32_enc.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_64_57_dec.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_64_57_dec.sv
index dc1fd426ac..bfe6b36350 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_64_57_dec.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_64_57_dec.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_64_57_enc.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_64_57_enc.sv
index 6e83726281..071dbbde1b 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_64_57_enc.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_64_57_enc.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_72_64_dec.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_72_64_dec.sv
index 112a64fdf1..664f093f7a 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_72_64_dec.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_72_64_dec.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_72_64_enc.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_72_64_enc.sv
index 5e9f674d83..a0d97db816 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_72_64_enc.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_72_64_enc.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_hamming_22_16_dec.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_hamming_22_16_dec.sv
index 135dc2fde9..4b8382932f 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_hamming_22_16_dec.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_hamming_22_16_dec.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_hamming_22_16_enc.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_hamming_22_16_enc.sv
index 9eb7295ede..81c1d9a8e0 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_hamming_22_16_enc.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_hamming_22_16_enc.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_hamming_39_32_dec.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_hamming_39_32_dec.sv
index 1f41364fc0..da37f70cde 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_hamming_39_32_dec.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_hamming_39_32_dec.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_hamming_39_32_enc.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_hamming_39_32_enc.sv
index 47b60f5674..4942a6893d 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_hamming_39_32_enc.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_hamming_39_32_enc.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_hamming_72_64_dec.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_hamming_72_64_dec.sv
index 7eaaa40dc9..a4e4396290 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_hamming_72_64_dec.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_hamming_72_64_dec.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_hamming_72_64_enc.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_hamming_72_64_enc.sv
index a24f3c8f01..bbddeee2cd 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_hamming_72_64_enc.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_hamming_72_64_enc.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_hamming_76_68_dec.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_hamming_76_68_dec.sv
index 418a233184..86daf1cf73 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_hamming_76_68_dec.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_hamming_76_68_dec.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_hamming_76_68_enc.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_hamming_76_68_enc.sv
index 3e94083841..6cd4cf2d60 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_hamming_76_68_enc.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_hamming_76_68_enc.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_22_16_dec.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_22_16_dec.sv
index 5d53680e8b..184731d450 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_22_16_dec.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_22_16_dec.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_22_16_enc.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_22_16_enc.sv
index a057b0d4cc..c125cc39e6 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_22_16_enc.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_22_16_enc.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_28_22_dec.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_28_22_dec.sv
index b54b6474ad..214f848e45 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_28_22_dec.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_28_22_dec.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_28_22_enc.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_28_22_enc.sv
index b1998e3cd0..2e6d11825e 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_28_22_enc.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_28_22_enc.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_39_32_dec.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_39_32_dec.sv
index a40a86cd1e..760242a7b1 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_39_32_dec.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_39_32_dec.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_39_32_enc.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_39_32_enc.sv
index dedd585c29..c4d033718a 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_39_32_enc.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_39_32_enc.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_64_57_dec.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_64_57_dec.sv
index 6e34b50271..e70eec0f96 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_64_57_dec.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_64_57_dec.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_64_57_enc.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_64_57_enc.sv
index 99565b79a9..a1fcefb216 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_64_57_enc.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_64_57_enc.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_72_64_dec.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_72_64_dec.sv
index aa4c5b59c2..ca58f0c9fd 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_72_64_dec.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_72_64_dec.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_72_64_enc.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_72_64_enc.sv
index 87b36c4c27..83fc880de7 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_72_64_enc.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_72_64_enc.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_22_16_dec.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_22_16_dec.sv
index 0f077ee7e3..11a7b48cb3 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_22_16_dec.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_22_16_dec.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_22_16_enc.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_22_16_enc.sv
index 0b63ff60e0..95715e7aff 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_22_16_enc.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_22_16_enc.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_39_32_dec.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_39_32_dec.sv
index f65e86d5fd..7981dbbd61 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_39_32_dec.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_39_32_dec.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_39_32_enc.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_39_32_enc.sv
index ee988db48d..1f17fc5bab 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_39_32_enc.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_39_32_enc.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_72_64_dec.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_72_64_dec.sv
index 99c2e5de08..9a3c905242 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_72_64_dec.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_72_64_dec.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_72_64_enc.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_72_64_enc.sv
index 3a47ca5ca7..d109fc3f61 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_72_64_enc.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_72_64_enc.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_76_68_dec.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_76_68_dec.sv
index c2aa75e40a..6128e1e131 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_76_68_dec.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_76_68_dec.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_76_68_enc.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_76_68_enc.sv
index 324f9c6bde..6e798bdfa4 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_76_68_enc.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_76_68_enc.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_pkg.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_pkg.sv
index 4c17534a66..b5782845a5 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_pkg.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_pkg.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_sha2.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_sha2.sv
index 06559dbeb4..e2a571cd39 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_sha2.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_sha2.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
@@ -16,7 +16,7 @@ module prim_sha2 import prim_sha2_pkg::*;
   input rst_ni,
 
   input               wipe_secret_i,
-  input sha_word64_t  wipe_v_i,
+  input sha_word32_t  wipe_v_i,
   // control signals and message words input to the message FIFO
   input               fifo_rvalid_i, // indicates that the message FIFO (prim_sync_fifo) has words
                                      // ready to write into the SHA-2 padding buffer
@@ -27,16 +27,19 @@ module prim_sha2 import prim_sha2_pkg::*;
   input               sha_en_i,   // if disabled, it clears internal content
   input               hash_start_i, // start hashing: initialize data counter to zero and clear
                                     // digest
+  input               hash_stop_i, // stop hashing: after all data up to message length has been
+                                   // hashed, stop without padding
   input               hash_continue_i, // continue hashing: set data counter to `message_length_i`
                                        // and use current digest
   input digest_mode_e digest_mode_i,
   input               hash_process_i,
   output logic        hash_done_o,
 
-  input  [127:0]            message_length_i, // bits but byte based
+  input  [63:0]             message_length_i, // bits but byte based
   input  sha_word64_t [7:0] digest_i,
   input  logic [7:0]        digest_we_i,
   output sha_word64_t [7:0] digest_o, // tie off unused port slice when MultimodeEn = 0
+  output logic digest_on_blk_o, // digest being computed for a complete block
   output logic hash_running_o, // `1` iff hash computation is active (as opposed to `idle_o`, which
                                // is also `0` and thus 'busy' when waiting for a FIFO input)
   output logic idle_o
@@ -66,7 +69,7 @@ module prim_sha2 import prim_sha2_pkg::*;
       assign unused_digest_upper[i] = ^digest_i[i][63:32];
     end
     logic unused_signals;
-    assign unused_signals = ^{wipe_v_i[63:32], shaf_rdata[63:32], unused_digest_upper};
+    assign unused_signals = ^{shaf_rdata[63:32], unused_digest_upper};
   end
 
   // Most operations and control signals are identical no matter if we are starting or continuing
@@ -74,7 +77,7 @@ module prim_sha2 import prim_sha2_pkg::*;
   assign hash_go = hash_start_i | hash_continue_i;
 
   assign digest_mode_flag_d = hash_go     ? digest_mode_i   :    // latch in configured mode
-                              hash_done_o ? None            :    // clear
+                              hash_done_o ? SHA2_None       :    // clear
                                             digest_mode_flag_q;  // keep
 
   if (MultimodeEn) begin : gen_multimode
@@ -87,7 +90,7 @@ module prim_sha2 import prim_sha2_pkg::*;
     always_comb begin : compute_w_multimode
       w_d = w_q;
       if (wipe_secret_i) begin
-        w_d = w_q ^ {16{wipe_v_i[63:0]}};
+        w_d = {32{wipe_v_i}};
       end else if (!sha_en_i || hash_go) begin
         w_d = '0;
       end else if (!run_hash && update_w_from_fifo) begin
@@ -118,9 +121,7 @@ module prim_sha2 import prim_sha2_pkg::*;
     always_comb begin : compression_multimode
       hash_d = hash_q;
       if (wipe_secret_i) begin
-        for (int i = 0; i < 8; i++) begin
-          hash_d[i] = hash_q[i] ^ wipe_v_i;
-        end
+        hash_d = {16{wipe_v_i}};
       end else if (init_hash) begin
         hash_d = digest_q;
       end else if (run_hash) begin
@@ -143,9 +144,7 @@ module prim_sha2 import prim_sha2_pkg::*;
     always_comb begin : compute_digest_multimode
       digest_d = digest_q;
       if (wipe_secret_i) begin
-        for (int i = 0 ; i < 8 ; i++) begin
-          digest_d[i] = digest_q[i] ^ wipe_v_i;
-        end
+        digest_d = {16{wipe_v_i}};
       end else if (hash_start_i) begin
         for (int i = 0 ; i < 8 ; i++) begin
           if (digest_mode_i == SHA2_256) begin
@@ -166,16 +165,6 @@ module prim_sha2 import prim_sha2_pkg::*;
         for (int i = 0 ; i < 8 ; i++) begin
           digest_d[i] = digest_q[i] + hash_q[i];
         end
-        if (hash_done_o == 1'b1 && digest_mode_flag_q == SHA2_384) begin
-          // final digest truncation for SHA-2 384
-          digest_d[6] = '0;
-          digest_d[7] = '0;
-        end else if (hash_done_o == 1'b1 && digest_mode_flag_q == SHA2_256) begin
-          // make sure to clear out most significant 32-bits of each digest word (zero-padding)
-          for (int i = 0 ; i < 8 ; i++) begin
-            digest_d[i][63:32] = 32'b0;
-          end
-        end
       end
     end : compute_digest_multimode
 
@@ -201,7 +190,7 @@ module prim_sha2 import prim_sha2_pkg::*;
       // ~MultimodeEn
       w256_d = w256_q;
       if (wipe_secret_i) begin
-        w256_d = w256_q ^ {16{wipe_v_i[31:0]}};
+        w256_d = {16{wipe_v_i}};
       end else if (!sha_en_i || hash_go) begin
         w256_d = '0;
       end else if (!run_hash && update_w_from_fifo) begin
@@ -227,9 +216,7 @@ module prim_sha2 import prim_sha2_pkg::*;
     always_comb begin : compression_256
       hash256_d = hash256_q;
       if (wipe_secret_i) begin
-        for (int i = 0; i < 8; i++) begin
-          hash256_d[i] = hash256_q[i] ^ wipe_v_i[31:0];
-        end
+        hash256_d = {8{wipe_v_i}};
       end else if (init_hash) begin
         hash256_d = digest256_q;
       end else if (run_hash) begin
@@ -247,9 +234,7 @@ module prim_sha2 import prim_sha2_pkg::*;
     always_comb begin : compute_digest_256
       digest256_d = digest256_q;
       if (wipe_secret_i) begin
-        for (int i = 0 ; i < 8 ; i++) begin
-          digest256_d[i] = digest256_q[i] ^ wipe_v_i[31:0];
-        end
+        digest256_d = {8{wipe_v_i}};
       end else if (hash_start_i) begin
         for (int i = 0 ; i < 8 ; i++) begin
             digest256_d[i] = InitHash_256[i];
@@ -386,7 +371,7 @@ module prim_sha2 import prim_sha2_pkg::*;
   end
 
   always_ff @(posedge clk_i or negedge rst_ni) begin
-    if (!rst_ni) digest_mode_flag_q <= None;
+    if (!rst_ni) digest_mode_flag_q <= SHA2_None;
     else         digest_mode_flag_q <= digest_mode_flag_d;
   end
 
@@ -461,6 +446,13 @@ module prim_sha2 import prim_sha2_pkg::*;
     if (!sha_en_i || hash_go) sha_st_d  = ShaIdle;
   end
 
+  // Determine whether a digest is being computed for a complete block: when `update_digest` is set,
+  // this module is not waiting for more data from the FIFO, and `message_length_i` is zero modulo a
+  // complete block (512 bit for SHA2_256 and 1024 bit for SHA2_384 and SHA2_512).
+  assign digest_on_blk_o = update_digest && (fifo_st_q == FifoIdle) && (
+      (digest_mode_flag_q == SHA2_256                 && message_length_i[8:0] == '0) ||
+      (digest_mode_flag_q inside {SHA2_384, SHA2_512} && message_length_i[9:0] == '0));
+
   assign one_chunk_done = ((digest_mode_flag_q == SHA2_256 || ~MultimodeEn)
                           && (round_q == 7'd63)) ? 1'b1 :
                           (((digest_mode_flag_q == SHA2_384) || (digest_mode_flag_q == SHA2_512))
@@ -479,11 +471,12 @@ module prim_sha2 import prim_sha2_pkg::*;
     .shaf_rready_i (shaf_rready), // indicates that w is ready for more words from padding buffer
     .sha_en_i,
     .hash_start_i,
+    .hash_stop_i,
     .hash_continue_i,
     .digest_mode_i,
     .hash_process_i,
-    .hash_done_o,
-    .message_length_i,
+    .hash_done_i (hash_done_o),
+    .message_length_i ({64'b0, message_length_i}), // 128-bit message length per NIST-FIPS-180-4
     .msg_feed_complete_o (msg_feed_complete)
   );
 
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_sha2_32.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_sha2_32.sv
index f19cfaf32c..adac15b607 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_sha2_32.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_sha2_32.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
@@ -18,18 +18,20 @@ module prim_sha2_32 import prim_sha2_pkg::*;
                                           // ready to write into the SHA-2 padding buffer
   input  sha_fifo32_t fifo_rdata_i,
   output logic        fifo_rready_o,      // indicates that the wrapper word accumulation buffer is
-                                        // ready to receive words to feed into the SHA-2 engine
+                                          // ready to receive words to feed into the SHA-2 engine
   // Control signals
   input                     sha_en_i, // if disabled, it clears internal content
   input                     hash_start_i,
+  input                     hash_stop_i,
   input                     hash_continue_i,
   input digest_mode_e       digest_mode_i,
   input                     hash_process_i,
   output logic              hash_done_o,
-  input [127:0]             message_length_i, // use extended message length 128 bits
+  input [63:0]              message_length_i,
   input  sha_word64_t [7:0] digest_i,
   input  logic [7:0]        digest_we_i,
   output sha_word64_t [7:0] digest_o,         // use extended digest length
+  output logic              digest_on_blk_o,
   output logic              hash_running_o,
   output logic              idle_o
 );
@@ -44,7 +46,7 @@ module prim_sha2_32 import prim_sha2_pkg::*;
   // tie off unused ports/port slices
   if (!MultimodeEn) begin : gen_tie_unused
     logic unused_signals;
-    assign unused_signals = ^{message_length_i[127:64], digest_mode_i, hash_go};
+    assign unused_signals = ^{digest_mode_i, hash_go};
   end
 
   // logic and prim_sha2 instantiation for MultimodeEn = 1
@@ -78,29 +80,14 @@ module prim_sha2_32 import prim_sha2_pkg::*;
             word_buffer_d.mask[7:4]   = fifo_rdata_i.mask;
             word_part_inc             = 1'b1;
             fifo_rready_o             = 1'b1;
-            if (hash_process_i || process_flag_q) begin // ready to push out word (partial)
-              word_valid      = 1'b1;
-              // add least significant padding
-              full_word.data  =  {fifo_rdata_i.data, 32'b0};
-              full_word.mask  =  {fifo_rdata_i.mask, 4'h0};
-              sha_process     = 1'b1;
-              if (sha_ready == 1'b1) begin
-                // if word has been absorbed into hash engine
-                fifo_rready_o = 1'b1; // word pushed out to SHA engine, word buffer ready
-                word_part_inc = 1'b0;
-              end else begin
-                fifo_rready_o = 1'b0;
-              end
-            end
           end else begin   // SHA2_256 so pad and push out the word
             word_valid = 1'b1;
             // store the word with most significant padding
             word_buffer_d.data = {32'b0, fifo_rdata_i.data};
             word_buffer_d.mask = {4'hF, fifo_rdata_i.mask}; // pad with all-1 byte mask
-
             // pad with all-zero data and all-one byte masking and push word out already for 256
             full_word.data =  {32'b0, fifo_rdata_i.data};
-            full_word.mask = {4'hF, fifo_rdata_i.mask};
+            full_word.mask =  {4'hF, fifo_rdata_i.mask};
             if (hash_process_i || process_flag_q) begin
                 sha_process = 1'b1;
             end
@@ -188,7 +175,7 @@ module prim_sha2_32 import prim_sha2_pkg::*;
 
       // assign digest_mode_flag_d
       if (hash_go)          digest_mode_flag_d = digest_mode_i;      // latch in configured mode
-      else if (hash_done_o) digest_mode_flag_d = None;               // clear
+      else if (hash_done_o) digest_mode_flag_d = SHA2_None;          // clear
       else                  digest_mode_flag_d = digest_mode_flag_q; // keep
 
       // assign process_flag
@@ -203,12 +190,13 @@ module prim_sha2_32 import prim_sha2_pkg::*;
       .clk_i (clk_i),
       .rst_ni (rst_ni),
       .wipe_secret_i      (wipe_secret_i),
-      .wipe_v_i           ({wipe_v_i, wipe_v_i}),
+      .wipe_v_i           (wipe_v_i),
       .fifo_rvalid_i      (word_valid),
       .fifo_rdata_i       (full_word),
       .fifo_rready_o      (sha_ready),
       .sha_en_i           (sha_en_i),
       .hash_start_i       (hash_start_i),
+      .hash_stop_i        (hash_stop_i),
       .hash_continue_i    (hash_continue_i),
       .digest_mode_i      (digest_mode_i),
       .hash_process_i     (sha_process),
@@ -217,6 +205,7 @@ module prim_sha2_32 import prim_sha2_pkg::*;
       .digest_i           (digest_i),
       .digest_we_i        (digest_we_i),
       .digest_o           (digest_o),
+      .digest_on_blk_o    (digest_on_blk_o),
       .hash_running_o     (hash_running_o),
       .idle_o             (idle_o)
     );
@@ -237,7 +226,7 @@ module prim_sha2_32 import prim_sha2_pkg::*;
     end
 
     always_ff @(posedge clk_i or negedge rst_ni) begin
-      if (!rst_ni) digest_mode_flag_q <= None;
+      if (!rst_ni) digest_mode_flag_q <= SHA2_None;
       else         digest_mode_flag_q <= digest_mode_flag_d;
     end
   // logic and prim_sha2 instantiation for MultimodeEn = 0
@@ -254,20 +243,22 @@ module prim_sha2_32 import prim_sha2_pkg::*;
       .clk_i (clk_i),
       .rst_ni (rst_ni),
       .wipe_secret_i      (wipe_secret_i),
-      .wipe_v_i           ({wipe_v_i, wipe_v_i}),
+      .wipe_v_i           (wipe_v_i),
       .fifo_rvalid_i      (fifo_rvalid_i), // feed input directly
       .fifo_rdata_i       (full_word),
       .fifo_rready_o      (sha_ready),
       .sha_en_i           (sha_en_i),
       .hash_start_i       (hash_start_i),
+      .hash_stop_i        (hash_stop_i),
       .hash_continue_i    (hash_continue_i),
-      .digest_mode_i      (None),           // unused input port tied to ground
+      .digest_mode_i      (SHA2_None),      // unused input port tied to ground
       .hash_process_i     (hash_process_i), // feed input port directly to SHA-2 engine
       .hash_done_o        (hash_done_o),
-      .message_length_i   ({{64'b0}, message_length_i[63:0]}),
+      .message_length_i   (message_length_i),
       .digest_i           (digest_i),
       .digest_we_i        (digest_we_i),
       .digest_o           (digest_o),
+      .digest_on_blk_o    (digest_on_blk_o),
       .hash_running_o     (hash_running_o),
       .idle_o             (idle_o)
     );
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_sha2_pad.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_sha2_pad.sv
index 60c7391654..1dc010dfef 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_sha2_pad.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_sha2_pad.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
@@ -23,10 +23,11 @@ module prim_sha2_pad import prim_sha2_pkg::*;
   input                 shaf_rready_i,
   input                 sha_en_i,
   input                 hash_start_i,
+  input                 hash_stop_i,
   input                 hash_continue_i,
   input digest_mode_e   digest_mode_i,
   input                 hash_process_i,
-  input                 hash_done_o,
+  input                 hash_done_i,
   input        [127:0]  message_length_i,   // # of bytes in bits (8 bits granularity)
   output logic          msg_feed_complete_o // indicates all message is feeded
 );
@@ -35,8 +36,10 @@ module prim_sha2_pad import prim_sha2_pkg::*;
   logic         inc_txcount;
   logic         fifo_partial;
   logic         txcnt_eq_1a0;
+  logic         txcnt_eq_msg_len;
   logic         hash_go;
 
+  logic         hash_stop_flag_d, hash_stop_flag_q;
   logic         hash_process_flag_d, hash_process_flag_q;
   digest_mode_e digest_mode_flag_d,  digest_mode_flag_q;
 
@@ -60,13 +63,28 @@ module prim_sha2_pad import prim_sha2_pkg::*;
                                                                         (tx_count[9:0] == 10'h340) :
                                                                         '0;
 
-  assign hash_process_flag_d = (~sha_en_i || hash_go || hash_done_o) ? 1'b0 :
+  if (MultimodeEn) begin : gen_txcnt_comp_multimode
+    assign txcnt_eq_msg_len = (tx_count == message_length_i);
+  end else begin : gen_txcnt_comp_no_multimode
+    assign txcnt_eq_msg_len = (tx_count[63:0] == message_length_i[63:0]);
+  end
+
+  assign hash_stop_flag_d = (~sha_en_i || hash_go || hash_done_i) ? 1'b0 :
+                            hash_stop_i                           ? 1'b1 :
+                                                                    hash_stop_flag_q;
+
+  assign hash_process_flag_d = (~sha_en_i || hash_go || hash_done_i) ? 1'b0 :
                                hash_process_i                        ? 1'b1 :
-                                                                          hash_process_flag_q;
+                                                                       hash_process_flag_q;
 
   always_ff @(posedge clk_i or negedge rst_ni) begin
-    if (!rst_ni)  hash_process_flag_q <= 1'b0;
-    else          hash_process_flag_q <= hash_process_flag_d;
+    if (!rst_ni) begin
+      hash_stop_flag_q    <= 1'b0;
+      hash_process_flag_q <= 1'b0;
+    end else begin
+      hash_stop_flag_q    <= hash_stop_flag_d;
+      hash_process_flag_q <= hash_process_flag_d;
+    end
   end
 
   // data path: fout_wdata
@@ -206,8 +224,7 @@ module prim_sha2_pad import prim_sha2_pkg::*;
           shaf_rvalid_o = fifo_rvalid_i;
           inc_txcount   = shaf_rready_i;
           st_d = StFifoReceive;
-        end else if (((tx_count        == message_length_i) & MultimodeEn) ||
-                     ((tx_count [63:0] == message_length_i [63:0]) & !MultimodeEn)) begin
+        end else if (txcnt_eq_msg_len) begin
           // already received all msg and was waiting process flag
           shaf_rvalid_o = 1'b0;
           inc_txcount   = 1'b0;
@@ -219,6 +236,13 @@ module prim_sha2_pad import prim_sha2_pkg::*;
           inc_txcount   = shaf_rready_i; // 0 always
           st_d = StFifoReceive;
         end
+
+        if (txcnt_eq_msg_len && hash_stop_flag_q) begin
+          shaf_rvalid_o = 1'b0;
+          inc_txcount   = 1'b0;
+          fifo_rready_o = 1'b0;
+          st_d = StIdle;
+        end
       end
 
       StPad80: begin
@@ -341,16 +365,16 @@ module prim_sha2_pad import prim_sha2_pkg::*;
     else         tx_count <= tx_count_d;
   end
 
-  assign digest_mode_flag_d = hash_start_i ? digest_mode_i  :    // latch in configured mode
-                              hash_done_o  ? None           :    // clear
-                                             digest_mode_flag_q; // keep
+  assign digest_mode_flag_d = (hash_start_i || hash_continue_i) ? digest_mode_i  :    // set config
+                              hash_done_i                       ? SHA2_None      :    // clear
+                                                                  digest_mode_flag_q; // keep
 
   always_ff @(posedge clk_i or negedge rst_ni) begin
-    if (!rst_ni)  digest_mode_flag_q <= None;
+    if (!rst_ni)  digest_mode_flag_q <= SHA2_None;
     else          digest_mode_flag_q <= digest_mode_flag_d;
   end
 
   // State machine is in Idle only when it meets tx_count == message length
-  assign msg_feed_complete_o = hash_process_flag_q && (st_q == StIdle);
+  assign msg_feed_complete_o = (hash_process_flag_q || hash_stop_flag_q) && (st_q == StIdle);
 
 endmodule
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_sha2_pkg.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_sha2_pkg.sv
index 0f0afd22a6..1a30d278d1 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_sha2_pkg.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_sha2_pkg.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
@@ -26,13 +26,24 @@ package prim_sha2_pkg;
                                  // set to all-1 for word-aligned input
   } sha_fifo64_t;
 
-  typedef enum logic [1:0] {
-    None,
-    SHA2_256,
-    SHA2_384,
-    SHA2_512
+  // one-hot encoded
+  typedef enum logic [3:0] {
+    SHA2_256  = 4'b0001,
+    SHA2_384  = 4'b0010,
+    SHA2_512  = 4'b0100,
+    SHA2_None = 4'b1000
   } digest_mode_e;
 
+  // one-hot encoded
+  typedef enum logic [5:0] {
+    Key_128  = 6'b00_0001,
+    Key_256  = 6'b00_0010,
+    Key_384  = 6'b00_0100,
+    Key_512  = 6'b00_1000,
+    Key_1024 = 6'b01_0000,
+    Key_None = 6'b10_0000
+  } key_length_e;
+
   localparam sha_word32_t InitHash_256 [8]= '{
     32'h 6a09_e667, 32'h bb67_ae85, 32'h 3c6e_f372, 32'h a54f_f53a,
     32'h 510e_527f, 32'h 9b05_688c, 32'h 1f83_d9ab, 32'h 5be0_cd19
@@ -232,7 +243,8 @@ package prim_sha2_pkg;
     SwHashStartWhenShaDisabled = 32'h 0000_0002,
     SwUpdateSecretKeyInProcess = 32'h 0000_0003,
     SwHashStartWhenActive      = 32'h 0000_0004,
-    SwPushMsgWhenDisallowed    = 32'h 0000_0005
+    SwPushMsgWhenDisallowed    = 32'h 0000_0005,
+    SwInvalidConfig            = 32'h 0000_0006
   } err_code_e;
 
 endpackage : prim_sha2_pkg
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_slicer.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_slicer.sv
index 3c61669ef4..7b87ddd707 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_slicer.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_slicer.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
@@ -29,4 +29,3 @@ module prim_slicer #(
   `ASSERT_INIT(ValidWidth_A, InW <= OutW*(2**IndexW))
 
 endmodule
-
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_sparse_fsm_flop.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_sparse_fsm_flop.sv
index ca2599e36e..1e0126ec2d 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_sparse_fsm_flop.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_sparse_fsm_flop.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_sram_arbiter.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_sram_arbiter.sv
index e168dac8ae..d166179d57 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_sram_arbiter.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_sram_arbiter.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_subreg.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_subreg.sv
index 0210928b5e..44f01b9cbc 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_subreg.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_subreg.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_subreg_arb.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_subreg_arb.sv
index ba8a2821d8..32269cc8b7 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_subreg_arb.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_subreg_arb.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_subreg_ext.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_subreg_ext.sv
index 30a40c60cb..efb662cc17 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_subreg_ext.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_subreg_ext.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_subreg_pkg.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_subreg_pkg.sv
index 6e1da04364..633b919e9a 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_subreg_pkg.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_subreg_pkg.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_subreg_shadow.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_subreg_shadow.sv
index ede904770f..53206d0c64 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_subreg_shadow.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_subreg_shadow.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_subst_perm.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_subst_perm.sv
index e75e3d6f5f..7dd6bd078b 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_subst_perm.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_subst_perm.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_sum_tree.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_sum_tree.sv
index 2c8179ab4b..65cfc88f7c 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_sum_tree.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_sum_tree.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_sync_reqack.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_sync_reqack.sv
index 518546faed..4dc029d4e8 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_sync_reqack.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_sync_reqack.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
@@ -20,8 +20,8 @@
 //   - 1 source + 2 destination + 1 destination + 2 source clock cycles until the handshake is
 //     performed in the SRC domain.
 // - Optionally, the module can also use a return-to-zero (RZ), four-phase handshake protocol.
-//   That one has lower throughput, but it is safe to partially reset either side, since the
-//   two FSMs cannot get out of sync due to persisting EVEN/ODD states. The handshake latencies
+//   That one has lower throughput, but it is safe to reset either domain in isolation, since the
+//   two FSMs cannot get out of sync due to persistent EVEN/ODD states. The handshake latencies
 //   are the same as for the NRZ protocol, but the throughput is half that of the NRZ protocol
 //   since the signals neet to return to zero first, causing two round-trips through the
 //   synchronizers instead of just one.
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_sync_reqack_data.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_sync_reqack_data.sv
index c4ef5e3214..cab6a01e8b 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_sync_reqack_data.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_sync_reqack_data.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_sync_slow_fast.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_sync_slow_fast.sv
index 8bffa1d557..b1e06cdbfd 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_sync_slow_fast.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_sync_slow_fast.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_trivium.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_trivium.sv
index 0661480007..c648a31e5a 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_trivium.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_trivium.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_trivium_pkg.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_trivium_pkg.sv
index 317e0d440d..6f769f0c3f 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_trivium_pkg.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_trivium_pkg.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_util_get_scramble_params.svh b/vendor/lowrisc_ip/ip/prim/rtl/prim_util_get_scramble_params.svh
index e5e1860f1b..11245a8637 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_util_get_scramble_params.svh
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_util_get_scramble_params.svh
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_util_memload.svh b/vendor/lowrisc_ip/ip/prim/rtl/prim_util_memload.svh
index 7f8c6da920..81600a8de8 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_util_memload.svh
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_util_memload.svh
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_util_pkg.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_util_pkg.sv
index f5e3c92af5..cb30121cef 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_util_pkg.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_util_pkg.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_xoshiro256pp.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_xoshiro256pp.sv
index cb6d9538db..ed7cc1b5a8 100644
--- a/vendor/lowrisc_ip/ip/prim/rtl/prim_xoshiro256pp.sv
+++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_xoshiro256pp.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/util/prim_crc32_table_gen.py b/vendor/lowrisc_ip/ip/prim/util/prim_crc32_table_gen.py
index a978d44a31..955f469b35 100755
--- a/vendor/lowrisc_ip/ip/prim/util/prim_crc32_table_gen.py
+++ b/vendor/lowrisc_ip/ip/prim/util/prim_crc32_table_gen.py
@@ -1,5 +1,5 @@
 #!/usr/bin/env python3
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/util/primgen.py b/vendor/lowrisc_ip/ip/prim/util/primgen.py
index 8ea68270a4..3e3ba4123d 100755
--- a/vendor/lowrisc_ip/ip/prim/util/primgen.py
+++ b/vendor/lowrisc_ip/ip/prim/util/primgen.py
@@ -1,5 +1,5 @@
 #!/usr/bin/env python3
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/util/primgen/abstract_prim.sv.tpl b/vendor/lowrisc_ip/ip/prim/util/primgen/abstract_prim.sv.tpl
index 46f9911ee1..9b3432a3fe 100644
--- a/vendor/lowrisc_ip/ip/prim/util/primgen/abstract_prim.sv.tpl
+++ b/vendor/lowrisc_ip/ip/prim/util/primgen/abstract_prim.sv.tpl
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/util/primgen/prim_pkg.core.tpl b/vendor/lowrisc_ip/ip/prim/util/primgen/prim_pkg.core.tpl
index 4748315578..b51a34c5e0 100644
--- a/vendor/lowrisc_ip/ip/prim/util/primgen/prim_pkg.core.tpl
+++ b/vendor/lowrisc_ip/ip/prim/util/primgen/prim_pkg.core.tpl
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:prim_abstract:prim_pkg:0.1"
diff --git a/vendor/lowrisc_ip/ip/prim/util/primgen/prim_pkg.sv.tpl b/vendor/lowrisc_ip/ip/prim/util/primgen/prim_pkg.sv.tpl
index 7974e5ad88..def5d49625 100644
--- a/vendor/lowrisc_ip/ip/prim/util/primgen/prim_pkg.sv.tpl
+++ b/vendor/lowrisc_ip/ip/prim/util/primgen/prim_pkg.sv.tpl
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim/util/vendor/google_verible_verilog_syntax_py.lock.hjson b/vendor/lowrisc_ip/ip/prim/util/vendor/google_verible_verilog_syntax_py.lock.hjson
index dc471725b3..e215964e7e 100644
--- a/vendor/lowrisc_ip/ip/prim/util/vendor/google_verible_verilog_syntax_py.lock.hjson
+++ b/vendor/lowrisc_ip/ip/prim/util/vendor/google_verible_verilog_syntax_py.lock.hjson
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim/util/vendor/google_verible_verilog_syntax_py.vendor.hjson b/vendor/lowrisc_ip/ip/prim/util/vendor/google_verible_verilog_syntax_py.vendor.hjson
index 0aeafcabaf..db0b403b85 100644
--- a/vendor/lowrisc_ip/ip/prim/util/vendor/google_verible_verilog_syntax_py.vendor.hjson
+++ b/vendor/lowrisc_ip/ip/prim/util/vendor/google_verible_verilog_syntax_py.vendor.hjson
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 {
diff --git a/vendor/lowrisc_ip/ip/prim_generic/BUILD b/vendor/lowrisc_ip/ip/prim_generic/BUILD
index c87fb863cc..f42854cd1b 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/BUILD
+++ b/vendor/lowrisc_ip/ip/prim_generic/BUILD
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_clock_buf.vlt b/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_clock_buf.vlt
index 4408716d43..c61d4c6ea4 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_clock_buf.vlt
+++ b/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_clock_buf.vlt
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_clock_buf.waiver b/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_clock_buf.waiver
index aad9fb1546..89ab9b8ffb 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_clock_buf.waiver
+++ b/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_clock_buf.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_clock_div.waiver b/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_clock_div.waiver
index ada8d2b0e3..d748ccb33d 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_clock_div.waiver
+++ b/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_clock_div.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_clock_gating.vlt b/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_clock_gating.vlt
index c38cafc50b..2c6c5af87c 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_clock_gating.vlt
+++ b/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_clock_gating.vlt
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_clock_gating.waiver b/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_clock_gating.waiver
index 469cd42b81..1eb8561142 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_clock_gating.waiver
+++ b/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_clock_gating.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_clock_mux2.vlt b/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_clock_mux2.vlt
index b7a50c7da0..d62099a9af 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_clock_mux2.vlt
+++ b/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_clock_mux2.vlt
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_clock_mux2.waiver b/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_clock_mux2.waiver
index d69c7f74b5..42d76a8dfa 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_clock_mux2.waiver
+++ b/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_clock_mux2.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_flash.vlt b/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_flash.vlt
index 544a7b79b1..b8340b2085 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_flash.vlt
+++ b/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_flash.vlt
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_flash.waiver b/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_flash.waiver
index c9602d5967..d733a25619 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_flash.waiver
+++ b/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_flash.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_otp.vlt b/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_otp.vlt
index 9e469b8a04..3aa735e988 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_otp.vlt
+++ b/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_otp.vlt
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_otp.waiver b/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_otp.waiver
index c85cee67f0..c2313ab038 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_otp.waiver
+++ b/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_otp.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_pad_wrapper.vlt b/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_pad_wrapper.vlt
index 544a7b79b1..b8340b2085 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_pad_wrapper.vlt
+++ b/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_pad_wrapper.vlt
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_pad_wrapper.waiver b/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_pad_wrapper.waiver
index f044586339..e9e9acd1ab 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_pad_wrapper.waiver
+++ b/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_pad_wrapper.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_ram_1p.vlt b/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_ram_1p.vlt
index 544a7b79b1..b8340b2085 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_ram_1p.vlt
+++ b/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_ram_1p.vlt
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_ram_1p.waiver b/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_ram_1p.waiver
index 3a08d90bd3..997c72c77c 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_ram_1p.waiver
+++ b/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_ram_1p.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_ram_1r1w.vlt b/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_ram_1r1w.vlt
index 700355ae31..b0b7717ad0 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_ram_1r1w.vlt
+++ b/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_ram_1r1w.vlt
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_ram_1r1w.waiver b/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_ram_1r1w.waiver
index 0827cbed13..0a717f45d0 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_ram_1r1w.waiver
+++ b/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_ram_1r1w.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_ram_2p.vlt b/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_ram_2p.vlt
index 2654984e20..c2c00c8c1b 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_ram_2p.vlt
+++ b/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_ram_2p.vlt
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_ram_2p.waiver b/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_ram_2p.waiver
index 645745209b..69590e898d 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_ram_2p.waiver
+++ b/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_ram_2p.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_rom.vlt b/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_rom.vlt
index 544a7b79b1..b8340b2085 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_rom.vlt
+++ b/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_rom.vlt
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_rom.waiver b/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_rom.waiver
index 9d0ded359c..351694ba18 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_rom.waiver
+++ b/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_rom.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
@@ -6,4 +6,3 @@
 
 waive -rules NOT_DRIVEN  -location {prim_generic_rom.sv} -regexp {Signal 'mem' has no driver in module 'prim_generic_rom'} \
       -comment "since this is a ROM, the signal mem has no driver, but it is populated using an initialization file"
-
diff --git a/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_usb_diff_rx.waiver b/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_usb_diff_rx.waiver
index dfc8626939..3ae5442bbe 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_usb_diff_rx.waiver
+++ b/vendor/lowrisc_ip/ip/prim_generic/lint/prim_generic_usb_diff_rx.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim_generic/prim_generic_and2.core b/vendor/lowrisc_ip/ip/prim_generic/prim_generic_and2.core
index 2dbc79c445..35bf0a05b8 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/prim_generic_and2.core
+++ b/vendor/lowrisc_ip/ip/prim_generic/prim_generic_and2.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -15,15 +15,11 @@ filesets:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-    file_type: vlt
 
   files_ascentlint_waiver:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-    file_type: waiver
 
   files_veriblelint_waiver:
     depend:
diff --git a/vendor/lowrisc_ip/ip/prim_generic/prim_generic_buf.core b/vendor/lowrisc_ip/ip/prim_generic/prim_generic_buf.core
index 142bc8db40..1e9380006d 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/prim_generic_buf.core
+++ b/vendor/lowrisc_ip/ip/prim_generic/prim_generic_buf.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -15,15 +15,11 @@ filesets:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-    file_type: vlt
 
   files_ascentlint_waiver:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-    file_type: waiver
 
   files_veriblelint_waiver:
     depend:
diff --git a/vendor/lowrisc_ip/ip/prim_generic/prim_generic_clock_buf.core b/vendor/lowrisc_ip/ip/prim_generic/prim_generic_clock_buf.core
index 04f6ed9f1d..a0527957ea 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/prim_generic_clock_buf.core
+++ b/vendor/lowrisc_ip/ip/prim_generic/prim_generic_clock_buf.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim_generic/prim_generic_clock_div.core b/vendor/lowrisc_ip/ip/prim_generic/prim_generic_clock_div.core
index c5092645c8..806654072b 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/prim_generic_clock_div.core
+++ b/vendor/lowrisc_ip/ip/prim_generic/prim_generic_clock_div.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim_generic/prim_generic_clock_gating.core b/vendor/lowrisc_ip/ip/prim_generic/prim_generic_clock_gating.core
index d083e86777..c1e878180b 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/prim_generic_clock_gating.core
+++ b/vendor/lowrisc_ip/ip/prim_generic/prim_generic_clock_gating.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim_generic/prim_generic_clock_inv.core b/vendor/lowrisc_ip/ip/prim_generic/prim_generic_clock_inv.core
index 19920df87b..4f48b07a98 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/prim_generic_clock_inv.core
+++ b/vendor/lowrisc_ip/ip/prim_generic/prim_generic_clock_inv.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -18,17 +18,11 @@ filesets:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-      # - lint/prim_generic_clock_inv.vlt
-    file_type: vlt
 
   files_ascentlint_waiver:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-      # - lint/prim_generic_clock_inv.waiver
-    file_type: waiver
 
   files_veriblelint_waiver:
     depend:
diff --git a/vendor/lowrisc_ip/ip/prim_generic/prim_generic_clock_mux2.core b/vendor/lowrisc_ip/ip/prim_generic/prim_generic_clock_mux2.core
index 6e8ed693c1..f4f343d498 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/prim_generic_clock_mux2.core
+++ b/vendor/lowrisc_ip/ip/prim_generic/prim_generic_clock_mux2.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim_generic/prim_generic_flash.core b/vendor/lowrisc_ip/ip/prim_generic/prim_generic_flash.core
index 29afdf8f4d..736caad594 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/prim_generic_flash.core
+++ b/vendor/lowrisc_ip/ip/prim_generic/prim_generic_flash.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -12,7 +12,7 @@ filesets:
       - lowrisc:prim:ram_1p
       - "fileset_partner  ? (partner:systems:ast_pkg)"
       - "!fileset_partner ? (lowrisc:systems:ast_pkg)"
-      - lowrisc:ip:flash_ctrl_pkg
+      - lowrisc:ip_interfaces:flash_ctrl_pkg
       - lowrisc:ip:flash_ctrl_prim_reg_top
     files:
       - rtl/prim_generic_flash_bank.sv
diff --git a/vendor/lowrisc_ip/ip/prim_generic/prim_generic_flop.core b/vendor/lowrisc_ip/ip/prim_generic/prim_generic_flop.core
index 6209a7bcd7..c66701bc1a 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/prim_generic_flop.core
+++ b/vendor/lowrisc_ip/ip/prim_generic/prim_generic_flop.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -15,15 +15,11 @@ filesets:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-    file_type: vlt
 
   files_ascentlint_waiver:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-    file_type: waiver
 
   files_veriblelint_waiver:
     depend:
diff --git a/vendor/lowrisc_ip/ip/prim_generic/prim_generic_flop_en.core b/vendor/lowrisc_ip/ip/prim_generic/prim_generic_flop_en.core
index 275e2a8dd9..8e39916ee5 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/prim_generic_flop_en.core
+++ b/vendor/lowrisc_ip/ip/prim_generic/prim_generic_flop_en.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -17,15 +17,11 @@ filesets:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-    file_type: vlt
 
   files_ascentlint_waiver:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-    file_type: waiver
 
   files_veriblelint_waiver:
     depend:
diff --git a/vendor/lowrisc_ip/ip/prim_generic/prim_generic_otp.core b/vendor/lowrisc_ip/ip/prim_generic/prim_generic_otp.core
index 7c548275ad..db270f0743 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/prim_generic_otp.core
+++ b/vendor/lowrisc_ip/ip/prim_generic/prim_generic_otp.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -11,7 +11,8 @@ filesets:
       - lowrisc:prim:all
       - lowrisc:prim:util
       - lowrisc:prim:ram_1p_adv
-      - lowrisc:systems:ast_pkg
+      - "fileset_partner  ? (partner:systems:ast_pkg)"
+      - "!fileset_partner ? (lowrisc:systems:ast_pkg)"
       - lowrisc:prim:otp_pkg
       - lowrisc:ip:otp_ctrl_prim_reg_top
     files:
diff --git a/vendor/lowrisc_ip/ip/prim_generic/prim_generic_pad_attr.core b/vendor/lowrisc_ip/ip/prim_generic/prim_generic_pad_attr.core
index 1cf1eaf28c..0629996c26 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/prim_generic_pad_attr.core
+++ b/vendor/lowrisc_ip/ip/prim_generic/prim_generic_pad_attr.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -18,17 +18,11 @@ filesets:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-      #- lint/prim_generic_pad_attr.vlt
-    file_type: vlt
 
   files_ascentlint_waiver:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-      #- lint/prim_generic_pad_attr.waiver
-    file_type: waiver
 
   files_veriblelint_waiver:
     depend:
diff --git a/vendor/lowrisc_ip/ip/prim_generic/prim_generic_pad_wrapper.core b/vendor/lowrisc_ip/ip/prim_generic/prim_generic_pad_wrapper.core
index 3a374820cd..ab7f0a1c73 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/prim_generic_pad_wrapper.core
+++ b/vendor/lowrisc_ip/ip/prim_generic/prim_generic_pad_wrapper.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim_generic/prim_generic_ram_1p.core b/vendor/lowrisc_ip/ip/prim_generic/prim_generic_ram_1p.core
index 1be782c947..ea3848b121 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/prim_generic_ram_1p.core
+++ b/vendor/lowrisc_ip/ip/prim_generic/prim_generic_ram_1p.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim_generic/prim_generic_ram_1r1w.core b/vendor/lowrisc_ip/ip/prim_generic/prim_generic_ram_1r1w.core
index 1aded35855..2cc6529619 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/prim_generic_ram_1r1w.core
+++ b/vendor/lowrisc_ip/ip/prim_generic/prim_generic_ram_1r1w.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim_generic/prim_generic_ram_2p.core b/vendor/lowrisc_ip/ip/prim_generic/prim_generic_ram_2p.core
index 065962b5b7..13c411459d 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/prim_generic_ram_2p.core
+++ b/vendor/lowrisc_ip/ip/prim_generic/prim_generic_ram_2p.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim_generic/prim_generic_rom.core b/vendor/lowrisc_ip/ip/prim_generic/prim_generic_rom.core
index a8821e2eab..5bf3b6ce38 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/prim_generic_rom.core
+++ b/vendor/lowrisc_ip/ip/prim_generic/prim_generic_rom.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim_generic/prim_generic_usb_diff_rx.core b/vendor/lowrisc_ip/ip/prim_generic/prim_generic_usb_diff_rx.core
index a633b676dd..d1c34a6a04 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/prim_generic_usb_diff_rx.core
+++ b/vendor/lowrisc_ip/ip/prim_generic/prim_generic_usb_diff_rx.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -15,9 +15,6 @@ filesets:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-      #- lint/prim_generic_usb_diff_rx.vlt
-    file_type: vlt
 
   files_ascentlint_waiver:
     depend:
diff --git a/vendor/lowrisc_ip/ip/prim_generic/prim_generic_xnor2.core b/vendor/lowrisc_ip/ip/prim_generic/prim_generic_xnor2.core
index f7a9b25954..24e3a125e3 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/prim_generic_xnor2.core
+++ b/vendor/lowrisc_ip/ip/prim_generic/prim_generic_xnor2.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -15,15 +15,11 @@ filesets:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-    file_type: vlt
 
   files_ascentlint_waiver:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-    file_type: waiver
 
   files_veriblelint_waiver:
     depend:
diff --git a/vendor/lowrisc_ip/ip/prim_generic/prim_generic_xor2.core b/vendor/lowrisc_ip/ip/prim_generic/prim_generic_xor2.core
index 3fa56ce374..e3cf88c20c 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/prim_generic_xor2.core
+++ b/vendor/lowrisc_ip/ip/prim_generic/prim_generic_xor2.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -15,15 +15,11 @@ filesets:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-    file_type: vlt
 
   files_ascentlint_waiver:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-    file_type: waiver
 
   files_veriblelint_waiver:
     depend:
diff --git a/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_and2.sv b/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_and2.sv
index 0b62bef2a4..df1b65fa3b 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_and2.sv
+++ b/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_and2.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_buf.sv b/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_buf.sv
index 1b2fbffad4..ede99f1d64 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_buf.sv
+++ b/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_buf.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_clock_buf.sv b/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_clock_buf.sv
index a0e841ada4..d660aab686 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_clock_buf.sv
+++ b/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_clock_buf.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_clock_div.sv b/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_clock_div.sv
index c092856505..798aa35ec0 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_clock_div.sv
+++ b/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_clock_div.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_clock_gating.sv b/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_clock_gating.sv
index d4b64568bf..6f80f6e89b 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_clock_gating.sv
+++ b/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_clock_gating.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_clock_inv.sv b/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_clock_inv.sv
index 31a439cff1..2f56d3287f 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_clock_inv.sv
+++ b/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_clock_inv.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_clock_mux2.sv b/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_clock_mux2.sv
index 143597da5a..85418e0da2 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_clock_mux2.sv
+++ b/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_clock_mux2.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_flash.sv b/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_flash.sv
index df0dea3705..2349dd8f2e 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_flash.sv
+++ b/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_flash.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_flash_bank.sv b/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_flash_bank.sv
index b6e0d8b045..566a2e8fa2 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_flash_bank.sv
+++ b/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_flash_bank.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_flop.sv b/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_flop.sv
index 67b6e89067..426b44e042 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_flop.sv
+++ b/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_flop.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_flop_en.sv b/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_flop_en.sv
index 3c367b7358..94ca795fca 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_flop_en.sv
+++ b/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_flop_en.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_otp.sv b/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_otp.sv
index d27f03e9bb..5fe826d660 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_otp.sv
+++ b/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_otp.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
@@ -54,7 +54,7 @@ module prim_generic_otp
   input                          valid_i,
   // #(Native words)-1, e.g. size == 0 for 1 native word.
   input [SizeWidth-1:0]          size_i,
-  // 000: read, 001: write, 010: read raw, 011: write raw, 111: init
+  // See prim_otp_pkg for the command encoding.
   input  cmd_e                   cmd_i,
   input [AddrWidth-1:0]          addr_i,
   input [IfWidth-1:0]            wdata_i,
@@ -382,7 +382,8 @@ module prim_generic_otp
     .rdata_o  ( rdata_ecc              ),
     .rvalid_o ( rvalid                 ),
     .rerror_o (                        ),
-    .cfg_i    ( '0                     )
+    .cfg_i    ( '0                     ),
+    .alert_o  (                        )
   );
 
   // Currently it is assumed that no wrap arounds can occur.
diff --git a/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_pad_attr.sv b/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_pad_attr.sv
index 1dcfae51a3..80e93f82bc 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_pad_attr.sv
+++ b/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_pad_attr.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
@@ -19,6 +19,7 @@ module prim_generic_pad_attr
   //
   // - inversion
   // - pullup / pulldown
+  // - input disable
   //
   // Bidirectional:
   //
@@ -26,6 +27,7 @@ module prim_generic_pad_attr
   // - virtual open drain
   // - pullup / pulldown
   // - 1 driving strength bit
+  // - input disable
   //
   // Note that the last three attributes are not supported on Verilator.
   if (PadType == InputStd) begin : gen_input_only_warl
@@ -34,6 +36,7 @@ module prim_generic_pad_attr
       attr_warl_o.invert = 1'b1;
       attr_warl_o.pull_en = 1'b1;
       attr_warl_o.pull_select = 1'b1;
+      attr_warl_o.input_disable = 1'b1;
     end
   end else if (PadType == BidirStd ||
                PadType == BidirTol ||
@@ -50,12 +53,14 @@ module prim_generic_pad_attr
       // Only one driving strength bit is supported.
       attr_warl_o.drive_strength[0] = 1'b1;
   `endif
+      attr_warl_o.input_disable = 1'b1;
     end
   end else if (PadType == AnalogIn0) begin : gen_analog0_warl
     // The analog pad type is basically just a feedthrough,
-    // and does hence not support any of the attributes.
+    // and hence only supports input disable.
     always_comb begin : p_attr
       attr_warl_o = '0;
+      attr_warl_o.input_disable = 1'b1;
     end
   end else begin : gen_invalid_config
     // this should throw link warnings in elaboration
diff --git a/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_pad_wrapper.sv b/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_pad_wrapper.sv
index e7da276054..7ff382c302 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_pad_wrapper.sv
+++ b/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_pad_wrapper.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
@@ -46,6 +46,10 @@ module prim_generic_pad_wrapper
   //VCS coverage on
   // pragma coverage on
 
+  // Input enable (active-high)
+  logic ie;
+  assign ie = ie_i & ~attr_i.input_disable;
+
   if (PadType == InputStd) begin : gen_input_only
     //VCS coverage off
     // pragma coverage off
@@ -57,7 +61,7 @@ module prim_generic_pad_wrapper
     //VCS coverage on
     // pragma coverage on
 
-    assign in_raw_o = (ie_i) ? inout_io  : 1'bz;
+    assign in_raw_o = ie ? inout_io : 1'bz;
     // input inversion
     assign in_o = attr_i.invert ^ in_raw_o;
 
@@ -71,7 +75,7 @@ module prim_generic_pad_wrapper
                PadType == BidirOd ||
                PadType == BidirStd) begin : gen_bidir
 
-    assign in_raw_o = (ie_i) ? inout_io  : 1'bz;
+    assign in_raw_o = ie ? inout_io : 1'bz;
     // input inversion
     assign in_o = attr_i.invert ^ in_raw_o;
 
@@ -95,13 +99,20 @@ module prim_generic_pad_wrapper
     //VCS coverage off
     // pragma coverage off
     logic unused_ana_sigs;
-    assign unused_ana_sigs = ^{attr_i, out_i, oe_i, ie_i};
+    assign unused_ana_sigs = ^{attr_i.invert,
+                               attr_i.virt_od_en,
+                               attr_i.drive_strength[0],
+                               attr_i.pull_en,
+                               attr_i.pull_select,
+                               out_i,
+                               oe_i,
+                               ie_i};
     //VCS coverage on
     // pragma coverage on
 
     assign inout_io = 1'bz; // explicitly make this tristate to avoid lint errors.
-    assign in_o = inout_io;
-    assign in_raw_o = inout_io;
+    assign in_raw_o = ie ? inout_io : 1'bz;
+    assign in_o = in_raw_o;
 
   end else begin : gen_invalid_config
     // this should throw link warnings in elaboration
diff --git a/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_ram_1p.sv b/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_ram_1p.sv
index 8d84e636f4..d2e835ac33 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_ram_1p.sv
+++ b/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_ram_1p.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_ram_1r1w.sv b/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_ram_1r1w.sv
index 396d506db5..aafecf8adb 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_ram_1r1w.sv
+++ b/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_ram_1r1w.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_ram_2p.sv b/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_ram_2p.sv
index 6e1ebdb57e..f44e828bfb 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_ram_2p.sv
+++ b/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_ram_2p.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_rom.sv b/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_rom.sv
index 98d02a966f..acf5f379ca 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_rom.sv
+++ b/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_rom.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_usb_diff_rx.sv b/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_usb_diff_rx.sv
index b94d39cdc2..a0b8e19c87 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_usb_diff_rx.sv
+++ b/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_usb_diff_rx.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_xnor2.sv b/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_xnor2.sv
index 1020f837db..90eb684d2f 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_xnor2.sv
+++ b/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_xnor2.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_xor2.sv b/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_xor2.sv
index 8282e8b449..4f303c7730 100644
--- a/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_xor2.sv
+++ b/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_xor2.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim_xilinx/BUILD b/vendor/lowrisc_ip/ip/prim_xilinx/BUILD
index c87fb863cc..f42854cd1b 100644
--- a/vendor/lowrisc_ip/ip/prim_xilinx/BUILD
+++ b/vendor/lowrisc_ip/ip/prim_xilinx/BUILD
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim_xilinx/lint/prim_xilinx_clock_buf.vlt b/vendor/lowrisc_ip/ip/prim_xilinx/lint/prim_xilinx_clock_buf.vlt
index 544a7b79b1..b8340b2085 100644
--- a/vendor/lowrisc_ip/ip/prim_xilinx/lint/prim_xilinx_clock_buf.vlt
+++ b/vendor/lowrisc_ip/ip/prim_xilinx/lint/prim_xilinx_clock_buf.vlt
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim_xilinx/lint/prim_xilinx_clock_buf.waiver b/vendor/lowrisc_ip/ip/prim_xilinx/lint/prim_xilinx_clock_buf.waiver
index af90009c05..1e11afb4e8 100644
--- a/vendor/lowrisc_ip/ip/prim_xilinx/lint/prim_xilinx_clock_buf.waiver
+++ b/vendor/lowrisc_ip/ip/prim_xilinx/lint/prim_xilinx_clock_buf.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim_xilinx/lint/prim_xilinx_clock_gating.vlt b/vendor/lowrisc_ip/ip/prim_xilinx/lint/prim_xilinx_clock_gating.vlt
index 544a7b79b1..b8340b2085 100644
--- a/vendor/lowrisc_ip/ip/prim_xilinx/lint/prim_xilinx_clock_gating.vlt
+++ b/vendor/lowrisc_ip/ip/prim_xilinx/lint/prim_xilinx_clock_gating.vlt
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim_xilinx/lint/prim_xilinx_clock_gating.waiver b/vendor/lowrisc_ip/ip/prim_xilinx/lint/prim_xilinx_clock_gating.waiver
index af90009c05..1e11afb4e8 100644
--- a/vendor/lowrisc_ip/ip/prim_xilinx/lint/prim_xilinx_clock_gating.waiver
+++ b/vendor/lowrisc_ip/ip/prim_xilinx/lint/prim_xilinx_clock_gating.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim_xilinx/lint/prim_xilinx_clock_mux2.vlt b/vendor/lowrisc_ip/ip/prim_xilinx/lint/prim_xilinx_clock_mux2.vlt
index 544a7b79b1..b8340b2085 100644
--- a/vendor/lowrisc_ip/ip/prim_xilinx/lint/prim_xilinx_clock_mux2.vlt
+++ b/vendor/lowrisc_ip/ip/prim_xilinx/lint/prim_xilinx_clock_mux2.vlt
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim_xilinx/lint/prim_xilinx_clock_mux2.waiver b/vendor/lowrisc_ip/ip/prim_xilinx/lint/prim_xilinx_clock_mux2.waiver
index af90009c05..1e11afb4e8 100644
--- a/vendor/lowrisc_ip/ip/prim_xilinx/lint/prim_xilinx_clock_mux2.waiver
+++ b/vendor/lowrisc_ip/ip/prim_xilinx/lint/prim_xilinx_clock_mux2.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim_xilinx/lint/prim_xilinx_pad_wrapper.vlt b/vendor/lowrisc_ip/ip/prim_xilinx/lint/prim_xilinx_pad_wrapper.vlt
index 544a7b79b1..b8340b2085 100644
--- a/vendor/lowrisc_ip/ip/prim_xilinx/lint/prim_xilinx_pad_wrapper.vlt
+++ b/vendor/lowrisc_ip/ip/prim_xilinx/lint/prim_xilinx_pad_wrapper.vlt
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/ip/prim_xilinx/lint/prim_xilinx_pad_wrapper.waiver b/vendor/lowrisc_ip/ip/prim_xilinx/lint/prim_xilinx_pad_wrapper.waiver
index 95afe1398f..198eeeace1 100644
--- a/vendor/lowrisc_ip/ip/prim_xilinx/lint/prim_xilinx_pad_wrapper.waiver
+++ b/vendor/lowrisc_ip/ip/prim_xilinx/lint/prim_xilinx_pad_wrapper.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/ip/prim_xilinx/prim_xilinx_and2.core b/vendor/lowrisc_ip/ip/prim_xilinx/prim_xilinx_and2.core
index b4ad3c0241..9c86c83f4e 100644
--- a/vendor/lowrisc_ip/ip/prim_xilinx/prim_xilinx_and2.core
+++ b/vendor/lowrisc_ip/ip/prim_xilinx/prim_xilinx_and2.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -15,14 +15,12 @@ filesets:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
     file_type: vlt
 
   files_ascentlint_waiver:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
     file_type: waiver
 
   files_veriblelint_waiver:
diff --git a/vendor/lowrisc_ip/ip/prim_xilinx/prim_xilinx_buf.core b/vendor/lowrisc_ip/ip/prim_xilinx/prim_xilinx_buf.core
index d1e247978d..bc4e7a2e26 100644
--- a/vendor/lowrisc_ip/ip/prim_xilinx/prim_xilinx_buf.core
+++ b/vendor/lowrisc_ip/ip/prim_xilinx/prim_xilinx_buf.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim_xilinx/prim_xilinx_clock_buf.core b/vendor/lowrisc_ip/ip/prim_xilinx/prim_xilinx_clock_buf.core
index 7bd93e2570..f1bfbe8f12 100644
--- a/vendor/lowrisc_ip/ip/prim_xilinx/prim_xilinx_clock_buf.core
+++ b/vendor/lowrisc_ip/ip/prim_xilinx/prim_xilinx_clock_buf.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim_xilinx/prim_xilinx_clock_gating.core b/vendor/lowrisc_ip/ip/prim_xilinx/prim_xilinx_clock_gating.core
index 1e1064fb90..587c7e5a35 100644
--- a/vendor/lowrisc_ip/ip/prim_xilinx/prim_xilinx_clock_gating.core
+++ b/vendor/lowrisc_ip/ip/prim_xilinx/prim_xilinx_clock_gating.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim_xilinx/prim_xilinx_clock_mux2.core b/vendor/lowrisc_ip/ip/prim_xilinx/prim_xilinx_clock_mux2.core
index 0ea81cc971..5d94cd0c71 100644
--- a/vendor/lowrisc_ip/ip/prim_xilinx/prim_xilinx_clock_mux2.core
+++ b/vendor/lowrisc_ip/ip/prim_xilinx/prim_xilinx_clock_mux2.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim_xilinx/prim_xilinx_flop.core b/vendor/lowrisc_ip/ip/prim_xilinx/prim_xilinx_flop.core
index 0e4ed2b641..b94d12c75e 100644
--- a/vendor/lowrisc_ip/ip/prim_xilinx/prim_xilinx_flop.core
+++ b/vendor/lowrisc_ip/ip/prim_xilinx/prim_xilinx_flop.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -15,15 +15,11 @@ filesets:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-    file_type: vlt
 
   files_ascentlint_waiver:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-    file_type: waiver
 
   files_veriblelint_waiver:
     depend:
diff --git a/vendor/lowrisc_ip/ip/prim_xilinx/prim_xilinx_flop_en.core b/vendor/lowrisc_ip/ip/prim_xilinx/prim_xilinx_flop_en.core
index fef8cd603d..e40394b832 100644
--- a/vendor/lowrisc_ip/ip/prim_xilinx/prim_xilinx_flop_en.core
+++ b/vendor/lowrisc_ip/ip/prim_xilinx/prim_xilinx_flop_en.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -15,15 +15,11 @@ filesets:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-    file_type: vlt
 
   files_ascentlint_waiver:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-    file_type: waiver
 
   files_veriblelint_waiver:
     depend:
diff --git a/vendor/lowrisc_ip/ip/prim_xilinx/prim_xilinx_pad_attr.core b/vendor/lowrisc_ip/ip/prim_xilinx/prim_xilinx_pad_attr.core
index 076c1cd087..6c1031337b 100644
--- a/vendor/lowrisc_ip/ip/prim_xilinx/prim_xilinx_pad_attr.core
+++ b/vendor/lowrisc_ip/ip/prim_xilinx/prim_xilinx_pad_attr.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -18,17 +18,11 @@ filesets:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-      #- lint/prim_xilinx_pad_attr.vlt
-    file_type: vlt
 
   files_ascentlint_waiver:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-      #- lint/prim_xilinx_pad_attr.waiver
-    file_type: waiver
 
   files_veriblelint_waiver:
     depend:
diff --git a/vendor/lowrisc_ip/ip/prim_xilinx/prim_xilinx_pad_wrapper.core b/vendor/lowrisc_ip/ip/prim_xilinx/prim_xilinx_pad_wrapper.core
index eb0cc5ec22..765845a0bc 100644
--- a/vendor/lowrisc_ip/ip/prim_xilinx/prim_xilinx_pad_wrapper.core
+++ b/vendor/lowrisc_ip/ip/prim_xilinx/prim_xilinx_pad_wrapper.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim_xilinx/prim_xilinx_xor2.core b/vendor/lowrisc_ip/ip/prim_xilinx/prim_xilinx_xor2.core
index ff3fc7d956..e7f699cf84 100644
--- a/vendor/lowrisc_ip/ip/prim_xilinx/prim_xilinx_xor2.core
+++ b/vendor/lowrisc_ip/ip/prim_xilinx/prim_xilinx_xor2.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -15,15 +15,11 @@ filesets:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-    file_type: vlt
 
   files_ascentlint_waiver:
     depend:
       # common waivers
       - lowrisc:lint:common
-    files:
-    file_type: waiver
 
   files_veriblelint_waiver:
     depend:
diff --git a/vendor/lowrisc_ip/ip/prim_xilinx/rtl/prim_xilinx_and2.sv b/vendor/lowrisc_ip/ip/prim_xilinx/rtl/prim_xilinx_and2.sv
index 978aecccf5..69d8683612 100644
--- a/vendor/lowrisc_ip/ip/prim_xilinx/rtl/prim_xilinx_and2.sv
+++ b/vendor/lowrisc_ip/ip/prim_xilinx/rtl/prim_xilinx_and2.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim_xilinx/rtl/prim_xilinx_buf.sv b/vendor/lowrisc_ip/ip/prim_xilinx/rtl/prim_xilinx_buf.sv
index 2e3915a508..7bdeea9cb7 100644
--- a/vendor/lowrisc_ip/ip/prim_xilinx/rtl/prim_xilinx_buf.sv
+++ b/vendor/lowrisc_ip/ip/prim_xilinx/rtl/prim_xilinx_buf.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim_xilinx/rtl/prim_xilinx_clock_buf.sv b/vendor/lowrisc_ip/ip/prim_xilinx/rtl/prim_xilinx_clock_buf.sv
index 8d6f4a31a3..51945f4402 100644
--- a/vendor/lowrisc_ip/ip/prim_xilinx/rtl/prim_xilinx_clock_buf.sv
+++ b/vendor/lowrisc_ip/ip/prim_xilinx/rtl/prim_xilinx_clock_buf.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim_xilinx/rtl/prim_xilinx_clock_gating.sv b/vendor/lowrisc_ip/ip/prim_xilinx/rtl/prim_xilinx_clock_gating.sv
index 501db88d56..7eaac02a07 100644
--- a/vendor/lowrisc_ip/ip/prim_xilinx/rtl/prim_xilinx_clock_gating.sv
+++ b/vendor/lowrisc_ip/ip/prim_xilinx/rtl/prim_xilinx_clock_gating.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim_xilinx/rtl/prim_xilinx_clock_mux2.sv b/vendor/lowrisc_ip/ip/prim_xilinx/rtl/prim_xilinx_clock_mux2.sv
index 3e43f57241..ee7390d9c2 100644
--- a/vendor/lowrisc_ip/ip/prim_xilinx/rtl/prim_xilinx_clock_mux2.sv
+++ b/vendor/lowrisc_ip/ip/prim_xilinx/rtl/prim_xilinx_clock_mux2.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim_xilinx/rtl/prim_xilinx_flop.sv b/vendor/lowrisc_ip/ip/prim_xilinx/rtl/prim_xilinx_flop.sv
index 7ce6adfaa0..45deeadeec 100644
--- a/vendor/lowrisc_ip/ip/prim_xilinx/rtl/prim_xilinx_flop.sv
+++ b/vendor/lowrisc_ip/ip/prim_xilinx/rtl/prim_xilinx_flop.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim_xilinx/rtl/prim_xilinx_flop_en.sv b/vendor/lowrisc_ip/ip/prim_xilinx/rtl/prim_xilinx_flop_en.sv
index 50d9757538..c4de058a91 100644
--- a/vendor/lowrisc_ip/ip/prim_xilinx/rtl/prim_xilinx_flop_en.sv
+++ b/vendor/lowrisc_ip/ip/prim_xilinx/rtl/prim_xilinx_flop_en.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/ip/prim_xilinx/rtl/prim_xilinx_pad_attr.sv b/vendor/lowrisc_ip/ip/prim_xilinx/rtl/prim_xilinx_pad_attr.sv
index 2b4db6a53f..7267465e8c 100644
--- a/vendor/lowrisc_ip/ip/prim_xilinx/rtl/prim_xilinx_pad_attr.sv
+++ b/vendor/lowrisc_ip/ip/prim_xilinx/rtl/prim_xilinx_pad_attr.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
@@ -19,16 +19,19 @@ module prim_xilinx_pad_attr
   // Input-only:
   //
   // - inversion
+  // - input disable
   //
   // Bidirectional:
   //
   // - inversion
   // - virtual open drain
+  // - input disable
   //
   if (PadType == InputStd) begin : gen_input_only_warl
     always_comb begin : p_attr
       attr_warl_o = '0;
       attr_warl_o.invert = 1'b1;
+      attr_warl_o.input_disable = 1'b1;
     end
   end else if (PadType == BidirStd ||
                PadType == BidirTol ||
@@ -37,12 +40,14 @@ module prim_xilinx_pad_attr
       attr_warl_o = '0;
       attr_warl_o.invert = 1'b1;
       attr_warl_o.virt_od_en = 1'b1;
+      attr_warl_o.input_disable = 1'b1;
     end
   end else if (PadType == AnalogIn0) begin : gen_analog0_warl
     // The analog pad type is basically just a feedthrough,
-    // and does hence not support any of the attributes.
+    // and hence only supports input disable.
     always_comb begin : p_attr
       attr_warl_o = '0;
+      attr_warl_o.input_disable = 1'b1;
     end
   end else begin : gen_invalid_config
     // this should throw link warnings in elaboration
diff --git a/vendor/lowrisc_ip/ip/prim_xilinx/rtl/prim_xilinx_pad_wrapper.sv b/vendor/lowrisc_ip/ip/prim_xilinx/rtl/prim_xilinx_pad_wrapper.sv
index 571e394cd0..afb9c1794e 100644
--- a/vendor/lowrisc_ip/ip/prim_xilinx/rtl/prim_xilinx_pad_wrapper.sv
+++ b/vendor/lowrisc_ip/ip/prim_xilinx/rtl/prim_xilinx_pad_wrapper.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
@@ -44,6 +44,9 @@ module prim_xilinx_pad_wrapper
                          scanmode_i,
                          pok_i};
 
+  // Input enable (active-high)
+  logic ie;
+  assign ie = ie_i & ~attr_i.input_disable;
 
   if (PadType == InputStd) begin : gen_input_only
     logic unused_sigs;
@@ -51,25 +54,26 @@ module prim_xilinx_pad_wrapper
                            oe_i,
                            attr_i.virt_od_en};
 
-    // input inversion
+    // Input buffer with input disable
+    // 7 Series devices feature the `IBUF_IBUFDISABLE` primitive that can disable the input path
+    // through the input buffer.  However, that primitive is not supported for the IOSTANDARDs we
+    // use (LVCMOS18 and LVCMOS33), so the logic below instead emulates its behavior (the disabled
+    // input gets internally driven to 1) without really disabling the input driver.
     logic in;
-    assign in_raw_o = (ie_i) ? in  : 1'bz;
-    assign in_o = attr_i.invert ^ in_raw_o;
-
     IBUF u_ibuf (
       .I ( inout_io ),
       .O ( in       )
     );
+    assign in_raw_o = ie ? in : 1'b1;
+
+    // Input inversion
+    assign in_o = attr_i.invert ^ in_raw_o;
+
   end else if (PadType == BidirTol ||
                PadType == DualBidirTol ||
                PadType == BidirOd ||
                PadType == BidirStd) begin : gen_bidir
 
-    // input inversion
-    logic in;
-    assign in_raw_o = (ie_i) ? in  : 1'bz;
-    assign in_o = attr_i.invert ^ in_raw_o;
-
     // virtual open drain emulation
     logic oe_n, out;
     assign out      = out_i ^ attr_i.invert;
@@ -77,12 +81,24 @@ module prim_xilinx_pad_wrapper
     // oe_n = 1: disable driver
     assign oe_n     = ~oe_i | (out & attr_i.virt_od_en);
 
+    // Input buffer with input disable
+    // TODO(#23094): This should be implemented with an instance of `IOBUF_DCIEN` (for pads in
+    // high-performance banks) or `IOBUF_INTERMDISABLE` (for pads in high-range banks).  This module
+    // currently doesn't know which bank the pad is in, so the logic below instead emulates this
+    // behavior (disabled inputs get internally driven to 1 for 7 Series devices) without really
+    // disabling the input driver.
+    logic in;
     IOBUF u_iobuf (
       .T  ( oe_n     ),
       .I  ( out      ),
       .O  ( in       ),
       .IO ( inout_io )
     );
+    assign in_raw_o = ie ? in : 1'b1;
+
+    // Input inversion
+    assign in_o = attr_i.invert ^ in_raw_o;
+
   end else if (PadType == AnalogIn0 || PadType == AnalogIn1) begin : gen_analog
 
     logic unused_sigs;
@@ -90,13 +106,16 @@ module prim_xilinx_pad_wrapper
                            oe_i,
                            attr_i.invert,
                            attr_i.virt_od_en};
-    // this is currently modeled as a logic feed through.
+
+    // Input buffer with input disable
+    // Input disable emulated in logic due to the limitations documented under `gen_input_only`.
+    logic in;
     IBUF u_ibuf (
       .I ( inout_io ),
-      .O ( in_raw_o )
+      .O ( in       )
     );
-
-    assign in_raw_o = inout_io;
+    assign in_raw_o = ie ? in : 1'b1;
+    assign in_o = in_raw_o;
 
   end else begin : gen_invalid_config
     // this should throw link warnings in elaboration
diff --git a/vendor/lowrisc_ip/ip/prim_xilinx/rtl/prim_xilinx_xor2.sv b/vendor/lowrisc_ip/ip/prim_xilinx/rtl/prim_xilinx_xor2.sv
index b882f65fb5..0eb9c14235 100644
--- a/vendor/lowrisc_ip/ip/prim_xilinx/rtl/prim_xilinx_xor2.sv
+++ b/vendor/lowrisc_ip/ip/prim_xilinx/rtl/prim_xilinx_xor2.sv
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/lint/common.core b/vendor/lowrisc_ip/lint/common.core
index 4bcd8f3c32..20338eaf11 100644
--- a/vendor/lowrisc_ip/lint/common.core
+++ b/vendor/lowrisc_ip/lint/common.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:lint:common:0.1"
diff --git a/vendor/lowrisc_ip/lint/comportable.core b/vendor/lowrisc_ip/lint/comportable.core
index f74083e80e..851b6c1781 100644
--- a/vendor/lowrisc_ip/lint/comportable.core
+++ b/vendor/lowrisc_ip/lint/comportable.core
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:lint:comportable:0.1"
@@ -20,5 +20,3 @@ targets:
     filesets:
       - tool_verilator  ? (files_verilator_waiver)
       - tool_ascentlint ? (files_ascentlint_waiver)
-
-
diff --git a/vendor/lowrisc_ip/lint/tools/ascentlint/ascentlint-config.tcl b/vendor/lowrisc_ip/lint/tools/ascentlint/ascentlint-config.tcl
index a4113b0a7b..d82ed9ab89 100644
--- a/vendor/lowrisc_ip/lint/tools/ascentlint/ascentlint-config.tcl
+++ b/vendor/lowrisc_ip/lint/tools/ascentlint/ascentlint-config.tcl
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -15,5 +15,4 @@ set ri_max_single_range_bits 32768
 
 # Increase the maximum loop to 3200 (KmacStateW X 2)
 # this is a temporary fix for non-ASCII character in AscentLint log
-set ri_max_loop_unroll 3200 
-
+set ri_max_loop_unroll 3200
diff --git a/vendor/lowrisc_ip/lint/tools/ascentlint/common.waiver b/vendor/lowrisc_ip/lint/tools/ascentlint/common.waiver
index f254de2bb8..6c96394969 100644
--- a/vendor/lowrisc_ip/lint/tools/ascentlint/common.waiver
+++ b/vendor/lowrisc_ip/lint/tools/ascentlint/common.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
@@ -9,5 +9,3 @@
 waive -rules {HIER_NET_NOT_READ HIER_BRANCH_NOT_READ} -regexp {unused_.*}
 waive -rules {HIER_NET_NOT_READ HIER_BRANCH_NOT_READ} -regexp {gen_.*\.unused_.*}
 waive -rules {ONE_BRANCH} -regexp {unique case statement has only one branch}
-
-
diff --git a/vendor/lowrisc_ip/lint/tools/ascentlint/comportable.waiver b/vendor/lowrisc_ip/lint/tools/ascentlint/comportable.waiver
index dcf62a9734..e8515dab22 100644
--- a/vendor/lowrisc_ip/lint/tools/ascentlint/comportable.waiver
+++ b/vendor/lowrisc_ip/lint/tools/ascentlint/comportable.waiver
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/lint/tools/dvsim/ascentlint.hjson b/vendor/lowrisc_ip/lint/tools/dvsim/ascentlint.hjson
index 7b76f3e2d7..088a7522f4 100644
--- a/vendor/lowrisc_ip/lint/tools/dvsim/ascentlint.hjson
+++ b/vendor/lowrisc_ip/lint/tools/dvsim/ascentlint.hjson
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 {
diff --git a/vendor/lowrisc_ip/lint/tools/dvsim/common_lint_cfg.hjson b/vendor/lowrisc_ip/lint/tools/dvsim/common_lint_cfg.hjson
index 05571b5baa..9ec23bdf9b 100644
--- a/vendor/lowrisc_ip/lint/tools/dvsim/common_lint_cfg.hjson
+++ b/vendor/lowrisc_ip/lint/tools/dvsim/common_lint_cfg.hjson
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 {
@@ -29,11 +29,12 @@
                "{fusesoc_core}"]
 
   // Determines which message severities to print into report summaries.
-  report_severities: ["warning", "error"]
+  report_severities: ["info", "warning", "error"]
   // Determines which message severities lead to a pass/fail.
   fail_severities: ["warning", "error"]
   // Define message bucket categories and severities.
   message_buckets: [
+    {category: "flow", severity: "info",     label: ""},
     {category: "flow", severity: "warning",  label: ""},
     {category: "flow", severity: "error",    label: ""},
     {category: "lint", severity: "info",     label: ""},
diff --git a/vendor/lowrisc_ip/lint/tools/dvsim/lint.mk b/vendor/lowrisc_ip/lint/tools/dvsim/lint.mk
index afca82ee2b..d7ce470895 100644
--- a/vendor/lowrisc_ip/lint/tools/dvsim/lint.mk
+++ b/vendor/lowrisc_ip/lint/tools/dvsim/lint.mk
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/lint/tools/dvsim/veriblelint.hjson b/vendor/lowrisc_ip/lint/tools/dvsim/veriblelint.hjson
index a3b8f2f843..601164fa41 100644
--- a/vendor/lowrisc_ip/lint/tools/dvsim/veriblelint.hjson
+++ b/vendor/lowrisc_ip/lint/tools/dvsim/veriblelint.hjson
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 {
diff --git a/vendor/lowrisc_ip/lint/tools/dvsim/verilator.hjson b/vendor/lowrisc_ip/lint/tools/dvsim/verilator.hjson
index 62bf0b38a7..46419053b5 100644
--- a/vendor/lowrisc_ip/lint/tools/dvsim/verilator.hjson
+++ b/vendor/lowrisc_ip/lint/tools/dvsim/verilator.hjson
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 {
diff --git a/vendor/lowrisc_ip/lint/tools/veriblelint/lowrisc-styleguide.rules.verible_lint b/vendor/lowrisc_ip/lint/tools/veriblelint/lowrisc-styleguide.rules.verible_lint
index 6f03c3f2b7..c7678d2880 100644
--- a/vendor/lowrisc_ip/lint/tools/veriblelint/lowrisc-styleguide.rules.verible_lint
+++ b/vendor/lowrisc_ip/lint/tools/veriblelint/lowrisc-styleguide.rules.verible_lint
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
diff --git a/vendor/lowrisc_ip/lint/tools/verilator/common.vlt b/vendor/lowrisc_ip/lint/tools/verilator/common.vlt
index 625b46a896..5416c16453 100644
--- a/vendor/lowrisc_ip/lint/tools/verilator/common.vlt
+++ b/vendor/lowrisc_ip/lint/tools/verilator/common.vlt
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/lint/tools/verilator/comportable.vlt b/vendor/lowrisc_ip/lint/tools/verilator/comportable.vlt
index 5da936b4f0..9b914ca59b 100644
--- a/vendor/lowrisc_ip/lint/tools/verilator/comportable.vlt
+++ b/vendor/lowrisc_ip/lint/tools/verilator/comportable.vlt
@@ -1,6 +1,5 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
 // comportable IP waiver rules for verilator
-
diff --git a/vendor/lowrisc_ip/util/dvsim/BUILD b/vendor/lowrisc_ip/util/dvsim/BUILD
index ea54196558..d1f451661b 100644
--- a/vendor/lowrisc_ip/util/dvsim/BUILD
+++ b/vendor/lowrisc_ip/util/dvsim/BUILD
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -35,7 +35,11 @@ py_library(
 
 py_library(
     name = "modes",
-    srcs = ["Modes.py"],
+    srcs = [
+        "Regression.py",
+        "Test.py",
+        "modes.py",
+    ],
     deps = [
         ":utils",
     ],
diff --git a/vendor/lowrisc_ip/util/dvsim/CdcCfg.py b/vendor/lowrisc_ip/util/dvsim/CdcCfg.py
index 34a7956fd0..6b6058ca4f 100644
--- a/vendor/lowrisc_ip/util/dvsim/CdcCfg.py
+++ b/vendor/lowrisc_ip/util/dvsim/CdcCfg.py
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 r'''
diff --git a/vendor/lowrisc_ip/util/dvsim/CfgFactory.py b/vendor/lowrisc_ip/util/dvsim/CfgFactory.py
index 79e64ee554..d571ed07d0 100644
--- a/vendor/lowrisc_ip/util/dvsim/CfgFactory.py
+++ b/vendor/lowrisc_ip/util/dvsim/CfgFactory.py
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/util/dvsim/CfgJson.py b/vendor/lowrisc_ip/util/dvsim/CfgJson.py
index 3fee62588c..717b9947f2 100644
--- a/vendor/lowrisc_ip/util/dvsim/CfgJson.py
+++ b/vendor/lowrisc_ip/util/dvsim/CfgJson.py
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/util/dvsim/Deploy.py b/vendor/lowrisc_ip/util/dvsim/Deploy.py
index c1fbb5b0e1..8f28add084 100644
--- a/vendor/lowrisc_ip/util/dvsim/Deploy.py
+++ b/vendor/lowrisc_ip/util/dvsim/Deploy.py
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/util/dvsim/FlowCfg.py b/vendor/lowrisc_ip/util/dvsim/FlowCfg.py
index 8cebeec90f..daeae87974 100644
--- a/vendor/lowrisc_ip/util/dvsim/FlowCfg.py
+++ b/vendor/lowrisc_ip/util/dvsim/FlowCfg.py
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/util/dvsim/FormalCfg.py b/vendor/lowrisc_ip/util/dvsim/FormalCfg.py
index d5a03fc46e..5be6e724be 100644
--- a/vendor/lowrisc_ip/util/dvsim/FormalCfg.py
+++ b/vendor/lowrisc_ip/util/dvsim/FormalCfg.py
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -35,7 +35,7 @@ def __init__(self, flow_cfg_file, hjson_data, args, mk_config):
             self.publish_report = False
         self.sub_flow = hjson_data['sub_flow']
         self.summary_header = [
-            "name", "pass_rate", "stimuli_cov", "coi_cov", "prove_cov"
+            "name", "pass_rate", "formal_cov", "stimuli_cov", "checker_cov"
         ]
         self.results_title = self.name.upper(
         ) + " Formal " + self.sub_flow.upper() + " Results"
@@ -112,16 +112,16 @@ def get_coverage(self, result):
             results_str = "No coverage information found\n"
             summary = ["N/A", "N/A", "N/A"]
         else:
-            cov_header = ["stimuli", "coi", "proof"]
+            cov_header = ["formal", "stimuli", "checker"]
             cov_colalign = ("center", ) * len(cov_header)
             cov_table = [cov_header]
             cov_table.append([
-                formal_coverage["stimuli"], formal_coverage["coi"],
-                formal_coverage["proof"]
+                formal_coverage["formal"], formal_coverage["stimuli"],
+                formal_coverage["checker"]
             ])
+            summary.append(formal_coverage["formal"])
             summary.append(formal_coverage["stimuli"])
-            summary.append(formal_coverage["coi"])
-            summary.append(formal_coverage["proof"])
+            summary.append(formal_coverage["checker"])
 
             if len(cov_table) > 1:
                 results_str = tabulate(cov_table,
@@ -196,9 +196,9 @@ def _gen_results(self, results):
         # If coverage was enabled then results.hjson will also have an item that
         # shows formal coverage. It will have the following format:
         #   "coverage": {
+        #      formal:  "90 %",
         #      stimuli: "90 %",
-        #      coi    : "90 %",
-        #      proof  : "80 %"
+        #      checker: "80 %"
         #   }
         results_str = "## " + self.results_title + "\n\n"
         results_str += "### " + self.timestamp_long + "\n"
diff --git a/vendor/lowrisc_ip/util/dvsim/JobTime.py b/vendor/lowrisc_ip/util/dvsim/JobTime.py
index 69adeba3d6..ba270b7d60 100644
--- a/vendor/lowrisc_ip/util/dvsim/JobTime.py
+++ b/vendor/lowrisc_ip/util/dvsim/JobTime.py
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 r"""An abstraction for maintaining job runtime and its units.
diff --git a/vendor/lowrisc_ip/util/dvsim/Launcher.py b/vendor/lowrisc_ip/util/dvsim/Launcher.py
index ac617c7820..a483e94e67 100644
--- a/vendor/lowrisc_ip/util/dvsim/Launcher.py
+++ b/vendor/lowrisc_ip/util/dvsim/Launcher.py
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/util/dvsim/LauncherFactory.py b/vendor/lowrisc_ip/util/dvsim/LauncherFactory.py
index 3829187c8b..cac498d045 100644
--- a/vendor/lowrisc_ip/util/dvsim/LauncherFactory.py
+++ b/vendor/lowrisc_ip/util/dvsim/LauncherFactory.py
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/util/dvsim/LintCfg.py b/vendor/lowrisc_ip/util/dvsim/LintCfg.py
index 1b3cf16081..ced749083a 100644
--- a/vendor/lowrisc_ip/util/dvsim/LintCfg.py
+++ b/vendor/lowrisc_ip/util/dvsim/LintCfg.py
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 r'''
diff --git a/vendor/lowrisc_ip/util/dvsim/LintParser.py b/vendor/lowrisc_ip/util/dvsim/LintParser.py
index ff697ce61f..484b223436 100644
--- a/vendor/lowrisc_ip/util/dvsim/LintParser.py
+++ b/vendor/lowrisc_ip/util/dvsim/LintParser.py
@@ -1,5 +1,5 @@
 #!/usr/bin/env python3
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 r"""Helper class for parsing lint reports into a generic hjson format.
@@ -17,6 +17,7 @@ class LintParser():
 
     def __init__(self) -> None:
         self.buckets = {
+            'flow_info': [],
             'flow_warning': [],
             'flow_error': [],
             'lint_info': [],
@@ -27,6 +28,7 @@ def __init__(self) -> None:
             'fusesoc-error': []
         }
         self.severities = {
+            'flow_info': 'info',
             'flow_warning': 'warning',
             'flow_error': 'error',
             'lint_info': 'info',
@@ -35,14 +37,28 @@ def __init__(self) -> None:
         }
 
     def extract_messages(self, log_content: str, patterns: List[str]) -> None:
-        """
-        This extracts messages from the string buffer log_content.
+        """Extract messages from the string buffer log_content.
+
         The argument patterns needs to be a list of tuples with
         (<error_severity>, <pattern_to_match_for>).
+
+        A substring that matches two different patterns will be stored in the
+        bucket associated with the first pattern that matches.
         """
-        for bucket, pattern in patterns:
-            self.buckets[bucket] += \
-                re.findall(pattern, log_content, flags=re.MULTILINE)
+        # Iterate through all the patterns in reverse order and store hits
+        # against the index of their first character. Doing this in reverse
+        # order means that patterns earlier in the list "win": if two different
+        # patterns match a particular substring, only the bucket of the first
+        # one will end up in the found dict.
+        found = {}
+        for bucket, pattern in reversed(patterns):
+            for m in re.finditer(pattern, log_content, flags=re.MULTILINE):
+                found[m.start()] = (bucket, m.group(0))
+
+        # Now that we've ignored duplicate hits, flatten things out into
+        # self.buckets.
+        for bucket, hit in found.values():
+            self.buckets[bucket].append(hit)
 
     def get_results(self, args: Dict[Path, List[Tuple]]) -> Dict[str, int]:
         """
diff --git a/vendor/lowrisc_ip/util/dvsim/LocalLauncher.py b/vendor/lowrisc_ip/util/dvsim/LocalLauncher.py
index 2e466f66de..670cc5ba55 100644
--- a/vendor/lowrisc_ip/util/dvsim/LocalLauncher.py
+++ b/vendor/lowrisc_ip/util/dvsim/LocalLauncher.py
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
@@ -15,9 +15,6 @@ class LocalLauncher(Launcher):
     Implementation of Launcher to launch jobs in the user's local workstation.
     """
 
-    # Misc common LocalLauncher settings.
-    max_odirs = 5
-
     def __init__(self, deploy):
         '''Initialize common class members.'''
 
diff --git a/vendor/lowrisc_ip/util/dvsim/LsfLauncher.py b/vendor/lowrisc_ip/util/dvsim/LsfLauncher.py
index 4c623433d3..2260a01752 100644
--- a/vendor/lowrisc_ip/util/dvsim/LsfLauncher.py
+++ b/vendor/lowrisc_ip/util/dvsim/LsfLauncher.py
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/util/dvsim/Makefile b/vendor/lowrisc_ip/util/dvsim/Makefile
index f0ab377746..5585d6280b 100644
--- a/vendor/lowrisc_ip/util/dvsim/Makefile
+++ b/vendor/lowrisc_ip/util/dvsim/Makefile
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/util/dvsim/Modes.py b/vendor/lowrisc_ip/util/dvsim/Modes.py
deleted file mode 100644
index 37d6a16d00..0000000000
--- a/vendor/lowrisc_ip/util/dvsim/Modes.py
+++ /dev/null
@@ -1,636 +0,0 @@
-# Copyright lowRISC contributors.
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-import logging as log
-import pprint
-import sys
-
-from utils import VERBOSE
-
-
-class Modes():
-    """
-    Abstraction for specifying collection of options called as 'modes'. This is
-    the base class which is extended for run_modes, build_modes, tests and regressions.
-    """
-
-    def self_str(self):
-        '''
-        This is used to construct the string representation of the entire class object.
-        '''
-        tname = ""
-        if self.type != "":
-            tname = self.type + "_"
-        if self.mname != "":
-            tname += self.mname
-        if log.getLogger().isEnabledFor(VERBOSE):
-            return "\n<---" + tname + ":\n" + pprint.pformat(self.__dict__) + \
-                   "\n--->\n"
-        else:
-            return tname + ":" + self.name
-
-    def __str__(self):
-        return self.self_str()
-
-    def __repr__(self):
-        return self.self_str()
-
-    def __init__(self, mdict):
-        keys = mdict.keys()
-        attrs = self.__dict__.keys()
-
-        if 'name' not in keys:
-            log.error("Key \"name\" missing in mode %s", mdict)
-            sys.exit(1)
-
-        if not hasattr(self, "type"):
-            log.fatal("Key \"type\" is missing or invalid")
-            sys.exit(1)
-
-        if not hasattr(self, "mname"):
-            self.mname = ""
-
-        for key in keys:
-            if key not in attrs:
-                log.error(f"Key {key} in {mdict} is invalid. Supported "
-                          f"attributes in {self.mname} are {attrs}")
-                sys.exit(1)
-            setattr(self, key, mdict[key])
-
-    def get_sub_modes(self):
-        sub_modes = []
-        if hasattr(self, "en_" + self.type + "_modes"):
-            sub_modes = getattr(self, "en_" + self.type + "_modes")
-        return sub_modes
-
-    def set_sub_modes(self, sub_modes):
-        setattr(self, "en_" + self.type + "_modes", sub_modes)
-
-    def merge_mode(self, mode):
-        '''
-        Merge a new mode with self.
-        Merge sub mode specified with 'en_*_modes with self.
-        '''
-
-        sub_modes = self.get_sub_modes()
-        is_sub_mode = mode.name in sub_modes
-
-        if not mode.name == self.name and not is_sub_mode:
-            return False
-
-        # Merge attributes in self with attributes in mode arg, since they are
-        # the same mode but set in separate files, or a sub-mode.
-        for attr, self_attr_val in self.__dict__.items():
-            mode_attr_val = getattr(mode, attr, None)
-
-            # If sub-mode, skip the name fields - they could differ.
-            if is_sub_mode and attr in ['name', 'mname']:
-                continue
-
-            # If mode's value is None, then nothing to do here.
-            if mode_attr_val is None:
-                continue
-
-            # If self value is None, then replace with mode's value.
-            if self_attr_val is None:
-                setattr(self, attr, mode_attr_val)
-                continue
-
-            # If they are equal, then nothing to do here.
-            if self_attr_val == mode_attr_val:
-                continue
-
-            # Extend if they are both lists.
-            if isinstance(self_attr_val, list):
-                assert isinstance(mode_attr_val, list)
-                self_attr_val.extend(mode_attr_val)
-                continue
-
-            # If the current val is default, replace with new.
-            scalar_types = {str: "", int: -1}
-            default_val = scalar_types.get(type(self_attr_val))
-
-            if type(self_attr_val) in scalar_types.keys(
-            ) and self_attr_val == default_val:
-                setattr(self, attr, mode_attr_val)
-                continue
-
-            # Check if their types are compatible.
-            if type(self_attr_val) != type(mode_attr_val):
-                log.error(
-                    "Mode %s cannot be merged into %s due to a conflict "
-                    "(type mismatch): %s: {%s(%s), %s(%s)}", mode.name,
-                    self.name, attr, str(self_attr_val),
-                    str(type(self_attr_val)), str(mode_attr_val),
-                    str(type(mode_attr_val)))
-                sys.exit(1)
-
-            # Check if they are different non-default values.
-            if self_attr_val != default_val and mode_attr_val != default_val:
-                log.error(
-                    "Mode %s cannot be merged into %s due to a conflict "
-                    "(unable to pick one from different values): "
-                    "%s: {%s, %s}", mode.name, self.name, attr,
-                    str(self_attr_val), str(mode_attr_val))
-                sys.exit(1)
-
-        # Check newly appended sub_modes, remove 'self' and duplicates
-        sub_modes = self.get_sub_modes()
-
-        if sub_modes != []:
-            new_sub_modes = []
-            for sub_mode in sub_modes:
-                if self.name != sub_mode and sub_mode not in new_sub_modes:
-                    new_sub_modes.append(sub_mode)
-            self.set_sub_modes(new_sub_modes)
-        return True
-
-    @staticmethod
-    def create_modes(ModeType, mdicts):
-        '''
-        Create modes of type ModeType from a given list of raw dicts
-        Process dependencies.
-        Return a list of modes objects.
-        '''
-
-        def merge_sub_modes(mode, parent, objs):
-            # Check if there are modes available to merge
-            sub_modes = mode.get_sub_modes()
-            if sub_modes == []:
-                return
-
-            # Set parent if it is None. If not, check cyclic dependency
-            if parent is None:
-                parent = mode
-            else:
-                if mode.name == parent.name:
-                    log.error("Cyclic dependency when processing mode \"%s\"",
-                              mode.name)
-                    sys.exit(1)
-
-            for sub_mode in sub_modes:
-                # Find the sub_mode obj from str
-                found = False
-                for obj in objs:
-                    if sub_mode == obj.name:
-                        # First recursively merge the sub_modes
-                        merge_sub_modes(obj, parent, objs)
-
-                        # Now merge the sub mode with mode
-                        mode.merge_mode(obj)
-                        found = True
-                        break
-                if not found:
-                    log.error(
-                        "Sub mode \"%s\" added to mode \"%s\" was not found!",
-                        sub_mode, mode.name)
-                    sys.exit(1)
-
-        modes_objs = []
-        # create a default mode if available
-        default_mode = ModeType.get_default_mode()
-        if default_mode is not None:
-            modes_objs.append(default_mode)
-
-        # Process list of raw dicts that represent the modes
-        # Pass 1: Create unique set of modes by merging modes with the same name
-        for mdict in mdicts:
-            # Create a new item
-            new_mode_merged = False
-            new_mode = ModeType(mdict)
-            for mode in modes_objs:
-                # Merge new one with existing if available
-                if mode.name == new_mode.name:
-                    mode.merge_mode(new_mode)
-                    new_mode_merged = True
-                    break
-
-            # Add the new mode to the list if not already appended
-            if not new_mode_merged:
-                modes_objs.append(new_mode)
-                ModeType.item_names.append(new_mode.name)
-
-        # Pass 2: Recursively expand sub modes within parent modes
-        for mode in modes_objs:
-            merge_sub_modes(mode, None, modes_objs)
-
-        # Return the list of objects
-        return modes_objs
-
-    @staticmethod
-    def get_default_mode(ModeType):
-        return None
-
-    @staticmethod
-    def find_mode(mode_name, modes):
-        '''
-        Given a mode_name in string, go through list of modes and return the mode with
-        the string that matches. Thrown an error and return None if nothing was found.
-        '''
-        for mode in modes:
-            if mode_name == mode.name:
-                return mode
-        return None
-
-    @staticmethod
-    def find_and_merge_modes(mode, mode_names, modes, merge_modes=True):
-        '''
-        '''
-        found_mode_objs = []
-        for mode_name in mode_names:
-            sub_mode = Modes.find_mode(mode_name, modes)
-            if sub_mode is not None:
-                found_mode_objs.append(sub_mode)
-                if merge_modes is True:
-                    mode.merge_mode(sub_mode)
-            else:
-                log.error("Mode \"%s\" enabled within mode \"%s\" not found!",
-                          mode_name, mode.name)
-                sys.exit(1)
-        return found_mode_objs
-
-
-class BuildModes(Modes):
-    """
-    Build modes.
-    """
-
-    # Maintain a list of build_modes str
-    item_names = []
-
-    def __init__(self, bdict):
-        self.name = ""
-        self.type = "build"
-        if not hasattr(self, "mname"):
-            self.mname = "mode"
-        self.is_sim_mode = 0
-        self.pre_build_cmds = []
-        self.post_build_cmds = []
-        self.en_build_modes = []
-        self.build_opts = []
-        self.build_timeout_mins = None
-        self.pre_run_cmds = []
-        self.post_run_cmds = []
-        self.run_opts = []
-        self.sw_images = []
-        self.sw_build_opts = []
-
-        super().__init__(bdict)
-        self.en_build_modes = list(set(self.en_build_modes))
-
-    @staticmethod
-    def get_default_mode():
-        return BuildModes({"name": "default"})
-
-
-class RunModes(Modes):
-    """
-    Run modes.
-    """
-
-    # Maintain a list of run_modes str
-    item_names = []
-
-    def __init__(self, rdict):
-        self.name = ""
-        self.type = "run"
-        if not hasattr(self, "mname"):
-            self.mname = "mode"
-        self.reseed = None
-        self.pre_run_cmds = []
-        self.post_run_cmds = []
-        self.en_run_modes = []
-        self.run_opts = []
-        self.uvm_test = ""
-        self.uvm_test_seq = ""
-        self.build_mode = ""
-        self.run_timeout_mins = None
-        self.run_timeout_multiplier = None
-        self.sw_images = []
-        self.sw_build_device = ""
-        self.sw_build_opts = []
-
-        super().__init__(rdict)
-        self.en_run_modes = list(set(self.en_run_modes))
-
-    @staticmethod
-    def get_default_mode():
-        return None
-
-
-class Tests(RunModes):
-    """
-    Abstraction for tests. The RunModes abstraction can be reused here with a few
-    modifications.
-    """
-
-    # Maintain a list of tests str
-    item_names = []
-
-    # TODO: This info should be passed via hjson
-    defaults = {
-        "reseed": None,
-        "uvm_test": "",
-        "uvm_test_seq": "",
-        "build_mode": "",
-        "sw_images": [],
-        "sw_build_device": "",
-        "sw_build_opts": [],
-        "run_timeout_mins": None,
-        "run_timeout_multiplier": None
-    }
-
-    def __init__(self, tdict):
-        if not hasattr(self, "mname"):
-            self.mname = "test"
-        super().__init__(tdict)
-
-    @staticmethod
-    def create_tests(tdicts, sim_cfg):
-        '''
-        Create Tests from a given list of raw dicts.
-        TODO: enhance the raw dict to include file scoped defaults.
-        Process enabled run modes and the set build mode.
-        Return a list of test objects.
-        '''
-
-        def get_pruned_en_run_modes(test_en_run_modes, global_en_run_modes):
-            pruned_en_run_modes = []
-            for test_en_run_mode in test_en_run_modes:
-                if test_en_run_mode not in global_en_run_modes:
-                    pruned_en_run_modes.append(test_en_run_mode)
-            return pruned_en_run_modes
-
-        tests_objs = []
-        # Pass 1: Create unique set of tests by merging tests with the same name
-        for tdict in tdicts:
-            # Create a new item
-            new_test_merged = False
-            new_test = Tests(tdict)
-            for test in tests_objs:
-                # Merge new one with existing if available
-                if test.name == new_test.name:
-                    test.merge_mode(new_test)
-                    new_test_merged = True
-                    break
-
-            # Add the new test to the list if not already appended
-            if not new_test_merged:
-                tests_objs.append(new_test)
-                Tests.item_names.append(new_test.name)
-
-        # Pass 2: Process dependencies
-        build_modes = []
-        if hasattr(sim_cfg, "build_modes"):
-            build_modes = getattr(sim_cfg, "build_modes")
-
-        run_modes = []
-        if hasattr(sim_cfg, "run_modes"):
-            run_modes = getattr(sim_cfg, "run_modes")
-
-        attrs = Tests.defaults
-        for test_obj in tests_objs:
-            # Unpack run_modes first
-            en_run_modes = get_pruned_en_run_modes(test_obj.en_run_modes,
-                                                   sim_cfg.en_run_modes)
-            Modes.find_and_merge_modes(test_obj, en_run_modes, run_modes)
-
-            # Find and set the missing attributes from sim_cfg
-            # If not found in sim_cfg either, then throw a warning
-            # TODO: These should be file-scoped
-            for attr in attrs.keys():
-                # Check if attr value is default
-                val = getattr(test_obj, attr)
-                default_val = attrs[attr]
-                if val == default_val:
-                    global_val = None
-                    # Check if we can find a default in sim_cfg
-                    if hasattr(sim_cfg, attr):
-                        global_val = getattr(sim_cfg, attr)
-
-                    if global_val is not None and global_val != default_val:
-                        setattr(test_obj, attr, global_val)
-
-            # Unpack the build mode for this test
-            build_mode_objs = Modes.find_and_merge_modes(test_obj,
-                                                         [test_obj.build_mode],
-                                                         build_modes,
-                                                         merge_modes=False)
-            test_obj.build_mode = build_mode_objs[0]
-
-            # Error if set build mode is actually a sim mode
-            if test_obj.build_mode.is_sim_mode is True:
-                log.error(
-                    "Test \"%s\" uses build_mode %s which is actually a sim mode",
-                    test_obj.name, test_obj.build_mode.name)
-                sys.exit(1)
-
-            # Merge build_mode's params with self
-            test_obj.pre_run_cmds.extend(test_obj.build_mode.pre_run_cmds)
-            test_obj.post_run_cmds.extend(test_obj.build_mode.post_run_cmds)
-            test_obj.run_opts.extend(test_obj.build_mode.run_opts)
-            test_obj.sw_images.extend(test_obj.build_mode.sw_images)
-            test_obj.sw_build_opts.extend(test_obj.build_mode.sw_build_opts)
-
-        # Return the list of tests
-        return tests_objs
-
-    @staticmethod
-    def merge_global_opts(tests, global_pre_build_cmds, global_post_build_cmds,
-                          global_build_opts, global_pre_run_cmds,
-                          global_post_run_cmds, global_run_opts,
-                          global_sw_images, global_sw_build_opts):
-        processed_build_modes = set()
-        for test in tests:
-            if test.build_mode.name not in processed_build_modes:
-                test.build_mode.pre_build_cmds.extend(global_pre_build_cmds)
-                test.build_mode.post_build_cmds.extend(global_post_build_cmds)
-                test.build_mode.build_opts.extend(global_build_opts)
-                processed_build_modes.add(test.build_mode.name)
-            test.pre_run_cmds.extend(global_pre_run_cmds)
-            test.post_run_cmds.extend(global_post_run_cmds)
-            test.run_opts.extend(global_run_opts)
-            test.sw_images.extend(global_sw_images)
-            test.sw_build_opts.extend(global_sw_build_opts)
-
-
-class Regressions(Modes):
-    """
-    Abstraction for test sets / regression sets.
-    """
-
-    # Maintain a list of tests str
-    item_names = []
-
-    # TODO: define __repr__ and __str__ to print list of tests if VERBOSE
-
-    def __init__(self, regdict):
-        self.name = ""
-        self.type = ""
-        if not hasattr(self, "mname"):
-            self.mname = "regression"
-
-        # The `tests` member is typically a list, but it defaults to None.
-        # There are 3 possible cases after all the HJson files are parsed, when
-        # this particular regression is supplied to be run:
-        #
-        # 1. `tests` == None:   This is treated as "run ALL available tests".
-        # 2. `tests` == []:     No available tests to run
-        # 3. `len(tests)` > 0:  The provided set of tests are run.
-        self.tests = None
-        self.test_names = []
-
-        self.reseed = None
-        self.excl_tests = []  # TODO: add support for this
-        self.en_sim_modes = []
-        self.en_run_modes = []
-        self.pre_build_cmds = []
-        self.post_build_cmds = []
-        self.pre_run_cmds = []
-        self.post_run_cmds = []
-        self.build_opts = []
-        self.run_opts = []
-        super().__init__(regdict)
-
-    @staticmethod
-    def create_regressions(regdicts, sim_cfg, tests):
-        '''
-        Create Test sets from a given list of raw dicts.
-        Return a list of test set objects.
-        '''
-
-        regressions_objs = []
-        # Pass 1: Create unique set of test sets by merging test sets with the same name
-        for regdict in regdicts:
-            # Create a new item
-            new_regression_merged = False
-            new_regression = Regressions(regdict)
-
-            # Check for name conflicts with tests before merging
-            if new_regression.name in Tests.item_names:
-                log.error(
-                    "Test names and regression names are required to be unique. "
-                    "The regression \"%s\" bears the same name with an existing test. ",
-                    new_regression.name)
-                sys.exit(1)
-
-            for regression in regressions_objs:
-                # Merge new one with existing if available
-                if regression.name == new_regression.name:
-                    regression.merge_mode(new_regression)
-                    new_regression_merged = True
-                    break
-
-            # Add the new test to the list if not already appended
-            if not new_regression_merged:
-                regressions_objs.append(new_regression)
-                Regressions.item_names.append(new_regression.name)
-
-        # Pass 2: Process dependencies
-        build_modes = []
-        if hasattr(sim_cfg, "build_modes"):
-            build_modes = getattr(sim_cfg, "build_modes")
-
-        run_modes = []
-        if hasattr(sim_cfg, "run_modes"):
-            run_modes = getattr(sim_cfg, "run_modes")
-
-        for regression_obj in regressions_objs:
-            # Unpack the sim modes
-            found_sim_mode_objs = Modes.find_and_merge_modes(
-                regression_obj, regression_obj.en_sim_modes, build_modes,
-                False)
-
-            for sim_mode_obj in found_sim_mode_objs:
-                if sim_mode_obj.is_sim_mode == 0:
-                    log.error(
-                        "Enabled mode \"%s\" within the regression \"%s\" is not a sim mode",
-                        sim_mode_obj.name, regression_obj.name)
-                    sys.exit(1)
-
-                # Check if sim_mode_obj's sub-modes are a part of regressions's
-                # sim modes- if yes, then it will cause duplication of cmds &
-                # opts. Throw an error and exit.
-                for sim_mode_obj_sub in sim_mode_obj.en_build_modes:
-                    if sim_mode_obj_sub in regression_obj.en_sim_modes:
-                        log.error(
-                            "Regression \"%s\" enables sim_modes \"%s\" and \"%s\". "
-                            "The former is already a sub_mode of the latter.",
-                            regression_obj.name, sim_mode_obj_sub,
-                            sim_mode_obj.name)
-                        sys.exit(1)
-
-                # Check if sim_mode_obj is also passed on the command line, in
-                # which case, skip
-                if sim_mode_obj.name in sim_cfg.en_build_modes:
-                    continue
-
-                # Merge the build and run cmds & opts from the sim modes
-                regression_obj.pre_build_cmds.extend(
-                    sim_mode_obj.pre_build_cmds)
-                regression_obj.post_build_cmds.extend(
-                    sim_mode_obj.post_build_cmds)
-                regression_obj.build_opts.extend(sim_mode_obj.build_opts)
-                regression_obj.pre_run_cmds.extend(sim_mode_obj.pre_run_cmds)
-                regression_obj.post_run_cmds.extend(sim_mode_obj.post_run_cmds)
-                regression_obj.run_opts.extend(sim_mode_obj.run_opts)
-
-            # Unpack the run_modes
-            # TODO: If there are other params other than run_opts throw an
-            # error and exit
-            found_run_mode_objs = Modes.find_and_merge_modes(
-                regression_obj, regression_obj.en_run_modes, run_modes, False)
-
-            # Only merge the pre_run_cmds, post_run_cmds & run_opts from the
-            # run_modes enabled
-            for run_mode_obj in found_run_mode_objs:
-                # Check if run_mode_obj is also passed on the command line, in
-                # which case, skip
-                if run_mode_obj.name in sim_cfg.en_run_modes:
-                    continue
-                regression_obj.pre_run_cmds.extend(run_mode_obj.pre_run_cmds)
-                regression_obj.post_run_cmds.extend(run_mode_obj.post_run_cmds)
-                regression_obj.run_opts.extend(run_mode_obj.run_opts)
-
-            # Unpack tests
-            # If `tests` member resolves to None, then we add ALL available
-            # tests for running the regression.
-            if regression_obj.tests is None:
-                log.log(VERBOSE,
-                        "Unpacking all tests in scope for regression \"%s\"",
-                        regression_obj.name)
-                regression_obj.tests = sim_cfg.tests
-                regression_obj.test_names = Tests.item_names
-
-            else:
-                tests_objs = set()
-                regression_obj.test_names = regression_obj.tests
-                for test in regression_obj.tests:
-                    test_obj = Modes.find_mode(test, sim_cfg.tests)
-                    if test_obj is None:
-                        log.error(
-                            "Test \"%s\" added to regression \"%s\" not found!",
-                            test, regression_obj.name)
-                        continue
-                    tests_objs.add(test_obj)
-                regression_obj.tests = list(tests_objs)
-
-        # Return the list of tests
-        return regressions_objs
-
-    def merge_regression_opts(self):
-        processed_build_modes = []
-        for test in self.tests:
-            if test.build_mode.name not in processed_build_modes:
-                test.build_mode.pre_build_cmds.extend(self.pre_build_cmds)
-                test.build_mode.post_build_cmds.extend(self.post_build_cmds)
-                test.build_mode.build_opts.extend(self.build_opts)
-                processed_build_modes.append(test.build_mode.name)
-            test.pre_run_cmds.extend(self.pre_run_cmds)
-            test.post_run_cmds.extend(self.post_run_cmds)
-            test.run_opts.extend(self.run_opts)
-
-            # Override reseed if available.
-            if self.reseed is not None:
-                test.reseed = self.reseed
diff --git a/vendor/lowrisc_ip/util/dvsim/MsgBucket.py b/vendor/lowrisc_ip/util/dvsim/MsgBucket.py
index b6799e6c74..84f60d0117 100644
--- a/vendor/lowrisc_ip/util/dvsim/MsgBucket.py
+++ b/vendor/lowrisc_ip/util/dvsim/MsgBucket.py
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 r'''
diff --git a/vendor/lowrisc_ip/util/dvsim/MsgBuckets.py b/vendor/lowrisc_ip/util/dvsim/MsgBuckets.py
index e5f829529b..0bbbf8619f 100644
--- a/vendor/lowrisc_ip/util/dvsim/MsgBuckets.py
+++ b/vendor/lowrisc_ip/util/dvsim/MsgBuckets.py
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 r'''
diff --git a/vendor/lowrisc_ip/util/dvsim/OneShotCfg.py b/vendor/lowrisc_ip/util/dvsim/OneShotCfg.py
index 574795d73a..c23adebd19 100644
--- a/vendor/lowrisc_ip/util/dvsim/OneShotCfg.py
+++ b/vendor/lowrisc_ip/util/dvsim/OneShotCfg.py
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 r"""
@@ -11,7 +11,7 @@
 
 from Deploy import CompileOneShot
 from FlowCfg import FlowCfg
-from Modes import BuildModes, Modes
+from modes import BuildMode, Mode
 from utils import rm_path
 
 
@@ -116,8 +116,8 @@ def _purge(self):
 
     def _create_objects(self):
         # Create build and run modes objects
-        build_modes = Modes.create_modes(BuildModes,
-                                         getattr(self, "build_modes"))
+        build_modes = Mode.create_modes(BuildMode,
+                                        getattr(self, "build_modes"))
         setattr(self, "build_modes", build_modes)
 
         # All defined build modes are being built, h
@@ -146,11 +146,9 @@ def _create_deploy_objects(self):
         '''Create deploy objects from build modes
         '''
         builds = []
-        build_map = {}
         for build in self.build_modes:
             item = CompileOneShot(build, self)
             builds.append(item)
-            build_map[build] = item
 
         self.builds = builds
         self.deploy = builds
diff --git a/vendor/lowrisc_ip/util/dvsim/RdcCfg.py b/vendor/lowrisc_ip/util/dvsim/RdcCfg.py
index 60f57a2e1d..e4b753c29f 100644
--- a/vendor/lowrisc_ip/util/dvsim/RdcCfg.py
+++ b/vendor/lowrisc_ip/util/dvsim/RdcCfg.py
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 r'''
diff --git a/vendor/lowrisc_ip/util/dvsim/Regression.py b/vendor/lowrisc_ip/util/dvsim/Regression.py
new file mode 100644
index 0000000000..652f965fff
--- /dev/null
+++ b/vendor/lowrisc_ip/util/dvsim/Regression.py
@@ -0,0 +1,182 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+from modes import Mode, find_mode, find_and_merge_modes
+from Test import Test
+
+import logging as log
+import sys
+from utils import VERBOSE
+
+
+class Regression(Mode):
+    """
+    Abstraction for test sets / regression sets.
+    """
+
+    # Maintain a list of tests str
+    item_names = []
+
+    def __init__(self, regdict):
+        self.name = ""
+        self.type = ""
+
+        # The `tests` member is typically a list, but it defaults to None.
+        # There are 3 possible cases after all the HJson files are parsed, when
+        # this particular regression is supplied to be run:
+        #
+        # 1. `tests` == None:   This is treated as "run ALL available tests".
+        # 2. `tests` == []:     No available tests to run
+        # 3. `len(tests)` > 0:  The provided set of tests are run.
+        self.tests = None
+        self.test_names = []
+
+        self.reseed = None
+        self.excl_tests = []  # TODO: add support for this
+        self.en_sim_modes = []
+        self.en_run_modes = []
+        self.pre_build_cmds = []
+        self.post_build_cmds = []
+        self.pre_run_cmds = []
+        self.post_run_cmds = []
+        self.build_opts = []
+        self.run_opts = []
+        super().__init__("regression", regdict)
+
+    @staticmethod
+    def create_regressions(regdicts, sim_cfg, tests):
+        '''
+        Create Test sets from a given list of raw dicts.
+        Return a list of test set objects.
+        '''
+
+        regression_objs = []
+        # Pass 1: Create unique set of test sets by merging test sets with the same name
+        for regdict in regdicts:
+            # Create a new item
+            new_regression_merged = False
+            new_regression = Regression(regdict)
+
+            # Check for name conflicts with tests before merging
+            if new_regression.name in Test.item_names:
+                log.error(
+                    "Test names and regression names are required to be unique. "
+                    "The regression \"%s\" bears the same name with an existing test. ",
+                    new_regression.name)
+                sys.exit(1)
+
+            for regression in regression_objs:
+                # Merge new one with existing if available
+                if regression.name == new_regression.name:
+                    regression.merge_mode(new_regression)
+                    new_regression_merged = True
+                    break
+
+            # Add the new test to the list if not already appended
+            if not new_regression_merged:
+                regression_objs.append(new_regression)
+                Regression.item_names.append(new_regression.name)
+
+        # Pass 2: Process dependencies
+        build_modes = getattr(sim_cfg, "build_modes", [])
+        run_modes = getattr(sim_cfg, "run_modes", [])
+
+        for regression_obj in regression_objs:
+            # Unpack the sim modes
+            found_sim_mode_objs = find_and_merge_modes(
+                regression_obj, regression_obj.en_sim_modes, build_modes,
+                False)
+
+            for sim_mode_obj in found_sim_mode_objs:
+                if sim_mode_obj.is_sim_mode == 0:
+                    log.error(
+                        "Enabled mode \"%s\" within the regression \"%s\" is not a sim mode",
+                        sim_mode_obj.name, regression_obj.name)
+                    sys.exit(1)
+
+                # Check if sim_mode_obj's sub-modes are a part of regressions's
+                # sim modes- if yes, then it will cause duplication of cmds &
+                # opts. Throw an error and exit.
+                for sim_mode_obj_sub in sim_mode_obj.en_build_modes:
+                    if sim_mode_obj_sub in regression_obj.en_sim_modes:
+                        log.error(
+                            "Regression \"%s\" enables sim_modes \"%s\" and \"%s\". "
+                            "The former is already a sub_mode of the latter.",
+                            regression_obj.name, sim_mode_obj_sub,
+                            sim_mode_obj.name)
+                        sys.exit(1)
+
+                # Check if sim_mode_obj is also passed on the command line, in
+                # which case, skip
+                if sim_mode_obj.name in sim_cfg.en_build_modes:
+                    continue
+
+                # Merge the build and run cmds & opts from the sim modes
+                regression_obj.pre_build_cmds.extend(
+                    sim_mode_obj.pre_build_cmds)
+                regression_obj.post_build_cmds.extend(
+                    sim_mode_obj.post_build_cmds)
+                regression_obj.build_opts.extend(sim_mode_obj.build_opts)
+                regression_obj.pre_run_cmds.extend(sim_mode_obj.pre_run_cmds)
+                regression_obj.post_run_cmds.extend(sim_mode_obj.post_run_cmds)
+                regression_obj.run_opts.extend(sim_mode_obj.run_opts)
+
+            # Unpack the run_modes
+            # TODO: If there are other params other than run_opts throw an
+            # error and exit
+            found_run_mode_objs = find_and_merge_modes(
+                regression_obj, regression_obj.en_run_modes, run_modes, False)
+
+            # Only merge the pre_run_cmds, post_run_cmds & run_opts from the
+            # run_modes enabled
+            for run_mode_obj in found_run_mode_objs:
+                # Check if run_mode_obj is also passed on the command line, in
+                # which case, skip
+                if run_mode_obj.name in sim_cfg.en_run_modes:
+                    continue
+                regression_obj.pre_run_cmds.extend(run_mode_obj.pre_run_cmds)
+                regression_obj.post_run_cmds.extend(run_mode_obj.post_run_cmds)
+                regression_obj.run_opts.extend(run_mode_obj.run_opts)
+
+            # Unpack tests
+            # If `tests` member resolves to None, then we add ALL available
+            # tests for running the regression.
+            if regression_obj.tests is None:
+                log.log(VERBOSE,
+                        "Unpacking all tests in scope for regression \"%s\"",
+                        regression_obj.name)
+                regression_obj.tests = sim_cfg.tests
+                regression_obj.test_names = Test.item_names
+
+            else:
+                tests_objs = set()
+                regression_obj.test_names = regression_obj.tests
+                for test in regression_obj.tests:
+                    test_obj = find_mode(test, sim_cfg.tests)
+                    if test_obj is None:
+                        log.error(
+                            "Test \"%s\" added to regression \"%s\" not found!",
+                            test, regression_obj.name)
+                        continue
+                    tests_objs.add(test_obj)
+                regression_obj.tests = list(tests_objs)
+
+        # Return the list of tests
+        return regression_objs
+
+    def merge_regression_opts(self):
+        processed_build_modes = []
+        for test in self.tests:
+            if test.build_mode.name not in processed_build_modes:
+                test.build_mode.pre_build_cmds.extend(self.pre_build_cmds)
+                test.build_mode.post_build_cmds.extend(self.post_build_cmds)
+                test.build_mode.build_opts.extend(self.build_opts)
+                processed_build_modes.append(test.build_mode.name)
+            test.pre_run_cmds.extend(self.pre_run_cmds)
+            test.post_run_cmds.extend(self.post_run_cmds)
+            test.run_opts.extend(self.run_opts)
+
+            # Override reseed if available.
+            if self.reseed is not None:
+                test.reseed = self.reseed
diff --git a/vendor/lowrisc_ip/util/dvsim/SGE.py b/vendor/lowrisc_ip/util/dvsim/SGE.py
index 2086b78e7a..15f8ba4291 100755
--- a/vendor/lowrisc_ip/util/dvsim/SGE.py
+++ b/vendor/lowrisc_ip/util/dvsim/SGE.py
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 # ----------------------------------
diff --git a/vendor/lowrisc_ip/util/dvsim/Scheduler.py b/vendor/lowrisc_ip/util/dvsim/Scheduler.py
index 9249c43561..2f767ad75c 100644
--- a/vendor/lowrisc_ip/util/dvsim/Scheduler.py
+++ b/vendor/lowrisc_ip/util/dvsim/Scheduler.py
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/util/dvsim/SgeLauncher.py b/vendor/lowrisc_ip/util/dvsim/SgeLauncher.py
index a5d869af12..c998b30a1a 100755
--- a/vendor/lowrisc_ip/util/dvsim/SgeLauncher.py
+++ b/vendor/lowrisc_ip/util/dvsim/SgeLauncher.py
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 # ------------------------------------
@@ -23,9 +23,6 @@ class SgeLauncher(Launcher):
     Implementation of Launcher to launch jobs in the user's local workstation.
     """
 
-    # Misc common SgeLauncher settings.
-    max_odirs = 5
-
     def __init__(self, deploy):
         '''Initialize common class members.'''
 
diff --git a/vendor/lowrisc_ip/util/dvsim/SimCfg.py b/vendor/lowrisc_ip/util/dvsim/SimCfg.py
index e8c0f6913b..83a2c25e33 100644
--- a/vendor/lowrisc_ip/util/dvsim/SimCfg.py
+++ b/vendor/lowrisc_ip/util/dvsim/SimCfg.py
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 r"""
@@ -19,10 +19,12 @@
 
 from Deploy import CompileSim, CovAnalyze, CovMerge, CovReport, CovUnr, RunTest
 from FlowCfg import FlowCfg
-from Modes import BuildModes, Modes, Regressions, RunModes, Tests
+from modes import BuildMode, Mode, RunMode, find_mode
+from Regression import Regression
 from results_server import ResultsServer
 from SimResults import SimResults
 from tabulate import tabulate
+from Test import Test
 from Testplan import Testplan
 from utils import TS_FORMAT, rm_path
 
@@ -242,12 +244,12 @@ def _purge(self):
 
     def _create_objects(self):
         # Create build and run modes objects
-        self.build_modes = Modes.create_modes(BuildModes, self.build_modes)
-        self.run_modes = Modes.create_modes(RunModes, self.run_modes)
+        self.build_modes = Mode.create_modes(BuildMode, self.build_modes)
+        self.run_modes = Mode.create_modes(RunMode, self.run_modes)
 
         # Walk through build modes enabled on the CLI and append the opts
         for en_build_mode in self.en_build_modes:
-            build_mode_obj = Modes.find_mode(en_build_mode, self.build_modes)
+            build_mode_obj = find_mode(en_build_mode, self.build_modes)
             if build_mode_obj is not None:
                 self.pre_build_cmds.extend(build_mode_obj.pre_build_cmds)
                 self.post_build_cmds.extend(build_mode_obj.post_build_cmds)
@@ -265,7 +267,7 @@ def _create_objects(self):
 
         # Walk through run modes enabled on the CLI and append the opts
         for en_run_mode in self.en_run_modes:
-            run_mode_obj = Modes.find_mode(en_run_mode, self.run_modes)
+            run_mode_obj = find_mode(en_run_mode, self.run_modes)
             if run_mode_obj is not None:
                 self.pre_run_cmds.extend(run_mode_obj.pre_run_cmds)
                 self.post_run_cmds.extend(run_mode_obj.post_run_cmds)
@@ -279,7 +281,7 @@ def _create_objects(self):
                 sys.exit(1)
 
         # Create tests from given list of items
-        self.tests = Tests.create_tests(self.tests, self)
+        self.tests = Test.create_tests(self.tests, self)
 
         # Regressions
         # Parse testplan if provided.
@@ -293,18 +295,28 @@ def _create_objects(self):
             self.testplan = Testplan(None, name=self.name)
 
         # Create regressions
-        self.regressions = Regressions.create_regressions(
+        self.regressions = Regression.create_regressions(
             self.regressions, self, self.tests)
 
     def _print_list(self):
         for list_item in self.list_items:
             log.info("---- List of %s in %s ----", list_item, self.variant_name)
-            if hasattr(self, list_item):
-                items = getattr(self, list_item)
-                for item in items:
-                    log.info(item)
-            else:
-                log.error("Item %s does not exist!", list_item)
+            items = getattr(self, list_item, None)
+            if items is None:
+                log.error("No %s defined for %s.", list_item, self.variant_name)
+
+            for item in items:
+                # Convert the item into something that can be printed in the
+                # list. Some modes are specified as strings themselves (so
+                # there's no conversion needed). Others should be subclasses of
+                # Mode, which has a name field that we can use.
+                if isinstance(item, str):
+                    mode_name = item
+                else:
+                    assert isinstance(item, Mode)
+                    mode_name = item.name
+
+                log.info(mode_name)
 
     def _create_build_and_run_list(self):
         '''Generates a list of deployable objects from the provided items.
@@ -359,11 +371,11 @@ def _match_items(items: list, patterns: list):
                         f"tests in {self.flow_cfg_file}.")
 
         # Merge the global build and run opts
-        Tests.merge_global_opts(self.run_list, self.pre_build_cmds,
-                                self.post_build_cmds, self.build_opts,
-                                self.pre_run_cmds, self.post_run_cmds,
-                                self.run_opts, self.sw_images,
-                                self.sw_build_opts)
+        Test.merge_global_opts(self.run_list, self.pre_build_cmds,
+                               self.post_build_cmds, self.build_opts,
+                               self.pre_run_cmds, self.post_run_cmds,
+                               self.run_opts, self.sw_images,
+                               self.sw_build_opts)
 
         # Process reseed override and create the build_list
         build_list_names = []
@@ -466,7 +478,7 @@ def _create_deploy_objects(self):
         # Update all tests to use the updated (uniquified) build modes.
         for test in self.run_list:
             if test.build_mode.name != build_map[test.build_mode].name:
-                test.build_mode = Modes.find_mode(
+                test.build_mode = find_mode(
                     build_map[test.build_mode].name, self.build_modes)
 
         self.runs = ([]
diff --git a/vendor/lowrisc_ip/util/dvsim/SimResults.py b/vendor/lowrisc_ip/util/dvsim/SimResults.py
index 0a035defa5..75a203145c 100644
--- a/vendor/lowrisc_ip/util/dvsim/SimResults.py
+++ b/vendor/lowrisc_ip/util/dvsim/SimResults.py
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 r"""
diff --git a/vendor/lowrisc_ip/util/dvsim/StatusPrinter.py b/vendor/lowrisc_ip/util/dvsim/StatusPrinter.py
index e9bf7f96d3..73d18edfaa 100644
--- a/vendor/lowrisc_ip/util/dvsim/StatusPrinter.py
+++ b/vendor/lowrisc_ip/util/dvsim/StatusPrinter.py
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/util/dvsim/SynCfg.py b/vendor/lowrisc_ip/util/dvsim/SynCfg.py
index f8b3854801..a81e32d04d 100644
--- a/vendor/lowrisc_ip/util/dvsim/SynCfg.py
+++ b/vendor/lowrisc_ip/util/dvsim/SynCfg.py
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 r"""
diff --git a/vendor/lowrisc_ip/util/dvsim/Test.py b/vendor/lowrisc_ip/util/dvsim/Test.py
new file mode 100644
index 0000000000..3c80524b0b
--- /dev/null
+++ b/vendor/lowrisc_ip/util/dvsim/Test.py
@@ -0,0 +1,138 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+from copy import deepcopy
+import logging as log
+import sys
+
+from modes import RunMode, find_and_merge_modes
+
+
+class Test(RunMode):
+    """
+    Abstraction for a test. The RunMode abstraction can be reused here with a few
+    modifications.
+    """
+
+    # Maintain a list of tests str
+    item_names = []
+
+    # TODO: This info should be passed via hjson
+    defaults = {
+        "reseed": None,
+        "uvm_test": "",
+        "uvm_test_seq": "",
+        "build_mode": "",
+        "sw_images": [],
+        "sw_build_device": "",
+        "sw_build_opts": [],
+        "run_timeout_mins": None,
+        "run_timeout_multiplier": None
+    }
+
+    @staticmethod
+    def create_tests(tdicts, sim_cfg):
+        '''
+        Create Test objects from a given list of raw dicts.
+        TODO: enhance the raw dict to include file scoped defaults.
+        Process enabled run modes and the set build mode.
+        Return a list of test objects.
+        '''
+
+        def get_pruned_en_run_modes(test_en_run_modes, global_en_run_modes):
+            pruned_en_run_modes = []
+            for test_en_run_mode in test_en_run_modes:
+                if test_en_run_mode not in global_en_run_modes:
+                    pruned_en_run_modes.append(test_en_run_mode)
+            return pruned_en_run_modes
+
+        tests_objs = []
+        # Pass 1: Create unique set of tests by merging tests with the same name
+        for tdict in tdicts:
+            # Create a new item
+            new_test_merged = False
+            new_test = Test(tdict)
+            for test in tests_objs:
+                # Merge new one with existing if available
+                if test.name == new_test.name:
+                    test.merge_mode(new_test)
+                    new_test_merged = True
+                    break
+
+            # Add the new test to the list if not already appended
+            if not new_test_merged:
+                tests_objs.append(new_test)
+                Test.item_names.append(new_test.name)
+
+        # Pass 2: Process dependencies
+        build_modes = getattr(sim_cfg, "build_modes", [])
+        run_modes = getattr(sim_cfg, "run_modes", [])
+
+        attrs = Test.defaults
+        for test_obj in tests_objs:
+            # Unpack run_modes first
+            en_run_modes = get_pruned_en_run_modes(test_obj.en_run_modes,
+                                                   sim_cfg.en_run_modes)
+            find_and_merge_modes(test_obj, en_run_modes, run_modes)
+
+            # Find and set the missing attributes from sim_cfg
+            # If not found in sim_cfg either, then throw a warning
+            # TODO: These should be file-scoped
+            for attr in attrs.keys():
+                # Check if attr value is default
+                val = getattr(test_obj, attr)
+                default_val = attrs[attr]
+                if val == default_val:
+                    # If sim_cfg specifies a value for this attribute and this
+                    # value isn't equal to default_val, then copy the sim_cfg
+                    # value across to the test object.
+                    global_val = getattr(sim_cfg, attr, None)
+                    if global_val is not None and global_val != default_val:
+
+                        # TODO: This is a workaround for a memory usage bug
+                        # that triggered issue #20550. It's a pretty hacky
+                        # solution! We should probably tidy this up properly.
+                        setattr(test_obj, attr, deepcopy(global_val))
+
+            # Unpack the build mode for this test
+            build_mode_objs = find_and_merge_modes(test_obj,
+                                                   [test_obj.build_mode],
+                                                   build_modes,
+                                                   merge_modes=False)
+            test_obj.build_mode = build_mode_objs[0]
+
+            # Error if set build mode is actually a sim mode
+            if test_obj.build_mode.is_sim_mode is True:
+                log.error(
+                    "Test \"%s\" uses build_mode %s which is actually a sim mode",
+                    test_obj.name, test_obj.build_mode.name)
+                sys.exit(1)
+
+            # Merge build_mode's params with self
+            test_obj.pre_run_cmds.extend(test_obj.build_mode.pre_run_cmds)
+            test_obj.post_run_cmds.extend(test_obj.build_mode.post_run_cmds)
+            test_obj.run_opts.extend(test_obj.build_mode.run_opts)
+            test_obj.sw_images.extend(test_obj.build_mode.sw_images)
+            test_obj.sw_build_opts.extend(test_obj.build_mode.sw_build_opts)
+
+        # Return the list of tests
+        return tests_objs
+
+    @staticmethod
+    def merge_global_opts(tests, global_pre_build_cmds, global_post_build_cmds,
+                          global_build_opts, global_pre_run_cmds,
+                          global_post_run_cmds, global_run_opts,
+                          global_sw_images, global_sw_build_opts):
+        processed_build_modes = set()
+        for test in tests:
+            if test.build_mode.name not in processed_build_modes:
+                test.build_mode.pre_build_cmds.extend(global_pre_build_cmds)
+                test.build_mode.post_build_cmds.extend(global_post_build_cmds)
+                test.build_mode.build_opts.extend(global_build_opts)
+                processed_build_modes.add(test.build_mode.name)
+            test.pre_run_cmds.extend(global_pre_run_cmds)
+            test.post_run_cmds.extend(global_post_run_cmds)
+            test.run_opts.extend(global_run_opts)
+            test.sw_images.extend(global_sw_images)
+            test.sw_build_opts.extend(global_sw_build_opts)
diff --git a/vendor/lowrisc_ip/util/dvsim/Testplan.py b/vendor/lowrisc_ip/util/dvsim/Testplan.py
index c69f68c50a..056583e408 100644
--- a/vendor/lowrisc_ip/util/dvsim/Testplan.py
+++ b/vendor/lowrisc_ip/util/dvsim/Testplan.py
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 r"""Testpoint and Testplan classes for maintaining the testplan
diff --git a/vendor/lowrisc_ip/util/dvsim/Timer.py b/vendor/lowrisc_ip/util/dvsim/Timer.py
index 7447ceb1c1..a9b245ca02 100644
--- a/vendor/lowrisc_ip/util/dvsim/Timer.py
+++ b/vendor/lowrisc_ip/util/dvsim/Timer.py
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/util/dvsim/ascentlint-report-parser.py b/vendor/lowrisc_ip/util/dvsim/ascentlint-report-parser.py
index 6e97740668..2edb2bf80c 100755
--- a/vendor/lowrisc_ip/util/dvsim/ascentlint-report-parser.py
+++ b/vendor/lowrisc_ip/util/dvsim/ascentlint-report-parser.py
@@ -1,5 +1,5 @@
 #!/usr/bin/env python3
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 r"""Parses lint report and dump filtered messages in hjson format.
@@ -67,6 +67,7 @@ def main():
             ("flow_error", r"^Error: .*"),
             ("flow_error", r"^ERROR.*"),
             ("flow_error", r"^  ERR .*"),
+            ("flow_info", r"^Warning: License will expire.*"),
             ("flow_warning", r"^Warning: .*"),
             # TODO: struct assignment labels within concatenation
             # not supported. check with newer ascentlint version.
diff --git a/vendor/lowrisc_ip/util/dvsim/dvsim.py b/vendor/lowrisc_ip/util/dvsim/dvsim.py
index dfab533410..3d591bc4d0 100755
--- a/vendor/lowrisc_ip/util/dvsim/dvsim.py
+++ b/vendor/lowrisc_ip/util/dvsim/dvsim.py
@@ -1,5 +1,5 @@
 #!/usr/bin/env python3
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 """dvsim is a command line tool to deploy ASIC tool flows such as regressions
diff --git a/vendor/lowrisc_ip/util/dvsim/examples/testplanner/common_testplan.hjson b/vendor/lowrisc_ip/util/dvsim/examples/testplanner/common_testplan.hjson
index 5207b2bc3f..a07cebe70b 100644
--- a/vendor/lowrisc_ip/util/dvsim/examples/testplanner/common_testplan.hjson
+++ b/vendor/lowrisc_ip/util/dvsim/examples/testplanner/common_testplan.hjson
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 {
diff --git a/vendor/lowrisc_ip/util/dvsim/examples/testplanner/foo_sim_results.hjson b/vendor/lowrisc_ip/util/dvsim/examples/testplanner/foo_sim_results.hjson
index d517242b48..6c37d260ad 100644
--- a/vendor/lowrisc_ip/util/dvsim/examples/testplanner/foo_sim_results.hjson
+++ b/vendor/lowrisc_ip/util/dvsim/examples/testplanner/foo_sim_results.hjson
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 {
diff --git a/vendor/lowrisc_ip/util/dvsim/examples/testplanner/foo_testplan.hjson b/vendor/lowrisc_ip/util/dvsim/examples/testplanner/foo_testplan.hjson
index 4a9b7108f6..c4e5c9ef7f 100644
--- a/vendor/lowrisc_ip/util/dvsim/examples/testplanner/foo_testplan.hjson
+++ b/vendor/lowrisc_ip/util/dvsim/examples/testplanner/foo_testplan.hjson
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 {
diff --git a/vendor/lowrisc_ip/util/dvsim/meridianrdc-report-parser.py b/vendor/lowrisc_ip/util/dvsim/meridianrdc-report-parser.py
index c8c7999b87..a8bd6fed6e 100755
--- a/vendor/lowrisc_ip/util/dvsim/meridianrdc-report-parser.py
+++ b/vendor/lowrisc_ip/util/dvsim/meridianrdc-report-parser.py
@@ -1,5 +1,5 @@
 #!/usr/bin/env python3
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 r"""Parses Meridian RDC report and dump filtered messages in hjson format.
diff --git a/vendor/lowrisc_ip/util/dvsim/modes.py b/vendor/lowrisc_ip/util/dvsim/modes.py
new file mode 100644
index 0000000000..d1e38e706c
--- /dev/null
+++ b/vendor/lowrisc_ip/util/dvsim/modes.py
@@ -0,0 +1,287 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+import logging as log
+import sys
+from typing import List, Optional
+
+
+class Mode:
+    """A collection of options that represents a single mode.
+
+    This might be a run mode (options for an EDA tool?), a build mode, a test
+    or a regression.
+    """
+
+    def __init__(self, type_name: str, mdict):
+        keys = mdict.keys()
+        attrs = self.__dict__.keys()
+
+        if 'name' not in keys:
+            log.error("Key \"name\" missing in mode %s", mdict)
+            sys.exit(1)
+
+        if not hasattr(self, "type"):
+            log.fatal("Key \"type\" is missing or invalid")
+            sys.exit(1)
+
+        for key in keys:
+            if key not in attrs:
+                log.error(f"Key {key} in {mdict} is invalid. Supported "
+                          f"attributes for a {type_name} are {attrs}")
+                sys.exit(1)
+            setattr(self, key, mdict[key])
+
+    def get_sub_modes(self):
+        return getattr(self, "en_" + self.type + "_modes", [])
+
+    def set_sub_modes(self, sub_modes):
+        setattr(self, "en_" + self.type + "_modes", sub_modes)
+
+    def merge_mode(self, mode: 'Mode') -> None:
+        '''Update this object by merging it with mode.'''
+
+        sub_modes = self.get_sub_modes()
+        is_sub_mode = mode.name in sub_modes
+
+        # If the mode to be merged in is not known as a sub-mode of this mode
+        # then something has gone wrong. Generate an error.
+        if mode.name != self.name and not is_sub_mode:
+            log.error(f"Cannot merge mode {self.name} with {mode.name}: "
+                      f"it is not a sub-mode and they are not equal.")
+            sys.exit(1)
+
+        # Merge attributes in self with attributes in mode arg, since they are
+        # the same mode but set in separate files, or a sub-mode.
+        for attr, self_attr_val in self.__dict__.items():
+            mode_attr_val = getattr(mode, attr, None)
+
+            # If sub-mode, skip the name: it could differ.
+            if is_sub_mode and attr == 'name':
+                continue
+
+            # If mode's value is None, then nothing to do here.
+            if mode_attr_val is None:
+                continue
+
+            # If self value is None, then replace with mode's value.
+            if self_attr_val is None:
+                setattr(self, attr, mode_attr_val)
+                continue
+
+            # If they are equal, then nothing to do here.
+            if self_attr_val == mode_attr_val:
+                continue
+
+            # Extend if they are both lists.
+            if isinstance(self_attr_val, list):
+                assert isinstance(mode_attr_val, list)
+                self_attr_val.extend(mode_attr_val)
+                continue
+
+            # If the current val is default, replace with new.
+            scalar_types = {str: "", int: -1}
+            default_val = scalar_types.get(type(self_attr_val))
+
+            if type(self_attr_val) in scalar_types.keys(
+            ) and self_attr_val == default_val:
+                setattr(self, attr, mode_attr_val)
+                continue
+
+            # Check if their types are compatible.
+            if type(self_attr_val) != type(mode_attr_val):
+                log.error(
+                    "Mode %s cannot be merged into %s due to a conflict "
+                    "(type mismatch): %s: {%s(%s), %s(%s)}", mode.name,
+                    self.name, attr, str(self_attr_val),
+                    str(type(self_attr_val)), str(mode_attr_val),
+                    str(type(mode_attr_val)))
+                sys.exit(1)
+
+            # Check if they are different non-default values.
+            if self_attr_val != default_val and mode_attr_val != default_val:
+                log.error(
+                    "Mode %s cannot be merged into %s due to a conflict "
+                    "(unable to pick one from different values): "
+                    "%s: {%s, %s}", mode.name, self.name, attr,
+                    str(self_attr_val), str(mode_attr_val))
+                sys.exit(1)
+
+        # Check newly appended sub_modes, remove 'self' and duplicates
+        sub_modes = self.get_sub_modes()
+
+        if sub_modes != []:
+            new_sub_modes = []
+            for sub_mode in sub_modes:
+                if self.name != sub_mode and sub_mode not in new_sub_modes:
+                    new_sub_modes.append(sub_mode)
+            self.set_sub_modes(new_sub_modes)
+        return True
+
+    @staticmethod
+    def create_modes(ModeType, mdicts):
+        '''
+        Create modes of type ModeType from a given list of raw dicts
+        Process dependencies.
+        Return a list of modes objects.
+        '''
+
+        def merge_sub_modes(mode, parent, objs):
+            # Check if there are modes available to merge
+            sub_modes = mode.get_sub_modes()
+            if sub_modes == []:
+                return
+
+            # Set parent if it is None. If not, check cyclic dependency
+            if parent is None:
+                parent = mode
+            else:
+                if mode.name == parent.name:
+                    log.error("Cyclic dependency when processing mode \"%s\"",
+                              mode.name)
+                    sys.exit(1)
+
+            for sub_mode in sub_modes:
+                # Find the sub_mode obj from str
+                found = False
+                for obj in objs:
+                    if sub_mode == obj.name:
+                        # First recursively merge the sub_modes
+                        merge_sub_modes(obj, parent, objs)
+
+                        # Now merge the sub mode with mode
+                        mode.merge_mode(obj)
+                        found = True
+                        break
+                if not found:
+                    log.error(
+                        "Sub mode \"%s\" added to mode \"%s\" was not found!",
+                        sub_mode, mode.name)
+                    sys.exit(1)
+
+        modes_objs = []
+        # create a default mode if available
+        default_mode = ModeType.get_default_mode()
+        if default_mode is not None:
+            modes_objs.append(default_mode)
+
+        # Process list of raw dicts that represent the modes
+        # Pass 1: Create unique set of modes by merging modes with the same name
+        for mdict in mdicts:
+            # Create a new item
+            new_mode_merged = False
+            new_mode = ModeType(mdict)
+            for mode in modes_objs:
+                # Merge new one with existing if available
+                if mode.name == new_mode.name:
+                    mode.merge_mode(new_mode)
+                    new_mode_merged = True
+                    break
+
+            # Add the new mode to the list if not already appended
+            if not new_mode_merged:
+                modes_objs.append(new_mode)
+                ModeType.item_names.append(new_mode.name)
+
+        # Pass 2: Recursively expand sub modes within parent modes
+        for mode in modes_objs:
+            merge_sub_modes(mode, None, modes_objs)
+
+        # Return the list of objects
+        return modes_objs
+
+    @staticmethod
+    def get_default_mode(ModeType):
+        return None
+
+
+def find_mode(mode_name: str, modes: List[Mode]) -> Optional[Mode]:
+    '''Search through a list of modes and return the one with the given name.
+
+    Return None if nothing was found.
+    '''
+    for mode in modes:
+        if mode_name == mode.name:
+            return mode
+    return None
+
+
+def find_and_merge_modes(mode: Mode,
+                         mode_names: List[str],
+                         modes: List[Mode],
+                         merge_modes: bool = True):
+    found_mode_objs = []
+    for mode_name in mode_names:
+        sub_mode = find_mode(mode_name, modes)
+        if sub_mode is not None:
+            found_mode_objs.append(sub_mode)
+            if merge_modes is True:
+                mode.merge_mode(sub_mode)
+        else:
+            log.error("Mode \"%s\" enabled within mode \"%s\" not found!",
+                      mode_name, mode.name)
+            sys.exit(1)
+    return found_mode_objs
+
+
+class BuildMode(Mode):
+    """
+    Build modes.
+    """
+
+    # Maintain a list of build_modes str
+    item_names = []
+
+    def __init__(self, bdict):
+        self.name = ""
+        self.type = "build"
+        self.is_sim_mode = 0
+        self.pre_build_cmds = []
+        self.post_build_cmds = []
+        self.en_build_modes = []
+        self.build_opts = []
+        self.build_timeout_mins = None
+        self.pre_run_cmds = []
+        self.post_run_cmds = []
+        self.run_opts = []
+        self.sw_images = []
+        self.sw_build_opts = []
+
+        super().__init__("build mode", bdict)
+        self.en_build_modes = list(set(self.en_build_modes))
+
+    @staticmethod
+    def get_default_mode():
+        return BuildMode({"name": "default"})
+
+
+class RunMode(Mode):
+    """A collection of options for running a test."""
+
+    # Maintain a list of run_modes str
+    item_names = []
+
+    def __init__(self, rdict):
+        self.name = ""
+        self.type = "run"
+        self.reseed = None
+        self.pre_run_cmds = []
+        self.post_run_cmds = []
+        self.en_run_modes = []
+        self.run_opts = []
+        self.uvm_test = ""
+        self.uvm_test_seq = ""
+        self.build_mode = ""
+        self.run_timeout_mins = None
+        self.run_timeout_multiplier = None
+        self.sw_images = []
+        self.sw_build_device = ""
+        self.sw_build_opts = []
+
+        super().__init__("run mode", rdict)
+        self.en_run_modes = list(set(self.en_run_modes))
+
+    @staticmethod
+    def get_default_mode():
+        return None
diff --git a/vendor/lowrisc_ip/util/dvsim/qsubopts.py b/vendor/lowrisc_ip/util/dvsim/qsubopts.py
index c94c1c1e80..409893bc9b 100755
--- a/vendor/lowrisc_ip/util/dvsim/qsubopts.py
+++ b/vendor/lowrisc_ip/util/dvsim/qsubopts.py
@@ -1,5 +1,5 @@
 #!/usr/bin/env python
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 # -*- coding: utf-8 -*-
diff --git a/vendor/lowrisc_ip/util/dvsim/results_server.py b/vendor/lowrisc_ip/util/dvsim/results_server.py
index 00aa648682..e117beb9e4 100644
--- a/vendor/lowrisc_ip/util/dvsim/results_server.py
+++ b/vendor/lowrisc_ip/util/dvsim/results_server.py
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/util/dvsim/sim_utils.py b/vendor/lowrisc_ip/util/dvsim/sim_utils.py
index 66aa0c70f0..152bede053 100644
--- a/vendor/lowrisc_ip/util/dvsim/sim_utils.py
+++ b/vendor/lowrisc_ip/util/dvsim/sim_utils.py
@@ -1,5 +1,5 @@
 #!/usr/bin/env python3
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 """
diff --git a/vendor/lowrisc_ip/util/dvsim/style.css b/vendor/lowrisc_ip/util/dvsim/style.css
index f89293ae7c..49c283fced 100644
--- a/vendor/lowrisc_ip/util/dvsim/style.css
+++ b/vendor/lowrisc_ip/util/dvsim/style.css
@@ -1,4 +1,4 @@
-/* Copyright lowRISC contributors. */
+/* Copyright lowRISC contributors (OpenTitan project). */
 /* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
 /* SPDX-License-Identifier: Apache-2.0 */
 
diff --git a/vendor/lowrisc_ip/util/dvsim/testplanner.py b/vendor/lowrisc_ip/util/dvsim/testplanner.py
index 707671a9fa..1f2bd4051f 100755
--- a/vendor/lowrisc_ip/util/dvsim/testplanner.py
+++ b/vendor/lowrisc_ip/util/dvsim/testplanner.py
@@ -1,5 +1,5 @@
 #!/usr/bin/env python3
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 r"""Command-line tool to parse and process testplan Hjson
diff --git a/vendor/lowrisc_ip/util/dvsim/utils.py b/vendor/lowrisc_ip/util/dvsim/utils.py
index 2bff23f1fe..75680b314d 100644
--- a/vendor/lowrisc_ip/util/dvsim/utils.py
+++ b/vendor/lowrisc_ip/util/dvsim/utils.py
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 r"""
diff --git a/vendor/lowrisc_ip/util/dvsim/utils_test.py b/vendor/lowrisc_ip/util/dvsim/utils_test.py
index f3a0179664..a06e7f8013 100644
--- a/vendor/lowrisc_ip/util/dvsim/utils_test.py
+++ b/vendor/lowrisc_ip/util/dvsim/utils_test.py
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/util/dvsim/veriblelint-report-parser.py b/vendor/lowrisc_ip/util/dvsim/veriblelint-report-parser.py
index 6ed09b28d8..d7960e8d4a 100755
--- a/vendor/lowrisc_ip/util/dvsim/veriblelint-report-parser.py
+++ b/vendor/lowrisc_ip/util/dvsim/veriblelint-report-parser.py
@@ -1,5 +1,5 @@
 #!/usr/bin/env python3
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 r"""Parses lint report and dump filtered messages in hjson format.
diff --git a/vendor/lowrisc_ip/util/dvsim/verilator-report-parser.py b/vendor/lowrisc_ip/util/dvsim/verilator-report-parser.py
index d57e16c6dc..8ff2a69b2b 100755
--- a/vendor/lowrisc_ip/util/dvsim/verilator-report-parser.py
+++ b/vendor/lowrisc_ip/util/dvsim/verilator-report-parser.py
@@ -1,5 +1,5 @@
 #!/usr/bin/env python3
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 r"""Parses lint report and dump filtered messages in hjson format.
diff --git a/vendor/lowrisc_ip/util/dvsim/verixcdc-report-parser.py b/vendor/lowrisc_ip/util/dvsim/verixcdc-report-parser.py
index 1b176766fc..c3a18fc66d 100755
--- a/vendor/lowrisc_ip/util/dvsim/verixcdc-report-parser.py
+++ b/vendor/lowrisc_ip/util/dvsim/verixcdc-report-parser.py
@@ -1,5 +1,5 @@
 #!/usr/bin/env python3
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 r"""Parses cdc report and dump filtered messages in hjson format.
@@ -8,8 +8,6 @@
 import logging as log
 import re
 import sys
-import os
-import hjson
 
 from pathlib import Path
 from LintParser import LintParser
@@ -34,7 +32,6 @@ def extract_rule_patterns(file_path: Path):
     category = ''
     severity = ''
     known_rule_names = {}
-    total_msgs = 0
     # extract the summary table
     m = re.findall(
         r'^Summary of Policy: NEW((?:.|\n|\r\n)*)Rule Details of Policy: NEW',
@@ -43,10 +40,7 @@ def extract_rule_patterns(file_path: Path):
         # step through the table and identify rule names and their
         # category and severity
         for line in m[0].split('\n'):
-            if re.match(r'^POLICY\s+NEW', line):
-                total = re.findall(r'^POLICY\s+NEW\s+([0-9]+)', line)
-                total_msgs = int(total[0])
-            elif re.match(r'^ GROUP\s+SDC_ENV_LINT', line):
+            if re.match(r'^ GROUP\s+SDC_ENV_LINT', line):
                 category = 'sdc'
             elif re.match(r'^ GROUP\s+VCDC_SETUP_CHECKS', line):
                 category = 'setup'
@@ -66,7 +60,6 @@ def extract_rule_patterns(file_path: Path):
                 rule = re.findall(
                     r'^  INSTANCE\s+([a-zA-Z0-9\_]+)\s+([0-9\_]+)', line)
                 name = rule[0][0]
-                count = int(rule[0][1])
                 # a few rules produce messages with different severities but
                 # the same rule labels. for simplicity, we promote messages
                 # from lower severity buckets to the severity bucket where
@@ -163,19 +156,19 @@ def main():
     # Patterns for lint.log
     parser_args.update({
         args.repdir.joinpath('build.log'): [
-        # If lint warnings have been found, the lint tool will exit
-        # with a nonzero status code and fusesoc will always spit out
-        # an error like
-        #
-        #    ERROR: Failed to build ip:core:name:0.1 : 'make' exited with an error code
-        #
-        # If we found any other warnings or errors, there's no point in
-        # listing this too. BUT we want to make sure we *do* see this
-        # error if there are no other errors or warnings, since that
-        # shows something has come unstuck. (Probably the lint tool
-        # spat out a warning that we don't understand)
-        ("fusesoc-error",
-         r"^ERROR: Failed to build .* : 'make' exited with an error code")
+            # If lint warnings have been found, the lint tool will exit
+            # with a nonzero status code and fusesoc will always spit out
+            # an error like
+            #
+            #    ERROR: Failed to build ip:core:name:0.1 : 'make' exited with an error code
+            #
+            # If we found any other warnings or errors, there's no point in
+            # listing this too. BUT we want to make sure we *do* see this
+            # error if there are no other errors or warnings, since that
+            # shows something has come unstuck. (Probably the lint tool
+            # spat out a warning that we don't understand)
+            ("fusesoc-error",
+             r"^ERROR: Failed to build .* : 'make' exited with an error code")
         ]
     })
 
@@ -197,14 +190,14 @@ def main():
             # #39122: non-positive repeat
             # #39491: parameter in package
             ("flow_warning", r"^  "
-                             "(?!WARN \[#25010\])"
-                             "(?!WARN \[#25011\])"
-                             "(?!WARN \[#25012\])"
-                             "(?!WARN \[#25013\])"
-                             "(?!WARN \[#26038\])"
-                             "(?!WARN \[#39035\])"
-                             "(?!WARN \[#39122\])"
-                             "(?!WARN \[#39491\])"
+                             "(?!WARN \[#25010\])"  # noqa: W605
+                             "(?!WARN \[#25011\])"  # noqa: W605
+                             "(?!WARN \[#25012\])"  # noqa: W605
+                             "(?!WARN \[#25013\])"  # noqa: W605
+                             "(?!WARN \[#26038\])"  # noqa: W605
+                             "(?!WARN \[#39035\])"  # noqa: W605
+                             "(?!WARN \[#39122\])"  # noqa: W605
+                             "(?!WARN \[#39491\])"  # noqa: W605
                              "WARN .*"),
             ("flow_info", r"^  INFO .*")
         ]
diff --git a/vendor/lowrisc_ip/util/uvmdvgen/README.md b/vendor/lowrisc_ip/util/uvmdvgen/README.md
index 4c85d33620..14c965ce9b 100644
--- a/vendor/lowrisc_ip/util/uvmdvgen/README.md
+++ b/vendor/lowrisc_ip/util/uvmdvgen/README.md
@@ -104,7 +104,7 @@ IP. The following describes their contents in each source generated:
     This is the monitor component extended from `dv_base_monitor`. It provides
     the following items:
 
-    * `virtual protected task collect_trans(uvm_phase phase)`
+    * `virtual protected task collect_trans()`
 
         This is a shell task within which user is required to add logic to detect
         an event, sample the interface and create a transaction object and write
diff --git a/vendor/lowrisc_ip/util/uvmdvgen/agent.core.tpl b/vendor/lowrisc_ip/util/uvmdvgen/agent.core.tpl
index ab4975ca7f..09ea94c3a0 100644
--- a/vendor/lowrisc_ip/util/uvmdvgen/agent.core.tpl
+++ b/vendor/lowrisc_ip/util/uvmdvgen/agent.core.tpl
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "${vendor}:dv:${name}_agent:0.1"
diff --git a/vendor/lowrisc_ip/util/uvmdvgen/agent.sv.tpl b/vendor/lowrisc_ip/util/uvmdvgen/agent.sv.tpl
index e411358607..685e0a2a5f 100644
--- a/vendor/lowrisc_ip/util/uvmdvgen/agent.sv.tpl
+++ b/vendor/lowrisc_ip/util/uvmdvgen/agent.sv.tpl
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/util/uvmdvgen/agent_cfg.sv.tpl b/vendor/lowrisc_ip/util/uvmdvgen/agent_cfg.sv.tpl
index f693d57713..395801546c 100644
--- a/vendor/lowrisc_ip/util/uvmdvgen/agent_cfg.sv.tpl
+++ b/vendor/lowrisc_ip/util/uvmdvgen/agent_cfg.sv.tpl
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/util/uvmdvgen/agent_cov.sv.tpl b/vendor/lowrisc_ip/util/uvmdvgen/agent_cov.sv.tpl
index 91e48d4275..f0edb50231 100644
--- a/vendor/lowrisc_ip/util/uvmdvgen/agent_cov.sv.tpl
+++ b/vendor/lowrisc_ip/util/uvmdvgen/agent_cov.sv.tpl
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/util/uvmdvgen/agent_pkg.sv.tpl b/vendor/lowrisc_ip/util/uvmdvgen/agent_pkg.sv.tpl
index d8a64d9568..40debbe289 100644
--- a/vendor/lowrisc_ip/util/uvmdvgen/agent_pkg.sv.tpl
+++ b/vendor/lowrisc_ip/util/uvmdvgen/agent_pkg.sv.tpl
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/util/uvmdvgen/base_seq.sv.tpl b/vendor/lowrisc_ip/util/uvmdvgen/base_seq.sv.tpl
index bc4eea9b4d..3787244f98 100644
--- a/vendor/lowrisc_ip/util/uvmdvgen/base_seq.sv.tpl
+++ b/vendor/lowrisc_ip/util/uvmdvgen/base_seq.sv.tpl
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/util/uvmdvgen/base_test.sv.tpl b/vendor/lowrisc_ip/util/uvmdvgen/base_test.sv.tpl
index 177ee02e5f..7947d1f55b 100644
--- a/vendor/lowrisc_ip/util/uvmdvgen/base_test.sv.tpl
+++ b/vendor/lowrisc_ip/util/uvmdvgen/base_test.sv.tpl
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/util/uvmdvgen/base_vseq.sv.tpl b/vendor/lowrisc_ip/util/uvmdvgen/base_vseq.sv.tpl
index ce11bb9cd1..9601f1b91c 100644
--- a/vendor/lowrisc_ip/util/uvmdvgen/base_vseq.sv.tpl
+++ b/vendor/lowrisc_ip/util/uvmdvgen/base_vseq.sv.tpl
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/util/uvmdvgen/bind.sv.tpl b/vendor/lowrisc_ip/util/uvmdvgen/bind.sv.tpl
index 8440fad92b..053a8980b4 100644
--- a/vendor/lowrisc_ip/util/uvmdvgen/bind.sv.tpl
+++ b/vendor/lowrisc_ip/util/uvmdvgen/bind.sv.tpl
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/util/uvmdvgen/common_vseq.sv.tpl b/vendor/lowrisc_ip/util/uvmdvgen/common_vseq.sv.tpl
index 8a32d1803c..cc49f0bb03 100644
--- a/vendor/lowrisc_ip/util/uvmdvgen/common_vseq.sv.tpl
+++ b/vendor/lowrisc_ip/util/uvmdvgen/common_vseq.sv.tpl
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/util/uvmdvgen/cov_excl.el.tpl b/vendor/lowrisc_ip/util/uvmdvgen/cov_excl.el.tpl
index 18be5a7916..aca5bfa4aa 100644
--- a/vendor/lowrisc_ip/util/uvmdvgen/cov_excl.el.tpl
+++ b/vendor/lowrisc_ip/util/uvmdvgen/cov_excl.el.tpl
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/util/uvmdvgen/device_driver.sv.tpl b/vendor/lowrisc_ip/util/uvmdvgen/device_driver.sv.tpl
index ae46511d56..253a99ed8d 100644
--- a/vendor/lowrisc_ip/util/uvmdvgen/device_driver.sv.tpl
+++ b/vendor/lowrisc_ip/util/uvmdvgen/device_driver.sv.tpl
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/util/uvmdvgen/driver.sv.tpl b/vendor/lowrisc_ip/util/uvmdvgen/driver.sv.tpl
index 35ac143511..7522f36607 100644
--- a/vendor/lowrisc_ip/util/uvmdvgen/driver.sv.tpl
+++ b/vendor/lowrisc_ip/util/uvmdvgen/driver.sv.tpl
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/util/uvmdvgen/env.core.tpl b/vendor/lowrisc_ip/util/uvmdvgen/env.core.tpl
index 97f65ee548..4897900ac4 100644
--- a/vendor/lowrisc_ip/util/uvmdvgen/env.core.tpl
+++ b/vendor/lowrisc_ip/util/uvmdvgen/env.core.tpl
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "${vendor}:dv:${name}_env:0.1"
diff --git a/vendor/lowrisc_ip/util/uvmdvgen/env.sv.tpl b/vendor/lowrisc_ip/util/uvmdvgen/env.sv.tpl
index cb2f185342..c91ed05fe4 100644
--- a/vendor/lowrisc_ip/util/uvmdvgen/env.sv.tpl
+++ b/vendor/lowrisc_ip/util/uvmdvgen/env.sv.tpl
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/util/uvmdvgen/env_cfg.sv.tpl b/vendor/lowrisc_ip/util/uvmdvgen/env_cfg.sv.tpl
index 879dc51c2b..24a1efd1d0 100644
--- a/vendor/lowrisc_ip/util/uvmdvgen/env_cfg.sv.tpl
+++ b/vendor/lowrisc_ip/util/uvmdvgen/env_cfg.sv.tpl
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/util/uvmdvgen/env_cov.sv.tpl b/vendor/lowrisc_ip/util/uvmdvgen/env_cov.sv.tpl
index 18cd77c5b7..f7f9bbe053 100644
--- a/vendor/lowrisc_ip/util/uvmdvgen/env_cov.sv.tpl
+++ b/vendor/lowrisc_ip/util/uvmdvgen/env_cov.sv.tpl
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/util/uvmdvgen/env_pkg.sv.tpl b/vendor/lowrisc_ip/util/uvmdvgen/env_pkg.sv.tpl
index af451a3366..b589c6348e 100644
--- a/vendor/lowrisc_ip/util/uvmdvgen/env_pkg.sv.tpl
+++ b/vendor/lowrisc_ip/util/uvmdvgen/env_pkg.sv.tpl
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/util/uvmdvgen/gen_agent.py b/vendor/lowrisc_ip/util/uvmdvgen/gen_agent.py
index 56d772b106..ee81ae1453 100644
--- a/vendor/lowrisc_ip/util/uvmdvgen/gen_agent.py
+++ b/vendor/lowrisc_ip/util/uvmdvgen/gen_agent.py
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 """Generate SystemVerilog UVM agent extended freom our DV lib
diff --git a/vendor/lowrisc_ip/util/uvmdvgen/gen_env.py b/vendor/lowrisc_ip/util/uvmdvgen/gen_env.py
index 98b594399d..61c08b03fa 100644
--- a/vendor/lowrisc_ip/util/uvmdvgen/gen_env.py
+++ b/vendor/lowrisc_ip/util/uvmdvgen/gen_env.py
@@ -1,4 +1,4 @@
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 """Generate SystemVerilog UVM agent extended freom our DV lib
diff --git a/vendor/lowrisc_ip/util/uvmdvgen/host_driver.sv.tpl b/vendor/lowrisc_ip/util/uvmdvgen/host_driver.sv.tpl
index 08103e0bd9..a446593c2f 100644
--- a/vendor/lowrisc_ip/util/uvmdvgen/host_driver.sv.tpl
+++ b/vendor/lowrisc_ip/util/uvmdvgen/host_driver.sv.tpl
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/util/uvmdvgen/if.sv.tpl b/vendor/lowrisc_ip/util/uvmdvgen/if.sv.tpl
index 5f15a32b71..8b8100bd26 100644
--- a/vendor/lowrisc_ip/util/uvmdvgen/if.sv.tpl
+++ b/vendor/lowrisc_ip/util/uvmdvgen/if.sv.tpl
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/util/uvmdvgen/item.sv.tpl b/vendor/lowrisc_ip/util/uvmdvgen/item.sv.tpl
index 715c6d1535..7b1c643398 100644
--- a/vendor/lowrisc_ip/util/uvmdvgen/item.sv.tpl
+++ b/vendor/lowrisc_ip/util/uvmdvgen/item.sv.tpl
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/util/uvmdvgen/monitor.sv.tpl b/vendor/lowrisc_ip/util/uvmdvgen/monitor.sv.tpl
index df3d6e619f..d1b36025d5 100644
--- a/vendor/lowrisc_ip/util/uvmdvgen/monitor.sv.tpl
+++ b/vendor/lowrisc_ip/util/uvmdvgen/monitor.sv.tpl
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
@@ -25,7 +25,7 @@ class ${name}_monitor extends dv_base_monitor #(
   endtask
 
   // collect transactions forever - already forked in dv_base_monitor::run_phase
-  virtual protected task collect_trans(uvm_phase phase);
+  virtual protected task collect_trans();
     forever begin
       // TODO: detect event
 
diff --git a/vendor/lowrisc_ip/util/uvmdvgen/scoreboard.sv.tpl b/vendor/lowrisc_ip/util/uvmdvgen/scoreboard.sv.tpl
index d565c9d48f..5cfbcf330f 100644
--- a/vendor/lowrisc_ip/util/uvmdvgen/scoreboard.sv.tpl
+++ b/vendor/lowrisc_ip/util/uvmdvgen/scoreboard.sv.tpl
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/util/uvmdvgen/seq_list.sv.tpl b/vendor/lowrisc_ip/util/uvmdvgen/seq_list.sv.tpl
index 9b51507575..645dfa2425 100644
--- a/vendor/lowrisc_ip/util/uvmdvgen/seq_list.sv.tpl
+++ b/vendor/lowrisc_ip/util/uvmdvgen/seq_list.sv.tpl
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/util/uvmdvgen/sim.core.tpl b/vendor/lowrisc_ip/util/uvmdvgen/sim.core.tpl
index c65dc35ec3..0d83b39390 100644
--- a/vendor/lowrisc_ip/util/uvmdvgen/sim.core.tpl
+++ b/vendor/lowrisc_ip/util/uvmdvgen/sim.core.tpl
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "${vendor}:dv:${name}_sim:0.1"
diff --git a/vendor/lowrisc_ip/util/uvmdvgen/sim_cfg.hjson.tpl b/vendor/lowrisc_ip/util/uvmdvgen/sim_cfg.hjson.tpl
index 1aaa6047e1..879dc77e14 100644
--- a/vendor/lowrisc_ip/util/uvmdvgen/sim_cfg.hjson.tpl
+++ b/vendor/lowrisc_ip/util/uvmdvgen/sim_cfg.hjson.tpl
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 {
diff --git a/vendor/lowrisc_ip/util/uvmdvgen/smoke_vseq.sv.tpl b/vendor/lowrisc_ip/util/uvmdvgen/smoke_vseq.sv.tpl
index aaf859c26a..e78a24b959 100644
--- a/vendor/lowrisc_ip/util/uvmdvgen/smoke_vseq.sv.tpl
+++ b/vendor/lowrisc_ip/util/uvmdvgen/smoke_vseq.sv.tpl
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/util/uvmdvgen/sva.core.tpl b/vendor/lowrisc_ip/util/uvmdvgen/sva.core.tpl
index 9feae236a9..22dfffc1c0 100644
--- a/vendor/lowrisc_ip/util/uvmdvgen/sva.core.tpl
+++ b/vendor/lowrisc_ip/util/uvmdvgen/sva.core.tpl
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:dv:${name}_sva:0.1"
diff --git a/vendor/lowrisc_ip/util/uvmdvgen/tb.sv.tpl b/vendor/lowrisc_ip/util/uvmdvgen/tb.sv.tpl
index 97765f1235..79e9b7f0e1 100644
--- a/vendor/lowrisc_ip/util/uvmdvgen/tb.sv.tpl
+++ b/vendor/lowrisc_ip/util/uvmdvgen/tb.sv.tpl
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 //
diff --git a/vendor/lowrisc_ip/util/uvmdvgen/test.core.tpl b/vendor/lowrisc_ip/util/uvmdvgen/test.core.tpl
index a247cd7400..537da4993c 100644
--- a/vendor/lowrisc_ip/util/uvmdvgen/test.core.tpl
+++ b/vendor/lowrisc_ip/util/uvmdvgen/test.core.tpl
@@ -1,5 +1,5 @@
 CAPI=2:
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 name: "${vendor}:dv:${name}_test:0.1"
diff --git a/vendor/lowrisc_ip/util/uvmdvgen/test_pkg.sv.tpl b/vendor/lowrisc_ip/util/uvmdvgen/test_pkg.sv.tpl
index 3bd6ea563f..7316e7ca2b 100644
--- a/vendor/lowrisc_ip/util/uvmdvgen/test_pkg.sv.tpl
+++ b/vendor/lowrisc_ip/util/uvmdvgen/test_pkg.sv.tpl
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/util/uvmdvgen/testplan.hjson.tpl b/vendor/lowrisc_ip/util/uvmdvgen/testplan.hjson.tpl
index d63ca28dec..5a0fec8a54 100644
--- a/vendor/lowrisc_ip/util/uvmdvgen/testplan.hjson.tpl
+++ b/vendor/lowrisc_ip/util/uvmdvgen/testplan.hjson.tpl
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 {
diff --git a/vendor/lowrisc_ip/util/uvmdvgen/uvmdvgen.py b/vendor/lowrisc_ip/util/uvmdvgen/uvmdvgen.py
index 5cca559ddf..e804de6f6c 100755
--- a/vendor/lowrisc_ip/util/uvmdvgen/uvmdvgen.py
+++ b/vendor/lowrisc_ip/util/uvmdvgen/uvmdvgen.py
@@ -1,5 +1,5 @@
 #!/usr/bin/env python3
-# Copyright lowRISC contributors.
+# Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 r"""Command-line tool to generate boilerplate DV testbench.
diff --git a/vendor/lowrisc_ip/util/uvmdvgen/virtual_sequencer.sv.tpl b/vendor/lowrisc_ip/util/uvmdvgen/virtual_sequencer.sv.tpl
index e4cd3c429e..3ca0809a77 100644
--- a/vendor/lowrisc_ip/util/uvmdvgen/virtual_sequencer.sv.tpl
+++ b/vendor/lowrisc_ip/util/uvmdvgen/virtual_sequencer.sv.tpl
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
diff --git a/vendor/lowrisc_ip/util/uvmdvgen/vseq_list.sv.tpl b/vendor/lowrisc_ip/util/uvmdvgen/vseq_list.sv.tpl
index 1c99c1389a..4bc7068e96 100644
--- a/vendor/lowrisc_ip/util/uvmdvgen/vseq_list.sv.tpl
+++ b/vendor/lowrisc_ip/util/uvmdvgen/vseq_list.sv.tpl
@@ -1,4 +1,4 @@
-// Copyright lowRISC contributors.
+// Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0