From 3f77112828733b5df2097b749c3f7b3a74148e93 Mon Sep 17 00:00:00 2001
From: Harry Callahan <hcallahan@lowrisc.org>
Date: Wed, 18 Oct 2023 14:35:23 +0100
Subject: [PATCH] Fixup the questa build/sim command templates in
 rtl_simulation.yaml

We do not actively use or test these commands and tools, so they probably broke
some time ago.

Signed-off-by: Harry Callahan <hcallahan@lowrisc.org>
---
 dv/uvm/core_ibex/yaml/rtl_simulation.yaml | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/dv/uvm/core_ibex/yaml/rtl_simulation.yaml b/dv/uvm/core_ibex/yaml/rtl_simulation.yaml
index a973e7adc4..0bb363e13d 100644
--- a/dv/uvm/core_ibex/yaml/rtl_simulation.yaml
+++ b/dv/uvm/core_ibex/yaml/rtl_simulation.yaml
@@ -101,7 +101,7 @@
           +define+UVM
           -timescale \"1 ns / 1 ps \"
           -writetoplevels <tb_dir>/top.list
-          -l <tb_dir>/<rtl_log>
+          -l <tb_build_log>
           <cmp_opts>
   sim:
     cmd:
@@ -118,7 +118,7 @@
           +UVM_VERBOSITY=UVM_LOW
           +bin=<binary>
           +ibex_tracer_file_base=<rtl_trace>
-          -l <test_dir>/sim.log
+          -l <rtl_sim_log>
           <cov_opts>
     cov_opts: >-
       -do "coverage save -onexit <tb_dir>/cov.ucdb;"