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fill="#f5f5f5" stroke="#333333" stroke-miterlimit="10" pointer-events="all"/><path d="M 199 74 L 199 88 L 213 88" fill="none" stroke="#333333" stroke-miterlimit="10" pointer-events="all"/><g fill="#333333" font-family="Helvetica" font-size="11.999999999999998px"><text x="146.5" y="94.5">task.conf</text><text x="146.5" y="108.5">arch.xml</text><text x="146.5" y="122.5">softcore.v</text></g><rect x="17.5" y="69" width="100" height="25" rx="3.75" ry="3.75" fill="#cbd8eb" stroke="#000000" pointer-events="all"/><g fill="rgb(0, 0, 0)" font-family="Helvetica" text-anchor="middle" font-size="10.999999999999998px"><text x="67" y="85.5">OpenFPGA Tasks</text></g><rect x="17.5" y="134" width="100" height="25" rx="3.75" ry="3.75" fill="#cbd8eb" stroke="#000000" stroke-dasharray="2.9999999999999996 2.9999999999999996" pointer-events="all"/><g fill="rgb(0, 0, 0)" font-family="Helvetica" text-anchor="middle" font-size="10.999999999999998px"><text x="67" y="150.5">VPR Architecture</text></g><rect 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0)" font-family="Helvetica" text-anchor="middle" font-size="10.999999999999998px"><text x="284.5" y="225">Report Yosys &amp;</text><text x="284.5" y="238">VPR Results</text></g><rect x="347" y="209" width="90" height="37" rx="5.55" ry="5.55" fill="#c0d1bf" stroke="#000000" pointer-events="all"/><g fill="rgb(0, 0, 0)" font-family="Helvetica" text-anchor="middle" font-size="10.999999999999998px"><text x="391.5" y="225">Report Place</text><text x="391.5" y="238">Timing (.rpt)</text></g><rect x="240" y="258" width="90" height="37" rx="5.55" ry="5.55" fill="#c0d1bf" stroke="#000000" pointer-events="all"/><g fill="rgb(0, 0, 0)" font-family="Helvetica" text-anchor="middle" font-size="10.999999999999998px"><text x="284.5" y="280.5">...</text></g><rect x="460" y="179" width="235" height="140" fill="rgb(255, 255, 255)" stroke="#333333" pointer-events="all"/><g fill="#333333" font-family="Helvetica" font-size="10.999999999999998px"><text x="464.5" y="207.5">- Extract design blocks: LUT, BRAM, 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