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AMDGPU: Builtins & Codegen support for: v_cvt_scalef32_[f16|f32]_[bf8|fp8] #117739

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Commits on Nov 26, 2024

  1. AMDGPU: Builtins & Codegen support for: v_cvt_scalef32_[f16|f32]_[bf8…

    …|fp8]
    
    OPSEL[1:0] collectively decide which byte to read
    from src input.
    
    Builtin takes additional imm argument which
    represents index (with valid values:[0:3]) of src
    byte read. Out of bounds checks will added in next
    patch.
    
    OPSEL ASM Syntax: opsel:[x,y,z]
    where,
        opsel[x] = Inst{11} = src0_modifier{2}
        opsel[y] = Inst{12} = src1_modifier{2}
        opsel[z] = Inst{14} = src0_modifier{3}
    
    Note: Inst{13} i.e. OPSEL[2] is ignored in
    asm syntax and opsel[z] is meaningless
    for v_cvt_scalef32_f32_{fp|bf}8
    
    Co-authored-by: Pravin Jagtap <[email protected]>
    pravinjagtap authored and arsenm committed Nov 26, 2024
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