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top.sdc
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top.sdc
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# setup violation .686 (ram15.v)
# setup violation .242 (ram14.v)
#**************************************************************
# This .sbc file is created by Terasic Tool.
# Users are recommended to modify this file to match users logic.
#**************************************************************
#**************************************************************
# Create Clock
#**************************************************************
create_clock -period 20 [get_ports OSC_50]
#**************************************************************
# Create Generated Clock
#**************************************************************
derive_pll_clocks
#**************************************************************
# Set Clock Latency
#**************************************************************
#**************************************************************
# Set Clock Uncertainty
#**************************************************************
derive_clock_uncertainty
#**************************************************************
# Set Input Delay
#**************************************************************
#**************************************************************
# Set Output Delay
#**************************************************************
#**************************************************************
# Set Clock Groups
#**************************************************************
#**************************************************************
# Set False Path
#**************************************************************
#**************************************************************
# Set Multicycle Path
#**************************************************************
#**************************************************************
# Set Maximum Delay
#**************************************************************
#**************************************************************
# Set Minimum Delay
#**************************************************************
#**************************************************************
# Set Input Transition
#**************************************************************
#**************************************************************
# Set Load
#**************************************************************
############################# from e100/top.sdc for DE2 #############################
# Configuration for TimeQuest timing analyzer
# Multicycle paths
set_multicycle_path -end -setup -to [get_keepers {*div_out_reg*}] 13
set_multicycle_path -end -hold -to [get_keepers {*div_out_reg*}] 12
set_multicycle_path -end -setup -to [get_keepers {*mult_out_reg*}] 2
set_multicycle_path -end -hold -to [get_keepers {*mult_out_reg*}] 1
# Cuts
set_false_path -from [get_keepers {*}] -to [get_keepers {*sync_reg_out*}]
set_false_path -from [get_keepers {ram:u28*}] -to [get_keepers {ram:u28*}]