From f899985f71950a2b09e17eb2b248cd3b7efbd51d Mon Sep 17 00:00:00 2001 From: jstalex <90794457+jstalex@users.noreply.github.com> Date: Wed, 14 Dec 2022 22:02:09 +0300 Subject: [PATCH] remove old files --- aps_.srcs/sim_1/new/top_tb.sv | 24 --- aps_.srcs/sources_1/new/cpu_top.sv | 179 ------------------ aps_.srcs/sources_1/new/data_memory.sv | 23 --- aps_.srcs/sources_1/new/instruction_memory.sv | 19 -- aps_.xpr | 32 ---- 5 files changed, 277 deletions(-) delete mode 100644 aps_.srcs/sim_1/new/top_tb.sv delete mode 100644 aps_.srcs/sources_1/new/cpu_top.sv delete mode 100644 aps_.srcs/sources_1/new/data_memory.sv delete mode 100644 aps_.srcs/sources_1/new/instruction_memory.sv diff --git a/aps_.srcs/sim_1/new/top_tb.sv b/aps_.srcs/sim_1/new/top_tb.sv deleted file mode 100644 index 6df690b..0000000 --- a/aps_.srcs/sim_1/new/top_tb.sv +++ /dev/null @@ -1,24 +0,0 @@ -`timescale 1ns / 1ps - -module top_tb(); - -parameter PERIOD = 10; - -logic CLK; -logic rst; - -always begin - CLK = 1'b0; - #(PERIOD/2) CLK = 1'b1; - #(PERIOD/2); -end - -cpu_top dut(.CLK100MHZ(CLK), .rst(rst)); - -initial begin - rst <= 1; - #20; - rst <= 0; -end - -endmodule diff --git a/aps_.srcs/sources_1/new/cpu_top.sv b/aps_.srcs/sources_1/new/cpu_top.sv deleted file mode 100644 index b4c87b9..0000000 --- a/aps_.srcs/sources_1/new/cpu_top.sv +++ /dev/null @@ -1,179 +0,0 @@ -`timescale 1ns / 1ps -`include "defines_riscv.v" - -module cpu_top ( - input CLK100MHZ, - input rst -); - -logic [`WORD_LEN-1:0] instruction; - -// main decoder connection -logic [1:0] ex_op_a_sel_o; -logic [2:0] ex_op_b_sel_o; -logic [`ALU_OP_WIDTH-1:0] alu_op_o; -logic mem_req_o; -logic mem_we_o; -logic [2:0] mem_size_o; - -logic gpr_we_a_o; -logic wb_src_sel_o; - -logic illegal_instr_o; -logic branch_o; -logic jal_o; -logic jalr_o; - -decoder_riscv main_decoder ( - .fetched_instr_i(instruction), - - .ex_op_a_sel_o(ex_op_a_sel_o), - .ex_op_b_sel_o(ex_op_b_sel_o), - .alu_op_o(alu_op_o), - - .mem_req_o (mem_req_o), - .mem_we_o (mem_we_o), - .mem_size_o(mem_size_o), - - .gpr_we_a_o (gpr_we_a_o), - .wb_src_sel_o(wb_src_sel_o), - - .illegal_instr_o(illegal_instr_o), - .branch_o(branch_o), - .jal_o(jal_o), - .jalr_o(jalr_o) -); - -// sign-extenders for I, S, J, B - -logic [`WORD_LEN-1:0] imm_I; -assign imm_I = {{(`WORD_LEN - 12) {instruction[31]}}, instruction[`I_TYPE_IMM]}; - -logic [`WORD_LEN-1:0] imm_S; -assign imm_S = {{(`WORD_LEN - 12) {instruction[31]}}, instruction[`S_TYPE_IMM_11_5], instruction[`S_TYPE_IMM_4_0]}; - -logic [`WORD_LEN-1:0] imm_J; -assign imm_J = {{(`WORD_LEN - 21) {instruction[31]}}, - instruction[`J_TYPE_IMM_20], - instruction[`J_TYPE_IMM_19_12], - instruction[`J_TYPE_IMM_11], - instruction[`J_TYPE_IMM_10_1], - 1'b0 -}; - -logic [`WORD_LEN-1:0] imm_B; -assign imm_B = {{(`WORD_LEN - 13) {instruction[31]}}, - instruction[`B_TYPE_IMM_12], - instruction[`B_TYPE_IMM_11], - instruction[`B_TYPE_IMM_10_5], - instruction[`B_TYPE_IMM_4_1], - 1'b0 -}; - -// alu -logic ALU_flag; -logic [`WORD_LEN-1:0] ALU_res; -// pc -// parameter COUNTER_WIDTH = $clog2(`INSTR_DEPTH); -logic [`WORD_LEN-1:0] PC; - -// switches -//logic [`WORD_LEN-1:0] extended_switch; -//assign extended_switch = {{(`WORD_LEN - 15) {SW[14]}}, SW[14:0]}; - -// instruction memory -instruction_memory im( - .A(PC), - .D(instruction) -); -// constant -//logic [`WORD_LEN-1:0] extended_const; -// assign extended_const = {{(`WORD_LEN - `CONST_LEN) {instruction[`CONST+(`CONST_LEN-1)]}},instruction[`CONST]}; -// rf - -logic [`WORD_LEN-1:0] memory_rd; // read data form data memory - -logic [`WORD_LEN-1:0] rd1; -logic [`WORD_LEN-1:0] rd2; -logic [`WORD_LEN-1:0] wd; - -// wd multiplexer -always_comb begin - case (wb_src_sel_o) - `WB_EX_RESULT: wd <= ALU_res; - `WB_LSU_DATA: wd <= memory_rd; - default: wd <= 0; - endcase -end - -// connection -rf_riscv rf ( - .clk (CLK100MHZ), - .adr_1(instruction[`RA1]), - .adr_2(instruction[`RA2]), - .adr_3(instruction[`WA]), - .wd (wd), - .we (gpr_we_a_o), - .rd_1(rd1), - .rd_2(rd2) -); - -// PC -logic [`WORD_LEN-1:0] pc_inc; -logic [`WORD_LEN-1:0] pc_inc_imm; -// muxes for pc -assign pc_inc_imm = branch_o ? imm_B : imm_J; -assign pc_inc = (jal_o || (branch_o && ALU_flag)) ? pc_inc_imm : 4; - -always_ff @(posedge CLK100MHZ or posedge rst) begin - if (rst) PC <= 0; - else begin - if (jalr_o) PC <= rd1 + imm_I; - else PC = PC + pc_inc; - end -end - -// ALU -logic [`WORD_LEN-1:0] alu_A; -logic [`WORD_LEN-1:0] alu_B; - -// select A operand -always_comb begin - case (ex_op_a_sel_o) - `OP_A_RS1: alu_A <= rd1; - `OP_A_CURR_PC: alu_A <= PC; - `OP_A_ZERO: alu_A <= 0; - default: alu_A <= 0; - endcase -end - -// select B operand -always_comb begin - case (ex_op_b_sel_o) - `OP_B_RS2: alu_B <= rd2; - `OP_B_IMM_I: alu_B <= imm_I; - `OP_B_IMM_U: alu_B <= {instruction[`U_TYPE_IMM_31_12], {(`WORD_LEN - 20) {1'b0}}}; - `OP_B_IMM_S: alu_B <= imm_S; - `OP_B_INCR: alu_B <= 4; - default: alu_B <= 0; - endcase -end - -alu_riscv alu ( - .A(alu_A), - .B(alu_B), - .ALUOp(alu_op_o), - .Flag (ALU_flag), - .Result(ALU_res) -); - -//assign LED[15:0] = rd1[15:0]; -data_memory memory ( - .CLK(CLK100MHZ), - .A(ALU_res), - .WD(rd2), - .WE(mem_we_o), - .RD(memory_rd) -); - -endmodule diff --git a/aps_.srcs/sources_1/new/data_memory.sv b/aps_.srcs/sources_1/new/data_memory.sv deleted file mode 100644 index b1bf3a2..0000000 --- a/aps_.srcs/sources_1/new/data_memory.sv +++ /dev/null @@ -1,23 +0,0 @@ -`timescale 1ns / 1ps - -module data_memory#( - parameter WIDTH = 32, - parameter DEPTH = 256 - )( - input logic CLK, - input logic [`WORD_LEN-1:0] A, - input logic [WIDTH-1:0] WD, - input logic WE, - output logic [WIDTH-1:0] RD - ); - -logic [WIDTH-1:0] RAM [0:DEPTH-1]; - -initial $readmemh("mem-init.txt", RAM); - -assign RD = RAM[A[9:2]]; - -always_ff @(posedge CLK) - if (WE) RAM [A[9:2]] <= WD; - -endmodule diff --git a/aps_.srcs/sources_1/new/instruction_memory.sv b/aps_.srcs/sources_1/new/instruction_memory.sv deleted file mode 100644 index d413461..0000000 --- a/aps_.srcs/sources_1/new/instruction_memory.sv +++ /dev/null @@ -1,19 +0,0 @@ -`timescale 1ns / 1ps - -module instruction_memory #( - int WIDTH = 32, - int DEPTH = 256 -)( - input [`WORD_LEN - 1:0] A, - output [WIDTH-1:0] D -); - -logic [WIDTH-1:0]ROM[0:DEPTH-1]; -initial $readmemh("prog.txt", ROM, 0, DEPTH-1); - -logic [`WORD_LEN - 1:0] shifted_adress; -assign shifted_adress = A >> 2; - -assign D = ROM[shifted_adress[7:0]]; - -endmodule diff --git a/aps_.xpr b/aps_.xpr index a948b0c..def812d 100644 --- a/aps_.xpr +++ b/aps_.xpr @@ -93,22 +93,6 @@ - - - - - - - - - - - - - - - - @@ -116,13 +100,6 @@ - - - - - - - @@ -196,15 +173,6 @@ - - - - - - - - -