From 8f86784f7b15372cfdd88357a208e627281d73d9 Mon Sep 17 00:00:00 2001
From: bitpdg <pdg@bit4id.com>
Date: Thu, 21 Jan 2021 07:43:41 -0800
Subject: [PATCH] fix issue #15

---
 cie-pkcs11/CSP/IAS.cpp     | 8 ++++++--
 cie-pkcs11/CSP/IAS.h       | 3 ++-
 cie-pkcs11/PKCS11/Slot.cpp | 4 ++++
 3 files changed, 12 insertions(+), 3 deletions(-)

diff --git a/cie-pkcs11/CSP/IAS.cpp b/cie-pkcs11/CSP/IAS.cpp
index 5304fa00..0054b93c 100644
--- a/cie-pkcs11/CSP/IAS.cpp
+++ b/cie-pkcs11/CSP/IAS.cpp
@@ -266,11 +266,13 @@ uint8_t NXP_ATR[] = { 0x80, 0x31, 0x80, 0x65, 0x49, 0x54, 0x4E, 0x58, 0x50, 0x12
 uint8_t Gemalto_ATR[] = { 0x80, 0x31, 0x80, 0x65, 0xB0, 0x85, 0x04, 0x00, 0x11, 0x12, 0x0F, 0xFF, 0x82, 0x90, 0x00 };
 uint8_t Gemalto2_ATR[] = { 0x80, 0x31, 0x80, 0x65, 0xB0, 0x85, 0x03, 0x00, 0xEF, 0x12, 0x0F, 0xFF, 0x82, 0x90, 0x00 };
 uint8_t STM_ATR[] = {0x80, 0x66, 0x47, 0x50, 0x00, 0xB8, 0x00, 0x7F};
+uint8_t STM2_ATR[] = { 0x80, 0x80, 0x01, 0x01 };
 
 ByteArray baNXP_ATR(NXP_ATR, sizeof(NXP_ATR));
 ByteArray baGemalto_ATR(Gemalto_ATR, sizeof(Gemalto_ATR));
 ByteArray baGemalto2_ATR(Gemalto2_ATR, sizeof(Gemalto2_ATR));
 ByteArray baSTM_ATR(STM_ATR, sizeof(STM_ATR));
+ByteArray baSTM2_ATR(STM2_ATR, sizeof(STM2_ATR));
 
 void IAS::ReadCIEType() {	
 	init_func
@@ -283,6 +285,8 @@ void IAS::ReadCIEType() {
 		type = CIE_Type::CIE_Gemalto;
     else if (ATR.indexOf(baSTM_ATR, position))
             type = CIE_Type::CIE_STM;
+    else if (ATR.indexOf(baSTM2_ATR, position))
+            type = CIE_Type::CIE_STM2;
 	else
 		throw logged_error("CIE non riconosciuta");
 }
@@ -311,7 +315,7 @@ void IAS::SelectAID_IAS(bool SM) {
                 throw scard_error(sw);
         }
     }
-    else if (type == CIE_Type::CIE_Gemalto || type == CIE_Type::CIE_STM)
+    else if (type == CIE_Type::CIE_Gemalto || type == CIE_Type::CIE_STM  || type == CIE_Type::CIE_STM2)
     {
         uint8_t selectIAS[] = { 0x00, 0xa4, 0x04, 0x0c };
         if (SM)
@@ -996,7 +1000,7 @@ void IAS::InitDHParam() {
 		dh_p = parser.tags[0]->tags[0]->tags[0]->tags[1]->content;
 		dh_q = parser.tags[0]->tags[0]->tags[0]->tags[2]->content;
 	}
-	else if (type == CIE_Type::CIE_NXP || type == CIE_Type::CIE_STM) {
+	else if (type == CIE_Type::CIE_NXP || type == CIE_Type::CIE_STM || type == CIE_Type::CIE_STM2) {
 		uint8_t getDHDoup[] = { 00, 0xcb, 0x3f, 0xff };
 		uint8_t getDHDuopData_g[] = { 0x4D, 0x0A, 0x70, 0x08, 0xBF, 0xA1, 0x01, 0x04, 0xA3, 0x02, 0x97, 0x00 };
 
diff --git a/cie-pkcs11/CSP/IAS.h b/cie-pkcs11/CSP/IAS.h
index 0f075fc3..577aeebd 100644
--- a/cie-pkcs11/CSP/IAS.h
+++ b/cie-pkcs11/CSP/IAS.h
@@ -23,7 +23,8 @@ enum CIE_Type {
 	CIE_Unknown,
 	CIE_Gemalto,
 	CIE_NXP,
-	CIE_STM
+	CIE_STM,
+	CIE_STM2
 };
 
 enum CIE_DF {
diff --git a/cie-pkcs11/PKCS11/Slot.cpp b/cie-pkcs11/PKCS11/Slot.cpp
index 1ff05156..b0242345 100755
--- a/cie-pkcs11/PKCS11/Slot.cpp
+++ b/cie-pkcs11/PKCS11/Slot.cpp
@@ -20,11 +20,13 @@ extern uint8_t NXP_ATR[];
 extern uint8_t Gemalto_ATR[];
 extern uint8_t Gemalto2_ATR[];
 extern uint8_t STM_ATR[];
+extern uint8_t STM2_ATR[];
 
 extern ByteArray baNXP_ATR;
 extern ByteArray baGemalto_ATR;
 extern ByteArray baGemalto2_ATR;
 extern ByteArray baSTM_ATR;
+extern ByteArray baSTM2_ATR;
 
 namespace p11 {
 
@@ -405,6 +407,8 @@ namespace p11 {
 			manifacturer = "Gemalto";
         else if ((baATR.indexOf(baSTM_ATR, position)))
             manifacturer = "STM";
+        else if ((baATR.indexOf(baSTM2_ATR, position)))
+            manifacturer = "STM2";
 		else
 			throw p11_error(CKR_TOKEN_NOT_RECOGNIZED);