From dc9c16ec7ca1151fcc0e04677a2c06f32132af84 Mon Sep 17 00:00:00 2001
From: Alex Baden <alexander.baden@intel.com>
Date: Tue, 3 Dec 2024 01:37:43 +0000
Subject: [PATCH] address review comments

---
 .../intel/lib/LLVMIR/LLVMIRFreezeMaskedDivRem.cpp        | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/third_party/intel/lib/LLVMIR/LLVMIRFreezeMaskedDivRem.cpp b/third_party/intel/lib/LLVMIR/LLVMIRFreezeMaskedDivRem.cpp
index 3d860c045b..5344f92d70 100644
--- a/third_party/intel/lib/LLVMIR/LLVMIRFreezeMaskedDivRem.cpp
+++ b/third_party/intel/lib/LLVMIR/LLVMIRFreezeMaskedDivRem.cpp
@@ -6,8 +6,8 @@
 
 using namespace llvm;
 
-static bool processPhiNode(BasicBlock &BB, PHINode *PhiNode) {
-  if (!any_of(PhiNode->incoming_values(), [](Use &U) {
+static bool processPhiNode(PHINode *PhiNode) {
+  if (none_of(PhiNode->incoming_values(), [](Use &U) {
         Constant *C = dyn_cast<Constant>(&U);
         return isa<UndefValue>(U) || C && C->isNullValue();
       })) {
@@ -15,7 +15,8 @@ static bool processPhiNode(BasicBlock &BB, PHINode *PhiNode) {
   }
 
   bool Changed = false;
-  for (Instruction &I : BB) {
+  BasicBlock *BB = const_cast<BasicBlock *>(PhiNode->getParent());
+  for (Instruction &I : *BB) {
     if (I.getOpcode() == Instruction::SDiv ||
         I.getOpcode() == Instruction::SRem) {
       const size_t OpIdx = 1;
@@ -35,7 +36,7 @@ static bool runOnFunction(Function &F) {
 
   for (BasicBlock &BB : F) {
     for (PHINode &PhiNode : BB.phis()) {
-      Changed |= processPhiNode(BB, &PhiNode);
+      Changed |= processPhiNode(&PhiNode);
     }
   }