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IceFun.core
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IceFun.core
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CAPI=2:
name : ::IceFun:0
description: Murax soc for IceFun fpga board
filesets:
rtl:
files:
MuraxIceFun:
files:
- data/IceFun/io.pcf : {file_type : PCF}
- rtl/IceFun/MuraxIceFunSoc.v : {file_type : verilogSource}
- rtl/IceFun/ice40pll.v : {file_type : verilogSource}
- rtl/IceFun/MuraxIceFunSoc.v_toplevel_murax_system_ram_ram_symbol0.bin : { is_include_file : true}
- rtl/IceFun/MuraxIceFunSoc.v_toplevel_murax_system_ram_ram_symbol1.bin : { is_include_file : true}
- rtl/IceFun/MuraxIceFunSoc.v_toplevel_murax_system_ram_ram_symbol2.bin : { is_include_file : true}
- rtl/IceFun/MuraxIceFunSoc.v_toplevel_murax_system_ram_ram_symbol3.bin : { is_include_file : true}
# - rtl/IceFun/MuraxIceFunSoc.v_toplevel_murax_system_ram_ram_symbol0.hex : { copyto : MuraxIceFunSoc.v_toplevel_murax_system_ram_ram_symbol0.bin}
# - rtl/IceFun/MuraxIceFunSoc.v_toplevel_murax_system_ram_ram_symbol1.hex : { copyto : MuraxIceFunSoc.v_toplevel_murax_system_ram_ram_symbol1.bin}
# - rtl/IceFun/MuraxIceFunSoc.v_toplevel_murax_system_ram_ram_symbol2.hex : { copyto : MuraxIceFunSoc.v_toplevel_murax_system_ram_ram_symbol2.bin}
# - rtl/IceFun/MuraxIceFunSoc.v_toplevel_murax_system_ram_ram_symbol3.hex : { copyto : MuraxIceFunSoc.v_toplevel_murax_system_ram_ram_symbol3.bin}
- rtl/IceFun/MuraxIceFunSoc.v_toplevel_murax_system_ram_ram_symbol0.hex : { copyto : IceFun/MuraxIceFunSoc.v_toplevel_murax_system_ram_ram_symbol0.hex}
- rtl/IceFun/MuraxIceFunSoc.v_toplevel_murax_system_ram_ram_symbol1.hex : { copyto : IceFun/MuraxIceFunSoc.v_toplevel_murax_system_ram_ram_symbol1.hex}
- rtl/IceFun/MuraxIceFunSoc.v_toplevel_murax_system_ram_ram_symbol2.hex : { copyto : IceFun/MuraxIceFunSoc.v_toplevel_murax_system_ram_ram_symbol2.hex}
- rtl/IceFun/MuraxIceFunSoc.v_toplevel_murax_system_ram_ram_symbol3.hex : { copyto : IceFun/MuraxIceFunSoc.v_toplevel_murax_system_ram_ram_symbol3.hex}
MuraxIceFunSim:
files:
- rtl/IceFun/MuraxIceFunSocSim.v : {file_type : verilogSource}
- bench/IceFun/MuraxSimulation.cpp : {file_type : cppSource}
- rtl/IceFun/MuraxIceFunSoc.v_toplevel_murax_system_ram_ram_symbol0.bin : { copyto : MuraxIceFunSocSim.v_toplevel_murax_system_ram_ram_symbol0.bin }
- rtl/IceFun/MuraxIceFunSoc.v_toplevel_murax_system_ram_ram_symbol1.bin : { copyto : MuraxIceFunSocSim.v_toplevel_murax_system_ram_ram_symbol1.bin }
- rtl/IceFun/MuraxIceFunSoc.v_toplevel_murax_system_ram_ram_symbol2.bin : { copyto : MuraxIceFunSocSim.v_toplevel_murax_system_ram_ram_symbol2.bin }
- rtl/IceFun/MuraxIceFunSoc.v_toplevel_murax_system_ram_ram_symbol3.bin : { copyto : MuraxIceFunSocSim.v_toplevel_murax_system_ram_ram_symbol3.bin }
targets:
MuraxIceFun:
default_tool: icestorm
filesets: [rtl,MuraxIceFun]
tools:
icestorm:
nextpnr_options : [--hx8k, --package, cb132, --freq, 48 ,--opt-timing,--pcf-allow-unconstrained]
pnr: next
toplevel : MuraxIceFunSoc
MuraxIceFunSim:
default_tool: verilator
filesets: [rtl,MuraxIceFunSim]
tools:
verilator:
verilator_options : [--trace-fst,-Wno-fatal,-Wno-WIDTH,-Od]
toplevel: MuraxIceFunSocSim