From e5ca1055092c0ecd6532f2fd37e133bb7e0e0dfd Mon Sep 17 00:00:00 2001 From: betahxy Date: Fri, 22 Dec 2023 00:10:00 -0500 Subject: [PATCH 01/60] add vmx virtio-net support for Composite --- composition_scripts/simple_vmm.toml | 17 + src/components/Makefile.dependencies | 2 +- src/components/cidl/calculate_dependencies.py | 2 +- .../implementation/nicmgr/dpdk/init.c | 66 +- .../implementation/nicmgr/dpdk/nicmgr.c | 8 +- .../simple_mc_udp_server_no_lwip/main.c | 2 +- .../simple_mc_udp_server_with_lwip/main.c | 2 +- .../implementation/simple_nf/Makefile | 18 + .../simple_nf/simple_nf1/Makefile | 18 + .../simple_nf/simple_nf1/main.c | 63 + .../pingpong/main.c | 2 +- .../simple_tcp_echo_server.c | 2 +- .../simple_udp_echo_server_nolwip/main.c | 2 +- .../simple_udp_echo_server_with_lwip/main.c | 2 +- .../implementation/simple_vmm/vm_dev.md | 2 + .../implementation/simple_vmm/vmm/Makefile | 6 +- .../simple_vmm/vmm/acrn_common.h | 797 ++++++++++ .../simple_vmm/vmm/acrn_types.h | 3 + .../implementation/simple_vmm/vmm/apicreg.h | 2 +- .../implementation/simple_vmm/vmm/cpu.h | 1 + .../simple_vmm/vmm/devices/serial/serial.c | 13 +- .../vmm/devices/vpci/virtio_net_io.c | 296 ++-- .../vmm/devices/vpci/virtio_net_io.h | 8 +- .../simple_vmm/vmm/devices/vpci/vpci.c | 1 + .../simple_vmm/vmm/devices/vpic/vpic.c | 17 + .../simple_vmm/vmm/devices/vpic/vpic.h | 2 + .../simple_vmm/vmm/devices/vrtc/vrtc.c | 1 - .../simple_vmm/vmm/instr_emul.c | 1381 +++++++++++++++++ .../simple_vmm/vmm/instr_emul.h | 95 ++ .../implementation/simple_vmm/vmm/ioapic.h | 99 ++ .../implementation/simple_vmm/vmm/irq.h | 136 ++ .../implementation/simple_vmm/vmm/netio.c | 42 + .../simple_vmm/vmm/simple_vmm.c | 69 +- .../implementation/simple_vmm/vmm/vio.c | 2 + .../implementation/simple_vmm/vmm/vioapic.c | 564 +++++++ .../implementation/simple_vmm/vmm/vioapic.h | 128 ++ .../implementation/simple_vmm/vmm/vlapic.c | 374 +++-- .../implementation/simple_vmm/vmm/vlapic.h | 4 +- .../implementation/simple_vmm/vmm/vmmio.c | 53 + .../implementation/simple_vmm/vmm/vmsr.c | 6 +- src/components/interface/netio/Makefile | 30 + src/components/interface/netio/netio.h | 13 + src/components/interface/netio/stubs/Makefile | 1 + src/components/interface/netio/stubs/c_stub.c | 16 + src/components/interface/netio/stubs/s_stub.c | 7 + src/components/interface/netio/stubs/stubs.S | 5 + src/components/interface/netshmem/lib.c | 9 +- src/components/interface/netshmem/netshmem.h | 4 +- .../lib/dpdk/adapter/cos_dpdk_adapter.c | 1 + src/components/lib/dpdk/cos_dpdk.c | 6 +- src/components/lib/dpdk/cos_dpdk.h | 3 +- src/components/lib/slm/quantum.c | 3 +- src/components/lib/vmrt/doc.md | 4 +- src/components/lib/vmrt/vmrt.c | 78 +- src/components/lib/vmrt/vmrt.h | 22 +- src/kernel/capinv.c | 11 + src/kernel/include/chal.h | 1 + src/kernel/include/shared/cos_types.h | 24 +- src/platform/i386/chal.c | 6 + src/platform/i386/chal/chal_config.h | 5 +- src/platform/i386/chal/shared/cos_config.h | 1 + src/platform/i386/chal_cpu.h | 4 +- src/platform/i386/idt.c | 1 + src/platform/i386/isr.h | 1 + src/platform/i386/kernel.h | 1 + src/platform/i386/lapic.c | 12 + src/platform/x86_64/entry.S | 1 + src/platform/x86_64/vmx/include/vmx.h | 6 + src/platform/x86_64/vmx/include/vmx_vmcs.h | 2 +- src/platform/x86_64/vmx/vmx.c | 9 +- src/platform/x86_64/vmx/vmx_exit.c | 42 +- tools/run.sh | 4 +- 72 files changed, 4194 insertions(+), 447 deletions(-) create mode 100644 src/components/implementation/simple_nf/Makefile create mode 100644 src/components/implementation/simple_nf/simple_nf1/Makefile create mode 100644 src/components/implementation/simple_nf/simple_nf1/main.c create mode 100644 src/components/implementation/simple_vmm/vmm/acrn_common.h create mode 100644 src/components/implementation/simple_vmm/vmm/instr_emul.c create mode 100644 src/components/implementation/simple_vmm/vmm/instr_emul.h create mode 100644 src/components/implementation/simple_vmm/vmm/ioapic.h create mode 100644 src/components/implementation/simple_vmm/vmm/irq.h create mode 100644 src/components/implementation/simple_vmm/vmm/netio.c create mode 100644 src/components/implementation/simple_vmm/vmm/vioapic.c create mode 100644 src/components/implementation/simple_vmm/vmm/vioapic.h create mode 100644 src/components/implementation/simple_vmm/vmm/vmmio.c create mode 100644 src/components/interface/netio/Makefile create mode 100644 src/components/interface/netio/netio.h create mode 100644 src/components/interface/netio/stubs/Makefile create mode 100644 src/components/interface/netio/stubs/c_stub.c create mode 100644 src/components/interface/netio/stubs/s_stub.c create mode 100644 src/components/interface/netio/stubs/stubs.S diff --git a/composition_scripts/simple_vmm.toml b/composition_scripts/simple_vmm.toml index 6a448f5d66..359068b482 100644 --- a/composition_scripts/simple_vmm.toml +++ b/composition_scripts/simple_vmm.toml @@ -24,8 +24,25 @@ implements = [{interface = "sched"}, {interface = "syncipc"}, {interface = "init constructor = "booter" baseaddr = "0x1600000" +[[components]] +name = "nicmgr" +img = "nicmgr.dpdk" +deps = [{srv = "sched", interface = "sched"}, {srv = "sched", interface = "init"}, {srv = "capmgr", interface = "capmgr_create"}, {srv = "capmgr", interface = "memmgr"}, {srv = "capmgr", interface = "contigmem"}] +implements = [{interface = "nic"}] +constructor = "booter" +baseaddr = "0x6000000" + [[components]] name = "vmm" img = "simple_vmm.vmm" deps = [{srv = "sched", interface = "sched"}, {srv = "sched", interface = "init"},{srv = "capmgr", interface = "capmgr"}, {srv = "capmgr", interface = "memmgr"}, {srv = "capmgr", interface = "contigmem"}] +implements = [{interface = "netio"}] +constructor = "booter" +baseaddr = "0x2000000" + +[[components]] +name = "simple_nf1" +img = "simple_nf.simple_nf1" +deps = [{srv = "sched", interface = "sched"}, {srv = "sched", interface = "init"},{srv = "capmgr", interface = "capmgr_create"}, {srv = "capmgr", interface = "memmgr"}, {srv = "capmgr", interface = "contigmem"}, {srv = "nicmgr", interface = "nic"}, {srv = "vmm", interface = "netio"}] constructor = "booter" +baseaddr = "0x9000000" diff --git a/src/components/Makefile.dependencies b/src/components/Makefile.dependencies index 179035422a..be88894fa1 100644 --- a/src/components/Makefile.dependencies +++ b/src/components/Makefile.dependencies @@ -1,6 +1,6 @@ include Makefile.src Makefile.comp -CALC_DEPS_SCRIPT = python2.7 $(CDIR)cidl/calculate_dependencies.py $(shell pwd)/ $(CDIR) +CALC_DEPS_SCRIPT = python3 $(CDIR)cidl/calculate_dependencies.py $(shell pwd)/ $(CDIR) LIBRARY_DEP_LIST =$(strip $(shell $(CALC_DEPS_SCRIPT) libdeps)) INTERFACE_DEP_LIST =$(strip $(shell $(CALC_DEPS_SCRIPT) ifdeps)) # List of -L library paths diff --git a/src/components/cidl/calculate_dependencies.py b/src/components/cidl/calculate_dependencies.py index ab128d2e89..7fbdfa30a3 100644 --- a/src/components/cidl/calculate_dependencies.py +++ b/src/components/cidl/calculate_dependencies.py @@ -1,4 +1,4 @@ -#!/usr/bin/python2.7 +#!/usr/bin/python3 import re import sys diff --git a/src/components/implementation/nicmgr/dpdk/init.c b/src/components/implementation/nicmgr/dpdk/init.c index 0685ddb8e9..04bbf37301 100644 --- a/src/components/implementation/nicmgr/dpdk/init.c +++ b/src/components/implementation/nicmgr/dpdk/init.c @@ -170,66 +170,38 @@ process_rx_packets(cos_portid_t port_id, char** rx_pkts, uint16_t nb_pkts) int i, ret; int len = 0; - struct eth_hdr *eth; struct ip_hdr *iph; struct arp_hdr *arp_hdr; struct tcp_udp_port *port; struct client_session *session; - char *pkt; struct pkt_buf buf; for (i = 0; i < nb_pkts; i++) { - pkt = cos_get_packet(rx_pkts[i], &len); - eth = (struct eth_hdr *)pkt; + cos_get_packet(rx_pkts[i], &len); - if (htons(eth->ether_type) == 0x0800) { - iph = (struct ip_hdr *)((char *)eth + sizeof(struct eth_hdr)); - if (unlikely(iph->proto != UDP_PROTO)) { - // assert(0); - cos_free_packet(rx_pkts[i]); - rx_enqueued_miss++; - continue; - } - port = (struct tcp_udp_port *)((char *)eth + sizeof(struct eth_hdr) + iph->ihl * 4); - - // printc("port id:0x%x\n", port->dst_port); - session = cos_hash_lookup(port->dst_port); - // assert(session->port == port->dst_port); - if (unlikely(debug_flag)) { - debug_print_stats(); - debug_flag = 0; - } - if (unlikely(session == NULL)) { - cos_free_packet(rx_pkts[i]); - continue; - } - // memset(&buf, 0, sizeof(buf)); - buf.pkt = rx_pkts[i]; - // if (ntohs(port->dst_port) == 6) { - // buf.tent_id = 6; - // buf.srcid = ntohs(port->src_port); - // } else if(ntohs(port->dst_port) == 7) { - // buf.tent_id = 7; - // buf.srcid = ntohs(port->src_port); - // } else { - // assert(0); - // } - if (unlikely(!pkt_ring_buf_enqueue(&(session->pkt_ring_buf), &buf))){ + /* TODO: need a policy spefic rule to route packets to different receiving threads*/ + + session = cos_hash_lookup(0); + + if (unlikely(session == NULL)) { + cos_free_packet(rx_pkts[i]); + continue; + } + + buf.pkt = rx_pkts[i]; + + if (unlikely(!pkt_ring_buf_enqueue(&(session->pkt_ring_buf), &buf))){ cos_free_packet(buf.pkt); rx_enqueued_miss++; continue; - } - enqueued_rx++; - // if (unlikely(debug_flag)) { - // session->sem.debug = 1; - // } - - sync_sem_give(&session->sem); - } else if (htons(eth->ether_type) == 0x0806) { - cos_free_packet(buf.pkt); - continue; } + enqueued_rx++; + + sync_sem_give(&session->sem); } + /* yield for some cycles to improve CPU utility */ + sched_thd_block_timeout(0, 100000); + } static void diff --git a/src/components/implementation/nicmgr/dpdk/nicmgr.c b/src/components/implementation/nicmgr/dpdk/nicmgr.c index 8844208284..dd61056d54 100644 --- a/src/components/implementation/nicmgr/dpdk/nicmgr.c +++ b/src/components/implementation/nicmgr/dpdk/nicmgr.c @@ -84,13 +84,9 @@ nic_get_a_packet(u16_t *pkt_len) thd = cos_thdid(); assert(thd < NIC_MAX_SESSION); - session = &client_sessions[thd]; + session = &client_sessions[thd]; - // if (unlikely(debug_flag)) { - // printc("tenant %u(%u) is to dequeue\n", ntohs(session->port), thd); - // } session->blocked_loops_begin++; - sync_sem_take(&session->sem); session->blocked_loops_end++; @@ -143,7 +139,7 @@ nic_send_packet(shm_bm_objid_t pktid, u16_t pkt_offset, u16_t pkt_len) thd = cos_thdid(); objid = pktid; - obj = (struct netshmem_pkt_buf *)shm_bm_borrow_net_pkt_buf(client_sessions[thd].shemem_info.shm, objid); + obj = (struct netshmem_pkt_buf *)shm_bm_transfer_net_pkt_buf(client_sessions[thd].shemem_info.shm, objid); buf.obj = (char *)obj; buf.pkt = pkt_offset + obj->data; diff --git a/src/components/implementation/simple_mc_udp_server/simple_mc_udp_server_no_lwip/main.c b/src/components/implementation/simple_mc_udp_server/simple_mc_udp_server_no_lwip/main.c index 9a699c9ccd..4554984f86 100644 --- a/src/components/implementation/simple_mc_udp_server/simple_mc_udp_server_no_lwip/main.c +++ b/src/components/implementation/simple_mc_udp_server/simple_mc_udp_server_no_lwip/main.c @@ -16,7 +16,7 @@ cos_init(void) struct netshmem_pkt_buf *obj; init_thd = cos_thdid(); /* create current component's shmem */ - netshmem_create(); + netshmem_create(cos_thdid()); } void cos_parallel_init(coreid_t cid, int init_core, int ncores) diff --git a/src/components/implementation/simple_mc_udp_server/simple_mc_udp_server_with_lwip/main.c b/src/components/implementation/simple_mc_udp_server/simple_mc_udp_server_with_lwip/main.c index 2d0946428e..22f466d4b0 100644 --- a/src/components/implementation/simple_mc_udp_server/simple_mc_udp_server_with_lwip/main.c +++ b/src/components/implementation/simple_mc_udp_server/simple_mc_udp_server_with_lwip/main.c @@ -14,7 +14,7 @@ cos_init(void) struct netshmem_pkt_buf *obj; /* create current component's shmem */ - netshmem_create(); + netshmem_create(cos_thdid()); netmgr_shmem_map(netshmem_get_shm_id()); mc_map_shmem(netshmem_get_shm_id()); diff --git a/src/components/implementation/simple_nf/Makefile b/src/components/implementation/simple_nf/Makefile new file mode 100644 index 0000000000..84e4b4e9d4 --- /dev/null +++ b/src/components/implementation/simple_nf/Makefile @@ -0,0 +1,18 @@ +# Required variables used to drive the compilation process. It is OK +# for many of these to be empty. +# +# The set of interfaces that this component exports for use by other +# components. This is a list of the interface names. +INTERFACE_EXPORTS = +# The interfaces this component is dependent on for compilation (this +# is a list of directory names in interface/) +INTERFACE_DEPENDENCIES = +# The library dependencies this component is reliant on for +# compilation/linking (this is a list of directory names in lib/) +LIBRARY_DEPENDENCIES = component +# Note: Both the interface and library dependencies should be +# *minimal*. That is to say that removing a dependency should cause +# the build to fail. The build system does not validate this +# minimality; that's on you! + +include Makefile.subdir diff --git a/src/components/implementation/simple_nf/simple_nf1/Makefile b/src/components/implementation/simple_nf/simple_nf1/Makefile new file mode 100644 index 0000000000..af05a90fca --- /dev/null +++ b/src/components/implementation/simple_nf/simple_nf1/Makefile @@ -0,0 +1,18 @@ +# Required variables used to drive the compilation process. It is OK +# for many of these to be empty. +# +# The set of interfaces that this component exports for use by other +# components. This is a list of the interface names. +INTERFACE_EXPORTS = +# The interfaces this component is dependent on for compilation (this +# is a list of directory names in interface/) +INTERFACE_DEPENDENCIES = memmgr contigmem netshmem sched nic netio +# The library dependencies this component is reliant on for +# compilation/linking (this is a list of directory names in lib/) +LIBRARY_DEPENDENCIES = component shm_bm netdefs +# Note: Both the interface and library dependencies should be +# *minimal*. That is to say that removing a dependency should cause +# the build to fail. The build system does not validate this +# minimality; that's on you! + +include Makefile.subsubdir diff --git a/src/components/implementation/simple_nf/simple_nf1/main.c b/src/components/implementation/simple_nf/simple_nf1/main.c new file mode 100644 index 0000000000..b38d10ec82 --- /dev/null +++ b/src/components/implementation/simple_nf/simple_nf1/main.c @@ -0,0 +1,63 @@ +#include +#include +#include +#include +#include +#include +#include +#include + +#define TX_PRIORITY 30 +thdid_t rx_tid = 0; +thdid_t tx_tid = 0; + +static void +tx_task(void) +{ + u16_t pkt_len; + shm_bm_objid_t objid; + + netio_shmem_map(netshmem_get_shm_id()); + nic_shmem_map(netshmem_get_shm_id()); + + nic_bind_port(0, 1); + while(1) { + objid = netio_get_a_packet(&pkt_len); + nic_send_packet(objid, 0, pkt_len); + } +} + +void +cos_init(void) +{ + shm_bm_objid_t objid; + struct netshmem_pkt_buf *obj; + + /* create current component's shmem */ + rx_tid = cos_thdid(); + netshmem_create(rx_tid); + tx_tid = sched_thd_create((void *)tx_task, NULL); + netshmem_create(tx_tid); + + printc("NF application init shm done\n"); +} + +int +parallel_main(coreid_t cid) +{ + /* TODO: port NF applications here */ + shm_bm_objid_t objid; + u16_t pkt_len; + + sched_thd_param_set(tx_tid, sched_param_pack(SCHEDP_PRIO, TX_PRIORITY)); + + netio_shmem_map(netshmem_get_shm_id()); + nic_shmem_map(netshmem_get_shm_id()); + nic_bind_port(0, 0); + + while (1) + { + objid = nic_get_a_packet(&pkt_len); + netio_send_packet(objid, pkt_len); + } +} diff --git a/src/components/implementation/simple_pingpong_udp_server/pingpong/main.c b/src/components/implementation/simple_pingpong_udp_server/pingpong/main.c index f114b6df86..dd6546f8de 100644 --- a/src/components/implementation/simple_pingpong_udp_server/pingpong/main.c +++ b/src/components/implementation/simple_pingpong_udp_server/pingpong/main.c @@ -16,7 +16,7 @@ cos_init(void) struct netshmem_pkt_buf *obj; init_thd = cos_thdid(); /* create current component's shmem */ - netshmem_create(); + netshmem_create(cos_thdid()); } void cos_parallel_init(coreid_t cid, int init_core, int ncores) diff --git a/src/components/implementation/simple_tcp_echo_server/simple_tcp_echo_server/simple_tcp_echo_server.c b/src/components/implementation/simple_tcp_echo_server/simple_tcp_echo_server/simple_tcp_echo_server.c index 14e00979ab..99399bbfde 100644 --- a/src/components/implementation/simple_tcp_echo_server/simple_tcp_echo_server/simple_tcp_echo_server.c +++ b/src/components/implementation/simple_tcp_echo_server/simple_tcp_echo_server/simple_tcp_echo_server.c @@ -11,7 +11,7 @@ cos_init(void) struct netshmem_pkt_buf *obj; /* create current component's shmem */ - netshmem_create(); + netshmem_create(cos_thdid()); netmgr_shmem_map(netshmem_get_shm_id()); diff --git a/src/components/implementation/simple_udp_echo_server/simple_udp_echo_server_nolwip/main.c b/src/components/implementation/simple_udp_echo_server/simple_udp_echo_server_nolwip/main.c index 67d505dd56..805ef28b26 100644 --- a/src/components/implementation/simple_udp_echo_server/simple_udp_echo_server_nolwip/main.c +++ b/src/components/implementation/simple_udp_echo_server/simple_udp_echo_server_nolwip/main.c @@ -16,7 +16,7 @@ cos_init(void) struct netshmem_pkt_buf *obj; /* create current component's shmem */ - netshmem_create(); + netshmem_create(cos_thdid()); udp_stack_shmem_map(netshmem_get_shm_id()); printc("app init shm done\n"); } diff --git a/src/components/implementation/simple_udp_echo_server/simple_udp_echo_server_with_lwip/main.c b/src/components/implementation/simple_udp_echo_server/simple_udp_echo_server_with_lwip/main.c index 0291759ec5..28c6af8705 100644 --- a/src/components/implementation/simple_udp_echo_server/simple_udp_echo_server_with_lwip/main.c +++ b/src/components/implementation/simple_udp_echo_server/simple_udp_echo_server_with_lwip/main.c @@ -11,7 +11,7 @@ cos_init(void) struct netshmem_pkt_buf *obj; /* create current component's shmem */ - netshmem_create(); + netshmem_create(cos_thdid()); netmgr_shmem_map(netshmem_get_shm_id()); diff --git a/src/components/implementation/simple_vmm/vm_dev.md b/src/components/implementation/simple_vmm/vm_dev.md index b6342d4e81..f54c8da33b 100644 --- a/src/components/implementation/simple_vmm/vm_dev.md +++ b/src/components/implementation/simple_vmm/vm_dev.md @@ -40,6 +40,8 @@ This Linux kernel source code is hacked a little bit at the booting stage becaus mkdir dev sudo mknod dev/console c 5 1 sudo mknod dev/null c 1 3 + sudo mknod dev/random c 1 8 + sudo mknod dev/urandom c 1 9 ``` That's it. Just leave this initramfs here and go to build the Linux kernel. You will then need to tell the Linux build system this directory and it will automatically include this initramfs. See the `CONFIG_INITRAMFS_SOURCE` keyword in the config file. You will finally see the output above in your terminal. diff --git a/src/components/implementation/simple_vmm/vmm/Makefile b/src/components/implementation/simple_vmm/vmm/Makefile index 6b36301a27..19294b8eae 100644 --- a/src/components/implementation/simple_vmm/vmm/Makefile +++ b/src/components/implementation/simple_vmm/vmm/Makefile @@ -3,13 +3,13 @@ # # The set of interfaces that this component exports for use by other # components. This is a list of the interface names. -INTERFACE_EXPORTS = +INTERFACE_EXPORTS = netio # The interfaces this component is dependent on for compilation (this # is a list of directory names in interface/) -INTERFACE_DEPENDENCIES = contigmem +INTERFACE_DEPENDENCIES = contigmem netshmem # The library dependencies this component is reliant on for # compilation/linking (this is a list of directory names in lib/) -LIBRARY_DEPENDENCIES = ubench component kernel initargs vmrt shm_bm +LIBRARY_DEPENDENCIES = ubench component kernel initargs vmrt shm_bm # Note: Both the interface and library dependencies should be # *minimal*. That is to say that removing a dependency should cause # the build to fail. The build system does not validate this diff --git a/src/components/implementation/simple_vmm/vmm/acrn_common.h b/src/components/implementation/simple_vmm/vmm/acrn_common.h new file mode 100644 index 0000000000..b97561f61b --- /dev/null +++ b/src/components/implementation/simple_vmm/vmm/acrn_common.h @@ -0,0 +1,797 @@ +/* + * common definition + * + * Copyright (C) 2017-2022 Intel Corporation. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +/** + * @file acrn_common.h + * + * @brief acrn common data structure for hypercall or ioctl + */ + +#ifndef ACRN_COMMON_H +#define ACRN_COMMON_H + +#include + +/* + * Common structures for ACRN/HSM/DM + */ + +/* + * IO request + */ + +#define ACRN_IO_REQUEST_MAX 16U +#define ACRN_ASYNCIO_MAX 64U + +#define ACRN_IOREQ_STATE_PENDING 0U +#define ACRN_IOREQ_STATE_COMPLETE 1U +#define ACRN_IOREQ_STATE_PROCESSING 2U +#define ACRN_IOREQ_STATE_FREE 3U + +#define ACRN_IOREQ_TYPE_PORTIO 0U +#define ACRN_IOREQ_TYPE_MMIO 1U +#define ACRN_IOREQ_TYPE_PCICFG 2U +#define ACRN_IOREQ_TYPE_WP 3U + +#define ACRN_IOREQ_DIR_READ 0U +#define ACRN_IOREQ_DIR_WRITE 1U + + + +/* IOAPIC device model info */ +#define VIOAPIC_RTE_NUM 48U /* vioapic pins */ + +#if VIOAPIC_RTE_NUM < 24U +#error "VIOAPIC_RTE_NUM must be larger than 23" +#endif + +/* Generic VM flags from guest OS */ +#define GUEST_FLAG_SECURE_WORLD_ENABLED (1UL << 0U) /* Whether secure world is enabled */ +#define GUEST_FLAG_LAPIC_PASSTHROUGH (1UL << 1U) /* Whether LAPIC is passed through */ +#define GUEST_FLAG_IO_COMPLETION_POLLING (1UL << 2U) /* Whether need hypervisor poll IO completion */ +#define GUEST_FLAG_HIDE_MTRR (1UL << 3U) /* Whether hide MTRR from VM */ +#define GUEST_FLAG_RT (1UL << 4U) /* Whether the vm is RT-VM */ +#define GUEST_FLAG_NVMX_ENABLED (1UL << 5U) /* Whether this VM supports nested virtualization */ +#define GUEST_FLAG_SECURITY_VM (1UL << 6U) /* Whether this VM needs to do security-vm related fixup (TPM2 and SMBIOS pt) */ +#define GUEST_FLAG_VCAT_ENABLED (1UL << 7U) /* Whether this VM supports vCAT */ +#define GUEST_FLAG_STATIC_VM (1UL << 8U) /* Whether this VM uses static VM configuration */ +#define GUEST_FLAG_TEE (1UL << 9U) /* Whether the VM is TEE VM */ +#define GUEST_FLAG_REE (1UL << 10U) /* Whether the VM is REE VM */ +#define GUEST_FLAG_PMU_PASSTHROUGH (1UL << 11U) /* Whether PMU is passed through */ + + +/* TODO: We may need to get this addr from guest ACPI instead of hardcode here */ +#define VIRTUAL_SLEEP_CTL_ADDR 0x400U /* Pre-launched VM uses ACPI reduced HW mode and sleep control register */ +#define VIRTUAL_PM1A_CNT_ADDR 0x404U +#define VIRTUAL_PM1A_SCI_EN 0x0001 +#define VIRTUAL_PM1A_SLP_TYP 0x1c00U +#define VIRTUAL_PM1A_SLP_EN 0x2000U +#define VIRTUAL_PM1A_ALWAYS_ZERO 0xc003 + +#define MAX_VM_NAME_LEN (16U) + +/** + * @brief Hypercall + * + * @addtogroup acrn_hypercall ACRN Hypercall + * @{ + */ + +/** + * @brief Representation of a MMIO request + */ +struct acrn_mmio_request { + /** + * @brief Direction of the access + * + * Either \p ACRN_IOREQ_DIR_READ or \p ACRN_IOREQ_DIR_WRITE. + */ + uint32_t direction; + + /** + * @brief reserved + */ + uint32_t reserved; + + /** + * @brief Address of the I/O access + */ + uint64_t address; + + /** + * @brief Width of the I/O access in byte + */ + uint64_t size; + + /** + * @brief The value read for I/O reads or to be written for I/O writes + */ + uint64_t value; +}; + +/** + * @brief Representation of a port I/O request + */ +struct acrn_pio_request { + /** + * @brief Direction of the access + * + * Either \p ACRN_IOREQ_DIR_READ or \p ACRN_IOREQ_DIR_WRITE. + */ + uint32_t direction; + + /** + * @brief reserved + */ + uint32_t reserved; + + /** + * @brief Port address of the I/O access + */ + uint64_t address; + + /** + * @brief Width of the I/O access in byte + */ + uint64_t size; + + /** + * @brief The value read for I/O reads or to be written for I/O writes + */ + uint32_t value; +}; + +/** + * @brief Representation of a PCI configuration space access + */ +struct acrn_pci_request { + /** + * @brief Direction of the access + * + * Either \p ACRN_IOREQ_DIR_READ or \p ACRN_IOREQ_DIR_WRITE. + */ + uint32_t direction; + + /** + * @brief Reserved + */ + uint32_t reserved[3];/* need keep same header fields with pio_request */ + + /** + * @brief Width of the I/O access in byte + */ + int64_t size; + + /** + * @brief The value read for I/O reads or to be written for I/O writes + */ + int32_t value; + + /** + * @brief The \p bus part of the BDF of the device + */ + int32_t bus; + + /** + * @brief The \p device part of the BDF of the device + */ + int32_t dev; + + /** + * @brief The \p function part of the BDF of the device + */ + int32_t func; + + /** + * @brief The register to be accessed in the configuration space + */ + int32_t reg; +}; + +/** + * @brief 256-byte I/O requests + * + * The state transitions of a I/O request are: + * + * FREE -> PENDING -> PROCESSING -> COMPLETE -> FREE -> ... + * + * When a request is in COMPLETE or FREE state, the request is owned by the + * hypervisor. Service VM (HSM or DM) shall not read or write the internals of the + * request except the state. + * + * When a request is in PENDING or PROCESSING state, the request is owned by + * Service VM. The hypervisor shall not read or write the request other than the state. + * + * Based on the rules above, a typical I/O request lifecycle should looks like + * the following. + * + * @verbatim embed:rst:leading-asterisk + * + * +-----------------------+-------------------------+----------------------+ + * | Service VM vCPU 0 | Service VM vCPU x | User VM vCPU y | + * +=======================+=========================+======================+ + * | | | Hypervisor: | + * | | | | + * | | | - Fill in type, | + * | | | addr, etc. | + * | | | - Pause User VM vCPU | + * | | | - Set state to | + * | | | PENDING (a) | + * | | | - Fire upcall to | + * | | | Service VM vCPU 0 | + * | | | | + * +-----------------------+-------------------------+----------------------+ + * | HSM: | | | + * | | | | + * | - Scan for pending | | | + * | requests | | | + * | - Set state to | | | + * | PROCESSING (b) | | | + * | - Assign requests to | | | + * | clients (c) | | | + * | | | | + * +-----------------------+-------------------------+----------------------+ + * | | Client: | | + * | | | | + * | | - Scan for assigned | | + * | | requests | | + * | | - Handle the | | + * | | requests (d) | | + * | | - Set state to COMPLETE | | + * | | - Notify the hypervisor | | + * | | | | + * +-----------------------+-------------------------+----------------------+ + * | | Hypervisor: | | + * | | | | + * | | - resume User VM vCPU y | | + * | | (e) | | + * | | | | + * +-----------------------+-------------------------+----------------------+ + * | | | Hypervisor: | + * | | | | + * | | | - Post-work (f) | + * | | | - set state to FREE | + * | | | | + * +-----------------------+-------------------------+----------------------+ + * + * @endverbatim + * + * Note that the following shall hold. + * + * 1. (a) happens before (b) + * 2. (c) happens before (d) + * 3. (e) happens before (f) + * 4. One vCPU cannot trigger another I/O request before the previous one has + * completed (i.e. the state switched to FREE) + * + * Accesses to the state of a acrn_io_request shall be atomic and proper barriers + * are needed to ensure that: + * + * 1. Setting state to PENDING is the last operation when issuing a request in + * the hypervisor, as the hypervisor shall not access the request any more. + * + * 2. Due to similar reasons, setting state to COMPLETE is the last operation + * of request handling in HSM or clients in Service VM. + */ +struct acrn_io_request { + /** + * @brief Type of this request. + * + * Byte offset: 0. + */ + uint32_t type; + + /** + * @brief Hypervisor will poll completion if set. + * + * Byte offset: 4. + */ + uint32_t completion_polling; + + /** + * @brief Reserved. + * + * Byte offset: 8. + */ + uint32_t reserved0[14]; + + /** + * @brief Details about this request. + * + * Byte offset: 64. + */ + union { + struct acrn_pio_request pio_request; + struct acrn_pci_request pci_request; + struct acrn_mmio_request mmio_request; + uint64_t data[8]; + } reqs; + + /** + * @brief Reserved. + * + * Byte offset: 128. + */ + uint32_t reserved1; + + /** + * @brief If this request has been handled by HSM driver. + * + * Byte offset: 132. + */ + int32_t kernel_handled; + + /** + * @brief The status of this request. + * + * Taking ACRN_IOREQ_STATE_xxx as values. + * + * Byte offset: 136. + */ + uint32_t processed; +}__attribute__((aligned(256))); + +struct acrn_io_request_buffer { + union { + struct acrn_io_request req_slot[ACRN_IO_REQUEST_MAX]; + int8_t reserved[4096]; + }; +}; + +struct acrn_asyncio_info { + uint32_t type; + uint64_t addr; + uint64_t fd; +}; + +/** + * @brief Info to create a VM, the parameter for HC_CREATE_VM hypercall + */ +struct acrn_vm_creation { + /** created vmid return to HSM. Keep it first field */ + uint16_t vmid; + + /** Reserved */ + uint16_t reserved0; + + /** VCPU numbers this VM want to create */ + uint16_t vcpu_num; + + /** Reserved */ + uint16_t reserved1; + + /** the name of this VM */ + uint8_t name[MAX_VM_NAME_LEN]; + + /* VM flag bits from Guest OS, now used + * GUEST_FLAG_SECURE_WORLD_ENABLED (1UL<<0) + */ + uint64_t vm_flag; + + uint64_t ioreq_buf; + + /** + * The least significant set bit is the PCPU # the VCPU 0 maps to; + * second set least significant bit is the PCPU # the VCPU 1 maps to; + * and so on... + */ + uint64_t cpu_affinity; +}; + +/* General-purpose register layout aligned with the general-purpose register idx + * when vmexit, such as vmexit due to CR access, refer to SMD Vol.3C 27-6. + */ +struct acrn_gp_regs { + uint64_t rax; + uint64_t rcx; + uint64_t rdx; + uint64_t rbx; + uint64_t rsp; + uint64_t rbp; + uint64_t rsi; + uint64_t rdi; + uint64_t r8; + uint64_t r9; + uint64_t r10; + uint64_t r11; + uint64_t r12; + uint64_t r13; + uint64_t r14; + uint64_t r15; +}; + +/* struct to define how the descriptor stored in memory. + * Refer SDM Vol3 3.5.1 "Segment Descriptor Tables" + * Figure 3-11 + */ +struct acrn_descriptor_ptr { + uint16_t limit; + uint64_t base; + uint16_t reserved[3]; /* align struct size to 64bit */ +} __packed; + +/** + * @brief registers info for vcpu. + */ +struct acrn_regs { + struct acrn_gp_regs gprs; + struct acrn_descriptor_ptr gdt; + struct acrn_descriptor_ptr idt; + + uint64_t rip; + uint64_t cs_base; + uint64_t cr0; + uint64_t cr4; + uint64_t cr3; + uint64_t ia32_efer; + uint64_t rflags; + uint64_t reserved_64[4]; + + uint32_t cs_ar; + uint32_t cs_limit; + uint32_t reserved_32[3]; + + /* don't change the order of following sel */ + uint16_t cs_sel; + uint16_t ss_sel; + uint16_t ds_sel; + uint16_t es_sel; + uint16_t fs_sel; + uint16_t gs_sel; + uint16_t ldt_sel; + uint16_t tr_sel; +}; + +/** + * @brief Info to set vcpu state + * + * the parameter for HC_SET_VCPU_STATE + */ +struct acrn_vcpu_regs { + /** the virtual CPU ID for the VCPU to set state */ + uint16_t vcpu_id; + + /** reserved space to make cpu_state aligned to 8 bytes */ + uint16_t reserved[3]; + + /** the structure to hold vcpu state */ + struct acrn_regs vcpu_regs; +}; + +/** Operation types for setting IRQ line */ +#define GSI_SET_HIGH 0U +#define GSI_SET_LOW 1U +#define GSI_RAISING_PULSE 2U +#define GSI_FALLING_PULSE 3U + +/** + * @brief Info to Set/Clear/Pulse a virtual IRQ line for a VM + * + * the parameter for HC_SET_IRQLINE hypercall + */ +struct acrn_irqline_ops { + uint32_t gsi; + uint32_t op; +}; + + +/** + * @brief Info to inject a MSI interrupt to VM + * + * the parameter for HC_INJECT_MSI hypercall + */ +struct acrn_msi_entry { + /** MSI addr[19:12] with dest VCPU ID */ + uint64_t msi_addr; + + /** MSI data[7:0] with vector */ + uint64_t msi_data; +}; + +/** + * @brief Info The power state data of a VCPU. + * + */ + +#define SPACE_SYSTEM_MEMORY 0U +#define SPACE_SYSTEM_IO 1U +#define SPACE_PCI_CONFIG 2U +#define SPACE_Embedded_Control 3U +#define SPACE_SMBUS 4U +#define SPACE_PLATFORM_COMM 10U +#define SPACE_FFixedHW 0x7FU + +struct acrn_acpi_generic_address { + uint8_t space_id; + uint8_t bit_width; + uint8_t bit_offset; + uint8_t access_size; + uint64_t address; +} __attribute__ ((__packed__)); + +struct acrn_cstate_data { + struct acrn_acpi_generic_address cx_reg; + uint8_t type; + uint32_t latency; + uint64_t power; +}; + +struct acrn_pstate_data { + uint64_t core_frequency; /* megahertz */ + uint64_t power; /* milliWatts */ + uint64_t transition_latency; /* microseconds */ + uint64_t bus_master_latency; /* microseconds */ + uint64_t control; /* control value */ + uint64_t status; /* success indicator */ +}; + +enum acrn_cpufreq_policy_type { + CPUFREQ_POLICY_PERFORMANCE, + CPUFREQ_POLICY_NOMINAL, +}; + +struct acrn_cpufreq_limits { + /* Performance levels for HWP */ + uint8_t guaranteed_hwp_lvl; + uint8_t highest_hwp_lvl; + uint8_t lowest_hwp_lvl; + /* Index for the p-state table _PSS */ + uint8_t nominal_pstate; + uint8_t performance_pstate; +}; + +struct acpi_sx_pkg { + uint8_t val_pm1a; + uint8_t val_pm1b; + uint16_t reserved; +} __attribute__((aligned(8))); + +struct pm_s_state_data { + struct acrn_acpi_generic_address pm1a_evt; + struct acrn_acpi_generic_address pm1b_evt; + struct acrn_acpi_generic_address pm1a_cnt; + struct acrn_acpi_generic_address pm1b_cnt; + struct acpi_sx_pkg s3_pkg; + struct acpi_sx_pkg s5_pkg; + uint32_t *wake_vector_32; + uint64_t *wake_vector_64; +} __attribute__((aligned(8))); + +/** + * @brief Info PM command from DM/HSM. + * + * The command would specify request type(e.g. get px count or data) for + * specific VM and specific VCPU with specific state number. + * For Px, PMCMD_STATE_NUM means Px number from 0 to (MAX_PSTATE - 1), + * For Cx, PMCMD_STATE_NUM means Cx entry index from 1 to MAX_CX_ENTRY. + */ +#define PMCMD_VMID_MASK 0xff000000U +#define PMCMD_VCPUID_MASK 0x00ff0000U +#define PMCMD_STATE_NUM_MASK 0x0000ff00U +#define PMCMD_TYPE_MASK 0x000000ffU + +#define PMCMD_VMID_SHIFT 24U +#define PMCMD_VCPUID_SHIFT 16U +#define PMCMD_STATE_NUM_SHIFT 8U + +enum acrn_pm_cmd_type { + ACRN_PMCMD_GET_PX_CNT, + ACRN_PMCMD_GET_PX_DATA, + ACRN_PMCMD_GET_CX_CNT, + ACRN_PMCMD_GET_CX_DATA, +}; + +/** + * @brief Info to get a VM interrupt count data + * + * the parameter for HC_VM_INTR_MONITOR hypercall + */ +#define MAX_PTDEV_NUM 24U +struct acrn_intr_monitor { + /** sub command for intr monitor */ + uint32_t cmd; + /** the count of this buffer to save */ + uint32_t buf_cnt; + + /** the buffer which save each interrupt count */ + uint64_t buffer[MAX_PTDEV_NUM * 2]; +} __attribute__((aligned(8))); + +/** cmd for intr monitor **/ +#define INTR_CMD_GET_DATA 0U +#define INTR_CMD_DELAY_INT 1U + +/* + * PRE_LAUNCHED_VM is launched by ACRN hypervisor, with LAPIC_PT; + * Service VM is launched by ACRN hypervisor, without LAPIC_PT; + * POST_LAUNCHED_VM is launched by ACRN devicemodel, with/without LAPIC_PT depends on usecases. + * + * Assumption: vm_configs array is completely initialized w.r.t. load_order member of + * acrn_vm_config for all the VMs. + */ +enum acrn_vm_load_order { + PRE_LAUNCHED_VM = 0, + SERVICE_VM, + POST_LAUNCHED_VM, /* Launched by Devicemodel in Service VM */ + MAX_LOAD_ORDER +}; + +struct acrn_vm_config_header { + enum acrn_vm_load_order load_order; + char name[MAX_VM_NAME_LEN]; + uint8_t reserved[2]; + uint8_t severity; + uint64_t cpu_affinity; + uint64_t guest_flags; + /* + * The following are hv-specific members and are thus opaque. + * vm_config_entry_size determines the real size of this structure. + */ +} __attribute__((aligned(8))); + +/** + * @brief Info to configure virtual root port + * + * Configuration passed to hv when adding a virtual root port which + * is used as PTM root + */ +struct vrp_config +{ + uint16_t phy_bdf; + uint8_t max_payload; /* dev cap's max payload */ + uint8_t primary_bus; + uint8_t secondary_bus; + uint8_t subordinate_bus; + uint8_t ptm_capable; + uint32_t ptm_cap_offset; +}; + +/* Type of PCI device assignment */ +#define ACRN_PTDEV_QUIRK_ASSIGN (1U << 0) + +#define ACRN_PCI_NUM_BARS 6U +/** + * @brief Info to assign or deassign PCI for a VM + * + */ +struct acrn_pcidev { + /** the type of the the pass-through PCI device */ + uint32_t type; + + /** virtual BDF# of the pass-through PCI device */ + uint16_t virt_bdf; + + /** physical BDF# of the pass-through PCI device */ + uint16_t phys_bdf; + + /** the PCI Interrupt Line, initialized by ACRN-DM, which is RO and + * ideally not used for pass-through MSI/MSI-x devices. + */ + uint8_t intr_line; + + /** the PCI Interrupt Pin, initialized by ACRN-DM, which is RO and + * ideally not used for pass-through MSI/MSI-x devices. + */ + uint8_t intr_pin; + + /** the base address of the PCI BAR, initialized by ACRN-DM. */ + uint32_t bar[ACRN_PCI_NUM_BARS]; +}; + +#define MMIODEV_RES_NUM 3 + +/** + * @brief Info to assign or deassign a MMIO device for a VM + */ +struct acrn_mmiodev { + char name[8]; + struct acrn_mmiores { + /** the gpa of the MMIO region for the MMIO device */ + uint64_t user_vm_pa; + /** the hpa of the MMIO region for the MMIO device: for post-launched VM + * it's pa in service vm; for pre-launched VM it's pa in HV. + */ + uint64_t host_pa; + /** the size of the MMIO region for the MMIO resource */ + uint64_t size; + /** the memory type of the MMIO region for the MMIO resource */ + uint64_t mem_type; + } res[MMIODEV_RES_NUM]; +}; + +/** + * @brief Info to create or destroy a virtual PCI or legacy device for a VM + * + * the parameter for HC_CREATE_VDEV or HC_DESTROY_VDEV hypercall + */ +struct acrn_vdev { + /* + * the identifier of the device, the low 32 bits represent the vendor + * id and device id of PCI device and the high 32 bits represent the + * device number of the legacy device + */ + union { + uint64_t value; + struct { + uint16_t vendor; + uint16_t device; + uint32_t legacy_id; + } fields; + } id; + + /* + * the slot of the device, if the device is a PCI device, the slot + * represents BDF, otherwise it represents legacy device slot number + */ + uint64_t slot; + + /** the IO resource address of the device, initialized by ACRN-DM. */ + uint32_t io_addr[ACRN_PCI_NUM_BARS]; + + /** the IO resource size of the device, initialized by ACRN-DM. */ + uint32_t io_size[ACRN_PCI_NUM_BARS]; + + /** the options for the virtual device, initialized by ACRN-DM. */ + uint8_t args[128]; +}; + +#define ACRN_ASYNCIO_PIO (0x01U) +#define ACRN_ASYNCIO_MMIO (0x02U) + +#define SBUF_MAGIC 0x5aa57aa71aa13aa3UL +#define SBUF_MAX_SIZE (1UL << 22U) +#define SBUF_HEAD_SIZE 64U + +/* sbuf flags */ +#define OVERRUN_CNT_EN (1U << 0U) /* whether overrun counting is enabled */ +#define OVERWRITE_EN (1U << 1U) /* whether overwrite is enabled */ + +/** + * (sbuf) head + buf (store (ele_num - 1) elements at most) + * buffer empty: tail == head + * buffer full: (tail + ele_size) % size == head + * + * Base of memory for elements + * | + * | + * ---------------------------------------------------------------------- + * | struct shared_buf | raw data (ele_size)| ... | raw data (ele_size) | + * ---------------------------------------------------------------------- + * | + * | + * struct shared_buf *buf + */ + +enum { + ACRN_TRACE = 0U, + ACRN_HVLOG, + ACRN_SEP, + ACRN_SOCWATCH, + /* The sbuf with above ids are created each pcpu */ + ACRN_SBUF_PER_PCPU_ID_MAX, + ACRN_ASYNCIO = 64, +}; + +/* Make sure sizeof(struct shared_buf) == SBUF_HEAD_SIZE */ +struct shared_buf { + uint64_t magic; + uint32_t ele_num; /* number of elements */ + uint32_t ele_size; /* sizeof of elements */ + uint32_t head; /* offset from base, to read */ + uint32_t tail; /* offset from base, to write */ + uint32_t flags; + uint32_t reserved; + uint32_t overrun_cnt; /* count of overrun */ + uint32_t size; /* ele_num * ele_size */ + uint32_t padding[6]; +}; + +/** + * @} + */ +#endif /* ACRN_COMMON_H */ diff --git a/src/components/implementation/simple_vmm/vmm/acrn_types.h b/src/components/implementation/simple_vmm/vmm/acrn_types.h index a4a54498ac..0d6b92fcd9 100644 --- a/src/components/implementation/simple_vmm/vmm/acrn_types.h +++ b/src/components/implementation/simple_vmm/vmm/acrn_types.h @@ -14,6 +14,9 @@ #include +/** Roundup (x/y) to ( x/y + (x%y) ? 1 : 0) **/ +#define INT_DIV_ROUNDUP(x, y) ((((x)+(y))-1)/(y)) + /* Define standard data types. These definitions allow software components * to perform in the same manner on different target platforms. */ diff --git a/src/components/implementation/simple_vmm/vmm/apicreg.h b/src/components/implementation/simple_vmm/vmm/apicreg.h index 570a466347..0b8579ffb2 100644 --- a/src/components/implementation/simple_vmm/vmm/apicreg.h +++ b/src/components/implementation/simple_vmm/vmm/apicreg.h @@ -76,7 +76,7 @@ struct lapic_regs { /*OFFSET(Hex)*/ /*roundup sizeof current struct to 4KB*/ struct lapic_reg rsv5[192]; /*400 -- FF0*/ -} __attribute__((aligned(PAGE_SIZE_4K))); +} __attribute__((aligned(4096))); enum LAPIC_REGISTERS { LAPIC_ID = 0x2, diff --git a/src/components/implementation/simple_vmm/vmm/cpu.h b/src/components/implementation/simple_vmm/vmm/cpu.h index 37f6a05c09..96f6a6ce4d 100755 --- a/src/components/implementation/simple_vmm/vmm/cpu.h +++ b/src/components/implementation/simple_vmm/vmm/cpu.h @@ -38,6 +38,7 @@ #define CPU_H #include #include +#include #include /* Define CPU stack alignment */ diff --git a/src/components/implementation/simple_vmm/vmm/devices/serial/serial.c b/src/components/implementation/simple_vmm/vmm/devices/serial/serial.c index 8c4def6be5..41044b056d 100644 --- a/src/components/implementation/simple_vmm/vmm/devices/serial/serial.c +++ b/src/components/implementation/simple_vmm/vmm/devices/serial/serial.c @@ -19,10 +19,15 @@ serial_handler(u16_t port, int dir, int sz, struct vmrt_vm_vcpu *vcpu) case SERIAL_PORT1: printc("%c", (u8_t)vcpu->shared_region->ax); if (send_intr_enable) { - /* TODO: correctly handle serial output(eg: multiple vcpu case) and inject serial interrupt */ - - /* 52 is the fixed serial interrupt in Linux */ - lapic_intr_inject(vcpu, 52, 1); + /* + * TODO: correctly handle serial output(eg: multiple vcpu case) and inject serial interrupt, + * with io apic, 34 is serial8250_interrupt vector. + */ +#if VMX_SUPPORT_POSTED_INTR + vlapic_set_intr(vcpu, 34, 0); +#else + lapic_intr_inject(vcpu, 34, 1); +#endif serial_data[SERIAL_IIR - SERIAL_PORT_MIN] = 0x2; serial_data[MODEM_STATUS_REGISTER - SERIAL_PORT_MIN] = 0x20; serial_data[SERIAL_LSR - SERIAL_PORT_MIN] = 0x60; diff --git a/src/components/implementation/simple_vmm/vmm/devices/vpci/virtio_net_io.c b/src/components/implementation/simple_vmm/vmm/devices/vpci/virtio_net_io.c index 371e83839c..6c063a21c9 100644 --- a/src/components/implementation/simple_vmm/vmm/devices/vpci/virtio_net_io.c +++ b/src/components/implementation/simple_vmm/vmm/devices/vpci/virtio_net_io.c @@ -27,6 +27,7 @@ */ #include #include +#include #include "virtio_net_io.h" #include "vpci.h" #include "virtio_ring.h" @@ -45,7 +46,7 @@ static unsigned char icmp_reply[] = { static inline int vq_ring_ready(struct virtio_vq_info *vq) { - return 1; + return ((vq->flags & VQ_ALLOC) == VQ_ALLOC); } static inline int @@ -53,8 +54,10 @@ vq_has_descs(struct virtio_vq_info *vq) { int ret = 0; if (vq_ring_ready(vq) && vq->last_avail != vq->avail->idx) { - if ((u16_t)((unsigned int)vq->avail->idx - vq->last_avail) > vq->qsize) - printc ("no valid descriptor\n"); + if (unlikely((u16_t)((unsigned int)vq->avail->idx - vq->last_avail) > vq->qsize)) { + printc("no valid descriptor\n"); + assert(0); + } else ret = 1; } @@ -78,11 +81,25 @@ vq_endchains(struct vmrt_vm_vcpu *vcpu, struct virtio_vq_info *vq, int used_all_ u16_t event_idx, new_idx, old_idx; int intr; - if (!vq || !vq->used) + if (unlikely(!vq || !vq->used)) return; + + old_idx = vq->save_used; + vq->save_used = new_idx = vq->used->idx; + + intr = new_idx != old_idx && + !(vq->avail->flags & VRING_AVAIL_F_NO_INTERRUPT); - /* TODO: 57 is virtio-net interrupt, should read it from somewhere else more reliable */ - lapic_intr_inject(vcpu, 57, 0); + if (intr) { + virtio_net_regs.header.ISR = 1; + /* TODO: 57 is virtio-net interrupt without io apic, 33 is with io apic */ +#if VMX_SUPPORT_POSTED_INTR + vlapic_set_intr(vcpu, 33, 0); +#else + lapic_intr_inject(vcpu, 33, 0); +#endif + } + } static inline struct iovec * @@ -90,24 +107,10 @@ rx_iov_trim(struct iovec *iov, int *niov, size_t tlen) { struct iovec *riov; - /* XXX short-cut: assume first segment is >= tlen */ - if (iov[0].iov_len < tlen) { - printc("vtnet: rx_iov_trim: iov_len=%lu, tlen=%lu\n", iov[0].iov_len, tlen); - return NULL; - } - iov[0].iov_len -= tlen; - if (iov[0].iov_len == 0) { - if (*niov <= 1) { - printc("vtnet: rx_iov_trim: *niov=%d\n", *niov); - return NULL; - } - *niov -= 1; - riov = &iov[1]; - } else { - iov[0].iov_base = (void *)((uintptr_t)iov[0].iov_base + tlen); - riov = &iov[0]; - } + + iov[0].iov_base = (void *)((uintptr_t)iov[0].iov_base + tlen); + riov = &iov[0]; return riov; } @@ -149,13 +152,14 @@ virtio_vq_init(struct vmrt_vm_vcpu *vcpu, int nr_queue, u32_t pfn) /* Mark queue as allocated after initialization is complete. */ mb(); vq->flags = VQ_ALLOC; + vq->vcpu = vcpu; - printc("%s: vq enable done\n", __func__); return; error: vq->flags = 0; printc("%s: vq enable failed\n", __func__); + assert(0); } static inline int @@ -164,15 +168,21 @@ _vq_record(int i, volatile struct vring_desc *vd, void *host_addr; - if (i >= n_iov) - return -1; + if (i >= n_iov) { + printc("Number of descs is more than iov slots\n"); + assert(0); + } + host_addr = paddr_guest2host(vd->addr, vcpu->vm); - if (!host_addr) - return -1; + if (unlikely(!host_addr)) { + printc("Invalid host addr\n"); + assert(0); + } iov[i].iov_base = host_addr; iov[i].iov_len = vd->len; - if (flags != NULL) + if (unlikely(flags != NULL)) flags[i] = vd->flags; + return 0; } @@ -196,7 +206,6 @@ vq_getchain(struct vmrt_vm_vcpu *vcpu, struct virtio_vq_info *vq, u16_t *pidx, unsigned int idx, next; volatile struct vring_desc *vdir, *vindir, *vp; - const char *name = "testnic"; /* * Note: it's the responsibility of the guest not to * update vq->avail->idx until all of the descriptors @@ -212,13 +221,12 @@ vq_getchain(struct vmrt_vm_vcpu *vcpu, struct virtio_vq_info *vq, u16_t *pidx, */ idx = vq->last_avail; ndesc = (u16_t)((unsigned int)vq->avail->idx - idx); - if (ndesc == 0) + if (unlikely(ndesc == 0)) return 0; - if (ndesc > vq->qsize) { - /* XXX need better way to diagnose issues */ - printc("%s: ndesc (%u) out of range, driver confused?\r\n", - name, (unsigned int)ndesc); - return -1; + if (unlikely(ndesc > vq->qsize)) { + printc("ndesc (%u) out of range, driver confused?\r\n", + (unsigned int)ndesc); + assert(0); } /* @@ -236,75 +244,27 @@ vq_getchain(struct vmrt_vm_vcpu *vcpu, struct virtio_vq_info *vq, u16_t *pidx, printc("tx: descriptor index %u out of range, " "driver confused?\r\n", next); - return -1; + assert(0); } vdir = &vq->desc[next]; - if ((vdir->flags & VRING_DESC_F_INDIRECT) == 0) { - if (_vq_record(i, vdir, iov, n_iov, flags, vcpu)) { - printc("%s: mapping to host failed\r\n", name); - return -1; + if (likely((vdir->flags & VRING_DESC_F_INDIRECT) == 0)) { + if (unlikely(_vq_record(i, vdir, iov, n_iov, flags, vcpu))) { + printc("mapping to host failed\r\n"); + assert(0); } i++; - } else if ((virtio_net_regs.header.dev_features & - (1 << VIRTIO_RING_F_INDIRECT_DESC)) == 0) { - printc("%s: descriptor has forbidden INDIRECT flag, " - "driver confused?\r\n", - name); - return -1; } else { - n_indir = vdir->len / 16; - if ((vdir->len & 0xf) || n_indir == 0) { - printc("%s: invalid indir len 0x%x, " - "driver confused?\r\n", - name, (unsigned int)vdir->len); - return -1; - } - vindir = paddr_guest2host( - vdir->addr, vcpu->vm); - - if (!vindir) { - printc("%s cannot get host memory\r\n", name); - return -1; - } - /* - * Indirects start at the 0th, then follow - * their own embedded "next"s until those run - * out. Each one's indirect flag must be off - * (we don't really have to check, could just - * ignore errors...). - */ - next = 0; - for (;;) { - vp = &vindir[next]; - if (vp->flags & VRING_DESC_F_INDIRECT) { - printc("%s: indirect desc has INDIR flag," - " driver confused?\r\n", - name); - return -1; - } - if (_vq_record(i, vp, iov, n_iov, flags, vcpu)) { - printc("%s: mapping to host failed\r\n", name); - return -1; - } - if (++i > VQ_MAX_DESCRIPTORS) - goto loopy; - if ((vp->flags & VRING_DESC_F_NEXT) == 0) - break; - next = vp->next; - if (next >= n_indir) { - printc("%s: invalid next %u > %u, " - "driver confused?\r\n", - name, (unsigned int)next, n_indir); - return -1; - } - } + printc("descriptor has forbidden INDIRECT flag, " + "driver confused?\r\n"); + assert(0); } if ((vdir->flags & VRING_DESC_F_NEXT) == 0) return i; } -loopy: - printc("%s: descriptor loop? count > %d - driver confused?\r\n", - name, i); + + /* code should not come here */ + printc("descriptor loop? count > %d - driver confused?\r\n", i); + assert(0); return -1; } @@ -335,134 +295,90 @@ vq_relchain(struct virtio_vq_info *vq, u16_t idx, u32_t iolen) vuh->idx = uidx; } -static void -virtio_net_tap_rx(struct vmrt_vm_vcpu *vcpu) +void +vq_retchain(struct virtio_vq_info *vq) +{ + vq->last_avail--; +} + +void +virtio_net_rcv_one_pkt(void *data, int pkt_len) { struct iovec iov[VIRTIO_NET_MAXSEGS], *riov; struct virtio_vq_info *vq; + struct vmrt_vm_vcpu *vcpu; void *vrx; - int len, n; + int n; u16_t idx; int ret; - /* - * Check for available rx buffers - */ vq = &virtio_net_vqs[VIRTIO_NET_RXQ]; - if (!vq_has_descs(vq)) { - VM_PANIC(vcpu); + + vcpu = vq->vcpu; + + if (unlikely(!vq_has_descs(vq))) { + return; } - do { - /* - * Get descriptor chain. - */ - n = vq_getchain(vcpu, vq, &idx, iov, VIRTIO_NET_MAXSEGS, NULL); - if (n < 1 || n > VIRTIO_NET_MAXSEGS) { - printc("vtnet: virtio_net_tap_rx: vq_getchain = %d\n", n); - VM_PANIC(vcpu); - return; - } - /* - * Get a pointer to the rx header, and use the - * data immediately following it for the packet buffer. - */ - vrx = iov[0].iov_base; - riov = rx_iov_trim(iov, &n, sizeof(struct virtio_net_rxhdr)); + n = vq_getchain(vcpu, vq, &idx, iov, VIRTIO_NET_MAXSEGS, NULL); - memcpy(iov[0].iov_base, icmp_reply, sizeof(icmp_reply)); + if (unlikely (n < 1 || n >= VIRTIO_NET_MAXSEGS )) { + printc("vtnet: virtio_net_tap_rx: vq_getchain = %d\n", n); + assert(0); + } - len = sizeof(icmp_reply); - if (riov == NULL) - VM_PANIC(vcpu); + vrx = iov[0].iov_base; + /* every packet needs to be proceeded by a virtio_net_rxhdr header space */ + riov = rx_iov_trim(iov, &n, sizeof(struct virtio_net_rxhdr)); - memset(vrx, 0, sizeof(struct virtio_net_rxhdr)); - + assert(iov[0].iov_len >= (size_t)pkt_len); - if (len < 0 ) { - /* - * No more packets, but still some avail ring - * entries. Interrupt if needed/appropriate. - */ - /*TODO: fix the erro case */ - VM_PANIC(vcpu); - } + memcpy(iov[0].iov_base, data, pkt_len); - /* - * The only valid field in the rx packet header is the - * number of buffers if merged rx bufs were negotiated. - */ + memset(vrx, 0, sizeof(struct virtio_net_rxhdr)); - /* - * Release this chain and handle more chains. - */ - vq_relchain(vq, idx, len); - } while (vq_has_descs(vq)); + vq_relchain(vq, idx, pkt_len + sizeof(struct virtio_net_rxhdr)); - /* Interrupt if needed, including for NOTIFY_ON_EMPTY. */ vq_endchains(vcpu, vq, 1); + return; } -static void -virtio_net_proctx(struct vmrt_vm_vcpu *vcpu, struct virtio_vq_info *vq) +void +virtio_net_send_one_pkt(void *data, u16_t *pkt_len) { - struct iovec iov[VIRTIO_NET_MAXSEGS + 1]; + struct virtio_vq_info *vq = &virtio_net_vqs[VIRTIO_NET_TXQ]; + struct iovec iov[VIRTIO_NET_MAXSEGS]; + struct vmrt_vm_vcpu *vcpu; int i, n; int plen, tlen; u16_t idx; + while (!vq_has_descs(vq)) { + sched_thd_block(0); + } + vcpu = vq->vcpu; + memset(&iov, 0, sizeof(iov)); - /* - * Obtain chain of descriptors. The first one is - * really the header descriptor, so we need to sum - * up two lengths: packet length and transfer length. - */ n = vq_getchain(vcpu, vq, &idx, iov, VIRTIO_NET_MAXSEGS, NULL); - if (n < 1 || n > VIRTIO_NET_MAXSEGS) { + if (unlikely(n < 1 || n >= VIRTIO_NET_MAXSEGS)) { printc("vtnet: virtio_net_proctx: vq_getchain = %d\n", n); - return; + assert(0); } + plen = 0; tlen = iov[0].iov_len; - for (i = 1; i < n; i++) { - plen += iov[i].iov_len; - tlen += iov[i].iov_len; - } - - printc("virtio: packet send, %d bytes, %d segs\n\r", plen, n); - /* begin to send packets */ - dump_packet(iov[1].iov_base, plen); - /* TODO: process tx output to nic component */ - /* net->virtio_net_tx(net, &iov[1], n - 1, plen); */ - - /* chain is processed, release it and set tlen */ - vq_relchain(vq, idx, tlen); -} - -static void -virtio_net_tx_thread(void *param, struct vmrt_vm_vcpu *vcpu) -{ - struct virtio_vq_info *vq = &virtio_net_vqs[VIRTIO_NET_TXQ]; + assert(n == 2); - while (!vq_ring_ready(vq)) - VM_PANIC(vcpu); + plen += iov[1].iov_len; + tlen += iov[1].iov_len; - vq->used->flags |= VRING_USED_F_NO_NOTIFY; + memcpy(data, iov[1].iov_base, iov[1].iov_len); - do { - /* - * Run through entries, placing them into - * iovecs and sending when an end-of-packet - * is found - */ - virtio_net_proctx(vcpu, vq); - } while (vq_has_descs(vq)); - printc("tx done on busrt\n"); + *pkt_len = plen; + vq_relchain(vq, idx, tlen); - /* - * Generate an interrupt if needed. - */ vq_endchains(vcpu, vq, 1); + return; } static void @@ -494,6 +410,7 @@ virtio_net_inb(u32_t port_id, struct vmrt_vm_vcpu *vcpu) break; case VIRTIO_NET_ISR: vcpu->shared_region->ax = virtio_net_regs.header.ISR; + virtio_net_regs.header.ISR = 0; break; case VIRTIO_NET_STATUS: vcpu->shared_region->ax = virtio_net_regs.config_reg.status; @@ -559,8 +476,7 @@ virtio_net_outw(u32_t port_id, struct vmrt_vm_vcpu *vcpu) break; case VIRTIO_NET_QUEUE_NOTIFY: if (val == VIRTIO_NET_TXQ) { - virtio_net_tx_thread(0, vcpu); - virtio_net_tap_rx(vcpu); + sched_thd_wakeup(12); } virtio_net_regs.header.queue_notify = val; break; diff --git a/src/components/implementation/simple_vmm/vmm/devices/vpci/virtio_net_io.h b/src/components/implementation/simple_vmm/vmm/devices/vpci/virtio_net_io.h index d7924e40e4..a5239b8c47 100644 --- a/src/components/implementation/simple_vmm/vmm/devices/vpci/virtio_net_io.h +++ b/src/components/implementation/simple_vmm/vmm/devices/vpci/virtio_net_io.h @@ -44,7 +44,7 @@ #define VIRTIO_NET_F_GUEST_ANNOUNCE (21) #define VIRTIO_NET_RINGSZ 512 -#define VIRTIO_NET_MAXSEGS 256 +#define VIRTIO_NET_MAXSEGS 32 #define VQ_MAX_DESCRIPTORS 512 struct virtio_header { @@ -122,6 +122,9 @@ struct virtio_vq_info { u32_t gpa_avail[2]; /* gpa of avail_ring */ u32_t gpa_used[2]; /* gpa of used_ring */ int enabled; /* whether the virtqueue is enabled */ + + /* each vq is bounded to a vcpu */ + struct vmrt_vm_vcpu *vcpu; }; /* @@ -134,7 +137,8 @@ struct virtio_net_rxhdr { u16_t vrh_gso_size; u16_t vrh_csum_start; u16_t vrh_csum_offset; - /* u16_t vrh_bufs; */ } __attribute__((packed)); void virtio_net_handler(u16_t port, int dir, int sz, struct vmrt_vm_vcpu *vcpu); +void virtio_net_rcv_one_pkt(void *data, int pkt_len); +void virtio_net_send_one_pkt(void *data, u16_t *pkt_len); diff --git a/src/components/implementation/simple_vmm/vmm/devices/vpci/vpci.c b/src/components/implementation/simple_vmm/vmm/devices/vpci/vpci.c index 17c9b397ff..e1854c8bac 100644 --- a/src/components/implementation/simple_vmm/vmm/devices/vpci/vpci.c +++ b/src/components/implementation/simple_vmm/vmm/devices/vpci/vpci.c @@ -94,6 +94,7 @@ set_vpci_bar(u8_t* raw_data, u8_t reg, u32_t val) *(u32_t *)raw_data = val; } else { /* Mem bar */ /* Currently don't support IO bar */ + printc("no vpci bar\n"); assert(0); } diff --git a/src/components/implementation/simple_vmm/vmm/devices/vpic/vpic.c b/src/components/implementation/simple_vmm/vmm/devices/vpic/vpic.c index f2e023503a..f80471d528 100644 --- a/src/components/implementation/simple_vmm/vmm/devices/vpic/vpic.c +++ b/src/components/implementation/simple_vmm/vmm/devices/vpic/vpic.c @@ -20,6 +20,8 @@ struct chip_8259 { static struct chip_8259 chip; +static u8_t pic_elcr1 = 0, pic_elcr2 = 0; + void vpic_handler(u16_t port, int dir, int sz, struct vmrt_vm_vcpu *vcpu) { @@ -36,6 +38,15 @@ vpic_handler(u16_t port, int dir, int sz, struct vmrt_vm_vcpu *vcpu) case PIC_MASTER_CMD_PORT: vcpu->shared_region->ax = chip.master_cmd; break; + case PIC_SLAVE_CMD_PORT: + vcpu->shared_region->ax = chip.slave_cmd; + break; + case PIC_ELCR1: + vcpu->shared_region->ax = pic_elcr1; + break; + case PIC_ELCR2: + vcpu->shared_region->ax = pic_elcr2; + break; default: printc("vpic_handler: port: 0x%x, dir: %d\n", port, dir); VM_PANIC(vcpu); @@ -77,6 +88,12 @@ vpic_handler(u16_t port, int dir, int sz, struct vmrt_vm_vcpu *vcpu) chip.is_slave_init = 0; } break; + case PIC_ELCR1: + pic_elcr1 = val; + break; + case PIC_ELCR2: + pic_elcr2 = val; + break; default: assert(0); break; diff --git a/src/components/implementation/simple_vmm/vmm/devices/vpic/vpic.h b/src/components/implementation/simple_vmm/vmm/devices/vpic/vpic.h index 673f75cfc7..a7001a6b52 100644 --- a/src/components/implementation/simple_vmm/vmm/devices/vpic/vpic.h +++ b/src/components/implementation/simple_vmm/vmm/devices/vpic/vpic.h @@ -18,5 +18,7 @@ #define ICW4_SFNM 0x10 #define PIC_EOI 0x20 +#define PIC_ELCR1 0x4d0 +#define PIC_ELCR2 0x4d1 void vpic_handler(u16_t port, int dir, int sz, struct vmrt_vm_vcpu *vcpu); diff --git a/src/components/implementation/simple_vmm/vmm/devices/vrtc/vrtc.c b/src/components/implementation/simple_vmm/vmm/devices/vrtc/vrtc.c index 9073d18457..c971cef94e 100644 --- a/src/components/implementation/simple_vmm/vmm/devices/vrtc/vrtc.c +++ b/src/components/implementation/simple_vmm/vmm/devices/vrtc/vrtc.c @@ -42,7 +42,6 @@ vrtc_handler(u16_t port, int dir, int sz, struct vmrt_vm_vcpu *vcpu) } break; case CMOS_DATA_PORT: - assert(0); break; default: assert(0); diff --git a/src/components/implementation/simple_vmm/vmm/instr_emul.c b/src/components/implementation/simple_vmm/vmm/instr_emul.c new file mode 100644 index 0000000000..230a0a9bdf --- /dev/null +++ b/src/components/implementation/simple_vmm/vmm/instr_emul.c @@ -0,0 +1,1381 @@ +/*- + * Copyright (c) 2012 Sandvine, Inc. + * Copyright (c) 2012 NetApp, Inc. + * Copyright (c) 2017-2022 Intel Corporation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#include +#include + +#include + +#define CPU_REG_FIRST CPU_REG_RAX +#define CPU_REG_LAST CPU_REG_GDTR +#define CPU_REG_GENERAL_FIRST CPU_REG_RAX +#define CPU_REG_GENERAL_LAST CPU_REG_R15 +#define CPU_REG_NONGENERAL_FIRST CPU_REG_CR0 +#define CPU_REG_NONGENERAL_LAST CPU_REG_GDTR +#define CPU_REG_NATURAL_FIRST CPU_REG_CR0 +#define CPU_REG_NATURAL_LAST CPU_REG_RFLAGS +#define CPU_REG_64BIT_FIRST CPU_REG_EFER +#define CPU_REG_64BIT_LAST CPU_REG_PDPTE3 +#define CPU_REG_SEG_FIRST CPU_REG_ES +#define CPU_REG_SEG_LAST CPU_REG_GS + +#define PSL_C 0x00000001U /* carry bit */ +#define PSL_PF 0x00000004U /* parity bit */ +#define PSL_AF 0x00000010U /* bcd carry bit */ +#define PSL_Z 0x00000040U /* zero bit */ +#define PSL_N 0x00000080U /* negative bit */ +#define PSL_D 0x00000400U /* string instruction direction bit */ +#define PSL_V 0x00000800U /* overflow bit */ +#define PSL_AC 0x00040000U /* alignment checking */ + +/* + * Protections are chosen from these bits, or-ed together + */ +#define PROT_READ 0x01U /* pages can be read */ +#define PROT_WRITE 0x02U /* pages can be written */ + +/* struct vie_op.op_type */ +#define VIE_OP_TYPE_NONE 0U +#define VIE_OP_TYPE_MOV 1U +#define VIE_OP_TYPE_MOVSX 2U +#define VIE_OP_TYPE_MOVZX 3U +#define VIE_OP_TYPE_AND 4U +#define VIE_OP_TYPE_OR 5U +#define VIE_OP_TYPE_SUB 6U +#define VIE_OP_TYPE_TWO_BYTE 7U +#define VIE_OP_TYPE_PUSH 8U +#define VIE_OP_TYPE_CMP 9U +#define VIE_OP_TYPE_POP 10U +#define VIE_OP_TYPE_MOVS 11U +#define VIE_OP_TYPE_GROUP1 12U +#define VIE_OP_TYPE_STOS 13U +#define VIE_OP_TYPE_BITTEST 14U +#define VIE_OP_TYPE_TEST 15U +#define VIE_OP_TYPE_XCHG 16U + +/* struct vie_op.op_flags */ +#define VIE_OP_F_IMM (1U << 0U) /* 16/32-bit immediate operand */ +#define VIE_OP_F_IMM8 (1U << 1U) /* 8-bit immediate operand */ +#define VIE_OP_F_MOFFSET (1U << 2U) /* 16/32/64-bit immediate moffset */ +#define VIE_OP_F_NO_MODRM (1U << 3U) +#define VIE_OP_F_CHECK_GVA_DI (1U << 4U) /* for movs, need to check DI */ +/* + * The VIE_OP_F_BYTE_OP only set when the instruction support + * Encoding of Operand Size (w) Bit and the w bit of opcode is 0. + * according B.2 GENERAL-PURPOSE INSTRUCTION FORMATS AND ENCODINGS + * FOR NON-64-BIT MODES, Vol 2, Intel SDM. + */ +#define VIE_OP_F_BYTE_OP (1U << 5U) /* 8-bit operands. */ +#define VIE_OP_F_WORD_OP (1U << 6U) /* 16-bit operands. */ + +static const struct instr_emul_vie_op two_byte_opcodes[256] = { + [0xB6] = { + .op_type = VIE_OP_TYPE_MOVZX, + .op_flags = VIE_OP_F_BYTE_OP, + }, + [0xB7] = { + .op_type = VIE_OP_TYPE_MOVZX, + .op_flags = VIE_OP_F_WORD_OP, + }, + [0xBA] = { + .op_type = VIE_OP_TYPE_BITTEST, + .op_flags = VIE_OP_F_IMM8, + }, + [0xBE] = { + .op_type = VIE_OP_TYPE_MOVSX, + .op_flags = VIE_OP_F_BYTE_OP, + }, +}; + +static const struct instr_emul_vie_op one_byte_opcodes[256] = { + [0x0F] = { + .op_type = VIE_OP_TYPE_TWO_BYTE + }, + [0x2B] = { + .op_type = VIE_OP_TYPE_SUB, + }, + [0x39] = { + .op_type = VIE_OP_TYPE_CMP, + }, + [0x3B] = { + .op_type = VIE_OP_TYPE_CMP, + }, + [0x88] = { + .op_type = VIE_OP_TYPE_MOV, + .op_flags = VIE_OP_F_BYTE_OP, + }, + [0x89] = { + .op_type = VIE_OP_TYPE_MOV, + }, + [0x8A] = { + .op_type = VIE_OP_TYPE_MOV, + .op_flags = VIE_OP_F_BYTE_OP, + }, + [0x8B] = { + .op_type = VIE_OP_TYPE_MOV, + }, + [0xA1] = { + .op_type = VIE_OP_TYPE_MOV, + .op_flags = VIE_OP_F_MOFFSET | VIE_OP_F_NO_MODRM, + }, + [0xA3] = { + .op_type = VIE_OP_TYPE_MOV, + .op_flags = VIE_OP_F_MOFFSET | VIE_OP_F_NO_MODRM, + }, + [0xA4] = { + .op_type = VIE_OP_TYPE_MOVS, + .op_flags = VIE_OP_F_NO_MODRM | VIE_OP_F_CHECK_GVA_DI | VIE_OP_F_BYTE_OP, + }, + [0xA5] = { + .op_type = VIE_OP_TYPE_MOVS, + .op_flags = VIE_OP_F_NO_MODRM | VIE_OP_F_CHECK_GVA_DI, + }, + [0xAA] = { + .op_type = VIE_OP_TYPE_STOS, + .op_flags = VIE_OP_F_NO_MODRM | VIE_OP_F_BYTE_OP, + }, + [0xAB] = { + .op_type = VIE_OP_TYPE_STOS, + .op_flags = VIE_OP_F_NO_MODRM + }, + [0xC6] = { + /* XXX Group 11 extended opcode - not just MOV */ + .op_type = VIE_OP_TYPE_MOV, + .op_flags = VIE_OP_F_IMM8 | VIE_OP_F_BYTE_OP, + }, + [0xC7] = { + .op_type = VIE_OP_TYPE_MOV, + .op_flags = VIE_OP_F_IMM, + }, + [0x23] = { + .op_type = VIE_OP_TYPE_AND, + }, + [0x80] = { + /* Group 1 extended opcode */ + .op_type = VIE_OP_TYPE_GROUP1, + .op_flags = VIE_OP_F_IMM8, + }, + [0x81] = { + /* Group 1 extended opcode */ + .op_type = VIE_OP_TYPE_GROUP1, + .op_flags = VIE_OP_F_IMM, + }, + [0x83] = { + /* Group 1 extended opcode */ + .op_type = VIE_OP_TYPE_GROUP1, + .op_flags = VIE_OP_F_IMM8, + }, + [0x84] = { + .op_type = VIE_OP_TYPE_TEST, + .op_flags = VIE_OP_F_BYTE_OP, + }, + [0x85] = { + .op_type = VIE_OP_TYPE_TEST, + }, + [0x86] = { + .op_type = VIE_OP_TYPE_XCHG, + }, + [0x87] = { + .op_type = VIE_OP_TYPE_XCHG, + }, + [0x08] = { + .op_type = VIE_OP_TYPE_OR, + .op_flags = VIE_OP_F_BYTE_OP, + }, + [0x09] = { + .op_type = VIE_OP_TYPE_OR, + }, +}; + +/* struct vie.mod */ +#define VIE_MOD_INDIRECT 0U +#define VIE_MOD_INDIRECT_DISP8 1U +#define VIE_MOD_INDIRECT_DISP32 2U +#define VIE_MOD_DIRECT 3U + +/* struct vie.rm */ +#define VIE_RM_SIB 4U +#define VIE_RM_DISP32 5U + +static uint64_t size2mask[9] = { + [1] = (1UL << 8U) - 1UL, + [2] = (1UL << 16U) - 1UL, + [4] = (1UL << 32U) - 1UL, + [8] = ~0UL, +}; + +#define VMX_INVALID_VMCS_FIELD 0xffffffffU + +/* + * This struct vmcs_seg_field is defined separately to hold the vmcs field + * address of segment selector. + */ +struct vmcs_seg_field { + uint32_t base_field; + uint32_t limit_field; + uint32_t access_field; +}; + +/* + * The 'access' field has the format specified in Table 21-2 of the Intel + * Architecture Manual vol 3b. + * + * XXX The contents of the 'access' field are architecturally defined except + * bit 16 - Segment Unusable. + */ +struct seg_desc { + uint64_t base; + uint32_t limit; + uint32_t access; +}; + +static inline struct acrn_mmio_request *vcpu_mmio_req(struct vmrt_vm_vcpu *vcpu) +{ + return (struct acrn_mmio_request *)(vcpu->mmio_request); +} + +static inline uint32_t seg_desc_type(uint32_t access) +{ + return (access & 0x001fU); +} + +static uint64_t vm_get_register(struct vmrt_vm_vcpu *vcpu, enum cpu_reg_name reg) +{ + volatile struct vm_vcpu_shared_region *regs = vcpu->shared_region; + uint64_t reg_val = 0UL; + + switch (reg) + { + case CPU_REG_RAX: + reg_val = regs->ax; + break; + case CPU_REG_RCX: + reg_val = regs->cx; + break; + case CPU_REG_RDX: + reg_val = regs->dx; + break; + case CPU_REG_RBX: + reg_val = regs->bx; + break; + case CPU_REG_RSP: + reg_val = regs->sp; + break; + case CPU_REG_RBP: + reg_val = regs->bp; + break; + case CPU_REG_RSI: + reg_val = regs->si; + break; + case CPU_REG_RDI: + reg_val = regs->di; + break; + case CPU_REG_R8: + reg_val = regs->r8; + break; + case CPU_REG_R9: + reg_val = regs->r9; + break; + case CPU_REG_R10: + reg_val = regs->r10; + break; + case CPU_REG_R11: + reg_val = regs->r11; + break; + case CPU_REG_R12: + reg_val = regs->r12; + break; + case CPU_REG_R13: + reg_val = regs->r13; + break; + case CPU_REG_R14: + reg_val = regs->r14; + break; + case CPU_REG_R15: + reg_val = regs->r15; + break; + default: + VM_PANIC(vcpu); + break; + } + + return reg_val; +} + +static void vm_set_register(struct vmrt_vm_vcpu *vcpu, enum cpu_reg_name reg, + uint64_t val) +{ + volatile struct vm_vcpu_shared_region *regs = vcpu->shared_region; + + switch (reg) + { + case CPU_REG_RAX: + regs->ax = val; + break; + case CPU_REG_RCX: + regs->cx = val; + break; + case CPU_REG_RDX: + regs->dx = val; + break; + case CPU_REG_RBX: + regs->bx = val; + break; + case CPU_REG_RSP: + regs->sp = val; + break; + case CPU_REG_RBP: + regs->bp = val; + break; + case CPU_REG_RSI: + regs->si = val; + break; + case CPU_REG_RDI: + regs->di = val; + break; + case CPU_REG_R8: + regs->r8 = val; + break; + case CPU_REG_R9: + regs->r9 = val; + break; + case CPU_REG_R10: + regs->r10 = val; + break; + case CPU_REG_R11: + regs->r11 = val; + break; + case CPU_REG_R12: + regs->r12 = val; + break; + case CPU_REG_R13: + regs->r13 = val; + break; + case CPU_REG_R14: + regs->r14 = val; + break; + case CPU_REG_R15: + regs->r15 = val; + break; + default: + VM_PANIC(vcpu); + break; + } +} + +static int32_t vie_canonical_check(uint64_t gla) +{ + int32_t ret = 0; + uint64_t mask; + + /* + * The value of the bit 47 in the 'gla' should be replicated in the + * most significant 16 bits. + */ + mask = ~((1UL << 48U) - 1UL); + if ((gla & (1UL << 47U)) != 0U) { + ret = ((gla & mask) != mask) ? 1 : 0; + } else { + ret = ((gla & mask) != 0U) ? 1 : 0; + } + + return ret; +} + +/* + * @pre vcpu != NULL + */ +static inline void vie_mmio_read(struct vmrt_vm_vcpu *vcpu, uint64_t *rval) +{ + *rval = vcpu_mmio_req(vcpu)->value; +} + +/* + * @pre vcpu != NULL + */ +static inline void vie_mmio_write(struct vmrt_vm_vcpu *vcpu, uint64_t wval) +{ + vcpu_mmio_req(vcpu)->value = wval; +} + +static void vie_calc_bytereg(const struct instr_emul_vie *vie, + enum cpu_reg_name *reg, int32_t *lhbr) +{ + *lhbr = 0; + *reg = (enum cpu_reg_name)(vie->reg); + + /* + * 64-bit mode imposes limitations on accessing legacy high byte + * registers (lhbr). + * + * The legacy high-byte registers cannot be addressed if the REX + * prefix is present. In this case the values 4, 5, 6 and 7 of the + * 'ModRM:reg' field address %spl, %bpl, %sil and %dil respectively. + * + * If the REX prefix is not present then the values 4, 5, 6 and 7 + * of the 'ModRM:reg' field address the legacy high-byte registers, + * %ah, %ch, %dh and %bh respectively. + */ + if (vie->rex_present == 0U) { + if ((vie->reg & 0x4U) != 0U) { + *lhbr = 1; + *reg = (enum cpu_reg_name)(vie->reg & 0x3U); + } + } +} + +static uint8_t vie_read_bytereg(struct vmrt_vm_vcpu *vcpu, const struct instr_emul_vie *vie) +{ + int32_t lhbr; + uint64_t val; + uint8_t reg_val; + enum cpu_reg_name reg; + + vie_calc_bytereg(vie, ®, &lhbr); + val = vm_get_register(vcpu, reg); + + /* + * To obtain the value of a legacy high byte register shift the + * base register right by 8 bits (%ah = %rax >> 8). + */ + if (lhbr != 0) { + reg_val = (uint8_t)(val >> 8U); + } else { + reg_val = (uint8_t)val; + } + + return reg_val; +} + +static void vie_write_bytereg(struct vmrt_vm_vcpu *vcpu, const struct instr_emul_vie *vie, + uint8_t byte) +{ + uint64_t origval, val, mask; + enum cpu_reg_name reg; + int32_t lhbr; + + vie_calc_bytereg(vie, ®, &lhbr); + origval = vm_get_register(vcpu, reg); + + val = byte; + mask = 0xffU; + if (lhbr != 0) { + /* + * Shift left by 8 to store 'byte' in a legacy high + * byte register. + */ + val <<= 8U; + mask <<= 8U; + } + val |= origval & ~mask; + vm_set_register(vcpu, reg, val); +} + +/** + * @pre vcpu != NULL + * @pre size = 1, 2, 4 or 8 + * @pre ((reg <= CPU_REG_LAST) && (reg >= CPU_REG_FIRST)) + * @pre ((reg != CPU_REG_CR2) && (reg != CPU_REG_IDTR) && (reg != CPU_REG_GDTR)) + */ +static void vie_update_register(struct vmrt_vm_vcpu *vcpu, enum cpu_reg_name reg, + uint64_t val_arg, uint8_t size) +{ + uint64_t origval; + uint64_t val = val_arg; + + switch (size) { + case 1U: + case 2U: + origval = vm_get_register(vcpu, reg); + val &= size2mask[size]; + val |= origval & ~size2mask[size]; + break; + case 4U: + val &= 0xffffffffUL; + break; + default: /* size == 8 */ + break; + } + + vm_set_register(vcpu, reg, val); +} + +#define RFLAGS_STATUS_BITS (PSL_C | PSL_PF | PSL_AF | PSL_Z | PSL_N | PSL_V) + +static void vie_update_rflags(struct vmrt_vm_vcpu *vcpu, uint64_t rflags2, uint64_t psl) +{ + uint8_t size; + uint64_t rflags; + + rflags = vm_get_register(vcpu, CPU_REG_RFLAGS); + + rflags &= ~RFLAGS_STATUS_BITS; + rflags |= rflags2 & psl; + size = 8U; + + vie_update_register(vcpu, CPU_REG_RFLAGS, rflags, size); +} + +/* + * Return the status flags that would result from doing (x - y). + */ +#define build_getcc(name, type) \ +static uint64_t name(type x, type y) \ +{ \ + uint64_t rflags; \ + \ + __asm __volatile("sub %2,%1; pushfq; popq %0" : \ + "=r" (rflags), "+r" (x) : "m" (y)); \ + return rflags; \ +} +build_getcc(getcc8, uint8_t) +build_getcc(getcc16, uint16_t) +build_getcc(getcc32, uint32_t) +build_getcc(getcc64, uint64_t) + +/** + * @pre opsize = 1, 2, 4 or 8 + */ +static uint64_t getcc(uint8_t opsize, uint64_t x, uint64_t y) +{ + uint64_t rflags; + switch (opsize) { + case 1U: + rflags = getcc8((uint8_t) x, (uint8_t) y); + break; + case 2U: + rflags = getcc16((uint16_t) x, (uint16_t) y); + break; + case 4U: + rflags = getcc32((uint32_t) x, (uint32_t) y); + break; + default: /* opsize == 8 */ + rflags = getcc64(x, y); + break; + } + + return rflags; +} + +static int32_t emulate_mov(struct vmrt_vm_vcpu *vcpu, const struct instr_emul_vie *vie) +{ + int32_t error; + uint8_t size; + enum cpu_reg_name reg; + uint8_t byte; + uint64_t val; + + size = vie->opsize; + error = 0; + switch (vie->opcode) { + case 0x88U: + /* + * MOV byte from reg (ModRM:reg) to mem (ModRM:r/m) + * 88/r: mov r/m8, r8 + * REX + 88/r: mov r/m8, r8 (%ah, %ch, %dh, %bh not available) + */ + byte = vie_read_bytereg(vcpu, vie); + vie_mmio_write(vcpu, byte); + break; + case 0x89U: + /* + * MOV from reg (ModRM:reg) to mem (ModRM:r/m) + * 89/r: mov r/m16, r16 + * 89/r: mov r/m32, r32 + * REX.W + 89/r mov r/m64, r64 + */ + + reg = (enum cpu_reg_name)(vie->reg); + val = vm_get_register(vcpu, reg); + val &= size2mask[size]; + vie_mmio_write(vcpu, val); + break; + case 0x8AU: + /* + * MOV byte from mem (ModRM:r/m) to reg (ModRM:reg) + * 8A/r: mov r8, r/m8 + * REX + 8A/r: mov r8, r/m8 + */ + vie_mmio_read(vcpu, &val); + vie_write_bytereg(vcpu, vie, (uint8_t)val); + break; + case 0x8BU: + /* + * MOV from mem (ModRM:r/m) to reg (ModRM:reg) + * 8B/r: mov r16, r/m16 + * 8B/r: mov r32, r/m32 + * REX.W 8B/r: mov r64, r/m64 + */ + vie_mmio_read(vcpu, &val); + reg = (enum cpu_reg_name)(vie->reg); + vie_update_register(vcpu, reg, val, size); + break; + case 0xA1U: + /* + * MOV from seg:moffset to AX/EAX/RAX + * A1: mov AX, moffs16 + * A1: mov EAX, moffs32 + * REX.W + A1: mov RAX, moffs64 + */ + vie_mmio_read(vcpu, &val); + reg = CPU_REG_RAX; + vie_update_register(vcpu, reg, val, size); + break; + case 0xA3U: + /* + * MOV from AX/EAX/RAX to seg:moffset + * A3: mov moffs16, AX + * A3: mov moffs32, EAX + * REX.W + A3: mov moffs64, RAX + */ + val = vm_get_register(vcpu, CPU_REG_RAX); + val &= size2mask[size]; + vie_mmio_write(vcpu, val); + break; + case 0xC6U: + /* + * MOV from imm8 to mem (ModRM:r/m) + * C6/0 mov r/m8, imm8 + * REX + C6/0 mov r/m8, imm8 + */ + vie_mmio_write(vcpu, (uint64_t)vie->immediate); + break; + case 0xC7U: + /* + * MOV from imm16/imm32 to mem (ModRM:r/m) + * C7/0 mov r/m16, imm16 + * C7/0 mov r/m32, imm32 + * REX.W + C7/0 mov r/m64, imm32 + * (sign-extended to 64-bits) + */ + val = (uint64_t)(vie->immediate) & size2mask[size]; + vie_mmio_write(vcpu, val); + break; + default: + /* + * For the opcode that is not handled (an invalid opcode), the + * error code is assigned to a default value (-EINVAL). + * Gracefully return this error code if prior case clauses have + * not been met. + */ + error = -EINVAL; + break; + } + + return error; +} + +static void copy_from_gva(struct vmrt_vm_vcpu *vcpu, void *buf, u64_t gva, u32_t len) +{ + void *src = GPA2HVA(vmrt_vm_gva2gpa(vcpu, gva), vcpu->vm); + memcpy(buf, src, len); +} + +static int32_t vie_init(struct instr_emul_vie *vie, struct vmrt_vm_vcpu *vcpu) +{ + volatile struct vm_vcpu_shared_region *regs = vcpu->shared_region; + u64_t inst_len = regs->inst_length; + int32_t ret; + + if ((inst_len > VIE_INST_SIZE) || (inst_len == 0U)) { + VM_PANIC(vcpu); + } else { + (void)memset(vie, 0U, sizeof(struct instr_emul_vie)); + + /* init register fields in vie. */ + vie->base_register = CPU_REG_LAST; + vie->index_register = CPU_REG_LAST; + vie->segment_register = CPU_REG_LAST; + + copy_from_gva(vcpu, vie->inst, regs->ip, inst_len); + /* + * Use this to print the inst binary to verify if the decodeed inst is correct + * + printc("inst to be decode: "); + for (u64_t i = 0; i < inst_len; i++) { + printc("%x ", vie->inst[i]); + } + printc("\ninst vie init done\n"); + */ + + vie->num_valid = (uint8_t)inst_len; + ret = 0; + } + + return ret; +} + +static int32_t vie_peek(const struct instr_emul_vie *vie, uint8_t *x) +{ + int32_t ret; + if (vie->num_processed < vie->num_valid) { + *x = vie->inst[vie->num_processed]; + ret = 0; + } else { + ret = -1; + } + return ret; +} + +static void vie_advance(struct instr_emul_vie *vie) +{ + + vie->num_processed++; +} + +static bool segment_override(uint8_t x, enum cpu_reg_name *seg) +{ + bool override = true; + switch (x) { + case 0x2EU: + *seg = CPU_REG_CS; + break; + case 0x36U: + *seg = CPU_REG_SS; + break; + case 0x3EU: + *seg = CPU_REG_DS; + break; + case 0x26U: + *seg = CPU_REG_ES; + break; + case 0x64U: + *seg = CPU_REG_FS; + break; + case 0x65U: + *seg = CPU_REG_GS; + break; + default: + override = false; + break; + } + return override; +} + +static void decode_op_and_addr_size(struct instr_emul_vie *vie) +{ + /* + * Section "Operand-Size And Address-Size Attributes", Intel SDM, Vol 1 + */ + + /* + * Default address size is 64-bits and default operand size + * is 32-bits. + */ + vie->addrsize = ((vie->addrsize_override != 0U) ? 4U : 8U); + if (vie->rex_w != 0U) { + vie->opsize = 8U; + } else if (vie->opsize_override != 0U) { + vie->opsize = 2U; + } else { + vie->opsize = 4U; + } +} +static int32_t decode_prefixes(struct instr_emul_vie *vie) +{ + uint8_t x, i; + int32_t ret = 0; + + for (i = 0U; i < VIE_PREFIX_SIZE; i++) { + if (vie_peek(vie, &x) != 0) { + ret = -1; + break; + } else { + if (x == 0x66U) { + vie->opsize_override = 1U; + } else if (x == 0x67U) { + vie->addrsize_override = 1U; + } else if (x == 0xF3U) { + vie->repz_present = 1U; + } else if (x == 0xF2U) { + vie->repnz_present = 1U; + } else if (segment_override(x, &vie->segment_register)) { + vie->seg_override = 1U; + } else { + break; + } + + vie_advance(vie); + } + } + + if (ret == 0) { + /* + * From section 2.2.1, "REX Prefixes", Intel SDM Vol 2: + * - Only one REX prefix is allowed per instruction. + * - The REX prefix must immediately precede the opcode byte or the + * escape opcode byte. + * - If an instruction has a mandatory prefix (0x66, 0xF2 or 0xF3) + * the mandatory prefix must come before the REX prefix. + */ + if ( (x >= 0x40U) && (x <= 0x4FU)) { + vie->rex_present = 1U; + vie->rex_w = (x >> 0x3U) & 1U; + vie->rex_r = (x >> 0x2U) & 1U; + vie->rex_x = (x >> 0x1U) & 1U; + vie->rex_b = (x >> 0x0U) & 1U; + vie_advance(vie); + } + decode_op_and_addr_size(vie); + } + + return ret; +} + +static int32_t decode_two_byte_opcode(struct instr_emul_vie *vie) +{ + int32_t ret = 0; + uint8_t x; + + if (vie_peek(vie, &x) != 0) { + ret = -1; + } else { + vie->opcode = x; + vie->op = two_byte_opcodes[x]; + + if (vie->op.op_type == VIE_OP_TYPE_NONE) { + ret = -1; + } else { + vie_advance(vie); + } + } + + return ret; +} + +static int32_t decode_opcode(struct instr_emul_vie *vie) +{ + int32_t ret = 0; + uint8_t x; + + if (vie_peek(vie, &x) != 0) { + ret = -1; + } else { + vie->opcode = x; + vie->op = one_byte_opcodes[x]; + + if (vie->op.op_type == VIE_OP_TYPE_NONE) { + ret = -1; + } else { + vie_advance(vie); + + if (vie->op.op_type == VIE_OP_TYPE_TWO_BYTE) { + ret = decode_two_byte_opcode(vie); + } + } + } + + return ret; +} + +static int32_t decode_modrm(struct instr_emul_vie *vie) +{ + uint8_t x; + int32_t ret; + + if ((vie->op.op_flags & VIE_OP_F_NO_MODRM) != 0U) { + ret = 0; + } else if (vie_peek(vie, &x) != 0) { + ret = -1; + } else { + vie->mod = (x >> 6U) & 0x3U; + vie->rm = (x >> 0U) & 0x7U; + vie->reg = (x >> 3U) & 0x7U; + + /* + * A direct addressing mode makes no sense in the context of an EPT + * fault. There has to be a memory access involved to cause the + * EPT fault. + */ + if (vie->mod == VIE_MOD_DIRECT) { + ret = -1; + } else { + if (((vie->mod == VIE_MOD_INDIRECT) && (vie->rm == VIE_RM_DISP32)) || + ((vie->mod != VIE_MOD_DIRECT) && (vie->rm == VIE_RM_SIB))) { + /* + * Table 2-5: Special Cases of REX Encodings + * + * mod=0, r/m=5 is used in the compatibility mode to + * indicate a disp32 without a base register. + * + * mod!=3, r/m=4 is used in the compatibility mode to + * indicate that the SIB byte is present. + * + * The 'b' bit in the REX prefix is don't care in + * this case. + */ + } else { + vie->rm |= (vie->rex_b << 3U); + } + + vie->reg |= (vie->rex_r << 3U); + + /* SIB */ + if ((vie->mod != VIE_MOD_DIRECT) && (vie->rm == VIE_RM_SIB)) { + /* done */ + } else { + vie->base_register = (enum cpu_reg_name)vie->rm; + + switch (vie->mod) { + case VIE_MOD_INDIRECT_DISP8: + vie->disp_bytes = 1U; + break; + case VIE_MOD_INDIRECT_DISP32: + vie->disp_bytes = 4U; + break; + case VIE_MOD_INDIRECT: + if (vie->rm == VIE_RM_DISP32) { + vie->disp_bytes = 4U; + /* + * Table 2-7. RIP-Relative Addressing + * + * In 64-bit mode mod=00 r/m=101 implies [rip] + disp32 + * whereas in compatibility mode it just implies disp32. + */ + + vie->base_register = CPU_REG_RIP; + printc("VM exit with RIP as indirect access"); + assert(0); + } + break; + default: + /* VIE_MOD_DIRECT */ + break; + } + + } + vie_advance(vie); + + ret = 0; + } + } + + return ret; +} + +static int32_t decode_sib(struct instr_emul_vie *vie) +{ + uint8_t x; + int32_t ret; + + /* Proceed only if SIB byte is present */ + if ((vie->mod == VIE_MOD_DIRECT) || (vie->rm != VIE_RM_SIB)) { + ret = 0; + } else if (vie_peek(vie, &x) != 0) { + ret = -1; + } else { + + /* De-construct the SIB byte */ + vie->ss = (x >> 6U) & 0x3U; + vie->index = (x >> 3U) & 0x7U; + vie->base = (x >> 0U) & 0x7U; + + /* Apply the REX prefix modifiers */ + vie->index |= vie->rex_x << 3U; + vie->base |= vie->rex_b << 3U; + + switch (vie->mod) { + case VIE_MOD_INDIRECT_DISP8: + vie->disp_bytes = 1U; + break; + case VIE_MOD_INDIRECT_DISP32: + vie->disp_bytes = 4U; + break; + default: + /* + * All possible values of 'vie->mod': + * 1. VIE_MOD_DIRECT + * has been handled at the start of this function + * 2. VIE_MOD_INDIRECT_DISP8 + * has been handled in prior case clauses + * 3. VIE_MOD_INDIRECT_DISP32 + * has been handled in prior case clauses + * 4. VIE_MOD_INDIRECT + * will be handled later after this switch statement + */ + break; + } + + if ((vie->mod == VIE_MOD_INDIRECT) && ((vie->base == 5U) || (vie->base == 13U))) { + /* + * Special case when base register is unused if mod = 0 + * and base = %rbp or %r13. + * + * Documented in: + * Table 2-3: 32-bit Addressing Forms with the SIB Byte + * Table 2-5: Special Cases of REX Encodings + */ + vie->disp_bytes = 4U; + } else { + vie->base_register = (enum cpu_reg_name)vie->base; + } + + /* + * All encodings of 'index' are valid except for %rsp (4). + * + * Documented in: + * Table 2-3: 32-bit Addressing Forms with the SIB Byte + * Table 2-5: Special Cases of REX Encodings + */ + if (vie->index != 4U) { + vie->index_register = (enum cpu_reg_name)vie->index; + } + + /* 'scale' makes sense only in the context of an index register */ + if (vie->index_register < CPU_REG_LAST) { + vie->scale = 1U << vie->ss; + } + + vie_advance(vie); + + ret = 0; + } + + return ret; +} + +static int32_t decode_displacement(struct instr_emul_vie *vie) +{ + uint8_t n, i, x; + int32_t ret = 0; + + union { + uint8_t buf[4]; + int8_t signed8; + int32_t signed32; + } u; + + n = vie->disp_bytes; + if (n != 0U) { + if ((n != 1U) && (n != 4U)) { + printc("%s: decode_displacement: invalid disp_bytes %d", __func__, n); + ret = -EINVAL; + } else { + + for (i = 0U; i < n; i++) { + if (vie_peek(vie, &x) != 0) { + ret = -1; + break; + } + + u.buf[i] = x; + vie_advance(vie); + } + + if (ret == 0) { + if (n == 1U) { + vie->displacement = u.signed8; /* sign-extended */ + } else { + vie->displacement = u.signed32; /* sign-extended */ + } + } + } + } + + return ret; +} + +static int32_t decode_immediate(struct instr_emul_vie *vie) +{ + uint8_t i, n, x; + int32_t ret = 0; + union { + uint8_t buf[4]; + int8_t signed8; + int16_t signed16; + int32_t signed32; + } u; + + /* Figure out immediate operand size (if any) */ + if ((vie->op.op_flags & VIE_OP_F_IMM) != 0U) { + /* + * Section 2.2.1.5 "Immediates", Intel SDM: + * In 64-bit mode the typical size of immediate operands + * remains 32-bits. When the operand size if 64-bits, the + * processor sign-extends all immediates to 64-bits prior + * to their use. + */ + if ((vie->opsize == 4U) || (vie->opsize == 8U)) { + vie->imm_bytes = 4U; + } + else { + vie->imm_bytes = 2U; + } + } else if ((vie->op.op_flags & VIE_OP_F_IMM8) != 0U) { + vie->imm_bytes = 1U; + } else { + /* No op_flag on immediate operand size */ + } + + n = vie->imm_bytes; + if (n != 0U) { + if ((n != 1U) && (n != 2U) && (n != 4U)) { + printc("%s: invalid number of immediate bytes: %d", __func__, n); + ret = -EINVAL; + } else { + for (i = 0U; i < n; i++) { + if (vie_peek(vie, &x) != 0) { + ret = -1; + break; + } + + u.buf[i] = x; + vie_advance(vie); + } + + if (ret == 0) { + /* sign-extend the immediate value before use */ + if (n == 1U) { + vie->immediate = u.signed8; + } else if (n == 2U) { + vie->immediate = u.signed16; + } else { + vie->immediate = u.signed32; + } + } + } + } + + return ret; +} + +static int32_t decode_moffset(struct instr_emul_vie *vie) +{ + uint8_t i, n, x; + int32_t ret = 0; + union { + uint8_t buf[8]; + uint64_t u64; + } u; + + if ((vie->op.op_flags & VIE_OP_F_MOFFSET) != 0U) { + /* + * Section 2.2.1.4, "Direct Memory-Offset MOVs", Intel SDM: + * The memory offset size follows the address-size of the instruction. + */ + n = vie->addrsize; + if ((n != 2U) && (n != 4U) && (n != 8U)) { + printc("%s: invalid moffset bytes: %hhu", __func__, n); + ret = -EINVAL; + } else { + u.u64 = 0UL; + for (i = 0U; i < n; i++) { + if (vie_peek(vie, &x) != 0) { + ret = -1; + break; + } + + u.buf[i] = x; + vie_advance(vie); + } + if (ret == 0) { + vie->displacement = (int64_t)u.u64; + } + } + } + + return ret; +} + +static int32_t local_decode_instruction(struct instr_emul_vie *vie) +{ + int32_t ret; + + if (decode_prefixes(vie) != 0) { + ret = -1; + } else if (decode_opcode(vie) != 0) { + ret = -1; + } else if (decode_modrm(vie) != 0) { + ret = -1; + } else if (decode_sib(vie) != 0) { + ret = -1; + } else if (decode_displacement(vie) != 0) { + ret = -1; + } else if (decode_immediate(vie) != 0) { + ret = -1; + } else if (decode_moffset(vie) != 0) { + ret = -1; + } else { + vie->decoded = 1U; /* success */ + ret = 0; + } + + return ret; +} + +static int32_t instr_check_gva(struct vmrt_vm_vcpu *vcpu) +{ + int32_t ret = 0; + uint64_t base, segbase, idx, gva; + enum cpu_reg_name seg; + struct instr_emul_vie *vie = &((struct instr_emul_ctxt *)vcpu->inst_ctxt)->vie; + + base = 0UL; + if (vie->base_register != CPU_REG_LAST) { + base = vm_get_register(vcpu, vie->base_register); + + /* RIP relative addressing starts from the + * following instruction + */ + if (vie->base_register == CPU_REG_RIP) { + base += vie->num_processed; + } + + } + + idx = 0UL; + if (vie->index_register != CPU_REG_LAST) { + idx = vm_get_register(vcpu, vie->index_register); + } + + /* "Specifying a Segment Selector" of SDM Vol1 3.7.4 + * + * In legacy IA-32 mode, when ESP or EBP register is used as + * base, the SS segment is default segment. + * + * All data references, except when relative to stack or + * string destination, DS is default segment. + * + * segment override could overwrite the default segment + * + * 64bit mode, segmentation is generally disabled. The + * exception are FS and GS. + */ + if (vie->seg_override != 0U) { + seg = vie->segment_register; + } else if ((vie->base_register == CPU_REG_RSP) || + (vie->base_register == CPU_REG_RBP)) { + seg = CPU_REG_SS; + } else { + seg = CPU_REG_DS; + } + + if ((seg != CPU_REG_FS) && + (seg != CPU_REG_GS)) { + segbase = 0UL; + } else { + struct seg_desc desc; + + VM_PANIC(vcpu); + segbase = desc.base; + } + + gva = segbase + base + (uint64_t)vie->scale * idx + (uint64_t)vie->displacement; + + vie->gva = gva; + + if (vie_canonical_check(gva) != 0) { + VM_PANIC(vcpu); + } else { + #define PAGE_FAULT_WR_FLAG 0x00000002U + + vmrt_vm_gva2gpa(vcpu, gva); + ret = 0; + if (ret < 0) { + VM_PANIC(vcpu); + } else { + ret = 0; + } + } + + return ret; +} + +int32_t decode_instruction(struct vmrt_vm_vcpu *vcpu) +{ + struct instr_emul_ctxt *emul_ctxt; + uint32_t csar; + int32_t retval; + + emul_ctxt = vcpu->inst_ctxt; + retval = vie_init(&emul_ctxt->vie, vcpu); + + if (retval < 0) { + VM_PANIC(vcpu); + } else { + retval = local_decode_instruction(&emul_ctxt->vie); + + if (retval != 0) { + VM_PANIC(vcpu); + } else { + /* + * We do operand check in instruction decode phase and + * inject exception accordingly. In late instruction + * emulation, it will always success. + * + * We only need to do dst check for movs. For other instructions, + * they always has one register and one mmio which trigger EPT + * by access mmio. With VMX enabled, the related check is done + * by VMX itself before hit EPT violation. + * + */ + if ((emul_ctxt->vie.op.op_flags & VIE_OP_F_CHECK_GVA_DI) != 0U) { + VM_PANIC(vcpu); + } else { + retval = instr_check_gva(vcpu); + } + + if (retval >= 0) { + /* return the Memory Operand byte size */ + if ((emul_ctxt->vie.op.op_flags & VIE_OP_F_BYTE_OP) != 0U) { + retval = 1; + } else if ((emul_ctxt->vie.op.op_flags & VIE_OP_F_WORD_OP) != 0U) { + retval = 2; + } else { + retval = (int32_t)emul_ctxt->vie.opsize; + } + } + } + } + + return retval; +} + +int32_t emulate_instruction(struct vmrt_vm_vcpu *vcpu) +{ + struct instr_emul_vie *vie = &((struct instr_emul_ctxt *)vcpu->inst_ctxt)->vie; + int32_t error; + + if (vie->decoded != 0U) { + switch (vie->op.op_type) { + case VIE_OP_TYPE_MOV: + error = emulate_mov(vcpu, vie); + break; + default: + VM_PANIC(vcpu); + error = -EINVAL; + break; + } + } else { + VM_PANIC(vcpu); + error = -EINVAL; + } + + return error; +} diff --git a/src/components/implementation/simple_vmm/vmm/instr_emul.h b/src/components/implementation/simple_vmm/vmm/instr_emul.h new file mode 100644 index 0000000000..901428dcb4 --- /dev/null +++ b/src/components/implementation/simple_vmm/vmm/instr_emul.h @@ -0,0 +1,95 @@ +/*- + * Copyright (c) 2012 NetApp, Inc. + * Copyright (c) 2017-2022 Intel Corporation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef INSTR_EMUL_H +#define INSTR_EMUL_H + +#include +#include + +struct vmrt_vm_vcpu; +struct instr_emul_vie_op { + uint8_t op_type; /* type of operation (e.g. MOV) */ + uint16_t op_flags; +}; + +#define VIE_PREFIX_SIZE 4U +#define VIE_INST_SIZE 15U +struct instr_emul_vie { + uint8_t inst[VIE_INST_SIZE]; /* instruction bytes */ + uint8_t num_valid; /* size of the instruction */ + uint8_t num_processed; + + uint8_t addrsize:4, opsize:4; /* address and operand sizes */ + uint8_t rex_w:1, /* REX prefix */ + rex_r:1, + rex_x:1, + rex_b:1, + rex_present:1, + repz_present:1, /* REP/REPE/REPZ prefix */ + repnz_present:1, /* REPNE/REPNZ prefix */ + opsize_override:1, /* Operand size override */ + addrsize_override:1, /* Address size override */ + seg_override:1; /* Segment override */ + + uint8_t mod:2, /* ModRM byte */ + reg:4, + rm:4; + + uint8_t ss:2, /* SIB byte */ + index:4, + base:4; + + uint8_t disp_bytes; + uint8_t imm_bytes; + + uint8_t scale; + enum cpu_reg_name base_register; /* CPU_REG_xyz */ + enum cpu_reg_name index_register; /* CPU_REG_xyz */ + enum cpu_reg_name segment_register; /* CPU_REG_xyz */ + + int64_t displacement; /* optional addr displacement */ + int64_t immediate; /* optional immediate operand */ + + uint8_t decoded; /* set to 1 if successfully decoded */ + + uint8_t opcode; + struct instr_emul_vie_op op; /* opcode description */ + + uint64_t dst_gpa; /* saved dst operand gpa. Only for movs */ + uint64_t gva; /* saved gva for instruction emulation */ +}; + +struct instr_emul_ctxt { + struct instr_emul_vie vie; +}; + +int32_t emulate_instruction(struct vmrt_vm_vcpu *vcpu); +int32_t decode_instruction(struct vmrt_vm_vcpu *vcpu); + +#endif diff --git a/src/components/implementation/simple_vmm/vmm/ioapic.h b/src/components/implementation/simple_vmm/vmm/ioapic.h new file mode 100644 index 0000000000..55b214a1e4 --- /dev/null +++ b/src/components/implementation/simple_vmm/vmm/ioapic.h @@ -0,0 +1,99 @@ +/* + * Copyright (C) 2018-2022 Intel Corporation. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef ARCH_X86_IOAPIC_H +#define ARCH_X86_IOAPIC_H + +#include + +#define NR_LEGACY_IRQ 16U +#define NR_LEGACY_PIN NR_LEGACY_IRQ + +struct ioapic_info { + uint8_t id; /* IOAPIC ID as indicated in ACPI MADT */ + uint32_t addr; /* IOAPIC Register address */ + uint32_t gsi_base; /* Global System Interrupt where this IO-APIC's interrupt input start */ + uint32_t nr_pins; /* Number of Interrupt inputs as determined by Max. Redir Entry Register */ +}; + +void ioapic_setup_irqs(void); + +bool is_ioapic_irq(uint32_t irq); +uint32_t gsi_to_ioapic_pin(uint32_t gsi); +int32_t init_ioapic_id_info(void); +uint8_t ioapic_irq_to_ioapic_id(uint32_t irq); + +uint8_t get_platform_ioapic_info (struct ioapic_info **plat_ioapic_info); + +/** + * @defgroup ioapic_ext_apis IOAPIC External Interfaces + * + * This is a group that includes IOAPIC External Interfaces. + * + * @{ + */ + +/** + * @brief Get irq num from gsi num + * + * @param[in] gsi The gsi number + * + * @return irq number + */ +uint32_t ioapic_gsi_to_irq(uint32_t gsi); +/** + * @brief Set the redirection table entry + * + * Set the redirection table entry of an interrupt + * + * @param[in] irq The number of irq to set + * @param[in] rte Union of ioapic_rte to set + */ +void ioapic_set_rte(uint32_t irq, union ioapic_rte rte); + +/** + * @brief Get the redirection table entry + * + * Get the redirection table entry of an interrupt + * + * @param[in] irq The number of irq to fetch RTE + * @param[inout] rte Pointer to union ioapic_rte to return result RTE + * + * @pre rte != NULL + */ +void ioapic_get_rte(uint32_t irq, union ioapic_rte *rte); + +/** + * @brief Suspend ioapic + * + * Suspend ioapic, mainly save the RTEs. + */ +void suspend_ioapic(void); + +/** + * @brief Resume ioapic + * + * Resume ioapic, mainly restore the RTEs. + */ +void resume_ioapic(void); + +/** + * @} + */ +/* End of ioapic_ext_apis */ + +void ioapic_gsi_mask_irq(uint32_t irq); +void ioapic_gsi_unmask_irq(uint32_t irq); + +void ioapic_get_rte_entry(void *ioapic_base, uint32_t pin, union ioapic_rte *rte); + +void *gsi_to_ioapic_base(uint32_t gsi); +uint32_t get_max_nr_gsi(void); +uint8_t get_gsi_to_ioapic_index(uint32_t gsi); +uint32_t get_pic_pin_from_ioapic_pin(uint32_t pin_index); +bool is_gsi_valid(uint32_t gsi); + +#endif /* ARCH_X86_IOAPIC_H */ diff --git a/src/components/implementation/simple_vmm/vmm/irq.h b/src/components/implementation/simple_vmm/vmm/irq.h new file mode 100644 index 0000000000..06c21c902a --- /dev/null +++ b/src/components/implementation/simple_vmm/vmm/irq.h @@ -0,0 +1,136 @@ +/* + * Copyright (C) 2018-2022 Intel Corporation. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef ARCH_X86_IRQ_H +#define ARCH_X86_IRQ_H + +#include + +/** + * @file arch/x86/asm/irq.h + * + * @brief public APIs for x86 IRQ handling + */ + +#define DBG_LEVEL_PTIRQ 6U +#define DBG_LEVEL_IRQ 6U + +#define NR_MAX_VECTOR 0xFFU +#define VECTOR_INVALID (NR_MAX_VECTOR + 1U) + +/* # of NR_STATIC_MAPPINGS_1 entries for timer, vcpu notify, and PMI */ +#define NR_STATIC_MAPPINGS_1 3U + +/* + * The static IRQ/Vector mapping table in irq.c consists of the following entries: + * # of NR_STATIC_MAPPINGS_1 entries for timer, vcpu notify, and PMI + * + * # of CONFIG_MAX_VM_NUM entries for posted interrupt notification, platform + * specific but known at build time: + * Allocate unique Activation Notification Vectors (ANV) for each vCPU that belongs + * to the same pCPU, the ANVs need only be unique within each pCPU, not across all + * vCPUs. The max numbers of vCPUs may be running on top of a pCPU is CONFIG_MAX_VM_NUM, + * since ACRN does not support 2 vCPUs of same VM running on top of same pCPU. + * This reduces # of pre-allocated ANVs for posted interrupts to CONFIG_MAX_VM_NUM, + * and enables ACRN to avoid switching between active and wake-up vector values + * in the posted interrupt descriptor on vCPU scheduling state changes. + */ +#define NR_STATIC_MAPPINGS (NR_STATIC_MAPPINGS_1 + CONFIG_MAX_VM_NUM) + +#define HYPERVISOR_CALLBACK_HSM_VECTOR 0xF3U + +/* vectors range for dynamic allocation, usually for devices */ +#define VECTOR_DYNAMIC_START 0x20U +#define VECTOR_DYNAMIC_END 0xDFU + +/* vectors range for fixed vectors, usually for HV service */ +#define VECTOR_FIXED_START 0xE0U +#define VECTOR_FIXED_END 0xFFU + +#define TIMER_VECTOR (VECTOR_FIXED_START) +#define NOTIFY_VCPU_VECTOR (VECTOR_FIXED_START + 1U) +#define PMI_VECTOR (VECTOR_FIXED_START + 2U) +/* + * Starting vector for posted interrupts + * # of CONFIG_MAX_VM_NUM (POSTED_INTR_VECTOR ~ (POSTED_INTR_VECTOR + CONFIG_MAX_VM_NUM - 1U)) + * consecutive vectors reserved for posted interrupts + */ +#define POSTED_INTR_VECTOR (VECTOR_FIXED_START + NR_STATIC_MAPPINGS_1) + +#define TIMER_IRQ (NR_IRQS - 1U) +#define NOTIFY_VCPU_IRQ (NR_IRQS - 2U) +#define PMI_IRQ (NR_IRQS - 3U) +/* + * Starting IRQ for posted interrupts + * # of CONFIG_MAX_VM_NUM (POSTED_INTR_IRQ ~ (POSTED_INTR_IRQ + CONFIG_MAX_VM_NUM - 1U)) + * consecutive IRQs reserved for posted interrupts + */ +#define POSTED_INTR_IRQ (NR_IRQS - NR_STATIC_MAPPINGS_1 - CONFIG_MAX_VM_NUM) + +/* the maximum number of msi entry is 2048 according to PCI + * local bus specification + */ +#define MAX_MSI_ENTRY 0x800U + +#define INVALID_INTERRUPT_PIN 0xffffffffU + +/* + * x86 irq data + */ +struct x86_irq_data { + uint32_t vector; /**< assigned vector */ +#ifdef PROFILING_ON + uint64_t ctx_rip; + uint64_t ctx_rflags; + uint64_t ctx_cs; +#endif +}; + +struct intr_excp_ctx; + +/** + * @brief Allocate a vectror and bind it to irq + * + * For legacy irq (num < 16) and statically mapped ones, do nothing + * if mapping is correct. + * + * @param[in] irq The irq num to bind + * + * @return valid vector num on susccess, VECTOR_INVALID on failure + */ +uint32_t alloc_irq_vector(uint32_t irq); + +/** + * @brief Get vector number of an interrupt from irq number + * + * @param[in] irq The irq_num to convert + * + * @return vector number + */ +uint32_t irq_to_vector(uint32_t irq); + +/** + * @brief Dispatch interrupt + * + * To dispatch an interrupt, an action callback will be called if registered. + * + * @param ctx Pointer to interrupt exception context + */ +void dispatch_interrupt(const struct intr_excp_ctx *ctx); + +/* Arch specific routines called from generic IRQ handling */ + +struct irq_desc; + +void init_irq_descs_arch(struct irq_desc *descs); +void setup_irqs_arch(void); +void init_interrupt_arch(uint16_t pcpu_id); +void free_irq_arch(uint32_t irq); +bool request_irq_arch(uint32_t irq); +void pre_irq_arch(const struct irq_desc *desc); +void post_irq_arch(const struct irq_desc *desc); + +#endif /* ARCH_X86_IRQ_H */ diff --git a/src/components/implementation/simple_vmm/vmm/netio.c b/src/components/implementation/simple_vmm/vmm/netio.c new file mode 100644 index 0000000000..89a274cf1e --- /dev/null +++ b/src/components/implementation/simple_vmm/vmm/netio.c @@ -0,0 +1,42 @@ +#include +#include +#include +#include + + +shm_bm_objid_t +netio_get_a_packet(u16_t *pkt_len) +{ + struct netshmem_pkt_buf *tx_obj; + shm_bm_t tx_shmemd = 0; + shm_bm_objid_t tx_pktid; + + tx_shmemd = netshmem_get_shm(); + tx_obj = shm_bm_alloc_net_pkt_buf(tx_shmemd, &tx_pktid); + assert(tx_obj); + + virtio_net_send_one_pkt(tx_obj->data, pkt_len); + + return tx_pktid; +} + +int +netio_send_packet(shm_bm_objid_t pktid, u16_t pkt_len) +{ + struct netshmem_pkt_buf *rx_obj; + shm_bm_t rx_shmemd = 0; + + rx_shmemd = netshmem_get_shm(); + + rx_obj = shm_bm_transfer_net_pkt_buf(rx_shmemd, pktid); + virtio_net_rcv_one_pkt(rx_obj->data, pkt_len); + shm_bm_free_net_pkt_buf(rx_obj); + + return 0; +} + +void +netio_shmem_map(cbuf_t shm_id) +{ + netshmem_map_shmem(shm_id); +} diff --git a/src/components/implementation/simple_vmm/vmm/simple_vmm.c b/src/components/implementation/simple_vmm/vmm/simple_vmm.c index cd39905b4f..716d7a0c80 100644 --- a/src/components/implementation/simple_vmm/vmm/simple_vmm.c +++ b/src/components/implementation/simple_vmm/vmm/simple_vmm.c @@ -7,31 +7,62 @@ #include #include #include -// #include -// #include #include #include #include #include +#include +#include #include +#include INCBIN(vmlinux, "guest/vmlinux.img") INCBIN(bios, "guest/guest.img") - /* Currently only have one VM component globally managed by this VMM */ static struct vmrt_vm_comp *g_vm; #define VM_MAX_COMPS (2) +#define GUEST_MEM_SZ (64*1024*1024) SS_STATIC_SLAB(vm_comp, struct vmrt_vm_comp, VM_MAX_COMPS); SS_STATIC_SLAB(vm_lapic, struct acrn_vlapic, VM_MAX_COMPS * VMRT_VM_MAX_VCPU); +SS_STATIC_SLAB(vcpu_inst_ctxt, struct instr_emul_ctxt, VM_MAX_COMPS * VMRT_VM_MAX_VCPU); +SS_STATIC_SLAB(vm_io_apic, struct acrn_vioapics, VM_MAX_COMPS); +SS_STATIC_SLAB(vcpu_mmio_req, struct acrn_mmio_request, VM_MAX_COMPS * VMRT_VM_MAX_VCPU); + +void +mmio_init(struct vmrt_vm_vcpu *vcpu) +{ + vcpu->mmio_request = ss_vcpu_mmio_req_alloc(); + assert(vcpu->mmio_request); + + ss_vcpu_mmio_req_activate(vcpu->mmio_request); +} + +void +ioapic_init(struct vmrt_vm_comp *vm) +{ + vm->ioapic = ss_vm_io_apic_alloc(); + assert(vm->ioapic); + + vioapic_init(vm); + ss_vm_io_apic_activate(vm->ioapic); +} void -init_lapic(struct vmrt_vm_vcpu *vcpu) +iinst_ctxt_init(struct vmrt_vm_vcpu *vcpu) +{ + vcpu->inst_ctxt = ss_vcpu_inst_ctxt_alloc(); + assert(vcpu->inst_ctxt); + + ss_vcpu_inst_ctxt_activate(vcpu->inst_ctxt); +} + +void +lapic_init(struct vmrt_vm_vcpu *vcpu) { - struct lapic_regs *lapic; struct acrn_vlapic *vlapic = ss_vm_lapic_alloc(); assert(vlapic); @@ -42,19 +73,8 @@ init_lapic(struct vmrt_vm_vcpu *vcpu) vlapic->apic_page = vcpu->lapic_page; vlapic->vcpu = vcpu; - lapic = vlapic->apic_page; - /* Status: enable APIC and vector be 0xFF */ - lapic->svr.v = 0x1FF; - lapic->version.v = 0x50015; - lapic->id.v = 0x3000000; - - lapic->dfr.v = 0xFFFFFFFFU; - lapic->icr_timer.v = 0U; - lapic->dcr_timer.v = 0U; - - vlapic->svr_last = lapic->svr.v; - vlapic->isrv = 0U; + vlapic_reset(vlapic); ss_vm_lapic_activate(vlapic); return; @@ -63,8 +83,8 @@ init_lapic(struct vmrt_vm_vcpu *vcpu) struct vmrt_vm_comp * vm_comp_create(void) { - u64_t guest_mem_sz = 64*1024*1024; - u64_t num_vpu = 1; + u64_t guest_mem_sz = GUEST_MEM_SZ; + u64_t num_vcpu = NUM_CPU; void *start; void *end; cbuf_t shm_id; @@ -74,14 +94,14 @@ vm_comp_create(void) struct vmrt_vm_comp *vm = ss_vm_comp_alloc(); assert(vm); - vmrt_vm_create(vm, "vmlinux-5.15", num_vpu, guest_mem_sz); + vmrt_vm_create(vm, "vmlinux-5.15", num_vcpu, guest_mem_sz); /* Allocate memory for the VM */ shm_id = contigmem_shared_alloc_aligned(guest_mem_sz / PAGE_SIZE_4K, PAGE_SIZE_4K, (vaddr_t *)&mem); /* Make the memory accessible to VM */ memmgr_shared_page_map_aligned_in_vm(shm_id, PAGE_SIZE_4K, (vaddr_t *)&vm_mem, vm->comp_id); vmrt_vm_mem_init(vm, mem); - printc("created VM with %u cpus, memory size: %luMB, at host vaddr: %p\n", vm->num_vpu, vm->guest_mem_sz/1024/1024, vm->guest_addr); + printc("created VM with %u cpus, memory size: %luMB, at host vaddr: %p\n", vm->num_vcpu, vm->guest_mem_sz/1024/1024, vm->guest_addr); ss_vm_comp_activate(vm); @@ -100,6 +120,8 @@ vm_comp_create(void) #define GUEST_IMAGE_ADDR 0x100000 vmrt_vm_data_copy_to(vm, start, sz, GUEST_IMAGE_ADDR); + ioapic_init(vm); + printc("Guest(%s) image has been loaded into the VM component\n", vm->name); return vm; @@ -115,11 +137,12 @@ void cos_parallel_init(coreid_t cid, int init_core, int ncores) { struct vmrt_vm_vcpu *vcpu; - vmrt_vm_vcpu_init(g_vm, cid); vcpu = vmrt_get_vcpu(g_vm, cid); - init_lapic(vcpu); + lapic_init(vcpu); + iinst_ctxt_init(vcpu); + mmio_init(vcpu); return; } diff --git a/src/components/implementation/simple_vmm/vmm/vio.c b/src/components/implementation/simple_vmm/vmm/vio.c index 4982a00fa4..b63253b7b1 100644 --- a/src/components/implementation/simple_vmm/vmm/vio.c +++ b/src/components/implementation/simple_vmm/vmm/vio.c @@ -79,6 +79,8 @@ io_handler(struct vmrt_vm_vcpu *vcpu) case PIC_MASTER_DATA_PORT: case PIC_SLAVE_CMD_PORT: case PIC_SLAVE_DATA_PORT: + case PIC_ELCR1: + case PIC_ELCR2: vpic_handler(port_id, access_dir, access_sz, vcpu); goto done; case PS2_CONTROL_PORT_A: diff --git a/src/components/implementation/simple_vmm/vmm/vioapic.c b/src/components/implementation/simple_vmm/vmm/vioapic.c new file mode 100644 index 0000000000..1dfcdbdc43 --- /dev/null +++ b/src/components/implementation/simple_vmm/vmm/vioapic.c @@ -0,0 +1,564 @@ +/*- + * Copyright (c) 2013 Tycho Nightingale + * Copyright (c) 2013 Neel Natu + * Copyright (c) 2017-2022 Intel Corporation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#define pr_prefix "vioapic: " + +#include +#include +#include +#include +#include +#include +#include +#include + + +#define RTBL_RO_BITS ((uint32_t)0x00004000U | (uint32_t)0x00001000U) /*Remote IRR and Delivery Status bits*/ + +#define DBG_LEVEL_VIOAPIC 6U +#define ACRN_IOAPIC_VERSION 0x11U + +#define MASK_ALL_INTERRUPTS 0x0001000000010000UL + +static inline struct acrn_vioapics *vm_ioapics(const struct vmrt_vm_comp *vm) +{ + return (struct acrn_vioapics *)(vm->ioapic); +} + +/** + * @pre pin < vioapic->chipinfo.nr_pins + */ +static void +vioapic_generate_intr(struct acrn_single_vioapic *vioapic, uint32_t pin) +{ + uint32_t vector, dest, delmode; + union ioapic_rte rte; + bool level, phys; + + rte = vioapic->rtbl[pin]; + + if (rte.bits.intr_mask == IOAPIC_RTE_MASK_SET) { + printc("ioapic pin%hhu: masked\n", pin); + } else { + phys = (rte.bits.dest_mode == IOAPIC_RTE_DESTMODE_PHY); + delmode = rte.bits.delivery_mode; + level = (rte.bits.trigger_mode == IOAPIC_RTE_TRGRMODE_LEVEL); + + /* For level trigger irq, avoid send intr if + * previous one hasn't received EOI + */ + if (!level || (vioapic->rtbl[pin].bits.remote_irr == 0UL)) { + if (level) { + vioapic->rtbl[pin].bits.remote_irr = IOAPIC_RTE_REM_IRR; + } + vector = rte.bits.vector; + dest = rte.bits.dest_field; + vlapic_receive_intr(vioapic->vm, level, dest, phys, delmode, vector, false); + } + } +} + +/** + * @pre pin < vioapic->chipinfo.nr_pins + */ +static void +vioapic_set_pinstate(struct acrn_single_vioapic *vioapic, uint32_t pin, uint32_t level) +{ + uint32_t old_lvl; + union ioapic_rte rte; + + if (pin < vioapic->chipinfo.nr_pins) { + rte = vioapic->rtbl[pin]; + old_lvl = (uint32_t)bitmap_test((uint16_t)(pin & 0x3FU), &vioapic->pin_state[pin >> 6U]); + if (level == 0U) { + /* clear pin_state and deliver interrupt according to polarity */ + bitmap_clear_nolock((uint16_t)(pin & 0x3FU), &vioapic->pin_state[pin >> 6U]); + if ((rte.bits.intr_polarity == IOAPIC_RTE_INTPOL_ALO) + && (old_lvl != level)) { + vioapic_generate_intr(vioapic, pin); + } + } else { + /* set pin_state and deliver intrrupt according to polarity */ + bitmap_set_nolock((uint16_t)(pin & 0x3FU), &vioapic->pin_state[pin >> 6U]); + if ((rte.bits.intr_polarity == IOAPIC_RTE_INTPOL_AHI) + && (old_lvl != level)) { + vioapic_generate_intr(vioapic, pin); + } + } + } +} + + +struct acrn_single_vioapic * +vgsi_to_vioapic_and_vpin(const struct vmrt_vm_comp *vm, uint32_t vgsi, uint32_t *vpin) +{ + struct acrn_single_vioapic *vioapic; + uint8_t vioapic_index = 0U; + + if (vpin != NULL) { + *vpin = vgsi; + } + + vioapic = (struct acrn_single_vioapic *)&(vm_ioapics(vm)->vioapic_array[vioapic_index]); + + return vioapic; +} + +/** + * @brief Set vIOAPIC IRQ line status. + * + * Similar with vioapic_set_irqline_lock(),but would not make sure + * operation be done with ioapic lock. + * + * @param[in] vm Pointer to target VM + * @param[in] vgsi Target GSI number + * @param[in] operation Action options: GSI_SET_HIGH/GSI_SET_LOW/ + * GSI_RAISING_PULSE/GSI_FALLING_PULSE + * + * @pre vgsi < get_vm_gsicount(vm) + * @pre vm != NULL + * @return None + */ +void +vioapic_set_irqline_nolock(const struct vmrt_vm_comp *vm, uint32_t vgsi, uint32_t operation) +{ + struct acrn_single_vioapic *vioapic; + uint32_t pin; + + vioapic = vgsi_to_vioapic_and_vpin(vm, vgsi, &pin); + + switch (operation) { + case GSI_SET_HIGH: + vioapic_set_pinstate(vioapic, pin, 1U); + break; + case GSI_SET_LOW: + vioapic_set_pinstate(vioapic, pin, 0U); + break; + case GSI_RAISING_PULSE: + vioapic_set_pinstate(vioapic, pin, 1U); + vioapic_set_pinstate(vioapic, pin, 0U); + break; + case GSI_FALLING_PULSE: + vioapic_set_pinstate(vioapic, pin, 0U); + vioapic_set_pinstate(vioapic, pin, 1U); + break; + default: + /* + * The function caller could guarantee the pre condition. + */ + break; + } +} + +/** + * @brief Set vIOAPIC IRQ line status. + * + * @param[in] vm Pointer to target VM + * @param[in] vgsi Target GSI number + * @param[in] operation Action options: GSI_SET_HIGH/GSI_SET_LOW/ + * GSI_RAISING_PULSE/GSI_FALLING_PULSE + * + * @pre vgsi < get_vm_gsicount(vm) + * @pre vm != NULL + * + * @return None + */ +void +vioapic_set_irqline_lock(const struct vmrt_vm_comp *vm, uint32_t vgsi, uint32_t operation) +{ + uint64_t rflags; + + vioapic_set_irqline_nolock(vm, vgsi, operation); +} + +static uint32_t +vioapic_indirect_read(struct acrn_single_vioapic *vioapic, uint32_t addr) +{ + uint32_t regnum, ret = 0U; + uint32_t pin, pincount = vioapic->chipinfo.nr_pins; + + regnum = addr & 0xffU; + switch (regnum) { + case IOAPIC_ID: + ret = (uint32_t)vioapic->chipinfo.id << IOAPIC_ID_SHIFT; + break; + case IOAPIC_VER: + ret = ((pincount - 1U) << MAX_RTE_SHIFT) | ACRN_IOAPIC_VERSION; + break; + case IOAPIC_ARB: + ret = (uint32_t)vioapic->chipinfo.id << IOAPIC_ID_SHIFT; + break; + default: + /* + * In this switch statement, regnum shall either be IOAPIC_ID or + * IOAPIC_VER or IOAPIC_ARB. + * All the other cases will be handled properly later after this + * switch statement. + */ + break; + } + + /* redirection table entries */ + if ((regnum >= IOAPIC_REDTBL) && + (regnum < (IOAPIC_REDTBL + (pincount * 2U)))) { + uint32_t addr_offset = regnum - IOAPIC_REDTBL; + uint32_t rte_offset = addr_offset >> 1U; + pin = rte_offset; + if ((addr_offset & 0x1U) != 0U) { + ret = vioapic->rtbl[pin].u.hi_32; + } else { + ret = vioapic->rtbl[pin].u.lo_32; + } + } + + return ret; +} + +static inline bool vioapic_need_intr(const struct acrn_single_vioapic *vioapic, uint16_t pin) +{ + uint32_t lvl; + union ioapic_rte rte; + bool ret = false; + + if ((uint32_t)pin < vioapic->chipinfo.nr_pins) { + rte = vioapic->rtbl[pin]; + lvl = (uint32_t)bitmap_test(pin & 0x3FU, &vioapic->pin_state[pin >> 6U]); + ret = !!(((rte.bits.intr_polarity == IOAPIC_RTE_INTPOL_ALO) && (lvl == 0U)) || + ((rte.bits.intr_polarity == IOAPIC_RTE_INTPOL_AHI) && (lvl != 0U))); + } + + return ret; +} + +/* + * Due to the race between vcpus and vioapic->lock could be accessed from softirq, ensure to do + * spinlock_irqsave_obtain(&(vioapic->lock), &rflags) & spinlock_irqrestore_release(&(vioapic->lock), rflags) + * by caller. + */ +static void vioapic_indirect_write(struct acrn_single_vioapic *vioapic, uint32_t addr, uint32_t data) +{ + union ioapic_rte last, new, changed; + uint32_t regnum; + uint32_t pin, pincount = vioapic->chipinfo.nr_pins; + + regnum = addr & 0xffUL; + switch (regnum) { + case IOAPIC_ID: + vioapic->chipinfo.id = (uint8_t)((data & IOAPIC_ID_MASK) >> IOAPIC_ID_SHIFT); + break; + case IOAPIC_VER: + case IOAPIC_ARB: + /* readonly */ + break; + default: + /* + * In this switch statement, regnum shall either be IOAPIC_ID or + * IOAPIC_VER or IOAPIC_ARB. + * All the other cases will be handled properly later after this + * switch statement. + */ + break; + } + + /* redirection table entries */ + if ((regnum >= IOAPIC_REDTBL) && (regnum < (IOAPIC_REDTBL + (pincount * 2U)))) { + bool wire_mode_valid = true; + uint32_t addr_offset = regnum - IOAPIC_REDTBL; + uint32_t rte_offset = addr_offset >> 1U; + pin = rte_offset; + + last = vioapic->rtbl[pin]; + new = last; + if ((addr_offset & 1U) != 0U) { + new.u.hi_32 = data; + } else { + new.u.lo_32 &= RTBL_RO_BITS; + new.u.lo_32 |= (data & ~RTBL_RO_BITS); + } + + /* In some special scenarios, the LAPIC somehow hasn't send + * EOI to IOAPIC which cause the Remote IRR bit can't be clear. + * To clear it, some OSes will use EOI Register to clear it for + * 0x20 version IOAPIC, otherwise use switch Trigger Mode to + * Edge Sensitive to clear it. + */ + if (new.bits.trigger_mode == IOAPIC_RTE_TRGRMODE_EDGE) { + new.bits.remote_irr = 0U; + } + + changed.full = last.full ^ new.full; + /* pin0 from vpic mask/unmask */ + if ((pin == 0U) && (changed.bits.intr_mask != 0UL)) { + /* mask -> umask */ + if (last.bits.intr_mask == IOAPIC_RTE_MASK_SET) { + if ((vioapic->vm->wire_mode == VPIC_WIRE_NULL) || + (vioapic->vm->wire_mode == VPIC_WIRE_INTR)) { + vioapic->vm->wire_mode = VPIC_WIRE_IOAPIC; + printc("vpic wire mode -> IOAPIC\n"); + } else { + printc("WARNING: invalid vpic wire mode change\n"); + wire_mode_valid = false; + } + /* unmask -> mask */ + } else { + if (vioapic->vm->wire_mode == VPIC_WIRE_IOAPIC) { + vioapic->vm->wire_mode = VPIC_WIRE_INTR; + printc("vpic wire mode -> INTR\n"); + } + } + } + + if (wire_mode_valid) { + vioapic->rtbl[pin] = new; + + /* remap for ptdev */ + if ((new.bits.intr_mask == IOAPIC_RTE_MASK_CLR) || (last.bits.intr_mask == IOAPIC_RTE_MASK_CLR)) { + /* TODO: set pin remap*/ + } + + /* + * Generate an interrupt if the following conditions are met: + * - pin is not masked + * - previous interrupt has been EOIed + * - pin level is asserted + */ + if ((vioapic->rtbl[pin].bits.intr_mask == IOAPIC_RTE_MASK_CLR) && + (vioapic->rtbl[pin].bits.remote_irr == 0UL) && + vioapic_need_intr(vioapic, (uint16_t)pin)) { + vioapic_generate_intr(vioapic, pin); + } + } + } +} + +static void +vioapic_mmio_rw(struct acrn_single_vioapic *vioapic, uint64_t gpa, + uint32_t *data, bool do_read) +{ + uint32_t offset; + uint64_t rflags; + + offset = (uint32_t)(gpa - vioapic->chipinfo.addr); + + /* The IOAPIC specification allows 32-bit wide accesses to the + * IOAPIC_REGSEL (offset 0) and IOAPIC_WINDOW (offset 16) registers. + */ + switch (offset) { + case IOAPIC_REGSEL: + if (do_read) { + *data = vioapic->ioregsel; + } else { + vioapic->ioregsel = *data & 0xFFU; + } + break; + case IOAPIC_WINDOW: + if (do_read) { + *data = vioapic_indirect_read(vioapic, + vioapic->ioregsel); + } else { + vioapic_indirect_write(vioapic, + vioapic->ioregsel, *data); + } + break; + default: + assert(0); + if (do_read) { + *data = 0xFFFFFFFFU; + } + break; + } +} + +/* + * @pre vm != NULL + */ +static void +vioapic_process_eoi(struct acrn_single_vioapic *vioapic, uint32_t vector) +{ + uint32_t pin, pincount = vioapic->chipinfo.nr_pins; + union ioapic_rte rte; + uint64_t rflags; + + if ((vector < VECTOR_DYNAMIC_START) || (vector > NR_MAX_VECTOR)) { + printc("vioapic_process_eoi: invalid vector %u", vector); + } + + printc("ioapic processing eoi for vector %u\n", vector); + + /* notify device to ack if assigned pin */ + for (pin = 0U; pin < pincount; pin++) { + rte = vioapic->rtbl[pin]; + if ((rte.bits.vector != vector) || + (rte.bits.remote_irr == 0U)) { + continue; + } + } + + /* + * XXX keep track of the pins associated with this vector instead + * of iterating on every single pin each time. + */ + for (pin = 0U; pin < pincount; pin++) { + rte = vioapic->rtbl[pin]; + if ((rte.bits.vector != vector) || + (rte.bits.remote_irr == 0U)) { + continue; + } + + vioapic->rtbl[pin].bits.remote_irr = 0U; + if (vioapic_need_intr(vioapic, (uint16_t)pin)) { + printc("ioapic pin%hhu: asserted at eoi\n", pin); + vioapic_generate_intr(vioapic, pin); + } + } +} + +void vioapic_broadcast_eoi(const struct vmrt_vm_comp *vm, uint32_t vector) +{ + struct acrn_single_vioapic *vioapic; + uint8_t vioapic_index; + + /* + * For platforms with multiple IO-APICs, EOI message from LAPIC is + * broadcast to all IO-APICs. Emulating the same behavior here. + */ + + for (vioapic_index = 0U; vioapic_index < vm_ioapics(vm)->ioapic_num; vioapic_index++) { + vioapic = &(vm_ioapics(vm)->vioapic_array[vioapic_index]); + vioapic_process_eoi(vioapic, vector); + } +} + +static void reset_one_vioapic(struct acrn_single_vioapic *vioapic) +{ + uint32_t pin, pincount; + + /* Initialize all redirection entries to mask all interrupts */ + pincount = vioapic->chipinfo.nr_pins; + for (pin = 0U; pin < pincount; pin++) { + vioapic->rtbl[pin].full = MASK_ALL_INTERRUPTS; + } + vioapic->chipinfo.id = 0U; + vioapic->ioregsel = 0U; +} + +void reset_vioapics(const struct vmrt_vm_comp *vm) +{ + struct acrn_vioapics *vioapics = vm_ioapics(vm); + uint8_t vioapic_index; + + for (vioapic_index = 0U; vioapic_index < vioapics->ioapic_num; vioapic_index++) { + reset_one_vioapic(&vioapics->vioapic_array[vioapic_index]); + } +} + +void +vioapic_init(struct vmrt_vm_comp *vm) +{ + static struct ioapic_info virt_ioapic_info = { + .nr_pins = VIOAPIC_RTE_NUM, + .addr = VIOAPIC_BASE + }; + + struct ioapic_info *vioapic_info; + uint8_t vioapic_index; + struct acrn_single_vioapic *vioapic = NULL; + struct acrn_vioapics *vioapics = vm_ioapics(vm); + + /* only set one io apic */ + vioapics->ioapic_num = 1U; + vioapic_info = &virt_ioapic_info; + + for (vioapic_index = 0U; vioapic_index < vioapics->ioapic_num; vioapic_index++) { + vioapic = &vioapics->vioapic_array[vioapic_index]; + vioapic->chipinfo = vioapic_info[vioapic_index]; + + vioapic->vm = vm; + reset_one_vioapic(vioapic); + } + + /* + * Maximum number of GSI is computed as GSI base of the IOAPIC i.e. enumerated last in ACPI MADT + * plus the number of interrupt pins of that IOAPIC. + */ + if (vioapic != NULL) { + vioapics->nr_gsi = vioapic->chipinfo.gsi_base + vioapic->chipinfo.nr_pins; + } +} + +uint32_t +get_vm_gsicount(const struct vmrt_vm_comp *vm) +{ + struct acrn_vioapics *vioapics = vm_ioapics(vm); + return vioapics->nr_gsi; +} + +/* + * @pre handler_private_data != NULL + */ +int32_t vioapic_mmio_access_handler(struct vmrt_vm_vcpu *vcpu) +{ + struct acrn_mmio_request *mmio = vcpu->mmio_request; + struct acrn_single_vioapic *vioapic = &vm_ioapics(vcpu->vm)->vioapic_array[0]; + uint64_t gpa = mmio->address; + int32_t ret = 0; + + /* Note all RW to IOAPIC are 32-Bit in size */ + if (mmio->size == 4UL) { + uint32_t data = (uint32_t)mmio->value; + + if (mmio->direction == ACRN_IOREQ_DIR_READ) { + vioapic_mmio_rw(vioapic, gpa, &data, true); + mmio->value = (uint64_t)data; + } else if (mmio->direction == ACRN_IOREQ_DIR_WRITE) { + vioapic_mmio_rw(vioapic, gpa, &data, false); + } else { + ret = -EINVAL; + } + } else { + printc("All RW to IOAPIC must be 32-bits in size\n"); + assert(0); + } + + return ret; +} + +/** + * @pre vm->arch_vm.vioapics != NULL + * @pre vgsi < get_vm_gsicount(vm) + * @pre rte != NULL + */ +void vioapic_get_rte(const struct vmrt_vm_comp *vm, uint32_t vgsi, union ioapic_rte *rte) +{ + struct acrn_single_vioapic *vioapic; + uint32_t pin; + vioapic = vgsi_to_vioapic_and_vpin(vm, vgsi, &pin); + + *rte = vioapic->rtbl[pin]; +} diff --git a/src/components/implementation/simple_vmm/vmm/vioapic.h b/src/components/implementation/simple_vmm/vmm/vioapic.h new file mode 100644 index 0000000000..73794a091e --- /dev/null +++ b/src/components/implementation/simple_vmm/vmm/vioapic.h @@ -0,0 +1,128 @@ +/*- + * Copyright (c) 2013 Tycho Nightingale + * Copyright (c) 2013 Neel Natu + * Copyright (c) 2017-2022 Intel Corporation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef VIOAPIC_H +#define VIOAPIC_H + +/** + * @file vioapic.h + * + * @brief public APIs for virtual I/O APIC + */ + +#include +#include +#include + +#define VIOAPIC_BASE 0xFEC00000UL +#define VIOAPIC_SIZE 4096UL +#define MAX_IOAPIC_NUM 1 + +#define REDIR_ENTRIES_HW 120U /* Service VM align with native ioapic */ +#define STATE_BITMAP_SIZE INT_DIV_ROUNDUP(REDIR_ENTRIES_HW, 64U) + +#define IOAPIC_RTE_LOW_INTVEC ((uint32_t)IOAPIC_RTE_INTVEC) + +/* + * id field is used to emulate the IOAPIC_ID register of vIOAPIC + */ + +struct acrn_single_vioapic { + // spinlock_t lock; + struct vmrt_vm_comp *vm; + struct ioapic_info chipinfo; + uint32_t ioregsel; + union ioapic_rte rtbl[REDIR_ENTRIES_HW]; + /* pin_state status bitmap: 1 - high, 0 - low */ + uint64_t pin_state[STATE_BITMAP_SIZE]; +}; + +/* + * ioapic_num represents the number of IO-APICs emulated for the VM. + * nr_gsi represents the maximum number of GSI emulated for the VM. + */ +struct acrn_vioapics { + uint8_t ioapic_num; + uint32_t nr_gsi; + struct acrn_single_vioapic vioapic_array[MAX_IOAPIC_NUM]; +}; + +void dump_vioapic(struct vmrt_vm_comp *vm); +void vioapic_init(struct vmrt_vm_comp *vm); +void reset_vioapics(const struct vmrt_vm_comp *vm); + + +/** + * @brief virtual I/O APIC + * + * @addtogroup acrn_vioapic ACRN vIOAPIC + * @{ + */ + +/** + * @brief Set vIOAPIC IRQ line status. + * + * @param[in] vm Pointer to target VM + * @param[in] vgsi GSI for the virtual interrupt + * @param[in] operation Action options: GSI_SET_HIGH/GSI_SET_LOW/ + * GSI_RAISING_PULSE/GSI_FALLING_PULSE + * + * @pre irqline < vioapic_pincount(vm) + * + * @return None + */ +void vioapic_set_irqline_lock(const struct vmrt_vm_comp *vm, uint32_t vgsi, uint32_t operation); + +/** + * @brief Set vIOAPIC IRQ line status. + * + * Similar with vioapic_set_irqline_lock(),but would not make sure + * operation be done with ioapic lock. + * + * @param[in] vm Pointer to target VM + * @param[in] vgsi GSI for the virtual interrupt + * @param[in] operation Action options: GSI_SET_HIGH/GSI_SET_LOW/ + * GSI_RAISING_PULSE/GSI_FALLING_PULSE + * + * @pre irqline < vioapic_pincount(vm) + * @return None + */ +void vioapic_set_irqline_nolock(const struct vmrt_vm_comp *vm, uint32_t vgsi, uint32_t operation); + +uint32_t get_vm_gsicount(const struct vmrt_vm_comp *vm); +void vioapic_broadcast_eoi(const struct vmrt_vm_comp *vm, uint32_t vector); +void vioapic_get_rte(const struct vmrt_vm_comp *vm, uint32_t vgsi, union ioapic_rte *rte); +int32_t vioapic_mmio_access_handler(struct vmrt_vm_vcpu *vcpu); +struct acrn_single_vioapic *vgsi_to_vioapic_and_vpin(const struct vmrt_vm_comp *vm, uint32_t vgsi, uint32_t *vpin); + +/** + * @} + */ +/* End of acrn_vioapic */ +#endif /* VIOAPIC_H */ diff --git a/src/components/implementation/simple_vmm/vmm/vlapic.c b/src/components/implementation/simple_vmm/vmm/vlapic.c index 0d6bfe54ed..155eed10e3 100644 --- a/src/components/implementation/simple_vmm/vmm/vlapic.c +++ b/src/components/implementation/simple_vmm/vmm/vlapic.c @@ -31,6 +31,7 @@ #include #include #include +#include #include #include #include "vpic.h" @@ -86,13 +87,13 @@ static void vlapic_x2apic_self_ipi_handler(struct acrn_vlapic *vlapic); */ static void vlapic_set_error(struct acrn_vlapic *vlapic, uint32_t mask); -static void vlapic_timer_expired(void *data); +void vlapic_timer_expired(struct vmrt_vm_vcpu *vcpu); +static struct pi_desc *get_pi_desc(struct vmrt_vm_vcpu *vcpu); static inline bool vlapic_enabled(const struct acrn_vlapic *vlapic) { const struct lapic_regs *lapic = vlapic->apic_page; - assert(0); return (((vlapic->msr_apicbase & APICBASE_ENABLED) != 0UL) && ((lapic->svr.v & APIC_SVR_ENABLE) != 0U)); } @@ -155,9 +156,7 @@ vlapic_write_ldr(struct acrn_vlapic *vlapic) struct lapic_regs *lapic; lapic = vlapic->apic_page; - printc("ori vlapic LDR set to %x\n", lapic->ldr.v); lapic->ldr.v &= ~APIC_LDR_RESERVED; - printc("vlapic LDR set to(masked) %x\n", lapic->ldr.v); } static inline uint32_t @@ -200,7 +199,6 @@ static bool set_expiration(struct acrn_vlapic *vlapic) { struct vlapic_timer *vtimer; - // struct hv_timer *timer; uint32_t tmicr, divisor_shift; bool ret; @@ -235,7 +233,6 @@ static void vlapic_update_lvtt(struct acrn_vlapic *vlapic, /* TODO: reset timer */ vtimer->mode = timer_mode; } - printc("Guest updated lvt timer, val:%x, mode:%x\n", val, timer_mode); } static uint32_t vlapic_get_ccr(const struct acrn_vlapic *vlapic) @@ -269,7 +266,6 @@ static void vlapic_write_icrtmr(struct acrn_vlapic *vlapic) struct vlapic_timer *vtimer; if (!vlapic_lvtt_tsc_deadline(vlapic)) { - printc("vlapic is not tsc deadline, and setting a timer in ICR\n"); lapic = vlapic->apic_page; vtimer = &vlapic->vtimer; vtimer->tmicr = lapic->icr_timer.v; @@ -325,7 +321,6 @@ static void apicv_advanced_accept_intr(struct acrn_vlapic *vlapic, uint32_t vect vlapic_set_tmr(vlapic, vector, level); if (apicv_set_intr_ready(vlapic, vector)) { - struct vmrt_vm_vcpu *vcpu = vlapic2vcpu(vlapic); /* * Send interrupt to vCPU via posted interrupt way: * 1. If target vCPU is in root mode(isn't running), @@ -336,7 +331,8 @@ static void apicv_advanced_accept_intr(struct acrn_vlapic *vlapic, uint32_t vect * send PI notification to vCPU and hardware will * sync PIR to vIRR automatically. */ - assert(0); + + /* TODO: handle cross-core virtual interrupt notification */ } } @@ -353,8 +349,7 @@ static void vlapic_accept_intr(struct acrn_vlapic *vlapic, uint32_t vector, bool printc("vlapic is software disabled, ignoring interrupt %u", vector); assert(0); } else { - assert(0); - vlapic->ops->accept_intr(vlapic, vector, level); + apicv_advanced_accept_intr(vlapic, vector, level); } } @@ -514,7 +509,6 @@ vlapic_write_lvt(struct acrn_vlapic *vlapic, uint32_t offset) } else { printc("WARNING:invalid vpic wire mode change\n"); assert(0); - error = true; } /* unmask -> mask: only from the vlapic LINT0-ExtINT enabled */ } else if (((last & APIC_LVT_M) == 0U) && ((val & APIC_LVT_M) != 0U)) { @@ -602,14 +596,11 @@ vlapic_process_eoi(struct acrn_vlapic *vlapic) bitpos = (vector & 0x1fU); bitmap32_clear_nolock((uint16_t)bitpos, &isrptr[i].v); - printc("EOI vector %u", vector); vlapic_dump_isr(vlapic, "vlapic_process_eoi"); vlapic->isrv = vlapic_find_isrv(vlapic); vlapic_update_ppr(vlapic); } - - printc("Gratuitous EOI"); } static void @@ -663,11 +654,11 @@ static void vlapic_write_icrlo(struct acrn_vlapic *vlapic) if ((mode == APIC_DELMODE_FIXED) && (vec < 16U)) { vlapic_set_error(vlapic, APIC_ESR_SEND_ILLEGAL_VECTOR); printc("Ignoring invalid IPI %u", vec); + assert(0); } else if (((shorthand == APIC_DEST_SELF) || (shorthand == APIC_DEST_ALLISELF)) && ((mode == APIC_DELMODE_NMI) || (mode == APIC_DELMODE_INIT) || (mode == APIC_DELMODE_STARTUP))) { - printc("Invalid ICR value"); - assert(0); + printc("unsupported ICR command, ignore it\n"); } else { struct vmrt_vm_vcpu *vcpu = vlapic2vcpu(vlapic); @@ -935,92 +926,7 @@ static int32_t vlapic_read(struct acrn_vlapic *vlapic, uint32_t offset_arg, uint return ret; } -static int32_t vlapic_write(struct acrn_vlapic *vlapic, uint32_t offset, uint64_t data) -{ - struct lapic_regs *lapic = vlapic->apic_page; - uint32_t *regptr; - uint32_t data32 = (uint32_t)data; - int32_t ret = 0; - - printc("vlapic write offset %#x, data %#lx", offset, data); - - if (offset <= sizeof(*lapic)) { - switch (offset) { - case APIC_OFFSET_ID: - /* Force APIC ID as read only */ - break; - case APIC_OFFSET_EOI: - vlapic_process_eoi(vlapic); - break; - case APIC_OFFSET_LDR: - lapic->ldr.v = data32; - vlapic_write_ldr(vlapic); - break; - case APIC_OFFSET_DFR: - lapic->dfr.v = data32; - vlapic_write_dfr(vlapic); - break; - case APIC_OFFSET_SVR: - lapic->svr.v = data32; - vlapic_write_svr(vlapic); - break; - case APIC_OFFSET_ICR_LOW: - if (is_x2apic_enabled(vlapic)) { - lapic->icr_hi.v = (uint32_t)(data >> 32U); - } - lapic->icr_lo.v = data32; - vlapic_write_icrlo(vlapic); - break; - case APIC_OFFSET_ICR_HI: - lapic->icr_hi.v = data32; - break; - case APIC_OFFSET_CMCI_LVT: - case APIC_OFFSET_TIMER_LVT: - case APIC_OFFSET_THERM_LVT: - case APIC_OFFSET_PERF_LVT: - case APIC_OFFSET_LINT0_LVT: - case APIC_OFFSET_LINT1_LVT: - case APIC_OFFSET_ERROR_LVT: - regptr = vlapic_get_lvtptr(vlapic, offset); - *regptr = data32; - vlapic_write_lvt(vlapic, offset); - break; - case APIC_OFFSET_TIMER_ICR: - /* if TSCDEADLINE mode ignore icr_timer */ - if (vlapic_lvtt_tsc_deadline(vlapic)) { - break; - } - lapic->icr_timer.v = data32; - vlapic_write_icrtmr(vlapic); - break; - - case APIC_OFFSET_TIMER_DCR: - lapic->dcr_timer.v = data32; - vlapic_write_dcr(vlapic); - break; - case APIC_OFFSET_ESR: - vlapic_write_esr(vlapic); - break; - case APIC_OFFSET_SELF_IPI: - if (is_x2apic_enabled(vlapic)) { - lapic->self_ipi.v = data32; - vlapic_x2apic_self_ipi_handler(vlapic); - break; - } - /* falls through */ - - default: - ret = -EACCES; - /* Read only */ - break; - } - } else { - ret = -EACCES; - } - - return ret; -} /* * @pre vcpu != NULL @@ -1034,17 +940,14 @@ vlapic_set_intr(struct vmrt_vm_vcpu *vcpu, uint32_t vector, bool level) vlapic = vcpu_vlapic(vcpu); if (vector < 16U) { vlapic_set_error(vlapic, APIC_ESR_RECEIVE_ILLEGAL_VECTOR); - printc( - "vlapic ignoring interrupt to vector %u", vector); + assert(0); } else { vlapic_accept_intr(vlapic, vector, level); } } -/* interrupt context */ -static void vlapic_timer_expired(void *data) +void vlapic_timer_expired(struct vmrt_vm_vcpu *vcpu) { - struct vmrt_vm_vcpu *vcpu = (struct vmrt_vm_vcpu *)data; struct acrn_vlapic *vlapic; struct lapic_regs *lapic; @@ -1107,8 +1010,12 @@ apicv_set_intr_ready(struct acrn_vlapic *vlapic, uint32_t vector) struct pi_desc *pid; uint32_t idx; bool notify = false; - assert(0); + pid = get_pi_desc(vlapic2vcpu(vlapic)); + idx = vector >> 6U; + if (!bitmap_test_and_set_lock((uint16_t)(vector & 0x3fU), &pid->pir[idx])) { + notify = !bitmap_test_and_set_lock(POSTED_INTR_ON, &pid->control.value); + } return notify; } @@ -1141,7 +1048,7 @@ static void apicv_basic_inject_intr(struct acrn_vlapic *vlapic, */ static inline struct pi_desc *get_pi_desc(struct vmrt_vm_vcpu *vcpu) { - return NULL; + return (struct pi_desc *)&(vcpu->shared_region->pi_desc); } static void apicv_advanced_inject_intr(struct acrn_vlapic *vlapic, @@ -1149,27 +1056,16 @@ static void apicv_advanced_inject_intr(struct acrn_vlapic *vlapic, { struct vmrt_vm_vcpu *vcpu = vlapic2vcpu(vlapic); struct pi_desc *pid = get_pi_desc(vcpu); - /* - * From SDM Vol3 26.3.2.5: - * Once the virtual interrupt is recognized, it will be delivered - * in VMX non-root operation immediately after VM entry(including - * any specified event injection) completes. - * - * So the hardware can handle vmcs event injection and - * evaluation/delivery of apicv virtual interrupts in one time - * vm-entry. - * - * Here to sync the pending interrupts to irr and update rvi - * self-IPI with Posted Interrupt Notification Vector is sent. - */ + if (bitmap_test(POSTED_INTR_ON, &(pid->control.value))) { - assert(0); + vcpu->shared_region->inject_evt = 1; } } -void vlapic_inject_intr(struct acrn_vlapic *vlapic, bool guest_irq_enabled, bool injected) +void vlapic_inject_intr(struct vmrt_vm_vcpu *vcpu) { - vlapic->ops->inject_intr(vlapic, guest_irq_enabled, injected); + struct acrn_vlapic *vlapic = vcpu_vlapic(vcpu); + apicv_advanced_inject_intr(vlapic, 0, 0); } static bool apicv_basic_has_pending_delivery_intr(struct vmrt_vm_vcpu *vcpu) @@ -1333,6 +1229,234 @@ void vlapic_set_apicv_ops(void) } } +static uint16_t vm_apicid2vcpu_id(struct vmrt_vm_comp *vm, uint32_t lapicid) +{ + uint16_t i; + struct vmrt_vm_vcpu *vcpu = NULL; + uint16_t cpu_id = INVALID_CPU_ID; + + for (int i = 0; i < vm->num_vcpu; i++) { + vcpu = &vm->vcpus[i]; + if (vcpu_vlapic(vcpu)->vapic_id == lapicid) { + cpu_id = vcpu->cpuid; + break; + } + } + + if (cpu_id == INVALID_CPU_ID) { + printc("%s: bad lapicid %u", __func__, lapicid); + assert(0); + } + + return cpu_id; + +} + +static inline void set_dest_mask_phys(struct vmrt_vm_comp *vm, uint64_t *dmask, uint32_t dest) +{ + uint16_t vcpu_id; + + vcpu_id = vm_apicid2vcpu_id(vm, dest); + if (vcpu_id < vm->num_vcpu) { + bitmap_set_nolock(vcpu_id, dmask); + } +} + +/* + * This function tells if a vlapic belongs to the destination. + * If yes, return true, else reture false. + * + * @pre vlapic != NULL + */ +static inline bool is_dest_field_matched(const struct acrn_vlapic *vlapic, uint32_t dest) +{ + uint32_t logical_id, cluster_id, dest_logical_id, dest_cluster_id; + uint32_t ldr = vlapic->apic_page->ldr.v; + bool ret = false; + + if (is_x2apic_enabled(vlapic)) { + logical_id = ldr & 0xFFFFU; + cluster_id = (ldr >> 16U) & 0xFFFFU; + dest_logical_id = dest & 0xFFFFU; + dest_cluster_id = (dest >> 16U) & 0xFFFFU; + if ((cluster_id == dest_cluster_id) && ((logical_id & dest_logical_id) != 0U)) { + ret = true; + } + } else { + uint32_t dfr = vlapic->apic_page->dfr.v; + if ((dfr & APIC_DFR_MODEL_MASK) == APIC_DFR_MODEL_FLAT) { + /* + * In the "Flat Model" the MDA is interpreted as an 8-bit wide + * bitmask. This model is available in the xAPIC mode only. + */ + logical_id = ldr >> 24U; + dest_logical_id = dest & 0xffU; + if ((logical_id & dest_logical_id) != 0U) { + ret = true; + } + } else if ((dfr & APIC_DFR_MODEL_MASK) == APIC_DFR_MODEL_CLUSTER) { + /* + * In the "Cluster Model" the MDA is used to identify a + * specific cluster and a set of APICs in that cluster. + */ + logical_id = (ldr >> 24U) & 0xfU; + cluster_id = ldr >> 28U; + dest_logical_id = dest & 0xfU; + dest_cluster_id = (dest >> 4U) & 0xfU; + if ((cluster_id == dest_cluster_id) && ((logical_id & dest_logical_id) != 0U)) { + ret = true; + } + } else { + /* Guest has configured a bad logical model for this vcpu. */ + printc("vlapic has bad logical model %x", dfr); + assert(0); + } + } + + return ret; +} + +/* + * This function populates 'dmask' with the set of vcpus that match the + * addressing specified by the (dest, phys, lowprio) tuple. + */ +uint64_t +vlapic_calc_dest_noshort(struct vmrt_vm_comp *vm, bool is_broadcast, + uint32_t dest, bool phys, bool lowprio) +{ + uint64_t dmask = 0UL; + struct acrn_vlapic *vlapic, *lowprio_dest = NULL; + struct vmrt_vm_vcpu *vcpu; + uint16_t vcpu_id; + + if (is_broadcast) { + /* Broadcast in both logical and physical modes. */ + printc("Broadcast is not supported now\n"); + assert(0); + } else if (phys) { + /* Physical mode: "dest" is local APIC ID. */ + printc("vlapic phy dst mode to find cpu\n"); + set_dest_mask_phys(vm, &dmask, dest); + } else { + /* + * Logical mode: "dest" is message destination addr + * to be compared with the logical APIC ID in LDR. + */ + for (int i = 0; i < vm->num_vcpu; i++) { + vcpu = &vm->vcpus[i]; + vcpu_id = i; + vlapic = vcpu_vlapic(vcpu); + if (!is_dest_field_matched(vlapic, dest)) { + continue; + } + + if (lowprio) { + /* + * for lowprio delivery mode, the lowest-priority one + * among all "dest" matched processors accepts the intr. + */ + if (lowprio_dest == NULL) { + lowprio_dest = vlapic; + } else if (lowprio_dest->apic_page->ppr.v > vlapic->apic_page->ppr.v) { + lowprio_dest = vlapic; + } else { + /* No other state currently, do nothing */ + } + } else { + bitmap_set_nolock(vcpu_id, &dmask); + } + } + + if (lowprio && (lowprio_dest != NULL)) { + bitmap_set_nolock(vlapic2vcpu(lowprio_dest)->cpuid, &dmask); + } + } + + return dmask; +} + +void +vlapic_receive_intr(struct vmrt_vm_comp *vm, bool level, uint32_t dest, bool phys, + uint32_t delmode, uint32_t vec, bool rh) +{ + bool lowprio; + uint16_t vcpu_id; + uint64_t dmask; + struct vmrt_vm_vcpu *target_vcpu; + + if ((delmode != IOAPIC_RTE_DELMODE_FIXED) && + (delmode != IOAPIC_RTE_DELMODE_LOPRI) && + (delmode != IOAPIC_RTE_DELMODE_EXINT)) { + printc("vlapic intr invalid delmode %#x", delmode); + assert(0); + } else { + lowprio = (delmode == IOAPIC_RTE_DELMODE_LOPRI) || rh; + + /* + * We don't provide any virtual interrupt redirection hardware so + * all interrupts originating from the ioapic or MSI specify the + * 'dest' in the legacy xAPIC format. + */ + dmask = vlapic_calc_dest_noshort(vm, false, dest, phys, lowprio); + + for (vcpu_id = 0U; vcpu_id < vm->num_vcpu; vcpu_id++) { + struct acrn_vlapic *vlapic; + if ((dmask & (1UL << vcpu_id)) != 0UL) { + target_vcpu = vmrt_get_vcpu(vm, vcpu_id); + + /* only make request when vlapic enabled */ + vlapic = vcpu_vlapic(target_vcpu); + if (vlapic_enabled(vlapic)) { + if (delmode == IOAPIC_RTE_DELMODE_EXINT) { + assert(0); + } else { + vlapic_set_intr(target_vcpu, vec, level); + } + } else {assert(0);} + } + } + } +} + +void +vlapic_reset(struct acrn_vlapic *vlapic) +{ + struct lapic_regs *lapic; + + vlapic->msr_apicbase = DEFAULT_APIC_BASE; + + if (vlapic2vcpu(vlapic)->cpuid == BSP_CPU_ID) { + vlapic->msr_apicbase |= APICBASE_BSP; + } + vlapic->vapic_id = vlapic2vcpu(vlapic)->cpuid; + + /* Upon reset, vlapic is set to xAPIC mode. */ + vlapic->msr_apicbase |= APICBASE_XAPIC; + + lapic = vlapic->apic_page; + (void)memset((void *)lapic, 0U, sizeof(struct lapic_regs)); + + lapic->id.v = vlapic->vapic_id; + if (!is_x2apic_enabled(vlapic)) { + lapic->id.v <<= APIC_ID_SHIFT; + } + + lapic->version.v = VLAPIC_VERSION; + lapic->version.v |= (VLAPIC_MAXLVT_INDEX << MAXLVTSHIFT); + lapic->dfr.v = 0xffffffffU; + lapic->svr.v = APIC_SVR_VECTOR; + vlapic_mask_lvts(vlapic); + + lapic->icr_timer.v = 0U; + lapic->dcr_timer.v = 0U; + vlapic_write_dcr(vlapic); + + vlapic->svr_last = lapic->svr.v; + + vlapic->isrv = 0U; +} + + int32_t apic_write_vmexit_handler(struct vmrt_vm_vcpu *vcpu) { uint64_t qual; diff --git a/src/components/implementation/simple_vmm/vmm/vlapic.h b/src/components/implementation/simple_vmm/vmm/vlapic.h index 559af17a1c..d4e8645661 100644 --- a/src/components/implementation/simple_vmm/vmm/vlapic.h +++ b/src/components/implementation/simple_vmm/vmm/vlapic.h @@ -119,7 +119,7 @@ void vlapic_set_apicv_ops(void); * @{ */ -void vlapic_inject_intr(struct acrn_vlapic *vlapic, bool guest_irq_enabled, bool injected); +void vlapic_inject_intr(struct vmrt_vm_vcpu *vcpu); bool vlapic_has_pending_delivery_intr(struct vmrt_vm_vcpu *vcpu); bool vlapic_has_pending_intr(struct vmrt_vm_vcpu *vcpu); @@ -205,7 +205,7 @@ void vlapic_create(struct vmrt_vm_vcpu *vcpu, uint16_t pcpu_id); */ void vlapic_free(struct vmrt_vm_vcpu *vcpu); -void vlapic_reset(struct acrn_vlapic *vlapic, const struct acrn_apicv_ops *ops, enum reset_mode mode); +void vlapic_reset(struct acrn_vlapic *vlapic); void vlapic_restore(struct acrn_vlapic *vlapic, const struct lapic_regs *regs); uint64_t vlapic_apicv_get_apic_access_addr(void); uint64_t vlapic_apicv_get_apic_page_addr(struct acrn_vlapic *vlapic); diff --git a/src/components/implementation/simple_vmm/vmm/vmmio.c b/src/components/implementation/simple_vmm/vmm/vmmio.c new file mode 100644 index 0000000000..1efb26ee1b --- /dev/null +++ b/src/components/implementation/simple_vmm/vmm/vmmio.c @@ -0,0 +1,53 @@ +#include +#include +#include +#include + +void +ept_violation_handler(struct vmrt_vm_vcpu *vcpu) +{ + volatile struct vm_vcpu_shared_region *regs = vcpu->shared_region; + u64_t qualification = regs->qualification; + u64_t gpa; + struct acrn_mmio_request *mmio_req = vcpu->mmio_request; + + gpa = regs->gpa; + + /* Specify if read or write operation */ + if ((qualification & 0x2UL) != 0UL) { + /* Write operation */ + mmio_req->direction = ACRN_IOREQ_DIR_WRITE; + mmio_req->value = 0UL; + } else { + /* Read operation */ + mmio_req->direction = ACRN_IOREQ_DIR_READ; + } + + mmio_req->address = gpa; + + if (gpa >= IOAPIC_BASE_ADDR && gpa < IOAPIC_BASE_ADDR + PAGE_SIZE_4K) { + int ret = decode_instruction(vcpu); + + if (ret > 0) { + mmio_req->size = (uint64_t)ret; + } else { + VM_PANIC(vcpu); + } + + if (mmio_req->direction == ACRN_IOREQ_DIR_WRITE) { + if (emulate_instruction(vcpu) != 0) { + VM_PANIC(vcpu); + } + } + + vioapic_mmio_access_handler(vcpu); + + if (mmio_req->direction == ACRN_IOREQ_DIR_READ) { + /* Emulate instruction and update vcpu register set */ + (void)emulate_instruction(vcpu); + } + GOTO_NEXT_INST(regs); + } else { + VM_PANIC(vcpu); + } +} diff --git a/src/components/implementation/simple_vmm/vmm/vmsr.c b/src/components/implementation/simple_vmm/vmm/vmsr.c index e3c50d2fcb..1f45f13692 100644 --- a/src/components/implementation/simple_vmm/vmm/vmsr.c +++ b/src/components/implementation/simple_vmm/vmm/vmsr.c @@ -34,7 +34,6 @@ rdmsr_handler(struct vmrt_vm_vcpu *vcpu) { /* TODO: need to handle tsc adjustment in VM */ u32_t ax, dx; - printc("MSR_IA32_TSC_ADJUST:%llx, %llx\n", regs->ax, regs->dx); regs->ax = 0; regs->dx = 0; goto done; @@ -235,6 +234,11 @@ wrmsr_handler(struct vmrt_vm_vcpu *vcpu) /* This MSR has a value of 0 after reset, thus just keep it ad default, don't modify */ goto done; } + case MSR_IA32_APIC_BASE: + { + VM_PANIC(vcpu); + goto done; + } default: VM_PANIC(vcpu);; } diff --git a/src/components/interface/netio/Makefile b/src/components/interface/netio/Makefile new file mode 100644 index 0000000000..85d853ee45 --- /dev/null +++ b/src/components/interface/netio/Makefile @@ -0,0 +1,30 @@ +# Required variables used to drive the compilation process. It is OK +# for many of these to be empty. +# +# The library names associated with .a files output that are linked +# (via, for example, -lmemmgr) into dependents. This list should be +# "memmgr" for output files such as libmemmgr.a. +LIBRARY_OUTPUT = +# The .o files that are mandatorily linked into dependents. This is +# rarely used, and only when normal .a linking rules will avoid +# linking some necessary objects. This list is of names (for example, +# memmgr) which will generate memmgr.lib.o. Do NOT include the list of .o +# files here. Please note that using this list is *very rare* and +# should only be used when the .a support above is not appropriate. +OBJECT_OUTPUT = +# The path within this directory that holds the .h files for +# dependents to compile with (./ by default). Will be fed into the -I +# compiler arguments. It is unlikely you want to change this. +INCLUDE_PATHS = . +# The interfaces this component is dependent on for compilation (this +# is a list of directory names in interface/) +INTERFACE_DEPENDENCIES = +# The library dependencies this component is reliant on for +# compilation/linking (this is a list of directory names in lib/) +LIBRARY_DEPENDENCIES = stubs component shm_bm +# Note: Both the interface and library dependencies should be +# *minimal*. That is to say that removing a dependency should cause +# the build to fail. The build system does not validate this +# minimality; that's on you! + +include ../Makefile.subdir diff --git a/src/components/interface/netio/netio.h b/src/components/interface/netio/netio.h new file mode 100644 index 0000000000..c49214a011 --- /dev/null +++ b/src/components/interface/netio/netio.h @@ -0,0 +1,13 @@ +#ifndef NETIO_H +#define NETIO_H + +#include +#include +#include +#include + +shm_bm_objid_t netio_get_a_packet(u16_t *pkt_len); +int netio_send_packet(shm_bm_objid_t pktid, u16_t pkt_len); +void netio_shmem_map(cbuf_t shm_id); + +#endif diff --git a/src/components/interface/netio/stubs/Makefile b/src/components/interface/netio/stubs/Makefile new file mode 100644 index 0000000000..eaee12b7fb --- /dev/null +++ b/src/components/interface/netio/stubs/Makefile @@ -0,0 +1 @@ +include ../../Makefile.subsubdir diff --git a/src/components/interface/netio/stubs/c_stub.c b/src/components/interface/netio/stubs/c_stub.c new file mode 100644 index 0000000000..44107f563d --- /dev/null +++ b/src/components/interface/netio/stubs/c_stub.c @@ -0,0 +1,16 @@ +#include +#include +#include + + +COS_CLIENT_STUB(shm_bm_objid_t, netio_get_a_packet, u16_t *pkt_len) +{ + COS_CLIENT_INVCAP; + word_t r1, r2; + int ret; + + ret = cos_sinv_2rets(uc, 0, 0, 0, 0, &r1, &r2); + *pkt_len = (u16_t)r1; + + return ret; +} diff --git a/src/components/interface/netio/stubs/s_stub.c b/src/components/interface/netio/stubs/s_stub.c new file mode 100644 index 0000000000..30ea4609bb --- /dev/null +++ b/src/components/interface/netio/stubs/s_stub.c @@ -0,0 +1,7 @@ +#include +#include + +COS_SERVER_3RET_STUB(shm_bm_objid_t, netio_get_a_packet) +{ + return netio_get_a_packet((u16_t *)r1); +} diff --git a/src/components/interface/netio/stubs/stubs.S b/src/components/interface/netio/stubs/stubs.S new file mode 100644 index 0000000000..d40a9d9128 --- /dev/null +++ b/src/components/interface/netio/stubs/stubs.S @@ -0,0 +1,5 @@ +#include + +cos_asm_stub_indirect(netio_get_a_packet) +cos_asm_stub(netio_send_packet) +cos_asm_stub(netio_shmem_map) diff --git a/src/components/interface/netshmem/lib.c b/src/components/interface/netshmem/lib.c index fc31fc9c96..d67671834d 100644 --- a/src/components/interface/netshmem/lib.c +++ b/src/components/interface/netshmem/lib.c @@ -5,13 +5,18 @@ struct netshmem netshmems[NETSHMEM_REGION_SZ] = {0}; void -netshmem_create(void) +netshmem_create(thdid_t tid) { shm_bm_objid_t objid; struct netshmem_pkt_buf *obj; + thdid_t thd; void *mem; - thdid_t thd = cos_thdid(); + if (!tid) { + thd = cos_thdid(); + } else { + thd = tid; + } assert(thd < NETSHMEM_REGION_SZ); /* init rx shmem */ diff --git a/src/components/interface/netshmem/netshmem.h b/src/components/interface/netshmem/netshmem.h index 2df6ec37c4..f908d3dbb9 100644 --- a/src/components/interface/netshmem/netshmem.h +++ b/src/components/interface/netshmem/netshmem.h @@ -4,7 +4,7 @@ #include #include -#define PKT_BUF_NUM 64 +#define PKT_BUF_NUM 128 #define PKT_BUF_SIZE 2048 struct netshmem { @@ -44,7 +44,7 @@ struct netshmem_pkt_buf { SHM_BM_INTERFACE_CREATE(net_pkt_buf, sizeof (struct netshmem_pkt_buf), PKT_BUF_NUM); /* This will create a shmem for the current component*/ -void netshmem_create(void); +void netshmem_create(thdid_t tid); cbuf_t netshmem_get_shm_id(); shm_bm_t netshmem_get_shm(); diff --git a/src/components/lib/dpdk/adapter/cos_dpdk_adapter.c b/src/components/lib/dpdk/adapter/cos_dpdk_adapter.c index b6f4d68bb5..79d6e2d93e 100644 --- a/src/components/lib/dpdk/adapter/cos_dpdk_adapter.c +++ b/src/components/lib/dpdk/adapter/cos_dpdk_adapter.c @@ -198,3 +198,4 @@ COS_DPDK_DECLARE_NIC_MODULE(net_e1000_em); COS_DPDK_DECLARE_NIC_MODULE(mempool_ring); COS_DPDK_DECLARE_NIC_MODULE(net_ice); COS_DPDK_DECLARE_NIC_MODULE(net_ice_dcf); +COS_DPDK_DECLARE_NIC_MODULE(net_vmxnet3); diff --git a/src/components/lib/dpdk/cos_dpdk.c b/src/components/lib/dpdk/cos_dpdk.c index 25c2bc144a..2e5d9067be 100644 --- a/src/components/lib/dpdk/cos_dpdk.c +++ b/src/components/lib/dpdk/cos_dpdk.c @@ -295,12 +295,14 @@ cos_dev_port_tx_queue_setup(cos_portid_t port_id, uint16_t tx_queue_id, ret = rte_eth_dev_info_get(real_port_id, &dev_info); txq_conf = dev_info.default_txconf; + +#if E810_NIC /* We assume the NIC provides both IP & UDP offload capability */ assert(dev_info.tx_offload_capa & DEV_TX_OFFLOAD_IPV4_CKSUM); assert(dev_info.tx_offload_capa & DEV_TX_OFFLOAD_UDP_CKSUM); +#endif - // txq_conf.tx_free_thresh = 4096; - txq_conf.tx_free_thresh = 1024 - 32; + txq_conf.tx_free_thresh = nb_tx_desc - 32; /* set the txq to enable IP and UDP offload */ if (ENABLE_OFFLOAD) { txq_conf.offloads |= DEV_TX_OFFLOAD_IPV4_CKSUM; diff --git a/src/components/lib/dpdk/cos_dpdk.h b/src/components/lib/dpdk/cos_dpdk.h index f3298b0ac2..044ffb1bd3 100644 --- a/src/components/lib/dpdk/cos_dpdk.h +++ b/src/components/lib/dpdk/cos_dpdk.h @@ -8,7 +8,8 @@ #define COS_ETH_NAME_SZ 16 -#define COS_MBUF_DEFAULT_DATAROOM 1500 +/* vmxnet3 needs at least 1700 */ +#define COS_MBUF_DEFAULT_DATAROOM 1700 #define COS_PKTMBUF_HEADROOM 128 /* diff --git a/src/components/lib/slm/quantum.c b/src/components/lib/slm/quantum.c index 2daeca2c03..3c05c94588 100644 --- a/src/components/lib/slm/quantum.c +++ b/src/components/lib/slm/quantum.c @@ -164,8 +164,7 @@ slm_policy_timer_init(microsec_t period) int slm_timer_quantum_init(void) { - /* 10ms */ - slm_policy_timer_init(10000); + slm_policy_timer_init(50); return 0; } diff --git a/src/components/lib/vmrt/doc.md b/src/components/lib/vmrt/doc.md index b7d84fe80f..296da51b70 100644 --- a/src/components/lib/vmrt/doc.md +++ b/src/components/lib/vmrt/doc.md @@ -44,7 +44,7 @@ struct vmrt_vm_comp { char name[VMRT_VM_NAME_SIZE]; - u8_t num_vpu; + u8_t num_vcpu; struct vmrt_vm_vcpu vcpus[VMRT_VM_MAX_VCPU]; }; ``` @@ -62,7 +62,7 @@ vmrt_vm_create(struct vmrt_vm_comp *vm, char *name, u8_t num_vcpu, u64_t vm_mem_ /* 2. Initialize vm members */ assert(num_vcpu < VMRT_VM_MAX_VCPU); - vm->num_vpu = num_vcpu; + vm->num_vcpu = num_vcpu; vm->guest_mem_sz = vm_mem_sz; strcpy((char *)&vm->name, name); diff --git a/src/components/lib/vmrt/vmrt.c b/src/components/lib/vmrt/vmrt.c index 0f36f3abe8..053ebdc2a8 100644 --- a/src/components/lib/vmrt/vmrt.c +++ b/src/components/lib/vmrt/vmrt.c @@ -30,7 +30,61 @@ vmrt_dump_vcpu(struct vmrt_vm_vcpu *vcpu) printc("\tRIP: %016llx\tRSP: %016llx\tInst Len: %llu\n", regs->ip, regs->sp, regs->inst_length); printc("\tGPA: %016llx\n", regs->gpa); printc("\tEFER: %016llx\t\n", regs->efer); - printc("\tCR0: %016llx\tCR2: %016llx\tCR4: %016llx\n", regs->cr0, regs->cr2, regs->cr4); + printc("\tCR0: %016llx\tCR2: %016llx\tCR3: %016llx\tCR4: %016llx\n", regs->cr0, regs->cr2, regs->cr3, regs->cr4); +} + +paddr_t +vmrt_vm_gva2gpa(struct vmrt_vm_vcpu *vcpu, vaddr_t gva) +{ + struct vm_vcpu_shared_region *shared_region; + u64_t cr3; + u64_t *hva; + u64_t paddr; + u64_t l4, l3, l2, l1; + u64_t l4_entry, l3_entry, l2_entry, l1_entry; + + shared_region = vcpu->shared_region; + + cr3 = shared_region->cr3 & ~(u64_t)0xFFF; + + hva = GPA2HVA(cr3, vcpu->vm); + + l4 = PGTBL_LVL_4_IDX(gva); + l3 = PGTBL_LVL_3_IDX(gva); + l2 = PGTBL_LVL_2_IDX(gva); + l1 = PGTBL_LVL_1_IDX(gva); + + l4_entry = hva[l4]; + + assert(PGTBL_ENTRY_PRESENT(l4_entry)); + + paddr = (l4_entry & PGTBL_ENTRY_ADDR_MASK); + hva = GPA2HVA(paddr, vcpu->vm); + l3_entry = hva[l3]; + + assert(PGTBL_ENTRY_PRESENT(l3_entry)); + + if (PGTBL_ENTRY_SUPER_PAGE(l3_entry)) { + return (paddr_t)(l3_entry & PGTBL_ENTRY_ADDR_MASK) + (gva & 0x3FFFFFFF); + } + + paddr = (l3_entry & PGTBL_ENTRY_ADDR_MASK); + hva = GPA2HVA(paddr, vcpu->vm); + l2_entry = hva[l2]; + + assert(PGTBL_ENTRY_PRESENT(l2_entry)); + + if (PGTBL_ENTRY_SUPER_PAGE(l2_entry)) { + return (paddr_t)(l2_entry & PGTBL_ENTRY_ADDR_MASK) + (gva & 0x1FFFFF); + } + + paddr = (l2_entry & PGTBL_ENTRY_ADDR_MASK); + hva = GPA2HVA(paddr, vcpu->vm); + l1_entry = hva[l1]; + + assert(PGTBL_ENTRY_PRESENT(l1_entry)); + + return (paddr_t)(l1_entry & PGTBL_ENTRY_ADDR_MASK) + (gva & 0xFFF); } void @@ -82,7 +136,7 @@ vmrt_vm_vcpu_init(struct vmrt_vm_comp *vm, u32_t vcpu_nr) thdid_t tid, handler_tid; thdcap_t cap; vaddr_t resource; - assert(vcpu_nr < vm->num_vpu); + assert(vcpu_nr < vm->num_vcpu); vcpu = &vm->vcpus[vcpu_nr]; assert(!vcpu->shared_region); @@ -150,7 +204,7 @@ vmrt_vm_create(struct vmrt_vm_comp *vm, char *name, u8_t num_vcpu, u64_t vm_mem_ vm->lapic_access_page = lapic_access_page; assert(num_vcpu < VMRT_VM_MAX_VCPU); - vm->num_vpu = num_vcpu; + vm->num_vcpu = num_vcpu; vm->guest_mem_sz = vm_mem_sz; strcpy((char *)&vm->name, name); @@ -184,6 +238,12 @@ wrmsr_handler(struct vmrt_vm_vcpu *vcpu) VM_PANIC(vcpu);; } +CWEAKSYMB void +ept_violation_handler(struct vmrt_vm_vcpu *vcpu) +{ + VM_PANIC(vcpu); +} + CWEAKSYMB void ept_misconfig_handler(struct vmrt_vm_vcpu *vcpu) { @@ -373,6 +433,9 @@ vmrt_handle_reason(struct vmrt_vm_vcpu *vcpu, u64_t reason) /* TODO: handle pause exception */ GOTO_NEXT_INST(vcpu->shared_region); break; + case VM_EXIT_REASON_EPT_VIOLATION: + ept_violation_handler(vcpu); + break; case VM_EXIT_REASON_EPT_MISCONFIG: ept_misconfig_handler(vcpu); break; @@ -420,8 +483,17 @@ vmrt_vm_exception_handler(void *_vcpu) vmrt_handle_reason(vcpu, reason); rdtscll(curr_tsc); if (curr_tsc >= vcpu->next_timer) { +#if VMX_SUPPORT_POSTED_INTR + vlapic_timer_expired(vcpu); +#else /* 236 is Linux's fixed timer interrrupt */ lapic_intr_inject(vcpu, 236, 0); +#endif + vcpu->next_timer = ~0ULL; } + +#if VMX_SUPPORT_POSTED_INTR + vlapic_inject_intr(vcpu); +#endif } } diff --git a/src/components/lib/vmrt/vmrt.h b/src/components/lib/vmrt/vmrt.h index b573a08627..a04a6bb5fb 100644 --- a/src/components/lib/vmrt/vmrt.h +++ b/src/components/lib/vmrt/vmrt.h @@ -17,6 +17,11 @@ struct vmrt_vm_vcpu { */ void *vlapic; + /* Instruction emulation context */ + void *inst_ctxt; + + void *mmio_request; + thdid_t tid; thdcap_t cap; @@ -40,17 +45,18 @@ struct vmrt_vm_comp { void *guest_addr; word_t guest_mem_sz; + void *ioapic; vm_lapicaccesscap_t lapic_access_page; char name[VMRT_VM_NAME_SIZE]; - u8_t num_vpu; + u8_t num_vcpu; struct vmrt_vm_vcpu vcpus[VMRT_VM_MAX_VCPU]; int wire_mode; }; -#define VMRT_GPA2HVA(gpa, vm, offset) { ((gpa - offset) + vm->guest_addr) } +#define VMRT_GPA2HVA(gpa, vm, offset) ((gpa - offset) + vm->guest_addr) #define GPA2HVA(gpa, vm) VMRT_GPA2HVA(gpa, vm, PAGE_SIZE_4K) typedef void vmrt_exception_handler(struct vmrt_vm_vcpu *vcpu); @@ -62,7 +68,8 @@ void vmrt_vm_vcpu_resume(struct vmrt_vm_vcpu *vcpu); void vmrt_vm_data_copy_to(struct vmrt_vm_comp *vm, char *image, u64_t size, paddr_t gpa); void vmrt_vm_exception_handler(void *vcpu); void vmrt_vm_vcpu_start(struct vmrt_vm_vcpu *vcpu); -static inline struct vmrt_vm_vcpu *vmrt_get_vcpu(struct vmrt_vm_comp *vm, u32_t vcpu_nr) { return &vm->vcpus[vcpu_nr]; } +paddr_t vmrt_vm_gva2gpa(struct vmrt_vm_vcpu *vcpu, vaddr_t gva); +static inline struct vmrt_vm_vcpu *vmrt_get_vcpu(struct vmrt_vm_comp *vm, u32_t vcpu_nr) { assert(vcpu_nr < vm->num_vcpu);return &vm->vcpus[vcpu_nr]; } void lapic_intr_inject(struct vmrt_vm_vcpu *vcpu, u8_t vector, int autoeoi); @@ -106,3 +113,12 @@ enum { }; #define LAPIC_BASE_ADDR (0xFEE00000) +#define IOAPIC_BASE_ADDR (0xFEC00000) + +#define PGTBL_LVL_4_IDX(addr) ((((u64_t)(addr)) >> 39) & 0x1FF) +#define PGTBL_LVL_3_IDX(addr) ((((u64_t)(addr)) >> 30) & 0x1FF) +#define PGTBL_LVL_2_IDX(addr) ((((u64_t)(addr)) >> 21) & 0x1FF) +#define PGTBL_LVL_1_IDX(addr) ((((u64_t)(addr)) >> 12) & 0x1FF) +#define PGTBL_ENTRY_ADDR_MASK 0X000FFFFFFFFFF000 +#define PGTBL_ENTRY_PRESENT(entry) ((u64_t)entry & 0x1) +#define PGTBL_ENTRY_SUPER_PAGE(entry) ((u64_t)entry & 0x80) diff --git a/src/kernel/capinv.c b/src/kernel/capinv.c index d023088934..51f86e2b1b 100644 --- a/src/kernel/capinv.c +++ b/src/kernel/capinv.c @@ -1265,9 +1265,20 @@ static int __attribute__((noinline)) composite_syscall_slowpath(struct pt_regs * word_t flags; ret = cap_kmem_activate(ct, pgtbl_cap, pgtbl_addr, (unsigned long *)&page, &pte); + if (ret == -EEXIST || ret == -ECASFAIL) { + /* apic access mem has been activated by other vcpu, thus just get the page addr */ + pgtblc = (struct cap_pgtbl *)captbl_lkup(ct, pgtbl_cap); + page = (vaddr_t)pgtbl_lkup(pgtblc->pgtbl, pgtbl_addr & PGTBL_FRAME_MASK, &flags); + assert(page); + ret = 0; + } + if (likely(!ret)) { ret = vm_lapic_access_activate(ct, cap, lapic_access_cap, page); + /* TODO: improve it for multi-vcpu case */ + assert(!ret); } + assert(!ret); if (ret) kmem_unalloc(pte); break; diff --git a/src/kernel/include/chal.h b/src/kernel/include/chal.h index 70a6d261c0..77d405e924 100644 --- a/src/kernel/include/chal.h +++ b/src/kernel/include/chal.h @@ -87,6 +87,7 @@ int chal_attempt_ainv(struct async_cap *acap); /* IPI sending */ void chal_send_ipi(int cpu_id); +void chal_selfipi(u8_t vector); /* static const struct cos_trans_fns *trans_fns = NULL; */ void chal_idle(void); diff --git a/src/kernel/include/shared/cos_types.h b/src/kernel/include/shared/cos_types.h index 8423981c87..e09257eb53 100644 --- a/src/kernel/include/shared/cos_types.h +++ b/src/kernel/include/shared/cos_types.h @@ -604,6 +604,23 @@ typedef unsigned short int cos_channelkey_t; /* 0 == PRIVATE KEY. >= 1 GLOBAL KE /* VM shared data structures */ +struct vm_pi_desc { + /* posted-intr desc is defined to be 64B by the hardware */ + + u64_t pir[4]; /* interrupt vectors, 256 bits together */ + + union { + struct { + u8_t on :1; + u8_t padding:7; + } outstanding_noti; + + u64_t val; + } info; + + u64_t padding[3]; +} __attribute__((aligned(CACHE_LINE), packed)); + #define MAX_VM_EXIT_REASONS 70 struct vm_vcpu_shared_region { u64_t cr2; @@ -635,9 +652,13 @@ struct vm_vcpu_shared_region { u64_t gpa; u64_t efer; u64_t cr0; + u64_t cr3; u64_t cr4; u64_t microcode_version; + u16_t inject_evt; + + struct vm_pi_desc pi_desc __attribute__((aligned(CACHE_LINE))); /* posted interrupt support, which is essentially an interface to record interrupt vectors */ }; enum { @@ -660,8 +681,9 @@ enum { #define VM_EXIT_REASON_RDMSR 31 #define VM_EXIT_REASON_WRMSR 32 #define VM_EXIT_REASON_PAUSE 40 -#define VM_EXIT_REASON_EPT_MISCONFIG 49 #define VM_EXIT_REASON_APIC_ACCESS 44 +#define VM_EXIT_REASON_EPT_VIOLATION 48 +#define VM_EXIT_REASON_EPT_MISCONFIG 49 #define VM_EXIT_REASON_PREEMPTION_TIMER 52 #define VM_EXIT_REASON_XSETBV 55 #define VM_EXIT_REASON_APIC_WRITE 56 diff --git a/src/platform/i386/chal.c b/src/platform/i386/chal.c index 588347010f..c2b5d20a6e 100644 --- a/src/platform/i386/chal.c +++ b/src/platform/i386/chal.c @@ -38,6 +38,12 @@ chal_send_ipi(int cpu_id) return; } +void +chal_selfipi(u8_t vector) +{ + lapic_selfipi(vector); +} + void chal_khalt(void) { diff --git a/src/platform/i386/chal/chal_config.h b/src/platform/i386/chal/chal_config.h index 65c1b28f9b..980d8a26ca 100644 --- a/src/platform/i386/chal/chal_config.h +++ b/src/platform/i386/chal/chal_config.h @@ -46,8 +46,9 @@ typedef enum { HW_ID30, HW_ID31, HW_LAPIC_SPURIOUS, - HW_LAPIC_IPI_ASND = 254, /* ipi interrupt for asnd */ - HW_LAPIC_TIMER = 255, /* Local APIC TSC-DEADLINE mode - Timer interrupts */ + HW_LAPIC_IPI_ASND = 253, /* ipi interrupt for asnd */ + HW_LAPIC_TIMER = 254, /* Local APIC TSC-DEADLINE mode - Timer interrupts */ + HW_LAPIC_POSTED_INTR = 255, /* posted interrupt, needs to make sure it is posted into VM, thus it's priority is higher than timer */ } hwid_t; typedef struct { diff --git a/src/platform/i386/chal/shared/cos_config.h b/src/platform/i386/chal/shared/cos_config.h index 09169ace28..24636f93bd 100644 --- a/src/platform/i386/chal/shared/cos_config.h +++ b/src/platform/i386/chal/shared/cos_config.h @@ -143,6 +143,7 @@ #if defined(__x86_64__) #define CONFIG_VMX 1 +#define VMX_SUPPORT_POSTED_INTR 0 /* root page tbale is 0, then second level page table is 1, etc.*/ #define COS_PGTBL_DEPTH 4 diff --git a/src/platform/i386/chal_cpu.h b/src/platform/i386/chal_cpu.h index 6500a565d4..ebd783cb2e 100644 --- a/src/platform/i386/chal_cpu.h +++ b/src/platform/i386/chal_cpu.h @@ -284,8 +284,8 @@ chal_cpu_init(void) writemsr(MSR_LSTAR, (u32_t)((u64_t)sysenter_entry), (u32_t)((u64_t)sysenter_entry >> 32)); writemsr(MSR_SFMASK, 512, 0); writemsr(MSR_USER_GSBASE, 0, 0); - writemsr(MSR_KERNEL_GSBASE, (u32_t)((u64_t)(&kernel_stack_info[cpu_id])), - (u32_t)((u64_t)(&kernel_stack_info[cpu_id]) >> 32)); + writemsr(MSR_KERNEL_GSBASE, (u32_t)((u64_t)(&kernel_stack_info[cpu_id])), (u32_t)((u64_t)(&kernel_stack_info[cpu_id]) >> 32)); + #elif defined(__i386__) chal_cpu_cr4_set(cr4 | CR4_PSE | CR4_PGE); diff --git a/src/platform/i386/idt.c b/src/platform/i386/idt.c index 8905b5e51c..26ff439ecf 100644 --- a/src/platform/i386/idt.c +++ b/src/platform/i386/idt.c @@ -175,6 +175,7 @@ idt_init(const cpuid_t cpu_id) idt_set_gate(HW_LAPIC_SPURIOUS, (unsigned long)lapic_spurious_irq, 0x08, 0x8E); idt_set_gate(HW_LAPIC_IPI_ASND, (unsigned long)lapic_ipi_asnd_irq, 0x08, 0x8E); idt_set_gate(HW_LAPIC_TIMER, (unsigned long)lapic_timer_irq, 0x08, 0x8E); + idt_set_gate(HW_LAPIC_POSTED_INTR, (unsigned long)posted_intr_irq, 0x08, 0x8E); flush_idt: /* asm volatile("lidt (%0)" : : "p"(&idtr)); */ diff --git a/src/platform/i386/isr.h b/src/platform/i386/isr.h index cc0fc8f815..9c94333925 100644 --- a/src/platform/i386/isr.h +++ b/src/platform/i386/isr.h @@ -84,6 +84,7 @@ extern void handler_hw_62(struct pt_regs *); extern void lapic_spurious_irq(struct pt_regs *); extern void lapic_ipi_asnd_irq(struct pt_regs *); extern void lapic_timer_irq(struct pt_regs *); +extern void posted_intr_irq(struct pt_regs *); static void ack_irq(int n) diff --git a/src/platform/i386/kernel.h b/src/platform/i386/kernel.h index 5e2b665bf0..b076bd4ada 100644 --- a/src/platform/i386/kernel.h +++ b/src/platform/i386/kernel.h @@ -77,6 +77,7 @@ u32_t lapic_get_ccr(void); void lapic_timer_calibration(u32_t ratio); int lapic_timer_calibrated(void); void lapic_asnd_ipi_send(const cpuid_t cpu_id); +void lapic_selfipi(u8_t vector); void smp_init(volatile int *cores_ready); diff --git a/src/platform/i386/lapic.c b/src/platform/i386/lapic.c index 99624ff7a4..e978518a6f 100644 --- a/src/platform/i386/lapic.c +++ b/src/platform/i386/lapic.c @@ -76,6 +76,7 @@ volatile int apicids[NUM_CPU]; #define LAPIC_ICR_STATUS (1 << 12) #define LAPIC_ICR_INIT 0x500 /* INIT */ #define LAPIC_ICR_SIPI 0x600 /* Startup IPI */ +#define LAPIC_ICR_SELF 0x40000 /* Self IPI */ #define LAPIC_ICR_FIXED 0x000 /* fixed IPI */ #define LAPIC_IPI_ASND_VEC HW_LAPIC_IPI_ASND /* interrupt vec for asnd ipi */ @@ -433,6 +434,17 @@ lapic_ipi_send(u32_t dest, u32_t vect_flags) return 0; } + +void +lapic_selfipi(u8_t vector) +{ + lapic_write_reg(LAPIC_ICR + 0x10, 0 << 24); + lapic_read_reg(LAPIC_ICR + 0x10); + + lapic_write_reg(LAPIC_ICR, LAPIC_ICR_SELF | vector); + lapic_read_reg(LAPIC_ICR); +} + void lapic_asnd_ipi_send(const cpuid_t cpu_id) { diff --git a/src/platform/x86_64/entry.S b/src/platform/x86_64/entry.S index 352d53cfd1..1825432b7b 100644 --- a/src/platform/x86_64/entry.S +++ b/src/platform/x86_64/entry.S @@ -193,6 +193,7 @@ IRQ_ID(62) IRQ(lapic_spurious) IRQ(lapic_ipi_asnd) IRQ(lapic_timer) +IRQ(posted_intr) /* * Loads the IDT into the processor diff --git a/src/platform/x86_64/vmx/include/vmx.h b/src/platform/x86_64/vmx/include/vmx.h index 0d60cbe09d..d69cdd7375 100644 --- a/src/platform/x86_64/vmx/include/vmx.h +++ b/src/platform/x86_64/vmx/include/vmx.h @@ -122,13 +122,18 @@ #define LAPIC_ACCESS_ADDRESS 0x00002014 #define VAPIC_ACCESS_ADDRESS 0x00002012 +#define POSTED_INTERRUPT_NOTIFICATION_VECTOR 0x00000002 +#define POSTED_INTERRUPT_DESCRIPTOR 0x00002016 + #define EXTERNAL_INTERRUPT_EXITING BIT(0) +#define PROCESS_POSTED_INTERRUPTS BIT(7) #define HLT_EXITING BIT(7) #define INVLPG_EXITING BIT(9) #define MWAIT_EXITING BIT(10) #define RDPMC_EXITING BIT(11) #define RDTSC_EXITING BIT(12) +#define ACTIVATE_TERTIARY_CONTROLS BIT(17) #define UNCONDITIONAL_IO_EXITING BIT(24) #define USE_MSR_BITMAPS BIT(28) #define USE_TPR_SHADOW BIT(21) @@ -138,6 +143,7 @@ #define VIRTUALIZE_APIC_ACCESSES BIT(0) #define ENABLE_EPT BIT(1) #define ENABLE_RDTSCP BIT(3) +#define VIRTUALIZE_x2APIC_MODE BIT(4) #define ENABLE_VPID BIT(5) #define UNRESTRICTED_GUEST BIT(7) #define APIC_REGISTER_VIRTUALIZATION BIT(8) diff --git a/src/platform/x86_64/vmx/include/vmx_vmcs.h b/src/platform/x86_64/vmx/include/vmx_vmcs.h index 562bc80d69..70ac5ecc59 100644 --- a/src/platform/x86_64/vmx/include/vmx_vmcs.h +++ b/src/platform/x86_64/vmx/include/vmx_vmcs.h @@ -78,7 +78,7 @@ struct vmx_vmcs { void vmx_env_init(void); void vmx_thd_init(struct thread *thd, void *vm_pgd, struct cap_vm_vmcb *vmcb); void vmx_host_state_init(void); -void vmx_guest_state_init(void); +void vmx_guest_state_init(struct thread *thd); void vmx_thd_start_or_resume(struct thread *thd); #else diff --git a/src/platform/x86_64/vmx/vmx.c b/src/platform/x86_64/vmx/vmx.c index 48f00bca25..9139fb1bc1 100644 --- a/src/platform/x86_64/vmx/vmx.c +++ b/src/platform/x86_64/vmx/vmx.c @@ -79,7 +79,7 @@ vmx_host_state_init(void) } void -vmx_guest_state_init(void) +vmx_guest_state_init(struct thread *thd) { /* Initializing guest state, this will set guest into real mode */ u64_t tmp64; @@ -188,7 +188,7 @@ vmx_pinbased_ctl_init(void) { u32_t pinbased_execution_ctl = 0; - pinbased_execution_ctl |= EXTERNAL_INTERRUPT_EXITING ; + pinbased_execution_ctl |= EXTERNAL_INTERRUPT_EXITING | PROCESS_POSTED_INTERRUPTS ; pinbased_execution_ctl = fix_reserved_ctrl_bits(IA32_VMX_PINBASED_CTLS, pinbased_execution_ctl); vmwrite(PIN_BASED_VM_EXECUTION_CONTROLS, pinbased_execution_ctl); } @@ -360,6 +360,9 @@ vmx_thd_init(struct thread *thd, void *vm_pgd, struct cap_vm_vmcb *vmcb) eptp |= (4 - 1) << 3; eptp |= 1 << 6; vmwrite(EPTP, eptp); + + vmwrite(POSTED_INTERRUPT_NOTIFICATION_VECTOR, HW_LAPIC_POSTED_INTR); + vmwrite(POSTED_INTERRUPT_DESCRIPTOR, chal_va2pa(&((struct vm_vcpu_shared_region *)shared_region)->pi_desc)); } static void @@ -397,7 +400,7 @@ vmx_thd_start_or_resume(struct thread *thd) assert(thd->vcpu_ctx.state = VM_THD_STATE_STOPPED); vmx_host_state_init(); - vmx_guest_state_init(); + vmx_guest_state_init(thd); vmx_pinbased_ctl_init(); vmx_procbased_ctl_init(); vmx_vm_exit_ctl_init(); diff --git a/src/platform/x86_64/vmx/vmx_exit.c b/src/platform/x86_64/vmx/vmx_exit.c index dacae205cd..b49c4527f8 100644 --- a/src/platform/x86_64/vmx/vmx_exit.c +++ b/src/platform/x86_64/vmx/vmx_exit.c @@ -19,7 +19,7 @@ int expended_process(struct pt_regs *regs, struct thread *thd_curr, struct comp_ struct cos_cpu_local_info *cos_info, int timer_intr_context); /* The tmp regs stack used for VM-exit switching to other threads */ -static struct pt_regs tmp_regs; +static struct pt_regs tmp_regs[NUM_CPU]; /* When VMM tries to write cr0/cr4, kernel needs to take care of them */ extern u64_t cr4_fixed1_bits; @@ -27,6 +27,21 @@ extern u64_t cr4_fixed0_bits; extern u64_t cr0_fixed1_bits; extern u64_t cr0_fixed0_bits; +int +posted_intr_handler(struct pt_regs *regs) +{ + /* should not come here by design */ + assert(0); + return 0; +} + +static void +posted_intr_inject(void) +{ + chal_selfipi(HW_LAPIC_POSTED_INTR); +} + + void vmx_resume(struct thread *thd) { @@ -66,6 +81,18 @@ vmx_resume(struct thread *thd) vmwrite(GUEST_INTERRUPT_STATUS, shared_region->interrupt_status); } +#if VMX_SUPPORT_POSTED_INTR + /* + * TODO: We definitely would like to support posted interrupt mechanism since it can reduce multi-core + * interrupt injection overhead. However, this currently cannot work small timer tick like 100us set up. + * Thus, currently just keep the legacy interrupt injection mechanism. + */ + if (unlikely(shared_region->inject_evt)) { + posted_intr_inject(); + shared_region->inject_evt = 0; + } +#endif + /* TODO: some msrs like kernel gs are (per-core) constant, can make host saving code simpler`*/ thd->vcpu_ctx.vmcs.host_msr_gs_base = msr_get(IA32_GS_BASE); thd->vcpu_ctx.vmcs.host_msr_gskernel_base = msr_get(IA32_KERNEL_GSBASE); @@ -133,11 +160,13 @@ vmx_exit_handler(struct vm_vcpu_shared_region *regs) u64_t reason, qualification, gla, gpa, inst_length, inst_info; u8_t reason_nr; int ret = 0; + unsigned long cpuid; struct cos_cpu_local_info *cos_info; struct thread *thd_curr, *thd_exception_handler, *next; struct vm_vcpu_shared_region *shared_region; cos_info = cos_cpu_local_info(); - thd_curr = thd_current(cos_info); + thd_curr = thd_current(cos_info); + cpuid = cos_info->cpuid; thd_curr->vcpu_ctx.vmcs.guest_msr_gs_base = msr_get(IA32_GS_BASE); thd_curr->vcpu_ctx.vmcs.guest_msr_gskernel_base = msr_get(IA32_KERNEL_GSBASE); @@ -188,6 +217,7 @@ vmx_exit_handler(struct vm_vcpu_shared_region *regs) shared_region->sp = vmread(GUEST_RSP); shared_region->efer = vmread(GUEST_IA32_EFER); shared_region->cr0 = vmread(GUEST_CR0); + shared_region->cr3 = vmread(GUEST_CR3); shared_region->cr4 = vmread(GUEST_CR4); shared_region->interrupt_status = vmread(GUEST_INTERRUPT_STATUS); shared_region->inst_length = inst_length; @@ -204,15 +234,15 @@ vmx_exit_handler(struct vm_vcpu_shared_region *regs) if (reason_nr == VM_EXIT_REASON_EXTERNAL_INTERRUPT) { lapic_ack(); /*FIXME: might need a xsave/xrestore for sse/avx for current vcpu thd because current thd is set to be exception handler */ - copy_gp_regs(&thd_exception_handler->regs, &tmp_regs); - ret = timer_process(&tmp_regs, thd_exception_handler); + copy_gp_regs(&thd_exception_handler->regs, &tmp_regs[cpuid]); + ret = timer_process(&tmp_regs[cpuid], thd_exception_handler); } else { next = thd_exception_handler; - ret = cap_thd_switch(&tmp_regs, thd_curr, next, NULL, cos_info); + ret = cap_thd_switch(&tmp_regs[cpuid], thd_curr, next, NULL, cos_info); vmx_assert(ret == 0); } - __asm__ volatile("movq %%rbx, %%rsp; jmpq *%%rcx": : "a"(ret), "b"(&tmp_regs),"c"(&restore_from_vm)); + __asm__ volatile("movq %%rbx, %%rsp; jmpq *%%rcx": : "a"(ret), "b"(&tmp_regs[cpuid]),"c"(&restore_from_vm)); /* Should never come here */ vmx_assert(0); diff --git a/tools/run.sh b/tools/run.sh index 50e2af6d06..af9dd98e2d 100755 --- a/tools/run.sh +++ b/tools/run.sh @@ -42,12 +42,12 @@ then debug_flag="-S" if [ "${nic_flag}" == "enable-nic" ] then - nic_flag=" -netdev type=tap,id=net0,ifname=tap0,script=no,downscript=no -device e1000e,netdev=net0,mac=66:66:66:66:66:66 " + nic_flag=" -netdev type=tap,id=net0,ifname=tap0,script=no,downscript=no -device vmxnet3,netdev=net0,mac=66:66:66:66:66:66 " fi elif [ "${debug_flag}" == "enable-nic" ] then debug_flag="" - nic_flag=" -netdev type=tap,id=net0,ifname=tap0,script=no,downscript=no -device e1000e,netdev=net0,mac=66:66:66:66:66:66 " + nic_flag=" -netdev type=tap,id=net0,ifname=tap0,script=no,downscript=no -device vmxnet3,netdev=net0,mac=66:66:66:66:66:66 " fi if [ "${arch}" == "x86_64" ] From 091ff7a79eea18e7af6dacbe6d29be18d56b2e79 Mon Sep 17 00:00:00 2001 From: betahxy Date: Fri, 22 Dec 2023 00:32:10 -0500 Subject: [PATCH 02/60] add vmxnet3 --- src/components/lib/dpdk/dpdk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/components/lib/dpdk/dpdk b/src/components/lib/dpdk/dpdk index 7eb776b2d1..3a2b0be02a 160000 --- a/src/components/lib/dpdk/dpdk +++ b/src/components/lib/dpdk/dpdk @@ -1 +1 @@ -Subproject commit 7eb776b2d1e5158c0d6d880d273e687026e27c95 +Subproject commit 3a2b0be02ac27f716c16accb0cdb2e8b30da0e21 From cd312b5729f00ad8a9f8ae818b73c64b9da00b12 Mon Sep 17 00:00:00 2001 From: betahxy Date: Wed, 6 Mar 2024 00:10:00 -0500 Subject: [PATCH 03/60] simple no-op NF --- composition_scripts/simple_vmm.toml | 2 +- .../implementation/capmgr/simple/capmgr.c | 2 +- .../implementation/nicmgr/dpdk/init.c | 34 +++- .../implementation/nicmgr/dpdk/nicmgr.c | 160 ++++++++++++++++++ .../no_interface/llbooter/llbooter.c | 2 +- .../sched/pfprr_quantum_static/main.c | 3 + .../simple_nf/simple_nf1/main.c | 121 ++++++++++--- .../implementation/simple_vmm/vmm/Makefile | 2 +- .../implementation/simple_vmm/vmm/cpuid.h | 3 + .../vmm/devices/vpci/virtio_net_io.c | 35 ++-- .../implementation/simple_vmm/vmm/netio.c | 123 +++++++++++++- .../simple_vmm/vmm/simple_vmm.c | 41 +++-- .../implementation/simple_vmm/vmm/vcpuid.c | 7 +- src/components/interface/netio/netio.h | 2 + src/components/interface/netio/stubs/stubs.S | 2 + src/components/interface/netshmem/netshmem.h | 22 ++- src/components/interface/nic/nic.h | 2 + src/components/interface/nic/stubs/stubs.S | 2 + src/components/lib/slm/quantum.c | 2 +- src/components/lib/vmrt/vmrt.c | 10 +- src/platform/x86_64/vmx/vmx.c | 2 +- tools/run.sh | 4 +- 22 files changed, 518 insertions(+), 65 deletions(-) diff --git a/composition_scripts/simple_vmm.toml b/composition_scripts/simple_vmm.toml index 359068b482..3d46031f7d 100644 --- a/composition_scripts/simple_vmm.toml +++ b/composition_scripts/simple_vmm.toml @@ -35,7 +35,7 @@ baseaddr = "0x6000000" [[components]] name = "vmm" img = "simple_vmm.vmm" -deps = [{srv = "sched", interface = "sched"}, {srv = "sched", interface = "init"},{srv = "capmgr", interface = "capmgr"}, {srv = "capmgr", interface = "memmgr"}, {srv = "capmgr", interface = "contigmem"}] +deps = [{srv = "sched", interface = "sched"}, {srv = "sched", interface = "init"},{srv = "capmgr", interface = "capmgr"}, {srv = "capmgr", interface = "memmgr"}, {srv = "capmgr", interface = "contigmem"}, {srv = "nicmgr", interface = "nic"}] implements = [{interface = "netio"}] constructor = "booter" baseaddr = "0x2000000" diff --git a/src/components/implementation/capmgr/simple/capmgr.c b/src/components/implementation/capmgr/simple/capmgr.c index 556c59fff3..cc836bb414 100644 --- a/src/components/implementation/capmgr/simple/capmgr.c +++ b/src/components/implementation/capmgr/simple/capmgr.c @@ -73,7 +73,7 @@ SS_STATIC_SLAB(asnd, struct cm_asnd, MAX_NUM_THREADS); /* 64 MiB */ #define MB2PAGES(mb) (round_up_to_page(mb * 1024 * 1024) / PAGE_SIZE) -#define MM_NPAGES (MB2PAGES(512)) +#define MM_NPAGES (MB2PAGES(1500)) SS_STATIC_SLAB(page, struct mm_page, MM_NPAGES); SS_STATIC_SLAB(span, struct mm_span, MM_NPAGES); diff --git a/src/components/implementation/nicmgr/dpdk/init.c b/src/components/implementation/nicmgr/dpdk/init.c index 04bbf37301..24c01e445d 100644 --- a/src/components/implementation/nicmgr/dpdk/init.c +++ b/src/components/implementation/nicmgr/dpdk/init.c @@ -199,9 +199,6 @@ process_rx_packets(cos_portid_t port_id, char** rx_pkts, uint16_t nb_pkts) sync_sem_give(&session->sem); } - /* yield for some cycles to improve CPU utility */ - sched_thd_block_timeout(0, 100000); - } static void @@ -264,7 +261,6 @@ cos_nic_start(){ #if ENABLE_DEBUG_INFO debug_dump_info(); #endif - // process_tx_packets(); // only port 0, queue 0 receive packets nb_pkts = cos_dev_port_rx_burst(0, 0, rx_packets, MAX_PKT_BURST); @@ -273,7 +269,11 @@ cos_nic_start(){ // if (nb_pkts!= 0) cos_dev_port_tx_burst(0, 0, rx_packets, nb_pkts); /* This is the real processing logic for applications */ - if (nb_pkts != 0) process_rx_packets(0, rx_packets, nb_pkts); + if (nb_pkts != 0) { + process_rx_packets(0, rx_packets, nb_pkts); + } else { + sched_thd_block_timeout(0, ps_tsc() + 2000*1); + } } } @@ -363,6 +363,7 @@ void cos_init(void) { printc("nicmgr init...\n"); +#if 1 cos_nic_init(); cos_hash_init(); #ifdef USE_CK_RING_FREE_MBUF @@ -372,15 +373,36 @@ cos_init(void) sync_lock_init(&tx_lock[i]); } +#endif printc("dpdk init end\n"); } +thdid_t recv_tid = 0; + +#define RECV_THD_PRIORITY 1 + +static void +recv_task(void) +{ + cos_nic_start(); +} + +void +cos_parallel_init(coreid_t cid, int init_core, int ncores) +{ + if(cid == 0) { + recv_tid = sched_thd_create((void *)recv_task, NULL); + printc("dpdk recv tid :%ld\n", recv_tid); + } +} + int parallel_main(coreid_t cid) { /* DPDK rx and tx will only run on core 0 */ if(cid == 0) { - cos_nic_start(); + sched_thd_param_set(recv_tid, sched_param_pack(SCHEDP_PRIO, RECV_THD_PRIORITY)); + sched_thd_block(0); } else { #if 0 #if E810_NIC == 0 diff --git a/src/components/implementation/nicmgr/dpdk/nicmgr.c b/src/components/implementation/nicmgr/dpdk/nicmgr.c index dd61056d54..a78d683e99 100644 --- a/src/components/implementation/nicmgr/dpdk/nicmgr.c +++ b/src/components/implementation/nicmgr/dpdk/nicmgr.c @@ -114,6 +114,67 @@ nic_get_a_packet(u16_t *pkt_len) return objid; } +shm_bm_objid_t +nic_get_a_packet_batch(u8_t batch_limit) +{ + thdid_t thd; + struct pkt_buf buf; + shm_bm_objid_t objid; + struct client_session *session; + struct netshmem_pkt_buf *obj; + shm_bm_objid_t first_objid; + struct netshmem_pkt_buf *first_obj; + struct netshmem_pkt_pri *first_obj_pri; + struct netshmem_meta_tuple *pkt_arr; + char *data_buf; + char *pkt; + int len; + u8_t batch_ct = 0; + + thd = cos_thdid(); + + session = &client_sessions[thd]; + + obj = first_obj = shm_bm_alloc_net_pkt_buf(session->shemem_info.shm, &objid); + assert(obj); + first_objid = objid; + first_obj_pri = netshmem_get_pri(obj); + pkt_arr = (struct netshmem_meta_tuple *)&first_obj_pri->pkt_arr; + first_obj_pri->batch_len = 0; + + sync_sem_take(&session->sem); + + assert(!pkt_ring_buf_empty(&session->pkt_ring_buf)); + + while (batch_ct < batch_limit && pkt_ring_buf_dequeue(&session->pkt_ring_buf, &buf)) { + assert(buf.pkt); + if (likely(batch_ct > 0)) { + obj = shm_bm_alloc_net_pkt_buf(session->shemem_info.shm, &objid); + sync_sem_take(&session->sem); + assert(obj); + } + + pkt = cos_get_packet(buf.pkt, &len); + assert(len < netshmem_get_max_data_buf_sz()); + + data_buf = netshmem_get_data_buf(obj); + memcpy(data_buf, pkt, len); + pkt_arr[batch_ct].obj_id = objid; + pkt_arr[batch_ct].pkt_len = len; + batch_ct++; + +#if USE_CK_RING_FREE_MBUF + while (!pkt_ring_buf_enqueue(&g_free_ring, &buf)); +#else + cos_free_packet(buf.pkt); +#endif + } + + first_obj_pri->batch_len = batch_ct; + + return first_objid; +} + static void ext_buf_free_callback_fn(void *addr, void *opaque) { @@ -179,6 +240,105 @@ nic_send_packet(shm_bm_objid_t pktid, u16_t pkt_offset, u16_t pkt_len) return 0; } +void pkt_hex_dump(void *_data, u16_t len) +{ + int rowsize = 16; + int i, l, linelen, remaining; + int li = 0; + u8_t *data, ch; + + data = _data; + + printc("Packet hex dump, len:%d\n", len); + remaining = len; + for (i = 0; i < len; i += rowsize) { + printc("%06d\t", li); + + linelen = remaining < rowsize ? remaining : rowsize; + remaining -= rowsize; + + for (l = 0; l < linelen; l++) { + ch = data[l]; + printc( "%02X ", (u32_t) ch); + } + + data += linelen; + li += 10; + + printc( "dump done\n"); + } +} + +int +nic_send_packet_batch(shm_bm_objid_t pktid) +{ + thdid_t thd; + shm_bm_objid_t objid; + struct pkt_buf buf; + struct netshmem_pkt_buf *obj; + shm_bm_objid_t first_objid; + struct netshmem_pkt_buf *first_obj; + struct netshmem_pkt_pri *first_obj_pri; + struct netshmem_meta_tuple *pkt_arr; + u16_t pkt_len; + u8_t batch_tc = 0; + shm_bm_t shm; + u64_t paddr, data_paddr; + + thd = cos_thdid(); + objid = pktid; + + paddr = client_sessions[thd].shemem_info.paddr; + shm = client_sessions[thd].shemem_info.shm; + + obj = first_obj = shm_bm_transfer_net_pkt_buf(shm, objid); + + first_obj_pri = netshmem_get_pri(first_obj); + pkt_arr = (struct netshmem_meta_tuple *)&(first_obj_pri->pkt_arr); + batch_tc = first_obj_pri->batch_len; + + pkt_len = pkt_arr[0].pkt_len; + + data_paddr = paddr + (u64_t)obj - (u64_t)shm; + + char *mbuf; + void *ext_shinfo; + char *tx_packets[256]; + + coreid_t core_id = cos_cpuid(); +#if E810_NIC == 0 + core_id = 1; +#endif + + mbuf = cos_allocate_mbuf(g_tx_mp[core_id - 1]); + assert(mbuf); + ext_shinfo = netshmem_get_tailroom((struct netshmem_pkt_buf *)obj); + cos_attach_external_mbuf(mbuf, obj, data_paddr, PKT_BUF_SIZE, ext_buf_free_callback_fn, ext_shinfo); + cos_set_external_packet(mbuf, netshmem_get_data_offset(), pkt_len, 1); + tx_packets[0] = mbuf; + // pkt_hex_dump(netshmem_get_data_buf(obj), pkt_len); + + for (u8_t i = 1; i < batch_tc; i++) { + pkt_len = pkt_arr[i].pkt_len; + pktid = pkt_arr[i].obj_id; + obj = shm_bm_transfer_net_pkt_buf(shm, pktid); + data_paddr = paddr + (u64_t)obj - (u64_t)shm; + + mbuf = cos_allocate_mbuf(g_tx_mp[core_id - 1]); + assert(mbuf); + ext_shinfo = netshmem_get_tailroom((struct netshmem_pkt_buf *)obj); + cos_attach_external_mbuf(mbuf, obj, data_paddr, PKT_BUF_SIZE, ext_buf_free_callback_fn, ext_shinfo); + cos_set_external_packet(mbuf, netshmem_get_data_offset(), pkt_len, 0); + tx_packets[i] = mbuf; + } + + // sync_lock_take(&tx_lock[core_id - 1]); + cos_dev_port_tx_burst(0, core_id - 1, tx_packets, batch_tc); + // sync_lock_release(&tx_lock[core_id - 1]); + + return 0; +} + void nic_shmem_map(cbuf_t shm_id) { diff --git a/src/components/implementation/no_interface/llbooter/llbooter.c b/src/components/implementation/no_interface/llbooter/llbooter.c index 06eda077ee..828f1476ce 100644 --- a/src/components/implementation/no_interface/llbooter/llbooter.c +++ b/src/components/implementation/no_interface/llbooter/llbooter.c @@ -32,7 +32,7 @@ #define INITARGS_MAX_PATHNAME 512 #endif #ifndef BOOTER_CAPMGR_MB -#define BOOTER_CAPMGR_MB 512 +#define BOOTER_CAPMGR_MB 2000 #endif #ifndef BOOTER_MAX_CHKPT #define BOOTER_MAX_CHKPT 64 diff --git a/src/components/implementation/sched/pfprr_quantum_static/main.c b/src/components/implementation/sched/pfprr_quantum_static/main.c index a6ffabf74a..d14e6e4181 100644 --- a/src/components/implementation/sched/pfprr_quantum_static/main.c +++ b/src/components/implementation/sched/pfprr_quantum_static/main.c @@ -587,6 +587,9 @@ slm_ipi_process(void *d) struct slm_thd *current = slm_thd_current(); struct slm_thd *thd; + /* block the IPI thd for test purpose */ + sched_thd_block(0); + while (1) { cos_rcv(r->rcv, RCV_ALL_PENDING, &rcvd); diff --git a/src/components/implementation/simple_nf/simple_nf1/main.c b/src/components/implementation/simple_nf/simple_nf1/main.c index b38d10ec82..fe39b009a7 100644 --- a/src/components/implementation/simple_nf/simple_nf1/main.c +++ b/src/components/implementation/simple_nf/simple_nf1/main.c @@ -7,10 +7,17 @@ #include #include -#define TX_PRIORITY 30 +#define NF_THD_PRIORITY 31 + thdid_t rx_tid = 0; thdid_t tx_tid = 0; +char tx_nf_buffer[4096]; +char rx_nf_buffer[4096]; + +#define RX_BATCH 1 +#define TX_BATCH 1 + static void tx_task(void) { @@ -20,44 +27,120 @@ tx_task(void) netio_shmem_map(netshmem_get_shm_id()); nic_shmem_map(netshmem_get_shm_id()); + shm_bm_objid_t first_objid; + struct netshmem_pkt_buf *first_obj; + struct netshmem_pkt_pri *first_obj_pri; + struct netshmem_meta_tuple *pkt_arr; + u8_t tx_batch_ct = 0; + struct netshmem_pkt_buf *tx_obj; + nic_bind_port(0, 1); + + shm_bm_t tx_shmemd = 0; + tx_shmemd = netshmem_get_shm(); + while(1) { +#if !TX_BATCH objid = netio_get_a_packet(&pkt_len); nic_send_packet(objid, 0, pkt_len); - } -} -void -cos_init(void) -{ - shm_bm_objid_t objid; - struct netshmem_pkt_buf *obj; +#else + u8_t batch_ct = 50; - /* create current component's shmem */ - rx_tid = cos_thdid(); - netshmem_create(rx_tid); - tx_tid = sched_thd_create((void *)tx_task, NULL); - netshmem_create(tx_tid); + first_objid = objid = netio_get_a_packet_batch(batch_ct); + first_obj = shm_bm_transfer_net_pkt_buf(tx_shmemd, objid); + first_obj_pri = netshmem_get_pri(first_obj); + pkt_arr = (struct netshmem_meta_tuple *)&(first_obj_pri->pkt_arr); + tx_batch_ct = first_obj_pri->batch_len; - printc("NF application init shm done\n"); + for (u8_t i = 0; i < tx_batch_ct; i++) { + pkt_len = pkt_arr[i].pkt_len; + objid = pkt_arr[i].obj_id; + tx_obj = shm_bm_transfer_net_pkt_buf(tx_shmemd, objid); + memcpy(tx_nf_buffer, netshmem_get_data_buf(tx_obj), pkt_len); + } + nic_send_packet_batch(first_objid); +#endif + } } -int -parallel_main(coreid_t cid) +static void +rx_task(void) { /* TODO: port NF applications here */ shm_bm_objid_t objid; + struct netshmem_pkt_buf *rx_obj; + shm_bm_objid_t first_objid; + struct netshmem_pkt_buf *first_obj; + struct netshmem_pkt_pri *first_obj_pri; + struct netshmem_meta_tuple *pkt_arr; u16_t pkt_len; - sched_thd_param_set(tx_tid, sched_param_pack(SCHEDP_PRIO, TX_PRIORITY)); + u8_t batch_ct = 50; netio_shmem_map(netshmem_get_shm_id()); nic_shmem_map(netshmem_get_shm_id()); nic_bind_port(0, 0); - while (1) + int i = 0; + u64_t times = 0; + u64_t overhead = 0; + + shm_bm_t rx_shmemd = 0; + + rx_shmemd = netshmem_get_shm(); + while(1) { + u8_t rx_batch_ct = 0; +#if !RX_BATCH objid = nic_get_a_packet(&pkt_len); netio_send_packet(objid, pkt_len); - } +#else + first_objid = nic_get_a_packet_batch(batch_ct); + + first_obj = shm_bm_transfer_net_pkt_buf(rx_shmemd, first_objid); + first_obj_pri = netshmem_get_pri(first_obj); + pkt_arr = (struct netshmem_meta_tuple *)&(first_obj_pri->pkt_arr); + rx_batch_ct = first_obj_pri->batch_len; + + for (u8_t i = 0; i < rx_batch_ct; i++) { + pkt_len = pkt_arr[i].pkt_len; + objid = pkt_arr[i].obj_id; + rx_obj = shm_bm_transfer_net_pkt_buf(rx_shmemd, objid); + memcpy(rx_nf_buffer, netshmem_get_data_buf(rx_obj), pkt_len); + } + + netio_send_packet_batch(first_objid); +#endif + } +} + +void +cos_init(void) +{ +} + + +void +cos_parallel_init(coreid_t cid, int init_core, int ncores) +{ + if (cid == 0) { + rx_tid = sched_thd_create((void *)rx_task, NULL); + netshmem_create(rx_tid); + tx_tid = sched_thd_create((void *)tx_task, NULL); + netshmem_create(tx_tid); + printc("NF rx tid:%ld, tx tid:%ld\n", rx_tid, tx_tid); + } +} + +int +parallel_main(coreid_t cid) +{ + if (cid == 0) { + sched_thd_param_set(rx_tid, sched_param_pack(SCHEDP_PRIO, NF_THD_PRIORITY)); + sched_thd_param_set(tx_tid, sched_param_pack(SCHEDP_PRIO, NF_THD_PRIORITY)); + } + + sched_thd_block(0); + return 0; } diff --git a/src/components/implementation/simple_vmm/vmm/Makefile b/src/components/implementation/simple_vmm/vmm/Makefile index 19294b8eae..4551711ca7 100644 --- a/src/components/implementation/simple_vmm/vmm/Makefile +++ b/src/components/implementation/simple_vmm/vmm/Makefile @@ -6,7 +6,7 @@ INTERFACE_EXPORTS = netio # The interfaces this component is dependent on for compilation (this # is a list of directory names in interface/) -INTERFACE_DEPENDENCIES = contigmem netshmem +INTERFACE_DEPENDENCIES = contigmem netshmem nic # The library dependencies this component is reliant on for # compilation/linking (this is a list of directory names in lib/) LIBRARY_DEPENDENCIES = ubench component kernel initargs vmrt shm_bm diff --git a/src/components/implementation/simple_vmm/vmm/cpuid.h b/src/components/implementation/simple_vmm/vmm/cpuid.h index e178e3305a..cd6bfa93ad 100644 --- a/src/components/implementation/simple_vmm/vmm/cpuid.h +++ b/src/components/implementation/simple_vmm/vmm/cpuid.h @@ -74,6 +74,9 @@ #define CPUID_EDX_TM1 (1U<<29U) #define CPUID_EDX_IA64 (1U<<30U) #define CPUID_EDX_PBE (1U<<31U) + +/* CPUID.06H:EAX.DTHERM */ +#define CPUID_EAX_DTHERM (1U<<0U) /* CPUID.06H:EAX.HWP */ #define CPUID_EAX_HWP (1U<<7U) /* CPUID.06H:EAX.HWP_Notification */ diff --git a/src/components/implementation/simple_vmm/vmm/devices/vpci/virtio_net_io.c b/src/components/implementation/simple_vmm/vmm/devices/vpci/virtio_net_io.c index 6c063a21c9..68f42b16bf 100644 --- a/src/components/implementation/simple_vmm/vmm/devices/vpci/virtio_net_io.c +++ b/src/components/implementation/simple_vmm/vmm/devices/vpci/virtio_net_io.c @@ -322,16 +322,16 @@ virtio_net_rcv_one_pkt(void *data, int pkt_len) n = vq_getchain(vcpu, vq, &idx, iov, VIRTIO_NET_MAXSEGS, NULL); - if (unlikely (n < 1 || n >= VIRTIO_NET_MAXSEGS )) { - printc("vtnet: virtio_net_tap_rx: vq_getchain = %d\n", n); - assert(0); - } + // if (unlikely (n < 1 || n >= VIRTIO_NET_MAXSEGS )) { + // printc("vtnet: virtio_net_tap_rx: vq_getchain = %d\n", n); + // assert(0); + // } vrx = iov[0].iov_base; /* every packet needs to be proceeded by a virtio_net_rxhdr header space */ riov = rx_iov_trim(iov, &n, sizeof(struct virtio_net_rxhdr)); - assert(iov[0].iov_len >= (size_t)pkt_len); + // assert(iov[0].iov_len >= (size_t)pkt_len); memcpy(iov[0].iov_base, data, pkt_len); @@ -354,7 +354,9 @@ virtio_net_send_one_pkt(void *data, u16_t *pkt_len) u16_t idx; while (!vq_has_descs(vq)) { - sched_thd_block(0); + *pkt_len = 0; + return; + // sched_thd_block(0); } vcpu = vq->vcpu; @@ -398,6 +400,14 @@ virtio_net_outb(u32_t port_id, struct vmrt_vm_vcpu *vcpu) return; } +#define REAL_NIC 0 + +#if REAL_NIC +static u8_t virtio_net_mac[6] = {0x6c, 0xfe, 0x54, 0x40, 0x41, 0x01}; +#else +static u8_t virtio_net_mac[6] = {0x10, 0x10, 0x10, 0x10, 0x10, 0x11}; +#endif + static void virtio_net_inb(u32_t port_id, struct vmrt_vm_vcpu *vcpu) { @@ -420,22 +430,22 @@ virtio_net_inb(u32_t port_id, struct vmrt_vm_vcpu *vcpu) break; /* TODO: read mac address from virtio-net config space */ case VIRTIO_NET_MAC: - vcpu->shared_region->ax = 0x10; + vcpu->shared_region->ax = virtio_net_mac[0]; break; case VIRTIO_NET_MAC1: - vcpu->shared_region->ax = 0x10; + vcpu->shared_region->ax = virtio_net_mac[1]; break; case VIRTIO_NET_MAC2: - vcpu->shared_region->ax = 0x10; + vcpu->shared_region->ax = virtio_net_mac[2]; break; case VIRTIO_NET_MAC3: - vcpu->shared_region->ax = 0x10; + vcpu->shared_region->ax = virtio_net_mac[3]; break; case VIRTIO_NET_MAC4: - vcpu->shared_region->ax = 0x10; + vcpu->shared_region->ax = virtio_net_mac[4]; break; case VIRTIO_NET_MAC5: - vcpu->shared_region->ax = 0x11; + vcpu->shared_region->ax = virtio_net_mac[5]; break; default: VM_PANIC(vcpu); @@ -476,7 +486,6 @@ virtio_net_outw(u32_t port_id, struct vmrt_vm_vcpu *vcpu) break; case VIRTIO_NET_QUEUE_NOTIFY: if (val == VIRTIO_NET_TXQ) { - sched_thd_wakeup(12); } virtio_net_regs.header.queue_notify = val; break; diff --git a/src/components/implementation/simple_vmm/vmm/netio.c b/src/components/implementation/simple_vmm/vmm/netio.c index 89a274cf1e..85c189723a 100644 --- a/src/components/implementation/simple_vmm/vmm/netio.c +++ b/src/components/implementation/simple_vmm/vmm/netio.c @@ -1,6 +1,7 @@ #include #include #include +#include #include @@ -10,16 +11,96 @@ netio_get_a_packet(u16_t *pkt_len) struct netshmem_pkt_buf *tx_obj; shm_bm_t tx_shmemd = 0; shm_bm_objid_t tx_pktid; + u16_t _pkt_len = 0; tx_shmemd = netshmem_get_shm(); tx_obj = shm_bm_alloc_net_pkt_buf(tx_shmemd, &tx_pktid); assert(tx_obj); - virtio_net_send_one_pkt(tx_obj->data, pkt_len); + virtio_net_send_one_pkt(tx_obj->data, &_pkt_len); + *pkt_len = _pkt_len; return tx_pktid; } +void pkt_hex_dump(void *_data, u16_t len) +{ + int rowsize = 16; + int i, l, linelen, remaining; + int li = 0; + u8_t *data, ch; + + data = _data; + + printc("Packet hex dump, len:%d\n", len); + remaining = len; + for (i = 0; i < len; i += rowsize) { + printc("%06d\t", li); + + linelen = remaining < rowsize ? remaining : rowsize; + remaining -= rowsize; + + for (l = 0; l < linelen; l++) { + ch = data[l]; + printc( "%02X ", (u32_t) ch); + } + + data += linelen; + li += 10; + + printc( "dump done\n"); + } +} + +shm_bm_objid_t +netio_get_a_packet_batch(u8_t batch_limit) +{ + struct netshmem_pkt_buf *tx_obj; + shm_bm_t tx_shmemd = 0; + shm_bm_objid_t tx_pktid; + u16_t _pkt_len = 0; + shm_bm_objid_t first_objid; + struct netshmem_pkt_buf *first_obj; + struct netshmem_pkt_pri *first_obj_pri; + struct netshmem_meta_tuple *pkt_arr; + u8_t batch_ct = 0; + + tx_shmemd = netshmem_get_shm(); + tx_obj = first_obj = shm_bm_alloc_net_pkt_buf(tx_shmemd, &tx_pktid); + assert(tx_obj); + first_objid = tx_pktid; + first_obj_pri = netshmem_get_pri(tx_obj); + pkt_arr = (struct netshmem_meta_tuple *)&first_obj_pri->pkt_arr; + first_obj_pri->batch_len = 0; + + while (batch_ct < batch_limit) { + assert(tx_obj); + if (likely(batch_ct > 0)) { + tx_obj = shm_bm_alloc_net_pkt_buf(tx_shmemd, &tx_pktid); + assert(tx_obj); + } + + virtio_net_send_one_pkt(netshmem_get_data_buf(tx_obj), &_pkt_len); + + // pkt_hex_dump(netshmem_get_data_buf(tx_obj), _pkt_len); + if (likely(_pkt_len != 0)) { + pkt_arr[batch_ct].obj_id = tx_pktid; + pkt_arr[batch_ct].pkt_len = _pkt_len; + batch_ct++; + } else { + if (batch_ct == 0) { + extern int sched_thd_block(thdid_t dep_id); + sched_thd_block_timeout(0, ps_tsc() + 2000*1); + } else { + shm_bm_free_net_pkt_buf(tx_obj); + break; + } + } + } + first_obj_pri->batch_len = batch_ct; + return first_objid; +} + int netio_send_packet(shm_bm_objid_t pktid, u16_t pkt_len) { @@ -35,6 +116,46 @@ netio_send_packet(shm_bm_objid_t pktid, u16_t pkt_len) return 0; } +extern int rx_intr; +int +netio_send_packet_batch(shm_bm_objid_t pktid) +{ + struct netshmem_pkt_buf *rx_obj; + shm_bm_objid_t first_objid; + struct netshmem_pkt_buf *first_obj; + struct netshmem_pkt_pri *first_obj_pri; + struct netshmem_meta_tuple *pkt_arr; + u16_t pkt_len; + u8_t batch_tc = 0; + shm_bm_t rx_shmemd = 0; + + rx_shmemd = netshmem_get_shm(); + first_objid = pktid; + + + first_obj = shm_bm_transfer_net_pkt_buf(rx_shmemd, first_objid); + + first_obj_pri = netshmem_get_pri(first_obj); + pkt_arr = (struct netshmem_meta_tuple *)&(first_obj_pri->pkt_arr); + batch_tc = first_obj_pri->batch_len; + + pkt_len = pkt_arr[0].pkt_len; + // pkt_hex_dump(netshmem_get_data_buf(first_obj), pkt_len); + virtio_net_rcv_one_pkt(netshmem_get_data_buf(first_obj), pkt_len); + + for (u8_t i = 1; i < batch_tc; i++) { + pkt_len = pkt_arr[i].pkt_len; + pktid = pkt_arr[i].obj_id; + rx_obj = shm_bm_transfer_net_pkt_buf(rx_shmemd, pktid); + virtio_net_rcv_one_pkt(netshmem_get_data_buf(rx_obj), pkt_len); + shm_bm_free_net_pkt_buf(rx_obj); + } + + shm_bm_free_net_pkt_buf(first_obj); + + return 0; +} + void netio_shmem_map(cbuf_t shm_id) { diff --git a/src/components/implementation/simple_vmm/vmm/simple_vmm.c b/src/components/implementation/simple_vmm/vmm/simple_vmm.c index 716d7a0c80..bdd17c2df3 100644 --- a/src/components/implementation/simple_vmm/vmm/simple_vmm.c +++ b/src/components/implementation/simple_vmm/vmm/simple_vmm.c @@ -24,7 +24,7 @@ INCBIN(bios, "guest/guest.img") static struct vmrt_vm_comp *g_vm; #define VM_MAX_COMPS (2) -#define GUEST_MEM_SZ (64*1024*1024) +#define GUEST_MEM_SZ (320*1024*1024) SS_STATIC_SLAB(vm_comp, struct vmrt_vm_comp, VM_MAX_COMPS); SS_STATIC_SLAB(vm_lapic, struct acrn_vlapic, VM_MAX_COMPS * VMRT_VM_MAX_VCPU); @@ -32,6 +32,13 @@ SS_STATIC_SLAB(vcpu_inst_ctxt, struct instr_emul_ctxt, VM_MAX_COMPS * VMRT_VM_MA SS_STATIC_SLAB(vm_io_apic, struct acrn_vioapics, VM_MAX_COMPS); SS_STATIC_SLAB(vcpu_mmio_req, struct acrn_mmio_request, VM_MAX_COMPS * VMRT_VM_MAX_VCPU); +void +pause_handler(struct vmrt_vm_vcpu *vcpu) +{ + sched_thd_block_timeout(0, ps_tsc() + 2000*1); + GOTO_NEXT_INST(vcpu->shared_region); +} + void mmio_init(struct vmrt_vm_vcpu *vcpu) { @@ -84,7 +91,7 @@ struct vmrt_vm_comp * vm_comp_create(void) { u64_t guest_mem_sz = GUEST_MEM_SZ; - u64_t num_vcpu = NUM_CPU; + u64_t num_vcpu = 1; void *start; void *end; cbuf_t shm_id; @@ -97,7 +104,7 @@ vm_comp_create(void) vmrt_vm_create(vm, "vmlinux-5.15", num_vcpu, guest_mem_sz); /* Allocate memory for the VM */ - shm_id = contigmem_shared_alloc_aligned(guest_mem_sz / PAGE_SIZE_4K, PAGE_SIZE_4K, (vaddr_t *)&mem); + shm_id = memmgr_shared_page_allocn_aligned(guest_mem_sz / PAGE_SIZE_4K, PAGE_SIZE_4K, (vaddr_t *)&mem); /* Make the memory accessible to VM */ memmgr_shared_page_map_aligned_in_vm(shm_id, PAGE_SIZE_4K, (vaddr_t *)&vm_mem, vm->comp_id); vmrt_vm_mem_init(vm, mem); @@ -130,19 +137,25 @@ vm_comp_create(void) void cos_init(void) { - g_vm = vm_comp_create(); } void cos_parallel_init(coreid_t cid, int init_core, int ncores) { struct vmrt_vm_vcpu *vcpu; - vmrt_vm_vcpu_init(g_vm, cid); - vcpu = vmrt_get_vcpu(g_vm, cid); - lapic_init(vcpu); - iinst_ctxt_init(vcpu); - mmio_init(vcpu); + if (cid != 0 || NUM_CPU == 1) + { + cid = 0; + g_vm = vm_comp_create(); + vmrt_vm_vcpu_init(g_vm, cid); + vcpu = vmrt_get_vcpu(g_vm, cid); + + lapic_init(vcpu); + iinst_ctxt_init(vcpu); + mmio_init(vcpu); + } + return; } @@ -150,14 +163,18 @@ void parallel_main(coreid_t cid) { struct vmrt_vm_vcpu *vcpu; - vcpu = vmrt_get_vcpu(g_vm, cid); - - vmrt_vm_vcpu_start(vcpu); + if (cid != 0 || NUM_CPU == 1) { + cid = 0; + vcpu = vmrt_get_vcpu(g_vm, cid); + vmrt_vm_vcpu_start(vcpu); + } while (1) { sched_thd_block(0); /* Should not be here, or there is a bug in the scheduler! */ assert(0); } + + } diff --git a/src/components/implementation/simple_vmm/vmm/vcpuid.c b/src/components/implementation/simple_vmm/vmm/vcpuid.c index 54b8124000..0335ccb596 100644 --- a/src/components/implementation/simple_vmm/vmm/vcpuid.c +++ b/src/components/implementation/simple_vmm/vmm/vcpuid.c @@ -87,7 +87,7 @@ static void init_vcpuid_entry(uint32_t leaf, uint32_t subleaf, case 0x06U: cpuid_subleaf(leaf, subleaf, &entry->eax, &entry->ebx, &entry->ecx, &entry->edx); - entry->eax &= ~(CPUID_EAX_HWP | CPUID_EAX_HWP_N | CPUID_EAX_HWP_AW | CPUID_EAX_HWP_EPP | CPUID_EAX_HWP_PLR); + entry->eax &= ~(CPUID_EAX_DTHERM | CPUID_EAX_HWP | CPUID_EAX_HWP_N | CPUID_EAX_HWP_AW | CPUID_EAX_HWP_EPP | CPUID_EAX_HWP_PLR); entry->ecx &= ~CPUID_ECX_HCFC; break; @@ -545,7 +545,7 @@ static void guest_cpuid_01h(struct vmrt_vm_vcpu *vcpu, uint32_t *eax, uint32_t * /* * Hide MONITOR/MWAIT. */ - *ecx &= ~CPUID_ECX_MONITOR; + // *ecx &= ~CPUID_ECX_MONITOR; /* Warning: should we support CPUID_ECX_OSXSAVE in VM? Let's begin with not setting it first */ *ecx &= ~CPUID_ECX_OSXSAVE; @@ -558,6 +558,9 @@ static void guest_cpuid_01h(struct vmrt_vm_vcpu *vcpu, uint32_t *eax, uint32_t * } } + /* disable thermal ctrl*/ + *edx &= ~CPUID_EDX_TM1; + *edx &= ~CPUID_EDX_VME; *edx &= ~CPUID_EDX_DE; diff --git a/src/components/interface/netio/netio.h b/src/components/interface/netio/netio.h index c49214a011..59913e62ec 100644 --- a/src/components/interface/netio/netio.h +++ b/src/components/interface/netio/netio.h @@ -8,6 +8,8 @@ shm_bm_objid_t netio_get_a_packet(u16_t *pkt_len); int netio_send_packet(shm_bm_objid_t pktid, u16_t pkt_len); +int netio_send_packet_batch(shm_bm_objid_t pktid); +shm_bm_objid_t netio_get_a_packet_batch(u8_t batch_limit); void netio_shmem_map(cbuf_t shm_id); #endif diff --git a/src/components/interface/netio/stubs/stubs.S b/src/components/interface/netio/stubs/stubs.S index d40a9d9128..3cf49d7982 100644 --- a/src/components/interface/netio/stubs/stubs.S +++ b/src/components/interface/netio/stubs/stubs.S @@ -2,4 +2,6 @@ cos_asm_stub_indirect(netio_get_a_packet) cos_asm_stub(netio_send_packet) +cos_asm_stub(netio_send_packet_batch) +cos_asm_stub(netio_get_a_packet_batch) cos_asm_stub(netio_shmem_map) diff --git a/src/components/interface/netshmem/netshmem.h b/src/components/interface/netshmem/netshmem.h index f908d3dbb9..621d103564 100644 --- a/src/components/interface/netshmem/netshmem.h +++ b/src/components/interface/netshmem/netshmem.h @@ -26,10 +26,23 @@ struct netshmem { * This is the offset size of netshmem_pkt_buf.data for application to write data. * HEADROOM is used for lwip to set ether & ip & tcp/udp headers */ -#define NETSHMEM_HEADROOM 128 +#define NETSHMEM_HEADROOM 256 /* This tailroom is the last few bytes in the shmem, used to store user specific data */ -#define NETSHMEM_TAILROOM 128 +#define NETSHMEM_TAILROOM 64 +#define NETSHMEM_MAX_BATCH_LEN 60 + +struct netshmem_meta_tuple +{ + u16_t pkt_len; + u16_t obj_id; +}; + + +struct netshmem_pkt_pri { + u16_t batch_len; + struct netshmem_meta_tuple pkt_arr[NETSHMEM_MAX_BATCH_LEN]; +}; struct netshmem_pkt_buf { char data[PKT_BUF_SIZE]; @@ -53,6 +66,11 @@ void netshemem_move(thdid_t old, thdid_t new); /* map a shmem for a client component */ void netshmem_map_shmem(cbuf_t shm_id); +static inline struct netshmem_pkt_pri *netshmem_get_pri(struct netshmem_pkt_buf *pkt_buf) +{ + return (struct netshmem_pkt_pri *)pkt_buf; +} + static inline void * netshmem_get_data_buf(struct netshmem_pkt_buf *pkt_buf) { return (char *)pkt_buf + NETSHMEM_HEADROOM; diff --git a/src/components/interface/nic/nic.h b/src/components/interface/nic/nic.h index 4ac39f6a55..5624be31fc 100644 --- a/src/components/interface/nic/nic.h +++ b/src/components/interface/nic/nic.h @@ -9,6 +9,7 @@ void nic_shmem_map(cbuf_t shm_id); int nic_send_packet(shm_bm_objid_t pktid, u16_t pkt_offset, u16_t pkt_len); +int nic_send_packet_batch(shm_bm_objid_t pktid); int nic_bind_port(u32_t ip_addr, u16_t port); u64_t nic_get_port_mac_address(u16_t port); @@ -18,4 +19,5 @@ u64_t nic_get_port_mac_address(u16_t port); * and return its shmem objectid. */ shm_bm_objid_t nic_get_a_packet(u16_t *pkt_len); +shm_bm_objid_t nic_get_a_packet_batch(u8_t batch_limit); #endif /* NIC_H */ diff --git a/src/components/interface/nic/stubs/stubs.S b/src/components/interface/nic/stubs/stubs.S index 04fab85efb..c0a895aebe 100644 --- a/src/components/interface/nic/stubs/stubs.S +++ b/src/components/interface/nic/stubs/stubs.S @@ -1,6 +1,8 @@ #include cos_asm_stub(nic_send_packet) +cos_asm_stub(nic_send_packet_batch) +cos_asm_stub(nic_get_a_packet_batch) cos_asm_stub(nic_bind_port) cos_asm_stub_indirect(nic_get_a_packet) cos_asm_stub(nic_shmem_map) diff --git a/src/components/lib/slm/quantum.c b/src/components/lib/slm/quantum.c index 3c05c94588..a77f47ade1 100644 --- a/src/components/lib/slm/quantum.c +++ b/src/components/lib/slm/quantum.c @@ -164,7 +164,7 @@ slm_policy_timer_init(microsec_t period) int slm_timer_quantum_init(void) { - slm_policy_timer_init(50); + slm_policy_timer_init(160); return 0; } diff --git a/src/components/lib/vmrt/vmrt.c b/src/components/lib/vmrt/vmrt.c index 053ebdc2a8..3329e09238 100644 --- a/src/components/lib/vmrt/vmrt.c +++ b/src/components/lib/vmrt/vmrt.c @@ -281,6 +281,12 @@ cpuid_handler(struct vmrt_vm_vcpu *vcpu) VM_PANIC(vcpu); } +CWEAKSYMB void +pause_handler(struct vmrt_vm_vcpu *vcpu) +{ + VM_PANIC(vcpu); +} + CWEAKSYMB void ctrl_register_access_handler(struct vmrt_vm_vcpu *vcpu) @@ -431,7 +437,7 @@ vmrt_handle_reason(struct vmrt_vm_vcpu *vcpu, u64_t reason) break; case VM_EXIT_REASON_PAUSE: /* TODO: handle pause exception */ - GOTO_NEXT_INST(vcpu->shared_region); + pause_handler(vcpu); break; case VM_EXIT_REASON_EPT_VIOLATION: ept_violation_handler(vcpu); @@ -462,7 +468,7 @@ void vmrt_vm_vcpu_start(struct vmrt_vm_vcpu *vcpu) { /* This is actually just to "push" the vcpu handler thread into run queue. */ - sched_thd_param_set(vcpu->handler_tid, sched_param_pack(SCHEDP_PRIO, 30)); + sched_thd_param_set(vcpu->handler_tid, sched_param_pack(SCHEDP_PRIO, 31)); } void diff --git a/src/platform/x86_64/vmx/vmx.c b/src/platform/x86_64/vmx/vmx.c index 9139fb1bc1..09c680fd4d 100644 --- a/src/platform/x86_64/vmx/vmx.c +++ b/src/platform/x86_64/vmx/vmx.c @@ -118,7 +118,7 @@ vmx_guest_state_init(struct thread *thd) #define DATA_ACCESS_RIGHT (0x3 | 1 << 4 | 1 << 7) #define CODE_ACCESS_RIGHT (0x3 | 1 << 4 | 1 << 7 | 1 << 13) #define LDTR_ACCESS_RIGHT (0x2 | 1 << 7) - #define TR_ACCESS_RIGHT (0x3 | 1 << 7) + #define TR_ACCESS_RIGHT (0xB | 1 << 7) vmwrite(GUEST_CS_ACCESS_RIGHTS, CODE_ACCESS_RIGHT); vmwrite(GUEST_DS_ACCESS_RIGHTS, DATA_ACCESS_RIGHT); vmwrite(GUEST_ES_ACCESS_RIGHTS, DATA_ACCESS_RIGHT); diff --git a/tools/run.sh b/tools/run.sh index af9dd98e2d..82aa50840c 100755 --- a/tools/run.sh +++ b/tools/run.sh @@ -42,12 +42,12 @@ then debug_flag="-S" if [ "${nic_flag}" == "enable-nic" ] then - nic_flag=" -netdev type=tap,id=net0,ifname=tap0,script=no,downscript=no -device vmxnet3,netdev=net0,mac=66:66:66:66:66:66 " + nic_flag=" -netdev type=tap,id=net0,vhost=on,ifname=tap0,script=no,downscript=no -device vmxnet3,netdev=net0,mac=66:66:66:66:66:66 " fi elif [ "${debug_flag}" == "enable-nic" ] then debug_flag="" - nic_flag=" -netdev type=tap,id=net0,ifname=tap0,script=no,downscript=no -device vmxnet3,netdev=net0,mac=66:66:66:66:66:66 " + nic_flag=" -netdev type=tap,id=net0,vhost=on,ifname=tap0,script=no,downscript=no -device vmxnet3,netdev=net0,mac=66:66:66:66:66:66 " fi if [ "${arch}" == "x86_64" ] From f6b0d280686a3b9891861d7e88ac31f999ca7562 Mon Sep 17 00:00:00 2001 From: betahxy Date: Wed, 6 Mar 2024 05:59:00 -0500 Subject: [PATCH 04/60] simple vmm without NF interposition --- composition_scripts/vmm_no_nf.toml | 41 ++++++ .../simple_nf/simple_nf1/main.c | 9 +- .../implementation/simple_vmm/vmm/Makefile | 2 +- .../implementation/simple_vmm/vmm/netio.c | 3 +- .../simple_vmm/vmm/simple_vmm.c | 137 ++++++++++++++++++ 5 files changed, 188 insertions(+), 4 deletions(-) create mode 100644 composition_scripts/vmm_no_nf.toml diff --git a/composition_scripts/vmm_no_nf.toml b/composition_scripts/vmm_no_nf.toml new file mode 100644 index 0000000000..5554aaa005 --- /dev/null +++ b/composition_scripts/vmm_no_nf.toml @@ -0,0 +1,41 @@ +[system] +description = "Simple VMM test without NF" + +[[components]] +name = "booter" +img = "no_interface.llbooter" +implements = [{interface = "init"}, {interface = "addr"}] +deps = [{srv = "kernel", interface = "init", variant = "kernel"}] +constructor = "kernel" + +[[components]] +name = "capmgr" +img = "capmgr.simple" +deps = [{srv = "booter", interface = "init"}, {srv = "booter", interface = "addr"}] +implements = [{interface = "capmgr"}, {interface = "init"}, {interface = "memmgr"}, {interface = "capmgr_create"}, {interface = "contigmem"}] +constructor = "booter" +baseaddr = "0x1000000" + +[[components]] +name = "sched" +img = "sched.pfprr_quantum_static" +deps = [{srv = "capmgr", interface = "init"}, {srv = "capmgr", interface = "capmgr"}, {srv = "capmgr", interface = "memmgr"}] +implements = [{interface = "sched"}, {interface = "syncipc"}, {interface = "init"}] +constructor = "booter" +baseaddr = "0x1600000" + +[[components]] +name = "nicmgr" +img = "nicmgr.dpdk" +deps = [{srv = "sched", interface = "sched"}, {srv = "sched", interface = "init"}, {srv = "capmgr", interface = "capmgr_create"}, {srv = "capmgr", interface = "memmgr"}, {srv = "capmgr", interface = "contigmem"}] +implements = [{interface = "nic"}] +constructor = "booter" +baseaddr = "0x6000000" + +[[components]] +name = "vmm" +img = "simple_vmm.vmm" +deps = [{srv = "sched", interface = "sched"}, {srv = "sched", interface = "init"},{srv = "capmgr", interface = "capmgr"}, {srv = "capmgr", interface = "memmgr"}, {srv = "capmgr", interface = "contigmem"}, {srv = "nicmgr", interface = "nic"}] +implements = [{interface = "netio"}] +constructor = "booter" +baseaddr = "0x2000000" diff --git a/src/components/implementation/simple_nf/simple_nf1/main.c b/src/components/implementation/simple_nf/simple_nf1/main.c index fe39b009a7..a3cd96c6ce 100644 --- a/src/components/implementation/simple_nf/simple_nf1/main.c +++ b/src/components/implementation/simple_nf/simple_nf1/main.c @@ -18,6 +18,9 @@ char rx_nf_buffer[4096]; #define RX_BATCH 1 #define TX_BATCH 1 +#define RX_PROCESSING 0 +#define TX_PROCESSING 0 + static void tx_task(void) { @@ -52,13 +55,14 @@ tx_task(void) first_obj_pri = netshmem_get_pri(first_obj); pkt_arr = (struct netshmem_meta_tuple *)&(first_obj_pri->pkt_arr); tx_batch_ct = first_obj_pri->batch_len; - +#if TX_PROCESSING for (u8_t i = 0; i < tx_batch_ct; i++) { pkt_len = pkt_arr[i].pkt_len; objid = pkt_arr[i].obj_id; tx_obj = shm_bm_transfer_net_pkt_buf(tx_shmemd, objid); memcpy(tx_nf_buffer, netshmem_get_data_buf(tx_obj), pkt_len); } +#endif nic_send_packet_batch(first_objid); #endif } @@ -102,13 +106,14 @@ rx_task(void) first_obj_pri = netshmem_get_pri(first_obj); pkt_arr = (struct netshmem_meta_tuple *)&(first_obj_pri->pkt_arr); rx_batch_ct = first_obj_pri->batch_len; - +#if RX_PROCESSING for (u8_t i = 0; i < rx_batch_ct; i++) { pkt_len = pkt_arr[i].pkt_len; objid = pkt_arr[i].obj_id; rx_obj = shm_bm_transfer_net_pkt_buf(rx_shmemd, objid); memcpy(rx_nf_buffer, netshmem_get_data_buf(rx_obj), pkt_len); } +#endif netio_send_packet_batch(first_objid); #endif diff --git a/src/components/implementation/simple_vmm/vmm/Makefile b/src/components/implementation/simple_vmm/vmm/Makefile index 4551711ca7..dc015fe7a8 100644 --- a/src/components/implementation/simple_vmm/vmm/Makefile +++ b/src/components/implementation/simple_vmm/vmm/Makefile @@ -6,7 +6,7 @@ INTERFACE_EXPORTS = netio # The interfaces this component is dependent on for compilation (this # is a list of directory names in interface/) -INTERFACE_DEPENDENCIES = contigmem netshmem nic +INTERFACE_DEPENDENCIES = contigmem netshmem nic sched nic # The library dependencies this component is reliant on for # compilation/linking (this is a list of directory names in lib/) LIBRARY_DEPENDENCIES = ubench component kernel initargs vmrt shm_bm diff --git a/src/components/implementation/simple_vmm/vmm/netio.c b/src/components/implementation/simple_vmm/vmm/netio.c index 85c189723a..683b3af5a4 100644 --- a/src/components/implementation/simple_vmm/vmm/netio.c +++ b/src/components/implementation/simple_vmm/vmm/netio.c @@ -2,6 +2,7 @@ #include #include #include +#include #include @@ -116,7 +117,7 @@ netio_send_packet(shm_bm_objid_t pktid, u16_t pkt_len) return 0; } -extern int rx_intr; + int netio_send_packet_batch(shm_bm_objid_t pktid) { diff --git a/src/components/implementation/simple_vmm/vmm/simple_vmm.c b/src/components/implementation/simple_vmm/vmm/simple_vmm.c index bdd17c2df3..acea92a4f8 100644 --- a/src/components/implementation/simple_vmm/vmm/simple_vmm.c +++ b/src/components/implementation/simple_vmm/vmm/simple_vmm.c @@ -13,10 +13,30 @@ #include #include #include +#include +#include +#include #include #include +#define NF_THD_PRIORITY 31 + +#define NO_NF_TEST 1 + +#define RX_BATCH 1 +#define TX_BATCH 1 + +#define RX_PROCESSING 0 +#define TX_PROCESSING 0 + +thdid_t rx_tid = 0; +thdid_t tx_tid = 0; + +char tx_nf_buffer[4096]; +char rx_nf_buffer[4096]; + + INCBIN(vmlinux, "guest/vmlinux.img") INCBIN(bios, "guest/guest.img") @@ -134,6 +154,106 @@ vm_comp_create(void) return vm; } +static void +tx_task(void) +{ + u16_t pkt_len; + shm_bm_objid_t objid; + + // netio_shmem_map(netshmem_get_shm_id()); + nic_shmem_map(netshmem_get_shm_id()); + + shm_bm_objid_t first_objid; + struct netshmem_pkt_buf *first_obj; + struct netshmem_pkt_pri *first_obj_pri; + struct netshmem_meta_tuple *pkt_arr; + u8_t tx_batch_ct = 0; + struct netshmem_pkt_buf *tx_obj; + + nic_bind_port(0, 1); + + shm_bm_t tx_shmemd = 0; + tx_shmemd = netshmem_get_shm(); + + while(1) { +#if !TX_BATCH + objid = netio_get_a_packet(&pkt_len); + nic_send_packet(objid, 0, pkt_len); + +#else + u8_t batch_ct = 50; + + first_objid = objid = netio_get_a_packet_batch(batch_ct); + first_obj = shm_bm_transfer_net_pkt_buf(tx_shmemd, objid); + first_obj_pri = netshmem_get_pri(first_obj); + pkt_arr = (struct netshmem_meta_tuple *)&(first_obj_pri->pkt_arr); + tx_batch_ct = first_obj_pri->batch_len; + +#if TX_PROCESSING + for (u8_t i = 0; i < tx_batch_ct; i++) { + pkt_len = pkt_arr[i].pkt_len; + objid = pkt_arr[i].obj_id; + tx_obj = shm_bm_transfer_net_pkt_buf(tx_shmemd, objid); + memcpy(tx_nf_buffer, netshmem_get_data_buf(tx_obj), pkt_len); + } +#endif + nic_send_packet_batch(first_objid); +#endif + } +} + +static void +rx_task(void) +{ + /* TODO: port NF applications here */ + shm_bm_objid_t objid; + struct netshmem_pkt_buf *rx_obj; + shm_bm_objid_t first_objid; + struct netshmem_pkt_buf *first_obj; + struct netshmem_pkt_pri *first_obj_pri; + struct netshmem_meta_tuple *pkt_arr; + u16_t pkt_len; + + u8_t batch_ct = 50; + + // netio_shmem_map(netshmem_get_shm_id()); + nic_shmem_map(netshmem_get_shm_id()); + nic_bind_port(0, 0); + + int i = 0; + u64_t times = 0; + u64_t overhead = 0; + + shm_bm_t rx_shmemd = 0; + + rx_shmemd = netshmem_get_shm(); + while(1) + { + u8_t rx_batch_ct = 0; +#if !RX_BATCH + objid = nic_get_a_packet(&pkt_len); + netio_send_packet(objid, pkt_len); +#else + first_objid = nic_get_a_packet_batch(batch_ct); + + first_obj = shm_bm_transfer_net_pkt_buf(rx_shmemd, first_objid); + first_obj_pri = netshmem_get_pri(first_obj); + pkt_arr = (struct netshmem_meta_tuple *)&(first_obj_pri->pkt_arr); + rx_batch_ct = first_obj_pri->batch_len; +#if RX_PROCESSING + for (u8_t i = 0; i < rx_batch_ct; i++) { + pkt_len = pkt_arr[i].pkt_len; + objid = pkt_arr[i].obj_id; + rx_obj = shm_bm_transfer_net_pkt_buf(rx_shmemd, objid); + memcpy(rx_nf_buffer, netshmem_get_data_buf(rx_obj), pkt_len); + } +#endif + + netio_send_packet_batch(first_objid); +#endif + } +} + void cos_init(void) { @@ -143,6 +263,15 @@ void cos_parallel_init(coreid_t cid, int init_core, int ncores) { struct vmrt_vm_vcpu *vcpu; +#if NO_NF_TEST + if (cid == 0) { + rx_tid = sched_thd_create((void *)rx_task, NULL); + netshmem_create(rx_tid); + tx_tid = sched_thd_create((void *)tx_task, NULL); + netshmem_create(tx_tid); + printc("NF rx tid:%ld, tx tid:%ld\n", rx_tid, tx_tid); + } +#endif if (cid != 0 || NUM_CPU == 1) { @@ -169,6 +298,14 @@ parallel_main(coreid_t cid) vcpu = vmrt_get_vcpu(g_vm, cid); vmrt_vm_vcpu_start(vcpu); } + +#if NO_NF_TEST + if (cid == 0) { + sched_thd_param_set(rx_tid, sched_param_pack(SCHEDP_PRIO, NF_THD_PRIORITY)); + sched_thd_param_set(tx_tid, sched_param_pack(SCHEDP_PRIO, NF_THD_PRIORITY)); + } +#endif + while (1) { sched_thd_block(0); From 75a0d2caaee715d3168791563539ee651cefa0fe Mon Sep 17 00:00:00 2001 From: betahxy Date: Tue, 12 Mar 2024 07:00:01 -0400 Subject: [PATCH 05/60] debug nf session --- .../implementation/capmgr/simple/capmgr.c | 2 +- .../implementation/nicmgr/dpdk/init.c | 4 +- .../implementation/nicmgr/dpdk/nicmgr.c | 9 +- .../no_interface/llbooter/llbooter.c | 2 +- .../sched/pfprr_quantum_static/main.c | 12 + .../simple_nf/simple_nf1/main.c | 2 +- .../implementation/simple_vmm/vmm/Makefile | 2 +- .../vmm/devices/vpci/virtio_net_io.c | 248 ++++++++++++++---- .../vmm/devices/vpci/virtio_net_io.h | 12 +- .../simple_vmm/vmm/devices/vpci/vpci.c | 4 +- .../implementation/simple_vmm/vmm/netio.c | 101 ++++++- .../simple_vmm/vmm/nf_session.c | 76 ++++++ .../simple_vmm/vmm/nf_session.h | 46 ++++ .../simple_vmm/vmm/simple_vmm.c | 114 ++++++-- src/components/interface/sched/sched.h | 2 + src/components/interface/sched/stubs/stubs.S | 1 + src/components/lib/slm/quantum.c | 2 +- src/components/lib/vmrt/vmrt.c | 2 +- src/components/lib/vmrt/vmrt.h | 4 + src/composer/src/resources.rs | 2 +- src/platform/i386/chal/shared/cos_config.h | 2 +- 21 files changed, 558 insertions(+), 91 deletions(-) create mode 100644 src/components/implementation/simple_vmm/vmm/nf_session.c create mode 100644 src/components/implementation/simple_vmm/vmm/nf_session.h diff --git a/src/components/implementation/capmgr/simple/capmgr.c b/src/components/implementation/capmgr/simple/capmgr.c index cc836bb414..34f3dd29bf 100644 --- a/src/components/implementation/capmgr/simple/capmgr.c +++ b/src/components/implementation/capmgr/simple/capmgr.c @@ -73,7 +73,7 @@ SS_STATIC_SLAB(asnd, struct cm_asnd, MAX_NUM_THREADS); /* 64 MiB */ #define MB2PAGES(mb) (round_up_to_page(mb * 1024 * 1024) / PAGE_SIZE) -#define MM_NPAGES (MB2PAGES(1500)) +#define MM_NPAGES (MB2PAGES(600)) SS_STATIC_SLAB(page, struct mm_page, MM_NPAGES); SS_STATIC_SLAB(span, struct mm_span, MM_NPAGES); diff --git a/src/components/implementation/nicmgr/dpdk/init.c b/src/components/implementation/nicmgr/dpdk/init.c index 24c01e445d..ae5bf5f4c6 100644 --- a/src/components/implementation/nicmgr/dpdk/init.c +++ b/src/components/implementation/nicmgr/dpdk/init.c @@ -197,7 +197,7 @@ process_rx_packets(cos_portid_t port_id, char** rx_pkts, uint16_t nb_pkts) } enqueued_rx++; - sync_sem_give(&session->sem); + // sync_sem_give(&session->sem); } } @@ -402,7 +402,6 @@ parallel_main(coreid_t cid) /* DPDK rx and tx will only run on core 0 */ if(cid == 0) { sched_thd_param_set(recv_tid, sched_param_pack(SCHEDP_PRIO, RECV_THD_PRIORITY)); - sched_thd_block(0); } else { #if 0 #if E810_NIC == 0 @@ -414,6 +413,7 @@ parallel_main(coreid_t cid) #endif #endif } + sched_thd_block(0); return 0; } diff --git a/src/components/implementation/nicmgr/dpdk/nicmgr.c b/src/components/implementation/nicmgr/dpdk/nicmgr.c index a78d683e99..e88f1df9c9 100644 --- a/src/components/implementation/nicmgr/dpdk/nicmgr.c +++ b/src/components/implementation/nicmgr/dpdk/nicmgr.c @@ -142,15 +142,18 @@ nic_get_a_packet_batch(u8_t batch_limit) pkt_arr = (struct netshmem_meta_tuple *)&first_obj_pri->pkt_arr; first_obj_pri->batch_len = 0; - sync_sem_take(&session->sem); + // sync_sem_take(&session->sem); - assert(!pkt_ring_buf_empty(&session->pkt_ring_buf)); + // assert(!pkt_ring_buf_empty(&session->pkt_ring_buf)); + while (pkt_ring_buf_empty(&session->pkt_ring_buf)) { + sched_thd_yield(); + } while (batch_ct < batch_limit && pkt_ring_buf_dequeue(&session->pkt_ring_buf, &buf)) { assert(buf.pkt); if (likely(batch_ct > 0)) { obj = shm_bm_alloc_net_pkt_buf(session->shemem_info.shm, &objid); - sync_sem_take(&session->sem); + // sync_sem_take(&session->sem); assert(obj); } diff --git a/src/components/implementation/no_interface/llbooter/llbooter.c b/src/components/implementation/no_interface/llbooter/llbooter.c index 828f1476ce..c5c813203e 100644 --- a/src/components/implementation/no_interface/llbooter/llbooter.c +++ b/src/components/implementation/no_interface/llbooter/llbooter.c @@ -32,7 +32,7 @@ #define INITARGS_MAX_PATHNAME 512 #endif #ifndef BOOTER_CAPMGR_MB -#define BOOTER_CAPMGR_MB 2000 +#define BOOTER_CAPMGR_MB 600 #endif #ifndef BOOTER_MAX_CHKPT #define BOOTER_MAX_CHKPT 64 diff --git a/src/components/implementation/sched/pfprr_quantum_static/main.c b/src/components/implementation/sched/pfprr_quantum_static/main.c index d14e6e4181..dd86a9dd29 100644 --- a/src/components/implementation/sched/pfprr_quantum_static/main.c +++ b/src/components/implementation/sched/pfprr_quantum_static/main.c @@ -150,6 +150,18 @@ sched_thd_yield_to(thdid_t t) return ret; } +int +sched_thd_yield(void) +{ + struct slm_thd *current = slm_thd_current(); + int ret; + + slm_cs_enter(current, SLM_CS_NONE); + slm_sched_yield(current, 0); + ret = slm_cs_exit_reschedule(current, SLM_CS_NONE); + + return ret; +} void sched_set_tls(void* tls_addr) diff --git a/src/components/implementation/simple_nf/simple_nf1/main.c b/src/components/implementation/simple_nf/simple_nf1/main.c index a3cd96c6ce..2b054a5545 100644 --- a/src/components/implementation/simple_nf/simple_nf1/main.c +++ b/src/components/implementation/simple_nf/simple_nf1/main.c @@ -7,7 +7,7 @@ #include #include -#define NF_THD_PRIORITY 31 +#define NF_THD_PRIORITY 2 thdid_t rx_tid = 0; thdid_t tx_tid = 0; diff --git a/src/components/implementation/simple_vmm/vmm/Makefile b/src/components/implementation/simple_vmm/vmm/Makefile index dc015fe7a8..c9be9cfe36 100644 --- a/src/components/implementation/simple_vmm/vmm/Makefile +++ b/src/components/implementation/simple_vmm/vmm/Makefile @@ -9,7 +9,7 @@ INTERFACE_EXPORTS = netio INTERFACE_DEPENDENCIES = contigmem netshmem nic sched nic # The library dependencies this component is reliant on for # compilation/linking (this is a list of directory names in lib/) -LIBRARY_DEPENDENCIES = ubench component kernel initargs vmrt shm_bm +LIBRARY_DEPENDENCIES = ubench component kernel initargs vmrt shm_bm sync time ck # Note: Both the interface and library dependencies should be # *minimal*. That is to say that removing a dependency should cause # the build to fail. The build system does not validate this diff --git a/src/components/implementation/simple_vmm/vmm/devices/vpci/virtio_net_io.c b/src/components/implementation/simple_vmm/vmm/devices/vpci/virtio_net_io.c index 68f42b16bf..b448e19668 100644 --- a/src/components/implementation/simple_vmm/vmm/devices/vpci/virtio_net_io.c +++ b/src/components/implementation/simple_vmm/vmm/devices/vpci/virtio_net_io.c @@ -28,16 +28,68 @@ #include #include #include +#include +#include #include "virtio_net_io.h" #include "vpci.h" #include "virtio_ring.h" +#include +#include +#include +#include + + /* TODO: remove this warning flag when virtio-net is done */ #pragma GCC diagnostic ignored "-Wunused-but-set-variable" -static struct virtio_net_io_reg virtio_net_regs; -static struct virtio_queue virtio_queues[2]; -struct virtio_vq_info virtio_net_vqs[VIRTIO_NET_MAXQ - 1]; +static struct virtio_net_io_reg virtio_net_regs[VMRT_MAX_VM]; +static struct virtio_queue virtio_queues[VMRT_MAX_VM][2]; +static struct virtio_vq_info virtio_net_vqs[VMRT_MAX_VM][VIRTIO_NET_MAXQ - 1]; + +static inline struct virtio_net_io_reg *get_virtio_net_regs(struct vmrt_vm_vcpu *vcpu) { + return &virtio_net_regs[vcpu->vm->comp_id]; +} + +static inline struct virtio_queue *get_virtio_queue(struct vmrt_vm_vcpu *vcpu, int nr_queue) { + return &virtio_queues[vcpu->vm->comp_id][nr_queue]; +} + +static inline struct virtio_vq_info *get_virtio_net_vqs(struct vmrt_vm_comp *vm, int nr_queue) { + return &virtio_net_vqs[vm->comp_id][nr_queue]; +} + +static u8_t virtio_net_mac[VMRT_MAX_VM][6] = { + {0x10, 0x10, 0x10, 0x10, 0x10, 0x11}, + {0x10, 0x10, 0x10, 0x10, 0x10, 0x13}, + {0x10, 0x10, 0x10, 0x10, 0x10, 0x15}, + {0x10, 0x10, 0x10, 0x10, 0x10, 0x17}, + {0x10, 0x10, 0x10, 0x10, 0x10, 0x19}, + {0x10, 0x10, 0x10, 0x10, 0x10, 0x1a}, + {0x10, 0x10, 0x10, 0x10, 0x10, 0x1b}, + {0x10, 0x10, 0x10, 0x10, 0x10, 0x1c}, + {0x10, 0x10, 0x10, 0x10, 0x10, 0x1d}, + {0x10, 0x10, 0x10, 0x10, 0x10, 0x1e}, + }; + + +static struct vmrt_vm_comp *mac_to_vm[VMRT_MAX_VM] = {0}; + +void +vm_mac_tbl_update(compid_t comp_id, struct vmrt_vm_comp *vm) { + mac_to_vm[comp_id] = vm; +} + +struct vmrt_vm_comp *get_vm_from_mac(u8_t *mac) { + for (int i = 0; i < VMRT_MAX_VM; i++) { + if(!memcmp(virtio_net_mac[i], mac, 6)) { + return mac_to_vm[i]; + } + } + + return NULL; +} + static unsigned char icmp_reply[] = { /* TODO: remove icmp reply and process nic input from nic component */ @@ -91,7 +143,7 @@ vq_endchains(struct vmrt_vm_vcpu *vcpu, struct virtio_vq_info *vq, int used_all_ !(vq->avail->flags & VRING_AVAIL_F_NO_INTERRUPT); if (intr) { - virtio_net_regs.header.ISR = 1; + get_virtio_net_regs(vcpu)->header.ISR = 1; /* TODO: 57 is virtio-net interrupt without io apic, 33 is with io apic */ #if VMX_SUPPORT_POSTED_INTR vlapic_set_intr(vcpu, 33, 0); @@ -123,7 +175,8 @@ virtio_vq_init(struct vmrt_vm_vcpu *vcpu, int nr_queue, u32_t pfn) size_t size; char *vb; - vq = &virtio_net_vqs[nr_queue]; + vq = get_virtio_net_vqs(vcpu->vm, nr_queue); + vq->pfn = pfn; phys = (u64_t)pfn << VRING_PAGE_BITS; size = vring_size(vq->qsize, VIRTIO_PCI_VRING_ALIGN); @@ -311,8 +364,10 @@ virtio_net_rcv_one_pkt(void *data, int pkt_len) int n; u16_t idx; int ret; + struct vmrt_vm_comp *vm = get_vm_from_mac(data); + assert(vm); - vq = &virtio_net_vqs[VIRTIO_NET_RXQ]; + vq = get_virtio_net_vqs(vm, VIRTIO_NET_RXQ); vcpu = vq->vcpu; @@ -344,14 +399,21 @@ virtio_net_rcv_one_pkt(void *data, int pkt_len) } void -virtio_net_send_one_pkt(void *data, u16_t *pkt_len) +virtio_net_send_one_pkt(void *data, u16_t *pkt_len, struct vmrt_vm_comp *vm) { - struct virtio_vq_info *vq = &virtio_net_vqs[VIRTIO_NET_TXQ]; struct iovec iov[VIRTIO_NET_MAXSEGS]; struct vmrt_vm_vcpu *vcpu; int i, n; int plen, tlen; u16_t idx; + struct virtio_vq_info *vq; + + if (unlikely(vm == NULL)) { + *pkt_len = 0; + return; + } + + vq = get_virtio_net_vqs(get_vm_from_mac(((u8_t *)data + 6)), VIRTIO_NET_TXQ); while (!vq_has_descs(vq)) { *pkt_len = 0; @@ -391,7 +453,7 @@ virtio_net_outb(u32_t port_id, struct vmrt_vm_vcpu *vcpu) switch (port_id) { case VIRTIO_NET_DEV_STATUS: - virtio_net_regs.header.dev_status = val; + get_virtio_net_regs(vcpu)->header.dev_status = val; break; default: VM_PANIC(vcpu); @@ -400,14 +462,6 @@ virtio_net_outb(u32_t port_id, struct vmrt_vm_vcpu *vcpu) return; } -#define REAL_NIC 0 - -#if REAL_NIC -static u8_t virtio_net_mac[6] = {0x6c, 0xfe, 0x54, 0x40, 0x41, 0x01}; -#else -static u8_t virtio_net_mac[6] = {0x10, 0x10, 0x10, 0x10, 0x10, 0x11}; -#endif - static void virtio_net_inb(u32_t port_id, struct vmrt_vm_vcpu *vcpu) { @@ -416,36 +470,38 @@ virtio_net_inb(u32_t port_id, struct vmrt_vm_vcpu *vcpu) switch (port_id) { case VIRTIO_NET_DEV_STATUS: - vcpu->shared_region->ax = virtio_net_regs.header.dev_status; + vcpu->shared_region->ax = get_virtio_net_regs(vcpu)->header.dev_status; break; case VIRTIO_NET_ISR: - vcpu->shared_region->ax = virtio_net_regs.header.ISR; - virtio_net_regs.header.ISR = 0; + vcpu->shared_region->ax = get_virtio_net_regs(vcpu)->header.ISR; + get_virtio_net_regs(vcpu)->header.ISR = 0; break; case VIRTIO_NET_STATUS: - vcpu->shared_region->ax = virtio_net_regs.config_reg.status; + vcpu->shared_region->ax = get_virtio_net_regs(vcpu)->config_reg.status; break; case VIRTIO_NET_STATUS_H: - vcpu->shared_region->ax = virtio_net_regs.config_reg.status >> 8; + vcpu->shared_region->ax = get_virtio_net_regs(vcpu)->config_reg.status >> 8; break; /* TODO: read mac address from virtio-net config space */ case VIRTIO_NET_MAC: - vcpu->shared_region->ax = virtio_net_mac[0]; + vm_mac_tbl_update(vcpu->vm->comp_id, vcpu->vm); + vcpu->shared_region->ax = virtio_net_mac[vcpu->vm->comp_id][0]; + mac_to_vm[vcpu->vm->comp_id] = vcpu->vm; break; case VIRTIO_NET_MAC1: - vcpu->shared_region->ax = virtio_net_mac[1]; + vcpu->shared_region->ax = virtio_net_mac[vcpu->vm->comp_id][1]; break; case VIRTIO_NET_MAC2: - vcpu->shared_region->ax = virtio_net_mac[2]; + vcpu->shared_region->ax = virtio_net_mac[vcpu->vm->comp_id][2]; break; case VIRTIO_NET_MAC3: - vcpu->shared_region->ax = virtio_net_mac[3]; + vcpu->shared_region->ax = virtio_net_mac[vcpu->vm->comp_id][3]; break; case VIRTIO_NET_MAC4: - vcpu->shared_region->ax = virtio_net_mac[4]; + vcpu->shared_region->ax = virtio_net_mac[vcpu->vm->comp_id][4]; break; case VIRTIO_NET_MAC5: - vcpu->shared_region->ax = virtio_net_mac[5]; + vcpu->shared_region->ax = virtio_net_mac[vcpu->vm->comp_id][5]; break; default: VM_PANIC(vcpu); @@ -459,14 +515,14 @@ virtio_net_inw(u32_t port_id, struct vmrt_vm_vcpu *vcpu) switch (port_id) { case VIRTIO_NET_QUEUE_SIZE: - vcpu->shared_region->ax = virtio_queues[virtio_net_regs.header.queue_select].queue_sz; + vcpu->shared_region->ax = get_virtio_queue(vcpu, get_virtio_net_regs(vcpu)->header.queue_select)->queue_sz; break; case VIRTIO_NET_QUEUE_SELECT: - vcpu->shared_region->ax = virtio_net_regs.header.queue_select; + vcpu->shared_region->ax = get_virtio_net_regs(vcpu)->header.queue_select; break; case VIRTIO_NET_QUEUE_NOTIFY: VM_PANIC(vcpu); - vcpu->shared_region->ax = virtio_net_regs.header.queue_notify; + vcpu->shared_region->ax = get_virtio_net_regs(vcpu)->header.queue_notify; break; default: VM_PANIC(vcpu); @@ -482,12 +538,13 @@ virtio_net_outw(u32_t port_id, struct vmrt_vm_vcpu *vcpu) switch (port_id) { case VIRTIO_NET_QUEUE_SELECT: - virtio_net_regs.header.queue_select = val; + get_virtio_net_regs(vcpu)->header.queue_select = val; break; case VIRTIO_NET_QUEUE_NOTIFY: if (val == VIRTIO_NET_TXQ) { + sched_thd_wakeup(vcpu->vm->tx_thd); } - virtio_net_regs.header.queue_notify = val; + get_virtio_net_regs(vcpu)->header.queue_notify = val; break; default: VM_PANIC(vcpu); @@ -504,11 +561,11 @@ virtio_net_outl(u32_t port_id, struct vmrt_vm_vcpu *vcpu) switch (port_id) { case VIRTIO_NET_GUEST_FEATURES: - virtio_net_regs.header.guest_features = val; + get_virtio_net_regs(vcpu)->header.guest_features = val; break; case VIRTIO_NET_QUEUE_ADDR: - virtio_queues[virtio_net_regs.header.queue_select].queue = (void *)tmp; - virtio_vq_init(vcpu, virtio_net_regs.header.queue_select, val); + get_virtio_queue(vcpu, get_virtio_net_regs(vcpu)->header.queue_select)->queue = (void *)tmp; + virtio_vq_init(vcpu, get_virtio_net_regs(vcpu)->header.queue_select, val); break; default: VM_PANIC(vcpu); @@ -523,13 +580,13 @@ virtio_net_inl(u32_t port_id, struct vmrt_vm_vcpu *vcpu) switch (port_id) { case VIRTIO_NET_DEV_FEATURES: - vcpu->shared_region->ax = virtio_net_regs.header.dev_features; + vcpu->shared_region->ax = get_virtio_net_regs(vcpu)->header.dev_features; break; case VIRTIO_NET_GUEST_FEATURES: - vcpu->shared_region->ax = virtio_net_regs.header.guest_features; + vcpu->shared_region->ax = get_virtio_net_regs(vcpu)->header.guest_features; break; case VIRTIO_NET_QUEUE_ADDR: - vcpu->shared_region->ax = virtio_net_regs.header.queue_addr; + vcpu->shared_region->ax = get_virtio_net_regs(vcpu)->header.queue_addr; break; default: VM_PANIC(vcpu); @@ -573,6 +630,103 @@ virtio_net_handler(u16_t port, int dir, int sz, struct vmrt_vm_vcpu *vcpu) } } +void +virtio_tx_task(void *data) +{ + struct vmrt_vm_comp *vm = (struct vmrt_vm_comp *)data; + // printc("virtio tx task :%p, id:%d, tx thd:%d\n", data, vm->comp_id, cos_thdid()); + + struct virtio_vq_info *vq; + struct iovec iov[VIRTIO_NET_MAXSEGS]; + struct vmrt_vm_vcpu *vcpu; + int i, n; + int plen, tlen; + u16_t idx; + char *pkt; + struct netshmem_pkt_buf *tx_obj; + shm_bm_objid_t tx_pktid; + struct nf_pkt_meta_data buf; + + struct nf_session *session = NULL; + shm_bm_t tx_shmemd = 0; + u16_t svc_id = 0; + + struct iphdr *iphdr = NULL; + struct tcphdr *tcphdr = NULL; + struct udphdr *udphdr = NULL; + + vq = get_virtio_net_vqs(vm, VIRTIO_NET_TXQ); + while (1) { + while (!vq_has_descs(vq)) { + sched_thd_block(0); + } + + vcpu = vq->vcpu; + + memset(&iov, 0, sizeof(iov)); + + n = vq_getchain(vcpu, vq, &idx, iov, VIRTIO_NET_MAXSEGS, NULL); + if (unlikely(n < 1 || n >= VIRTIO_NET_MAXSEGS)) { + printc("vtnet: virtio_net_proctx: vq_getchain = %d\n", n); + assert(0); + } + + plen = 0; + tlen = iov[0].iov_len; + assert(n == 2); + + plen += iov[1].iov_len; + tlen += iov[1].iov_len; + + pkt = iov[1].iov_base; + + iphdr = (struct iphdr *) (pkt + ETH_HLEN); + unsigned char *srcip = (unsigned char *)&(iphdr->saddr); + unsigned char *dstip = (unsigned char *)&(iphdr->daddr); + + if(iphdr->protocol == IPPROTO_TCP) + { + tcphdr = (struct tcphdr*)((u_int8_t*)iphdr + (iphdr->ihl << 2)); + svc_id = ntohs(tcphdr->th_sport); + svc_id = 0; + // printc("tcp svc id:%u\n", svc_id); + // length = pdataLen - (iphdr->ihl<<2) - (tcphdr->doff << 2); + // payload = (u_int8_t*)( (u_int8_t*)tcphdr + (tcphdr->doff << 2) ); + // sport = tcphdr->source; + // dport = tcphdr->dest; + + // printf("processed one packet:queue_num:%d, id:%d, plen:%d, ret:%d,src ip:%d.%d.%d.%d, dest ip:%d.%d.%d.%d, src port:%u, dst port:%u \n", queue_num, id, plen, ret, IP_ARG(srcip), IP_ARG(dstip), ntohs(tcphdr->source), ntohs(tcphdr->dest)); + } else if (iphdr->protocol == IPPROTO_UDP) { + udphdr = (struct udphdr*)((u_int8_t*)iphdr + (iphdr->ihl << 2)); + svc_id = ntohs(udphdr->uh_sport); + printc("udp svc id:%u\n", svc_id); + assert(0); + + } + + session = get_nf_session(vm, svc_id); + tx_shmemd = session->tx_shmemd; + assert(tx_shmemd); + + if (tx_shmemd != 0) { + tx_obj = shm_bm_alloc_net_pkt_buf(tx_shmemd, &tx_pktid); + assert(tx_obj); + buf.objid = tx_pktid; + buf.pkt_len = plen; + buf.obj = tx_obj; + memcpy(netshmem_get_data_buf(tx_obj), pkt, plen); + if (unlikely(!nf_tx_ring_buf_enqueue(&(session->nf_tx_ring_buf), &buf))){ + shm_bm_free_net_pkt_buf(tx_obj); + } else { + sched_thd_wakeup(session->tx_thd); + } + } + + vq_relchain(vq, idx, tlen); + vq_endchains(vcpu, vq, 1); + } +} + void virtio_net_io_init(void) { @@ -580,11 +734,13 @@ virtio_net_io_init(void) memset(&virtio_queues, 0, sizeof(virtio_queues)); memset(&virtio_net_vqs, 0, sizeof(virtio_net_vqs)); - virtio_net_regs.header.dev_features |= (1 << VIRTIO_NET_F_STATUS); - virtio_net_regs.header.dev_features |= (1 << VIRTIO_NET_F_MAC); - virtio_net_regs.config_reg.status = VIRTIO_NET_S_LINK_UP; - virtio_queues[0].queue_sz = VQ_MAX_DESCRIPTORS; - virtio_queues[1].queue_sz = VQ_MAX_DESCRIPTORS; - virtio_net_vqs[VIRTIO_NET_RX].qsize = VQ_MAX_DESCRIPTORS; - virtio_net_vqs[VIRTIO_NET_TX].qsize = VQ_MAX_DESCRIPTORS; + for(int i = 0; i < VMRT_MAX_VM; i++) { + virtio_net_regs[i].header.dev_features |= (1 << VIRTIO_NET_F_STATUS); + virtio_net_regs[i].header.dev_features |= (1 << VIRTIO_NET_F_MAC); + virtio_net_regs[i].config_reg.status = VIRTIO_NET_S_LINK_UP; + virtio_queues[i][0].queue_sz = VQ_MAX_DESCRIPTORS; + virtio_queues[i][1].queue_sz = VQ_MAX_DESCRIPTORS; + virtio_net_vqs[i][VIRTIO_NET_RX].qsize = VQ_MAX_DESCRIPTORS; + virtio_net_vqs[i][VIRTIO_NET_TX].qsize = VQ_MAX_DESCRIPTORS; + } } \ No newline at end of file diff --git a/src/components/implementation/simple_vmm/vmm/devices/vpci/virtio_net_io.h b/src/components/implementation/simple_vmm/vmm/devices/vpci/virtio_net_io.h index a5239b8c47..b6a13b22b6 100644 --- a/src/components/implementation/simple_vmm/vmm/devices/vpci/virtio_net_io.h +++ b/src/components/implementation/simple_vmm/vmm/devices/vpci/virtio_net_io.h @@ -91,11 +91,11 @@ struct virtio_net_io_reg { struct virtio_net_config config_reg; } __attribute__((packed)); -struct iovec -{ - void *iov_base; /* Pointer to data. */ - size_t iov_len; /* Length of data. */ -}; +// struct iovec +// { +// void *iov_base; /* Pointer to data. */ +// size_t iov_len; /* Length of data. */ +// }; struct virtio_vq_info { u16_t qsize; /* size of this queue (a power of 2) */ @@ -141,4 +141,4 @@ struct virtio_net_rxhdr { void virtio_net_handler(u16_t port, int dir, int sz, struct vmrt_vm_vcpu *vcpu); void virtio_net_rcv_one_pkt(void *data, int pkt_len); -void virtio_net_send_one_pkt(void *data, u16_t *pkt_len); +void virtio_net_send_one_pkt(void *data, u16_t *pkt_len, struct vmrt_vm_comp *vm); diff --git a/src/components/implementation/simple_vmm/vmm/devices/vpci/vpci.c b/src/components/implementation/simple_vmm/vmm/devices/vpci/vpci.c index e1854c8bac..e1571dc17b 100644 --- a/src/components/implementation/simple_vmm/vmm/devices/vpci/vpci.c +++ b/src/components/implementation/simple_vmm/vmm/devices/vpci/vpci.c @@ -83,10 +83,12 @@ set_vpci_comm_hdr(u8_t* raw_data, u8_t reg, u32_t val) void set_vpci_bar(u8_t* raw_data, u8_t reg, u32_t val) { + u32_t bar0; + switch (reg) { case OFFSET_BAR0: - u32_t bar0 = *(u32_t *)raw_data; + bar0 = *(u32_t *)raw_data; if (bar0 & 0x1) { /* IO bar */ /* mask all bits that should not be writable */ val = val & 0xFFFFC000; diff --git a/src/components/implementation/simple_vmm/vmm/netio.c b/src/components/implementation/simple_vmm/vmm/netio.c index 683b3af5a4..af8974a447 100644 --- a/src/components/implementation/simple_vmm/vmm/netio.c +++ b/src/components/implementation/simple_vmm/vmm/netio.c @@ -4,7 +4,7 @@ #include #include #include - +#include shm_bm_objid_t netio_get_a_packet(u16_t *pkt_len) @@ -18,7 +18,7 @@ netio_get_a_packet(u16_t *pkt_len) tx_obj = shm_bm_alloc_net_pkt_buf(tx_shmemd, &tx_pktid); assert(tx_obj); - virtio_net_send_one_pkt(tx_obj->data, &_pkt_len); + virtio_net_send_one_pkt(tx_obj->data, &_pkt_len, 0); *pkt_len = _pkt_len; return tx_pktid; @@ -53,6 +53,7 @@ void pkt_hex_dump(void *_data, u16_t len) } } +#if 0 shm_bm_objid_t netio_get_a_packet_batch(u8_t batch_limit) { @@ -90,8 +91,7 @@ netio_get_a_packet_batch(u8_t batch_limit) batch_ct++; } else { if (batch_ct == 0) { - extern int sched_thd_block(thdid_t dep_id); - sched_thd_block_timeout(0, ps_tsc() + 2000*1); + sched_thd_yield(); } else { shm_bm_free_net_pkt_buf(tx_obj); break; @@ -101,6 +101,99 @@ netio_get_a_packet_batch(u8_t batch_limit) first_obj_pri->batch_len = batch_ct; return first_objid; } +#endif + +struct nf_svc { + int svc_id; + struct vmrt_vm_comp *vm; +}; + +#define MAX_NFS 10 +#define MAX_THD_PER_NF 100 + +static struct nf_svc nf_svc_tbl[MAX_NFS][MAX_THD_PER_NF]; + +void +nf_svc_update(compid_t nf_id, int thd, int svc_id, struct vmrt_vm_comp *vm) +{ + // printc("svc update:%d, %d, %d\n", nf_id, thd, nf_svc_tbl[nf_id][thd].svc_id); + if (nf_svc_tbl[nf_id][thd].svc_id < 0) { + nf_svc_tbl[nf_id][thd].svc_id = svc_id; + nf_svc_tbl[nf_id][thd].vm = vm; + } else { + return; + } +} + +void +nf_svc_init(void) +{ + for (int i = 0; i < MAX_NFS; i++) { + for (int j = 0; j < MAX_THD_PER_NF; j++) { + nf_svc_tbl[i][j].svc_id = -1; + nf_svc_tbl[i][j].vm = NULL; + } + } +} + +shm_bm_objid_t +netio_get_a_packet_batch(u8_t batch_limit) +{ + shm_bm_objid_t first_objid; + struct netshmem_pkt_buf *first_obj; + struct netshmem_pkt_pri *first_obj_pri; + struct netshmem_pkt_buf *tx_obj; + shm_bm_objid_t tx_pktid; + struct netshmem_meta_tuple *pkt_arr; + + struct nf_session *session; + struct nf_pkt_meta_data buf; + u8_t batch_ct = 0; + compid_t vmm_id = cos_compid(); + compid_t nf_id = (compid_t)cos_inv_token(); + if (nf_id == 0) nf_id = vmm_id; + thdid_t nf_thd = cos_thdid(); + + int svc_id = nf_svc_tbl[nf_id][nf_thd].svc_id; + + if (svc_id < 0) { + printc("no svc available for this nf:%d, thd:%d\n", nf_id, nf_thd); + assert(0); + return 0; + } + + struct vmrt_vm_comp *vm = nf_svc_tbl[nf_id][nf_thd].vm; + + // printc("####################:%d, %d, vm:%d, svc:%d\n", nf_id, nf_thd, vm->comp_id, svc_id); + session = get_nf_session(vm, svc_id); + + + while (nf_tx_ring_buf_empty(&session->nf_tx_ring_buf)) { + // sched_thd_yield(); + sched_thd_block(0); + } + + assert(nf_tx_ring_buf_dequeue(&session->nf_tx_ring_buf, &buf)); + tx_obj = first_obj = buf.obj; + assert(tx_obj); + tx_pktid = first_objid = buf.objid; + first_obj_pri = netshmem_get_pri(tx_obj); + pkt_arr = (struct netshmem_meta_tuple *)&first_obj_pri->pkt_arr; + first_obj_pri->batch_len = 0; + + pkt_arr[batch_ct].obj_id = tx_pktid; + pkt_arr[batch_ct].pkt_len = buf.pkt_len; + batch_ct++; + + while (batch_ct < batch_limit && nf_tx_ring_buf_dequeue(&session->nf_tx_ring_buf, &buf)) { + pkt_arr[batch_ct].obj_id = buf.objid; + pkt_arr[batch_ct].pkt_len = buf.pkt_len; + batch_ct++; + } + + first_obj_pri->batch_len = batch_ct; + return first_objid; +} int netio_send_packet(shm_bm_objid_t pktid, u16_t pkt_len) diff --git a/src/components/implementation/simple_vmm/vmm/nf_session.c b/src/components/implementation/simple_vmm/vmm/nf_session.c new file mode 100644 index 0000000000..7ba4e8a397 --- /dev/null +++ b/src/components/implementation/simple_vmm/vmm/nf_session.c @@ -0,0 +1,76 @@ +#pragma once + +#include + +CK_RING_PROTOTYPE(nf_tx_ring_buf, nf_pkt_meta_data); + +static char ring_buffers[NF_TX_MAX_RING_NUM][NF_TX_PKT_RING_SZ]; +static struct nf_session nf_sessions[VMRT_MAX_VM][MAX_SVC_NUM]; + +void +nf_sessions_init(void) +{ + for (int i = 0; i < VMRT_MAX_VM; i++) { + for (int j = 0; j < MAX_SVC_NUM; j++) { + nf_sessions[i][j].rx_shmemd = 0; + nf_sessions[i][j].rx_thd = 0; + nf_sessions[i][j].tx_shmemd = 0; + nf_sessions[i][j].tx_thd = 0; + nf_sessions[i][j].nf_tx_ring_buf.ring = 0; + nf_sessions[i][j].nf_tx_ring_buf.ringbuf = 0; + + } + } +} + +void +nf_tx_ring_buf_init(struct nf_tx_ring_buf *pkt_ring_buf, size_t ringbuf_num, size_t ringbuf_sz) +{ + struct ck_ring *buf_addr; + + /* prevent multiple thread from contending memory */ + assert(cos_thdid() < 30); + buf_addr = (struct ck_ring *)&ring_buffers[cos_thdid()]; + + ck_ring_init(buf_addr, ringbuf_num); + + pkt_ring_buf->ring = buf_addr; + pkt_ring_buf->ringbuf = (struct pkt_buf *)((char *)buf_addr + sizeof(struct ck_ring)); +} + +inline int +nf_tx_ring_buf_enqueue(struct nf_tx_ring_buf *pkt_ring_buf, struct nf_pkt_meta_data *buf) +{ + assert(pkt_ring_buf->ring && pkt_ring_buf->ringbuf); + + return CK_RING_ENQUEUE_SPSC(nf_tx_ring_buf, pkt_ring_buf->ring, pkt_ring_buf->ringbuf, buf); +} + +inline int +nf_tx_ring_buf_dequeue(struct nf_tx_ring_buf *pkt_ring_buf, struct nf_pkt_meta_data *buf) +{ + assert(pkt_ring_buf->ring && pkt_ring_buf->ringbuf); + + return CK_RING_DEQUEUE_SPSC(nf_tx_ring_buf, pkt_ring_buf->ring, pkt_ring_buf->ringbuf, buf); +} + +inline int +nf_tx_ring_buf_empty(struct nf_tx_ring_buf *pkt_ring_buf) +{ + assert(pkt_ring_buf->ring); + + return (!ck_ring_size(pkt_ring_buf->ring)); +} + +struct nf_session *get_nf_session(struct vmrt_vm_comp *vm, int svc_id) +{ + if (svc_id < 0) return NULL; + else return &nf_sessions[vm->comp_id][svc_id]; +} + +void +nf_session_tx_update(struct nf_session *session, shm_bm_t tx_shmemd, thdid_t tx_thd) +{ + session->tx_shmemd = tx_shmemd; + session->tx_thd = tx_thd; +} diff --git a/src/components/implementation/simple_vmm/vmm/nf_session.h b/src/components/implementation/simple_vmm/vmm/nf_session.h new file mode 100644 index 0000000000..ee00626432 --- /dev/null +++ b/src/components/implementation/simple_vmm/vmm/nf_session.h @@ -0,0 +1,46 @@ +#include +#include +#include + +struct nf_pkt_meta_data { + void *obj; + shm_bm_objid_t objid; + u16_t pkt_len; +}; + +struct nf_tx_ring_buf { + struct ck_ring *ring; + struct nf_pkt_meta_data *ringbuf; +}; + +struct nf_session { + shm_bm_t rx_shmemd; + shm_bm_t tx_shmemd; + + thdid_t rx_thd; + thdid_t tx_thd; + + struct nf_tx_ring_buf nf_tx_ring_buf; +}; + +#define NF_TX_PKT_RBUF_NUM 512 +#define NF_TX_PKT_RBUF_SZ (NF_TX_PKT_RBUF_NUM * sizeof(struct nf_tx_ring_buf)) +#define NF_TX_PKT_RING_SZ (sizeof(struct ck_ring) + NF_TX_PKT_RBUF_SZ) +#define NF_TX_PKT_RING_PAGES (round_up_to_page(NF_TX_PKT_RING_SZ)/PAGE_SIZE) + +#define NF_TX_MAX_RING_NUM 30 + +#define MAX_NF_SESSION 10 + +#define MAX_SVC_NUM (20000) + +struct nf_session *get_nf_session(struct vmrt_vm_comp *vm, int svc_id); +void nf_session_tx_update(struct nf_session *session, shm_bm_t tx_shmemd, thdid_t tx_thd); +void nf_tx_ring_buf_init(struct nf_tx_ring_buf *pkt_ring_buf, size_t ringbuf_num, size_t ringbuf_sz); +int nf_tx_ring_buf_enqueue(struct nf_tx_ring_buf *pkt_ring_buf, struct nf_pkt_meta_data *buf); +int nf_tx_ring_buf_dequeue(struct nf_tx_ring_buf *pkt_ring_buf, struct nf_pkt_meta_data *buf); +int nf_tx_ring_buf_empty(struct nf_tx_ring_buf *pkt_ring_buf); + +void nf_svc_update(compid_t nf_id, int thd_id, int svc_id, struct vmrt_vm_comp *vm); +void nf_svc_init(void); +void nf_sessions_init(void); diff --git a/src/components/implementation/simple_vmm/vmm/simple_vmm.c b/src/components/implementation/simple_vmm/vmm/simple_vmm.c index acea92a4f8..1343cf661c 100644 --- a/src/components/implementation/simple_vmm/vmm/simple_vmm.c +++ b/src/components/implementation/simple_vmm/vmm/simple_vmm.c @@ -19,8 +19,11 @@ #include #include +#include +#include +#include -#define NF_THD_PRIORITY 31 +#define NF_THD_PRIORITY 2 #define NO_NF_TEST 1 @@ -33,6 +36,8 @@ thdid_t rx_tid = 0; thdid_t tx_tid = 0; +thdid_t virtio_tx_tid = 0; + char tx_nf_buffer[4096]; char rx_nf_buffer[4096]; @@ -42,9 +47,10 @@ INCBIN(bios, "guest/guest.img") /* Currently only have one VM component globally managed by this VMM */ static struct vmrt_vm_comp *g_vm; +static struct vmrt_vm_comp *g_vm1; #define VM_MAX_COMPS (2) -#define GUEST_MEM_SZ (320*1024*1024) +#define GUEST_MEM_SZ (100*1024*1024) SS_STATIC_SLAB(vm_comp, struct vmrt_vm_comp, VM_MAX_COMPS); SS_STATIC_SLAB(vm_lapic, struct acrn_vlapic, VM_MAX_COMPS * VMRT_VM_MAX_VCPU); @@ -52,10 +58,12 @@ SS_STATIC_SLAB(vcpu_inst_ctxt, struct instr_emul_ctxt, VM_MAX_COMPS * VMRT_VM_MA SS_STATIC_SLAB(vm_io_apic, struct acrn_vioapics, VM_MAX_COMPS); SS_STATIC_SLAB(vcpu_mmio_req, struct acrn_mmio_request, VM_MAX_COMPS * VMRT_VM_MAX_VCPU); +struct sync_lock vm_boot_lock; + void pause_handler(struct vmrt_vm_vcpu *vcpu) { - sched_thd_block_timeout(0, ps_tsc() + 2000*1); + sched_thd_yield(); GOTO_NEXT_INST(vcpu->shared_region); } @@ -126,7 +134,7 @@ vm_comp_create(void) /* Allocate memory for the VM */ shm_id = memmgr_shared_page_allocn_aligned(guest_mem_sz / PAGE_SIZE_4K, PAGE_SIZE_4K, (vaddr_t *)&mem); /* Make the memory accessible to VM */ - memmgr_shared_page_map_aligned_in_vm(shm_id, PAGE_SIZE_4K, (vaddr_t *)&vm_mem, vm->comp_id); + int ret = memmgr_shared_page_map_aligned_in_vm(shm_id, PAGE_SIZE_4K, (vaddr_t *)&vm_mem, vm->comp_id); vmrt_vm_mem_init(vm, mem); printc("created VM with %u cpus, memory size: %luMB, at host vaddr: %p\n", vm->num_vcpu, vm->guest_mem_sz/1024/1024, vm->guest_addr); @@ -154,6 +162,7 @@ vm_comp_create(void) return vm; } +#if 0 static void tx_task(void) { @@ -181,7 +190,7 @@ tx_task(void) nic_send_packet(objid, 0, pkt_len); #else - u8_t batch_ct = 50; + u8_t batch_ct = 32; first_objid = objid = netio_get_a_packet_batch(batch_ct); first_obj = shm_bm_transfer_net_pkt_buf(tx_shmemd, objid); @@ -201,6 +210,7 @@ tx_task(void) #endif } } +#endif static void rx_task(void) @@ -254,9 +264,60 @@ rx_task(void) } } +static void +tx_task(void) +{ + u16_t pkt_len; + shm_bm_objid_t objid; + + nic_shmem_map(netshmem_get_shm_id()); + + shm_bm_objid_t first_objid; + struct netshmem_pkt_buf *first_obj; + struct netshmem_pkt_pri *first_obj_pri; + struct netshmem_meta_tuple *pkt_arr; + u8_t tx_batch_ct = 0; + struct netshmem_pkt_buf *tx_obj; + + shm_bm_t tx_shmemd = 0; + tx_shmemd = netshmem_get_shm(); + + nic_bind_port(0, 1); + int svc_id = 0; + + nf_svc_update(cos_compid(), cos_thdid(), svc_id, g_vm); + + struct nf_session *session; + session = get_nf_session(g_vm, svc_id); + nf_session_tx_update(session, tx_shmemd, cos_thdid()); + + nf_tx_ring_buf_init(&session->nf_tx_ring_buf, NF_TX_PKT_RBUF_NUM, NF_TX_PKT_RING_SZ); + + while(1) { + u8_t batch_ct = 32; + + first_objid = objid = netio_get_a_packet_batch(batch_ct); + + nic_send_packet_batch(first_objid); + } +} + void cos_init(void) { + + nf_svc_init(); + nf_sessions_init(); + + struct vmrt_vm_vcpu *vcpu; + g_vm = vm_comp_create(); + printc("created vm done:%d, %p\n", g_vm->comp_id, g_vm); + + g_vm1 = vm_comp_create(); + + sync_lock_init(&vm_boot_lock); + + printc("creating vm1 done:%d, %p\n", g_vm1->comp_id, g_vm1); } void @@ -270,20 +331,27 @@ cos_parallel_init(coreid_t cid, int init_core, int ncores) tx_tid = sched_thd_create((void *)tx_task, NULL); netshmem_create(tx_tid); printc("NF rx tid:%ld, tx tid:%ld\n", rx_tid, tx_tid); - } -#endif - if (cid != 0 || NUM_CPU == 1) - { - cid = 0; - g_vm = vm_comp_create(); - vmrt_vm_vcpu_init(g_vm, cid); - vcpu = vmrt_get_vcpu(g_vm, cid); + extern void virtio_tx_task(void *data); + virtio_tx_tid = sched_thd_create((void *)virtio_tx_task, g_vm); + printc("virtio_tx_tid:%d\n", virtio_tx_tid); + g_vm->tx_thd = virtio_tx_tid; + + vmrt_vm_vcpu_init(g_vm, 0); + vcpu = vmrt_get_vcpu(g_vm, 0); lapic_init(vcpu); iinst_ctxt_init(vcpu); mmio_init(vcpu); + + } else { + vmrt_vm_vcpu_init(g_vm1, 0); + vcpu = vmrt_get_vcpu(g_vm1, 0); + lapic_init(vcpu); + iinst_ctxt_init(vcpu); + mmio_init(vcpu); } +#endif return; } @@ -292,19 +360,23 @@ void parallel_main(coreid_t cid) { struct vmrt_vm_vcpu *vcpu; - - if (cid != 0 || NUM_CPU == 1) { - cid = 0; - vcpu = vmrt_get_vcpu(g_vm, cid); + + if (cid == 0) { + vcpu = vmrt_get_vcpu(g_vm, 0); vmrt_vm_vcpu_start(vcpu); - } - #if NO_NF_TEST - if (cid == 0) { sched_thd_param_set(rx_tid, sched_param_pack(SCHEDP_PRIO, NF_THD_PRIORITY)); sched_thd_param_set(tx_tid, sched_param_pack(SCHEDP_PRIO, NF_THD_PRIORITY)); - } + + sched_thd_param_set(virtio_tx_tid, sched_param_pack(SCHEDP_PRIO, NF_THD_PRIORITY)); #endif + } else if(cid == 1) { + /* wait for the first vm to start */ + sched_thd_block_timeout(0, time_now() + time_usec2cyc(10000000)); + printc("----------------------STARTING SECOND VM----------------------\n"); + vcpu = vmrt_get_vcpu(g_vm1, 0); + vmrt_vm_vcpu_start(vcpu); + } while (1) { diff --git a/src/components/interface/sched/sched.h b/src/components/interface/sched/sched.h index a26f6cf28b..8f9b9c3752 100644 --- a/src/components/interface/sched/sched.h +++ b/src/components/interface/sched/sched.h @@ -25,6 +25,8 @@ typedef word_t sched_blkpt_epoch_t; int sched_thd_yield_to(thdid_t t); int COS_STUB_DECL(sched_thd_yield_to)(thdid_t t); +int sched_thd_yield(void); +int COS_STUB_DECL(sched_thd_yield)(void); int sched_thd_wakeup(thdid_t t); int COS_STUB_DECL(sched_thd_wakeup)(thdid_t t); int sched_debug_thd_state(thdid_t t); diff --git a/src/components/interface/sched/stubs/stubs.S b/src/components/interface/sched/stubs/stubs.S index 5717a0ee39..f4a826284e 100644 --- a/src/components/interface/sched/stubs/stubs.S +++ b/src/components/interface/sched/stubs/stubs.S @@ -9,6 +9,7 @@ cos_asm_stub(sched_get_cpu_freq); cos_asm_stub(sched_thd_yield_to); +cos_asm_stub(sched_thd_yield); cos_asm_stub(sched_thd_wakeup); cos_asm_stub(sched_debug_thd_state); cos_asm_stub(sched_thd_block); diff --git a/src/components/lib/slm/quantum.c b/src/components/lib/slm/quantum.c index a77f47ade1..e394eb212a 100644 --- a/src/components/lib/slm/quantum.c +++ b/src/components/lib/slm/quantum.c @@ -164,7 +164,7 @@ slm_policy_timer_init(microsec_t period) int slm_timer_quantum_init(void) { - slm_policy_timer_init(160); + slm_policy_timer_init(130); return 0; } diff --git a/src/components/lib/vmrt/vmrt.c b/src/components/lib/vmrt/vmrt.c index 3329e09238..c1dbff803c 100644 --- a/src/components/lib/vmrt/vmrt.c +++ b/src/components/lib/vmrt/vmrt.c @@ -468,7 +468,7 @@ void vmrt_vm_vcpu_start(struct vmrt_vm_vcpu *vcpu) { /* This is actually just to "push" the vcpu handler thread into run queue. */ - sched_thd_param_set(vcpu->handler_tid, sched_param_pack(SCHEDP_PRIO, 31)); + sched_thd_param_set(vcpu->handler_tid, sched_param_pack(SCHEDP_PRIO, 2)); } void diff --git a/src/components/lib/vmrt/vmrt.h b/src/components/lib/vmrt/vmrt.h index a04a6bb5fb..6740008807 100644 --- a/src/components/lib/vmrt/vmrt.h +++ b/src/components/lib/vmrt/vmrt.h @@ -3,6 +3,8 @@ #include #include +#define VMRT_MAX_VM (10) + #define VMRT_VM_NAME_SIZE (32) #define VMRT_VM_MAX_VCPU (16) @@ -53,6 +55,8 @@ struct vmrt_vm_comp { u8_t num_vcpu; struct vmrt_vm_vcpu vcpus[VMRT_VM_MAX_VCPU]; + thdid_t tx_thd; + int wire_mode; }; diff --git a/src/composer/src/resources.rs b/src/composer/src/resources.rs index 230de46420..587cef6f88 100644 --- a/src/composer/src/resources.rs +++ b/src/composer/src/resources.rs @@ -15,7 +15,7 @@ enum CapRes { Comp(ComponentId), } -const BOOT_CAPTBL_FREE: u32 = 52; +const BOOT_CAPTBL_FREE: u32 = 56; // The equivalent of the C __captbl_cap2sz(c) fn cap_sz(cap: &CapRes) -> u32 { diff --git a/src/platform/i386/chal/shared/cos_config.h b/src/platform/i386/chal/shared/cos_config.h index 24636f93bd..b93de51a7c 100644 --- a/src/platform/i386/chal/shared/cos_config.h +++ b/src/platform/i386/chal/shared/cos_config.h @@ -17,7 +17,7 @@ #include "cpu_ghz.h" -#define NUM_CPU 1 +#define NUM_CPU 2 #define NUM_CPU_BMP_BYTES ((NUM_CPU + 7) / 8) #define NUM_CPU_BMP_WORDS ((NUM_CPU_BMP_BYTES + 3) / 4) /* From 1a9d9c20acb7baa0f08df19c7e5216de933a31fa Mon Sep 17 00:00:00 2001 From: betahxy Date: Fri, 15 Mar 2024 00:00:00 -0400 Subject: [PATCH 06/60] debug --- composition_scripts/vmm_noop_nf.toml | 48 ++++++++ .../implementation/capmgr/simple/capmgr.c | 12 +- .../implementation/nicmgr/dpdk/Makefile | 2 +- .../implementation/nicmgr/dpdk/init.c | 73 ++++++++---- .../implementation/nicmgr/dpdk/nicmgr.c | 5 +- .../implementation/nicmgr/dpdk/nicmgr.h | 2 +- .../implementation/nicmgr/dpdk/simple_hash.c | 32 ++++++ .../implementation/nicmgr/dpdk/simple_hash.h | 9 ++ .../no_interface/llbooter/llbooter.c | 4 +- .../sched/pfprr_quantum_static/main.c | 10 +- .../{simple_nf1 => noop_nf}/Makefile | 0 .../simple_nf/{simple_nf1 => noop_nf}/main.c | 104 +++++++++++++++++- .../vmm/devices/vpci/virtio_net_io.c | 49 ++++++--- .../implementation/simple_vmm/vmm/netio.c | 28 ++++- .../simple_vmm/vmm/nf_session.h | 5 +- .../simple_vmm/vmm/simple_vmm.c | 41 +++++-- src/components/interface/netio/netio.h | 1 + src/components/interface/netio/stubs/stubs.S | 1 + .../lib/component/arch/x86_64/cos_component.h | 22 ++-- src/components/lib/dpdk/cos_dpdk.c | 2 +- src/components/lib/slm/quantum.c | 2 +- src/components/lib/slm/slm_blkpt.c | 4 +- src/components/lib/vmrt/vmrt.c | 11 +- src/components/lib/vmrt/vmrt.h | 1 + src/kernel/capinv.c | 10 +- src/kernel/include/pgtbl.h | 2 +- src/kernel/include/shared/cos_types.h | 1 + src/platform/i386/boot_comp.c | 4 +- src/platform/i386/chal/shared/cos_config.h | 2 +- src/platform/i386/chal_pgtbl.c | 8 +- src/platform/i386/kernel.c | 17 ++- src/platform/x86_64/vmx/vmx.c | 2 +- tools/run.sh | 2 +- 33 files changed, 410 insertions(+), 106 deletions(-) create mode 100644 composition_scripts/vmm_noop_nf.toml create mode 100644 src/components/implementation/nicmgr/dpdk/simple_hash.c create mode 100644 src/components/implementation/nicmgr/dpdk/simple_hash.h rename src/components/implementation/simple_nf/{simple_nf1 => noop_nf}/Makefile (100%) rename src/components/implementation/simple_nf/{simple_nf1 => noop_nf}/main.c (61%) diff --git a/composition_scripts/vmm_noop_nf.toml b/composition_scripts/vmm_noop_nf.toml new file mode 100644 index 0000000000..17b2a8dd0e --- /dev/null +++ b/composition_scripts/vmm_noop_nf.toml @@ -0,0 +1,48 @@ +[system] +description = "Simple VMM component." + +[[components]] +name = "booter" +img = "no_interface.llbooter" +implements = [{interface = "init"}, {interface = "addr"}] +deps = [{srv = "kernel", interface = "init", variant = "kernel"}] +constructor = "kernel" + +[[components]] +name = "capmgr" +img = "capmgr.simple" +deps = [{srv = "booter", interface = "init"}, {srv = "booter", interface = "addr"}] +implements = [{interface = "capmgr"}, {interface = "init"}, {interface = "memmgr"}, {interface = "capmgr_create"}, {interface = "contigmem"}] +constructor = "booter" +baseaddr = "0x1000000" + +[[components]] +name = "sched" +img = "sched.pfprr_quantum_static" +deps = [{srv = "capmgr", interface = "init"}, {srv = "capmgr", interface = "capmgr"}, {srv = "capmgr", interface = "memmgr"}] +implements = [{interface = "sched"}, {interface = "syncipc"}, {interface = "init"}] +constructor = "booter" +baseaddr = "0x1600000" + +[[components]] +name = "nicmgr" +img = "nicmgr.dpdk" +deps = [{srv = "sched", interface = "sched"}, {srv = "sched", interface = "init"}, {srv = "capmgr", interface = "capmgr_create"}, {srv = "capmgr", interface = "memmgr"}, {srv = "capmgr", interface = "contigmem"}] +implements = [{interface = "nic"}] +constructor = "booter" +baseaddr = "0x6000000" + +[[components]] +name = "vmm" +img = "simple_vmm.vmm" +deps = [{srv = "sched", interface = "sched"}, {srv = "sched", interface = "init"},{srv = "capmgr", interface = "capmgr"}, {srv = "capmgr", interface = "memmgr"}, {srv = "capmgr", interface = "contigmem"}, {srv = "nicmgr", interface = "nic"}] +implements = [{interface = "netio"}] +constructor = "booter" +baseaddr = "0x2000000" + +[[components]] +name = "noop_nf" +img = "simple_nf.noop_nf" +deps = [{srv = "sched", interface = "sched"}, {srv = "sched", interface = "init"},{srv = "capmgr", interface = "capmgr_create"}, {srv = "capmgr", interface = "memmgr"}, {srv = "capmgr", interface = "contigmem"}, {srv = "nicmgr", interface = "nic"}, {srv = "vmm", interface = "netio"}] +constructor = "booter" +baseaddr = "0x9000000" diff --git a/src/components/implementation/capmgr/simple/capmgr.c b/src/components/implementation/capmgr/simple/capmgr.c index 34f3dd29bf..c952089d62 100644 --- a/src/components/implementation/capmgr/simple/capmgr.c +++ b/src/components/implementation/capmgr/simple/capmgr.c @@ -73,12 +73,13 @@ SS_STATIC_SLAB(asnd, struct cm_asnd, MAX_NUM_THREADS); /* 64 MiB */ #define MB2PAGES(mb) (round_up_to_page(mb * 1024 * 1024) / PAGE_SIZE) -#define MM_NPAGES (MB2PAGES(600)) +#define MM_NPAGES (MB2PAGES(6000)) SS_STATIC_SLAB(page, struct mm_page, MM_NPAGES); SS_STATIC_SLAB(span, struct mm_span, MM_NPAGES); -#define CONTIG_PHY_PAGES 70000 -static void * contig_phy_pages = 0; +#define CONTIG_PHY_PAGES 300000 +static u8_t *contig_phy_pages = 0; +static u8_t *max_contig_phy_pages = 0; static struct cm_comp * cm_self(void) @@ -316,7 +317,7 @@ contigmem_alloc(unsigned long npages) contigmem_check(cos_inv_token(), (vaddr_t)vaddr, npages); contig_phy_pages += npages * PAGE_SIZE; - assert((word_t)contig_phy_pages < CONTIG_PHY_PAGES * PAGE_SIZE); + assert((word_t)contig_phy_pages < max_contig_phy_pages + CONTIG_PHY_PAGES * PAGE_SIZE); return vaddr; } @@ -375,7 +376,7 @@ contigmem_shared_alloc_aligned(unsigned long npages, unsigned long align, vaddr_ contigmem_check(cos_inv_token(), (vaddr_t)vaddr, npages); contig_phy_pages += npages * PAGE_SIZE; - assert((word_t)contig_phy_pages < CONTIG_PHY_PAGES * PAGE_SIZE); + assert((word_t)contig_phy_pages < max_contig_phy_pages + CONTIG_PHY_PAGES * PAGE_SIZE); return ret; } @@ -1021,6 +1022,7 @@ cos_init(void) /* Reserve some continuous pages */ contig_phy_pages = crt_page_allocn(&cm_self()->comp, CONTIG_PHY_PAGES); + max_contig_phy_pages = contig_phy_pages; contigmem_check(cos_compid(), (vaddr_t)contig_phy_pages, CONTIG_PHY_PAGES); return; diff --git a/src/components/implementation/nicmgr/dpdk/Makefile b/src/components/implementation/nicmgr/dpdk/Makefile index 23a85febe0..5e19701383 100644 --- a/src/components/implementation/nicmgr/dpdk/Makefile +++ b/src/components/implementation/nicmgr/dpdk/Makefile @@ -9,7 +9,7 @@ INTERFACE_EXPORTS = nic INTERFACE_DEPENDENCIES = netshmem # The library dependencies this component is reliant on for # compilation/linking (this is a list of directory names in lib/) -LIBRARY_DEPENDENCIES = component dpdk shm_bm ck sync +LIBRARY_DEPENDENCIES = component dpdk shm_bm ck sync time # Note: Both the interface and library dependencies should be # *minimal*. That is to say that removing a dependency should cause # the build to fail. The build system does not validate this diff --git a/src/components/implementation/nicmgr/dpdk/init.c b/src/components/implementation/nicmgr/dpdk/init.c index ae5bf5f4c6..1e37ce4658 100644 --- a/src/components/implementation/nicmgr/dpdk/init.c +++ b/src/components/implementation/nicmgr/dpdk/init.c @@ -12,12 +12,14 @@ #include #include #include +#include +#include "simple_hash.h" #include "nicmgr.h" #define ENABLE_DEBUG_INFO 0 -#define NB_RX_DESC_DEFAULT 2048 -#define NB_TX_DESC_DEFAULT 1024 +#define NB_RX_DESC_DEFAULT 512 +#define NB_TX_DESC_DEFAULT 512 #define MAX_PKT_BURST NB_RX_DESC_DEFAULT @@ -170,33 +172,53 @@ process_rx_packets(cos_portid_t port_id, char** rx_pkts, uint16_t nb_pkts) int i, ret; int len = 0; + struct eth_hdr *eth; struct ip_hdr *iph; struct arp_hdr *arp_hdr; struct tcp_udp_port *port; struct client_session *session; + char *pkt; struct pkt_buf buf; for (i = 0; i < nb_pkts; i++) { - cos_get_packet(rx_pkts[i], &len); - - /* TODO: need a policy spefic rule to route packets to different receiving threads*/ - - session = cos_hash_lookup(0); - - if (unlikely(session == NULL)) { - cos_free_packet(rx_pkts[i]); + pkt = cos_get_packet(rx_pkts[i], &len); + eth = (struct eth_hdr *)pkt; + if (likely(htons(eth->ether_type) == 0x0800)) { + iph = (struct ip_hdr *)((char *)eth + sizeof(struct eth_hdr)); + port = (struct tcp_udp_port *)((char *)eth + sizeof(struct eth_hdr) + iph->ihl * 4); + u16_t svc_id = ntohs(port->dst_port); + + session = simple_hash_find(iph->dst_addr, svc_id); + // printc("port:%d, session:%p\n", ntohs(port->dst_port), session); + buf.pkt = rx_pkts[i]; + if (likely(session)) { + if (unlikely(!pkt_ring_buf_enqueue(&(session->pkt_ring_buf), &buf))){ + cos_free_packet(rx_pkts[i]); + rx_enqueued_miss++; + continue; + } + enqueued_rx++; + + } else { + session = simple_hash_find(iph->dst_addr, 0); + if (session) { + if (unlikely(!pkt_ring_buf_enqueue(&(session->pkt_ring_buf), &buf))){ + cos_free_packet(rx_pkts[i]); + rx_enqueued_miss++; + continue; + } + enqueued_rx++; + } else { + rx_enqueued_miss++; + cos_free_packet(rx_pkts[i]); + continue; + } + } + } else { + cos_free_packet(buf.pkt); continue; } - buf.pkt = rx_pkts[i]; - - if (unlikely(!pkt_ring_buf_enqueue(&(session->pkt_ring_buf), &buf))){ - cos_free_packet(buf.pkt); - rx_enqueued_miss++; - continue; - } - enqueued_rx++; - // sync_sem_give(&session->sem); } } @@ -272,7 +294,9 @@ cos_nic_start(){ if (nb_pkts != 0) { process_rx_packets(0, rx_packets, nb_pkts); } else { - sched_thd_block_timeout(0, ps_tsc() + 2000*1); + // sched_thd_block_timeout(0, ps_tsc() + 2000*10); + sched_thd_block_timeout(0, time_now() + time_usec2cyc(1)); + // sched_thd_block(0); } } } @@ -293,8 +317,8 @@ cos_nic_init(void) * set max_mbufs 2 times than nb_rx_desc, so that there is enough room * to store packets, or this will fail if nb_rx_desc <= max_mbufs. */ - const size_t max_rx_mbufs = 8 * nb_rx_desc; - const size_t max_tx_mbufs = 2 * nb_tx_desc; + const size_t max_rx_mbufs = 20 * nb_rx_desc; + const size_t max_tx_mbufs = 30 * nb_tx_desc; memset(rx_per_core_mpool_name, 0, sizeof(rx_per_core_mpool_name)); memset(tx_per_core_mpool_name, 0, sizeof(tx_per_core_mpool_name)); @@ -308,7 +332,7 @@ cos_nic_init(void) "--log-level", "*:info", /* log level can be changed to *debug* if needed, this will print lots of information */ "-m", - "128", /* total memory used by dpdk memory subsystem, such as mempool */ + "512", /* total memory used by dpdk memory subsystem, such as mempool */ }; argc = ARRAY_SIZE(argv); @@ -365,7 +389,8 @@ cos_init(void) printc("nicmgr init...\n"); #if 1 cos_nic_init(); - cos_hash_init(); + // cos_hash_init(); + simple_hash_init(); #ifdef USE_CK_RING_FREE_MBUF pkt_ring_buf_init(&g_free_ring, FREE_PKT_RBUF_NUM, FREE_PKT_RING_SZ); #endif diff --git a/src/components/implementation/nicmgr/dpdk/nicmgr.c b/src/components/implementation/nicmgr/dpdk/nicmgr.c index e88f1df9c9..b466ae71d6 100644 --- a/src/components/implementation/nicmgr/dpdk/nicmgr.c +++ b/src/components/implementation/nicmgr/dpdk/nicmgr.c @@ -12,6 +12,7 @@ #include #include #include "nicmgr.h" +#include "simple_hash.h" extern volatile int debug_flag; @@ -183,6 +184,7 @@ ext_buf_free_callback_fn(void *addr, void *opaque) { /* Shared mem uses borrow api, thus do not need to free it here */ if (addr != NULL) { + // printc("???????????????????????????????????\n"); shm_bm_free_net_pkt_buf(addr); } else { printc("External buffer address is invalid\n"); @@ -375,7 +377,8 @@ nic_bind_port(u32_t ip_addr, u16_t port) client_sessions[thd].shemem_info.shmid = shmid; client_sessions[thd].shemem_info.shm = shm; client_sessions[thd].shemem_info.paddr = paddr; - cos_hash_add(client_sessions[thd].port, &client_sessions[thd]); + // cos_hash_add(client_sessions[thd].port, &client_sessions[thd]); + simple_hash_add(client_sessions[thd].ip_addr, client_sessions[thd].port, &client_sessions[thd]); sync_sem_init(&client_sessions[thd].sem, 0); diff --git a/src/components/implementation/nicmgr/dpdk/nicmgr.h b/src/components/implementation/nicmgr/dpdk/nicmgr.h index 6bc416d497..2a802b53b1 100644 --- a/src/components/implementation/nicmgr/dpdk/nicmgr.h +++ b/src/components/implementation/nicmgr/dpdk/nicmgr.h @@ -7,7 +7,7 @@ #include #include -#define NIC_MAX_SESSION 512 +#define NIC_MAX_SESSION 2000 #define NIC_MAX_SHEMEM_REGION 3 #define NIC_SHMEM_RX 0 diff --git a/src/components/implementation/nicmgr/dpdk/simple_hash.c b/src/components/implementation/nicmgr/dpdk/simple_hash.c new file mode 100644 index 0000000000..0113890abe --- /dev/null +++ b/src/components/implementation/nicmgr/dpdk/simple_hash.c @@ -0,0 +1,32 @@ +#pragma once + +#include +#include + +static void *g_hash_tbl[MAX_IP][MAX_PORT]; + +void +simple_hash_add(u32_t ip, u16_t port, void *data) { + if (!g_hash_tbl[ip % MAX_IP][port]) { + g_hash_tbl[ip % MAX_IP][port] = data; + } else { + printc("hash conflict:ip, port\n", ip, port); + assert(0); + } +} + +void +simple_hash_init(void) +{ + for (int i = 0; i < MAX_IP; i++) { + for (int j = 0; j < MAX_PORT; j++) { + g_hash_tbl[i][j] = 0; + } + } +} + +void * +simple_hash_find(u32_t ip, u16_t port) { + if (port > MAX_PORT) return NULL; + return g_hash_tbl[ip % MAX_IP][port]; +} diff --git a/src/components/implementation/nicmgr/dpdk/simple_hash.h b/src/components/implementation/nicmgr/dpdk/simple_hash.h new file mode 100644 index 0000000000..77e653c2f5 --- /dev/null +++ b/src/components/implementation/nicmgr/dpdk/simple_hash.h @@ -0,0 +1,9 @@ +#include + +#define MAX_IP 10 +#define MAX_PORT 1000 + + +void simple_hash_init(void); +void simple_hash_add(u32_t ip, u16_t port, void *data); +void *simple_hash_find(u32_t ip, u16_t port); diff --git a/src/components/implementation/no_interface/llbooter/llbooter.c b/src/components/implementation/no_interface/llbooter/llbooter.c index c5c813203e..b0a2537b5c 100644 --- a/src/components/implementation/no_interface/llbooter/llbooter.c +++ b/src/components/implementation/no_interface/llbooter/llbooter.c @@ -32,7 +32,7 @@ #define INITARGS_MAX_PATHNAME 512 #endif #ifndef BOOTER_CAPMGR_MB -#define BOOTER_CAPMGR_MB 600 +#define BOOTER_CAPMGR_MB 3000 #endif #ifndef BOOTER_MAX_CHKPT #define BOOTER_MAX_CHKPT 64 @@ -428,7 +428,7 @@ comps_init(void) int keylen; struct crt_comp_exec_context ctxt = { 0 }; /* TODO: generalize. Give the capmgr 64MB for now. */ - size_t mem = BOOTER_CAPMGR_MB * 1024 * 1024; + size_t mem = (unsigned long)BOOTER_CAPMGR_MB * 1024 * 1024; printc("Capability manager memory delegation (%d capmgrs): %ld bytes.\n", args_len(&comps), (unsigned long)mem); diff --git a/src/components/implementation/sched/pfprr_quantum_static/main.c b/src/components/implementation/sched/pfprr_quantum_static/main.c index dd86a9dd29..60807005e3 100644 --- a/src/components/implementation/sched/pfprr_quantum_static/main.c +++ b/src/components/implementation/sched/pfprr_quantum_static/main.c @@ -158,7 +158,7 @@ sched_thd_yield(void) slm_cs_enter(current, SLM_CS_NONE); slm_sched_yield(current, 0); - ret = slm_cs_exit_reschedule(current, SLM_CS_NONE); + ret = slm_cs_exit_reschedule(current, SLM_CS_CHECK_TIMEOUT); return ret; } @@ -180,8 +180,8 @@ thd_block(void) slm_cs_enter(current, SLM_CS_NONE); ret = slm_thd_block(current); - if (!ret) ret = slm_cs_exit_reschedule(current, SLM_CS_NONE); - else slm_cs_exit(NULL, SLM_CS_NONE); + if (!ret) ret = slm_cs_exit_reschedule(current, SLM_CS_CHECK_TIMEOUT); + else slm_cs_exit(NULL, SLM_CS_CHECK_TIMEOUT); return ret; } @@ -207,7 +207,7 @@ thd_wakeup(struct slm_thd *t) return ret; } - return slm_cs_exit_reschedule(current, SLM_CS_NONE); + return slm_cs_exit_reschedule(current, SLM_CS_CHECK_TIMEOUT); } int @@ -240,7 +240,7 @@ thd_block_until(cycles_t timeout) slm_timer_cancel(current); } done: - ret = slm_cs_exit_reschedule(current, SLM_CS_NONE); + ret = slm_cs_exit_reschedule(current, SLM_CS_CHECK_TIMEOUT); /* cleanup stale timeouts (e.g. if we were woken outside of the timer) */ slm_timer_cancel(current); } diff --git a/src/components/implementation/simple_nf/simple_nf1/Makefile b/src/components/implementation/simple_nf/noop_nf/Makefile similarity index 100% rename from src/components/implementation/simple_nf/simple_nf1/Makefile rename to src/components/implementation/simple_nf/noop_nf/Makefile diff --git a/src/components/implementation/simple_nf/simple_nf1/main.c b/src/components/implementation/simple_nf/noop_nf/main.c similarity index 61% rename from src/components/implementation/simple_nf/simple_nf1/main.c rename to src/components/implementation/simple_nf/noop_nf/main.c index 2b054a5545..bedfc8f8fb 100644 --- a/src/components/implementation/simple_nf/simple_nf1/main.c +++ b/src/components/implementation/simple_nf/noop_nf/main.c @@ -7,7 +7,7 @@ #include #include -#define NF_THD_PRIORITY 2 +#define NF_THD_PRIORITY 31 thdid_t rx_tid = 0; thdid_t tx_tid = 0; @@ -21,6 +21,7 @@ char rx_nf_buffer[4096]; #define RX_PROCESSING 0 #define TX_PROCESSING 0 +#if 0 static void tx_task(void) { @@ -68,6 +69,10 @@ tx_task(void) } } +#endif + +#if 0 + static void rx_task(void) { @@ -119,6 +124,100 @@ rx_task(void) #endif } } +#endif + +static void +rx_task(void) +{ + shm_bm_objid_t objid; + struct netshmem_pkt_buf *rx_obj; + shm_bm_objid_t first_objid; + struct netshmem_pkt_buf *first_obj; + struct netshmem_pkt_pri *first_obj_pri; + struct netshmem_meta_tuple *pkt_arr; + u16_t pkt_len; + u32_t ip; + + u8_t batch_ct = 50; + + netio_shmem_map(netshmem_get_shm_id()); + nic_shmem_map(netshmem_get_shm_id()); + + ip = inet_addr("10.10.1.2"); + nic_bind_port(ip, 70); + + int i = 0; + u64_t times = 0; + u64_t overhead = 0; + + shm_bm_t rx_shmemd = 0; + + rx_shmemd = netshmem_get_shm(); + assert(rx_shmemd); + + while(1) + { + u8_t rx_batch_ct = 0; +#if !RX_BATCH + objid = nic_get_a_packet(&pkt_len); + netio_send_packet(objid, pkt_len); +#else + first_objid = nic_get_a_packet_batch(batch_ct); + + first_obj = shm_bm_transfer_net_pkt_buf(rx_shmemd, first_objid); + first_obj_pri = netshmem_get_pri(first_obj); + pkt_arr = (struct netshmem_meta_tuple *)&(first_obj_pri->pkt_arr); + rx_batch_ct = first_obj_pri->batch_len; +#if RX_PROCESSING + for (u8_t i = 0; i < rx_batch_ct; i++) { + pkt_len = pkt_arr[i].pkt_len; + objid = pkt_arr[i].obj_id; + rx_obj = shm_bm_transfer_net_pkt_buf(rx_shmemd, objid); + memcpy(rx_nf_buffer, netshmem_get_data_buf(rx_obj), pkt_len); + } +#endif + + netio_send_packet_batch(first_objid); +#endif + } +} + +static void +tx_task(void) +{ + u16_t pkt_len; + shm_bm_objid_t objid; + + netio_shmem_map(netshmem_get_shm_id()); + nic_shmem_map(netshmem_get_shm_id()); + + shm_bm_objid_t first_objid; + struct netshmem_pkt_buf *first_obj; + struct netshmem_pkt_pri *first_obj_pri; + struct netshmem_meta_tuple *pkt_arr; + u8_t tx_batch_ct = 0; + struct netshmem_pkt_buf *tx_obj; + u32_t ip; + + shm_bm_t tx_shmemd = 0; + tx_shmemd = netshmem_get_shm(); + assert(tx_shmemd); + + ip = inet_addr("10.10.1.2"); + nic_bind_port(ip, 71); + + int svc_id = 70; + + netio_svc_update(svc_id, 0); + + while(1) { + u8_t batch_ct = 32; + + first_objid = objid = netio_get_a_packet_batch(batch_ct); + + nic_send_packet_batch(first_objid); + } +} void cos_init(void) @@ -144,8 +243,11 @@ parallel_main(coreid_t cid) if (cid == 0) { sched_thd_param_set(rx_tid, sched_param_pack(SCHEDP_PRIO, NF_THD_PRIORITY)); sched_thd_param_set(tx_tid, sched_param_pack(SCHEDP_PRIO, NF_THD_PRIORITY)); + } else { + } + sched_thd_block(0); return 0; } diff --git a/src/components/implementation/simple_vmm/vmm/devices/vpci/virtio_net_io.c b/src/components/implementation/simple_vmm/vmm/devices/vpci/virtio_net_io.c index b448e19668..a7cb01e978 100644 --- a/src/components/implementation/simple_vmm/vmm/devices/vpci/virtio_net_io.c +++ b/src/components/implementation/simple_vmm/vmm/devices/vpci/virtio_net_io.c @@ -38,6 +38,7 @@ #include #include #include +#include /* TODO: remove this warning flag when virtio-net is done */ @@ -365,6 +366,10 @@ virtio_net_rcv_one_pkt(void *data, int pkt_len) u16_t idx; int ret; struct vmrt_vm_comp *vm = get_vm_from_mac(data); + if (unlikely(vm == NULL)) { + printc("vm not exist\n"); + return; + } assert(vm); vq = get_virtio_net_vqs(vm, VIRTIO_NET_RXQ); @@ -484,24 +489,24 @@ virtio_net_inb(u32_t port_id, struct vmrt_vm_vcpu *vcpu) break; /* TODO: read mac address from virtio-net config space */ case VIRTIO_NET_MAC: - vm_mac_tbl_update(vcpu->vm->comp_id, vcpu->vm); - vcpu->shared_region->ax = virtio_net_mac[vcpu->vm->comp_id][0]; + vm_mac_tbl_update(vcpu->vm->vm_mac_id, vcpu->vm); + vcpu->shared_region->ax = virtio_net_mac[vcpu->vm->vm_mac_id][0]; mac_to_vm[vcpu->vm->comp_id] = vcpu->vm; break; case VIRTIO_NET_MAC1: - vcpu->shared_region->ax = virtio_net_mac[vcpu->vm->comp_id][1]; + vcpu->shared_region->ax = virtio_net_mac[vcpu->vm->vm_mac_id][1]; break; case VIRTIO_NET_MAC2: - vcpu->shared_region->ax = virtio_net_mac[vcpu->vm->comp_id][2]; + vcpu->shared_region->ax = virtio_net_mac[vcpu->vm->vm_mac_id][2]; break; case VIRTIO_NET_MAC3: - vcpu->shared_region->ax = virtio_net_mac[vcpu->vm->comp_id][3]; + vcpu->shared_region->ax = virtio_net_mac[vcpu->vm->vm_mac_id][3]; break; case VIRTIO_NET_MAC4: - vcpu->shared_region->ax = virtio_net_mac[vcpu->vm->comp_id][4]; + vcpu->shared_region->ax = virtio_net_mac[vcpu->vm->vm_mac_id][4]; break; case VIRTIO_NET_MAC5: - vcpu->shared_region->ax = virtio_net_mac[vcpu->vm->comp_id][5]; + vcpu->shared_region->ax = virtio_net_mac[vcpu->vm->vm_mac_id][5]; break; default: VM_PANIC(vcpu); @@ -543,6 +548,8 @@ virtio_net_outw(u32_t port_id, struct vmrt_vm_vcpu *vcpu) case VIRTIO_NET_QUEUE_NOTIFY: if (val == VIRTIO_NET_TXQ) { sched_thd_wakeup(vcpu->vm->tx_thd); + // void virtio_tx_task(void *data); + // virtio_tx_task(vcpu->vm); } get_virtio_net_regs(vcpu)->header.queue_notify = val; break; @@ -659,6 +666,8 @@ virtio_tx_task(void *data) while (1) { while (!vq_has_descs(vq)) { sched_thd_block(0); + // sched_thd_yield(); + // return; } vcpu = vq->vcpu; @@ -702,23 +711,29 @@ virtio_tx_task(void *data) printc("udp svc id:%u\n", svc_id); assert(0); - } - + } session = get_nf_session(vm, svc_id); tx_shmemd = session->tx_shmemd; assert(tx_shmemd); if (tx_shmemd != 0) { tx_obj = shm_bm_alloc_net_pkt_buf(tx_shmemd, &tx_pktid); - assert(tx_obj); - buf.objid = tx_pktid; - buf.pkt_len = plen; - buf.obj = tx_obj; - memcpy(netshmem_get_data_buf(tx_obj), pkt, plen); - if (unlikely(!nf_tx_ring_buf_enqueue(&(session->nf_tx_ring_buf), &buf))){ - shm_bm_free_net_pkt_buf(tx_obj); + + if (likely(tx_obj != NULL)){ + buf.objid = tx_pktid; + buf.pkt_len = plen; + buf.obj = tx_obj; + memcpy(netshmem_get_data_buf(tx_obj), pkt, plen); + if ((unlikely(!nf_tx_ring_buf_enqueue(&(session->nf_tx_ring_buf), &buf)))){ + shm_bm_free_net_pkt_buf(tx_obj); + sched_thd_yield(); + } else { + // sched_thd_wakeup(session->tx_thd); + // sync_sem_give(&session->tx_sem); + } } else { - sched_thd_wakeup(session->tx_thd); + printc("cannot allocate objects\n"); + assert(0); } } diff --git a/src/components/implementation/simple_vmm/vmm/netio.c b/src/components/implementation/simple_vmm/vmm/netio.c index af8974a447..a37dd7f962 100644 --- a/src/components/implementation/simple_vmm/vmm/netio.c +++ b/src/components/implementation/simple_vmm/vmm/netio.c @@ -5,6 +5,7 @@ #include #include #include +#include shm_bm_objid_t netio_get_a_packet(u16_t *pkt_len) @@ -168,9 +169,10 @@ netio_get_a_packet_batch(u8_t batch_limit) session = get_nf_session(vm, svc_id); + // sync_sem_take(&session->tx_sem); while (nf_tx_ring_buf_empty(&session->nf_tx_ring_buf)) { - // sched_thd_yield(); - sched_thd_block(0); + sched_thd_yield(); + // sched_thd_block(0); } assert(nf_tx_ring_buf_dequeue(&session->nf_tx_ring_buf, &buf)); @@ -186,6 +188,7 @@ netio_get_a_packet_batch(u8_t batch_limit) batch_ct++; while (batch_ct < batch_limit && nf_tx_ring_buf_dequeue(&session->nf_tx_ring_buf, &buf)) { + // printc("netio out a pkt, batch_ct:%d\n", batch_ct); pkt_arr[batch_ct].obj_id = buf.objid; pkt_arr[batch_ct].pkt_len = buf.pkt_len; batch_ct++; @@ -255,3 +258,24 @@ netio_shmem_map(cbuf_t shm_id) { netshmem_map_shmem(shm_id); } + +extern struct vmrt_vm_comp *vm_list[2]; + +void +netio_svc_update(int svc_id, u32_t vm) +{ + compid_t nf_id = cos_inv_token(); + thdid_t thd = cos_thdid(); + assert(vm < 2); + shm_bm_t tx_shm = netshmem_get_shm(); + assert(tx_shm); + + nf_svc_update(nf_id, thd, svc_id, vm_list[vm]); + + struct nf_session *session; + session = get_nf_session(vm_list[vm], svc_id); + nf_session_tx_update(session, tx_shm, thd); + sync_sem_init(&session->tx_sem, 0); + + nf_tx_ring_buf_init(&session->nf_tx_ring_buf, NF_TX_PKT_RBUF_NUM, NF_TX_PKT_RING_SZ); +} diff --git a/src/components/implementation/simple_vmm/vmm/nf_session.h b/src/components/implementation/simple_vmm/vmm/nf_session.h index ee00626432..74abaaf252 100644 --- a/src/components/implementation/simple_vmm/vmm/nf_session.h +++ b/src/components/implementation/simple_vmm/vmm/nf_session.h @@ -1,6 +1,7 @@ #include #include #include +#include struct nf_pkt_meta_data { void *obj; @@ -20,10 +21,12 @@ struct nf_session { thdid_t rx_thd; thdid_t tx_thd; + struct sync_sem tx_sem; + struct nf_tx_ring_buf nf_tx_ring_buf; }; -#define NF_TX_PKT_RBUF_NUM 512 +#define NF_TX_PKT_RBUF_NUM 32 #define NF_TX_PKT_RBUF_SZ (NF_TX_PKT_RBUF_NUM * sizeof(struct nf_tx_ring_buf)) #define NF_TX_PKT_RING_SZ (sizeof(struct ck_ring) + NF_TX_PKT_RBUF_SZ) #define NF_TX_PKT_RING_PAGES (round_up_to_page(NF_TX_PKT_RING_SZ)/PAGE_SIZE) diff --git a/src/components/implementation/simple_vmm/vmm/simple_vmm.c b/src/components/implementation/simple_vmm/vmm/simple_vmm.c index 1343cf661c..b79792e225 100644 --- a/src/components/implementation/simple_vmm/vmm/simple_vmm.c +++ b/src/components/implementation/simple_vmm/vmm/simple_vmm.c @@ -22,8 +22,10 @@ #include #include #include +#include +#include -#define NF_THD_PRIORITY 2 +#define NF_THD_PRIORITY 31 #define NO_NF_TEST 1 @@ -49,8 +51,10 @@ INCBIN(bios, "guest/guest.img") static struct vmrt_vm_comp *g_vm; static struct vmrt_vm_comp *g_vm1; +struct vmrt_vm_comp *vm_list[2] = {0}; + #define VM_MAX_COMPS (2) -#define GUEST_MEM_SZ (100*1024*1024) +#define GUEST_MEM_SZ (310*1024*1024) SS_STATIC_SLAB(vm_comp, struct vmrt_vm_comp, VM_MAX_COMPS); SS_STATIC_SLAB(vm_lapic, struct acrn_vlapic, VM_MAX_COMPS * VMRT_VM_MAX_VCPU); @@ -60,9 +64,21 @@ SS_STATIC_SLAB(vcpu_mmio_req, struct acrn_mmio_request, VM_MAX_COMPS * VMRT_VM_M struct sync_lock vm_boot_lock; +static int pause = 0; +static int hlt = 0; + void pause_handler(struct vmrt_vm_vcpu *vcpu) { + // printc("paused %d\n", pause++); + sched_thd_yield(); + GOTO_NEXT_INST(vcpu->shared_region); +} + +void +hlt_handler(struct vmrt_vm_vcpu *vcpu) +{ + // printc("hlt %d\n", hlt++); sched_thd_yield(); GOTO_NEXT_INST(vcpu->shared_region); } @@ -223,12 +239,14 @@ rx_task(void) struct netshmem_pkt_pri *first_obj_pri; struct netshmem_meta_tuple *pkt_arr; u16_t pkt_len; + u32_t ip; u8_t batch_ct = 50; // netio_shmem_map(netshmem_get_shm_id()); nic_shmem_map(netshmem_get_shm_id()); - nic_bind_port(0, 0); + ip = inet_addr("10.10.1.2"); + nic_bind_port(ip, 0); int i = 0; u64_t times = 0; @@ -278,11 +296,13 @@ tx_task(void) struct netshmem_meta_tuple *pkt_arr; u8_t tx_batch_ct = 0; struct netshmem_pkt_buf *tx_obj; + u32_t ip; shm_bm_t tx_shmemd = 0; tx_shmemd = netshmem_get_shm(); + ip = inet_addr("10.10.1.2"); - nic_bind_port(0, 1); + nic_bind_port(ip, 1); int svc_id = 0; nf_svc_update(cos_compid(), cos_thdid(), svc_id, g_vm); @@ -290,6 +310,7 @@ tx_task(void) struct nf_session *session; session = get_nf_session(g_vm, svc_id); nf_session_tx_update(session, tx_shmemd, cos_thdid()); + sync_sem_init(&session->tx_sem, 0); nf_tx_ring_buf_init(&session->nf_tx_ring_buf, NF_TX_PKT_RBUF_NUM, NF_TX_PKT_RING_SZ); @@ -312,12 +333,16 @@ cos_init(void) struct vmrt_vm_vcpu *vcpu; g_vm = vm_comp_create(); printc("created vm done:%d, %p\n", g_vm->comp_id, g_vm); + g_vm->vm_mac_id = 0; g_vm1 = vm_comp_create(); + g_vm1->vm_mac_id = 1; sync_lock_init(&vm_boot_lock); printc("creating vm1 done:%d, %p\n", g_vm1->comp_id, g_vm1); + vm_list[0] = g_vm; + vm_list[1] = g_vm1; } void @@ -372,10 +397,10 @@ parallel_main(coreid_t cid) #endif } else if(cid == 1) { /* wait for the first vm to start */ - sched_thd_block_timeout(0, time_now() + time_usec2cyc(10000000)); - printc("----------------------STARTING SECOND VM----------------------\n"); - vcpu = vmrt_get_vcpu(g_vm1, 0); - vmrt_vm_vcpu_start(vcpu); + // sched_thd_block_timeout(0, time_now() + time_usec2cyc(10000000)); + // printc("----------------------STARTING SECOND VM----------------------\n"); + // vcpu = vmrt_get_vcpu(g_vm1, 0); + // vmrt_vm_vcpu_start(vcpu); } while (1) diff --git a/src/components/interface/netio/netio.h b/src/components/interface/netio/netio.h index 59913e62ec..69c3c6dc00 100644 --- a/src/components/interface/netio/netio.h +++ b/src/components/interface/netio/netio.h @@ -11,5 +11,6 @@ int netio_send_packet(shm_bm_objid_t pktid, u16_t pkt_len); int netio_send_packet_batch(shm_bm_objid_t pktid); shm_bm_objid_t netio_get_a_packet_batch(u8_t batch_limit); void netio_shmem_map(cbuf_t shm_id); +void netio_svc_update(int svc_id, u32_t vm); #endif diff --git a/src/components/interface/netio/stubs/stubs.S b/src/components/interface/netio/stubs/stubs.S index 3cf49d7982..23ce82e4bf 100644 --- a/src/components/interface/netio/stubs/stubs.S +++ b/src/components/interface/netio/stubs/stubs.S @@ -5,3 +5,4 @@ cos_asm_stub(netio_send_packet) cos_asm_stub(netio_send_packet_batch) cos_asm_stub(netio_get_a_packet_batch) cos_asm_stub(netio_shmem_map) +cos_asm_stub(netio_svc_update) \ No newline at end of file diff --git a/src/components/lib/component/arch/x86_64/cos_component.h b/src/components/lib/component/arch/x86_64/cos_component.h index 1c5b0294b5..d03ff79d3f 100644 --- a/src/components/lib/component/arch/x86_64/cos_component.h +++ b/src/components/lib/component/arch/x86_64/cos_component.h @@ -25,11 +25,11 @@ void libc_init(); char *cos_initargs_tar(); /* temporary */ -static inline int +static inline sword_t call_cap_asm(u32_t cap_no, u32_t op, word_t arg1, word_t arg2, word_t arg3, word_t arg4) { long fault = 0; - int ret; + sword_t ret; /* * We use this frame ctx to save bp(frame pointer) and sp(stack pointer) @@ -77,11 +77,11 @@ call_cap_asm(u32_t cap_no, u32_t op, word_t arg1, word_t arg2, word_t arg3, word return ret; } -static inline int +static inline sword_t call_cap_retvals_asm(u32_t cap_no, u32_t op, word_t arg1, word_t arg2, word_t arg3, word_t arg4, word_t *r1, word_t *r2, word_t *r3) { long fault = 0; - int ret; + sword_t ret; /* * We use this frame ctx to save bp(frame pointer) and sp(stack pointer) * before it goes into the kernel through syscall. @@ -180,32 +180,32 @@ call_cap_2retvals_asm(u32_t cap_no, u32_t op, word_t arg1, word_t arg2, word_t a return ret; } -static inline int +static inline sword_t cap_switch_thd(u32_t cap_no) { return call_cap_asm(cap_no, 0, 0, 0, 0, 0); } -static inline int +static inline sword_t call_cap(u32_t cap_no, word_t arg1, word_t arg2, word_t arg3, word_t arg4) { return call_cap_asm(cap_no, 0, arg1, arg2, arg3, arg4); } -static inline int +static inline sword_t call_cap_op(u32_t cap_no, u32_t op_code, word_t arg1, word_t arg2, word_t arg3, word_t arg4) { return call_cap_asm(cap_no, op_code, arg1, arg2, arg3, arg4); } -static int +static sword_t cos_print(char *s, int len) { u32_t *s_ints = (u32_t *)s; return call_cap(PRINT_CAP_TEMP, s_ints[0], s_ints[1], s_ints[2], len); } -static inline int +static inline sword_t cos_sinv(struct usr_inv_cap *uc, word_t arg1, word_t arg2, word_t arg3, word_t arg4) { word_t r1, r2; @@ -215,7 +215,7 @@ cos_sinv(struct usr_inv_cap *uc, word_t arg1, word_t arg2, word_t arg3, word_t a return call_cap_op(uc->cap_no, 0, arg1, arg2, arg3, arg4); } -static inline int +static inline sword_t cos_sinv_2rets(struct usr_inv_cap *uc, word_t arg1, word_t arg2, word_t arg3, word_t arg4, word_t *ret1, word_t *ret2) { if (likely(uc->alt_fn)) return (uc->alt_fn)(arg1, arg2, arg3, arg4, ret1, ret2); @@ -223,7 +223,7 @@ cos_sinv_2rets(struct usr_inv_cap *uc, word_t arg1, word_t arg2, word_t arg3, wo return call_cap_2retvals_asm(uc->cap_no, 0, arg1, arg2, arg3, arg4, ret1, ret2); } -static inline int +static inline sword_t cos_sinv_rets(u32_t sinv, word_t arg1, word_t arg2, word_t arg3, word_t arg4, word_t *ret1, word_t *ret2, word_t *ret3) { return call_cap_retvals_asm(sinv, 0, arg1, arg2, arg3, arg4, ret1, ret2, ret3); diff --git a/src/components/lib/dpdk/cos_dpdk.c b/src/components/lib/dpdk/cos_dpdk.c index 2e5d9067be..2ff097b85d 100644 --- a/src/components/lib/dpdk/cos_dpdk.c +++ b/src/components/lib/dpdk/cos_dpdk.c @@ -302,7 +302,7 @@ cos_dev_port_tx_queue_setup(cos_portid_t port_id, uint16_t tx_queue_id, assert(dev_info.tx_offload_capa & DEV_TX_OFFLOAD_UDP_CKSUM); #endif - txq_conf.tx_free_thresh = nb_tx_desc - 32; + // txq_conf.tx_free_thresh = nb_tx_desc - 32; /* set the txq to enable IP and UDP offload */ if (ENABLE_OFFLOAD) { txq_conf.offloads |= DEV_TX_OFFLOAD_IPV4_CKSUM; diff --git a/src/components/lib/slm/quantum.c b/src/components/lib/slm/quantum.c index e394eb212a..c3fadf6018 100644 --- a/src/components/lib/slm/quantum.c +++ b/src/components/lib/slm/quantum.c @@ -164,7 +164,7 @@ slm_policy_timer_init(microsec_t period) int slm_timer_quantum_init(void) { - slm_policy_timer_init(130); + slm_policy_timer_init(1000); return 0; } diff --git a/src/components/lib/slm/slm_blkpt.c b/src/components/lib/slm/slm_blkpt.c index 94afb68b7f..ae2f7548c8 100644 --- a/src/components/lib/slm/slm_blkpt.c +++ b/src/components/lib/slm/slm_blkpt.c @@ -101,7 +101,7 @@ slm_blkpt_trigger(sched_blkpt_id_t blkpt, struct slm_thd *current, sched_blkpt_e } ps_lock_release(&m->lock); /* most likely we switch to a woken thread here */ - slm_cs_exit_reschedule(current, SLM_CS_NONE); + slm_cs_exit_reschedule(current, SLM_CS_CHECK_TIMEOUT); return 0; unlock: @@ -156,7 +156,7 @@ slm_blkpt_block(sched_blkpt_id_t blkpt, struct slm_thd *current, sched_blkpt_epo ERR_THROW(0, unlock); } ps_lock_release(&m->lock); - slm_cs_exit_reschedule(current, SLM_CS_NONE); + slm_cs_exit_reschedule(current, SLM_CS_CHECK_TIMEOUT); assert(stacklist_is_removed(&sl)); return 0; diff --git a/src/components/lib/vmrt/vmrt.c b/src/components/lib/vmrt/vmrt.c index c1dbff803c..f5b6493a7c 100644 --- a/src/components/lib/vmrt/vmrt.c +++ b/src/components/lib/vmrt/vmrt.c @@ -400,6 +400,12 @@ ctrl_register_access_handler(struct vmrt_vm_vcpu *vcpu) } } +CWEAKSYMB void +hlt_handler(struct vmrt_vm_vcpu *vcpu) +{ + VM_PANIC(vcpu); +} + static inline void vmrt_handle_reason(struct vmrt_vm_vcpu *vcpu, u64_t reason) { @@ -414,8 +420,7 @@ vmrt_handle_reason(struct vmrt_vm_vcpu *vcpu, u64_t reason) cpuid_handler(vcpu); break; case VM_EXIT_REASON_HLT: - /* TODO: handle hlt exception */ - VM_PANIC(vcpu); + hlt_handler(vcpu); break; case VM_EXIT_REASON_RDTSC: VM_PANIC(vcpu); @@ -468,7 +473,7 @@ void vmrt_vm_vcpu_start(struct vmrt_vm_vcpu *vcpu) { /* This is actually just to "push" the vcpu handler thread into run queue. */ - sched_thd_param_set(vcpu->handler_tid, sched_param_pack(SCHEDP_PRIO, 2)); + sched_thd_param_set(vcpu->handler_tid, sched_param_pack(SCHEDP_PRIO, 31)); } void diff --git a/src/components/lib/vmrt/vmrt.h b/src/components/lib/vmrt/vmrt.h index 6740008807..88e177cce5 100644 --- a/src/components/lib/vmrt/vmrt.h +++ b/src/components/lib/vmrt/vmrt.h @@ -58,6 +58,7 @@ struct vmrt_vm_comp { thdid_t tx_thd; int wire_mode; + u16_t vm_mac_id; }; #define VMRT_GPA2HVA(gpa, vm, offset) ((gpa - offset) + vm->guest_addr) diff --git a/src/kernel/capinv.c b/src/kernel/capinv.c index 51f86e2b1b..af087fb095 100644 --- a/src/kernel/capinv.c +++ b/src/kernel/capinv.c @@ -978,9 +978,9 @@ cap_introspect(struct captbl *ct, capid_t capid, u32_t op, unsigned long *retval #define ENABLE_KERNEL_PRINT -static int composite_syscall_slowpath(struct pt_regs *regs, int *thd_switch); +static sword_t composite_syscall_slowpath(struct pt_regs *regs, int *thd_switch); -COS_SYSCALL __attribute__((section("__ipc_entry"))) int +COS_SYSCALL __attribute__((section("__ipc_entry"))) sword_t composite_syscall_handler(struct pt_regs *regs) { struct cap_header *ch; @@ -994,7 +994,7 @@ composite_syscall_handler(struct pt_regs *regs) * pass it into other functions to avoid redundant lookups. */ struct cos_cpu_local_info *cos_info = cos_cpu_local_info(); - int ret = -ENOENT; + sword_t ret = -ENOENT; int thd_switch = 0; cap = __userregs_getcap(regs); @@ -1075,14 +1075,14 @@ composite_syscall_handler(struct pt_regs *regs) * slowpath: other capability operations, most of which * involve updating the resource tables. */ -static int __attribute__((noinline)) composite_syscall_slowpath(struct pt_regs *regs, int *thd_switch) +static sword_t __attribute__((noinline)) composite_syscall_slowpath(struct pt_regs *regs, int *thd_switch) { struct cap_header * ch; struct captbl * ct; struct thread * thd; capid_t cap, capin; syscall_op_t op; - int ret = -ENOENT; + sword_t ret = -ENOENT; struct cos_cpu_local_info *cos_info = cos_cpu_local_info(); struct comp_info *ci; unsigned long ip, sp; diff --git a/src/kernel/include/pgtbl.h b/src/kernel/include/pgtbl.h index d14c98a207..fa93ce03df 100644 --- a/src/kernel/include/pgtbl.h +++ b/src/kernel/include/pgtbl.h @@ -142,7 +142,7 @@ int chal_pgtbl_cpy(struct captbl *t, capid_t cap_to, capid_t capin_to int chal_pgtbl_cons(struct cap_captbl *ct, struct cap_captbl *ctsub, capid_t expandid, unsigned long depth); int chal_pgtbl_decons(struct cap_header *head, struct cap_header *sub, capid_t pruneid, unsigned long lvl); /* Introspection */ -int chal_pgtbl_introspect(struct cap_header *ch, vaddr_t addr); +word_t chal_pgtbl_introspect(struct cap_header *ch, vaddr_t addr); #endif /* PGTBL_H */ diff --git a/src/kernel/include/shared/cos_types.h b/src/kernel/include/shared/cos_types.h index e09257eb53..ef8fa4ddd5 100644 --- a/src/kernel/include/shared/cos_types.h +++ b/src/kernel/include/shared/cos_types.h @@ -32,6 +32,7 @@ typedef unsigned long word_t; typedef unsigned long long dword_t; +typedef signed long sword_t; typedef u64_t cycles_t; typedef u64_t microsec_t; typedef unsigned long tcap_res_t; diff --git a/src/platform/i386/boot_comp.c b/src/platform/i386/boot_comp.c index a8bcd20349..e81b6d46a9 100644 --- a/src/platform/i386/boot_comp.c +++ b/src/platform/i386/boot_comp.c @@ -146,7 +146,7 @@ boot_pgtbl_expand(struct captbl *ct, capid_t pgdcap, capid_t ptecap, const char pte_cap->lvl = lvl; /* hook the pte into the boot component's page tables */ ret = cap_cons(ct, pgdcap, ptecap, - (capid_t)(user_vaddr + i * (1 << (PAGE_ORDER + (PGTBL_DEPTH - lvl) * PGTBL_ENTRY_ORDER)))); + (user_vaddr + (capid_t)i * (1 << (PAGE_ORDER + (PGTBL_DEPTH - lvl) * PGTBL_ENTRY_ORDER)))); assert(!ret); } } @@ -156,7 +156,7 @@ boot_pgtbl_expand(struct captbl *ct, capid_t pgdcap, capid_t ptecap, const char int boot_pgtbl_mappings_add(struct captbl *ct, capid_t pgdcap, capid_t ptecap, const char *label, void *kern_vaddr, - unsigned long user_vaddr, unsigned int range, int uvm) + unsigned long user_vaddr, u64_t range, int uvm) { int ret; u8_t * ptes; diff --git a/src/platform/i386/chal/shared/cos_config.h b/src/platform/i386/chal/shared/cos_config.h index b93de51a7c..3538596f03 100644 --- a/src/platform/i386/chal/shared/cos_config.h +++ b/src/platform/i386/chal/shared/cos_config.h @@ -61,7 +61,7 @@ #define COS_HW_MMIO_MAX_SZ (1UL << 27) /* Assuming a MAX of 128MB for MMIO. */ #if defined(__x86_64__) #define COS_PHYMEM_MAX_SZ ((1UL << 35) - (1UL << 22) - COS_HW_MMIO_MAX_SZ) /* 1GB - 4MB - MMIO sz */ -#define COS_PHYMEM_END_PA ((1UL << 35) - COS_HW_MMIO_MAX_SZ) /* Maximum usable physical memory */ +#define COS_PHYMEM_END_PA ((1UL << 37) - COS_HW_MMIO_MAX_SZ) /* Maximum usable physical memory */ #else #define COS_PHYMEM_MAX_SZ ((1UL << 30) - (1UL << 22) - COS_HW_MMIO_MAX_SZ) /* 1GB - 4MB - MMIO sz */ #define COS_PHYMEM_END_PA ((1UL << 30) - COS_HW_MMIO_MAX_SZ) /* Maximum usable physical memory */ diff --git a/src/platform/i386/chal_pgtbl.c b/src/platform/i386/chal_pgtbl.c index 399bfdcba5..d0183f64aa 100644 --- a/src/platform/i386/chal_pgtbl.c +++ b/src/platform/i386/chal_pgtbl.c @@ -765,14 +765,14 @@ chal_pgtbl_cons(struct cap_captbl *ct, struct cap_captbl *ctsub, capid_t expandi ret = cos_cas_32((u32_t *)&(((struct cap_pgtbl *)ctsub)->refcnt_flags), old_v, refcnt_flags); if (ret != CAS_SUCCESS) return -ECASFAIL; - new_pte = (u32_t)chal_va2pa( - (void *)((unsigned long)(((struct cap_pgtbl *)ctsub)->pgtbl) & PGTBL_FRAME_MASK)); + new_pte = (u64_t)((chal_va2pa((void *)((struct cap_pgtbl *)ctsub)->pgtbl) & PGTBL_FRAME_MASK)); type = ((struct cap_pgtbl *)ctsub)->type; if (type == PGTBL_TYPE_DEF) { new_pte |= X86_PGTBL_INTERN_DEF; } else if (type == PGTBL_TYPE_EPT) { new_pte |= x86_EPT_INTERN_DEF; + } else { /* Some error has occured in this cap! */ assert(0); @@ -819,12 +819,12 @@ chal_pgtbl_decons(struct cap_header *head, struct cap_header *sub, capid_t prune return 0; } -int +word_t chal_pgtbl_introspect(struct cap_header *ch, vaddr_t addr) { unsigned long *pte; word_t flags; - int ret = 0; + word_t ret = 0; #if defined(__x86_64__) unsigned long *f, old_v; diff --git a/src/platform/i386/kernel.c b/src/platform/i386/kernel.c index 62312f088d..a49de0bdf8 100644 --- a/src/platform/i386/kernel.c +++ b/src/platform/i386/kernel.c @@ -42,7 +42,7 @@ multiboot_mem_parse(struct multiboot_tag *tag) multiboot_memory_map_t *mmap; u8_t * mod_end; u8_t * mem_addr; - unsigned long long mem_len, sz; + unsigned long long mem_len, sz = 0; for (mmap = ((struct multiboot_tag_mmap *) tag)->entries; (multiboot_uint8_t *) mmap < (multiboot_uint8_t *) tag + tag->size; @@ -62,11 +62,18 @@ multiboot_mem_parse(struct multiboot_tag *tag) continue; } /* is this the memory region we'll use for component memory? */ - if (mmap->type == 1 && mod_end >= mem_addr && mod_end < (mem_addr + mem_len)) { - sz = (mem_addr + mem_len) - mod_end; + if (mmap->type == 1 && mem_len > sz) { + if (mod_end > (mem_addr + mem_len)) continue; + if (mod_end > mem_addr) { + sz = (mem_addr + mem_len) - mod_end; + } else { + sz = mem_len; + glb_memlayout.kern_boot_heap = mem_addr; + glb_memlayout.mod_end = mem_addr; + } glb_memlayout.kmem_end = mem_addr + mem_len; - printk("\t memory usable at boot time: %lx (%ld MB + %ld KB)\n", sz, - MEM_MB_ONLY(sz), MEM_KB_ONLY(sz)); + printk("\t memory usable at boot time: %lx (%ld MB + %ld KB) [%lx, %lx)\n", sz, + MEM_MB_ONLY(sz), MEM_KB_ONLY(sz), glb_memlayout.kern_boot_heap, glb_memlayout.kmem_end); } i++; } diff --git a/src/platform/x86_64/vmx/vmx.c b/src/platform/x86_64/vmx/vmx.c index 09c680fd4d..181e703f5d 100644 --- a/src/platform/x86_64/vmx/vmx.c +++ b/src/platform/x86_64/vmx/vmx.c @@ -199,7 +199,7 @@ vmx_procbased_ctl_init(void) u32_t primary_procbased_ctls = 0; u32_t second_procbased_ctls = 0; - primary_procbased_ctls = MWAIT_EXITING | RDPMC_EXITING | USE_TPR_SHADOW + primary_procbased_ctls = HLT_EXITING | MWAIT_EXITING | RDPMC_EXITING | USE_TPR_SHADOW | UNCONDITIONAL_IO_EXITING | USE_MSR_BITMAPS | PAUSE_EXITING | ACTIVATE_SECONDARY_CONTROLS; primary_procbased_ctls = fix_reserved_ctrl_bits(IA32_VMX_TRUE_PROCBASED_CTLS, primary_procbased_ctls); diff --git a/tools/run.sh b/tools/run.sh index 82aa50840c..83e512348b 100755 --- a/tools/run.sh +++ b/tools/run.sh @@ -9,7 +9,7 @@ num_sockets=1 num_cores=16 num_threads=1 vcpus=$[${num_sockets}*${num_cores}*${num_threads}] -mem_size=4096 +mem_size=9000 kvm_flag="" arch=$2 From 6b1098f96b7b57161a5a6db50b1163792ab2a3b5 Mon Sep 17 00:00:00 2001 From: betahxy Date: Mon, 18 Mar 2024 05:00:00 -0400 Subject: [PATCH 07/60] debug --- src/components/Makefile.comp | 1 + .../implementation/nicmgr/dpdk/Makefile | 2 + .../implementation/nicmgr/dpdk/fast_memcpy.h | 689 ++++++++++++++++++ .../implementation/nicmgr/dpdk/init.c | 99 ++- .../implementation/nicmgr/dpdk/nicmgr.c | 7 +- .../implementation/nicmgr/dpdk/simple_hash.c | 2 +- .../sched/pfprr_quantum_static/main.c | 10 +- .../implementation/simple_vmm/vmm/Makefile | 1 + .../vmm/devices/vpci/virtio_net_io.c | 302 ++++---- .../vmm/devices/vpci/virtio_net_io.h | 2 +- .../simple_vmm/vmm/fast_memcpy.h | 689 ++++++++++++++++++ .../implementation/simple_vmm/vmm/netio.c | 13 +- .../simple_vmm/vmm/nf_session.c | 26 +- .../simple_vmm/vmm/nf_session.h | 4 +- .../simple_vmm/vmm/simple_vmm.c | 47 +- src/components/interface/netshmem/netshmem.h | 2 +- src/components/lib/dpdk/Makefile | 4 +- src/components/lib/dpdk/cos_dpdk.c | 5 +- src/components/lib/slm/quantum.c | 2 +- 19 files changed, 1606 insertions(+), 301 deletions(-) create mode 100644 src/components/implementation/nicmgr/dpdk/fast_memcpy.h create mode 100644 src/components/implementation/simple_vmm/vmm/fast_memcpy.h diff --git a/src/components/Makefile.comp b/src/components/Makefile.comp index a4cf3713c7..2b78951a0d 100644 --- a/src/components/Makefile.comp +++ b/src/components/Makefile.comp @@ -23,6 +23,7 @@ CXXFLAGS=-fno-exceptions -fno-threadsafe-statics -Wno-write-strings $(CFLAGS) LDFLAGS=$(ARCH_LDFLAGS) MUSLCFLAGS=$(CFLAGS) -lc -lgcc -Xlinker -r ASFLAGS=$(ARCH_ASFLAGS) $(CINC) $(SHARED_FLAGS) +CFLAGS+= $(COMP_FLAGS) GCC_PIE=$(shell gcc -v 2>&1 | grep -c "\--enable-default-pie") ifeq ($(GCC_PIE),1) diff --git a/src/components/implementation/nicmgr/dpdk/Makefile b/src/components/implementation/nicmgr/dpdk/Makefile index 5e19701383..674068c8b2 100644 --- a/src/components/implementation/nicmgr/dpdk/Makefile +++ b/src/components/implementation/nicmgr/dpdk/Makefile @@ -15,4 +15,6 @@ LIBRARY_DEPENDENCIES = component dpdk shm_bm ck sync time # the build to fail. The build system does not validate this # minimality; that's on you! +COMP_FLAGS= -mavx -mavx2 -mfma + include Makefile.subsubdir diff --git a/src/components/implementation/nicmgr/dpdk/fast_memcpy.h b/src/components/implementation/nicmgr/dpdk/fast_memcpy.h new file mode 100644 index 0000000000..ddd282d4ba --- /dev/null +++ b/src/components/implementation/nicmgr/dpdk/fast_memcpy.h @@ -0,0 +1,689 @@ +//===================================================================== +// +// FastMemcpy.c - skywind3000@163.com, 2015 +// +// feature: +// 50% speed up in avg. vs standard memcpy (tested in vc2012/gcc5.1) +// +//===================================================================== +#ifndef __FAST_MEMCPY_H__ +#define __FAST_MEMCPY_H__ + +#include +#include +#include + + +//--------------------------------------------------------------------- +// force inline for compilers +//--------------------------------------------------------------------- +#ifndef INLINE +#ifdef __GNUC__ +#if (__GNUC__ > 3) || ((__GNUC__ == 3) && (__GNUC_MINOR__ >= 1)) + #define INLINE __inline__ __attribute__((always_inline)) +#else + #define INLINE __inline__ +#endif +#elif defined(_MSC_VER) + #define INLINE __forceinline +#elif (defined(__BORLANDC__) || defined(__WATCOMC__)) + #define INLINE __inline +#else + #define INLINE +#endif +#endif + + + +//--------------------------------------------------------------------- +// fast copy for different sizes +//--------------------------------------------------------------------- +static INLINE void memcpy_sse2_16(void *dst, const void *src) { + __m128i m0 = _mm_loadu_si128(((const __m128i*)src) + 0); + _mm_storeu_si128(((__m128i*)dst) + 0, m0); +} + +static INLINE void memcpy_sse2_32(void *dst, const void *src) { + __m128i m0 = _mm_loadu_si128(((const __m128i*)src) + 0); + __m128i m1 = _mm_loadu_si128(((const __m128i*)src) + 1); + _mm_storeu_si128(((__m128i*)dst) + 0, m0); + _mm_storeu_si128(((__m128i*)dst) + 1, m1); +} + +static INLINE void memcpy_sse2_64(void *dst, const void *src) { + __m128i m0 = _mm_loadu_si128(((const __m128i*)src) + 0); + __m128i m1 = _mm_loadu_si128(((const __m128i*)src) + 1); + __m128i m2 = _mm_loadu_si128(((const __m128i*)src) + 2); + __m128i m3 = _mm_loadu_si128(((const __m128i*)src) + 3); + _mm_storeu_si128(((__m128i*)dst) + 0, m0); + _mm_storeu_si128(((__m128i*)dst) + 1, m1); + _mm_storeu_si128(((__m128i*)dst) + 2, m2); + _mm_storeu_si128(((__m128i*)dst) + 3, m3); +} + +static INLINE void memcpy_sse2_128(void *dst, const void *src) { + __m128i m0 = _mm_loadu_si128(((const __m128i*)src) + 0); + __m128i m1 = _mm_loadu_si128(((const __m128i*)src) + 1); + __m128i m2 = _mm_loadu_si128(((const __m128i*)src) + 2); + __m128i m3 = _mm_loadu_si128(((const __m128i*)src) + 3); + __m128i m4 = _mm_loadu_si128(((const __m128i*)src) + 4); + __m128i m5 = _mm_loadu_si128(((const __m128i*)src) + 5); + __m128i m6 = _mm_loadu_si128(((const __m128i*)src) + 6); + __m128i m7 = _mm_loadu_si128(((const __m128i*)src) + 7); + _mm_storeu_si128(((__m128i*)dst) + 0, m0); + _mm_storeu_si128(((__m128i*)dst) + 1, m1); + _mm_storeu_si128(((__m128i*)dst) + 2, m2); + _mm_storeu_si128(((__m128i*)dst) + 3, m3); + _mm_storeu_si128(((__m128i*)dst) + 4, m4); + _mm_storeu_si128(((__m128i*)dst) + 5, m5); + _mm_storeu_si128(((__m128i*)dst) + 6, m6); + _mm_storeu_si128(((__m128i*)dst) + 7, m7); +} + + +//--------------------------------------------------------------------- +// tiny memory copy with jump table optimized +//--------------------------------------------------------------------- +static INLINE void *memcpy_tiny(void *dst, const void *src, size_t size) { + unsigned char *dd = ((unsigned char*)dst) + size; + const unsigned char *ss = ((const unsigned char*)src) + size; + + switch (size) { + case 64: + memcpy_sse2_64(dd - 64, ss - 64); + case 0: + break; + + case 65: + memcpy_sse2_64(dd - 65, ss - 65); + case 1: + dd[-1] = ss[-1]; + break; + + case 66: + memcpy_sse2_64(dd - 66, ss - 66); + case 2: + *((uint16_t*)(dd - 2)) = *((uint16_t*)(ss - 2)); + break; + + case 67: + memcpy_sse2_64(dd - 67, ss - 67); + case 3: + *((uint16_t*)(dd - 3)) = *((uint16_t*)(ss - 3)); + dd[-1] = ss[-1]; + break; + + case 68: + memcpy_sse2_64(dd - 68, ss - 68); + case 4: + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 69: + memcpy_sse2_64(dd - 69, ss - 69); + case 5: + *((uint32_t*)(dd - 5)) = *((uint32_t*)(ss - 5)); + dd[-1] = ss[-1]; + break; + + case 70: + memcpy_sse2_64(dd - 70, ss - 70); + case 6: + *((uint32_t*)(dd - 6)) = *((uint32_t*)(ss - 6)); + *((uint16_t*)(dd - 2)) = *((uint16_t*)(ss - 2)); + break; + + case 71: + memcpy_sse2_64(dd - 71, ss - 71); + case 7: + *((uint32_t*)(dd - 7)) = *((uint32_t*)(ss - 7)); + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 72: + memcpy_sse2_64(dd - 72, ss - 72); + case 8: + *((uint64_t*)(dd - 8)) = *((uint64_t*)(ss - 8)); + break; + + case 73: + memcpy_sse2_64(dd - 73, ss - 73); + case 9: + *((uint64_t*)(dd - 9)) = *((uint64_t*)(ss - 9)); + dd[-1] = ss[-1]; + break; + + case 74: + memcpy_sse2_64(dd - 74, ss - 74); + case 10: + *((uint64_t*)(dd - 10)) = *((uint64_t*)(ss - 10)); + *((uint16_t*)(dd - 2)) = *((uint16_t*)(ss - 2)); + break; + + case 75: + memcpy_sse2_64(dd - 75, ss - 75); + case 11: + *((uint64_t*)(dd - 11)) = *((uint64_t*)(ss - 11)); + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 76: + memcpy_sse2_64(dd - 76, ss - 76); + case 12: + *((uint64_t*)(dd - 12)) = *((uint64_t*)(ss - 12)); + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 77: + memcpy_sse2_64(dd - 77, ss - 77); + case 13: + *((uint64_t*)(dd - 13)) = *((uint64_t*)(ss - 13)); + *((uint32_t*)(dd - 5)) = *((uint32_t*)(ss - 5)); + dd[-1] = ss[-1]; + break; + + case 78: + memcpy_sse2_64(dd - 78, ss - 78); + case 14: + *((uint64_t*)(dd - 14)) = *((uint64_t*)(ss - 14)); + *((uint64_t*)(dd - 8)) = *((uint64_t*)(ss - 8)); + break; + + case 79: + memcpy_sse2_64(dd - 79, ss - 79); + case 15: + *((uint64_t*)(dd - 15)) = *((uint64_t*)(ss - 15)); + *((uint64_t*)(dd - 8)) = *((uint64_t*)(ss - 8)); + break; + + case 80: + memcpy_sse2_64(dd - 80, ss - 80); + case 16: + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 81: + memcpy_sse2_64(dd - 81, ss - 81); + case 17: + memcpy_sse2_16(dd - 17, ss - 17); + dd[-1] = ss[-1]; + break; + + case 82: + memcpy_sse2_64(dd - 82, ss - 82); + case 18: + memcpy_sse2_16(dd - 18, ss - 18); + *((uint16_t*)(dd - 2)) = *((uint16_t*)(ss - 2)); + break; + + case 83: + memcpy_sse2_64(dd - 83, ss - 83); + case 19: + memcpy_sse2_16(dd - 19, ss - 19); + *((uint16_t*)(dd - 3)) = *((uint16_t*)(ss - 3)); + dd[-1] = ss[-1]; + break; + + case 84: + memcpy_sse2_64(dd - 84, ss - 84); + case 20: + memcpy_sse2_16(dd - 20, ss - 20); + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 85: + memcpy_sse2_64(dd - 85, ss - 85); + case 21: + memcpy_sse2_16(dd - 21, ss - 21); + *((uint32_t*)(dd - 5)) = *((uint32_t*)(ss - 5)); + dd[-1] = ss[-1]; + break; + + case 86: + memcpy_sse2_64(dd - 86, ss - 86); + case 22: + memcpy_sse2_16(dd - 22, ss - 22); + *((uint32_t*)(dd - 6)) = *((uint32_t*)(ss - 6)); + *((uint16_t*)(dd - 2)) = *((uint16_t*)(ss - 2)); + break; + + case 87: + memcpy_sse2_64(dd - 87, ss - 87); + case 23: + memcpy_sse2_16(dd - 23, ss - 23); + *((uint32_t*)(dd - 7)) = *((uint32_t*)(ss - 7)); + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 88: + memcpy_sse2_64(dd - 88, ss - 88); + case 24: + memcpy_sse2_16(dd - 24, ss - 24); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 89: + memcpy_sse2_64(dd - 89, ss - 89); + case 25: + memcpy_sse2_16(dd - 25, ss - 25); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 90: + memcpy_sse2_64(dd - 90, ss - 90); + case 26: + memcpy_sse2_16(dd - 26, ss - 26); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 91: + memcpy_sse2_64(dd - 91, ss - 91); + case 27: + memcpy_sse2_16(dd - 27, ss - 27); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 92: + memcpy_sse2_64(dd - 92, ss - 92); + case 28: + memcpy_sse2_16(dd - 28, ss - 28); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 93: + memcpy_sse2_64(dd - 93, ss - 93); + case 29: + memcpy_sse2_16(dd - 29, ss - 29); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 94: + memcpy_sse2_64(dd - 94, ss - 94); + case 30: + memcpy_sse2_16(dd - 30, ss - 30); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 95: + memcpy_sse2_64(dd - 95, ss - 95); + case 31: + memcpy_sse2_16(dd - 31, ss - 31); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 96: + memcpy_sse2_64(dd - 96, ss - 96); + case 32: + memcpy_sse2_32(dd - 32, ss - 32); + break; + + case 97: + memcpy_sse2_64(dd - 97, ss - 97); + case 33: + memcpy_sse2_32(dd - 33, ss - 33); + dd[-1] = ss[-1]; + break; + + case 98: + memcpy_sse2_64(dd - 98, ss - 98); + case 34: + memcpy_sse2_32(dd - 34, ss - 34); + *((uint16_t*)(dd - 2)) = *((uint16_t*)(ss - 2)); + break; + + case 99: + memcpy_sse2_64(dd - 99, ss - 99); + case 35: + memcpy_sse2_32(dd - 35, ss - 35); + *((uint16_t*)(dd - 3)) = *((uint16_t*)(ss - 3)); + dd[-1] = ss[-1]; + break; + + case 100: + memcpy_sse2_64(dd - 100, ss - 100); + case 36: + memcpy_sse2_32(dd - 36, ss - 36); + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 101: + memcpy_sse2_64(dd - 101, ss - 101); + case 37: + memcpy_sse2_32(dd - 37, ss - 37); + *((uint32_t*)(dd - 5)) = *((uint32_t*)(ss - 5)); + dd[-1] = ss[-1]; + break; + + case 102: + memcpy_sse2_64(dd - 102, ss - 102); + case 38: + memcpy_sse2_32(dd - 38, ss - 38); + *((uint32_t*)(dd - 6)) = *((uint32_t*)(ss - 6)); + *((uint16_t*)(dd - 2)) = *((uint16_t*)(ss - 2)); + break; + + case 103: + memcpy_sse2_64(dd - 103, ss - 103); + case 39: + memcpy_sse2_32(dd - 39, ss - 39); + *((uint32_t*)(dd - 7)) = *((uint32_t*)(ss - 7)); + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 104: + memcpy_sse2_64(dd - 104, ss - 104); + case 40: + memcpy_sse2_32(dd - 40, ss - 40); + *((uint64_t*)(dd - 8)) = *((uint64_t*)(ss - 8)); + break; + + case 105: + memcpy_sse2_64(dd - 105, ss - 105); + case 41: + memcpy_sse2_32(dd - 41, ss - 41); + *((uint64_t*)(dd - 9)) = *((uint64_t*)(ss - 9)); + dd[-1] = ss[-1]; + break; + + case 106: + memcpy_sse2_64(dd - 106, ss - 106); + case 42: + memcpy_sse2_32(dd - 42, ss - 42); + *((uint64_t*)(dd - 10)) = *((uint64_t*)(ss - 10)); + *((uint16_t*)(dd - 2)) = *((uint16_t*)(ss - 2)); + break; + + case 107: + memcpy_sse2_64(dd - 107, ss - 107); + case 43: + memcpy_sse2_32(dd - 43, ss - 43); + *((uint64_t*)(dd - 11)) = *((uint64_t*)(ss - 11)); + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 108: + memcpy_sse2_64(dd - 108, ss - 108); + case 44: + memcpy_sse2_32(dd - 44, ss - 44); + *((uint64_t*)(dd - 12)) = *((uint64_t*)(ss - 12)); + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 109: + memcpy_sse2_64(dd - 109, ss - 109); + case 45: + memcpy_sse2_32(dd - 45, ss - 45); + *((uint64_t*)(dd - 13)) = *((uint64_t*)(ss - 13)); + *((uint32_t*)(dd - 5)) = *((uint32_t*)(ss - 5)); + dd[-1] = ss[-1]; + break; + + case 110: + memcpy_sse2_64(dd - 110, ss - 110); + case 46: + memcpy_sse2_32(dd - 46, ss - 46); + *((uint64_t*)(dd - 14)) = *((uint64_t*)(ss - 14)); + *((uint64_t*)(dd - 8)) = *((uint64_t*)(ss - 8)); + break; + + case 111: + memcpy_sse2_64(dd - 111, ss - 111); + case 47: + memcpy_sse2_32(dd - 47, ss - 47); + *((uint64_t*)(dd - 15)) = *((uint64_t*)(ss - 15)); + *((uint64_t*)(dd - 8)) = *((uint64_t*)(ss - 8)); + break; + + case 112: + memcpy_sse2_64(dd - 112, ss - 112); + case 48: + memcpy_sse2_32(dd - 48, ss - 48); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 113: + memcpy_sse2_64(dd - 113, ss - 113); + case 49: + memcpy_sse2_32(dd - 49, ss - 49); + memcpy_sse2_16(dd - 17, ss - 17); + dd[-1] = ss[-1]; + break; + + case 114: + memcpy_sse2_64(dd - 114, ss - 114); + case 50: + memcpy_sse2_32(dd - 50, ss - 50); + memcpy_sse2_16(dd - 18, ss - 18); + *((uint16_t*)(dd - 2)) = *((uint16_t*)(ss - 2)); + break; + + case 115: + memcpy_sse2_64(dd - 115, ss - 115); + case 51: + memcpy_sse2_32(dd - 51, ss - 51); + memcpy_sse2_16(dd - 19, ss - 19); + *((uint16_t*)(dd - 3)) = *((uint16_t*)(ss - 3)); + dd[-1] = ss[-1]; + break; + + case 116: + memcpy_sse2_64(dd - 116, ss - 116); + case 52: + memcpy_sse2_32(dd - 52, ss - 52); + memcpy_sse2_16(dd - 20, ss - 20); + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 117: + memcpy_sse2_64(dd - 117, ss - 117); + case 53: + memcpy_sse2_32(dd - 53, ss - 53); + memcpy_sse2_16(dd - 21, ss - 21); + *((uint32_t*)(dd - 5)) = *((uint32_t*)(ss - 5)); + dd[-1] = ss[-1]; + break; + + case 118: + memcpy_sse2_64(dd - 118, ss - 118); + case 54: + memcpy_sse2_32(dd - 54, ss - 54); + memcpy_sse2_16(dd - 22, ss - 22); + *((uint32_t*)(dd - 6)) = *((uint32_t*)(ss - 6)); + *((uint16_t*)(dd - 2)) = *((uint16_t*)(ss - 2)); + break; + + case 119: + memcpy_sse2_64(dd - 119, ss - 119); + case 55: + memcpy_sse2_32(dd - 55, ss - 55); + memcpy_sse2_16(dd - 23, ss - 23); + *((uint32_t*)(dd - 7)) = *((uint32_t*)(ss - 7)); + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 120: + memcpy_sse2_64(dd - 120, ss - 120); + case 56: + memcpy_sse2_32(dd - 56, ss - 56); + memcpy_sse2_16(dd - 24, ss - 24); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 121: + memcpy_sse2_64(dd - 121, ss - 121); + case 57: + memcpy_sse2_32(dd - 57, ss - 57); + memcpy_sse2_16(dd - 25, ss - 25); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 122: + memcpy_sse2_64(dd - 122, ss - 122); + case 58: + memcpy_sse2_32(dd - 58, ss - 58); + memcpy_sse2_16(dd - 26, ss - 26); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 123: + memcpy_sse2_64(dd - 123, ss - 123); + case 59: + memcpy_sse2_32(dd - 59, ss - 59); + memcpy_sse2_16(dd - 27, ss - 27); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 124: + memcpy_sse2_64(dd - 124, ss - 124); + case 60: + memcpy_sse2_32(dd - 60, ss - 60); + memcpy_sse2_16(dd - 28, ss - 28); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 125: + memcpy_sse2_64(dd - 125, ss - 125); + case 61: + memcpy_sse2_32(dd - 61, ss - 61); + memcpy_sse2_16(dd - 29, ss - 29); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 126: + memcpy_sse2_64(dd - 126, ss - 126); + case 62: + memcpy_sse2_32(dd - 62, ss - 62); + memcpy_sse2_16(dd - 30, ss - 30); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 127: + memcpy_sse2_64(dd - 127, ss - 127); + case 63: + memcpy_sse2_32(dd - 63, ss - 63); + memcpy_sse2_16(dd - 31, ss - 31); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 128: + memcpy_sse2_128(dd - 128, ss - 128); + break; + } + + return dst; +} + + +//--------------------------------------------------------------------- +// main routine +//--------------------------------------------------------------------- +static void* memcpy_fast(void *destination, const void *source, size_t size) +{ + unsigned char *dst = (unsigned char*)destination; + const unsigned char *src = (const unsigned char*)source; + static size_t cachesize = 0x200000; // L2-cache size + size_t padding; + + // small memory copy + if (size <= 128) { + return memcpy_tiny(dst, src, size); + } + + // align destination to 16 bytes boundary + padding = (16 - (((size_t)dst) & 15)) & 15; + + if (padding > 0) { + __m128i head = _mm_loadu_si128((const __m128i*)src); + _mm_storeu_si128((__m128i*)dst, head); + dst += padding; + src += padding; + size -= padding; + } + + // medium size copy + if (size <= cachesize) { + __m128i c0, c1, c2, c3, c4, c5, c6, c7; + + for (; size >= 128; size -= 128) { + c0 = _mm_loadu_si128(((const __m128i*)src) + 0); + c1 = _mm_loadu_si128(((const __m128i*)src) + 1); + c2 = _mm_loadu_si128(((const __m128i*)src) + 2); + c3 = _mm_loadu_si128(((const __m128i*)src) + 3); + c4 = _mm_loadu_si128(((const __m128i*)src) + 4); + c5 = _mm_loadu_si128(((const __m128i*)src) + 5); + c6 = _mm_loadu_si128(((const __m128i*)src) + 6); + c7 = _mm_loadu_si128(((const __m128i*)src) + 7); + _mm_prefetch((const char*)(src + 256), _MM_HINT_NTA); + src += 128; + _mm_store_si128((((__m128i*)dst) + 0), c0); + _mm_store_si128((((__m128i*)dst) + 1), c1); + _mm_store_si128((((__m128i*)dst) + 2), c2); + _mm_store_si128((((__m128i*)dst) + 3), c3); + _mm_store_si128((((__m128i*)dst) + 4), c4); + _mm_store_si128((((__m128i*)dst) + 5), c5); + _mm_store_si128((((__m128i*)dst) + 6), c6); + _mm_store_si128((((__m128i*)dst) + 7), c7); + dst += 128; + } + } + else { // big memory copy + __m128i c0, c1, c2, c3, c4, c5, c6, c7; + + _mm_prefetch((const char*)(src), _MM_HINT_NTA); + + if ((((size_t)src) & 15) == 0) { // source aligned + for (; size >= 128; size -= 128) { + c0 = _mm_load_si128(((const __m128i*)src) + 0); + c1 = _mm_load_si128(((const __m128i*)src) + 1); + c2 = _mm_load_si128(((const __m128i*)src) + 2); + c3 = _mm_load_si128(((const __m128i*)src) + 3); + c4 = _mm_load_si128(((const __m128i*)src) + 4); + c5 = _mm_load_si128(((const __m128i*)src) + 5); + c6 = _mm_load_si128(((const __m128i*)src) + 6); + c7 = _mm_load_si128(((const __m128i*)src) + 7); + _mm_prefetch((const char*)(src + 256), _MM_HINT_NTA); + src += 128; + _mm_stream_si128((((__m128i*)dst) + 0), c0); + _mm_stream_si128((((__m128i*)dst) + 1), c1); + _mm_stream_si128((((__m128i*)dst) + 2), c2); + _mm_stream_si128((((__m128i*)dst) + 3), c3); + _mm_stream_si128((((__m128i*)dst) + 4), c4); + _mm_stream_si128((((__m128i*)dst) + 5), c5); + _mm_stream_si128((((__m128i*)dst) + 6), c6); + _mm_stream_si128((((__m128i*)dst) + 7), c7); + dst += 128; + } + } + else { // source unaligned + for (; size >= 128; size -= 128) { + c0 = _mm_loadu_si128(((const __m128i*)src) + 0); + c1 = _mm_loadu_si128(((const __m128i*)src) + 1); + c2 = _mm_loadu_si128(((const __m128i*)src) + 2); + c3 = _mm_loadu_si128(((const __m128i*)src) + 3); + c4 = _mm_loadu_si128(((const __m128i*)src) + 4); + c5 = _mm_loadu_si128(((const __m128i*)src) + 5); + c6 = _mm_loadu_si128(((const __m128i*)src) + 6); + c7 = _mm_loadu_si128(((const __m128i*)src) + 7); + _mm_prefetch((const char*)(src + 256), _MM_HINT_NTA); + src += 128; + _mm_stream_si128((((__m128i*)dst) + 0), c0); + _mm_stream_si128((((__m128i*)dst) + 1), c1); + _mm_stream_si128((((__m128i*)dst) + 2), c2); + _mm_stream_si128((((__m128i*)dst) + 3), c3); + _mm_stream_si128((((__m128i*)dst) + 4), c4); + _mm_stream_si128((((__m128i*)dst) + 5), c5); + _mm_stream_si128((((__m128i*)dst) + 6), c6); + _mm_stream_si128((((__m128i*)dst) + 7), c7); + dst += 128; + } + } + _mm_sfence(); + } + + memcpy_tiny(dst, src, size); + + return destination; +} + + +#endif diff --git a/src/components/implementation/nicmgr/dpdk/init.c b/src/components/implementation/nicmgr/dpdk/init.c index 1e37ce4658..1450cf0e0d 100644 --- a/src/components/implementation/nicmgr/dpdk/init.c +++ b/src/components/implementation/nicmgr/dpdk/init.c @@ -10,16 +10,18 @@ #include #include #include +#include +#include +#include #include #include -#include -#include "simple_hash.h" #include "nicmgr.h" +#include "simple_hash.h" #define ENABLE_DEBUG_INFO 0 -#define NB_RX_DESC_DEFAULT 512 -#define NB_TX_DESC_DEFAULT 512 +#define NB_RX_DESC_DEFAULT 2048 +#define NB_TX_DESC_DEFAULT 1024 #define MAX_PKT_BURST NB_RX_DESC_DEFAULT @@ -166,6 +168,7 @@ process_tx_packets(void) } } +static u32_t __ip; static void process_rx_packets(cos_portid_t port_id, char** rx_pkts, uint16_t nb_pkts) { @@ -177,45 +180,37 @@ process_rx_packets(cos_portid_t port_id, char** rx_pkts, uint16_t nb_pkts) struct arp_hdr *arp_hdr; struct tcp_udp_port *port; struct client_session *session; + struct client_session *default_session; char *pkt; struct pkt_buf buf; + u32_t ip = 0; + u16_t svc_id = 0; for (i = 0; i < nb_pkts; i++) { pkt = cos_get_packet(rx_pkts[i], &len); eth = (struct eth_hdr *)pkt; - if (likely(htons(eth->ether_type) == 0x0800)) { - iph = (struct ip_hdr *)((char *)eth + sizeof(struct eth_hdr)); - port = (struct tcp_udp_port *)((char *)eth + sizeof(struct eth_hdr) + iph->ihl * 4); - u16_t svc_id = ntohs(port->dst_port); - - session = simple_hash_find(iph->dst_addr, svc_id); - // printc("port:%d, session:%p\n", ntohs(port->dst_port), session); - buf.pkt = rx_pkts[i]; - if (likely(session)) { - if (unlikely(!pkt_ring_buf_enqueue(&(session->pkt_ring_buf), &buf))){ - cos_free_packet(rx_pkts[i]); - rx_enqueued_miss++; - continue; - } - enqueued_rx++; - - } else { - session = simple_hash_find(iph->dst_addr, 0); - if (session) { - if (unlikely(!pkt_ring_buf_enqueue(&(session->pkt_ring_buf), &buf))){ - cos_free_packet(rx_pkts[i]); - rx_enqueued_miss++; - continue; - } - enqueued_rx++; - } else { - rx_enqueued_miss++; - cos_free_packet(rx_pkts[i]); - continue; - } - } - } else { - cos_free_packet(buf.pkt); + + iph = (struct ip_hdr *)((char *)eth + sizeof(struct eth_hdr)); + port = (struct tcp_udp_port *)((char *)eth + sizeof(struct eth_hdr) + iph->ihl * 4); + ip = iph->dst_addr; + svc_id = ntohs(port->dst_port); + + default_session = simple_hash_find(ip, 0); + if (unlikely(default_session == NULL)) { + cos_free_packet(rx_pkts[i]); + continue; + } + + session = simple_hash_find(ip, svc_id); + + if (session == NULL) { + session = default_session; + } + + buf.pkt = rx_pkts[i]; + if (unlikely(!pkt_ring_buf_enqueue(&(session->pkt_ring_buf), &buf))){ + cos_free_packet(rx_pkts[i]); + rx_enqueued_miss++; continue; } @@ -275,6 +270,8 @@ cos_nic_start(){ uint16_t nb_pkts = 0; char *rx_packets[MAX_PKT_BURST]; + int count = 0; + __ip = inet_addr("10.10.1.2"); while (1) { #if USE_CK_RING_FREE_MBUF @@ -284,19 +281,18 @@ cos_nic_start(){ debug_dump_info(); #endif - // only port 0, queue 0 receive packets nb_pkts = cos_dev_port_rx_burst(0, 0, rx_packets, MAX_PKT_BURST); - /* These are the two test options */ - // if (nb_pkts!= 0) transmit_back(0, rx_packets, nb_pkts); - // if (nb_pkts!= 0) cos_dev_port_tx_burst(0, 0, rx_packets, nb_pkts); /* This is the real processing logic for applications */ if (nb_pkts != 0) { process_rx_packets(0, rx_packets, nb_pkts); } else { - // sched_thd_block_timeout(0, ps_tsc() + 2000*10); - sched_thd_block_timeout(0, time_now() + time_usec2cyc(1)); - // sched_thd_block(0); + // sched_thd_block_timeout(0, ps_tsc() + 2000*2); + count++; + if (count > 5) { + count = 0; + sched_thd_yield(); + } } } } @@ -317,8 +313,8 @@ cos_nic_init(void) * set max_mbufs 2 times than nb_rx_desc, so that there is enough room * to store packets, or this will fail if nb_rx_desc <= max_mbufs. */ - const size_t max_rx_mbufs = 20 * nb_rx_desc; - const size_t max_tx_mbufs = 30 * nb_tx_desc; + const size_t max_rx_mbufs = 8 * nb_rx_desc; + const size_t max_tx_mbufs = 2 * nb_tx_desc; memset(rx_per_core_mpool_name, 0, sizeof(rx_per_core_mpool_name)); memset(tx_per_core_mpool_name, 0, sizeof(tx_per_core_mpool_name)); @@ -332,7 +328,7 @@ cos_nic_init(void) "--log-level", "*:info", /* log level can be changed to *debug* if needed, this will print lots of information */ "-m", - "512", /* total memory used by dpdk memory subsystem, such as mempool */ + "128", /* total memory used by dpdk memory subsystem, such as mempool */ }; argc = ARRAY_SIZE(argv); @@ -389,8 +385,7 @@ cos_init(void) printc("nicmgr init...\n"); #if 1 cos_nic_init(); - // cos_hash_init(); - simple_hash_init(); + cos_hash_init(); #ifdef USE_CK_RING_FREE_MBUF pkt_ring_buf_init(&g_free_ring, FREE_PKT_RBUF_NUM, FREE_PKT_RING_SZ); #endif @@ -403,8 +398,10 @@ cos_init(void) } thdid_t recv_tid = 0; +thdid_t idle_tid = 0; -#define RECV_THD_PRIORITY 1 +#define RECV_THD_PRIORITY 31 +#define IDLE_THD_PRIORITY 31 static void recv_task(void) @@ -427,6 +424,7 @@ parallel_main(coreid_t cid) /* DPDK rx and tx will only run on core 0 */ if(cid == 0) { sched_thd_param_set(recv_tid, sched_param_pack(SCHEDP_PRIO, RECV_THD_PRIORITY)); + sched_thd_block(0); } else { #if 0 #if E810_NIC == 0 @@ -438,7 +436,6 @@ parallel_main(coreid_t cid) #endif #endif } - sched_thd_block(0); return 0; } diff --git a/src/components/implementation/nicmgr/dpdk/nicmgr.c b/src/components/implementation/nicmgr/dpdk/nicmgr.c index b466ae71d6..61c4ca6235 100644 --- a/src/components/implementation/nicmgr/dpdk/nicmgr.c +++ b/src/components/implementation/nicmgr/dpdk/nicmgr.c @@ -8,10 +8,12 @@ #include #include #include +#include #include #include #include #include "nicmgr.h" +#include "fast_memcpy.h" #include "simple_hash.h" extern volatile int debug_flag; @@ -162,7 +164,9 @@ nic_get_a_packet_batch(u8_t batch_limit) assert(len < netshmem_get_max_data_buf_sz()); data_buf = netshmem_get_data_buf(obj); - memcpy(data_buf, pkt, len); + // memcpy_fast(data_buf, pkt, len); + // memcpy(data_buf, pkt, len); + rte_memcpy(data_buf, pkt , len); pkt_arr[batch_ct].obj_id = objid; pkt_arr[batch_ct].pkt_len = len; batch_ct++; @@ -184,7 +188,6 @@ ext_buf_free_callback_fn(void *addr, void *opaque) { /* Shared mem uses borrow api, thus do not need to free it here */ if (addr != NULL) { - // printc("???????????????????????????????????\n"); shm_bm_free_net_pkt_buf(addr); } else { printc("External buffer address is invalid\n"); diff --git a/src/components/implementation/nicmgr/dpdk/simple_hash.c b/src/components/implementation/nicmgr/dpdk/simple_hash.c index 0113890abe..ae84a8c9f8 100644 --- a/src/components/implementation/nicmgr/dpdk/simple_hash.c +++ b/src/components/implementation/nicmgr/dpdk/simple_hash.c @@ -27,6 +27,6 @@ simple_hash_init(void) void * simple_hash_find(u32_t ip, u16_t port) { - if (port > MAX_PORT) return NULL; + if (unlikely(port > MAX_PORT)) return NULL; return g_hash_tbl[ip % MAX_IP][port]; } diff --git a/src/components/implementation/sched/pfprr_quantum_static/main.c b/src/components/implementation/sched/pfprr_quantum_static/main.c index 60807005e3..dd86a9dd29 100644 --- a/src/components/implementation/sched/pfprr_quantum_static/main.c +++ b/src/components/implementation/sched/pfprr_quantum_static/main.c @@ -158,7 +158,7 @@ sched_thd_yield(void) slm_cs_enter(current, SLM_CS_NONE); slm_sched_yield(current, 0); - ret = slm_cs_exit_reschedule(current, SLM_CS_CHECK_TIMEOUT); + ret = slm_cs_exit_reschedule(current, SLM_CS_NONE); return ret; } @@ -180,8 +180,8 @@ thd_block(void) slm_cs_enter(current, SLM_CS_NONE); ret = slm_thd_block(current); - if (!ret) ret = slm_cs_exit_reschedule(current, SLM_CS_CHECK_TIMEOUT); - else slm_cs_exit(NULL, SLM_CS_CHECK_TIMEOUT); + if (!ret) ret = slm_cs_exit_reschedule(current, SLM_CS_NONE); + else slm_cs_exit(NULL, SLM_CS_NONE); return ret; } @@ -207,7 +207,7 @@ thd_wakeup(struct slm_thd *t) return ret; } - return slm_cs_exit_reschedule(current, SLM_CS_CHECK_TIMEOUT); + return slm_cs_exit_reschedule(current, SLM_CS_NONE); } int @@ -240,7 +240,7 @@ thd_block_until(cycles_t timeout) slm_timer_cancel(current); } done: - ret = slm_cs_exit_reschedule(current, SLM_CS_CHECK_TIMEOUT); + ret = slm_cs_exit_reschedule(current, SLM_CS_NONE); /* cleanup stale timeouts (e.g. if we were woken outside of the timer) */ slm_timer_cancel(current); } diff --git a/src/components/implementation/simple_vmm/vmm/Makefile b/src/components/implementation/simple_vmm/vmm/Makefile index c9be9cfe36..96d9511070 100644 --- a/src/components/implementation/simple_vmm/vmm/Makefile +++ b/src/components/implementation/simple_vmm/vmm/Makefile @@ -25,4 +25,5 @@ CFILES+=devices/vrtc/vrtc.c CFILES+=devices/vps2/vps2.c C_OBJS+=$(CFILES:%.c=%.o) +COMP_FLAGS= -mavx -mavx2 -mfma -I$(LIBDIR)/dpdk/dpdk/build/install/include include Makefile.subsubdir diff --git a/src/components/implementation/simple_vmm/vmm/devices/vpci/virtio_net_io.c b/src/components/implementation/simple_vmm/vmm/devices/vpci/virtio_net_io.c index a7cb01e978..5ce8e282ed 100644 --- a/src/components/implementation/simple_vmm/vmm/devices/vpci/virtio_net_io.c +++ b/src/components/implementation/simple_vmm/vmm/devices/vpci/virtio_net_io.c @@ -28,69 +28,24 @@ #include #include #include -#include -#include #include "virtio_net_io.h" #include "vpci.h" #include "virtio_ring.h" - +#include +#include #include #include #include #include #include - +#include /* TODO: remove this warning flag when virtio-net is done */ #pragma GCC diagnostic ignored "-Wunused-but-set-variable" -static struct virtio_net_io_reg virtio_net_regs[VMRT_MAX_VM]; -static struct virtio_queue virtio_queues[VMRT_MAX_VM][2]; -static struct virtio_vq_info virtio_net_vqs[VMRT_MAX_VM][VIRTIO_NET_MAXQ - 1]; - -static inline struct virtio_net_io_reg *get_virtio_net_regs(struct vmrt_vm_vcpu *vcpu) { - return &virtio_net_regs[vcpu->vm->comp_id]; -} - -static inline struct virtio_queue *get_virtio_queue(struct vmrt_vm_vcpu *vcpu, int nr_queue) { - return &virtio_queues[vcpu->vm->comp_id][nr_queue]; -} - -static inline struct virtio_vq_info *get_virtio_net_vqs(struct vmrt_vm_comp *vm, int nr_queue) { - return &virtio_net_vqs[vm->comp_id][nr_queue]; -} - -static u8_t virtio_net_mac[VMRT_MAX_VM][6] = { - {0x10, 0x10, 0x10, 0x10, 0x10, 0x11}, - {0x10, 0x10, 0x10, 0x10, 0x10, 0x13}, - {0x10, 0x10, 0x10, 0x10, 0x10, 0x15}, - {0x10, 0x10, 0x10, 0x10, 0x10, 0x17}, - {0x10, 0x10, 0x10, 0x10, 0x10, 0x19}, - {0x10, 0x10, 0x10, 0x10, 0x10, 0x1a}, - {0x10, 0x10, 0x10, 0x10, 0x10, 0x1b}, - {0x10, 0x10, 0x10, 0x10, 0x10, 0x1c}, - {0x10, 0x10, 0x10, 0x10, 0x10, 0x1d}, - {0x10, 0x10, 0x10, 0x10, 0x10, 0x1e}, - }; - - -static struct vmrt_vm_comp *mac_to_vm[VMRT_MAX_VM] = {0}; - -void -vm_mac_tbl_update(compid_t comp_id, struct vmrt_vm_comp *vm) { - mac_to_vm[comp_id] = vm; -} - -struct vmrt_vm_comp *get_vm_from_mac(u8_t *mac) { - for (int i = 0; i < VMRT_MAX_VM; i++) { - if(!memcmp(virtio_net_mac[i], mac, 6)) { - return mac_to_vm[i]; - } - } - - return NULL; -} - +static struct virtio_net_io_reg virtio_net_regs; +static struct virtio_queue virtio_queues[2]; +struct virtio_vq_info virtio_net_vqs[VIRTIO_NET_MAXQ - 1]; static unsigned char icmp_reply[] = { /* TODO: remove icmp reply and process nic input from nic component */ @@ -144,7 +99,7 @@ vq_endchains(struct vmrt_vm_vcpu *vcpu, struct virtio_vq_info *vq, int used_all_ !(vq->avail->flags & VRING_AVAIL_F_NO_INTERRUPT); if (intr) { - get_virtio_net_regs(vcpu)->header.ISR = 1; + virtio_net_regs.header.ISR = 1; /* TODO: 57 is virtio-net interrupt without io apic, 33 is with io apic */ #if VMX_SUPPORT_POSTED_INTR vlapic_set_intr(vcpu, 33, 0); @@ -176,8 +131,7 @@ virtio_vq_init(struct vmrt_vm_vcpu *vcpu, int nr_queue, u32_t pfn) size_t size; char *vb; - vq = get_virtio_net_vqs(vcpu->vm, nr_queue); - + vq = &virtio_net_vqs[nr_queue]; vq->pfn = pfn; phys = (u64_t)pfn << VRING_PAGE_BITS; size = vring_size(vq->qsize, VIRTIO_PCI_VRING_ALIGN); @@ -365,14 +319,8 @@ virtio_net_rcv_one_pkt(void *data, int pkt_len) int n; u16_t idx; int ret; - struct vmrt_vm_comp *vm = get_vm_from_mac(data); - if (unlikely(vm == NULL)) { - printc("vm not exist\n"); - return; - } - assert(vm); - vq = get_virtio_net_vqs(vm, VIRTIO_NET_RXQ); + vq = &virtio_net_vqs[VIRTIO_NET_RXQ]; vcpu = vq->vcpu; @@ -393,7 +341,8 @@ virtio_net_rcv_one_pkt(void *data, int pkt_len) // assert(iov[0].iov_len >= (size_t)pkt_len); - memcpy(iov[0].iov_base, data, pkt_len); + // memcpy(iov[0].iov_base, data, pkt_len); + memcpy_fast(iov[0].iov_base, data, pkt_len); memset(vrx, 0, sizeof(struct virtio_net_rxhdr)); @@ -404,21 +353,14 @@ virtio_net_rcv_one_pkt(void *data, int pkt_len) } void -virtio_net_send_one_pkt(void *data, u16_t *pkt_len, struct vmrt_vm_comp *vm) +virtio_net_send_one_pkt(void *data, u16_t *pkt_len) { + struct virtio_vq_info *vq = &virtio_net_vqs[VIRTIO_NET_TXQ]; struct iovec iov[VIRTIO_NET_MAXSEGS]; struct vmrt_vm_vcpu *vcpu; int i, n; int plen, tlen; u16_t idx; - struct virtio_vq_info *vq; - - if (unlikely(vm == NULL)) { - *pkt_len = 0; - return; - } - - vq = get_virtio_net_vqs(get_vm_from_mac(((u8_t *)data + 6)), VIRTIO_NET_TXQ); while (!vq_has_descs(vq)) { *pkt_len = 0; @@ -441,7 +383,8 @@ virtio_net_send_one_pkt(void *data, u16_t *pkt_len, struct vmrt_vm_comp *vm) plen += iov[1].iov_len; tlen += iov[1].iov_len; - memcpy(data, iov[1].iov_base, iov[1].iov_len); + // memcpy(data, iov[1].iov_base, iov[1].iov_len); + memcpy_fast(data, iov[1].iov_base, iov[1].iov_len); *pkt_len = plen; vq_relchain(vq, idx, tlen); @@ -458,7 +401,7 @@ virtio_net_outb(u32_t port_id, struct vmrt_vm_vcpu *vcpu) switch (port_id) { case VIRTIO_NET_DEV_STATUS: - get_virtio_net_regs(vcpu)->header.dev_status = val; + virtio_net_regs.header.dev_status = val; break; default: VM_PANIC(vcpu); @@ -467,6 +410,14 @@ virtio_net_outb(u32_t port_id, struct vmrt_vm_vcpu *vcpu) return; } +#define REAL_NIC 0 + +#if REAL_NIC +static u8_t virtio_net_mac[6] = {0x6c, 0xfe, 0x54, 0x40, 0x41, 0x01}; +#else +static u8_t virtio_net_mac[6] = {0x10, 0x10, 0x10, 0x10, 0x10, 0x11}; +#endif + static void virtio_net_inb(u32_t port_id, struct vmrt_vm_vcpu *vcpu) { @@ -475,38 +426,36 @@ virtio_net_inb(u32_t port_id, struct vmrt_vm_vcpu *vcpu) switch (port_id) { case VIRTIO_NET_DEV_STATUS: - vcpu->shared_region->ax = get_virtio_net_regs(vcpu)->header.dev_status; + vcpu->shared_region->ax = virtio_net_regs.header.dev_status; break; case VIRTIO_NET_ISR: - vcpu->shared_region->ax = get_virtio_net_regs(vcpu)->header.ISR; - get_virtio_net_regs(vcpu)->header.ISR = 0; + vcpu->shared_region->ax = virtio_net_regs.header.ISR; + virtio_net_regs.header.ISR = 0; break; case VIRTIO_NET_STATUS: - vcpu->shared_region->ax = get_virtio_net_regs(vcpu)->config_reg.status; + vcpu->shared_region->ax = virtio_net_regs.config_reg.status; break; case VIRTIO_NET_STATUS_H: - vcpu->shared_region->ax = get_virtio_net_regs(vcpu)->config_reg.status >> 8; + vcpu->shared_region->ax = virtio_net_regs.config_reg.status >> 8; break; /* TODO: read mac address from virtio-net config space */ case VIRTIO_NET_MAC: - vm_mac_tbl_update(vcpu->vm->vm_mac_id, vcpu->vm); - vcpu->shared_region->ax = virtio_net_mac[vcpu->vm->vm_mac_id][0]; - mac_to_vm[vcpu->vm->comp_id] = vcpu->vm; + vcpu->shared_region->ax = virtio_net_mac[0]; break; case VIRTIO_NET_MAC1: - vcpu->shared_region->ax = virtio_net_mac[vcpu->vm->vm_mac_id][1]; + vcpu->shared_region->ax = virtio_net_mac[1]; break; case VIRTIO_NET_MAC2: - vcpu->shared_region->ax = virtio_net_mac[vcpu->vm->vm_mac_id][2]; + vcpu->shared_region->ax = virtio_net_mac[2]; break; case VIRTIO_NET_MAC3: - vcpu->shared_region->ax = virtio_net_mac[vcpu->vm->vm_mac_id][3]; + vcpu->shared_region->ax = virtio_net_mac[3]; break; case VIRTIO_NET_MAC4: - vcpu->shared_region->ax = virtio_net_mac[vcpu->vm->vm_mac_id][4]; + vcpu->shared_region->ax = virtio_net_mac[4]; break; case VIRTIO_NET_MAC5: - vcpu->shared_region->ax = virtio_net_mac[vcpu->vm->vm_mac_id][5]; + vcpu->shared_region->ax = virtio_net_mac[5]; break; default: VM_PANIC(vcpu); @@ -520,14 +469,14 @@ virtio_net_inw(u32_t port_id, struct vmrt_vm_vcpu *vcpu) switch (port_id) { case VIRTIO_NET_QUEUE_SIZE: - vcpu->shared_region->ax = get_virtio_queue(vcpu, get_virtio_net_regs(vcpu)->header.queue_select)->queue_sz; + vcpu->shared_region->ax = virtio_queues[virtio_net_regs.header.queue_select].queue_sz; break; case VIRTIO_NET_QUEUE_SELECT: - vcpu->shared_region->ax = get_virtio_net_regs(vcpu)->header.queue_select; + vcpu->shared_region->ax = virtio_net_regs.header.queue_select; break; case VIRTIO_NET_QUEUE_NOTIFY: VM_PANIC(vcpu); - vcpu->shared_region->ax = get_virtio_net_regs(vcpu)->header.queue_notify; + vcpu->shared_region->ax = virtio_net_regs.header.queue_notify; break; default: VM_PANIC(vcpu); @@ -543,15 +492,14 @@ virtio_net_outw(u32_t port_id, struct vmrt_vm_vcpu *vcpu) switch (port_id) { case VIRTIO_NET_QUEUE_SELECT: - get_virtio_net_regs(vcpu)->header.queue_select = val; + virtio_net_regs.header.queue_select = val; break; case VIRTIO_NET_QUEUE_NOTIFY: - if (val == VIRTIO_NET_TXQ) { - sched_thd_wakeup(vcpu->vm->tx_thd); - // void virtio_tx_task(void *data); - // virtio_tx_task(vcpu->vm); + if (val == VIRTIO_NET_TXQ) { + // sched_thd_yield(); + // sched_thd_wakeup(11); } - get_virtio_net_regs(vcpu)->header.queue_notify = val; + virtio_net_regs.header.queue_notify = val; break; default: VM_PANIC(vcpu); @@ -568,11 +516,11 @@ virtio_net_outl(u32_t port_id, struct vmrt_vm_vcpu *vcpu) switch (port_id) { case VIRTIO_NET_GUEST_FEATURES: - get_virtio_net_regs(vcpu)->header.guest_features = val; + virtio_net_regs.header.guest_features = val; break; case VIRTIO_NET_QUEUE_ADDR: - get_virtio_queue(vcpu, get_virtio_net_regs(vcpu)->header.queue_select)->queue = (void *)tmp; - virtio_vq_init(vcpu, get_virtio_net_regs(vcpu)->header.queue_select, val); + virtio_queues[virtio_net_regs.header.queue_select].queue = (void *)tmp; + virtio_vq_init(vcpu, virtio_net_regs.header.queue_select, val); break; default: VM_PANIC(vcpu); @@ -587,13 +535,13 @@ virtio_net_inl(u32_t port_id, struct vmrt_vm_vcpu *vcpu) switch (port_id) { case VIRTIO_NET_DEV_FEATURES: - vcpu->shared_region->ax = get_virtio_net_regs(vcpu)->header.dev_features; + vcpu->shared_region->ax = virtio_net_regs.header.dev_features; break; case VIRTIO_NET_GUEST_FEATURES: - vcpu->shared_region->ax = get_virtio_net_regs(vcpu)->header.guest_features; + vcpu->shared_region->ax = virtio_net_regs.header.guest_features; break; case VIRTIO_NET_QUEUE_ADDR: - vcpu->shared_region->ax = get_virtio_net_regs(vcpu)->header.queue_addr; + vcpu->shared_region->ax = virtio_net_regs.header.queue_addr; break; default: VM_PANIC(vcpu); @@ -638,11 +586,30 @@ virtio_net_handler(u16_t port, int dir, int sz, struct vmrt_vm_vcpu *vcpu) } void -virtio_tx_task(void *data) +virtio_net_io_init(void) +{ + memset(&virtio_net_regs, 0, sizeof(virtio_net_regs)); + memset(&virtio_queues, 0, sizeof(virtio_queues)); + memset(&virtio_net_vqs, 0, sizeof(virtio_net_vqs)); + + virtio_net_regs.header.dev_features |= (1 << VIRTIO_NET_F_STATUS); + virtio_net_regs.header.dev_features |= (1 << VIRTIO_NET_F_MAC); + virtio_net_regs.config_reg.status = VIRTIO_NET_S_LINK_UP; + virtio_queues[0].queue_sz = VQ_MAX_DESCRIPTORS; + virtio_queues[1].queue_sz = VQ_MAX_DESCRIPTORS; + virtio_net_vqs[VIRTIO_NET_RX].qsize = VQ_MAX_DESCRIPTORS; + virtio_net_vqs[VIRTIO_NET_TX].qsize = VQ_MAX_DESCRIPTORS; +} + +struct tcp_udp_port { - struct vmrt_vm_comp *vm = (struct vmrt_vm_comp *)data; - // printc("virtio tx task :%p, id:%d, tx thd:%d\n", data, vm->comp_id, cos_thdid()); + u16_t src_port; + u16_t dst_port; +} __attribute__((packed)); +void +virtio_tx_task(void *data) +{ struct virtio_vq_info *vq; struct iovec iov[VIRTIO_NET_MAXSEGS]; struct vmrt_vm_vcpu *vcpu; @@ -659,15 +626,42 @@ virtio_tx_task(void *data) u16_t svc_id = 0; struct iphdr *iphdr = NULL; - struct tcphdr *tcphdr = NULL; - struct udphdr *udphdr = NULL; + struct tcp_udp_port *port; - vq = get_virtio_net_vqs(vm, VIRTIO_NET_TXQ); + vq = &virtio_net_vqs[VIRTIO_NET_TXQ]; while (1) { while (!vq_has_descs(vq)) { - sched_thd_block(0); - // sched_thd_yield(); - // return; + shm_bm_objid_t first_objid; + struct netshmem_pkt_buf *first_obj; + struct netshmem_pkt_pri *first_obj_pri; + struct netshmem_meta_tuple *pkt_arr; + u8_t batch_ct; + + session = get_nf_session(0); + tx_shmemd = session->tx_shmemd; + + while (nf_tx_ring_buf_dequeue(&session->nf_tx_ring_buf, &buf)) { + batch_ct = 0; + first_obj = buf.obj; + first_objid = buf.objid; + first_obj_pri = netshmem_get_pri(first_obj); + pkt_arr = (struct netshmem_meta_tuple *)&first_obj_pri->pkt_arr; + first_obj_pri->batch_len = 0; + + pkt_arr[batch_ct].obj_id = buf.objid; + pkt_arr[batch_ct].pkt_len = buf.pkt_len; + batch_ct++; + while (batch_ct < 32 && nf_tx_ring_buf_dequeue(&session->nf_tx_ring_buf, &buf)) { + pkt_arr[batch_ct].obj_id = buf.objid; + pkt_arr[batch_ct].pkt_len = buf.pkt_len; + batch_ct++; + } + first_obj_pri->batch_len = batch_ct; + // printc("nic send in tx:%d, %u\n", batch_ct, cos_thdid()); + nic_send_packet_batch(first_objid); + } + + sched_thd_yield(); } vcpu = vq->vcpu; @@ -690,72 +684,42 @@ virtio_tx_task(void *data) pkt = iov[1].iov_base; iphdr = (struct iphdr *) (pkt + ETH_HLEN); - unsigned char *srcip = (unsigned char *)&(iphdr->saddr); - unsigned char *dstip = (unsigned char *)&(iphdr->daddr); - - if(iphdr->protocol == IPPROTO_TCP) - { - tcphdr = (struct tcphdr*)((u_int8_t*)iphdr + (iphdr->ihl << 2)); - svc_id = ntohs(tcphdr->th_sport); + port = (struct tcp_udp_port *)((char *)pkt + ETH_HLEN + iphdr->ihl * 4); + u16_t svc_id = ntohs(port->dst_port); + + session = get_nf_session(svc_id); + + tx_shmemd = session->tx_shmemd; + if (unlikely(!tx_shmemd)) { svc_id = 0; - // printc("tcp svc id:%u\n", svc_id); - // length = pdataLen - (iphdr->ihl<<2) - (tcphdr->doff << 2); - // payload = (u_int8_t*)( (u_int8_t*)tcphdr + (tcphdr->doff << 2) ); - // sport = tcphdr->source; - // dport = tcphdr->dest; - - // printf("processed one packet:queue_num:%d, id:%d, plen:%d, ret:%d,src ip:%d.%d.%d.%d, dest ip:%d.%d.%d.%d, src port:%u, dst port:%u \n", queue_num, id, plen, ret, IP_ARG(srcip), IP_ARG(dstip), ntohs(tcphdr->source), ntohs(tcphdr->dest)); - } else if (iphdr->protocol == IPPROTO_UDP) { - udphdr = (struct udphdr*)((u_int8_t*)iphdr + (iphdr->ihl << 2)); - svc_id = ntohs(udphdr->uh_sport); - printc("udp svc id:%u\n", svc_id); - assert(0); + session = get_nf_session(svc_id); + tx_shmemd = session->tx_shmemd; + } - } - session = get_nf_session(vm, svc_id); - tx_shmemd = session->tx_shmemd; - assert(tx_shmemd); - - if (tx_shmemd != 0) { - tx_obj = shm_bm_alloc_net_pkt_buf(tx_shmemd, &tx_pktid); - - if (likely(tx_obj != NULL)){ - buf.objid = tx_pktid; - buf.pkt_len = plen; - buf.obj = tx_obj; - memcpy(netshmem_get_data_buf(tx_obj), pkt, plen); - if ((unlikely(!nf_tx_ring_buf_enqueue(&(session->nf_tx_ring_buf), &buf)))){ - shm_bm_free_net_pkt_buf(tx_obj); - sched_thd_yield(); - } else { - // sched_thd_wakeup(session->tx_thd); - // sync_sem_give(&session->tx_sem); - } + // printc("tx shmemd:%p, %d\n", tx_shmemd, svc_id); + tx_obj = shm_bm_alloc_net_pkt_buf(tx_shmemd, &tx_pktid); + // printc("tx shmemd:%p, tx_obj:%p\n", tx_shmemd, tx_obj); + + if (likely(tx_obj != NULL)){ + buf.objid = tx_pktid; + buf.pkt_len = plen; + buf.obj = tx_obj; + + // memcpy(netshmem_get_data_buf(tx_obj), pkt, plen); + memcpy_fast(netshmem_get_data_buf(tx_obj), pkt, plen); + + if ((unlikely(!nf_tx_ring_buf_enqueue(&(session->nf_tx_ring_buf), &buf)))){ + shm_bm_free_net_pkt_buf(tx_obj); } else { - printc("cannot allocate objects\n"); - assert(0); + // sched_thd_wakeup(session->tx_thd); + // sync_sem_give(&session->tx_sem); } + } else { + printc("cannot allocate objects\n"); + assert(0); } vq_relchain(vq, idx, tlen); vq_endchains(vcpu, vq, 1); } } - -void -virtio_net_io_init(void) -{ - memset(&virtio_net_regs, 0, sizeof(virtio_net_regs)); - memset(&virtio_queues, 0, sizeof(virtio_queues)); - memset(&virtio_net_vqs, 0, sizeof(virtio_net_vqs)); - - for(int i = 0; i < VMRT_MAX_VM; i++) { - virtio_net_regs[i].header.dev_features |= (1 << VIRTIO_NET_F_STATUS); - virtio_net_regs[i].header.dev_features |= (1 << VIRTIO_NET_F_MAC); - virtio_net_regs[i].config_reg.status = VIRTIO_NET_S_LINK_UP; - virtio_queues[i][0].queue_sz = VQ_MAX_DESCRIPTORS; - virtio_queues[i][1].queue_sz = VQ_MAX_DESCRIPTORS; - virtio_net_vqs[i][VIRTIO_NET_RX].qsize = VQ_MAX_DESCRIPTORS; - virtio_net_vqs[i][VIRTIO_NET_TX].qsize = VQ_MAX_DESCRIPTORS; - } -} \ No newline at end of file diff --git a/src/components/implementation/simple_vmm/vmm/devices/vpci/virtio_net_io.h b/src/components/implementation/simple_vmm/vmm/devices/vpci/virtio_net_io.h index b6a13b22b6..ba50bb2b77 100644 --- a/src/components/implementation/simple_vmm/vmm/devices/vpci/virtio_net_io.h +++ b/src/components/implementation/simple_vmm/vmm/devices/vpci/virtio_net_io.h @@ -141,4 +141,4 @@ struct virtio_net_rxhdr { void virtio_net_handler(u16_t port, int dir, int sz, struct vmrt_vm_vcpu *vcpu); void virtio_net_rcv_one_pkt(void *data, int pkt_len); -void virtio_net_send_one_pkt(void *data, u16_t *pkt_len, struct vmrt_vm_comp *vm); +void virtio_net_send_one_pkt(void *data, u16_t *pkt_len); diff --git a/src/components/implementation/simple_vmm/vmm/fast_memcpy.h b/src/components/implementation/simple_vmm/vmm/fast_memcpy.h new file mode 100644 index 0000000000..ddd282d4ba --- /dev/null +++ b/src/components/implementation/simple_vmm/vmm/fast_memcpy.h @@ -0,0 +1,689 @@ +//===================================================================== +// +// FastMemcpy.c - skywind3000@163.com, 2015 +// +// feature: +// 50% speed up in avg. vs standard memcpy (tested in vc2012/gcc5.1) +// +//===================================================================== +#ifndef __FAST_MEMCPY_H__ +#define __FAST_MEMCPY_H__ + +#include +#include +#include + + +//--------------------------------------------------------------------- +// force inline for compilers +//--------------------------------------------------------------------- +#ifndef INLINE +#ifdef __GNUC__ +#if (__GNUC__ > 3) || ((__GNUC__ == 3) && (__GNUC_MINOR__ >= 1)) + #define INLINE __inline__ __attribute__((always_inline)) +#else + #define INLINE __inline__ +#endif +#elif defined(_MSC_VER) + #define INLINE __forceinline +#elif (defined(__BORLANDC__) || defined(__WATCOMC__)) + #define INLINE __inline +#else + #define INLINE +#endif +#endif + + + +//--------------------------------------------------------------------- +// fast copy for different sizes +//--------------------------------------------------------------------- +static INLINE void memcpy_sse2_16(void *dst, const void *src) { + __m128i m0 = _mm_loadu_si128(((const __m128i*)src) + 0); + _mm_storeu_si128(((__m128i*)dst) + 0, m0); +} + +static INLINE void memcpy_sse2_32(void *dst, const void *src) { + __m128i m0 = _mm_loadu_si128(((const __m128i*)src) + 0); + __m128i m1 = _mm_loadu_si128(((const __m128i*)src) + 1); + _mm_storeu_si128(((__m128i*)dst) + 0, m0); + _mm_storeu_si128(((__m128i*)dst) + 1, m1); +} + +static INLINE void memcpy_sse2_64(void *dst, const void *src) { + __m128i m0 = _mm_loadu_si128(((const __m128i*)src) + 0); + __m128i m1 = _mm_loadu_si128(((const __m128i*)src) + 1); + __m128i m2 = _mm_loadu_si128(((const __m128i*)src) + 2); + __m128i m3 = _mm_loadu_si128(((const __m128i*)src) + 3); + _mm_storeu_si128(((__m128i*)dst) + 0, m0); + _mm_storeu_si128(((__m128i*)dst) + 1, m1); + _mm_storeu_si128(((__m128i*)dst) + 2, m2); + _mm_storeu_si128(((__m128i*)dst) + 3, m3); +} + +static INLINE void memcpy_sse2_128(void *dst, const void *src) { + __m128i m0 = _mm_loadu_si128(((const __m128i*)src) + 0); + __m128i m1 = _mm_loadu_si128(((const __m128i*)src) + 1); + __m128i m2 = _mm_loadu_si128(((const __m128i*)src) + 2); + __m128i m3 = _mm_loadu_si128(((const __m128i*)src) + 3); + __m128i m4 = _mm_loadu_si128(((const __m128i*)src) + 4); + __m128i m5 = _mm_loadu_si128(((const __m128i*)src) + 5); + __m128i m6 = _mm_loadu_si128(((const __m128i*)src) + 6); + __m128i m7 = _mm_loadu_si128(((const __m128i*)src) + 7); + _mm_storeu_si128(((__m128i*)dst) + 0, m0); + _mm_storeu_si128(((__m128i*)dst) + 1, m1); + _mm_storeu_si128(((__m128i*)dst) + 2, m2); + _mm_storeu_si128(((__m128i*)dst) + 3, m3); + _mm_storeu_si128(((__m128i*)dst) + 4, m4); + _mm_storeu_si128(((__m128i*)dst) + 5, m5); + _mm_storeu_si128(((__m128i*)dst) + 6, m6); + _mm_storeu_si128(((__m128i*)dst) + 7, m7); +} + + +//--------------------------------------------------------------------- +// tiny memory copy with jump table optimized +//--------------------------------------------------------------------- +static INLINE void *memcpy_tiny(void *dst, const void *src, size_t size) { + unsigned char *dd = ((unsigned char*)dst) + size; + const unsigned char *ss = ((const unsigned char*)src) + size; + + switch (size) { + case 64: + memcpy_sse2_64(dd - 64, ss - 64); + case 0: + break; + + case 65: + memcpy_sse2_64(dd - 65, ss - 65); + case 1: + dd[-1] = ss[-1]; + break; + + case 66: + memcpy_sse2_64(dd - 66, ss - 66); + case 2: + *((uint16_t*)(dd - 2)) = *((uint16_t*)(ss - 2)); + break; + + case 67: + memcpy_sse2_64(dd - 67, ss - 67); + case 3: + *((uint16_t*)(dd - 3)) = *((uint16_t*)(ss - 3)); + dd[-1] = ss[-1]; + break; + + case 68: + memcpy_sse2_64(dd - 68, ss - 68); + case 4: + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 69: + memcpy_sse2_64(dd - 69, ss - 69); + case 5: + *((uint32_t*)(dd - 5)) = *((uint32_t*)(ss - 5)); + dd[-1] = ss[-1]; + break; + + case 70: + memcpy_sse2_64(dd - 70, ss - 70); + case 6: + *((uint32_t*)(dd - 6)) = *((uint32_t*)(ss - 6)); + *((uint16_t*)(dd - 2)) = *((uint16_t*)(ss - 2)); + break; + + case 71: + memcpy_sse2_64(dd - 71, ss - 71); + case 7: + *((uint32_t*)(dd - 7)) = *((uint32_t*)(ss - 7)); + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 72: + memcpy_sse2_64(dd - 72, ss - 72); + case 8: + *((uint64_t*)(dd - 8)) = *((uint64_t*)(ss - 8)); + break; + + case 73: + memcpy_sse2_64(dd - 73, ss - 73); + case 9: + *((uint64_t*)(dd - 9)) = *((uint64_t*)(ss - 9)); + dd[-1] = ss[-1]; + break; + + case 74: + memcpy_sse2_64(dd - 74, ss - 74); + case 10: + *((uint64_t*)(dd - 10)) = *((uint64_t*)(ss - 10)); + *((uint16_t*)(dd - 2)) = *((uint16_t*)(ss - 2)); + break; + + case 75: + memcpy_sse2_64(dd - 75, ss - 75); + case 11: + *((uint64_t*)(dd - 11)) = *((uint64_t*)(ss - 11)); + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 76: + memcpy_sse2_64(dd - 76, ss - 76); + case 12: + *((uint64_t*)(dd - 12)) = *((uint64_t*)(ss - 12)); + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 77: + memcpy_sse2_64(dd - 77, ss - 77); + case 13: + *((uint64_t*)(dd - 13)) = *((uint64_t*)(ss - 13)); + *((uint32_t*)(dd - 5)) = *((uint32_t*)(ss - 5)); + dd[-1] = ss[-1]; + break; + + case 78: + memcpy_sse2_64(dd - 78, ss - 78); + case 14: + *((uint64_t*)(dd - 14)) = *((uint64_t*)(ss - 14)); + *((uint64_t*)(dd - 8)) = *((uint64_t*)(ss - 8)); + break; + + case 79: + memcpy_sse2_64(dd - 79, ss - 79); + case 15: + *((uint64_t*)(dd - 15)) = *((uint64_t*)(ss - 15)); + *((uint64_t*)(dd - 8)) = *((uint64_t*)(ss - 8)); + break; + + case 80: + memcpy_sse2_64(dd - 80, ss - 80); + case 16: + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 81: + memcpy_sse2_64(dd - 81, ss - 81); + case 17: + memcpy_sse2_16(dd - 17, ss - 17); + dd[-1] = ss[-1]; + break; + + case 82: + memcpy_sse2_64(dd - 82, ss - 82); + case 18: + memcpy_sse2_16(dd - 18, ss - 18); + *((uint16_t*)(dd - 2)) = *((uint16_t*)(ss - 2)); + break; + + case 83: + memcpy_sse2_64(dd - 83, ss - 83); + case 19: + memcpy_sse2_16(dd - 19, ss - 19); + *((uint16_t*)(dd - 3)) = *((uint16_t*)(ss - 3)); + dd[-1] = ss[-1]; + break; + + case 84: + memcpy_sse2_64(dd - 84, ss - 84); + case 20: + memcpy_sse2_16(dd - 20, ss - 20); + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 85: + memcpy_sse2_64(dd - 85, ss - 85); + case 21: + memcpy_sse2_16(dd - 21, ss - 21); + *((uint32_t*)(dd - 5)) = *((uint32_t*)(ss - 5)); + dd[-1] = ss[-1]; + break; + + case 86: + memcpy_sse2_64(dd - 86, ss - 86); + case 22: + memcpy_sse2_16(dd - 22, ss - 22); + *((uint32_t*)(dd - 6)) = *((uint32_t*)(ss - 6)); + *((uint16_t*)(dd - 2)) = *((uint16_t*)(ss - 2)); + break; + + case 87: + memcpy_sse2_64(dd - 87, ss - 87); + case 23: + memcpy_sse2_16(dd - 23, ss - 23); + *((uint32_t*)(dd - 7)) = *((uint32_t*)(ss - 7)); + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 88: + memcpy_sse2_64(dd - 88, ss - 88); + case 24: + memcpy_sse2_16(dd - 24, ss - 24); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 89: + memcpy_sse2_64(dd - 89, ss - 89); + case 25: + memcpy_sse2_16(dd - 25, ss - 25); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 90: + memcpy_sse2_64(dd - 90, ss - 90); + case 26: + memcpy_sse2_16(dd - 26, ss - 26); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 91: + memcpy_sse2_64(dd - 91, ss - 91); + case 27: + memcpy_sse2_16(dd - 27, ss - 27); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 92: + memcpy_sse2_64(dd - 92, ss - 92); + case 28: + memcpy_sse2_16(dd - 28, ss - 28); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 93: + memcpy_sse2_64(dd - 93, ss - 93); + case 29: + memcpy_sse2_16(dd - 29, ss - 29); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 94: + memcpy_sse2_64(dd - 94, ss - 94); + case 30: + memcpy_sse2_16(dd - 30, ss - 30); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 95: + memcpy_sse2_64(dd - 95, ss - 95); + case 31: + memcpy_sse2_16(dd - 31, ss - 31); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 96: + memcpy_sse2_64(dd - 96, ss - 96); + case 32: + memcpy_sse2_32(dd - 32, ss - 32); + break; + + case 97: + memcpy_sse2_64(dd - 97, ss - 97); + case 33: + memcpy_sse2_32(dd - 33, ss - 33); + dd[-1] = ss[-1]; + break; + + case 98: + memcpy_sse2_64(dd - 98, ss - 98); + case 34: + memcpy_sse2_32(dd - 34, ss - 34); + *((uint16_t*)(dd - 2)) = *((uint16_t*)(ss - 2)); + break; + + case 99: + memcpy_sse2_64(dd - 99, ss - 99); + case 35: + memcpy_sse2_32(dd - 35, ss - 35); + *((uint16_t*)(dd - 3)) = *((uint16_t*)(ss - 3)); + dd[-1] = ss[-1]; + break; + + case 100: + memcpy_sse2_64(dd - 100, ss - 100); + case 36: + memcpy_sse2_32(dd - 36, ss - 36); + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 101: + memcpy_sse2_64(dd - 101, ss - 101); + case 37: + memcpy_sse2_32(dd - 37, ss - 37); + *((uint32_t*)(dd - 5)) = *((uint32_t*)(ss - 5)); + dd[-1] = ss[-1]; + break; + + case 102: + memcpy_sse2_64(dd - 102, ss - 102); + case 38: + memcpy_sse2_32(dd - 38, ss - 38); + *((uint32_t*)(dd - 6)) = *((uint32_t*)(ss - 6)); + *((uint16_t*)(dd - 2)) = *((uint16_t*)(ss - 2)); + break; + + case 103: + memcpy_sse2_64(dd - 103, ss - 103); + case 39: + memcpy_sse2_32(dd - 39, ss - 39); + *((uint32_t*)(dd - 7)) = *((uint32_t*)(ss - 7)); + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 104: + memcpy_sse2_64(dd - 104, ss - 104); + case 40: + memcpy_sse2_32(dd - 40, ss - 40); + *((uint64_t*)(dd - 8)) = *((uint64_t*)(ss - 8)); + break; + + case 105: + memcpy_sse2_64(dd - 105, ss - 105); + case 41: + memcpy_sse2_32(dd - 41, ss - 41); + *((uint64_t*)(dd - 9)) = *((uint64_t*)(ss - 9)); + dd[-1] = ss[-1]; + break; + + case 106: + memcpy_sse2_64(dd - 106, ss - 106); + case 42: + memcpy_sse2_32(dd - 42, ss - 42); + *((uint64_t*)(dd - 10)) = *((uint64_t*)(ss - 10)); + *((uint16_t*)(dd - 2)) = *((uint16_t*)(ss - 2)); + break; + + case 107: + memcpy_sse2_64(dd - 107, ss - 107); + case 43: + memcpy_sse2_32(dd - 43, ss - 43); + *((uint64_t*)(dd - 11)) = *((uint64_t*)(ss - 11)); + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 108: + memcpy_sse2_64(dd - 108, ss - 108); + case 44: + memcpy_sse2_32(dd - 44, ss - 44); + *((uint64_t*)(dd - 12)) = *((uint64_t*)(ss - 12)); + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 109: + memcpy_sse2_64(dd - 109, ss - 109); + case 45: + memcpy_sse2_32(dd - 45, ss - 45); + *((uint64_t*)(dd - 13)) = *((uint64_t*)(ss - 13)); + *((uint32_t*)(dd - 5)) = *((uint32_t*)(ss - 5)); + dd[-1] = ss[-1]; + break; + + case 110: + memcpy_sse2_64(dd - 110, ss - 110); + case 46: + memcpy_sse2_32(dd - 46, ss - 46); + *((uint64_t*)(dd - 14)) = *((uint64_t*)(ss - 14)); + *((uint64_t*)(dd - 8)) = *((uint64_t*)(ss - 8)); + break; + + case 111: + memcpy_sse2_64(dd - 111, ss - 111); + case 47: + memcpy_sse2_32(dd - 47, ss - 47); + *((uint64_t*)(dd - 15)) = *((uint64_t*)(ss - 15)); + *((uint64_t*)(dd - 8)) = *((uint64_t*)(ss - 8)); + break; + + case 112: + memcpy_sse2_64(dd - 112, ss - 112); + case 48: + memcpy_sse2_32(dd - 48, ss - 48); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 113: + memcpy_sse2_64(dd - 113, ss - 113); + case 49: + memcpy_sse2_32(dd - 49, ss - 49); + memcpy_sse2_16(dd - 17, ss - 17); + dd[-1] = ss[-1]; + break; + + case 114: + memcpy_sse2_64(dd - 114, ss - 114); + case 50: + memcpy_sse2_32(dd - 50, ss - 50); + memcpy_sse2_16(dd - 18, ss - 18); + *((uint16_t*)(dd - 2)) = *((uint16_t*)(ss - 2)); + break; + + case 115: + memcpy_sse2_64(dd - 115, ss - 115); + case 51: + memcpy_sse2_32(dd - 51, ss - 51); + memcpy_sse2_16(dd - 19, ss - 19); + *((uint16_t*)(dd - 3)) = *((uint16_t*)(ss - 3)); + dd[-1] = ss[-1]; + break; + + case 116: + memcpy_sse2_64(dd - 116, ss - 116); + case 52: + memcpy_sse2_32(dd - 52, ss - 52); + memcpy_sse2_16(dd - 20, ss - 20); + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 117: + memcpy_sse2_64(dd - 117, ss - 117); + case 53: + memcpy_sse2_32(dd - 53, ss - 53); + memcpy_sse2_16(dd - 21, ss - 21); + *((uint32_t*)(dd - 5)) = *((uint32_t*)(ss - 5)); + dd[-1] = ss[-1]; + break; + + case 118: + memcpy_sse2_64(dd - 118, ss - 118); + case 54: + memcpy_sse2_32(dd - 54, ss - 54); + memcpy_sse2_16(dd - 22, ss - 22); + *((uint32_t*)(dd - 6)) = *((uint32_t*)(ss - 6)); + *((uint16_t*)(dd - 2)) = *((uint16_t*)(ss - 2)); + break; + + case 119: + memcpy_sse2_64(dd - 119, ss - 119); + case 55: + memcpy_sse2_32(dd - 55, ss - 55); + memcpy_sse2_16(dd - 23, ss - 23); + *((uint32_t*)(dd - 7)) = *((uint32_t*)(ss - 7)); + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 120: + memcpy_sse2_64(dd - 120, ss - 120); + case 56: + memcpy_sse2_32(dd - 56, ss - 56); + memcpy_sse2_16(dd - 24, ss - 24); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 121: + memcpy_sse2_64(dd - 121, ss - 121); + case 57: + memcpy_sse2_32(dd - 57, ss - 57); + memcpy_sse2_16(dd - 25, ss - 25); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 122: + memcpy_sse2_64(dd - 122, ss - 122); + case 58: + memcpy_sse2_32(dd - 58, ss - 58); + memcpy_sse2_16(dd - 26, ss - 26); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 123: + memcpy_sse2_64(dd - 123, ss - 123); + case 59: + memcpy_sse2_32(dd - 59, ss - 59); + memcpy_sse2_16(dd - 27, ss - 27); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 124: + memcpy_sse2_64(dd - 124, ss - 124); + case 60: + memcpy_sse2_32(dd - 60, ss - 60); + memcpy_sse2_16(dd - 28, ss - 28); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 125: + memcpy_sse2_64(dd - 125, ss - 125); + case 61: + memcpy_sse2_32(dd - 61, ss - 61); + memcpy_sse2_16(dd - 29, ss - 29); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 126: + memcpy_sse2_64(dd - 126, ss - 126); + case 62: + memcpy_sse2_32(dd - 62, ss - 62); + memcpy_sse2_16(dd - 30, ss - 30); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 127: + memcpy_sse2_64(dd - 127, ss - 127); + case 63: + memcpy_sse2_32(dd - 63, ss - 63); + memcpy_sse2_16(dd - 31, ss - 31); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 128: + memcpy_sse2_128(dd - 128, ss - 128); + break; + } + + return dst; +} + + +//--------------------------------------------------------------------- +// main routine +//--------------------------------------------------------------------- +static void* memcpy_fast(void *destination, const void *source, size_t size) +{ + unsigned char *dst = (unsigned char*)destination; + const unsigned char *src = (const unsigned char*)source; + static size_t cachesize = 0x200000; // L2-cache size + size_t padding; + + // small memory copy + if (size <= 128) { + return memcpy_tiny(dst, src, size); + } + + // align destination to 16 bytes boundary + padding = (16 - (((size_t)dst) & 15)) & 15; + + if (padding > 0) { + __m128i head = _mm_loadu_si128((const __m128i*)src); + _mm_storeu_si128((__m128i*)dst, head); + dst += padding; + src += padding; + size -= padding; + } + + // medium size copy + if (size <= cachesize) { + __m128i c0, c1, c2, c3, c4, c5, c6, c7; + + for (; size >= 128; size -= 128) { + c0 = _mm_loadu_si128(((const __m128i*)src) + 0); + c1 = _mm_loadu_si128(((const __m128i*)src) + 1); + c2 = _mm_loadu_si128(((const __m128i*)src) + 2); + c3 = _mm_loadu_si128(((const __m128i*)src) + 3); + c4 = _mm_loadu_si128(((const __m128i*)src) + 4); + c5 = _mm_loadu_si128(((const __m128i*)src) + 5); + c6 = _mm_loadu_si128(((const __m128i*)src) + 6); + c7 = _mm_loadu_si128(((const __m128i*)src) + 7); + _mm_prefetch((const char*)(src + 256), _MM_HINT_NTA); + src += 128; + _mm_store_si128((((__m128i*)dst) + 0), c0); + _mm_store_si128((((__m128i*)dst) + 1), c1); + _mm_store_si128((((__m128i*)dst) + 2), c2); + _mm_store_si128((((__m128i*)dst) + 3), c3); + _mm_store_si128((((__m128i*)dst) + 4), c4); + _mm_store_si128((((__m128i*)dst) + 5), c5); + _mm_store_si128((((__m128i*)dst) + 6), c6); + _mm_store_si128((((__m128i*)dst) + 7), c7); + dst += 128; + } + } + else { // big memory copy + __m128i c0, c1, c2, c3, c4, c5, c6, c7; + + _mm_prefetch((const char*)(src), _MM_HINT_NTA); + + if ((((size_t)src) & 15) == 0) { // source aligned + for (; size >= 128; size -= 128) { + c0 = _mm_load_si128(((const __m128i*)src) + 0); + c1 = _mm_load_si128(((const __m128i*)src) + 1); + c2 = _mm_load_si128(((const __m128i*)src) + 2); + c3 = _mm_load_si128(((const __m128i*)src) + 3); + c4 = _mm_load_si128(((const __m128i*)src) + 4); + c5 = _mm_load_si128(((const __m128i*)src) + 5); + c6 = _mm_load_si128(((const __m128i*)src) + 6); + c7 = _mm_load_si128(((const __m128i*)src) + 7); + _mm_prefetch((const char*)(src + 256), _MM_HINT_NTA); + src += 128; + _mm_stream_si128((((__m128i*)dst) + 0), c0); + _mm_stream_si128((((__m128i*)dst) + 1), c1); + _mm_stream_si128((((__m128i*)dst) + 2), c2); + _mm_stream_si128((((__m128i*)dst) + 3), c3); + _mm_stream_si128((((__m128i*)dst) + 4), c4); + _mm_stream_si128((((__m128i*)dst) + 5), c5); + _mm_stream_si128((((__m128i*)dst) + 6), c6); + _mm_stream_si128((((__m128i*)dst) + 7), c7); + dst += 128; + } + } + else { // source unaligned + for (; size >= 128; size -= 128) { + c0 = _mm_loadu_si128(((const __m128i*)src) + 0); + c1 = _mm_loadu_si128(((const __m128i*)src) + 1); + c2 = _mm_loadu_si128(((const __m128i*)src) + 2); + c3 = _mm_loadu_si128(((const __m128i*)src) + 3); + c4 = _mm_loadu_si128(((const __m128i*)src) + 4); + c5 = _mm_loadu_si128(((const __m128i*)src) + 5); + c6 = _mm_loadu_si128(((const __m128i*)src) + 6); + c7 = _mm_loadu_si128(((const __m128i*)src) + 7); + _mm_prefetch((const char*)(src + 256), _MM_HINT_NTA); + src += 128; + _mm_stream_si128((((__m128i*)dst) + 0), c0); + _mm_stream_si128((((__m128i*)dst) + 1), c1); + _mm_stream_si128((((__m128i*)dst) + 2), c2); + _mm_stream_si128((((__m128i*)dst) + 3), c3); + _mm_stream_si128((((__m128i*)dst) + 4), c4); + _mm_stream_si128((((__m128i*)dst) + 5), c5); + _mm_stream_si128((((__m128i*)dst) + 6), c6); + _mm_stream_si128((((__m128i*)dst) + 7), c7); + dst += 128; + } + } + _mm_sfence(); + } + + memcpy_tiny(dst, src, size); + + return destination; +} + + +#endif diff --git a/src/components/implementation/simple_vmm/vmm/netio.c b/src/components/implementation/simple_vmm/vmm/netio.c index a37dd7f962..cc0e4acdbb 100644 --- a/src/components/implementation/simple_vmm/vmm/netio.c +++ b/src/components/implementation/simple_vmm/vmm/netio.c @@ -19,7 +19,7 @@ netio_get_a_packet(u16_t *pkt_len) tx_obj = shm_bm_alloc_net_pkt_buf(tx_shmemd, &tx_pktid); assert(tx_obj); - virtio_net_send_one_pkt(tx_obj->data, &_pkt_len, 0); + virtio_net_send_one_pkt(tx_obj->data, &_pkt_len); *pkt_len = _pkt_len; return tx_pktid; @@ -160,19 +160,12 @@ netio_get_a_packet_batch(u8_t batch_limit) if (svc_id < 0) { printc("no svc available for this nf:%d, thd:%d\n", nf_id, nf_thd); assert(0); - return 0; } - struct vmrt_vm_comp *vm = nf_svc_tbl[nf_id][nf_thd].vm; + session = get_nf_session(svc_id); - // printc("####################:%d, %d, vm:%d, svc:%d\n", nf_id, nf_thd, vm->comp_id, svc_id); - session = get_nf_session(vm, svc_id); - - - // sync_sem_take(&session->tx_sem); while (nf_tx_ring_buf_empty(&session->nf_tx_ring_buf)) { sched_thd_yield(); - // sched_thd_block(0); } assert(nf_tx_ring_buf_dequeue(&session->nf_tx_ring_buf, &buf)); @@ -273,7 +266,7 @@ netio_svc_update(int svc_id, u32_t vm) nf_svc_update(nf_id, thd, svc_id, vm_list[vm]); struct nf_session *session; - session = get_nf_session(vm_list[vm], svc_id); + session = get_nf_session(svc_id); nf_session_tx_update(session, tx_shm, thd); sync_sem_init(&session->tx_sem, 0); diff --git a/src/components/implementation/simple_vmm/vmm/nf_session.c b/src/components/implementation/simple_vmm/vmm/nf_session.c index 7ba4e8a397..a5d56bdb82 100644 --- a/src/components/implementation/simple_vmm/vmm/nf_session.c +++ b/src/components/implementation/simple_vmm/vmm/nf_session.c @@ -5,21 +5,19 @@ CK_RING_PROTOTYPE(nf_tx_ring_buf, nf_pkt_meta_data); static char ring_buffers[NF_TX_MAX_RING_NUM][NF_TX_PKT_RING_SZ]; -static struct nf_session nf_sessions[VMRT_MAX_VM][MAX_SVC_NUM]; +static struct nf_session nf_sessions[MAX_SVC_NUM]; void nf_sessions_init(void) { - for (int i = 0; i < VMRT_MAX_VM; i++) { - for (int j = 0; j < MAX_SVC_NUM; j++) { - nf_sessions[i][j].rx_shmemd = 0; - nf_sessions[i][j].rx_thd = 0; - nf_sessions[i][j].tx_shmemd = 0; - nf_sessions[i][j].tx_thd = 0; - nf_sessions[i][j].nf_tx_ring_buf.ring = 0; - nf_sessions[i][j].nf_tx_ring_buf.ringbuf = 0; - - } + for (int i = 0; i < MAX_SVC_NUM; i++) { + nf_sessions[i].rx_shmemd = 0; + nf_sessions[i].rx_thd = 0; + nf_sessions[i].tx_shmemd = 0; + nf_sessions[i].tx_thd = 0; + nf_sessions[i].nf_tx_ring_buf.ring = 0; + nf_sessions[i].nf_tx_ring_buf.ringbuf = 0; + } } @@ -62,10 +60,10 @@ nf_tx_ring_buf_empty(struct nf_tx_ring_buf *pkt_ring_buf) return (!ck_ring_size(pkt_ring_buf->ring)); } -struct nf_session *get_nf_session(struct vmrt_vm_comp *vm, int svc_id) +struct nf_session *get_nf_session(int svc_id) { - if (svc_id < 0) return NULL; - else return &nf_sessions[vm->comp_id][svc_id]; + if (unlikely(svc_id < 0 || svc_id > 1000)) return &nf_sessions[0]; + else return &nf_sessions[svc_id]; } void diff --git a/src/components/implementation/simple_vmm/vmm/nf_session.h b/src/components/implementation/simple_vmm/vmm/nf_session.h index 74abaaf252..00f81a0d44 100644 --- a/src/components/implementation/simple_vmm/vmm/nf_session.h +++ b/src/components/implementation/simple_vmm/vmm/nf_session.h @@ -26,7 +26,7 @@ struct nf_session { struct nf_tx_ring_buf nf_tx_ring_buf; }; -#define NF_TX_PKT_RBUF_NUM 32 +#define NF_TX_PKT_RBUF_NUM 512 #define NF_TX_PKT_RBUF_SZ (NF_TX_PKT_RBUF_NUM * sizeof(struct nf_tx_ring_buf)) #define NF_TX_PKT_RING_SZ (sizeof(struct ck_ring) + NF_TX_PKT_RBUF_SZ) #define NF_TX_PKT_RING_PAGES (round_up_to_page(NF_TX_PKT_RING_SZ)/PAGE_SIZE) @@ -37,7 +37,7 @@ struct nf_session { #define MAX_SVC_NUM (20000) -struct nf_session *get_nf_session(struct vmrt_vm_comp *vm, int svc_id); +struct nf_session *get_nf_session(int svc_id); void nf_session_tx_update(struct nf_session *session, shm_bm_t tx_shmemd, thdid_t tx_thd); void nf_tx_ring_buf_init(struct nf_tx_ring_buf *pkt_ring_buf, size_t ringbuf_num, size_t ringbuf_sz); int nf_tx_ring_buf_enqueue(struct nf_tx_ring_buf *pkt_ring_buf, struct nf_pkt_meta_data *buf); diff --git a/src/components/implementation/simple_vmm/vmm/simple_vmm.c b/src/components/implementation/simple_vmm/vmm/simple_vmm.c index b79792e225..ccacf9f790 100644 --- a/src/components/implementation/simple_vmm/vmm/simple_vmm.c +++ b/src/components/implementation/simple_vmm/vmm/simple_vmm.c @@ -64,13 +64,9 @@ SS_STATIC_SLAB(vcpu_mmio_req, struct acrn_mmio_request, VM_MAX_COMPS * VMRT_VM_M struct sync_lock vm_boot_lock; -static int pause = 0; -static int hlt = 0; - void pause_handler(struct vmrt_vm_vcpu *vcpu) { - // printc("paused %d\n", pause++); sched_thd_yield(); GOTO_NEXT_INST(vcpu->shared_region); } @@ -78,7 +74,6 @@ pause_handler(struct vmrt_vm_vcpu *vcpu) void hlt_handler(struct vmrt_vm_vcpu *vcpu) { - // printc("hlt %d\n", hlt++); sched_thd_yield(); GOTO_NEXT_INST(vcpu->shared_region); } @@ -246,6 +241,7 @@ rx_task(void) // netio_shmem_map(netshmem_get_shm_id()); nic_shmem_map(netshmem_get_shm_id()); ip = inet_addr("10.10.1.2"); + nic_bind_port(ip, 0); int i = 0; @@ -308,19 +304,13 @@ tx_task(void) nf_svc_update(cos_compid(), cos_thdid(), svc_id, g_vm); struct nf_session *session; - session = get_nf_session(g_vm, svc_id); + session = get_nf_session(svc_id); nf_session_tx_update(session, tx_shmemd, cos_thdid()); sync_sem_init(&session->tx_sem, 0); nf_tx_ring_buf_init(&session->nf_tx_ring_buf, NF_TX_PKT_RBUF_NUM, NF_TX_PKT_RING_SZ); - while(1) { - u8_t batch_ct = 32; - - first_objid = objid = netio_get_a_packet_batch(batch_ct); - - nic_send_packet_batch(first_objid); - } + virtio_tx_task(0); } void @@ -335,21 +325,14 @@ cos_init(void) printc("created vm done:%d, %p\n", g_vm->comp_id, g_vm); g_vm->vm_mac_id = 0; - g_vm1 = vm_comp_create(); - g_vm1->vm_mac_id = 1; - - sync_lock_init(&vm_boot_lock); - - printc("creating vm1 done:%d, %p\n", g_vm1->comp_id, g_vm1); vm_list[0] = g_vm; - vm_list[1] = g_vm1; } void cos_parallel_init(coreid_t cid, int init_core, int ncores) { struct vmrt_vm_vcpu *vcpu; -#if NO_NF_TEST + if (cid == 0) { rx_tid = sched_thd_create((void *)rx_task, NULL); netshmem_create(rx_tid); @@ -357,11 +340,6 @@ cos_parallel_init(coreid_t cid, int init_core, int ncores) netshmem_create(tx_tid); printc("NF rx tid:%ld, tx tid:%ld\n", rx_tid, tx_tid); - extern void virtio_tx_task(void *data); - virtio_tx_tid = sched_thd_create((void *)virtio_tx_task, g_vm); - printc("virtio_tx_tid:%d\n", virtio_tx_tid); - g_vm->tx_thd = virtio_tx_tid; - vmrt_vm_vcpu_init(g_vm, 0); vcpu = vmrt_get_vcpu(g_vm, 0); @@ -370,13 +348,8 @@ cos_parallel_init(coreid_t cid, int init_core, int ncores) mmio_init(vcpu); } else { - vmrt_vm_vcpu_init(g_vm1, 0); - vcpu = vmrt_get_vcpu(g_vm1, 0); - lapic_init(vcpu); - iinst_ctxt_init(vcpu); - mmio_init(vcpu); + } -#endif return; } @@ -389,18 +362,12 @@ parallel_main(coreid_t cid) if (cid == 0) { vcpu = vmrt_get_vcpu(g_vm, 0); vmrt_vm_vcpu_start(vcpu); -#if NO_NF_TEST + sched_thd_param_set(rx_tid, sched_param_pack(SCHEDP_PRIO, NF_THD_PRIORITY)); sched_thd_param_set(tx_tid, sched_param_pack(SCHEDP_PRIO, NF_THD_PRIORITY)); - sched_thd_param_set(virtio_tx_tid, sched_param_pack(SCHEDP_PRIO, NF_THD_PRIORITY)); -#endif } else if(cid == 1) { - /* wait for the first vm to start */ - // sched_thd_block_timeout(0, time_now() + time_usec2cyc(10000000)); - // printc("----------------------STARTING SECOND VM----------------------\n"); - // vcpu = vmrt_get_vcpu(g_vm1, 0); - // vmrt_vm_vcpu_start(vcpu); + } while (1) diff --git a/src/components/interface/netshmem/netshmem.h b/src/components/interface/netshmem/netshmem.h index 621d103564..bf8d28d8e8 100644 --- a/src/components/interface/netshmem/netshmem.h +++ b/src/components/interface/netshmem/netshmem.h @@ -4,7 +4,7 @@ #include #include -#define PKT_BUF_NUM 128 +#define PKT_BUF_NUM 1024 #define PKT_BUF_SIZE 2048 struct netshmem { diff --git a/src/components/lib/dpdk/Makefile b/src/components/lib/dpdk/Makefile index 69d01da074..a986a9a13e 100644 --- a/src/components/lib/dpdk/Makefile +++ b/src/components/lib/dpdk/Makefile @@ -64,8 +64,8 @@ config: $(MUSL_BIN_PATH) meson build \ --cross-file $(shell pwd)/cross_x86_64_composite_with_musl \ -Dmachine=default -Dc_args="-nostdlib -nostdinc -mcmodel=large -DCOMPOSITE_EXISTS $(DPDK_ADAPTER_INC)" \ - -Ddefault_library=static -Ddebug=true \ - -Doptimization=0 -Dincludedir=$(shell pwd)/$(DPDK_INC_DIR) \ + -Ddefault_library=static -Ddebug=false \ + -Doptimization=3 -Dincludedir=$(shell pwd)/$(DPDK_INC_DIR) \ -Dprefix=$(shell pwd)/$(DPDK_INSTALL_DIR) $(DISABLED_DRIVERS) build: $(info Building DPDK) diff --git a/src/components/lib/dpdk/cos_dpdk.c b/src/components/lib/dpdk/cos_dpdk.c index 2ff097b85d..c5fe45ef9e 100644 --- a/src/components/lib/dpdk/cos_dpdk.c +++ b/src/components/lib/dpdk/cos_dpdk.c @@ -114,7 +114,7 @@ cos_eth_ports_init(void) for (i = 0; i < nb_ports; i++) { cos_eth_info_print(ports_ids[i]); } -#if E810_NIC +#if 1 ports_ids[0] = 1; nb_ports = 1; #endif @@ -302,7 +302,7 @@ cos_dev_port_tx_queue_setup(cos_portid_t port_id, uint16_t tx_queue_id, assert(dev_info.tx_offload_capa & DEV_TX_OFFLOAD_UDP_CKSUM); #endif - // txq_conf.tx_free_thresh = nb_tx_desc - 32; + txq_conf.tx_free_thresh = nb_tx_desc - 32; /* set the txq to enable IP and UDP offload */ if (ENABLE_OFFLOAD) { txq_conf.offloads |= DEV_TX_OFFLOAD_IPV4_CKSUM; @@ -453,6 +453,7 @@ cos_dev_port_tx_burst(cos_portid_t port_id, uint16_t queue_id, char* cos_get_packet(char* mbuf, int *len) { + rte_prefetch0((char *)rte_pktmbuf_mtod((struct rte_mbuf*)mbuf, void *) + 16); *len = ((struct rte_mbuf*)mbuf)->pkt_len; return (char *)rte_pktmbuf_mtod((struct rte_mbuf*)mbuf, struct rte_ether_hdr *); } diff --git a/src/components/lib/slm/quantum.c b/src/components/lib/slm/quantum.c index c3fadf6018..551d1d3dcc 100644 --- a/src/components/lib/slm/quantum.c +++ b/src/components/lib/slm/quantum.c @@ -164,7 +164,7 @@ slm_policy_timer_init(microsec_t period) int slm_timer_quantum_init(void) { - slm_policy_timer_init(1000); + slm_policy_timer_init(200); return 0; } From e782f5df387c2ed56001ab91ff770bc3537c8975 Mon Sep 17 00:00:00 2001 From: betahxy Date: Wed, 20 Mar 2024 00:00:00 -0400 Subject: [PATCH 08/60] Integration Testing --- composition_scripts/vmm_no_nf.toml | 2 +- composition_scripts/vmm_no_nf_multi_core.toml | 41 + composition_scripts/vmm_noop_nf.toml | 4 +- .../implementation/capmgr/simple/capmgr.c | 4 + .../implementation/nicmgr/dpdk/nicmgr.c | 18 +- .../implementation/simple_nf/noop_nf/main.c | 109 +- .../simple_vmm/nf_multicore/Makefile | 29 + .../simple_vmm/nf_multicore/acrn_common.h | 797 +++++++++ .../simple_vmm/nf_multicore/acrn_types.h | 51 + .../simple_vmm/nf_multicore/apicreg.h | 444 +++++ .../simple_vmm/nf_multicore/atomic.h | 152 ++ .../simple_vmm/nf_multicore/bits.h | 298 ++++ .../simple_vmm/nf_multicore/cpu.h | 337 ++++ .../simple_vmm/nf_multicore/cpu_caps.h | 68 + .../simple_vmm/nf_multicore/cpuid.h | 186 ++ .../nf_multicore/devices/serial/serial.c | 56 + .../nf_multicore/devices/serial/serial.h | 17 + .../nf_multicore/devices/vpci/virtio_net_io.c | 744 ++++++++ .../nf_multicore/devices/vpci/virtio_net_io.h | 144 ++ .../devices/vpci/virtio_net_vpci.c | 51 + .../nf_multicore/devices/vpci/virtio_ring.h | 260 +++ .../nf_multicore/devices/vpci/vpci.c | 316 ++++ .../nf_multicore/devices/vpci/vpci.h | 180 ++ .../nf_multicore/devices/vpci/vpci_io.c | 191 ++ .../nf_multicore/devices/vpic/vpic.c | 109 ++ .../nf_multicore/devices/vpic/vpic.h | 24 + .../nf_multicore/devices/vps2/vps2.c | 47 + .../nf_multicore/devices/vps2/vps2.h | 6 + .../nf_multicore/devices/vrtc/vrtc.c | 58 + .../nf_multicore/devices/vrtc/vrtc.h | 7 + .../simple_vmm/nf_multicore/fast_memcpy.h | 689 ++++++++ .../simple_vmm/nf_multicore/guest/.gitignore | 2 + .../simple_vmm/nf_multicore/guest/Makefile | 47 + .../simple_vmm/nf_multicore/guest/guest.ld | 34 + .../nf_multicore/guest/guest_realmode.S | 60 + .../simple_vmm/nf_multicore/instr_emul.c | 1381 +++++++++++++++ .../simple_vmm/nf_multicore/instr_emul.h | 95 + .../simple_vmm/nf_multicore/ioapic.h | 99 ++ .../simple_vmm/nf_multicore/irq.h | 136 ++ .../simple_vmm/nf_multicore/netio.c | 275 +++ .../simple_vmm/nf_multicore/nf_session.c | 74 + .../simple_vmm/nf_multicore/nf_session.h | 49 + .../simple_vmm/nf_multicore/simple_vmm.c | 384 ++++ .../simple_vmm/nf_multicore/vcpuid.c | 766 ++++++++ .../simple_vmm/nf_multicore/vcpuid.h | 35 + .../simple_vmm/nf_multicore/vio.c | 106 ++ .../simple_vmm/nf_multicore/vioapic.c | 564 ++++++ .../simple_vmm/nf_multicore/vioapic.h | 128 ++ .../simple_vmm/nf_multicore/vlapic.c | 1554 +++++++++++++++++ .../simple_vmm/nf_multicore/vlapic.h | 260 +++ .../simple_vmm/nf_multicore/vlapic_priv.h | 84 + .../simple_vmm/nf_multicore/vmmio.c | 53 + .../simple_vmm/nf_multicore/vmsr.c | 249 +++ .../simple_vmm/nf_multicore/vpic.h | 191 ++ .../simple_vmm/noop_nf/Makefile | 29 + .../simple_vmm/noop_nf/acrn_common.h | 797 +++++++++ .../simple_vmm/noop_nf/acrn_types.h | 51 + .../simple_vmm/noop_nf/apicreg.h | 444 +++++ .../simple_vmm/noop_nf/atomic.h | 152 ++ .../implementation/simple_vmm/noop_nf/bits.h | 298 ++++ .../implementation/simple_vmm/noop_nf/cpu.h | 337 ++++ .../simple_vmm/noop_nf/cpu_caps.h | 68 + .../implementation/simple_vmm/noop_nf/cpuid.h | 186 ++ .../noop_nf/devices/serial/serial.c | 56 + .../noop_nf/devices/serial/serial.h | 17 + .../noop_nf/devices/vpci/virtio_net_io.c | 693 ++++++++ .../noop_nf/devices/vpci/virtio_net_io.h | 144 ++ .../noop_nf/devices/vpci/virtio_net_vpci.c | 51 + .../noop_nf/devices/vpci/virtio_ring.h | 260 +++ .../simple_vmm/noop_nf/devices/vpci/vpci.c | 316 ++++ .../simple_vmm/noop_nf/devices/vpci/vpci.h | 180 ++ .../simple_vmm/noop_nf/devices/vpci/vpci_io.c | 191 ++ .../simple_vmm/noop_nf/devices/vpic/vpic.c | 109 ++ .../simple_vmm/noop_nf/devices/vpic/vpic.h | 24 + .../simple_vmm/noop_nf/devices/vps2/vps2.c | 47 + .../simple_vmm/noop_nf/devices/vps2/vps2.h | 6 + .../simple_vmm/noop_nf/devices/vrtc/vrtc.c | 58 + .../simple_vmm/noop_nf/devices/vrtc/vrtc.h | 7 + .../simple_vmm/noop_nf/fast_memcpy.h | 689 ++++++++ .../simple_vmm/noop_nf/guest/.gitignore | 2 + .../simple_vmm/noop_nf/guest/Makefile | 47 + .../simple_vmm/noop_nf/guest/guest.ld | 34 + .../simple_vmm/noop_nf/guest/guest_realmode.S | 60 + .../simple_vmm/noop_nf/instr_emul.c | 1381 +++++++++++++++ .../simple_vmm/noop_nf/instr_emul.h | 95 + .../simple_vmm/noop_nf/ioapic.h | 99 ++ .../implementation/simple_vmm/noop_nf/irq.h | 136 ++ .../implementation/simple_vmm/noop_nf/netio.c | 274 +++ .../simple_vmm/noop_nf/nf_session.c | 74 + .../simple_vmm/noop_nf/nf_session.h | 49 + .../simple_vmm/noop_nf/simple_vmm.c | 274 +++ .../simple_vmm/noop_nf/vcpuid.c | 766 ++++++++ .../simple_vmm/noop_nf/vcpuid.h | 35 + .../implementation/simple_vmm/noop_nf/vio.c | 106 ++ .../simple_vmm/noop_nf/vioapic.c | 564 ++++++ .../simple_vmm/noop_nf/vioapic.h | 128 ++ .../simple_vmm/noop_nf/vlapic.c | 1554 +++++++++++++++++ .../simple_vmm/noop_nf/vlapic.h | 260 +++ .../simple_vmm/noop_nf/vlapic_priv.h | 84 + .../implementation/simple_vmm/noop_nf/vmmio.c | 53 + .../implementation/simple_vmm/noop_nf/vmsr.c | 249 +++ .../implementation/simple_vmm/noop_nf/vpic.h | 191 ++ .../simple_vmm/vmm/simple_vmm.c | 2 + src/components/interface/netshmem/lib.c | 7 + src/components/lib/dpdk/cos_dpdk.c | 9 +- src/components/lib/slm/slm_blkpt.c | 4 +- 106 files changed, 23687 insertions(+), 125 deletions(-) create mode 100644 composition_scripts/vmm_no_nf_multi_core.toml create mode 100644 src/components/implementation/simple_vmm/nf_multicore/Makefile create mode 100644 src/components/implementation/simple_vmm/nf_multicore/acrn_common.h create mode 100644 src/components/implementation/simple_vmm/nf_multicore/acrn_types.h create mode 100644 src/components/implementation/simple_vmm/nf_multicore/apicreg.h create mode 100644 src/components/implementation/simple_vmm/nf_multicore/atomic.h create mode 100644 src/components/implementation/simple_vmm/nf_multicore/bits.h create mode 100755 src/components/implementation/simple_vmm/nf_multicore/cpu.h create mode 100644 src/components/implementation/simple_vmm/nf_multicore/cpu_caps.h create mode 100644 src/components/implementation/simple_vmm/nf_multicore/cpuid.h create mode 100644 src/components/implementation/simple_vmm/nf_multicore/devices/serial/serial.c create mode 100644 src/components/implementation/simple_vmm/nf_multicore/devices/serial/serial.h create mode 100644 src/components/implementation/simple_vmm/nf_multicore/devices/vpci/virtio_net_io.c create mode 100644 src/components/implementation/simple_vmm/nf_multicore/devices/vpci/virtio_net_io.h create mode 100644 src/components/implementation/simple_vmm/nf_multicore/devices/vpci/virtio_net_vpci.c create mode 100644 src/components/implementation/simple_vmm/nf_multicore/devices/vpci/virtio_ring.h create mode 100644 src/components/implementation/simple_vmm/nf_multicore/devices/vpci/vpci.c create mode 100644 src/components/implementation/simple_vmm/nf_multicore/devices/vpci/vpci.h create mode 100644 src/components/implementation/simple_vmm/nf_multicore/devices/vpci/vpci_io.c create mode 100644 src/components/implementation/simple_vmm/nf_multicore/devices/vpic/vpic.c create mode 100644 src/components/implementation/simple_vmm/nf_multicore/devices/vpic/vpic.h create mode 100644 src/components/implementation/simple_vmm/nf_multicore/devices/vps2/vps2.c create mode 100644 src/components/implementation/simple_vmm/nf_multicore/devices/vps2/vps2.h create mode 100644 src/components/implementation/simple_vmm/nf_multicore/devices/vrtc/vrtc.c create mode 100644 src/components/implementation/simple_vmm/nf_multicore/devices/vrtc/vrtc.h create mode 100644 src/components/implementation/simple_vmm/nf_multicore/fast_memcpy.h create mode 100644 src/components/implementation/simple_vmm/nf_multicore/guest/.gitignore create mode 100644 src/components/implementation/simple_vmm/nf_multicore/guest/Makefile create mode 100644 src/components/implementation/simple_vmm/nf_multicore/guest/guest.ld create mode 100644 src/components/implementation/simple_vmm/nf_multicore/guest/guest_realmode.S create mode 100644 src/components/implementation/simple_vmm/nf_multicore/instr_emul.c create mode 100644 src/components/implementation/simple_vmm/nf_multicore/instr_emul.h create mode 100644 src/components/implementation/simple_vmm/nf_multicore/ioapic.h create mode 100644 src/components/implementation/simple_vmm/nf_multicore/irq.h create mode 100644 src/components/implementation/simple_vmm/nf_multicore/netio.c create mode 100644 src/components/implementation/simple_vmm/nf_multicore/nf_session.c create mode 100644 src/components/implementation/simple_vmm/nf_multicore/nf_session.h create mode 100644 src/components/implementation/simple_vmm/nf_multicore/simple_vmm.c create mode 100644 src/components/implementation/simple_vmm/nf_multicore/vcpuid.c create mode 100644 src/components/implementation/simple_vmm/nf_multicore/vcpuid.h create mode 100644 src/components/implementation/simple_vmm/nf_multicore/vio.c create mode 100644 src/components/implementation/simple_vmm/nf_multicore/vioapic.c create mode 100644 src/components/implementation/simple_vmm/nf_multicore/vioapic.h create mode 100644 src/components/implementation/simple_vmm/nf_multicore/vlapic.c create mode 100644 src/components/implementation/simple_vmm/nf_multicore/vlapic.h create mode 100644 src/components/implementation/simple_vmm/nf_multicore/vlapic_priv.h create mode 100644 src/components/implementation/simple_vmm/nf_multicore/vmmio.c create mode 100644 src/components/implementation/simple_vmm/nf_multicore/vmsr.c create mode 100644 src/components/implementation/simple_vmm/nf_multicore/vpic.h create mode 100644 src/components/implementation/simple_vmm/noop_nf/Makefile create mode 100644 src/components/implementation/simple_vmm/noop_nf/acrn_common.h create mode 100644 src/components/implementation/simple_vmm/noop_nf/acrn_types.h create mode 100644 src/components/implementation/simple_vmm/noop_nf/apicreg.h create mode 100644 src/components/implementation/simple_vmm/noop_nf/atomic.h create mode 100644 src/components/implementation/simple_vmm/noop_nf/bits.h create mode 100755 src/components/implementation/simple_vmm/noop_nf/cpu.h create mode 100644 src/components/implementation/simple_vmm/noop_nf/cpu_caps.h create mode 100644 src/components/implementation/simple_vmm/noop_nf/cpuid.h create mode 100644 src/components/implementation/simple_vmm/noop_nf/devices/serial/serial.c create mode 100644 src/components/implementation/simple_vmm/noop_nf/devices/serial/serial.h create mode 100644 src/components/implementation/simple_vmm/noop_nf/devices/vpci/virtio_net_io.c create mode 100644 src/components/implementation/simple_vmm/noop_nf/devices/vpci/virtio_net_io.h create mode 100644 src/components/implementation/simple_vmm/noop_nf/devices/vpci/virtio_net_vpci.c create mode 100644 src/components/implementation/simple_vmm/noop_nf/devices/vpci/virtio_ring.h create mode 100644 src/components/implementation/simple_vmm/noop_nf/devices/vpci/vpci.c create mode 100644 src/components/implementation/simple_vmm/noop_nf/devices/vpci/vpci.h create mode 100644 src/components/implementation/simple_vmm/noop_nf/devices/vpci/vpci_io.c create mode 100644 src/components/implementation/simple_vmm/noop_nf/devices/vpic/vpic.c create mode 100644 src/components/implementation/simple_vmm/noop_nf/devices/vpic/vpic.h create mode 100644 src/components/implementation/simple_vmm/noop_nf/devices/vps2/vps2.c create mode 100644 src/components/implementation/simple_vmm/noop_nf/devices/vps2/vps2.h create mode 100644 src/components/implementation/simple_vmm/noop_nf/devices/vrtc/vrtc.c create mode 100644 src/components/implementation/simple_vmm/noop_nf/devices/vrtc/vrtc.h create mode 100644 src/components/implementation/simple_vmm/noop_nf/fast_memcpy.h create mode 100644 src/components/implementation/simple_vmm/noop_nf/guest/.gitignore create mode 100644 src/components/implementation/simple_vmm/noop_nf/guest/Makefile create mode 100644 src/components/implementation/simple_vmm/noop_nf/guest/guest.ld create mode 100644 src/components/implementation/simple_vmm/noop_nf/guest/guest_realmode.S create mode 100644 src/components/implementation/simple_vmm/noop_nf/instr_emul.c create mode 100644 src/components/implementation/simple_vmm/noop_nf/instr_emul.h create mode 100644 src/components/implementation/simple_vmm/noop_nf/ioapic.h create mode 100644 src/components/implementation/simple_vmm/noop_nf/irq.h create mode 100644 src/components/implementation/simple_vmm/noop_nf/netio.c create mode 100644 src/components/implementation/simple_vmm/noop_nf/nf_session.c create mode 100644 src/components/implementation/simple_vmm/noop_nf/nf_session.h create mode 100644 src/components/implementation/simple_vmm/noop_nf/simple_vmm.c create mode 100644 src/components/implementation/simple_vmm/noop_nf/vcpuid.c create mode 100644 src/components/implementation/simple_vmm/noop_nf/vcpuid.h create mode 100644 src/components/implementation/simple_vmm/noop_nf/vio.c create mode 100644 src/components/implementation/simple_vmm/noop_nf/vioapic.c create mode 100644 src/components/implementation/simple_vmm/noop_nf/vioapic.h create mode 100644 src/components/implementation/simple_vmm/noop_nf/vlapic.c create mode 100644 src/components/implementation/simple_vmm/noop_nf/vlapic.h create mode 100644 src/components/implementation/simple_vmm/noop_nf/vlapic_priv.h create mode 100644 src/components/implementation/simple_vmm/noop_nf/vmmio.c create mode 100644 src/components/implementation/simple_vmm/noop_nf/vmsr.c create mode 100644 src/components/implementation/simple_vmm/noop_nf/vpic.h diff --git a/composition_scripts/vmm_no_nf.toml b/composition_scripts/vmm_no_nf.toml index 5554aaa005..aced17932e 100644 --- a/composition_scripts/vmm_no_nf.toml +++ b/composition_scripts/vmm_no_nf.toml @@ -1,5 +1,5 @@ [system] -description = "Simple VMM test without NF" +description = "Simple VMM" [[components]] name = "booter" diff --git a/composition_scripts/vmm_no_nf_multi_core.toml b/composition_scripts/vmm_no_nf_multi_core.toml new file mode 100644 index 0000000000..a22ea3b2a8 --- /dev/null +++ b/composition_scripts/vmm_no_nf_multi_core.toml @@ -0,0 +1,41 @@ +[system] +description = "Simple VMM" + +[[components]] +name = "booter" +img = "no_interface.llbooter" +implements = [{interface = "init"}, {interface = "addr"}] +deps = [{srv = "kernel", interface = "init", variant = "kernel"}] +constructor = "kernel" + +[[components]] +name = "capmgr" +img = "capmgr.simple" +deps = [{srv = "booter", interface = "init"}, {srv = "booter", interface = "addr"}] +implements = [{interface = "capmgr"}, {interface = "init"}, {interface = "memmgr"}, {interface = "capmgr_create"}, {interface = "contigmem"}] +constructor = "booter" +baseaddr = "0x1000000" + +[[components]] +name = "sched" +img = "sched.pfprr_quantum_static" +deps = [{srv = "capmgr", interface = "init"}, {srv = "capmgr", interface = "capmgr"}, {srv = "capmgr", interface = "memmgr"}] +implements = [{interface = "sched"}, {interface = "syncipc"}, {interface = "init"}] +constructor = "booter" +baseaddr = "0x1600000" + +[[components]] +name = "nicmgr" +img = "nicmgr.dpdk" +deps = [{srv = "sched", interface = "sched"}, {srv = "sched", interface = "init"}, {srv = "capmgr", interface = "capmgr_create"}, {srv = "capmgr", interface = "memmgr"}, {srv = "capmgr", interface = "contigmem"}] +implements = [{interface = "nic"}] +constructor = "booter" +baseaddr = "0x6000000" + +[[components]] +name = "vmm" +img = "simple_vmm.nf_multicore" +deps = [{srv = "sched", interface = "sched"}, {srv = "sched", interface = "init"},{srv = "capmgr", interface = "capmgr"}, {srv = "capmgr", interface = "memmgr"}, {srv = "capmgr", interface = "contigmem"}, {srv = "nicmgr", interface = "nic"}] +implements = [{interface = "netio"}] +constructor = "booter" +baseaddr = "0x2000000" diff --git a/composition_scripts/vmm_noop_nf.toml b/composition_scripts/vmm_noop_nf.toml index 17b2a8dd0e..9c7da04f94 100644 --- a/composition_scripts/vmm_noop_nf.toml +++ b/composition_scripts/vmm_noop_nf.toml @@ -1,5 +1,5 @@ [system] -description = "Simple VMM component." +description = "Simple VMM" [[components]] name = "booter" @@ -34,7 +34,7 @@ baseaddr = "0x6000000" [[components]] name = "vmm" -img = "simple_vmm.vmm" +img = "simple_vmm.noop_nf" deps = [{srv = "sched", interface = "sched"}, {srv = "sched", interface = "init"},{srv = "capmgr", interface = "capmgr"}, {srv = "capmgr", interface = "memmgr"}, {srv = "capmgr", interface = "contigmem"}, {srv = "nicmgr", interface = "nic"}] implements = [{interface = "netio"}] constructor = "booter" diff --git a/src/components/implementation/capmgr/simple/capmgr.c b/src/components/implementation/capmgr/simple/capmgr.c index c952089d62..3f64a422e3 100644 --- a/src/components/implementation/capmgr/simple/capmgr.c +++ b/src/components/implementation/capmgr/simple/capmgr.c @@ -512,6 +512,8 @@ memmgr_shared_page_map_aligned_in_vm(cbuf_t id, unsigned long align, vaddr_t *pg return s->n_pages; } +struct ps_lock map_lock = {.o = 0}; + unsigned long memmgr_shared_page_map_aligned(cbuf_t id, unsigned long align, vaddr_t *pgaddr) { @@ -520,6 +522,7 @@ memmgr_shared_page_map_aligned(cbuf_t id, unsigned long align, vaddr_t *pgaddr) struct mm_page *p; unsigned int i; vaddr_t addr; + ps_lock_take(&map_lock); *pgaddr = 0; s = ss_span_get(id); @@ -537,6 +540,7 @@ memmgr_shared_page_map_aligned(cbuf_t id, unsigned long align, vaddr_t *pgaddr) if (*pgaddr == 0) *pgaddr = addr; align = PAGE_SIZE; // only the first page can have special alignment } + ps_lock_release(&map_lock); return s->n_pages; } diff --git a/src/components/implementation/nicmgr/dpdk/nicmgr.c b/src/components/implementation/nicmgr/dpdk/nicmgr.c index 61c4ca6235..5b843b9022 100644 --- a/src/components/implementation/nicmgr/dpdk/nicmgr.c +++ b/src/components/implementation/nicmgr/dpdk/nicmgr.c @@ -138,13 +138,6 @@ nic_get_a_packet_batch(u8_t batch_limit) session = &client_sessions[thd]; - obj = first_obj = shm_bm_alloc_net_pkt_buf(session->shemem_info.shm, &objid); - assert(obj); - first_objid = objid; - first_obj_pri = netshmem_get_pri(obj); - pkt_arr = (struct netshmem_meta_tuple *)&first_obj_pri->pkt_arr; - first_obj_pri->batch_len = 0; - // sync_sem_take(&session->sem); // assert(!pkt_ring_buf_empty(&session->pkt_ring_buf)); @@ -152,6 +145,13 @@ nic_get_a_packet_batch(u8_t batch_limit) sched_thd_yield(); } + obj = first_obj = shm_bm_alloc_net_pkt_buf(session->shemem_info.shm, &objid); + assert(obj); + first_objid = objid; + first_obj_pri = netshmem_get_pri(obj); + pkt_arr = (struct netshmem_meta_tuple *)&first_obj_pri->pkt_arr; + first_obj_pri->batch_len = 0; + while (batch_ct < batch_limit && pkt_ring_buf_dequeue(&session->pkt_ring_buf, &buf)) { assert(buf.pkt); if (likely(batch_ct > 0)) { @@ -340,9 +340,9 @@ nic_send_packet_batch(shm_bm_objid_t pktid) tx_packets[i] = mbuf; } - // sync_lock_take(&tx_lock[core_id - 1]); + sync_lock_take(&tx_lock[core_id - 1]); cos_dev_port_tx_burst(0, core_id - 1, tx_packets, batch_tc); - // sync_lock_release(&tx_lock[core_id - 1]); + sync_lock_release(&tx_lock[core_id - 1]); return 0; } diff --git a/src/components/implementation/simple_nf/noop_nf/main.c b/src/components/implementation/simple_nf/noop_nf/main.c index bedfc8f8fb..786bd58095 100644 --- a/src/components/implementation/simple_nf/noop_nf/main.c +++ b/src/components/implementation/simple_nf/noop_nf/main.c @@ -21,111 +21,6 @@ char rx_nf_buffer[4096]; #define RX_PROCESSING 0 #define TX_PROCESSING 0 -#if 0 -static void -tx_task(void) -{ - u16_t pkt_len; - shm_bm_objid_t objid; - - netio_shmem_map(netshmem_get_shm_id()); - nic_shmem_map(netshmem_get_shm_id()); - - shm_bm_objid_t first_objid; - struct netshmem_pkt_buf *first_obj; - struct netshmem_pkt_pri *first_obj_pri; - struct netshmem_meta_tuple *pkt_arr; - u8_t tx_batch_ct = 0; - struct netshmem_pkt_buf *tx_obj; - - nic_bind_port(0, 1); - - shm_bm_t tx_shmemd = 0; - tx_shmemd = netshmem_get_shm(); - - while(1) { -#if !TX_BATCH - objid = netio_get_a_packet(&pkt_len); - nic_send_packet(objid, 0, pkt_len); - -#else - u8_t batch_ct = 50; - - first_objid = objid = netio_get_a_packet_batch(batch_ct); - first_obj = shm_bm_transfer_net_pkt_buf(tx_shmemd, objid); - first_obj_pri = netshmem_get_pri(first_obj); - pkt_arr = (struct netshmem_meta_tuple *)&(first_obj_pri->pkt_arr); - tx_batch_ct = first_obj_pri->batch_len; -#if TX_PROCESSING - for (u8_t i = 0; i < tx_batch_ct; i++) { - pkt_len = pkt_arr[i].pkt_len; - objid = pkt_arr[i].obj_id; - tx_obj = shm_bm_transfer_net_pkt_buf(tx_shmemd, objid); - memcpy(tx_nf_buffer, netshmem_get_data_buf(tx_obj), pkt_len); - } -#endif - nic_send_packet_batch(first_objid); -#endif - } -} - -#endif - -#if 0 - -static void -rx_task(void) -{ - /* TODO: port NF applications here */ - shm_bm_objid_t objid; - struct netshmem_pkt_buf *rx_obj; - shm_bm_objid_t first_objid; - struct netshmem_pkt_buf *first_obj; - struct netshmem_pkt_pri *first_obj_pri; - struct netshmem_meta_tuple *pkt_arr; - u16_t pkt_len; - - u8_t batch_ct = 50; - - netio_shmem_map(netshmem_get_shm_id()); - nic_shmem_map(netshmem_get_shm_id()); - nic_bind_port(0, 0); - - int i = 0; - u64_t times = 0; - u64_t overhead = 0; - - shm_bm_t rx_shmemd = 0; - - rx_shmemd = netshmem_get_shm(); - while(1) - { - u8_t rx_batch_ct = 0; -#if !RX_BATCH - objid = nic_get_a_packet(&pkt_len); - netio_send_packet(objid, pkt_len); -#else - first_objid = nic_get_a_packet_batch(batch_ct); - - first_obj = shm_bm_transfer_net_pkt_buf(rx_shmemd, first_objid); - first_obj_pri = netshmem_get_pri(first_obj); - pkt_arr = (struct netshmem_meta_tuple *)&(first_obj_pri->pkt_arr); - rx_batch_ct = first_obj_pri->batch_len; -#if RX_PROCESSING - for (u8_t i = 0; i < rx_batch_ct; i++) { - pkt_len = pkt_arr[i].pkt_len; - objid = pkt_arr[i].obj_id; - rx_obj = shm_bm_transfer_net_pkt_buf(rx_shmemd, objid); - memcpy(rx_nf_buffer, netshmem_get_data_buf(rx_obj), pkt_len); - } -#endif - - netio_send_packet_batch(first_objid); -#endif - } -} -#endif - static void rx_task(void) { @@ -144,7 +39,7 @@ rx_task(void) nic_shmem_map(netshmem_get_shm_id()); ip = inet_addr("10.10.1.2"); - nic_bind_port(ip, 70); + nic_bind_port(ip, 0); int i = 0; u64_t times = 0; @@ -206,7 +101,7 @@ tx_task(void) ip = inet_addr("10.10.1.2"); nic_bind_port(ip, 71); - int svc_id = 70; + int svc_id = 0; netio_svc_update(svc_id, 0); diff --git a/src/components/implementation/simple_vmm/nf_multicore/Makefile b/src/components/implementation/simple_vmm/nf_multicore/Makefile new file mode 100644 index 0000000000..96d9511070 --- /dev/null +++ b/src/components/implementation/simple_vmm/nf_multicore/Makefile @@ -0,0 +1,29 @@ +# Required variables used to drive the compilation process. It is OK +# for many of these to be empty. +# +# The set of interfaces that this component exports for use by other +# components. This is a list of the interface names. +INTERFACE_EXPORTS = netio +# The interfaces this component is dependent on for compilation (this +# is a list of directory names in interface/) +INTERFACE_DEPENDENCIES = contigmem netshmem nic sched nic +# The library dependencies this component is reliant on for +# compilation/linking (this is a list of directory names in lib/) +LIBRARY_DEPENDENCIES = ubench component kernel initargs vmrt shm_bm sync time ck +# Note: Both the interface and library dependencies should be +# *minimal*. That is to say that removing a dependency should cause +# the build to fail. The build system does not validate this +# minimality; that's on you! + +CFILES+=devices/serial/serial.c +CFILES+=devices/vpci/vpci.c +CFILES+=devices/vpci/vpci_io.c +CFILES+=devices/vpci/virtio_net_vpci.c +CFILES+=devices/vpci/virtio_net_io.c +CFILES+=devices/vpic/vpic.c +CFILES+=devices/vrtc/vrtc.c +CFILES+=devices/vps2/vps2.c + +C_OBJS+=$(CFILES:%.c=%.o) +COMP_FLAGS= -mavx -mavx2 -mfma -I$(LIBDIR)/dpdk/dpdk/build/install/include +include Makefile.subsubdir diff --git a/src/components/implementation/simple_vmm/nf_multicore/acrn_common.h b/src/components/implementation/simple_vmm/nf_multicore/acrn_common.h new file mode 100644 index 0000000000..b97561f61b --- /dev/null +++ b/src/components/implementation/simple_vmm/nf_multicore/acrn_common.h @@ -0,0 +1,797 @@ +/* + * common definition + * + * Copyright (C) 2017-2022 Intel Corporation. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +/** + * @file acrn_common.h + * + * @brief acrn common data structure for hypercall or ioctl + */ + +#ifndef ACRN_COMMON_H +#define ACRN_COMMON_H + +#include + +/* + * Common structures for ACRN/HSM/DM + */ + +/* + * IO request + */ + +#define ACRN_IO_REQUEST_MAX 16U +#define ACRN_ASYNCIO_MAX 64U + +#define ACRN_IOREQ_STATE_PENDING 0U +#define ACRN_IOREQ_STATE_COMPLETE 1U +#define ACRN_IOREQ_STATE_PROCESSING 2U +#define ACRN_IOREQ_STATE_FREE 3U + +#define ACRN_IOREQ_TYPE_PORTIO 0U +#define ACRN_IOREQ_TYPE_MMIO 1U +#define ACRN_IOREQ_TYPE_PCICFG 2U +#define ACRN_IOREQ_TYPE_WP 3U + +#define ACRN_IOREQ_DIR_READ 0U +#define ACRN_IOREQ_DIR_WRITE 1U + + + +/* IOAPIC device model info */ +#define VIOAPIC_RTE_NUM 48U /* vioapic pins */ + +#if VIOAPIC_RTE_NUM < 24U +#error "VIOAPIC_RTE_NUM must be larger than 23" +#endif + +/* Generic VM flags from guest OS */ +#define GUEST_FLAG_SECURE_WORLD_ENABLED (1UL << 0U) /* Whether secure world is enabled */ +#define GUEST_FLAG_LAPIC_PASSTHROUGH (1UL << 1U) /* Whether LAPIC is passed through */ +#define GUEST_FLAG_IO_COMPLETION_POLLING (1UL << 2U) /* Whether need hypervisor poll IO completion */ +#define GUEST_FLAG_HIDE_MTRR (1UL << 3U) /* Whether hide MTRR from VM */ +#define GUEST_FLAG_RT (1UL << 4U) /* Whether the vm is RT-VM */ +#define GUEST_FLAG_NVMX_ENABLED (1UL << 5U) /* Whether this VM supports nested virtualization */ +#define GUEST_FLAG_SECURITY_VM (1UL << 6U) /* Whether this VM needs to do security-vm related fixup (TPM2 and SMBIOS pt) */ +#define GUEST_FLAG_VCAT_ENABLED (1UL << 7U) /* Whether this VM supports vCAT */ +#define GUEST_FLAG_STATIC_VM (1UL << 8U) /* Whether this VM uses static VM configuration */ +#define GUEST_FLAG_TEE (1UL << 9U) /* Whether the VM is TEE VM */ +#define GUEST_FLAG_REE (1UL << 10U) /* Whether the VM is REE VM */ +#define GUEST_FLAG_PMU_PASSTHROUGH (1UL << 11U) /* Whether PMU is passed through */ + + +/* TODO: We may need to get this addr from guest ACPI instead of hardcode here */ +#define VIRTUAL_SLEEP_CTL_ADDR 0x400U /* Pre-launched VM uses ACPI reduced HW mode and sleep control register */ +#define VIRTUAL_PM1A_CNT_ADDR 0x404U +#define VIRTUAL_PM1A_SCI_EN 0x0001 +#define VIRTUAL_PM1A_SLP_TYP 0x1c00U +#define VIRTUAL_PM1A_SLP_EN 0x2000U +#define VIRTUAL_PM1A_ALWAYS_ZERO 0xc003 + +#define MAX_VM_NAME_LEN (16U) + +/** + * @brief Hypercall + * + * @addtogroup acrn_hypercall ACRN Hypercall + * @{ + */ + +/** + * @brief Representation of a MMIO request + */ +struct acrn_mmio_request { + /** + * @brief Direction of the access + * + * Either \p ACRN_IOREQ_DIR_READ or \p ACRN_IOREQ_DIR_WRITE. + */ + uint32_t direction; + + /** + * @brief reserved + */ + uint32_t reserved; + + /** + * @brief Address of the I/O access + */ + uint64_t address; + + /** + * @brief Width of the I/O access in byte + */ + uint64_t size; + + /** + * @brief The value read for I/O reads or to be written for I/O writes + */ + uint64_t value; +}; + +/** + * @brief Representation of a port I/O request + */ +struct acrn_pio_request { + /** + * @brief Direction of the access + * + * Either \p ACRN_IOREQ_DIR_READ or \p ACRN_IOREQ_DIR_WRITE. + */ + uint32_t direction; + + /** + * @brief reserved + */ + uint32_t reserved; + + /** + * @brief Port address of the I/O access + */ + uint64_t address; + + /** + * @brief Width of the I/O access in byte + */ + uint64_t size; + + /** + * @brief The value read for I/O reads or to be written for I/O writes + */ + uint32_t value; +}; + +/** + * @brief Representation of a PCI configuration space access + */ +struct acrn_pci_request { + /** + * @brief Direction of the access + * + * Either \p ACRN_IOREQ_DIR_READ or \p ACRN_IOREQ_DIR_WRITE. + */ + uint32_t direction; + + /** + * @brief Reserved + */ + uint32_t reserved[3];/* need keep same header fields with pio_request */ + + /** + * @brief Width of the I/O access in byte + */ + int64_t size; + + /** + * @brief The value read for I/O reads or to be written for I/O writes + */ + int32_t value; + + /** + * @brief The \p bus part of the BDF of the device + */ + int32_t bus; + + /** + * @brief The \p device part of the BDF of the device + */ + int32_t dev; + + /** + * @brief The \p function part of the BDF of the device + */ + int32_t func; + + /** + * @brief The register to be accessed in the configuration space + */ + int32_t reg; +}; + +/** + * @brief 256-byte I/O requests + * + * The state transitions of a I/O request are: + * + * FREE -> PENDING -> PROCESSING -> COMPLETE -> FREE -> ... + * + * When a request is in COMPLETE or FREE state, the request is owned by the + * hypervisor. Service VM (HSM or DM) shall not read or write the internals of the + * request except the state. + * + * When a request is in PENDING or PROCESSING state, the request is owned by + * Service VM. The hypervisor shall not read or write the request other than the state. + * + * Based on the rules above, a typical I/O request lifecycle should looks like + * the following. + * + * @verbatim embed:rst:leading-asterisk + * + * +-----------------------+-------------------------+----------------------+ + * | Service VM vCPU 0 | Service VM vCPU x | User VM vCPU y | + * +=======================+=========================+======================+ + * | | | Hypervisor: | + * | | | | + * | | | - Fill in type, | + * | | | addr, etc. | + * | | | - Pause User VM vCPU | + * | | | - Set state to | + * | | | PENDING (a) | + * | | | - Fire upcall to | + * | | | Service VM vCPU 0 | + * | | | | + * +-----------------------+-------------------------+----------------------+ + * | HSM: | | | + * | | | | + * | - Scan for pending | | | + * | requests | | | + * | - Set state to | | | + * | PROCESSING (b) | | | + * | - Assign requests to | | | + * | clients (c) | | | + * | | | | + * +-----------------------+-------------------------+----------------------+ + * | | Client: | | + * | | | | + * | | - Scan for assigned | | + * | | requests | | + * | | - Handle the | | + * | | requests (d) | | + * | | - Set state to COMPLETE | | + * | | - Notify the hypervisor | | + * | | | | + * +-----------------------+-------------------------+----------------------+ + * | | Hypervisor: | | + * | | | | + * | | - resume User VM vCPU y | | + * | | (e) | | + * | | | | + * +-----------------------+-------------------------+----------------------+ + * | | | Hypervisor: | + * | | | | + * | | | - Post-work (f) | + * | | | - set state to FREE | + * | | | | + * +-----------------------+-------------------------+----------------------+ + * + * @endverbatim + * + * Note that the following shall hold. + * + * 1. (a) happens before (b) + * 2. (c) happens before (d) + * 3. (e) happens before (f) + * 4. One vCPU cannot trigger another I/O request before the previous one has + * completed (i.e. the state switched to FREE) + * + * Accesses to the state of a acrn_io_request shall be atomic and proper barriers + * are needed to ensure that: + * + * 1. Setting state to PENDING is the last operation when issuing a request in + * the hypervisor, as the hypervisor shall not access the request any more. + * + * 2. Due to similar reasons, setting state to COMPLETE is the last operation + * of request handling in HSM or clients in Service VM. + */ +struct acrn_io_request { + /** + * @brief Type of this request. + * + * Byte offset: 0. + */ + uint32_t type; + + /** + * @brief Hypervisor will poll completion if set. + * + * Byte offset: 4. + */ + uint32_t completion_polling; + + /** + * @brief Reserved. + * + * Byte offset: 8. + */ + uint32_t reserved0[14]; + + /** + * @brief Details about this request. + * + * Byte offset: 64. + */ + union { + struct acrn_pio_request pio_request; + struct acrn_pci_request pci_request; + struct acrn_mmio_request mmio_request; + uint64_t data[8]; + } reqs; + + /** + * @brief Reserved. + * + * Byte offset: 128. + */ + uint32_t reserved1; + + /** + * @brief If this request has been handled by HSM driver. + * + * Byte offset: 132. + */ + int32_t kernel_handled; + + /** + * @brief The status of this request. + * + * Taking ACRN_IOREQ_STATE_xxx as values. + * + * Byte offset: 136. + */ + uint32_t processed; +}__attribute__((aligned(256))); + +struct acrn_io_request_buffer { + union { + struct acrn_io_request req_slot[ACRN_IO_REQUEST_MAX]; + int8_t reserved[4096]; + }; +}; + +struct acrn_asyncio_info { + uint32_t type; + uint64_t addr; + uint64_t fd; +}; + +/** + * @brief Info to create a VM, the parameter for HC_CREATE_VM hypercall + */ +struct acrn_vm_creation { + /** created vmid return to HSM. Keep it first field */ + uint16_t vmid; + + /** Reserved */ + uint16_t reserved0; + + /** VCPU numbers this VM want to create */ + uint16_t vcpu_num; + + /** Reserved */ + uint16_t reserved1; + + /** the name of this VM */ + uint8_t name[MAX_VM_NAME_LEN]; + + /* VM flag bits from Guest OS, now used + * GUEST_FLAG_SECURE_WORLD_ENABLED (1UL<<0) + */ + uint64_t vm_flag; + + uint64_t ioreq_buf; + + /** + * The least significant set bit is the PCPU # the VCPU 0 maps to; + * second set least significant bit is the PCPU # the VCPU 1 maps to; + * and so on... + */ + uint64_t cpu_affinity; +}; + +/* General-purpose register layout aligned with the general-purpose register idx + * when vmexit, such as vmexit due to CR access, refer to SMD Vol.3C 27-6. + */ +struct acrn_gp_regs { + uint64_t rax; + uint64_t rcx; + uint64_t rdx; + uint64_t rbx; + uint64_t rsp; + uint64_t rbp; + uint64_t rsi; + uint64_t rdi; + uint64_t r8; + uint64_t r9; + uint64_t r10; + uint64_t r11; + uint64_t r12; + uint64_t r13; + uint64_t r14; + uint64_t r15; +}; + +/* struct to define how the descriptor stored in memory. + * Refer SDM Vol3 3.5.1 "Segment Descriptor Tables" + * Figure 3-11 + */ +struct acrn_descriptor_ptr { + uint16_t limit; + uint64_t base; + uint16_t reserved[3]; /* align struct size to 64bit */ +} __packed; + +/** + * @brief registers info for vcpu. + */ +struct acrn_regs { + struct acrn_gp_regs gprs; + struct acrn_descriptor_ptr gdt; + struct acrn_descriptor_ptr idt; + + uint64_t rip; + uint64_t cs_base; + uint64_t cr0; + uint64_t cr4; + uint64_t cr3; + uint64_t ia32_efer; + uint64_t rflags; + uint64_t reserved_64[4]; + + uint32_t cs_ar; + uint32_t cs_limit; + uint32_t reserved_32[3]; + + /* don't change the order of following sel */ + uint16_t cs_sel; + uint16_t ss_sel; + uint16_t ds_sel; + uint16_t es_sel; + uint16_t fs_sel; + uint16_t gs_sel; + uint16_t ldt_sel; + uint16_t tr_sel; +}; + +/** + * @brief Info to set vcpu state + * + * the parameter for HC_SET_VCPU_STATE + */ +struct acrn_vcpu_regs { + /** the virtual CPU ID for the VCPU to set state */ + uint16_t vcpu_id; + + /** reserved space to make cpu_state aligned to 8 bytes */ + uint16_t reserved[3]; + + /** the structure to hold vcpu state */ + struct acrn_regs vcpu_regs; +}; + +/** Operation types for setting IRQ line */ +#define GSI_SET_HIGH 0U +#define GSI_SET_LOW 1U +#define GSI_RAISING_PULSE 2U +#define GSI_FALLING_PULSE 3U + +/** + * @brief Info to Set/Clear/Pulse a virtual IRQ line for a VM + * + * the parameter for HC_SET_IRQLINE hypercall + */ +struct acrn_irqline_ops { + uint32_t gsi; + uint32_t op; +}; + + +/** + * @brief Info to inject a MSI interrupt to VM + * + * the parameter for HC_INJECT_MSI hypercall + */ +struct acrn_msi_entry { + /** MSI addr[19:12] with dest VCPU ID */ + uint64_t msi_addr; + + /** MSI data[7:0] with vector */ + uint64_t msi_data; +}; + +/** + * @brief Info The power state data of a VCPU. + * + */ + +#define SPACE_SYSTEM_MEMORY 0U +#define SPACE_SYSTEM_IO 1U +#define SPACE_PCI_CONFIG 2U +#define SPACE_Embedded_Control 3U +#define SPACE_SMBUS 4U +#define SPACE_PLATFORM_COMM 10U +#define SPACE_FFixedHW 0x7FU + +struct acrn_acpi_generic_address { + uint8_t space_id; + uint8_t bit_width; + uint8_t bit_offset; + uint8_t access_size; + uint64_t address; +} __attribute__ ((__packed__)); + +struct acrn_cstate_data { + struct acrn_acpi_generic_address cx_reg; + uint8_t type; + uint32_t latency; + uint64_t power; +}; + +struct acrn_pstate_data { + uint64_t core_frequency; /* megahertz */ + uint64_t power; /* milliWatts */ + uint64_t transition_latency; /* microseconds */ + uint64_t bus_master_latency; /* microseconds */ + uint64_t control; /* control value */ + uint64_t status; /* success indicator */ +}; + +enum acrn_cpufreq_policy_type { + CPUFREQ_POLICY_PERFORMANCE, + CPUFREQ_POLICY_NOMINAL, +}; + +struct acrn_cpufreq_limits { + /* Performance levels for HWP */ + uint8_t guaranteed_hwp_lvl; + uint8_t highest_hwp_lvl; + uint8_t lowest_hwp_lvl; + /* Index for the p-state table _PSS */ + uint8_t nominal_pstate; + uint8_t performance_pstate; +}; + +struct acpi_sx_pkg { + uint8_t val_pm1a; + uint8_t val_pm1b; + uint16_t reserved; +} __attribute__((aligned(8))); + +struct pm_s_state_data { + struct acrn_acpi_generic_address pm1a_evt; + struct acrn_acpi_generic_address pm1b_evt; + struct acrn_acpi_generic_address pm1a_cnt; + struct acrn_acpi_generic_address pm1b_cnt; + struct acpi_sx_pkg s3_pkg; + struct acpi_sx_pkg s5_pkg; + uint32_t *wake_vector_32; + uint64_t *wake_vector_64; +} __attribute__((aligned(8))); + +/** + * @brief Info PM command from DM/HSM. + * + * The command would specify request type(e.g. get px count or data) for + * specific VM and specific VCPU with specific state number. + * For Px, PMCMD_STATE_NUM means Px number from 0 to (MAX_PSTATE - 1), + * For Cx, PMCMD_STATE_NUM means Cx entry index from 1 to MAX_CX_ENTRY. + */ +#define PMCMD_VMID_MASK 0xff000000U +#define PMCMD_VCPUID_MASK 0x00ff0000U +#define PMCMD_STATE_NUM_MASK 0x0000ff00U +#define PMCMD_TYPE_MASK 0x000000ffU + +#define PMCMD_VMID_SHIFT 24U +#define PMCMD_VCPUID_SHIFT 16U +#define PMCMD_STATE_NUM_SHIFT 8U + +enum acrn_pm_cmd_type { + ACRN_PMCMD_GET_PX_CNT, + ACRN_PMCMD_GET_PX_DATA, + ACRN_PMCMD_GET_CX_CNT, + ACRN_PMCMD_GET_CX_DATA, +}; + +/** + * @brief Info to get a VM interrupt count data + * + * the parameter for HC_VM_INTR_MONITOR hypercall + */ +#define MAX_PTDEV_NUM 24U +struct acrn_intr_monitor { + /** sub command for intr monitor */ + uint32_t cmd; + /** the count of this buffer to save */ + uint32_t buf_cnt; + + /** the buffer which save each interrupt count */ + uint64_t buffer[MAX_PTDEV_NUM * 2]; +} __attribute__((aligned(8))); + +/** cmd for intr monitor **/ +#define INTR_CMD_GET_DATA 0U +#define INTR_CMD_DELAY_INT 1U + +/* + * PRE_LAUNCHED_VM is launched by ACRN hypervisor, with LAPIC_PT; + * Service VM is launched by ACRN hypervisor, without LAPIC_PT; + * POST_LAUNCHED_VM is launched by ACRN devicemodel, with/without LAPIC_PT depends on usecases. + * + * Assumption: vm_configs array is completely initialized w.r.t. load_order member of + * acrn_vm_config for all the VMs. + */ +enum acrn_vm_load_order { + PRE_LAUNCHED_VM = 0, + SERVICE_VM, + POST_LAUNCHED_VM, /* Launched by Devicemodel in Service VM */ + MAX_LOAD_ORDER +}; + +struct acrn_vm_config_header { + enum acrn_vm_load_order load_order; + char name[MAX_VM_NAME_LEN]; + uint8_t reserved[2]; + uint8_t severity; + uint64_t cpu_affinity; + uint64_t guest_flags; + /* + * The following are hv-specific members and are thus opaque. + * vm_config_entry_size determines the real size of this structure. + */ +} __attribute__((aligned(8))); + +/** + * @brief Info to configure virtual root port + * + * Configuration passed to hv when adding a virtual root port which + * is used as PTM root + */ +struct vrp_config +{ + uint16_t phy_bdf; + uint8_t max_payload; /* dev cap's max payload */ + uint8_t primary_bus; + uint8_t secondary_bus; + uint8_t subordinate_bus; + uint8_t ptm_capable; + uint32_t ptm_cap_offset; +}; + +/* Type of PCI device assignment */ +#define ACRN_PTDEV_QUIRK_ASSIGN (1U << 0) + +#define ACRN_PCI_NUM_BARS 6U +/** + * @brief Info to assign or deassign PCI for a VM + * + */ +struct acrn_pcidev { + /** the type of the the pass-through PCI device */ + uint32_t type; + + /** virtual BDF# of the pass-through PCI device */ + uint16_t virt_bdf; + + /** physical BDF# of the pass-through PCI device */ + uint16_t phys_bdf; + + /** the PCI Interrupt Line, initialized by ACRN-DM, which is RO and + * ideally not used for pass-through MSI/MSI-x devices. + */ + uint8_t intr_line; + + /** the PCI Interrupt Pin, initialized by ACRN-DM, which is RO and + * ideally not used for pass-through MSI/MSI-x devices. + */ + uint8_t intr_pin; + + /** the base address of the PCI BAR, initialized by ACRN-DM. */ + uint32_t bar[ACRN_PCI_NUM_BARS]; +}; + +#define MMIODEV_RES_NUM 3 + +/** + * @brief Info to assign or deassign a MMIO device for a VM + */ +struct acrn_mmiodev { + char name[8]; + struct acrn_mmiores { + /** the gpa of the MMIO region for the MMIO device */ + uint64_t user_vm_pa; + /** the hpa of the MMIO region for the MMIO device: for post-launched VM + * it's pa in service vm; for pre-launched VM it's pa in HV. + */ + uint64_t host_pa; + /** the size of the MMIO region for the MMIO resource */ + uint64_t size; + /** the memory type of the MMIO region for the MMIO resource */ + uint64_t mem_type; + } res[MMIODEV_RES_NUM]; +}; + +/** + * @brief Info to create or destroy a virtual PCI or legacy device for a VM + * + * the parameter for HC_CREATE_VDEV or HC_DESTROY_VDEV hypercall + */ +struct acrn_vdev { + /* + * the identifier of the device, the low 32 bits represent the vendor + * id and device id of PCI device and the high 32 bits represent the + * device number of the legacy device + */ + union { + uint64_t value; + struct { + uint16_t vendor; + uint16_t device; + uint32_t legacy_id; + } fields; + } id; + + /* + * the slot of the device, if the device is a PCI device, the slot + * represents BDF, otherwise it represents legacy device slot number + */ + uint64_t slot; + + /** the IO resource address of the device, initialized by ACRN-DM. */ + uint32_t io_addr[ACRN_PCI_NUM_BARS]; + + /** the IO resource size of the device, initialized by ACRN-DM. */ + uint32_t io_size[ACRN_PCI_NUM_BARS]; + + /** the options for the virtual device, initialized by ACRN-DM. */ + uint8_t args[128]; +}; + +#define ACRN_ASYNCIO_PIO (0x01U) +#define ACRN_ASYNCIO_MMIO (0x02U) + +#define SBUF_MAGIC 0x5aa57aa71aa13aa3UL +#define SBUF_MAX_SIZE (1UL << 22U) +#define SBUF_HEAD_SIZE 64U + +/* sbuf flags */ +#define OVERRUN_CNT_EN (1U << 0U) /* whether overrun counting is enabled */ +#define OVERWRITE_EN (1U << 1U) /* whether overwrite is enabled */ + +/** + * (sbuf) head + buf (store (ele_num - 1) elements at most) + * buffer empty: tail == head + * buffer full: (tail + ele_size) % size == head + * + * Base of memory for elements + * | + * | + * ---------------------------------------------------------------------- + * | struct shared_buf | raw data (ele_size)| ... | raw data (ele_size) | + * ---------------------------------------------------------------------- + * | + * | + * struct shared_buf *buf + */ + +enum { + ACRN_TRACE = 0U, + ACRN_HVLOG, + ACRN_SEP, + ACRN_SOCWATCH, + /* The sbuf with above ids are created each pcpu */ + ACRN_SBUF_PER_PCPU_ID_MAX, + ACRN_ASYNCIO = 64, +}; + +/* Make sure sizeof(struct shared_buf) == SBUF_HEAD_SIZE */ +struct shared_buf { + uint64_t magic; + uint32_t ele_num; /* number of elements */ + uint32_t ele_size; /* sizeof of elements */ + uint32_t head; /* offset from base, to read */ + uint32_t tail; /* offset from base, to write */ + uint32_t flags; + uint32_t reserved; + uint32_t overrun_cnt; /* count of overrun */ + uint32_t size; /* ele_num * ele_size */ + uint32_t padding[6]; +}; + +/** + * @} + */ +#endif /* ACRN_COMMON_H */ diff --git a/src/components/implementation/simple_vmm/nf_multicore/acrn_types.h b/src/components/implementation/simple_vmm/nf_multicore/acrn_types.h new file mode 100644 index 0000000000..0d6b92fcd9 --- /dev/null +++ b/src/components/implementation/simple_vmm/nf_multicore/acrn_types.h @@ -0,0 +1,51 @@ +/* + * Copyright (C) 2018-2022 Intel Corporation. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef ACRN_TYPES_H +#define ACRN_TYPES_H + +#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0])) +#define __aligned(x) __attribute__((aligned(x))) +#define __packed __attribute__((packed)) +#define __unused __attribute__((unused)) + +#include + +/** Roundup (x/y) to ( x/y + (x%y) ? 1 : 0) **/ +#define INT_DIV_ROUNDUP(x, y) ((((x)+(y))-1)/(y)) + +/* Define standard data types. These definitions allow software components + * to perform in the same manner on different target platforms. + */ +typedef signed char int8_t; +typedef unsigned char uint8_t; +typedef signed short int16_t; +typedef unsigned short uint16_t; +typedef signed int int32_t; +typedef unsigned int uint32_t; +typedef unsigned long uint64_t; +typedef signed long int64_t; +typedef __builtin_va_list va_list; + +#ifndef NULL +#define NULL ((void *) 0) +#endif + +#ifndef true +#define true ((_Bool) 1) +#define false ((_Bool) 0) +#endif + +#ifndef UINT64_MAX +#define UINT64_MAX (0xffffffffffffffffUL) +#endif + +#ifndef UINT32_MAX +#define UINT32_MAX (0xffffffffU) +#endif + + +#endif /* INCLUDE_TYPES_H defined */ diff --git a/src/components/implementation/simple_vmm/nf_multicore/apicreg.h b/src/components/implementation/simple_vmm/nf_multicore/apicreg.h new file mode 100644 index 0000000000..0b8579ffb2 --- /dev/null +++ b/src/components/implementation/simple_vmm/nf_multicore/apicreg.h @@ -0,0 +1,444 @@ +/*- + * Copyright (c) 1996, by Peter Wemm and Steve Passe + * Copyright (c) 2017-2022 Intel Corporation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. The name of the developer may NOT be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef APICREG_H +#define APICREG_H + +#include +/* + * Local && I/O APIC definitions. + */ + +/****************************************************************************** + * global defines, etc. + */ + + +/****************************************************************************** + * LOCAL APIC structure + */ +struct lapic_reg { + uint32_t v; + uint32_t pad[3]; +}; + +struct lapic_regs { /*OFFSET(Hex)*/ + struct lapic_reg rsv0[2]; + struct lapic_reg id; /*020*/ + struct lapic_reg version; /*030*/ + struct lapic_reg rsv1[4]; + struct lapic_reg tpr; /*080*/ + struct lapic_reg apr; /*090*/ + struct lapic_reg ppr; /*0A0*/ + struct lapic_reg eoi; /*0B0*/ + struct lapic_reg rrd; /*0C0*/ + struct lapic_reg ldr; /*0D0*/ + struct lapic_reg dfr; /*0EO*/ + struct lapic_reg svr; /*0F0*/ + struct lapic_reg isr[8]; /*100 -- 170*/ + struct lapic_reg tmr[8]; /*180 -- 1F0*/ + struct lapic_reg irr[8]; /*200 -- 270*/ + struct lapic_reg esr; /*280*/ + struct lapic_reg rsv2[6]; + struct lapic_reg lvt_cmci; /*2F0*/ + struct lapic_reg icr_lo; /*300*/ + struct lapic_reg icr_hi; /*310*/ + struct lapic_reg lvt[6]; /*320 -- 370*/ + struct lapic_reg icr_timer;/*380*/ + struct lapic_reg ccr_timer;/*390*/ + struct lapic_reg rsv3[4]; + struct lapic_reg dcr_timer;/*3E0*/ + struct lapic_reg self_ipi; /*3F0*/ + + /*roundup sizeof current struct to 4KB*/ + struct lapic_reg rsv5[192]; /*400 -- FF0*/ +} __attribute__((aligned(4096))); + +enum LAPIC_REGISTERS { + LAPIC_ID = 0x2, + LAPIC_VERSION = 0x3, + LAPIC_TPR = 0x8, + LAPIC_APR = 0x9, + LAPIC_PPR = 0xa, + LAPIC_EOI = 0xb, + LAPIC_LDR = 0xd, + LAPIC_DFR = 0xe, /* Not in x2APIC */ + LAPIC_SVR = 0xf, + LAPIC_ISR0 = 0x10, + LAPIC_ISR1 = 0x11, + LAPIC_ISR2 = 0x12, + LAPIC_ISR3 = 0x13, + LAPIC_ISR4 = 0x14, + LAPIC_ISR5 = 0x15, + LAPIC_ISR6 = 0x16, + LAPIC_ISR7 = 0x17, + LAPIC_TMR0 = 0x18, + LAPIC_TMR1 = 0x19, + LAPIC_TMR2 = 0x1a, + LAPIC_TMR3 = 0x1b, + LAPIC_TMR4 = 0x1c, + LAPIC_TMR5 = 0x1d, + LAPIC_TMR6 = 0x1e, + LAPIC_TMR7 = 0x1f, + LAPIC_IRR0 = 0x20, + LAPIC_IRR1 = 0x21, + LAPIC_IRR2 = 0x22, + LAPIC_IRR3 = 0x23, + LAPIC_IRR4 = 0x24, + LAPIC_IRR5 = 0x25, + LAPIC_IRR6 = 0x26, + LAPIC_IRR7 = 0x27, + LAPIC_ESR = 0x28, + LAPIC_LVT_CMCI = 0x2f, + LAPIC_ICR_LO = 0x30, + LAPIC_ICR_HI = 0x31, /* Not in x2APIC */ + LAPIC_LVT_TIMER = 0x32, + LAPIC_LVT_THERMAL = 0x33, + LAPIC_LVT_PCINT = 0x34, + LAPIC_LVT_LINT0 = 0x35, + LAPIC_LVT_LINT1 = 0x36, + LAPIC_LVT_ERROR = 0x37, + LAPIC_ICR_TIMER = 0x38, + LAPIC_CCR_TIMER = 0x39, + LAPIC_DCR_TIMER = 0x3e, + LAPIC_SELF_IPI = 0x3f, /* Only in x2APIC */ + LAPIC_EXT_FEATURES = 0x40, /* AMD */ + LAPIC_EXT_CTRL = 0x41, /* AMD */ + LAPIC_EXT_SEOI = 0x42, /* AMD */ + LAPIC_EXT_IER0 = 0x48, /* AMD */ + LAPIC_EXT_IER1 = 0x49, /* AMD */ + LAPIC_EXT_IER2 = 0x4a, /* AMD */ + LAPIC_EXT_IER3 = 0x4b, /* AMD */ + LAPIC_EXT_IER4 = 0x4c, /* AMD */ + LAPIC_EXT_IER5 = 0x4d, /* AMD */ + LAPIC_EXT_IER6 = 0x4e, /* AMD */ + LAPIC_EXT_IER7 = 0x4f, /* AMD */ + LAPIC_EXT_LVT0 = 0x50, /* AMD */ + LAPIC_EXT_LVT1 = 0x51, /* AMD */ + LAPIC_EXT_LVT2 = 0x52, /* AMD */ + LAPIC_EXT_LVT3 = 0x53, /* AMD */ +}; + +#define LAPIC_MEM_MUL 0x10 + +/* + * Although some registers are available on AMD processors only, + * it's not a big waste to reserve them on all platforms. + * However, we need to watch out for this space being assigned for + * non-APIC purposes in the future processor models. + */ +#define LAPIC_MEM_REGION ((LAPIC_EXT_LVT3 + 1) * LAPIC_MEM_MUL) + +/****************************************************************************** + * I/O APIC structure + */ + +struct ioapic { + uint32_t ioregsel; + uint32_t rsv0[3]; + uint32_t iowin; + uint32_t rsv1[3]; +}; + +/* + * Macros for bits in union ioapic_rte + */ +#define IOAPIC_RTE_MASK_CLR 0x0U /* Interrupt Mask: Clear */ +#define IOAPIC_RTE_MASK_SET 0x1U /* Interrupt Mask: Set */ + +#define IOAPIC_RTE_TRGRMODE_EDGE 0x0U /* Trigger Mode: Edge */ +#define IOAPIC_RTE_TRGRMODE_LEVEL 0x1U /* Trigger Mode: Level */ + +#define IOAPIC_RTE_REM_IRR 0x1U /* Remote IRR: Read-Only */ + +#define IOAPIC_RTE_INTPOL_AHI 0x0U /* Interrupt Polarity: active high */ +#define IOAPIC_RTE_INTPOL_ALO 0x1U /* Interrupt Polarity: active low */ + +#define IOAPIC_RTE_DELIVS 0x1U /* Delivery Status: Read-Only */ + +#define IOAPIC_RTE_DESTMODE_PHY 0x0U /* Destination Mode: Physical */ +#define IOAPIC_RTE_DESTMODE_LOGICAL 0x1U /* Destination Mode: Logical */ + +#define IOAPIC_RTE_DELMODE_FIXED 0x0U /* Delivery Mode: Fixed */ +#define IOAPIC_RTE_DELMODE_LOPRI 0x1U /* Delivery Mode: Lowest priority */ +#define IOAPIC_RTE_DELMODE_INIT 0x5U /* Delivery Mode: INIT signal */ +#define IOAPIC_RTE_DELMODE_EXINT 0x7U /* Delivery Mode: External INTerrupt */ + +/* IOAPIC Redirection Table (RTE) Entry structure */ +union ioapic_rte { + uint64_t full; + struct { + uint32_t lo_32; + uint32_t hi_32; + } u; + struct { + uint8_t vector:8; + uint64_t delivery_mode:3; + uint64_t dest_mode:1; + uint64_t delivery_status:1; + uint64_t intr_polarity:1; + uint64_t remote_irr:1; + uint64_t trigger_mode:1; + uint64_t intr_mask:1; + uint64_t rsvd_1:39; + uint8_t dest_field:8; + } bits __attribute__((packed)); + struct { + uint32_t vector:8; + uint32_t constant:3; + uint32_t intr_index_high:1; + uint32_t delivery_status:1; + uint32_t intr_polarity:1; + uint32_t remote_irr:1; + uint32_t trigger_mode:1; + uint32_t intr_mask:1; + uint32_t rsvd_1:15; + uint32_t rsvd_2:16; + uint32_t intr_format:1; + uint32_t intr_index_low:15; + } ir_bits __attribute__((packed)); +}; + +/****************************************************************************** + * various code 'logical' values + */ + +/****************************************************************************** + * LOCAL APIC defines + */ + +/* default physical locations of LOCAL (CPU) APICs */ +#define DEFAULT_APIC_BASE 0xfee00000UL + +/* constants relating to APIC ID registers */ +#define APIC_ID_MASK 0xff000000U +#define APIC_ID_SHIFT 24U +#define APIC_ID_CLUSTER 0xf0U +#define APIC_ID_CLUSTER_ID 0x0fU +#define APIC_MAX_CLUSTER 0xeU +#define APIC_MAX_INTRACLUSTER_ID 3 +#define APIC_ID_CLUSTER_SHIFT 4 + +/* fields in VER */ +#define APIC_VER_VERSION 0x000000ffU +#define APIC_VER_MAXLVT 0x00ff0000U +#define MAXLVTSHIFT 16U +#define APIC_VER_EOI_SUPPRESSION 0x01000000U +#define APIC_VER_AMD_EXT_SPACE 0x80000000U + +/* fields in LDR */ +#define APIC_LDR_RESERVED 0x00ffffffU + +/* fields in DFR */ +#define APIC_DFR_RESERVED 0x0fffffffU +#define APIC_DFR_MODEL_MASK 0xf0000000U +#define APIC_DFR_MODEL_FLAT 0xf0000000U +#define APIC_DFR_MODEL_CLUSTER 0x00000000U + +/* fields in SVR */ +#define APIC_SVR_VECTOR 0x000000ffU +#define APIC_SVR_VEC_PROG 0x000000f0U +#define APIC_SVR_VEC_FIX 0x0000000fU +#define APIC_SVR_ENABLE 0x00000100U +#define APIC_SVR_SWDIS 0x00000000U +#define APIC_SVR_SWEN 0x00000100U +#define APIC_SVR_FOCUS 0x00000200U +#define APIC_SVR_FEN 0x00000000U +#define APIC_SVR_FDIS 0x00000200U +#define APIC_SVR_EOI_SUPPRESSION 0x00001000U + +/* fields in TPR */ +#define APIC_TPR_PRIO 0x000000ffU +#define APIC_TPR_INT 0x000000f0U +#define APIC_TPR_SUB 0x0000000fU + +/* fields in ESR */ +#define APIC_ESR_SEND_CS_ERROR 0x00000001U +#define APIC_ESR_RECEIVE_CS_ERROR 0x00000002U +#define APIC_ESR_SEND_ACCEPT 0x00000004U +#define APIC_ESR_RECEIVE_ACCEPT 0x00000008U +#define APIC_ESR_SEND_ILLEGAL_VECTOR 0x00000020U +#define APIC_ESR_RECEIVE_ILLEGAL_VECTOR 0x00000040U +#define APIC_ESR_ILLEGAL_REGISTER 0x00000080U + +/* fields in ICR_LOW */ +#define APIC_VECTOR_MASK 0x000000ffU + +#define APIC_DELMODE_MASK 0x00000700U +#define APIC_DELMODE_FIXED 0x00000000U +#define APIC_DELMODE_LOWPRIO 0x00000100U +#define APIC_DELMODE_SMI 0x00000200U +#define APIC_DELMODE_RR 0x00000300U +#define APIC_DELMODE_NMI 0x00000400U +#define APIC_DELMODE_INIT 0x00000500U +#define APIC_DELMODE_STARTUP 0x00000600U +#define APIC_DELMODE_RESV 0x00000700U + +#define APIC_DESTMODE_MASK 0x00000800U +#define APIC_DESTMODE_PHY 0x00000000U +#define APIC_DESTMODE_LOG 0x00000800U + +#define APIC_DELSTAT_MASK 0x00001000U +#define APIC_DELSTAT_IDLE 0x00000000U +#define APIC_DELSTAT_PEND 0x00001000U + +#define APIC_RESV1_MASK 0x00002000U + +#define APIC_LEVEL_MASK 0x00004000U +#define APIC_LEVEL_DEASSERT 0x00000000U +#define APIC_LEVEL_ASSERT 0x00004000U + +#define APIC_TRIGMOD_MASK 0x00008000U +#define APIC_TRIGMOD_EDGE 0x00000000U +#define APIC_TRIGMOD_LEVEL 0x00008000U + +#define APIC_RRSTAT_MASK 0x00030000U +#define APIC_RRSTAT_INVALID 0x00000000U +#define APIC_RRSTAT_INPROG 0x00010000U +#define APIC_RRSTAT_VALID 0x00020000U +#define APIC_RRSTAT_RESV 0x00030000U + +#define APIC_DEST_MASK 0x000c0000U +#define APIC_DEST_NOSHORT 0x00000000U +#define APIC_DEST_SELF 0x00040000U +#define APIC_DEST_ALLISELF 0x00080000U +#define APIC_DEST_ALLESELF 0x000c0000U + +#define APIC_RESV2_MASK 0xfff00000U + +#define APIC_ICRLO_RESV_MASK (APIC_RESV1_MASK | APIC_RESV2_MASK) + +/* fields in LVT1/2 */ +#define APIC_LVT_VECTOR 0x000000ffU +#define APIC_LVT_DM 0x00000700U +#define APIC_LVT_DM_FIXED 0x00000000U +#define APIC_LVT_DM_SMI 0x00000200U +#define APIC_LVT_DM_NMI 0x00000400U +#define APIC_LVT_DM_INIT 0x00000500U +#define APIC_LVT_DM_EXTINT 0x00000700U +#define APIC_LVT_DS 0x00001000U +#define APIC_LVT_IIPP 0x00002000U +#define APIC_LVT_IIPP_INTALO 0x00002000U +#define APIC_LVT_IIPP_INTAHI 0x00000000U +#define APIC_LVT_RIRR 0x00004000U +#define APIC_LVT_TM 0x00008000U +#define APIC_LVT_M 0x00010000U + + +/* fields in LVT Timer */ +#define APIC_LVTT_VECTOR 0x000000ffU +#define APIC_LVTT_DS 0x00001000U +#define APIC_LVTT_M 0x00010000U +#define APIC_LVTT_TM 0x00060000U +#define APIC_LVTT_TM_ONE_SHOT 0x00000000U +#define APIC_LVTT_TM_PERIODIC 0x00020000U +#define APIC_LVTT_TM_TSCDLT 0x00040000U +#define APIC_LVTT_TM_RSRV 0x00060000U + +/* APIC timer current count */ +#define APIC_TIMER_MAX_COUNT 0xffffffffU + +/* fields in TDCR */ +#define APIC_TDCR_2 0x00U +#define APIC_TDCR_4 0x01U +#define APIC_TDCR_8 0x02U +#define APIC_TDCR_16 0x03U +#define APIC_TDCR_32 0x08U +#define APIC_TDCR_64 0x09U +#define APIC_TDCR_128 0x0aU +#define APIC_TDCR_1 0x0bU + +/* Constants related to AMD Extended APIC Features Register */ +#define APIC_EXTF_ELVT_MASK 0x00ff0000U +#define APIC_EXTF_ELVT_SHIFT 16 +#define APIC_EXTF_EXTID_CAP 0x00000004U +#define APIC_EXTF_SEIO_CAP 0x00000002U +#define APIC_EXTF_IER_CAP 0x00000001U + +/* LVT table indices */ +#define APIC_LVT_TIMER 0U +#define APIC_LVT_THERMAL 1U +#define APIC_LVT_PMC 2U +#define APIC_LVT_LINT0 3U +#define APIC_LVT_LINT1 4U +#define APIC_LVT_ERROR 5U +#define APIC_LVT_CMCI 6U +#define APIC_LVT_MAX APIC_LVT_CMCI + +/* AMD extended LVT constants, seem to be assigned by fiat */ +#define APIC_ELVT_IBS 0 /* Instruction based sampling */ +#define APIC_ELVT_MCA 1 /* MCE thresholding */ +#define APIC_ELVT_DEI 2 /* Deferred error interrupt */ +#define APIC_ELVT_SBI 3 /* Sideband interface */ +#define APIC_ELVT_MAX APIC_ELVT_SBI + +/****************************************************************************** + * I/O APIC defines + */ + +/* window register offset */ +#define IOAPIC_REGSEL 0x00U +#define IOAPIC_WINDOW 0x10U + +/* indexes into IO APIC */ +#define IOAPIC_ID 0x00U +#define IOAPIC_VER 0x01U +#define IOAPIC_ARB 0x02U +#define IOAPIC_REDTBL 0x10U +#define IOAPIC_REDTBL0 IOAPIC_REDTBL +#define IOAPIC_REDTBL1 (IOAPIC_REDTBL+0x02U) +#define IOAPIC_REDTBL2 (IOAPIC_REDTBL+0x04U) +#define IOAPIC_REDTBL3 (IOAPIC_REDTBL+0x06U) +#define IOAPIC_REDTBL4 (IOAPIC_REDTBL+0x08U) +#define IOAPIC_REDTBL5 (IOAPIC_REDTBL+0x0aU) +#define IOAPIC_REDTBL6 (IOAPIC_REDTBL+0x0cU) +#define IOAPIC_REDTBL7 (IOAPIC_REDTBL+0x0eU) +#define IOAPIC_REDTBL8 (IOAPIC_REDTBL+0x10U) +#define IOAPIC_REDTBL9 (IOAPIC_REDTBL+0x12U) +#define IOAPIC_REDTBL10 (IOAPIC_REDTBL+0x14U) +#define IOAPIC_REDTBL11 (IOAPIC_REDTBL+0x16U) +#define IOAPIC_REDTBL12 (IOAPIC_REDTBL+0x18U) +#define IOAPIC_REDTBL13 (IOAPIC_REDTBL+0x1aU) +#define IOAPIC_REDTBL14 (IOAPIC_REDTBL+0x1cU) +#define IOAPIC_REDTBL15 (IOAPIC_REDTBL+0x1eU) +#define IOAPIC_REDTBL16 (IOAPIC_REDTBL+0x20U) +#define IOAPIC_REDTBL17 (IOAPIC_REDTBL+0x22U) +#define IOAPIC_REDTBL18 (IOAPIC_REDTBL+0x24U) +#define IOAPIC_REDTBL19 (IOAPIC_REDTBL+0x26U) +#define IOAPIC_REDTBL20 (IOAPIC_REDTBL+0x28U) +#define IOAPIC_REDTBL21 (IOAPIC_REDTBL+0x2aU) +#define IOAPIC_REDTBL22 (IOAPIC_REDTBL+0x2cU) +#define IOAPIC_REDTBL23 (IOAPIC_REDTBL+0x2eU) + +#define IOAPIC_ID_MASK 0x0f000000U +#define IOAPIC_ID_SHIFT 24U + +/* fields in VER, for redirection entry */ +#define IOAPIC_MAX_RTE_MASK 0x00ff0000U +#define MAX_RTE_SHIFT 16U + +#endif /* APICREG_H */ diff --git a/src/components/implementation/simple_vmm/nf_multicore/atomic.h b/src/components/implementation/simple_vmm/nf_multicore/atomic.h new file mode 100644 index 0000000000..08de71b656 --- /dev/null +++ b/src/components/implementation/simple_vmm/nf_multicore/atomic.h @@ -0,0 +1,152 @@ +/*- + * Copyright (c) 1998 Doug Rabson + * Copyright (c) 2018-2022 Intel Corporation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef ATOMIC_H +#define ATOMIC_H +#include +#define BUS_LOCK "lock ; " + +#define build_atomic_inc(name, size, type) \ +static inline void name(type *ptr) \ +{ \ + asm volatile(BUS_LOCK "inc" size " %0" \ + : "=m" (*ptr) \ + : "m" (*ptr)); \ +} +build_atomic_inc(atomic_inc16, "w", uint16_t) +build_atomic_inc(atomic_inc32, "l", uint32_t) +build_atomic_inc(atomic_inc64, "q", uint64_t) + +#define build_atomic_dec(name, size, type) \ +static inline void name(type *ptr) \ +{ \ + asm volatile(BUS_LOCK "dec" size " %0" \ + : "=m" (*ptr) \ + : "m" (*ptr)); \ +} +build_atomic_dec(atomic_dec16, "w", uint16_t) +build_atomic_dec(atomic_dec32, "l", uint32_t) +build_atomic_dec(atomic_dec64, "q", uint64_t) + +#define build_atomic_swap(name, size, type) \ +static inline type name(type *ptr, type v) \ +{ \ + asm volatile(BUS_LOCK "xchg" size " %1,%0" \ + : "+m" (*ptr), "+r" (v) \ + : \ + : "cc", "memory"); \ + return v; \ +} +build_atomic_swap(atomic_swap32, "l", uint32_t) +build_atomic_swap(atomic_swap64, "q", uint64_t) + + /* + * #define atomic_readandclear32(P) \ + * (return (*(uint32_t *)(P)); *(uint32_t *)(P) = 0U;) + */ +static inline uint32_t atomic_readandclear32(uint32_t *p) +{ + return atomic_swap32(p, 0U); +} + + /* + * #define atomic_readandclear64(P) \ + * (return (*(uint64_t *)(P)); *(uint64_t *)(P) = 0UL;) + */ +static inline uint64_t atomic_readandclear64(uint64_t *p) +{ + return atomic_swap64(p, 0UL); +} + +#define build_atomic_cmpxchg(name, size, type) \ +static inline type name(volatile type *ptr, type old, type new) \ +{ \ + type ret; \ + asm volatile(BUS_LOCK "cmpxchg" size " %2,%1" \ + : "=a" (ret), "+m" (*ptr) \ + : "r" (new), "0" (old) \ + : "memory"); \ + return ret; \ +} +build_atomic_cmpxchg(atomic_cmpxchg32, "l", uint32_t) +build_atomic_cmpxchg(atomic_cmpxchg64, "q", uint64_t) + +#define build_atomic_xadd(name, size, type) \ +static inline type name(type *ptr, type v) \ +{ \ + asm volatile(BUS_LOCK "xadd" size " %0,%1" \ + : "+r" (v), "+m" (*ptr) \ + : \ + : "cc", "memory"); \ + return v; \ + } +build_atomic_xadd(atomic_xadd16, "w", uint16_t) +build_atomic_xadd(atomic_xadd32, "l", int32_t) +build_atomic_xadd(atomic_xadd64, "q", int64_t) + +static inline int32_t atomic_add_return(int32_t *p, int32_t v) +{ + return (atomic_xadd32(p, v) + v); +} + +static inline int32_t atomic_sub_return(int32_t *p, int32_t v) +{ + return (atomic_xadd32(p, -v) - v); +} + +static inline int32_t atomic_inc_return(int32_t *v) +{ + return atomic_add_return(v, 1); +} + +static inline int32_t atomic_dec_return(int32_t *v) +{ + return atomic_sub_return(v, 1); +} + +static inline int64_t atomic_add64_return(int64_t *p, int64_t v) +{ + return (atomic_xadd64(p, v) + v); +} + +static inline int64_t atomic_sub64_return(int64_t *p, int64_t v) +{ + return (atomic_xadd64(p, -v) - v); +} + +static inline int64_t atomic_inc64_return(int64_t *v) +{ + return atomic_add64_return(v, 1); +} + +static inline int64_t atomic_dec64_return(int64_t *v) +{ + return atomic_sub64_return(v, 1); +} + +#endif /* ATOMIC_H*/ diff --git a/src/components/implementation/simple_vmm/nf_multicore/bits.h b/src/components/implementation/simple_vmm/nf_multicore/bits.h new file mode 100644 index 0000000000..f7f8b732e7 --- /dev/null +++ b/src/components/implementation/simple_vmm/nf_multicore/bits.h @@ -0,0 +1,298 @@ +/*- + * Copyright (c) 1998 Doug Rabson + * Copyright (c) 2017-2022 Intel Corporation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef BITS_H +#define BITS_H +#include "atomic.h" + +/** + * + * INVALID_BIT_INDEX means when input paramter is zero, + * bit operations function can't find bit set and return + * the invalid bit index directly. + * + **/ +#define INVALID_BIT_INDEX 0xffffU + +/* + * + * fls32 - Find the Last (most significant) bit Set in value and + * return the bit index of that bit. + * + * Bits are numbered starting at 0,the least significant bit. + * A return value of INVALID_BIT_INDEX means return value is + * invalid bit index when the input argument was zero. + * + * Examples: + * fls32 (0x0) = INVALID_BIT_INDEX + * fls32 (0x01) = 0 + * fls32 (0x80) = 7 + * ... + * fls32 (0x80000001) = 31 + * + * @param value: 'uint32_t' type value + * + * @return value: zero-based bit index, INVALID_BIT_INDEX means + * when 'value' was zero, bit operations function can't find bit + * set and return the invalid bit index directly. + * + */ +static inline uint16_t fls32(uint32_t value) +{ + uint32_t ret; + asm volatile("bsrl %1,%0\n\t" + "jnz 1f\n\t" + "mov %2,%0\n" + "1:" : "=r" (ret) + : "rm" (value), "i" (INVALID_BIT_INDEX)); + return (uint16_t)ret; +} + +static inline uint16_t fls64(uint64_t value) +{ + uint64_t ret = 0UL; + asm volatile("bsrq %1,%0\n\t" + "jnz 1f\n\t" + "mov %2,%0\n" + "1:" : "=r" (ret) + : "rm" (value), "i" (INVALID_BIT_INDEX)); + return (uint16_t)ret; +} + +/* + * + * ffs64 - Find the First (least significant) bit Set in value(Long type) + * and return the index of that bit. + * + * Bits are numbered starting at 0,the least significant bit. + * A return value of INVALID_BIT_INDEX means that the return value is the inalid + * bit index when the input argument was zero. + * + * Examples: + * ffs64 (0x0) = INVALID_BIT_INDEX + * ffs64 (0x01) = 0 + * ffs64 (0xf0) = 4 + * ffs64 (0xf00) = 8 + * ... + * ffs64 (0x8000000000000001) = 0 + * ffs64 (0xf000000000000000) = 60 + * + * @param value: 'uint64_t' type value + * + * @return value: zero-based bit index, INVALID_BIT_INDEX means + * when 'value' was zero, bit operations function can't find bit + * set and return the invalid bit index directly. + * + */ +static inline uint16_t ffs64(uint64_t value) +{ + uint64_t ret; + asm volatile("bsfq %1,%0\n\t" + "jnz 1f\n\t" + "mov %2,%0\n" + "1:" : "=r" (ret) + : "rm" (value), "i" (INVALID_BIT_INDEX)); + return (uint16_t)ret; +} + +/*bit scan forward for the least significant bit '0'*/ +static inline uint16_t ffz64(uint64_t value) +{ + return ffs64(~value); +} + + +/* + * find the first zero bit in a uint64_t array. + * @pre: the size must be multiple of 64. + */ +static inline uint64_t ffz64_ex(const uint64_t *addr, uint64_t size) +{ + uint64_t ret = size; + uint64_t idx; + + for (idx = 0UL; (idx << 6U) < size; idx++) { + if (addr[idx] != ~0UL) { + ret = (idx << 6U) + ffz64(addr[idx]); + break; + } + } + + return ret; +} +/* + * Counts leading zeros. + * + * The number of leading zeros is defined as the number of + * most significant bits which are not '1'. E.g.: + * clz(0x80000000)==0 + * clz(0x40000000)==1 + * ... + * clz(0x00000001)==31 + * clz(0x00000000)==32 + * + * @param value:The 32 bit value to count the number of leading zeros. + * + * @return The number of leading zeros in 'value'. + */ +static inline uint16_t clz(uint32_t value) +{ + return ((value != 0U) ? (31U - fls32(value)) : 32U); +} + +/* + * Counts leading zeros (64 bit version). + * + * @param value:The 64 bit value to count the number of leading zeros. + * + * @return The number of leading zeros in 'value'. + */ +static inline uint16_t clz64(uint64_t value) +{ + return ((value != 0UL) ? (63U - fls64(value)) : 64U); +} + +/* + * (*addr) |= (1UL<=64, it will be truncated. + */ +#define build_bitmap_set(name, op_len, op_type, lock) \ +static inline void name(uint16_t nr_arg, volatile op_type *addr) \ +{ \ + uint16_t nr; \ + nr = nr_arg & ((8U * sizeof(op_type)) - 1U); \ + asm volatile(lock "or" op_len " %1,%0" \ + : "+m" (*addr) \ + : "r" ((op_type)(1UL<=64, it will be truncated. + */ +#define build_bitmap_clear(name, op_len, op_type, lock) \ +static inline void name(uint16_t nr_arg, volatile op_type *addr) \ +{ \ + uint16_t nr; \ + nr = nr_arg & ((8U * sizeof(op_type)) - 1U); \ + asm volatile(lock "and" op_len " %1,%0" \ + : "+m" (*addr) \ + : "r" ((op_type)(~(1UL<<(nr)))) \ + : "cc", "memory"); \ +} +build_bitmap_clear(bitmap_clear_nolock, "q", uint64_t, "") +build_bitmap_clear(bitmap_clear_lock, "q", uint64_t, BUS_LOCK) +build_bitmap_clear(bitmap32_clear_nolock, "l", uint32_t, "") +build_bitmap_clear(bitmap32_clear_lock, "l", uint32_t, BUS_LOCK) + +/* + * return !!((*addr) & (1UL<=64, it will + * be truncated. + */ +static inline bool bitmap_test(uint16_t nr, const volatile uint64_t *addr) +{ + int32_t ret = 0; + asm volatile("btq %q2,%1\n\tsbbl %0, %0" + : "=r" (ret) + : "m" (*addr), "r" ((uint64_t)(nr & 0x3fU)) + : "cc", "memory"); + return (ret != 0); +} + +static inline bool bitmap32_test(uint16_t nr, const volatile uint32_t *addr) +{ + int32_t ret = 0; + asm volatile("btl %2,%1\n\tsbbl %0, %0" + : "=r" (ret) + : "m" (*addr), "r" ((uint32_t)(nr & 0x1fU)) + : "cc", "memory"); + return (ret != 0); +} + +/* + * bool ret = (*addr) & (1UL<=64, it + * will be truncated. + */ +#define build_bitmap_testandset(name, op_len, op_type, lock) \ +static inline bool name(uint16_t nr_arg, volatile op_type *addr) \ +{ \ + uint16_t nr; \ + int32_t ret=0; \ + nr = nr_arg & ((8U * sizeof(op_type)) - 1U); \ + asm volatile(lock "bts" op_len " %2,%1\n\tsbbl %0,%0" \ + : "=r" (ret), "=m" (*addr) \ + : "r" ((op_type)nr) \ + : "cc", "memory"); \ + return (ret != 0); \ +} +build_bitmap_testandset(bitmap_test_and_set_nolock, "q", uint64_t, "") +build_bitmap_testandset(bitmap_test_and_set_lock, "q", uint64_t, BUS_LOCK) +build_bitmap_testandset(bitmap32_test_and_set_nolock, "l", uint32_t, "") +build_bitmap_testandset(bitmap32_test_and_set_lock, "l", uint32_t, BUS_LOCK) + +/* + * bool ret = (*addr) & (1UL<=64, + * it will be truncated. + */ +#define build_bitmap_testandclear(name, op_len, op_type, lock) \ +static inline bool name(uint16_t nr_arg, volatile op_type *addr) \ +{ \ + uint16_t nr; \ + int32_t ret=0; \ + nr = nr_arg & ((8U * sizeof(op_type)) - 1U); \ + asm volatile(lock "btr" op_len " %2,%1\n\tsbbl %0,%0" \ + : "=r" (ret), "=m" (*addr) \ + : "r" ((op_type)nr) \ + : "cc", "memory"); \ + return (ret != 0); \ +} +build_bitmap_testandclear(bitmap_test_and_clear_nolock, "q", uint64_t, "") +build_bitmap_testandclear(bitmap_test_and_clear_lock, "q", uint64_t, BUS_LOCK) +build_bitmap_testandclear(bitmap32_test_and_clear_nolock, "l", uint32_t, "") +build_bitmap_testandclear(bitmap32_test_and_clear_lock, "l", uint32_t, BUS_LOCK) + +static inline uint16_t bitmap_weight(uint64_t bits) +{ + return (uint16_t)__builtin_popcountl(bits); +} + +#endif /* BITS_H*/ diff --git a/src/components/implementation/simple_vmm/nf_multicore/cpu.h b/src/components/implementation/simple_vmm/nf_multicore/cpu.h new file mode 100755 index 0000000000..96f6a6ce4d --- /dev/null +++ b/src/components/implementation/simple_vmm/nf_multicore/cpu.h @@ -0,0 +1,337 @@ +/*- + * Copyright (c) 1989, 1990 William F. Jolitz + * Copyright (c) 1990 The Regents of the University of California. + * Copyright (c) 2017-2022 Intel Corporation. + * + * This code is derived from software contributed to Berkeley by + * William Jolitz. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * from: @(#)segments.h 7.1 (Berkeley) 5/9/91 + * $FreeBSD$ + */ + +#ifndef CPU_H +#define CPU_H +#include +#include +#include +#include + +/* Define CPU stack alignment */ +#define CPU_STACK_ALIGN 16UL + +/* CR0 register definitions */ +#define CR0_PG (1UL<<31U) /* paging enable */ +#define CR0_CD (1UL<<30U) /* cache disable */ +#define CR0_NW (1UL<<29U) /* not write through */ +#define CR0_AM (1UL<<18U) /* alignment mask */ +#define CR0_WP (1UL<<16U) /* write protect */ +#define CR0_NE (1UL<<5U) /* numeric error */ +#define CR0_ET (1UL<<4U) /* extension type */ +#define CR0_TS (1UL<<3U) /* task switched */ +#define CR0_EM (1UL<<2U) /* emulation */ +#define CR0_MP (1UL<<1U) /* monitor coprocessor */ +#define CR0_PE (1UL<<0U) /* protected mode enabled */ + +/* CR3 register definitions */ +#define CR3_PWT (1UL<<3U) /* page-level write through */ +#define CR3_PCD (1UL<<4U) /* page-level cache disable */ + +/* CR4 register definitions */ +#define CR4_VME (1UL<<0U) /* virtual 8086 mode extensions */ +#define CR4_PVI (1UL<<1U) /* protected mode virtual interrupts */ +#define CR4_TSD (1UL<<2U) /* time stamp disable */ +#define CR4_DE (1UL<<3U) /* debugging extensions */ +#define CR4_PSE (1UL<<4U) /* page size extensions */ +#define CR4_PAE (1UL<<5U) /* physical address extensions */ +#define CR4_MCE (1UL<<6U) /* machine check enable */ +#define CR4_PGE (1UL<<7U) /* page global enable */ +#define CR4_PCE (1UL<<8U) +/* performance monitoring counter enable */ +#define CR4_OSFXSR (1UL<<9U) /* OS support for FXSAVE/FXRSTOR */ +#define CR4_OSXMMEXCPT (1UL<<10U) +/* OS support for unmasked SIMD floating point exceptions */ +#define CR4_UMIP (1UL<<11U) /* User-Mode Inst prevention */ +#define CR4_LA57 (1UL<<12U) /* 57-bit linear address */ +#define CR4_VMXE (1UL<<13U) /* VMX enable */ +#define CR4_SMXE (1UL<<14U) /* SMX enable */ +#define CR4_FSGSBASE (1UL<<16U) /* RD(FS|GS|FS)BASE inst */ +#define CR4_PCIDE (1UL<<17U) /* PCID enable */ +/* XSAVE and Processor Extended States enable bit */ +#define CR4_OSXSAVE (1UL<<18U) +#define CR4_KL (1UL<<19U) /* KeyLocker enable */ +#define CR4_SMEP (1UL<<20U) +#define CR4_SMAP (1UL<<21U) +#define CR4_PKE (1UL<<22U) /* Protect-key-enable */ +#define CR4_CET (1UL<<23U) /* Control-flow Enforcement Technology enable */ +#define CR4_PKS (1UL<<24U) /* Enable protection keys for supervisor-mode pages */ + +/* XCR0_SSE */ +#define XCR0_SSE (1UL<<1U) +/* XCR0_AVX */ +#define XCR0_AVX (1UL<<2U) +/* XCR0_BNDREGS */ +#define XCR0_BNDREGS (1UL<<3U) +/* XCR0_BNDCSR */ +#define XCR0_BNDCSR (1UL<<4U) +/* According to SDM Vol1 13.3: + * XCR0[63:10] and XCR0[8] are reserved. Executing the XSETBV instruction causes + * a general-protection fault if ECX = 0 and any corresponding bit in EDX:EAX + * is not 0. + */ +#define XCR0_RESERVED_BITS ((~((1UL << 10U) - 1UL)) | (1UL << 8U)) + + +/* + * Entries in the Interrupt Descriptor Table (IDT) + */ +#define IDT_DE 0U /* #DE: Divide Error */ +#define IDT_DB 1U /* #DB: Debug */ +#define IDT_NMI 2U /* Nonmaskable External Interrupt */ +#define IDT_BP 3U /* #BP: Breakpoint */ +#define IDT_OF 4U /* #OF: Overflow */ +#define IDT_BR 5U /* #BR: Bound Range Exceeded */ +#define IDT_UD 6U /* #UD: Undefined/Invalid Opcode */ +#define IDT_NM 7U /* #NM: No Math Coprocessor */ +#define IDT_DF 8U /* #DF: Double Fault */ +#define IDT_FPUGP 9U /* Coprocessor Segment Overrun */ +#define IDT_TS 10U /* #TS: Invalid TSS */ +#define IDT_NP 11U /* #NP: Segment Not Present */ +#define IDT_SS 12U /* #SS: Stack Segment Fault */ +#define IDT_GP 13U /* #GP: General Protection Fault */ +#define IDT_PF 14U /* #PF: Page Fault */ +#define IDT_MF 16U /* #MF: FPU Floating-Point Error */ +#define IDT_AC 17U /* #AC: Alignment Check */ +#define IDT_MC 18U /* #MC: Machine Check */ +#define IDT_XF 19U /* #XF: SIMD Floating-Point Exception */ +#define IDT_VE 20U /* #VE: Virtualization Exception */ + +/*Bits in EFER special registers */ +#define EFER_LMA 0x00000400U /* Long mode active (R) */ + +#define RFLAGS_C (1U<<0U) +#define RFLAGS_P (1U<<2U) +#define RFLAGS_A (1U<<4U) +#define RFLAGS_Z (1U<<6U) +#define RFLAGS_S (1U<<7U) +#define RFLAGS_O (1U<<11U) +#define RFLAGS_VM (1U<<17U) +#define RFLAGS_AC (1U<<18U) + +/* CPU clock frequencies (FSB) */ +#define CPU_FSB_83KHZ 83200 +#define CPU_FSB_100KHZ 99840 +#define CPU_FSB_133KHZ 133200 +#define CPU_FSB_166KHZ 166400 + +/* Time conversions */ +#define CPU_GHZ_TO_HZ 1000000000 +#define CPU_GHZ_TO_KHZ 1000000 +#define CPU_GHZ_TO_MHZ 1000 +#define CPU_MHZ_TO_HZ 1000000 +#define CPU_MHZ_TO_KHZ 1000 + + +/* Number of GPRs saved / restored for guest in VCPU structure */ +#define NUM_GPRS 16U + +#define XSAVE_STATE_AREA_SIZE 4096U +#define XSAVE_LEGACY_AREA_SIZE 512U +#define XSAVE_HEADER_AREA_SIZE 64U +#define XSAVE_EXTEND_AREA_SIZE (XSAVE_STATE_AREA_SIZE - \ + XSAVE_HEADER_AREA_SIZE - \ + XSAVE_LEGACY_AREA_SIZE) +#define XSAVE_COMPACTED_FORMAT (1UL << 63U) + +#define XSAVE_FPU (1UL << 0U) +#define XSAVE_SSE (1UL << 1U) + +#define CPU_CONTEXT_OFFSET_RAX 0U +#define CPU_CONTEXT_OFFSET_RCX 8U +#define CPU_CONTEXT_OFFSET_RDX 16U +#define CPU_CONTEXT_OFFSET_RBX 24U +#define CPU_CONTEXT_OFFSET_RSP 32U +#define CPU_CONTEXT_OFFSET_RBP 40U +#define CPU_CONTEXT_OFFSET_RSI 48U +#define CPU_CONTEXT_OFFSET_RDI 56U +#define CPU_CONTEXT_OFFSET_R8 64U +#define CPU_CONTEXT_OFFSET_R9 72U +#define CPU_CONTEXT_OFFSET_R10 80U +#define CPU_CONTEXT_OFFSET_R11 88U +#define CPU_CONTEXT_OFFSET_R12 96U +#define CPU_CONTEXT_OFFSET_R13 104U +#define CPU_CONTEXT_OFFSET_R14 112U +#define CPU_CONTEXT_OFFSET_R15 120U +#define CPU_CONTEXT_OFFSET_CR0 128U +#define CPU_CONTEXT_OFFSET_CR2 136U +#define CPU_CONTEXT_OFFSET_CR4 144U +#define CPU_CONTEXT_OFFSET_RIP 152U +#define CPU_CONTEXT_OFFSET_RFLAGS 160U +#define CPU_CONTEXT_OFFSET_IA32_SPEC_CTRL 168U +#define CPU_CONTEXT_OFFSET_IA32_EFER 176U +#define CPU_CONTEXT_OFFSET_EXTCTX_START 184U +#define CPU_CONTEXT_OFFSET_CR3 184U +#define CPU_CONTEXT_OFFSET_IDTR 192U +#define CPU_CONTEXT_OFFSET_LDTR 216U + +#ifndef ASSEMBLER + +#define ALL_CPUS_MASK ((1UL << get_pcpu_nums()) - 1UL) +#define AP_MASK (ALL_CPUS_MASK & ~(1UL << BSP_CPU_ID)) + +/** + * + * Identifiers for architecturally defined registers. + * + * These register names is used in condition statement. + * Within the following groups,register name need to be + * kept in order: + * General register names group (CPU_REG_RAX~CPU_REG_R15); + * Non general register names group (CPU_REG_CR0~CPU_REG_GDTR); + * Segement register names group (CPU_REG_ES~CPU_REG_GS). + */ +enum cpu_reg_name { + /* General purpose register layout should align with + * struct acrn_gp_regs + */ + CPU_REG_RAX, + CPU_REG_RCX, + CPU_REG_RDX, + CPU_REG_RBX, + CPU_REG_RSP, + CPU_REG_RBP, + CPU_REG_RSI, + CPU_REG_RDI, + CPU_REG_R8, + CPU_REG_R9, + CPU_REG_R10, + CPU_REG_R11, + CPU_REG_R12, + CPU_REG_R13, + CPU_REG_R14, + CPU_REG_R15, + + CPU_REG_CR0, + CPU_REG_CR2, + CPU_REG_CR3, + CPU_REG_CR4, + CPU_REG_DR7, + CPU_REG_RIP, + CPU_REG_RFLAGS, + /*CPU_REG_NATURAL_LAST*/ + CPU_REG_EFER, + CPU_REG_PDPTE0, + CPU_REG_PDPTE1, + CPU_REG_PDPTE2, + CPU_REG_PDPTE3, + /*CPU_REG_64BIT_LAST,*/ + CPU_REG_ES, + CPU_REG_CS, + CPU_REG_SS, + CPU_REG_DS, + CPU_REG_FS, + CPU_REG_GS, + CPU_REG_LDTR, + CPU_REG_TR, + CPU_REG_IDTR, + CPU_REG_GDTR + /*CPU_REG_LAST*/ +}; + +/**********************************/ +/* EXTERNAL VARIABLES */ +/**********************************/ + +/* In trampoline range, hold the jump target which trampline will jump to */ +extern uint64_t main_entry[1]; +extern uint64_t secondary_cpu_stack[1]; + +/* + * To support per_cpu access, we use a special struct "per_cpu_region" to hold + * the pattern of per CPU data. And we allocate memory for per CPU data + * according to multiple this struct size and pcpu number. + * + * +-------------------+------------------+---+------------------+ + * | percpu for pcpu0 | percpu for pcpu1 |...| percpu for pcpuX | + * +-------------------+------------------+---+------------------+ + * ^ ^ + * | | + * + * + * To access per cpu data, we use: + * per_cpu_base_ptr + sizeof(struct per_cpu_region) * curr_pcpu_id + * + offset_of_member_per_cpu_region + * to locate the per cpu data. + */ + +/* Boot CPU ID */ +#define BSP_CPU_ID 0U + +/** + *The invalid cpu_id (INVALID_CPU_ID) is error + *code for error handling, this means that + *caller can't find a valid physical cpu + *or virtual cpu. + */ +#define INVALID_CPU_ID 0xffffU +/** + *The broadcast id (BROADCAST_CPU_ID) + *used to notify all valid phyiscal cpu + *or virtual cpu. + */ +#define BROADCAST_CPU_ID 0xfffeU + +struct descriptor_table { + uint16_t limit; + uint64_t base; +} __packed; + +/* CPU states defined */ +enum pcpu_boot_state { + PCPU_STATE_RESET = 0U, + PCPU_STATE_INITIALIZING, + PCPU_STATE_RUNNING, + PCPU_STATE_HALTED, + PCPU_STATE_DEAD, +}; + +#define NEED_OFFLINE (1U) +#define NEED_SHUTDOWN_VM (2U) +void make_pcpu_offline(uint16_t pcpu_id); +bool need_offline(uint16_t pcpu_id); + +struct segment_sel { + uint16_t selector; + uint64_t base; + uint32_t limit; + uint32_t attr; +}; +#else /* ASSEMBLER defined */ + +#endif /* ASSEMBLER defined */ + +#endif /* CPU_H */ diff --git a/src/components/implementation/simple_vmm/nf_multicore/cpu_caps.h b/src/components/implementation/simple_vmm/nf_multicore/cpu_caps.h new file mode 100644 index 0000000000..466a024840 --- /dev/null +++ b/src/components/implementation/simple_vmm/nf_multicore/cpu_caps.h @@ -0,0 +1,68 @@ +/* + * Copyright (C) 2018-2022 Intel Corporation. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef CPUINFO_H +#define CPUINFO_H + +#define MAX_PSTATE 20U /* max num of supported Px count */ +#define MAX_CSTATE 8U /* max num of supported Cx count */ +/* We support MAX_CSTATE num of Cx, means have (MAX_CSTATE - 1) Cx entries, + * i.e. supported Cx entry index range from 1 to MAX_CX_ENTRY. + */ +#define MAX_CX_ENTRY (MAX_CSTATE - 1U) + +/* CPUID feature words */ +#define FEAT_1_ECX 0U /* CPUID[1].ECX */ +#define FEAT_1_EDX 1U /* CPUID[1].EDX */ +#define FEAT_7_0_EBX 2U /* CPUID[EAX=7,ECX=0].EBX */ +#define FEAT_7_0_ECX 3U /* CPUID[EAX=7,ECX=0].ECX */ +#define FEAT_7_0_EDX 4U /* CPUID[EAX=7,ECX=0].EDX */ +#define FEAT_8000_0001_ECX 5U /* CPUID[8000_0001].ECX */ +#define FEAT_8000_0001_EDX 6U /* CPUID[8000_0001].EDX */ +#define FEAT_8000_0007_EDX 7U /* CPUID[8000_0007].EDX */ +#define FEAT_8000_0008_EBX 8U /* CPUID[8000_0008].EBX */ +#define FEAT_D_0_EAX 9U /* CPUID[D][0].EAX */ +#define FEAT_D_0_EDX 10U /* CPUID[D][0].EDX */ +#define FEAT_D_1_EAX 11U /* CPUID[D][1].EAX */ +#define FEAT_D_1_ECX 13U /* CPUID[D][1].ECX */ +#define FEAT_D_1_EDX 14U /* CPUID[D][1].EDX */ +#define FEAT_7_2_EDX 15U /* CPUID[EAX=7,ECX=2].EDX */ +#define FEATURE_WORDS 16U + +struct cpuinfo_x86 { + /* SDM 2-2 Vol.4 Table 2-1 uses DisplayFamily_DisplayModel to + * distinguish Processor Families/Processor Number Series. + */ + uint8_t displayfamily, displaymodel; + uint8_t virt_bits; + uint8_t phys_bits; + uint32_t cpuid_level; + uint32_t extended_cpuid_level; + uint64_t physical_address_mask; + uint32_t cpuid_leaves[FEATURE_WORDS]; + char model_name[64]; +}; + +bool has_monitor_cap(void); +bool disable_host_monitor_wait(void); +bool is_apl_platform(void); +bool pcpu_has_cap(uint32_t bit); +bool pcpu_has_vmx_ept_vpid_cap(uint64_t bit_mask); +bool is_apl_platform(void); +bool has_core_cap(uint32_t bit_mask); +bool is_ac_enabled(void); +bool is_gp_enabled(void); +void init_pcpu_capabilities(void); +void init_pcpu_model_name(void); +int32_t detect_hardware_support(void); +struct cpuinfo_x86 *get_pcpu_info(void); + +/* The bits of MSR IA32_CORE_CAPABILITIES */ +#define CORE_CAP_SPLIT_LOCK (1U << 5U) /* support #AC for Split-locked Access */ +#define CORE_CAP_UC_LOCK (1U << 4U) /* support #GP for non-guaranteed-atomic-locked access at Non-WB memory */ + + +#endif /* CPUINFO_H */ diff --git a/src/components/implementation/simple_vmm/nf_multicore/cpuid.h b/src/components/implementation/simple_vmm/nf_multicore/cpuid.h new file mode 100644 index 0000000000..cd6bfa93ad --- /dev/null +++ b/src/components/implementation/simple_vmm/nf_multicore/cpuid.h @@ -0,0 +1,186 @@ +/* + * Copyright (C) 2018-2022 Intel Corporation. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +/* +* cpuid.h +* +* Created on: Jan 4, 2018 +* Author: don +*/ + +#ifndef CPUID_H_ +#define CPUID_H_ + +/* CPUID bit definitions */ +#define CPUID_ECX_SSE3 (1U<<0U) +#define CPUID_ECX_PCLMUL (1U<<1U) +#define CPUID_ECX_DTES64 (1U<<2U) +#define CPUID_ECX_MONITOR (1U<<3U) +#define CPUID_ECX_DS_CPL (1U<<4U) +#define CPUID_ECX_VMX (1U<<5U) +#define CPUID_ECX_SMX (1U<<6U) +#define CPUID_ECX_EST (1U<<7U) +#define CPUID_ECX_TM2 (1U<<8U) +#define CPUID_ECX_SSSE3 (1U<<9U) +#define CPUID_ECX_CID (1U<<10U) +#define CPUID_ECX_SDBG (1U<<11U) +#define CPUID_ECX_FMA (1U<<12U) +#define CPUID_ECX_CX16 (1U<<13U) +#define CPUID_ECX_ETPRD (1U<<14U) +#define CPUID_ECX_PDCM (1U<<15U) +#define CPUID_ECX_DCA (1U<<18U) +#define CPUID_ECX_SSE4_1 (1U<<19U) +#define CPUID_ECX_SSE4_2 (1U<<20U) +#define CPUID_ECX_x2APIC (1U<<21U) +#define CPUID_ECX_MOVBE (1U<<22U) +#define CPUID_ECX_POPCNT (1U<<23U) +#define CPUID_ECX_AES (1U<<25U) +#define CPUID_ECX_XSAVE (1U<<26U) +#define CPUID_ECX_OSXSAVE (1U<<27U) +#define CPUID_ECX_AVX (1U<<28U) +#define CPUID_ECX_HV (1U<<31U) +#define CPUID_ECX_MWAIT (1U<<0U) +#define CPUID_ECX_MWAIT_INT (1U<<1U) +#define CPUID_EDX_FPU (1U<<0U) +#define CPUID_EDX_VME (1U<<1U) +#define CPUID_EDX_DE (1U<<2U) +#define CPUID_EDX_PSE (1U<<3U) +#define CPUID_EDX_TSC (1U<<4U) +#define CPUID_EDX_MSR (1U<<5U) +#define CPUID_EDX_PAE (1U<<6U) +#define CPUID_EDX_MCE (1U<<7U) +#define CPUID_EDX_CX8 (1U<<8U) +#define CPUID_EDX_APIC (1U<<9U) +#define CPUID_EDX_SEP (1U<<11U) +#define CPUID_EDX_MTRR (1U<<12U) +#define CPUID_EDX_PGE (1U<<13U) +#define CPUID_EDX_MCA (1U<<14U) +#define CPUID_EDX_CMOV (1U<<15U) +#define CPUID_EDX_PAT (1U<<16U) +#define CPUID_EDX_PSE36 (1U<<17U) +#define CPUID_EDX_PSN (1U<<18U) +#define CPUID_EDX_CLF (1U<<19U) +#define CPUID_EDX_DTES (1U<<21U) +#define CPUID_EDX_ACPI (1U<<22U) +#define CPUID_EDX_MMX (1U<<23U) +#define CPUID_EDX_FXSR (1U<<24U) +#define CPUID_EDX_SSE (1U<<25U) +#define CPUID_EDX_SSE2 (1U<<26U) +#define CPUID_EDX_SS (1U<<27U) +#define CPUID_EDX_HTT (1U<<28U) +#define CPUID_EDX_TM1 (1U<<29U) +#define CPUID_EDX_IA64 (1U<<30U) +#define CPUID_EDX_PBE (1U<<31U) + +/* CPUID.06H:EAX.DTHERM */ +#define CPUID_EAX_DTHERM (1U<<0U) +/* CPUID.06H:EAX.HWP */ +#define CPUID_EAX_HWP (1U<<7U) +/* CPUID.06H:EAX.HWP_Notification */ +#define CPUID_EAX_HWP_N (1U<<8U) +/* CPUID.06H:EAX.HWP_Activity_Window */ +#define CPUID_EAX_HWP_AW (1U<<9U) +/* CPUID.06H:EAX.HWP_Energy_Performance_Preference */ +#define CPUID_EAX_HWP_EPP (1U<<10U) +/* CPUID.06H:EAX.HWP_Package_Level_Request */ +#define CPUID_EAX_HWP_PLR (1U<<11U) +/* CPUID.06H:ECX.Hardware_Coordination_Feedback_Capability */ +#define CPUID_ECX_HCFC (1U<<0U) +/* CPUID.07H:EBX.FSGSBASE*/ +#define CPUID_EBX_FSGSBASE (1U<<0U) +/* CPUID.07H:EBX.TSC_ADJUST*/ +#define CPUID_EBX_TSC_ADJ (1U<<1U) +/* CPUID.07H:EBX.SGX */ +#define CPUID_EBX_SGX (1U<<2U) +/* CPUID.07H:EBX.SMEP*/ +#define CPUID_EBX_SMEP (1U<<7U) +/* CPUID.07H:EBX.MPX */ +#define CPUID_EBX_MPX (1U<<14U) +/* CPUID.07H:EBX.SMAP*/ +#define CPUID_EBX_SMAP (1U<<20U) +/* CPUID.07H:ECX.UMIP */ +#define CPUID_ECX_UMIP (1U<<2U) +/* CPUID.07H:ECX.PKE */ +#define CPUID_ECX_PKE (1U<<3U) +/* CPUID.07H:ECX.WAITPKG */ +#define CPUID_ECX_WAITPKG (1U<<5U) +/* CPUID.07H:ECX.CET_SS */ +#define CPUID_ECX_CET_SS (1U<<7U) +/* CPUID.07H:ECX.LA57 */ +#define CPUID_ECX_LA57 (1U<<16U) +/* CPUID.07H:ECX.SGX_LC*/ +#define CPUID_ECX_SGX_LC (1U<<30U) +/* CPUID.07H:ECX.PKS*/ +#define CPUID_ECX_PKS (1U<<31U) +/* CPUID.07H:EDX.CET_IBT */ +#define CPUID_EDX_CET_IBT (1U<<20U) +/* CPUID.07H:EDX.IBRS_IBPB*/ +#define CPUID_EDX_IBRS_IBPB (1U<<26U) +/* CPUID.07H:EDX.STIBP*/ +#define CPUID_EDX_STIBP (1U<<27U) +/* CPUID.80000001H:EDX.Page1GB*/ +#define CPUID_EDX_PAGE1GB (1U<<26U) +/* CPUID.07H:EBX.INVPCID*/ +#define CPUID_EBX_INVPCID (1U<<10U) +/* CPUID.07H:EBX.PQM */ +#define CPUID_EBX_PQM (1U<<12U) +/* CPUID.07H:EBX.PQE */ +#define CPUID_EBX_PQE (1U<<15U) +/* CPUID.07H:EBX.INTEL_PROCESSOR_TRACE */ +#define CPUID_EBX_PROC_TRC (1U<<25U) +/* CPUID.01H:ECX.PCID*/ +#define CPUID_ECX_PCID (1U<<17U) +/* CPUID.0DH.EAX.XCR0_BNDREGS */ +#define CPUID_EAX_XCR0_BNDREGS (1U<<3U) +/* CPUID.0DH.EAX.XCR0_BNDCSR */ +#define CPUID_EAX_XCR0_BNDCSR (1U<<4U) +/* CPUID.0DH.ECX.CET_U_STATE */ +#define CPUID_ECX_CET_U_STATE (1U<<11U) +/* CPUID.0DH.ECX.CET_S_STATE */ +#define CPUID_ECX_CET_S_STATE (1U<<12U) +/* CPUID.12H.EAX.SGX1 */ +#define CPUID_EAX_SGX1 (1U<<0U) +/* CPUID.12H.EAX.SGX2 */ +#define CPUID_EAX_SGX2 (1U<<1U) +/* CPUID.19H.EBX.KL_AES_ENABLED */ +#define CPUID_EBX_KL_AES_EN (1U<<0U) +/* CPUID.19H.EBX.KL_BACKUP_MSR */ +#define CPUID_EBX_KL_BACKUP_MSR (1U<<4U) +/* CPUID.19H.ECX.KL_NOBACKUP */ +#define CPUID_ECX_KL_NOBACKUP (1U<<0U) +/* CPUID.19H.ECX.KL_RANDOM_KS */ +#define CPUID_ECX_KL_RANDOM_KS (1U<<1U) +/* CPUID.80000001H.EDX.XD_BIT_AVAILABLE */ +#define CPUID_EDX_XD_BIT_AVIL (1U<<20U) + +/* CPUID source operands */ +#define CPUID_VENDORSTRING 0U +#define CPUID_FEATURES 1U +#define CPUID_TLB 2U +#define CPUID_SERIALNUM 3U +#define CPUID_EXTEND_FEATURE 7U +#define CPUID_XSAVE_FEATURES 0xDU +#define CPUID_RDT_ALLOCATION 0x10U +#define CPUID_MAX_EXTENDED_FUNCTION 0x80000000U +#define CPUID_EXTEND_FUNCTION_1 0x80000001U +#define CPUID_EXTEND_FUNCTION_2 0x80000002U +#define CPUID_EXTEND_FUNCTION_3 0x80000003U +#define CPUID_EXTEND_FUNCTION_4 0x80000004U +#define CPUID_EXTEND_INVA_TSC 0x80000007U +#define CPUID_EXTEND_ADDRESS_SIZE 0x80000008U + +static inline void cpuid_subleaf(uint32_t leaf, uint32_t subleaf, + uint32_t *eax, uint32_t *ebx, + uint32_t *ecx, uint32_t *edx) +{ + /* Execute CPUID instruction and save results */ + asm volatile("cpuid":"=a"(*eax), "=b"(*ebx), + "=c"(*ecx), "=d"(*edx) + : "a" (leaf), "c" (subleaf) + : "memory"); +} + +#endif /* CPUID_H_ */ diff --git a/src/components/implementation/simple_vmm/nf_multicore/devices/serial/serial.c b/src/components/implementation/simple_vmm/nf_multicore/devices/serial/serial.c new file mode 100644 index 0000000000..41044b056d --- /dev/null +++ b/src/components/implementation/simple_vmm/nf_multicore/devices/serial/serial.c @@ -0,0 +1,56 @@ +#include "serial.h" + +static u8_t serial_data[0x08]; +static u8_t send_intr_enable = 0; + +void +serial_handler(u16_t port, int dir, int sz, struct vmrt_vm_vcpu *vcpu) +{ + assert(port <= SERIAL_PORT_MAX && port >= SERIAL_PORT_MIN); + assert(sz == IO_BYTE); + + if (dir == IO_IN) { + vcpu->shared_region->ax = serial_data[port - SERIAL_PORT_MIN]; + } else if (dir == IO_OUT) { + serial_data[port - SERIAL_PORT_MIN] = (u8_t)vcpu->shared_region->ax; + switch (port) + { + + case SERIAL_PORT1: + printc("%c", (u8_t)vcpu->shared_region->ax); + if (send_intr_enable) { + /* + * TODO: correctly handle serial output(eg: multiple vcpu case) and inject serial interrupt, + * with io apic, 34 is serial8250_interrupt vector. + */ +#if VMX_SUPPORT_POSTED_INTR + vlapic_set_intr(vcpu, 34, 0); +#else + lapic_intr_inject(vcpu, 34, 1); +#endif + serial_data[SERIAL_IIR - SERIAL_PORT_MIN] = 0x2; + serial_data[MODEM_STATUS_REGISTER - SERIAL_PORT_MIN] = 0x20; + serial_data[SERIAL_LSR - SERIAL_PORT_MIN] = 0x60; + } + break; + case SERIAL_IER: + if (0x2 & (u8_t)vcpu->shared_region->ax) { + send_intr_enable = 1; + } else { + send_intr_enable = 0; + } + break; + } + } else { + VM_PANIC(vcpu); + } + + return; +} + +static void __attribute__((constructor)) +init(void) +{ + memset(&serial_data, 0, sizeof(serial_data)); + serial_data[SERIAL_LSR - SERIAL_PORT_MIN] = 0x60; +} diff --git a/src/components/implementation/simple_vmm/nf_multicore/devices/serial/serial.h b/src/components/implementation/simple_vmm/nf_multicore/devices/serial/serial.h new file mode 100644 index 0000000000..46ac88dd1e --- /dev/null +++ b/src/components/implementation/simple_vmm/nf_multicore/devices/serial/serial.h @@ -0,0 +1,17 @@ +#pragma once +#include +#include + +/* Reference: https://www.lammertbies.nl/comm/info/serial-uart */ +#define SERIAL_PORT1 0x3F8 +#define SERIAL_IER 0x3F9 +#define SERIAL_IIR 0x3FA +#define SERIAL_LCR 0x3FB +#define SERIAL_MCR 0x3FC +#define SERIAL_LSR 0x3FD +#define MODEM_STATUS_REGISTER 0x3FE + +#define SERIAL_PORT_MIN SERIAL_PORT1 +#define SERIAL_PORT_MAX MODEM_STATUS_REGISTER + +void serial_handler(u16_t port, int dir, int sz, struct vmrt_vm_vcpu *vcpu); diff --git a/src/components/implementation/simple_vmm/nf_multicore/devices/vpci/virtio_net_io.c b/src/components/implementation/simple_vmm/nf_multicore/devices/vpci/virtio_net_io.c new file mode 100644 index 0000000000..268a43d980 --- /dev/null +++ b/src/components/implementation/simple_vmm/nf_multicore/devices/vpci/virtio_net_io.c @@ -0,0 +1,744 @@ +/*- + * Copyright (c) 2011 NetApp, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ +#include +#include +#include +#include "virtio_net_io.h" +#include "vpci.h" +#include "virtio_ring.h" +#include +#include +#include +#include +#include +#include +#include +#include + +/* TODO: remove this warning flag when virtio-net is done */ +#pragma GCC diagnostic ignored "-Wunused-but-set-variable" + +static struct virtio_net_io_reg virtio_net_regs; +static struct virtio_queue virtio_queues[2]; +struct virtio_vq_info virtio_net_vqs[VIRTIO_NET_MAXQ - 1]; + +static unsigned char icmp_reply[] = { + /* TODO: remove icmp reply and process nic input from nic component */ +}; + +static inline int +vq_ring_ready(struct virtio_vq_info *vq) +{ + return ((vq->flags & VQ_ALLOC) == VQ_ALLOC); +} + +static inline int +vq_has_descs(struct virtio_vq_info *vq) +{ + int ret = 0; + if (vq_ring_ready(vq) && vq->last_avail != vq->avail->idx) { + if (unlikely((u16_t)((unsigned int)vq->avail->idx - vq->last_avail) > vq->qsize)) { + printc("no valid descriptor\n"); + assert(0); + } + else + ret = 1; + } + return ret; + +} + +void * +paddr_guest2host(uintptr_t gaddr, struct vmrt_vm_comp *vm) +{ + void *va = GPA2HVA(gaddr, vm); + return va; +} + +#define roundup2(x, y) (((x)+((y)-1))&(~((y)-1))) +#define mb() ({ asm volatile("mfence" ::: "memory"); (void)0; }) + +static volatile int __intr = 0; + + +struct ps_lock intr_lock = {.o = 0}; + +void +check_intr(struct vmrt_vm_vcpu *vcpu) { + ps_lock_take(&intr_lock); + if (__intr) { + lapic_intr_inject(vcpu, 33, 0); + __intr = 0; + } + ps_lock_release(&intr_lock); +} + +void +vq_endchains(struct vmrt_vm_vcpu *vcpu, struct virtio_vq_info *vq, int used_all_avail) +{ + u16_t event_idx, new_idx, old_idx; + int intr; + + if (unlikely(!vq || !vq->used)) + return; + + __atomic_thread_fence(__ATOMIC_SEQ_CST); + + old_idx = vq->save_used; + vq->save_used = new_idx = vq->used->idx; + + intr = new_idx != old_idx && + !(vq->avail->flags & VRING_AVAIL_F_NO_INTERRUPT); + + if (intr) { + virtio_net_regs.header.ISR = 1; + /* TODO: 57 is virtio-net interrupt without io apic, 33 is with io apic */ +#if VMX_SUPPORT_POSTED_INTR + vlapic_set_intr(vcpu, 33, 0); +#else + ps_lock_take(&intr_lock); + __intr = 1; + ps_lock_release(&intr_lock); +#endif + } + +} + +static inline struct iovec * +rx_iov_trim(struct iovec *iov, int *niov, size_t tlen) +{ + struct iovec *riov; + + iov[0].iov_len -= tlen; + + iov[0].iov_base = (void *)((uintptr_t)iov[0].iov_base + tlen); + riov = &iov[0]; + + return riov; +} + +static void +virtio_vq_init(struct vmrt_vm_vcpu *vcpu, int nr_queue, u32_t pfn) +{ + struct virtio_vq_info *vq; + u64_t phys; + size_t size; + char *vb; + + vq = &virtio_net_vqs[nr_queue]; + vq->pfn = pfn; + phys = (u64_t)pfn << VRING_PAGE_BITS; + size = vring_size(vq->qsize, VIRTIO_PCI_VRING_ALIGN); + vb = paddr_guest2host(phys, vcpu->vm); + if (!vb) + goto error; + + /* First page(s) are descriptors... */ + vq->desc = (struct vring_desc *)vb; + vb += vq->qsize * sizeof(struct vring_desc); + + /* ... immediately followed by "avail" ring (entirely u16_t's) */ + vq->avail = (struct vring_avail *)vb; + vb += (2 + vq->qsize + 1) * sizeof(u16_t); + + /* Then it's rounded up to the next page... */ + vb = (char *)roundup2((uintptr_t)vb, VIRTIO_PCI_VRING_ALIGN); + + /* ... and the last page(s) are the used ring. */ + vq->used = (struct vring_used *)vb; + + /* Start at 0 when we use it. */ + vq->last_avail = 0; + vq->save_used = 0; + + /* Mark queue as allocated after initialization is complete. */ + mb(); + vq->flags = VQ_ALLOC; + vq->vcpu = vcpu; + + return; + +error: + vq->flags = 0; + printc("%s: vq enable failed\n", __func__); + assert(0); +} + +static inline int +_vq_record(int i, volatile struct vring_desc *vd, + struct iovec *iov, int n_iov, u16_t *flags, struct vmrt_vm_vcpu *vcpu) { + + void *host_addr; + + if (i >= n_iov) { + printc("Number of descs is more than iov slots\n"); + assert(0); + } + + host_addr = paddr_guest2host(vd->addr, vcpu->vm); + if (unlikely(!host_addr)) { + printc("Invalid host addr\n"); + assert(0); + } + iov[i].iov_base = host_addr; + iov[i].iov_len = vd->len; + if (unlikely(flags != NULL)) + flags[i] = vd->flags; + + return 0; +} + +static void +dump_packet(char *p, u16_t sz) +{ + for (int i = 0; i < sz; i++) { + if (i > 0 && (i % 8 == 0)) printc("\n"); + u8_t c = p[i]; + printc("%02x ", c); + } + printc("\n"); +} + +int +vq_getchain(struct vmrt_vm_vcpu *vcpu, struct virtio_vq_info *vq, u16_t *pidx, + struct iovec *iov, int n_iov, u16_t *flags) +{ + int i; + unsigned int ndesc, n_indir; + unsigned int idx, next; + + volatile struct vring_desc *vdir, *vindir, *vp; + /* + * Note: it's the responsibility of the guest not to + * update vq->avail->idx until all of the descriptors + * the guest has written are valid (including all their + * next fields and vd_flags). + * + * Compute (last_avail - idx) in integers mod 2**16. This is + * the number of descriptors the device has made available + * since the last time we updated vq->last_avail. + * + * We just need to do the subtraction as an unsigned int, + * then trim off excess bits. + */ + idx = vq->last_avail; + ndesc = (u16_t)((unsigned int)vq->avail->idx - idx); + if (unlikely(ndesc == 0)) + return 0; + if (unlikely(ndesc > vq->qsize)) { + printc("ndesc (%u) out of range, driver confused?\r\n", + (unsigned int)ndesc); + assert(0); + } + + /* + * Now count/parse "involved" descriptors starting from + * the head of the chain. + * + * To prevent loops, we could be more complicated and + * check whether we're re-visiting a previously visited + * index, but we just abort if the count gets excessive. + */ + *pidx = next = vq->avail->ring[idx & (vq->qsize - 1)]; + vq->last_avail++; + for (i = 0; i < VQ_MAX_DESCRIPTORS; next = vdir->next) { + if (next >= vq->qsize) { + printc("tx: descriptor index %u out of range, " + "driver confused?\r\n", + next); + assert(0); + } + vdir = &vq->desc[next]; + if (likely((vdir->flags & VRING_DESC_F_INDIRECT) == 0)) { + if (unlikely(_vq_record(i, vdir, iov, n_iov, flags, vcpu))) { + printc("mapping to host failed\r\n"); + assert(0); + } + i++; + } else { + printc("descriptor has forbidden INDIRECT flag, " + "driver confused?\r\n"); + assert(0); + } + if ((vdir->flags & VRING_DESC_F_NEXT) == 0) + return i; + } + + /* code should not come here */ + printc("descriptor loop? count > %d - driver confused?\r\n", i); + assert(0); + return -1; +} + +void +vq_relchain(struct virtio_vq_info *vq, u16_t idx, u32_t iolen) +{ + u16_t uidx, mask; + volatile struct vring_used *vuh; + volatile struct vring_used_elem *vue; + + /* + * Notes: + * - mask is N-1 where N is a power of 2 so computes x % N + * - vuh points to the "used" data shared with guest + * - vue points to the "used" ring entry we want to update + * - head is the same value we compute in vq_iovecs(). + * + * (I apologize for the two fields named idx; the + * virtio spec calls the one that vue points to, "id"...) + */ + mask = vq->qsize - 1; + vuh = vq->used; + + uidx = vuh->idx; + vue = &vuh->ring[uidx++ & mask]; + vue->id = idx; + vue->len = iolen; + vuh->idx = uidx; +} + +void +vq_retchain(struct virtio_vq_info *vq) +{ + vq->last_avail--; +} + +void +virtio_net_rcv_one_pkt(void *data, int pkt_len) +{ + struct iovec iov[VIRTIO_NET_MAXSEGS], *riov; + struct virtio_vq_info *vq; + struct vmrt_vm_vcpu *vcpu; + void *vrx; + int n; + u16_t idx; + int ret; + + vq = &virtio_net_vqs[VIRTIO_NET_RXQ]; + + vcpu = vq->vcpu; + + if (unlikely(!vq_has_descs(vq))) { + return; + } + + n = vq_getchain(vcpu, vq, &idx, iov, VIRTIO_NET_MAXSEGS, NULL); + + // if (unlikely (n < 1 || n >= VIRTIO_NET_MAXSEGS )) { + // printc("vtnet: virtio_net_tap_rx: vq_getchain = %d\n", n); + // assert(0); + // } + + vrx = iov[0].iov_base; + /* every packet needs to be proceeded by a virtio_net_rxhdr header space */ + riov = rx_iov_trim(iov, &n, sizeof(struct virtio_net_rxhdr)); + + // assert(iov[0].iov_len >= (size_t)pkt_len); + + // memcpy(iov[0].iov_base, data, pkt_len); + memcpy_fast(iov[0].iov_base, data, pkt_len); + + memset(vrx, 0, sizeof(struct virtio_net_rxhdr)); + + vq_relchain(vq, idx, pkt_len + sizeof(struct virtio_net_rxhdr)); + + vq_endchains(vcpu, vq, 1); + return; +} + +void +virtio_net_send_one_pkt(void *data, u16_t *pkt_len) +{ + struct virtio_vq_info *vq = &virtio_net_vqs[VIRTIO_NET_TXQ]; + struct iovec iov[VIRTIO_NET_MAXSEGS]; + struct vmrt_vm_vcpu *vcpu; + int i, n; + int plen, tlen; + u16_t idx; + + while (!vq_has_descs(vq)) { + *pkt_len = 0; + return; + // sched_thd_block(0); + } + vcpu = vq->vcpu; + + memset(&iov, 0, sizeof(iov)); + n = vq_getchain(vcpu, vq, &idx, iov, VIRTIO_NET_MAXSEGS, NULL); + if (unlikely(n < 1 || n >= VIRTIO_NET_MAXSEGS)) { + printc("vtnet: virtio_net_proctx: vq_getchain = %d\n", n); + assert(0); + } + + plen = 0; + tlen = iov[0].iov_len; + assert(n == 2); + + plen += iov[1].iov_len; + tlen += iov[1].iov_len; + + // memcpy(data, iov[1].iov_base, iov[1].iov_len); + memcpy_fast(data, iov[1].iov_base, iov[1].iov_len); + + *pkt_len = plen; + vq_relchain(vq, idx, tlen); + + vq_endchains(vcpu, vq, 1); + return; +} + +static void +virtio_net_outb(u32_t port_id, struct vmrt_vm_vcpu *vcpu) +{ + u8_t val = vcpu->shared_region->ax; + + switch (port_id) + { + case VIRTIO_NET_DEV_STATUS: + virtio_net_regs.header.dev_status = val; + break; + default: + VM_PANIC(vcpu); + break; + } + return; +} + +#define REAL_NIC 0 + +#if REAL_NIC +static u8_t virtio_net_mac[6] = {0x6c, 0xfe, 0x54, 0x40, 0x41, 0x01}; +#else +static u8_t virtio_net_mac[6] = {0x10, 0x10, 0x10, 0x10, 0x10, 0x11}; +#endif + +static void +virtio_net_inb(u32_t port_id, struct vmrt_vm_vcpu *vcpu) +{ + u32_t bdf = 0; + + switch (port_id) + { + case VIRTIO_NET_DEV_STATUS: + vcpu->shared_region->ax = virtio_net_regs.header.dev_status; + break; + case VIRTIO_NET_ISR: + vcpu->shared_region->ax = virtio_net_regs.header.ISR; + virtio_net_regs.header.ISR = 0; + break; + case VIRTIO_NET_STATUS: + vcpu->shared_region->ax = virtio_net_regs.config_reg.status; + break; + case VIRTIO_NET_STATUS_H: + vcpu->shared_region->ax = virtio_net_regs.config_reg.status >> 8; + break; + /* TODO: read mac address from virtio-net config space */ + case VIRTIO_NET_MAC: + vcpu->shared_region->ax = virtio_net_mac[0]; + break; + case VIRTIO_NET_MAC1: + vcpu->shared_region->ax = virtio_net_mac[1]; + break; + case VIRTIO_NET_MAC2: + vcpu->shared_region->ax = virtio_net_mac[2]; + break; + case VIRTIO_NET_MAC3: + vcpu->shared_region->ax = virtio_net_mac[3]; + break; + case VIRTIO_NET_MAC4: + vcpu->shared_region->ax = virtio_net_mac[4]; + break; + case VIRTIO_NET_MAC5: + vcpu->shared_region->ax = virtio_net_mac[5]; + break; + default: + VM_PANIC(vcpu); + break; + } +} + +static void +virtio_net_inw(u32_t port_id, struct vmrt_vm_vcpu *vcpu) +{ + switch (port_id) + { + case VIRTIO_NET_QUEUE_SIZE: + vcpu->shared_region->ax = virtio_queues[virtio_net_regs.header.queue_select].queue_sz; + break; + case VIRTIO_NET_QUEUE_SELECT: + vcpu->shared_region->ax = virtio_net_regs.header.queue_select; + break; + case VIRTIO_NET_QUEUE_NOTIFY: + VM_PANIC(vcpu); + vcpu->shared_region->ax = virtio_net_regs.header.queue_notify; + break; + default: + VM_PANIC(vcpu); + break; + } +} + +static void +virtio_net_outw(u32_t port_id, struct vmrt_vm_vcpu *vcpu) +{ + u16_t val = vcpu->shared_region->ax; + + switch (port_id) + { + case VIRTIO_NET_QUEUE_SELECT: + virtio_net_regs.header.queue_select = val; + break; + case VIRTIO_NET_QUEUE_NOTIFY: + if (val == VIRTIO_NET_TXQ) { + // sched_thd_yield(); + // sched_thd_wakeup(11); + } + virtio_net_regs.header.queue_notify = val; + break; + default: + VM_PANIC(vcpu); + break; + } +} + +static void +virtio_net_outl(u32_t port_id, struct vmrt_vm_vcpu *vcpu) +{ + u32_t val = vcpu->shared_region->ax; + u64_t tmp = val; + + switch (port_id) + { + case VIRTIO_NET_GUEST_FEATURES: + virtio_net_regs.header.guest_features = val; + break; + case VIRTIO_NET_QUEUE_ADDR: + virtio_queues[virtio_net_regs.header.queue_select].queue = (void *)tmp; + virtio_vq_init(vcpu, virtio_net_regs.header.queue_select, val); + break; + default: + VM_PANIC(vcpu); + break; + } + return; +} + +static void +virtio_net_inl(u32_t port_id, struct vmrt_vm_vcpu *vcpu) +{ + switch (port_id) + { + case VIRTIO_NET_DEV_FEATURES: + vcpu->shared_region->ax = virtio_net_regs.header.dev_features; + break; + case VIRTIO_NET_GUEST_FEATURES: + vcpu->shared_region->ax = virtio_net_regs.header.guest_features; + break; + case VIRTIO_NET_QUEUE_ADDR: + vcpu->shared_region->ax = virtio_net_regs.header.queue_addr; + break; + default: + VM_PANIC(vcpu); + break; + } +} + +void +virtio_net_handler(u16_t port, int dir, int sz, struct vmrt_vm_vcpu *vcpu) +{ + if (dir == IO_IN) { + switch (sz) + { + case IO_BYTE: + virtio_net_inb(port, vcpu); + break; + case IO_WORD: + virtio_net_inw(port, vcpu); + break; + case IO_LONG: + virtio_net_inl(port, vcpu); + break; + default: + VM_PANIC(vcpu); + } + } else { + switch (sz) + { + case IO_BYTE: + virtio_net_outb(port, vcpu); + break; + case IO_WORD: + virtio_net_outw(port, vcpu); + break; + case IO_LONG: + virtio_net_outl(port, vcpu); + break; + default: + VM_PANIC(vcpu); + } + } +} + +void +virtio_net_io_init(void) +{ + memset(&virtio_net_regs, 0, sizeof(virtio_net_regs)); + memset(&virtio_queues, 0, sizeof(virtio_queues)); + memset(&virtio_net_vqs, 0, sizeof(virtio_net_vqs)); + + virtio_net_regs.header.dev_features |= (1 << VIRTIO_NET_F_STATUS); + virtio_net_regs.header.dev_features |= (1 << VIRTIO_NET_F_MAC); + virtio_net_regs.config_reg.status = VIRTIO_NET_S_LINK_UP; + virtio_queues[0].queue_sz = VQ_MAX_DESCRIPTORS; + virtio_queues[1].queue_sz = VQ_MAX_DESCRIPTORS; + virtio_net_vqs[VIRTIO_NET_RX].qsize = VQ_MAX_DESCRIPTORS; + virtio_net_vqs[VIRTIO_NET_TX].qsize = VQ_MAX_DESCRIPTORS; +} + +struct tcp_udp_port +{ + u16_t src_port; + u16_t dst_port; +} __attribute__((packed)); + +void +virtio_tx_task(void *data) +{ + volatile struct virtio_vq_info *vq; + struct iovec iov[VIRTIO_NET_MAXSEGS]; + struct vmrt_vm_vcpu *vcpu; + int i, n; + int plen, tlen; + u16_t idx; + char *pkt; + struct netshmem_pkt_buf *tx_obj; + shm_bm_objid_t tx_pktid; + struct nf_pkt_meta_data buf; + + struct nf_session *session = NULL; + shm_bm_t tx_shmemd = 0; + u16_t svc_id = 0; + + struct iphdr *iphdr = NULL; + struct tcp_udp_port *port; + + vq = &virtio_net_vqs[VIRTIO_NET_TXQ]; + while (1) { + while (!vq_has_descs(vq)) { + shm_bm_objid_t first_objid; + struct netshmem_pkt_buf *first_obj; + struct netshmem_pkt_pri *first_obj_pri; + struct netshmem_meta_tuple *pkt_arr; + u8_t batch_ct; + + session = get_nf_session(0); + tx_shmemd = session->tx_shmemd; + + while (nf_tx_ring_buf_dequeue(&session->nf_tx_ring_buf, &buf)) { + batch_ct = 0; + first_obj = buf.obj; + first_objid = buf.objid; + first_obj_pri = netshmem_get_pri(first_obj); + pkt_arr = (struct netshmem_meta_tuple *)&first_obj_pri->pkt_arr; + first_obj_pri->batch_len = 0; + + pkt_arr[batch_ct].obj_id = buf.objid; + pkt_arr[batch_ct].pkt_len = buf.pkt_len; + batch_ct++; + while (batch_ct < 32 && nf_tx_ring_buf_dequeue(&session->nf_tx_ring_buf, &buf)) { + pkt_arr[batch_ct].obj_id = buf.objid; + pkt_arr[batch_ct].pkt_len = buf.pkt_len; + batch_ct++; + } + first_obj_pri->batch_len = batch_ct; + // printc("nic send in tx:%d, %u\n", batch_ct, cos_thdid()); + nic_send_packet_batch(first_objid); + } + + sched_thd_yield(); + } + + vcpu = vq->vcpu; + + memset(&iov, 0, sizeof(iov)); + + n = vq_getchain(vcpu, vq, &idx, iov, VIRTIO_NET_MAXSEGS, NULL); + if (unlikely(n < 1 || n >= VIRTIO_NET_MAXSEGS)) { + printc("vtnet: virtio_net_proctx: vq_getchain = %d\n", n); + assert(0); + } + + plen = 0; + tlen = iov[0].iov_len; + assert(n == 2); + + plen += iov[1].iov_len; + tlen += iov[1].iov_len; + + pkt = iov[1].iov_base; + + iphdr = (struct iphdr *) (pkt + ETH_HLEN); + port = (struct tcp_udp_port *)((char *)pkt + ETH_HLEN + iphdr->ihl * 4); + u16_t svc_id = ntohs(port->dst_port); + + session = get_nf_session(svc_id); + + tx_shmemd = session->tx_shmemd; + if (unlikely(!tx_shmemd)) { + svc_id = 0; + session = get_nf_session(svc_id); + tx_shmemd = session->tx_shmemd; + } + + // printc("tx shmemd:%p, %d\n", tx_shmemd, svc_id); + tx_obj = shm_bm_alloc_net_pkt_buf(tx_shmemd, &tx_pktid); + // printc("tx shmemd:%p, tx_obj:%p\n", tx_shmemd, tx_obj); + + if (likely(tx_obj != NULL)){ + buf.objid = tx_pktid; + buf.pkt_len = plen; + buf.obj = tx_obj; + + // memcpy(netshmem_get_data_buf(tx_obj), pkt, plen); + memcpy_fast(netshmem_get_data_buf(tx_obj), pkt, plen); + + if ((unlikely(!nf_tx_ring_buf_enqueue(&(session->nf_tx_ring_buf), &buf)))){ + shm_bm_free_net_pkt_buf(tx_obj); + } else { + // sched_thd_wakeup(session->tx_thd); + // sync_sem_give(&session->tx_sem); + } + } else { + printc("cannot allocate objects\n"); + assert(0); + } + + vq_relchain(vq, idx, tlen); + vq_endchains(vcpu, vq, 1); + } +} diff --git a/src/components/implementation/simple_vmm/nf_multicore/devices/vpci/virtio_net_io.h b/src/components/implementation/simple_vmm/nf_multicore/devices/vpci/virtio_net_io.h new file mode 100644 index 0000000000..ba50bb2b77 --- /dev/null +++ b/src/components/implementation/simple_vmm/nf_multicore/devices/vpci/virtio_net_io.h @@ -0,0 +1,144 @@ +#pragma once + +#include +#include + +#define VIRTIO_NET_IO_ADDR 0x4000 + +#define VIRTIO_NET_DEV_FEATURES (VIRTIO_NET_IO_ADDR + 0) +#define VIRTIO_NET_GUEST_FEATURES (VIRTIO_NET_IO_ADDR + 4) +#define VIRTIO_NET_QUEUE_ADDR (VIRTIO_NET_IO_ADDR + 8) +#define VIRTIO_NET_QUEUE_SIZE (VIRTIO_NET_IO_ADDR + 12) +#define VIRTIO_NET_QUEUE_SELECT (VIRTIO_NET_IO_ADDR + 14) +#define VIRTIO_NET_QUEUE_NOTIFY (VIRTIO_NET_IO_ADDR + 16) +#define VIRTIO_NET_DEV_STATUS (VIRTIO_NET_IO_ADDR + 18) +#define VIRTIO_NET_ISR (VIRTIO_NET_IO_ADDR + 19) + +#define VIRTIO_NET_MAC (VIRTIO_NET_IO_ADDR + 20) +#define VIRTIO_NET_MAC1 (VIRTIO_NET_IO_ADDR + 21) +#define VIRTIO_NET_MAC2 (VIRTIO_NET_IO_ADDR + 22) +#define VIRTIO_NET_MAC3 (VIRTIO_NET_IO_ADDR + 23) +#define VIRTIO_NET_MAC4 (VIRTIO_NET_IO_ADDR + 24) +#define VIRTIO_NET_MAC5 (VIRTIO_NET_IO_ADDR + 25) + +#define VIRTIO_NET_STATUS (VIRTIO_NET_IO_ADDR + 26) +#define VIRTIO_NET_STATUS_H (VIRTIO_NET_IO_ADDR + 27) + +#define VIRTIO_NET_F_CSUM (0) +#define VIRTIO_NET_F_GUEST_CSUM (1) +#define VIRTIO_NET_F_MAC (5) +#define VIRTIO_NET_F_GSO (6) +#define VIRTIO_NET_F_GUEST_TSO4 (7) +#define VIRTIO_NET_F_GUEST_TSO6 (8) +#define VIRTIO_NET_F_GUEST_ECN (9) +#define VIRTIO_NET_F_GUEST_UFO (10) +#define VIRTIO_NET_F_HOST_TSO4 (11) +#define VIRTIO_NET_F_HOST_TSO6 (12) +#define VIRTIO_NET_F_HOST_ECN (13) +#define VIRTIO_NET_F_HOST_UFO (14) +#define VIRTIO_NET_F_MRG_RXBUF (15) +#define VIRTIO_NET_F_STATUS (16) +#define VIRTIO_NET_F_CTRL_VQ (17) +#define VIRTIO_NET_F_CTRL_RX (18) +#define VIRTIO_NET_F_CTRL_VLAN (19) +#define VIRTIO_NET_F_GUEST_ANNOUNCE (21) + +#define VIRTIO_NET_RINGSZ 512 +#define VIRTIO_NET_MAXSEGS 32 +#define VQ_MAX_DESCRIPTORS 512 + +struct virtio_header { + u32_t dev_features; + u32_t guest_features; + u32_t queue_addr; + u16_t queue_size; + u16_t queue_select; + u16_t queue_notify; + u8_t dev_status; + u8_t ISR; +} __attribute__((packed)); + +struct virtio_queue { + u16_t queue_sz; + void *queue; +}; + +#define VIRTIO_NET_S_LINK_UP 1 +#define VIRTIO_NET_S_ANNOUNCE 2 + +#define VIRTIO_NET_RX 0 +#define VIRTIO_NET_TX 1 + +#define VIRTIO_NET_RXQ 0 +#define VIRTIO_NET_TXQ 1 +#define VIRTIO_NET_CTLQ 2 + +#define VIRTIO_NET_MAXQ 3 + +#define VRING_PAGE_BITS 12 +#define VIRTIO_PCI_VRING_ALIGN 4096 + +#define VQ_ALLOC 0x01 /* set once we have a pfn */ +#define VQ_BROKED 0x02 + +struct virtio_net_config { + u8_t mac[6]; + u16_t status; +} __attribute__((packed)); + +struct virtio_net_io_reg { + struct virtio_header header; + struct virtio_net_config config_reg; +} __attribute__((packed)); + +// struct iovec +// { +// void *iov_base; /* Pointer to data. */ +// size_t iov_len; /* Length of data. */ +// }; + +struct virtio_vq_info { + u16_t qsize; /* size of this queue (a power of 2) */ + void (*notify)(void *, struct virtio_vq_info *); + /* called instead of notify, if not NULL */ + + u16_t num; /* the num'th queue in the virtio_base */ + + u16_t flags; /* flags (see above) */ + u16_t last_avail; /* a recent value of avail->idx */ + u16_t save_used; /* saved used->idx; see vq_endchains */ + u16_t msix_idx; /* MSI-X index, or VIRTIO_MSI_NO_VECTOR */ + + u32_t pfn; /* PFN of virt queue (not shifted!) */ + + volatile struct vring_desc *desc; + /* descriptor array */ + volatile struct vring_avail *avail; + /* the "avail" ring */ + volatile struct vring_used *used; + /* the "used" ring */ + + u32_t gpa_desc[2]; /* gpa of descriptors */ + u32_t gpa_avail[2]; /* gpa of avail_ring */ + u32_t gpa_used[2]; /* gpa of used_ring */ + int enabled; /* whether the virtqueue is enabled */ + + /* each vq is bounded to a vcpu */ + struct vmrt_vm_vcpu *vcpu; +}; + +/* + * Fixed network header size + */ +struct virtio_net_rxhdr { + u8_t vrh_flags; + u8_t vrh_gso_type; + u16_t vrh_hdr_len; + u16_t vrh_gso_size; + u16_t vrh_csum_start; + u16_t vrh_csum_offset; +} __attribute__((packed)); + +void virtio_net_handler(u16_t port, int dir, int sz, struct vmrt_vm_vcpu *vcpu); +void virtio_net_rcv_one_pkt(void *data, int pkt_len); +void virtio_net_send_one_pkt(void *data, u16_t *pkt_len); diff --git a/src/components/implementation/simple_vmm/nf_multicore/devices/vpci/virtio_net_vpci.c b/src/components/implementation/simple_vmm/nf_multicore/devices/vpci/virtio_net_vpci.c new file mode 100644 index 0000000000..c1c8846def --- /dev/null +++ b/src/components/implementation/simple_vmm/nf_multicore/devices/vpci/virtio_net_vpci.c @@ -0,0 +1,51 @@ +#include "vpci.h" + +#define VIRTIO_VENDOR_ID 0x1AF4 +#define VIRTIO_NETWORK_DEV_ID 0x1000 +#define VIRTIO_CLASS_NETWORK 0x02 +#define VIRTIO_TYPE_NET 1 + +struct vpci_config_type0 virtio_net_dev = { + .header.vendor_id = VIRTIO_VENDOR_ID, + .header.device_id = VIRTIO_NETWORK_DEV_ID, + .header.command = 0, + .header.status = 0, + .header.revision_id = 0, + .header.prog_if = 0, + .header.subclass = 0, + .header.class_code = VIRTIO_CLASS_NETWORK, + .header.cache_line_sz = 0, + .header.latency_timer = 0, + .header.header_type = PCI_HDR_TYPE_DEV, + .header.BIST = 0, + + /* Legacy virtio-net only uses bar 0, and it should be a IO bar, no capability is supported */ + .bars[0].io_bar.fixed_bit = 1, + .bars[0].io_bar.reserved = 0, + .bars[0].io_bar.base_addr = 0x1000, + + + .bars[1].raw_data = 0, + .bars[2].raw_data = 0, + .bars[3].raw_data = 0, + .bars[4].raw_data = 0, + .bars[5].raw_data = 0, + + .cardbus_cis_pointer = 0, + .subsystem_vendor_id = VIRTIO_VENDOR_ID, + .subsystem_id = VIRTIO_TYPE_NET, + .exp_rom_base = 0, + .cap_pointer = 0, + .reserved = 0, + .interrupt_line = 0, + .interrupt_pin = 0, + .min_grant = 0, + .max_lentency = 0 +}; + +void +virtio_net_dev_init(void){ + vpci_regist((struct vpci_config_space *)&virtio_net_dev, sizeof(virtio_net_dev)); + extern void virtio_net_io_init(void); + virtio_net_io_init(); +} diff --git a/src/components/implementation/simple_vmm/nf_multicore/devices/vpci/virtio_ring.h b/src/components/implementation/simple_vmm/nf_multicore/devices/vpci/virtio_ring.h new file mode 100644 index 0000000000..f03125851b --- /dev/null +++ b/src/components/implementation/simple_vmm/nf_multicore/devices/vpci/virtio_ring.h @@ -0,0 +1,260 @@ +#ifndef _LINUX_VIRTIO_RING_H +#define _LINUX_VIRTIO_RING_H +/* An interface for efficient virtio implementation, currently for use by KVM, + * but hopefully others soon. Do NOT change this since it will + * break existing servers and clients. + * + * This header is BSD licensed so anyone can use the definitions to implement + * compatible drivers/servers. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of IBM nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL IBM OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * Copyright Rusty Russell IBM Corporation 2007. */ + +typedef unsigned short int __virtio16; +typedef unsigned int __virtio32; +typedef unsigned long long __virtio64; + +typedef short int __le16; +typedef short int __be16; +typedef unsigned int __le32; +typedef unsigned int __be32; +typedef unsigned long long __le64; +typedef unsigned long long __be64; + +typedef char __s8; +typedef unsigned char __u8; + +typedef short __s16; +typedef unsigned short __u16; + +typedef int __s32; +typedef unsigned int __u32; + +typedef unsigned long int uintptr_t; + +/* This marks a buffer as continuing via the next field. */ +#define VRING_DESC_F_NEXT 1 +/* This marks a buffer as write-only (otherwise read-only). */ +#define VRING_DESC_F_WRITE 2 +/* This means the buffer contains a list of buffer descriptors. */ +#define VRING_DESC_F_INDIRECT 4 + +/* + * Mark a descriptor as available or used in packed ring. + * Notice: they are defined as shifts instead of shifted values. + */ +#define VRING_PACKED_DESC_F_AVAIL 7 +#define VRING_PACKED_DESC_F_USED 15 + +/* The Host uses this in used->flags to advise the Guest: don't kick me when + * you add a buffer. It's unreliable, so it's simply an optimization. Guest + * will still kick if it's out of buffers. */ +#define VRING_USED_F_NO_NOTIFY 1 +/* The Guest uses this in avail->flags to advise the Host: don't interrupt me + * when you consume a buffer. It's unreliable, so it's simply an + * optimization. */ +#define VRING_AVAIL_F_NO_INTERRUPT 1 + +/* Enable events in packed ring. */ +#define VRING_PACKED_EVENT_FLAG_ENABLE 0x0 +/* Disable events in packed ring. */ +#define VRING_PACKED_EVENT_FLAG_DISABLE 0x1 +/* + * Enable events for a specific descriptor in packed ring. + * (as specified by Descriptor Ring Change Event Offset/Wrap Counter). + * Only valid if VIRTIO_RING_F_EVENT_IDX has been negotiated. + */ +#define VRING_PACKED_EVENT_FLAG_DESC 0x2 + +/* + * Wrap counter bit shift in event suppression structure + * of packed ring. + */ +#define VRING_PACKED_EVENT_F_WRAP_CTR 15 + +/* We support indirect buffer descriptors */ +#define VIRTIO_RING_F_INDIRECT_DESC 28 + +/* The Guest publishes the used index for which it expects an interrupt + * at the end of the avail ring. Host should ignore the avail->flags field. */ +/* The Host publishes the avail index for which it expects a kick + * at the end of the used ring. Guest should ignore the used->flags field. */ +#define VIRTIO_RING_F_EVENT_IDX 29 + +/* Alignment requirements for vring elements. + * When using pre-virtio 1.0 layout, these fall out naturally. + */ +#define VRING_AVAIL_ALIGN_SIZE 2 +#define VRING_USED_ALIGN_SIZE 4 +#define VRING_DESC_ALIGN_SIZE 16 + +/* Virtio ring descriptors: 16 bytes. These can chain together via "next". */ +struct vring_desc { + /* Address (guest-physical). */ + __virtio64 addr; + /* Length. */ + __virtio32 len; + /* The flags as indicated above. */ + __virtio16 flags; + /* We chain unused descriptors via this, too */ + __virtio16 next; +}; + +struct vring_avail { + __virtio16 flags; + __virtio16 idx; + __virtio16 ring[]; +}; + +/* u32 is used here for ids for padding reasons. */ +struct vring_used_elem { + /* Index of start of used descriptor chain. */ + __virtio32 id; + /* Total length of the descriptor chain which was used (written to) */ + __virtio32 len; +}; + +typedef struct vring_used_elem __attribute__((aligned(VRING_USED_ALIGN_SIZE))) + vring_used_elem_t; + +struct vring_used { + __virtio16 flags; + __virtio16 idx; + vring_used_elem_t ring[]; +}; + +/* + * The ring element addresses are passed between components with different + * alignments assumptions. Thus, we might need to decrease the compiler-selected + * alignment, and so must use a typedef to make sure the aligned attribute + * actually takes hold: + * + * https://gcc.gnu.org/onlinedocs//gcc/Common-Type-Attributes.html#Common-Type-Attributes + * + * When used on a struct, or struct member, the aligned attribute can only + * increase the alignment; in order to decrease it, the packed attribute must + * be specified as well. When used as part of a typedef, the aligned attribute + * can both increase and decrease alignment, and specifying the packed + * attribute generates a warning. + */ +typedef struct vring_desc __attribute__((aligned(VRING_DESC_ALIGN_SIZE))) + vring_desc_t; +typedef struct vring_avail __attribute__((aligned(VRING_AVAIL_ALIGN_SIZE))) + vring_avail_t; +typedef struct vring_used __attribute__((aligned(VRING_USED_ALIGN_SIZE))) + vring_used_t; + +struct vring { + unsigned int num; + + vring_desc_t *desc; + + vring_avail_t *avail; + + vring_used_t *used; +}; + +#ifndef VIRTIO_RING_NO_LEGACY + +/* The standard layout for the ring is a continuous chunk of memory which looks + * like this. We assume num is a power of 2. + * + * struct vring + * { + * // The actual descriptors (16 bytes each) + * struct vring_desc desc[num]; + * + * // A ring of available descriptor heads with free-running index. + * __virtio16 avail_flags; + * __virtio16 avail_idx; + * __virtio16 available[num]; + * __virtio16 used_event_idx; + * + * // Padding to the next align boundary. + * char pad[]; + * + * // A ring of used descriptor heads with free-running index. + * __virtio16 used_flags; + * __virtio16 used_idx; + * struct vring_used_elem used[num]; + * __virtio16 avail_event_idx; + * }; + */ +/* We publish the used event index at the end of the available ring, and vice + * versa. They are at the end for backwards compatibility. */ +#define vring_used_event(vr) ((vr)->avail->ring[(vr)->num]) +#define vring_avail_event(vr) (*(__virtio16 *)&(vr)->used->ring[(vr)->num]) + +static __inline__ void vring_init(struct vring *vr, unsigned int num, void *p, + unsigned long align) +{ + vr->num = num; + vr->desc = p; + vr->avail = (struct vring_avail *)((char *)p + num * sizeof(struct vring_desc)); + vr->used = (void *)(((uintptr_t)&vr->avail->ring[num] + sizeof(__virtio16) + + align-1) & ~(align - 1)); +} + +static __inline__ unsigned vring_size(unsigned int num, unsigned long align) +{ + return ((sizeof(struct vring_desc) * num + sizeof(__virtio16) * (3 + num) + + align - 1) & ~(align - 1)) + + sizeof(__virtio16) * 3 + sizeof(struct vring_used_elem) * num; +} + +#endif /* VIRTIO_RING_NO_LEGACY */ + +/* The following is used with USED_EVENT_IDX and AVAIL_EVENT_IDX */ +/* Assuming a given event_idx value from the other side, if + * we have just incremented index from old to new_idx, + * should we trigger an event? */ +static __inline__ int vring_need_event(__u16 event_idx, __u16 new_idx, __u16 old) +{ + /* Note: Xen has similar logic for notification hold-off + * in include/xen/interface/io/ring.h with req_event and req_prod + * corresponding to event_idx + 1 and new_idx respectively. + * Note also that req_event and req_prod in Xen start at 1, + * event indexes in virtio start at 0. */ + return (__u16)(new_idx - event_idx - 1) < (__u16)(new_idx - old); +} + +struct vring_packed_desc_event { + /* Descriptor Ring Change Event Offset/Wrap Counter. */ + __le16 off_wrap; + /* Descriptor Ring Change Event Flags. */ + __le16 flags; +}; + +struct vring_packed_desc { + /* Buffer Address. */ + __le64 addr; + /* Buffer Length. */ + __le32 len; + /* Buffer ID. */ + __le16 id; + /* The flags depending on descriptor type. */ + __le16 flags; +}; +#endif /* _LINUX_VIRTIO_RING_H */ diff --git a/src/components/implementation/simple_vmm/nf_multicore/devices/vpci/vpci.c b/src/components/implementation/simple_vmm/nf_multicore/devices/vpci/vpci.c new file mode 100644 index 0000000000..e1571dc17b --- /dev/null +++ b/src/components/implementation/simple_vmm/nf_multicore/devices/vpci/vpci.c @@ -0,0 +1,316 @@ +#include +#include +#include "vpci.h" + +/* Only two are supported: one bridge pci and one virtio-net pci */ +#define MAX_VPCI_NUM 2 + +#define PCI_HOST_BRIDGE_VENDOR 0x8086 +#define PCI_HOST_BRIDGE_DEV 0x29C0 +#define PCI_CLASS_BRIDGE 0x06 +#define PCI_SUBCLASS_BRIDGE_HOST 0x00 + +struct vpci_config_space vpci_devs[MAX_VPCI_NUM]; +static u8_t free_dev = 0; + +struct vpci_config_type1 vpci_host_bridge = { + .header.vendor_id = PCI_HOST_BRIDGE_VENDOR, + .header.device_id = PCI_HOST_BRIDGE_DEV, + .header.command = 0, + .header.status = 0, + .header.revision_id = 0, + .header.prog_if = 0, + .header.subclass = PCI_SUBCLASS_BRIDGE_HOST, + .header.class_code = PCI_CLASS_BRIDGE, + .header.cache_line_sz = 0, + .header.latency_timer = 0, + .header.header_type = PCI_HDR_TYPE_BRIDGE, + .header.BIST = 0, + + .bars[0].raw_data = 0, + .bars[1].raw_data = 0, + + .primary_bus_number = 0, + .secondary_bus_number = 0, + .subordinate_bus_number = 0, + .secondary_latency_timer = 0, + .io_base = 0, + .io_limit = 0, + .secondary_status = 0, + .memory_base = 0, + .memory_limit = 0, + .prefetchable_memory_base = 0, + .prefetchable_memory_limit = 0, + .prefetchable_base_upper_32_bits = 0, + .prefetchable_limit_upper_32_bits = 0, + .io_base_upper_16_bits = 0, + .io_limit_upper_16_bits = 0, + .capability_pointer = 0, + .reserved = 0, + .expansion_rom_base_address = 0, + .interrupt_line = 0, + .interrupt_pin = 0, + .bridge_control = 0 +}; + +void +vpci_regist(struct vpci_config_space *vpci, u32_t sz) +{ + memcpy(&vpci_devs[free_dev++], vpci, sz); +} + +void +set_vpci_comm_hdr(u8_t* raw_data, u8_t reg, u32_t val) +{ + switch (reg) + { + /* TODO: implement necessary pci write emulations */ + case OFFSET_COMMAND: + break; + case OFFSET_CACHE_LINE_SZ: + break; + case OFFSET_LATENCY_TIMER: + break; + case OFFSET_STATUS: + /* Linux writes 0xFFFF to clear errors, thus ignore it */ + break; + default: + printc("trying to write RO reg:0x%x, val:0x%x", reg, val); + assert(0); + } +} + +void +set_vpci_bar(u8_t* raw_data, u8_t reg, u32_t val) +{ + u32_t bar0; + + switch (reg) + { + case OFFSET_BAR0: + bar0 = *(u32_t *)raw_data; + if (bar0 & 0x1) { /* IO bar */ + /* mask all bits that should not be writable */ + val = val & 0xFFFFC000; + val |= 0x1; + *(u32_t *)raw_data = val; + } else { /* Mem bar */ + /* Currently don't support IO bar */ + printc("no vpci bar\n"); + assert(0); + } + + break; + /* Currently only support one bar, other bars are ignored */ + case OFFSET_BAR1: + break; + case OFFSET_BAR2: + break; + case OFFSET_BAR3: + break; + case OFFSET_BAR4: + break; + case OFFSET_BAR5: + break; + default: + printc("trying to write RO reg:0x%x, val:0x%x", reg, val); + assert(0); + } +} + +void +set_vpci_host_bridge_reg(u8_t *raw_data, u8_t reg, u32_t val, u8_t sz) +{ + if (reg < OFFSET_BAR0) { + set_vpci_comm_hdr(raw_data, reg, val); + return; + } + + if (reg < OFFSET_PRIMARY_BUS_NUM) { + /* transparent bridge, ignore the write */ + return; + } + + switch (reg) + { + case OFFSET_PRIMARY_BUS_NUM: + *raw_data = (u8_t) val; + break; + case OFFSET_SECONDARY_BUS_NUMBER: + *raw_data = (u8_t) val; + break; + case OFFSET_SUBORDINATE_BUS_NUMBER: + *raw_data = (u8_t) val; + break; + case OFFSET_SECONDARY_LATENCY_TIMER: + /* Currently ignore this */ + break; + case OFFSET_IO_BASE: + /* this bridge won't support IO base */ + break; + case OFFSET_IO_LIMIT: + /* this bridge won't support IO base */ + assert(0); + break; + case OFFSET_SECONDARY_STATUS: + assert(0); + break; + case OFFSET_MEMORY_BASE: + /* Currently ignore this */ + break; + case OFFSET_MEMORY_LIMIT: + assert(0); + break; + case OFFSET_PREFETCHABLE_MEMORY_BASE: + /* Currently ignore this */ + break; + case OFFSET_PREFETCHABLE_MEMORY_LIMIT: + printc("trying to write RO reg:0x%x, val:0x%x", reg, val); + assert(0); + break; + case OFFSET_PREFETCHABLE_BASE_UPPER_32_BITS: + /* Currently ignore this */ + break; + case OFFSET_PREFETCHABLE_LIMIT_UPPER_32_BITS: + /* Currently ignore this */ + break; + case OFFSET_IO_BASE_UPPER_16_BITS: + /* Currently ignore this */ + break; + case OFFSET_IO_LIMIT_UPPER_16_BITS: + assert(0); + break; + case OFFSET_CAPABILITY_POINTER: + assert(0); + break; + case OFFSET_EXPANSION_ROM_BASE_ADDRESS: + /* Ingore this, we don't support EXP ROM */ + break; + case OFFSET_INTERRUPT_LINE: + assert(0); + break; + case OFFSET_INTERRUPT_PIN: + assert(0); + break; + case OFFSET_BRIDGE_CONTROL: + /* Currently ignore this */ + break; + default: + assert(0); + } +} + +void +set_vpci_dev_reg(u8_t* raw_data, u8_t reg, u32_t val, u8_t sz) +{ + if (reg < OFFSET_BAR0) { + set_vpci_comm_hdr(raw_data, reg, val); + return; + } + + if (reg < OFFSET_CARDBUS_CIS_POINTER) { + set_vpci_bar(raw_data, reg, val); + return; + } + switch (reg) + { + case OFFSET_CARDBUS_CIS_POINTER: + assert(0); + break; + case OFFSET_SUBSYSTEM_VENDOR_ID: + assert(0); + break; + case OFFSET_SUBSYSTEM_ID: + assert(0); + break; + case OFFSET_EXP_ROM_BASE: + /* Currently ignore this */ + break; + case OFFSET_CAP_POINTER: + assert(0); + break; + case OFFSET_RESERVED: + assert(0); + break; + case OFFSET_INTERRUPT_LINE: + assert(0); + break; + case OFFSET_INTERRUPT_PIN: + assert(0); + break; + case OFFSET_MIN_GRANT: + assert(0); + break; + case OFFSET_MAX_LENTENCY: + assert(0); + break; + default: + assert(0); + } +} + +void +set_vpci_reg(u32_t bdf, u32_t val, u8_t idx, u8_t sz) +{ + struct vpci_bdf vbdf; + u8_t index; + struct vpci_config_space *vpci; + u8_t *raw_data; + u8_t reg; + + assert(idx < 4 && sz > 0 && sz < 4); + + memcpy(&vbdf, &bdf, sizeof(vbdf)); + + index = vbdf.bus_num + vbdf.dev_num; + if (vbdf.bus_num > 0 || vbdf.dev_num > 1) return; + + vpci = &vpci_devs[index]; + + raw_data = (u8_t *)(vpci) + vbdf.reg_offset; + + raw_data += idx; + reg = vbdf.reg_offset + idx; + + switch (index) + { + case 0: + /* Process host bridge */ + set_vpci_host_bridge_reg(raw_data, reg, val, sz); + break; + + case 1: + /* Process with device */ + set_vpci_dev_reg(raw_data, reg, val, sz); + break; + default: + assert(0); + } +} + +u32_t +get_vpci_reg(u32_t bdf) +{ + struct vpci_bdf vbdf; + struct vpci_config_space *vpci; + u8_t index; + + memcpy(&vbdf, &bdf, sizeof(vbdf)); + index = vbdf.bus_num + vbdf.dev_num; + + if (vbdf.bus_num > 0 || vbdf.dev_num > 1) return 0XFFFFFFFF; + + vpci = &vpci_devs[index]; + + return *(u32_t *)((char *)(vpci) + vbdf.reg_offset); +} + +extern void virtio_net_dev_init(void); + +static void __attribute__((constructor)) +init(void) +{ + memset(&vpci_devs, 0, sizeof(vpci_devs)); + vpci_regist((struct vpci_config_space *)&vpci_host_bridge, sizeof(vpci_host_bridge)); + virtio_net_dev_init(); +} diff --git a/src/components/implementation/simple_vmm/nf_multicore/devices/vpci/vpci.h b/src/components/implementation/simple_vmm/nf_multicore/devices/vpci/vpci.h new file mode 100644 index 0000000000..6bfcdf004b --- /dev/null +++ b/src/components/implementation/simple_vmm/nf_multicore/devices/vpci/vpci.h @@ -0,0 +1,180 @@ +#pragma once + +#include +#include + +#define VPCI_CONFIG_ADDRESS 0xCF8 +#define VPCI_CONFIG_DATA0 0xCFC +#define VPCI_CONFIG_DATA1 0xCFD +#define VPCI_CONFIG_DATA2 0xCFE +#define VPCI_CONFIG_DATA3 0xCFF +#define VPCI_MECHANISM_CONTROL_REG 0xCFB + +#define VPCI_MAX_CONFIG_SPACE_SZ 256 + +#define OFFSET_VENDOR_ID 0x00 +#define OFFSET_DEVICE_ID 0x02 +#define OFFSET_COMMAND 0x04 +#define OFFSET_STATUS 0x06 +#define OFFSET_REVISION_ID 0x08 +#define OFFSET_PROG_IF 0x09 +#define OFFSET_SUBCLASS 0x0A +#define OFFSET_CLASS_CODE 0x0B +#define OFFSET_CACHE_LINE_SZ 0x0C +#define OFFSET_LATENCY_TIMER 0x0D +#define OFFSET_HEADER 0x0E +#define OFFSET_BIST 0x0F + +#define OFFSET_BAR0 0x10 +#define OFFSET_BAR1 0x14 +#define OFFSET_BAR2 0x18 +#define OFFSET_BAR3 0x1C +#define OFFSET_BAR4 0x20 +#define OFFSET_BAR5 0x24 + +#define OFFSET_PRIMARY_BUS_NUM 0x18 +#define OFFSET_SECONDARY_BUS_NUMBER 0x19 +#define OFFSET_SUBORDINATE_BUS_NUMBER 0x1A +#define OFFSET_SECONDARY_LATENCY_TIMER 0x1B +#define OFFSET_IO_BASE 0x1C +#define OFFSET_IO_LIMIT 0x1D +#define OFFSET_SECONDARY_STATUS 0x1E +#define OFFSET_MEMORY_BASE 0x20 +#define OFFSET_MEMORY_LIMIT 0x22 +#define OFFSET_PREFETCHABLE_MEMORY_BASE 0x24 +#define OFFSET_PREFETCHABLE_MEMORY_LIMIT 0x26 +#define OFFSET_PREFETCHABLE_BASE_UPPER_32_BITS 0x28 +#define OFFSET_PREFETCHABLE_LIMIT_UPPER_32_BITS 0x2C +#define OFFSET_IO_BASE_UPPER_16_BITS 0x30 +#define OFFSET_IO_LIMIT_UPPER_16_BITS 0x32 +#define OFFSET_CAPABILITY_POINTER 0x34 +#define OFFSET_EXPANSION_ROM_BASE_ADDRESS 0x38 +#define OFFSET_INTERRUPT_LINE 0x3C +#define OFFSET_INTERRUPT_PIN 0x3D +#define OFFSET_BRIDGE_CONTROL 0x3E + +#define OFFSET_CARDBUS_CIS_POINTER 0x28 +#define OFFSET_SUBSYSTEM_VENDOR_ID 0x2C +#define OFFSET_SUBSYSTEM_ID 0x2E +#define OFFSET_EXP_ROM_BASE 0x30 +#define OFFSET_CAP_POINTER 0x34 +#define OFFSET_RESERVED 0x38 +#define OFFSET_MIN_GRANT 0x3E +#define OFFSET_MAX_LENTENCY 0x3F + +#define PCI_HDR_TYPE_BRIDGE 0x01 +#define PCI_HDR_TYPE_DEV 0x00 + +struct vpci_common_header { + u16_t vendor_id; + u16_t device_id; + u16_t command; + u16_t status; + u8_t revision_id; + u8_t prog_if; + u8_t subclass; + u8_t class_code; + u8_t cache_line_sz; + u8_t latency_timer; + + union + { + u8_t header_type:7; + u8_t MF:1; + u8_t header; + }; + + union + { + u8_t completion_code:4; + u8_t reserved:2; + u8_t Start_BIST:1; + u8_t BIST_capable:1; + u8_t BIST; + }; +} __attribute__((packed)); + +struct mem_bar { + u32_t fixed_bit:1; + u32_t type:2; + u32_t prefetchable:1; + /* Needs to be 16-byte aligned */ + u32_t base_addr:28; +} __attribute__((packed)); + +struct io_bar { + u32_t fixed_bit:1; + u32_t reserved:1; + /* Needs to be 4-byte aligned */ + u32_t base_addr:30; +} __attribute__((packed)); + +struct vpci_bar { + union + { + u32_t raw_data; + struct mem_bar mem_bar; + struct io_bar io_bar; + }; +} __attribute__((packed)); + +#define PCI_TYPE0_BAR_NUM 6 +#define PCI_TYPE1_BAR_NUM 2 + +struct vpci_config_type0 { + struct vpci_common_header header; + struct vpci_bar bars[PCI_TYPE0_BAR_NUM]; + u32_t cardbus_cis_pointer; + u16_t subsystem_vendor_id; + u16_t subsystem_id; + u32_t exp_rom_base; + u32_t cap_pointer; + u32_t reserved; + u8_t interrupt_line; + u8_t interrupt_pin; + u8_t min_grant; + u8_t max_lentency; +} __attribute__((packed)); + +struct vpci_config_type1 { + struct vpci_common_header header; + struct vpci_bar bars[PCI_TYPE1_BAR_NUM]; + u8_t primary_bus_number; + u8_t secondary_bus_number; + u8_t subordinate_bus_number; + u8_t secondary_latency_timer; + u8_t io_base; + u8_t io_limit; + u16_t secondary_status; + u16_t memory_base; + u16_t memory_limit; + u16_t prefetchable_memory_base; + u16_t prefetchable_memory_limit; + u32_t prefetchable_base_upper_32_bits; + u32_t prefetchable_limit_upper_32_bits; + u16_t io_base_upper_16_bits; + u16_t io_limit_upper_16_bits; + u32_t capability_pointer:8; + u32_t reserved:24; + u32_t expansion_rom_base_address; + u8_t interrupt_line; + u8_t interrupt_pin; + u16_t bridge_control; +} __attribute__((packed)); + +struct vpci_config_space { + struct vpci_common_header header; + char data[VPCI_MAX_CONFIG_SPACE_SZ - sizeof(struct vpci_common_header)]; +} __attribute__((packed)); + +struct vpci_bdf { + u8_t reg_offset; + u8_t func_num:3; + u8_t dev_num:5; + u8_t bus_num; + u8_t resverd:7; + u8_t enable_bit:1; +}; + +void vpci_handler(u16_t port, int dir, int sz, struct vmrt_vm_vcpu *vcpu); +void vpci_regist(struct vpci_config_space *vpci, u32_t sz); diff --git a/src/components/implementation/simple_vmm/nf_multicore/devices/vpci/vpci_io.c b/src/components/implementation/simple_vmm/nf_multicore/devices/vpci/vpci_io.c new file mode 100644 index 0000000000..98667e1999 --- /dev/null +++ b/src/components/implementation/simple_vmm/nf_multicore/devices/vpci/vpci_io.c @@ -0,0 +1,191 @@ +#include +#include +#include +#include "vpci.h" + +static u32_t curr_bdf = 0; + +extern u32_t get_vpci_reg(u32_t bdf); +extern void set_vpci_reg(u32_t bdf, u32_t val, u8_t idx, u8_t sz); + +static void +vpci_outb(u32_t port_id, struct vmrt_vm_vcpu *vcpu) +{ + u8_t val = vcpu->shared_region->ax; + + switch (port_id) + { + case VPCI_MECHANISM_CONTROL_REG: + /* This is the register to configure the PCI access mecanism, we only support type 1 which is commonly used */ + assert(val == 0x1); + break; + case VPCI_CONFIG_DATA0: + set_vpci_reg(curr_bdf, val, 0, 1); + break; + case VPCI_CONFIG_DATA1: + set_vpci_reg(curr_bdf, val, 1, 1); + break; + case VPCI_CONFIG_DATA2: + set_vpci_reg(curr_bdf, val, 2, 1); + break; + case VPCI_CONFIG_DATA3: + set_vpci_reg(curr_bdf, val, 3, 1); + break; + default: + VM_PANIC(vcpu); + break; + } + return; +} + +static void +vpci_inb(u32_t port_id, struct vmrt_vm_vcpu *vcpu) +{ + u32_t bdf = 0; + + switch (port_id) + { + case VPCI_MECHANISM_CONTROL_REG: + vcpu->shared_region->ax = 1; + break; + case VPCI_CONFIG_DATA0: + bdf = get_vpci_reg(curr_bdf); + vcpu->shared_region->ax = (u8_t)bdf; + break; + case VPCI_CONFIG_DATA1: + bdf = get_vpci_reg(curr_bdf); + vcpu->shared_region->ax = (u8_t)(bdf >> 8); + break; + case VPCI_CONFIG_DATA2: + bdf = get_vpci_reg(curr_bdf); + vcpu->shared_region->ax = (u8_t)(bdf >> 16); + break; + case VPCI_CONFIG_DATA3: + bdf = get_vpci_reg(curr_bdf); + vcpu->shared_region->ax = (u8_t)(bdf >> 24); + break; + default: + VM_PANIC(vcpu); + break; + } + + return; +} + +static void +vpci_inw(u32_t port_id, struct vmrt_vm_vcpu *vcpu) +{ + u32_t bdf = 0; + + switch (port_id) + { + case VPCI_CONFIG_DATA0: + bdf = get_vpci_reg(curr_bdf); + vcpu->shared_region->ax = (u16_t)bdf; + break; + case VPCI_CONFIG_DATA2: + bdf = get_vpci_reg(curr_bdf); + vcpu->shared_region->ax = (u16_t)(bdf>>16); + break; + default: + VM_PANIC(vcpu); + break; + } + + return; +} + +static void +vpci_outw(u32_t port_id, struct vmrt_vm_vcpu *vcpu) +{ + u16_t val = vcpu->shared_region->ax; + + switch (port_id) + { + case VPCI_CONFIG_DATA0: + set_vpci_reg(curr_bdf, val, 0, 2); + break; + case VPCI_CONFIG_DATA2: + set_vpci_reg(curr_bdf, val, 2, 2); + break; + default: + VM_PANIC(vcpu); + break; + } + + return; +} + +static void +vpci_outl(u32_t port_id, struct vmrt_vm_vcpu *vcpu) +{ + u32_t val = vcpu->shared_region->ax; + + switch (port_id) + { + case VPCI_CONFIG_ADDRESS: + curr_bdf = val; + break; + case VPCI_CONFIG_DATA0: + set_vpci_reg(curr_bdf, val, 0, 3); + break; + default: + VM_PANIC(vcpu); + break; + } + return; +} + +static u32_t +vpci_inl(u32_t port_id, struct vmrt_vm_vcpu *vcpu) +{ + switch (port_id) + { + case VPCI_CONFIG_DATA0: + vcpu->shared_region->ax = get_vpci_reg(curr_bdf); + break; + case VPCI_CONFIG_ADDRESS: + vcpu->shared_region->ax = curr_bdf; + break; + default: + VM_PANIC(vcpu); + break; + } + return 0; +} + +void +vpci_handler(u16_t port, int dir, int sz, struct vmrt_vm_vcpu *vcpu) +{ + if (dir == IO_IN) { + switch (sz) + { + case IO_BYTE: + vpci_inb(port, vcpu); + break; + case IO_WORD: + vpci_inw(port, vcpu); + break; + case IO_LONG: + vpci_inl(port, vcpu); + break; + default: + VM_PANIC(vcpu); + } + } else { + switch (sz) + { + case IO_BYTE: + vpci_outb(port, vcpu); + break; + case IO_WORD: + vpci_outw(port, vcpu); + break; + case IO_LONG: + vpci_outl(port, vcpu); + break; + default: + VM_PANIC(vcpu); + } + } +} diff --git a/src/components/implementation/simple_vmm/nf_multicore/devices/vpic/vpic.c b/src/components/implementation/simple_vmm/nf_multicore/devices/vpic/vpic.c new file mode 100644 index 0000000000..f80471d528 --- /dev/null +++ b/src/components/implementation/simple_vmm/nf_multicore/devices/vpic/vpic.c @@ -0,0 +1,109 @@ +#include +#include +#include +#include "vpic.h" + +/* TODO: implement necessary functions needed by VM */ +struct chip_8259 { + u8_t master_cmd; + u8_t master_data; + u8_t is_master_init; + u8_t master_offset; + + u8_t slave_cmd; + u8_t slave_data; + u8_t is_slave_init; + u8_t slave_offset; + + u8_t interrupt_pending; +}; + +static struct chip_8259 chip; + +static u8_t pic_elcr1 = 0, pic_elcr2 = 0; + +void +vpic_handler(u16_t port, int dir, int sz, struct vmrt_vm_vcpu *vcpu) +{ + assert(sz == IO_BYTE); + if (dir == IO_IN) { + switch (port) + { + case PIC_MASTER_DATA_PORT: + vcpu->shared_region->ax = chip.master_data; + break; + case PIC_SLAVE_DATA_PORT: + vcpu->shared_region->ax = chip.slave_data; + break; + case PIC_MASTER_CMD_PORT: + vcpu->shared_region->ax = chip.master_cmd; + break; + case PIC_SLAVE_CMD_PORT: + vcpu->shared_region->ax = chip.slave_cmd; + break; + case PIC_ELCR1: + vcpu->shared_region->ax = pic_elcr1; + break; + case PIC_ELCR2: + vcpu->shared_region->ax = pic_elcr2; + break; + default: + printc("vpic_handler: port: 0x%x, dir: %d\n", port, dir); + VM_PANIC(vcpu); + break; + } + } else { + u8_t val = vcpu->shared_region->ax; + switch (port) + { + case PIC_MASTER_CMD_PORT: + chip.master_cmd = val; + if (chip.master_cmd & ICW1_INIT) { + chip.is_master_init = 1; + } + if (chip.master_cmd == PIC_EOI) { + chip.interrupt_pending = 0; + } + break; + case PIC_MASTER_DATA_PORT: + chip.master_data = val; + if (chip.is_master_init) { + chip.master_offset = chip.master_data; + chip.is_master_init = 0; + } + break; + case PIC_SLAVE_CMD_PORT: + chip.slave_cmd = val; + if (chip.slave_cmd & ICW1_INIT) { + chip.is_slave_init = 1; + } + if (chip.slave_cmd == PIC_EOI) { + chip.interrupt_pending = 0; + } + break; + case PIC_SLAVE_DATA_PORT: + chip.slave_data = val; + if (chip.is_slave_init) { + chip.slave_offset = chip.slave_data; + chip.is_slave_init = 0; + } + break; + case PIC_ELCR1: + pic_elcr1 = val; + break; + case PIC_ELCR2: + pic_elcr2 = val; + break; + default: + assert(0); + break; + } + + } +} + +static void __attribute__((constructor)) +init(void) +{ + memset(&chip, 0, sizeof(chip)); +} diff --git a/src/components/implementation/simple_vmm/nf_multicore/devices/vpic/vpic.h b/src/components/implementation/simple_vmm/nf_multicore/devices/vpic/vpic.h new file mode 100644 index 0000000000..a7001a6b52 --- /dev/null +++ b/src/components/implementation/simple_vmm/nf_multicore/devices/vpic/vpic.h @@ -0,0 +1,24 @@ +#pragma once + +#define PIC_MASTER_CMD_PORT 0x20 +#define PIC_MASTER_DATA_PORT 0x21 +#define PIC_SLAVE_CMD_PORT 0XA0 +#define PIC_SLAVE_DATA_PORT 0XA1 + +#define ICW1_ICW4 0x01 +#define ICW1_SINGLE 0x02 +#define ICW1_INTERVAL4 0x04 +#define ICW1_LEVEL 0x08 +#define ICW1_INIT 0x10 + +#define ICW4_8086 0x01 +#define ICW4_AUTO 0x02 +#define ICW4_BUF_SLAVE 0x08 +#define ICW4_BUF_MASTER 0x0C +#define ICW4_SFNM 0x10 + +#define PIC_EOI 0x20 +#define PIC_ELCR1 0x4d0 +#define PIC_ELCR2 0x4d1 + +void vpic_handler(u16_t port, int dir, int sz, struct vmrt_vm_vcpu *vcpu); diff --git a/src/components/implementation/simple_vmm/nf_multicore/devices/vps2/vps2.c b/src/components/implementation/simple_vmm/nf_multicore/devices/vps2/vps2.c new file mode 100644 index 0000000000..52eb9895b5 --- /dev/null +++ b/src/components/implementation/simple_vmm/nf_multicore/devices/vps2/vps2.c @@ -0,0 +1,47 @@ +#include +#include +#include +#include "vps2.h" + +static u8_t ps2_porta_data[0x0F]; +static u8_t ps2_portb_data[0x0F]; + +void +ps2_handler(u16_t port, int dir, int sz, struct vmrt_vm_vcpu *vcpu) +{ + assert(port == PS2_CONTROL_PORT_A || port == PS2_CONTROL_PORT_B); + assert(sz == IO_BYTE); + + if (dir == IO_IN) { + switch (port) + { + case PS2_CONTROL_PORT_A: + vcpu->shared_region->ax = ps2_porta_data[port - 0x90]; + break; + default: + VM_PANIC(vcpu); + break; + } + } else if (dir == IO_OUT) { + switch (port) + { + case PS2_CONTROL_PORT_A: + ps2_porta_data[port - 0x90] = (u8_t)vcpu->shared_region->ax; + break; + default: + VM_PANIC(vcpu); + break; + } + } else { + VM_PANIC(vcpu); + } + + return; +} + +static void __attribute__((constructor)) +init(void) +{ + memset(&ps2_porta_data, 0, sizeof(ps2_porta_data)); + memset(&ps2_portb_data, 0, sizeof(ps2_portb_data)); +} diff --git a/src/components/implementation/simple_vmm/nf_multicore/devices/vps2/vps2.h b/src/components/implementation/simple_vmm/nf_multicore/devices/vps2/vps2.h new file mode 100644 index 0000000000..971009a319 --- /dev/null +++ b/src/components/implementation/simple_vmm/nf_multicore/devices/vps2/vps2.h @@ -0,0 +1,6 @@ +#pragma once + +/* PS/2 system control port A (port B is at 0061) */ +#define PS2_CONTROL_PORT_A 0x92 +#define PS2_CONTROL_PORT_B 0x61 +void ps2_handler(u16_t port, int dir, int sz, struct vmrt_vm_vcpu *vcpu); diff --git a/src/components/implementation/simple_vmm/nf_multicore/devices/vrtc/vrtc.c b/src/components/implementation/simple_vmm/nf_multicore/devices/vrtc/vrtc.c new file mode 100644 index 0000000000..c971cef94e --- /dev/null +++ b/src/components/implementation/simple_vmm/nf_multicore/devices/vrtc/vrtc.c @@ -0,0 +1,58 @@ +#include +#include +#include +#include "vrtc.h" + +/* NOTE: this is just to emulate those data indexed by the CMOS data adress, the functionality of rtc is not fully implemented */ +static u8_t rtc_data_address[0x1A]; +static u8_t curr_data_addr; + +void +vrtc_handler(u16_t port, int dir, int sz, struct vmrt_vm_vcpu *vcpu) +{ + assert(sz == IO_BYTE); + if (dir == IO_IN) { + switch (port) + { + case CMOS_CMD_PORT: + assert(0); + break;; + case CMOS_DATA_PORT: + vcpu->shared_region->ax = rtc_data_address[curr_data_addr]; + break; + default: + assert(0); + break; + } + } else { + u8_t val = vcpu->shared_region->ax; + switch (port) + { + case CMOS_CMD_PORT: + if (val & 0x80) { + printc("NMI disabled\n"); + } else { + printc("NMI enabled\n"); + } + curr_data_addr = val & 0x7f; + if (curr_data_addr == 0x0f) { + printc("shutdown status byte is set now\n"); + } else { + /* NOTE: do nothing and don't include full functionality */ + } + break; + case CMOS_DATA_PORT: + break; + default: + assert(0); + break; + } + + } +} + +static void __attribute__((constructor)) +init(void) +{ + memset(&rtc_data_address, 0, sizeof(rtc_data_address)); +} diff --git a/src/components/implementation/simple_vmm/nf_multicore/devices/vrtc/vrtc.h b/src/components/implementation/simple_vmm/nf_multicore/devices/vrtc/vrtc.h new file mode 100644 index 0000000000..78074feba9 --- /dev/null +++ b/src/components/implementation/simple_vmm/nf_multicore/devices/vrtc/vrtc.h @@ -0,0 +1,7 @@ +#pragma once + +#define CMOS_CMD_PORT 0x70 +#define CMOS_DATA_PORT 0x71 + +void +vrtc_handler(u16_t port, int dir, int sz, struct vmrt_vm_vcpu *vcpu); diff --git a/src/components/implementation/simple_vmm/nf_multicore/fast_memcpy.h b/src/components/implementation/simple_vmm/nf_multicore/fast_memcpy.h new file mode 100644 index 0000000000..ddd282d4ba --- /dev/null +++ b/src/components/implementation/simple_vmm/nf_multicore/fast_memcpy.h @@ -0,0 +1,689 @@ +//===================================================================== +// +// FastMemcpy.c - skywind3000@163.com, 2015 +// +// feature: +// 50% speed up in avg. vs standard memcpy (tested in vc2012/gcc5.1) +// +//===================================================================== +#ifndef __FAST_MEMCPY_H__ +#define __FAST_MEMCPY_H__ + +#include +#include +#include + + +//--------------------------------------------------------------------- +// force inline for compilers +//--------------------------------------------------------------------- +#ifndef INLINE +#ifdef __GNUC__ +#if (__GNUC__ > 3) || ((__GNUC__ == 3) && (__GNUC_MINOR__ >= 1)) + #define INLINE __inline__ __attribute__((always_inline)) +#else + #define INLINE __inline__ +#endif +#elif defined(_MSC_VER) + #define INLINE __forceinline +#elif (defined(__BORLANDC__) || defined(__WATCOMC__)) + #define INLINE __inline +#else + #define INLINE +#endif +#endif + + + +//--------------------------------------------------------------------- +// fast copy for different sizes +//--------------------------------------------------------------------- +static INLINE void memcpy_sse2_16(void *dst, const void *src) { + __m128i m0 = _mm_loadu_si128(((const __m128i*)src) + 0); + _mm_storeu_si128(((__m128i*)dst) + 0, m0); +} + +static INLINE void memcpy_sse2_32(void *dst, const void *src) { + __m128i m0 = _mm_loadu_si128(((const __m128i*)src) + 0); + __m128i m1 = _mm_loadu_si128(((const __m128i*)src) + 1); + _mm_storeu_si128(((__m128i*)dst) + 0, m0); + _mm_storeu_si128(((__m128i*)dst) + 1, m1); +} + +static INLINE void memcpy_sse2_64(void *dst, const void *src) { + __m128i m0 = _mm_loadu_si128(((const __m128i*)src) + 0); + __m128i m1 = _mm_loadu_si128(((const __m128i*)src) + 1); + __m128i m2 = _mm_loadu_si128(((const __m128i*)src) + 2); + __m128i m3 = _mm_loadu_si128(((const __m128i*)src) + 3); + _mm_storeu_si128(((__m128i*)dst) + 0, m0); + _mm_storeu_si128(((__m128i*)dst) + 1, m1); + _mm_storeu_si128(((__m128i*)dst) + 2, m2); + _mm_storeu_si128(((__m128i*)dst) + 3, m3); +} + +static INLINE void memcpy_sse2_128(void *dst, const void *src) { + __m128i m0 = _mm_loadu_si128(((const __m128i*)src) + 0); + __m128i m1 = _mm_loadu_si128(((const __m128i*)src) + 1); + __m128i m2 = _mm_loadu_si128(((const __m128i*)src) + 2); + __m128i m3 = _mm_loadu_si128(((const __m128i*)src) + 3); + __m128i m4 = _mm_loadu_si128(((const __m128i*)src) + 4); + __m128i m5 = _mm_loadu_si128(((const __m128i*)src) + 5); + __m128i m6 = _mm_loadu_si128(((const __m128i*)src) + 6); + __m128i m7 = _mm_loadu_si128(((const __m128i*)src) + 7); + _mm_storeu_si128(((__m128i*)dst) + 0, m0); + _mm_storeu_si128(((__m128i*)dst) + 1, m1); + _mm_storeu_si128(((__m128i*)dst) + 2, m2); + _mm_storeu_si128(((__m128i*)dst) + 3, m3); + _mm_storeu_si128(((__m128i*)dst) + 4, m4); + _mm_storeu_si128(((__m128i*)dst) + 5, m5); + _mm_storeu_si128(((__m128i*)dst) + 6, m6); + _mm_storeu_si128(((__m128i*)dst) + 7, m7); +} + + +//--------------------------------------------------------------------- +// tiny memory copy with jump table optimized +//--------------------------------------------------------------------- +static INLINE void *memcpy_tiny(void *dst, const void *src, size_t size) { + unsigned char *dd = ((unsigned char*)dst) + size; + const unsigned char *ss = ((const unsigned char*)src) + size; + + switch (size) { + case 64: + memcpy_sse2_64(dd - 64, ss - 64); + case 0: + break; + + case 65: + memcpy_sse2_64(dd - 65, ss - 65); + case 1: + dd[-1] = ss[-1]; + break; + + case 66: + memcpy_sse2_64(dd - 66, ss - 66); + case 2: + *((uint16_t*)(dd - 2)) = *((uint16_t*)(ss - 2)); + break; + + case 67: + memcpy_sse2_64(dd - 67, ss - 67); + case 3: + *((uint16_t*)(dd - 3)) = *((uint16_t*)(ss - 3)); + dd[-1] = ss[-1]; + break; + + case 68: + memcpy_sse2_64(dd - 68, ss - 68); + case 4: + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 69: + memcpy_sse2_64(dd - 69, ss - 69); + case 5: + *((uint32_t*)(dd - 5)) = *((uint32_t*)(ss - 5)); + dd[-1] = ss[-1]; + break; + + case 70: + memcpy_sse2_64(dd - 70, ss - 70); + case 6: + *((uint32_t*)(dd - 6)) = *((uint32_t*)(ss - 6)); + *((uint16_t*)(dd - 2)) = *((uint16_t*)(ss - 2)); + break; + + case 71: + memcpy_sse2_64(dd - 71, ss - 71); + case 7: + *((uint32_t*)(dd - 7)) = *((uint32_t*)(ss - 7)); + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 72: + memcpy_sse2_64(dd - 72, ss - 72); + case 8: + *((uint64_t*)(dd - 8)) = *((uint64_t*)(ss - 8)); + break; + + case 73: + memcpy_sse2_64(dd - 73, ss - 73); + case 9: + *((uint64_t*)(dd - 9)) = *((uint64_t*)(ss - 9)); + dd[-1] = ss[-1]; + break; + + case 74: + memcpy_sse2_64(dd - 74, ss - 74); + case 10: + *((uint64_t*)(dd - 10)) = *((uint64_t*)(ss - 10)); + *((uint16_t*)(dd - 2)) = *((uint16_t*)(ss - 2)); + break; + + case 75: + memcpy_sse2_64(dd - 75, ss - 75); + case 11: + *((uint64_t*)(dd - 11)) = *((uint64_t*)(ss - 11)); + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 76: + memcpy_sse2_64(dd - 76, ss - 76); + case 12: + *((uint64_t*)(dd - 12)) = *((uint64_t*)(ss - 12)); + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 77: + memcpy_sse2_64(dd - 77, ss - 77); + case 13: + *((uint64_t*)(dd - 13)) = *((uint64_t*)(ss - 13)); + *((uint32_t*)(dd - 5)) = *((uint32_t*)(ss - 5)); + dd[-1] = ss[-1]; + break; + + case 78: + memcpy_sse2_64(dd - 78, ss - 78); + case 14: + *((uint64_t*)(dd - 14)) = *((uint64_t*)(ss - 14)); + *((uint64_t*)(dd - 8)) = *((uint64_t*)(ss - 8)); + break; + + case 79: + memcpy_sse2_64(dd - 79, ss - 79); + case 15: + *((uint64_t*)(dd - 15)) = *((uint64_t*)(ss - 15)); + *((uint64_t*)(dd - 8)) = *((uint64_t*)(ss - 8)); + break; + + case 80: + memcpy_sse2_64(dd - 80, ss - 80); + case 16: + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 81: + memcpy_sse2_64(dd - 81, ss - 81); + case 17: + memcpy_sse2_16(dd - 17, ss - 17); + dd[-1] = ss[-1]; + break; + + case 82: + memcpy_sse2_64(dd - 82, ss - 82); + case 18: + memcpy_sse2_16(dd - 18, ss - 18); + *((uint16_t*)(dd - 2)) = *((uint16_t*)(ss - 2)); + break; + + case 83: + memcpy_sse2_64(dd - 83, ss - 83); + case 19: + memcpy_sse2_16(dd - 19, ss - 19); + *((uint16_t*)(dd - 3)) = *((uint16_t*)(ss - 3)); + dd[-1] = ss[-1]; + break; + + case 84: + memcpy_sse2_64(dd - 84, ss - 84); + case 20: + memcpy_sse2_16(dd - 20, ss - 20); + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 85: + memcpy_sse2_64(dd - 85, ss - 85); + case 21: + memcpy_sse2_16(dd - 21, ss - 21); + *((uint32_t*)(dd - 5)) = *((uint32_t*)(ss - 5)); + dd[-1] = ss[-1]; + break; + + case 86: + memcpy_sse2_64(dd - 86, ss - 86); + case 22: + memcpy_sse2_16(dd - 22, ss - 22); + *((uint32_t*)(dd - 6)) = *((uint32_t*)(ss - 6)); + *((uint16_t*)(dd - 2)) = *((uint16_t*)(ss - 2)); + break; + + case 87: + memcpy_sse2_64(dd - 87, ss - 87); + case 23: + memcpy_sse2_16(dd - 23, ss - 23); + *((uint32_t*)(dd - 7)) = *((uint32_t*)(ss - 7)); + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 88: + memcpy_sse2_64(dd - 88, ss - 88); + case 24: + memcpy_sse2_16(dd - 24, ss - 24); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 89: + memcpy_sse2_64(dd - 89, ss - 89); + case 25: + memcpy_sse2_16(dd - 25, ss - 25); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 90: + memcpy_sse2_64(dd - 90, ss - 90); + case 26: + memcpy_sse2_16(dd - 26, ss - 26); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 91: + memcpy_sse2_64(dd - 91, ss - 91); + case 27: + memcpy_sse2_16(dd - 27, ss - 27); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 92: + memcpy_sse2_64(dd - 92, ss - 92); + case 28: + memcpy_sse2_16(dd - 28, ss - 28); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 93: + memcpy_sse2_64(dd - 93, ss - 93); + case 29: + memcpy_sse2_16(dd - 29, ss - 29); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 94: + memcpy_sse2_64(dd - 94, ss - 94); + case 30: + memcpy_sse2_16(dd - 30, ss - 30); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 95: + memcpy_sse2_64(dd - 95, ss - 95); + case 31: + memcpy_sse2_16(dd - 31, ss - 31); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 96: + memcpy_sse2_64(dd - 96, ss - 96); + case 32: + memcpy_sse2_32(dd - 32, ss - 32); + break; + + case 97: + memcpy_sse2_64(dd - 97, ss - 97); + case 33: + memcpy_sse2_32(dd - 33, ss - 33); + dd[-1] = ss[-1]; + break; + + case 98: + memcpy_sse2_64(dd - 98, ss - 98); + case 34: + memcpy_sse2_32(dd - 34, ss - 34); + *((uint16_t*)(dd - 2)) = *((uint16_t*)(ss - 2)); + break; + + case 99: + memcpy_sse2_64(dd - 99, ss - 99); + case 35: + memcpy_sse2_32(dd - 35, ss - 35); + *((uint16_t*)(dd - 3)) = *((uint16_t*)(ss - 3)); + dd[-1] = ss[-1]; + break; + + case 100: + memcpy_sse2_64(dd - 100, ss - 100); + case 36: + memcpy_sse2_32(dd - 36, ss - 36); + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 101: + memcpy_sse2_64(dd - 101, ss - 101); + case 37: + memcpy_sse2_32(dd - 37, ss - 37); + *((uint32_t*)(dd - 5)) = *((uint32_t*)(ss - 5)); + dd[-1] = ss[-1]; + break; + + case 102: + memcpy_sse2_64(dd - 102, ss - 102); + case 38: + memcpy_sse2_32(dd - 38, ss - 38); + *((uint32_t*)(dd - 6)) = *((uint32_t*)(ss - 6)); + *((uint16_t*)(dd - 2)) = *((uint16_t*)(ss - 2)); + break; + + case 103: + memcpy_sse2_64(dd - 103, ss - 103); + case 39: + memcpy_sse2_32(dd - 39, ss - 39); + *((uint32_t*)(dd - 7)) = *((uint32_t*)(ss - 7)); + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 104: + memcpy_sse2_64(dd - 104, ss - 104); + case 40: + memcpy_sse2_32(dd - 40, ss - 40); + *((uint64_t*)(dd - 8)) = *((uint64_t*)(ss - 8)); + break; + + case 105: + memcpy_sse2_64(dd - 105, ss - 105); + case 41: + memcpy_sse2_32(dd - 41, ss - 41); + *((uint64_t*)(dd - 9)) = *((uint64_t*)(ss - 9)); + dd[-1] = ss[-1]; + break; + + case 106: + memcpy_sse2_64(dd - 106, ss - 106); + case 42: + memcpy_sse2_32(dd - 42, ss - 42); + *((uint64_t*)(dd - 10)) = *((uint64_t*)(ss - 10)); + *((uint16_t*)(dd - 2)) = *((uint16_t*)(ss - 2)); + break; + + case 107: + memcpy_sse2_64(dd - 107, ss - 107); + case 43: + memcpy_sse2_32(dd - 43, ss - 43); + *((uint64_t*)(dd - 11)) = *((uint64_t*)(ss - 11)); + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 108: + memcpy_sse2_64(dd - 108, ss - 108); + case 44: + memcpy_sse2_32(dd - 44, ss - 44); + *((uint64_t*)(dd - 12)) = *((uint64_t*)(ss - 12)); + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 109: + memcpy_sse2_64(dd - 109, ss - 109); + case 45: + memcpy_sse2_32(dd - 45, ss - 45); + *((uint64_t*)(dd - 13)) = *((uint64_t*)(ss - 13)); + *((uint32_t*)(dd - 5)) = *((uint32_t*)(ss - 5)); + dd[-1] = ss[-1]; + break; + + case 110: + memcpy_sse2_64(dd - 110, ss - 110); + case 46: + memcpy_sse2_32(dd - 46, ss - 46); + *((uint64_t*)(dd - 14)) = *((uint64_t*)(ss - 14)); + *((uint64_t*)(dd - 8)) = *((uint64_t*)(ss - 8)); + break; + + case 111: + memcpy_sse2_64(dd - 111, ss - 111); + case 47: + memcpy_sse2_32(dd - 47, ss - 47); + *((uint64_t*)(dd - 15)) = *((uint64_t*)(ss - 15)); + *((uint64_t*)(dd - 8)) = *((uint64_t*)(ss - 8)); + break; + + case 112: + memcpy_sse2_64(dd - 112, ss - 112); + case 48: + memcpy_sse2_32(dd - 48, ss - 48); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 113: + memcpy_sse2_64(dd - 113, ss - 113); + case 49: + memcpy_sse2_32(dd - 49, ss - 49); + memcpy_sse2_16(dd - 17, ss - 17); + dd[-1] = ss[-1]; + break; + + case 114: + memcpy_sse2_64(dd - 114, ss - 114); + case 50: + memcpy_sse2_32(dd - 50, ss - 50); + memcpy_sse2_16(dd - 18, ss - 18); + *((uint16_t*)(dd - 2)) = *((uint16_t*)(ss - 2)); + break; + + case 115: + memcpy_sse2_64(dd - 115, ss - 115); + case 51: + memcpy_sse2_32(dd - 51, ss - 51); + memcpy_sse2_16(dd - 19, ss - 19); + *((uint16_t*)(dd - 3)) = *((uint16_t*)(ss - 3)); + dd[-1] = ss[-1]; + break; + + case 116: + memcpy_sse2_64(dd - 116, ss - 116); + case 52: + memcpy_sse2_32(dd - 52, ss - 52); + memcpy_sse2_16(dd - 20, ss - 20); + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 117: + memcpy_sse2_64(dd - 117, ss - 117); + case 53: + memcpy_sse2_32(dd - 53, ss - 53); + memcpy_sse2_16(dd - 21, ss - 21); + *((uint32_t*)(dd - 5)) = *((uint32_t*)(ss - 5)); + dd[-1] = ss[-1]; + break; + + case 118: + memcpy_sse2_64(dd - 118, ss - 118); + case 54: + memcpy_sse2_32(dd - 54, ss - 54); + memcpy_sse2_16(dd - 22, ss - 22); + *((uint32_t*)(dd - 6)) = *((uint32_t*)(ss - 6)); + *((uint16_t*)(dd - 2)) = *((uint16_t*)(ss - 2)); + break; + + case 119: + memcpy_sse2_64(dd - 119, ss - 119); + case 55: + memcpy_sse2_32(dd - 55, ss - 55); + memcpy_sse2_16(dd - 23, ss - 23); + *((uint32_t*)(dd - 7)) = *((uint32_t*)(ss - 7)); + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 120: + memcpy_sse2_64(dd - 120, ss - 120); + case 56: + memcpy_sse2_32(dd - 56, ss - 56); + memcpy_sse2_16(dd - 24, ss - 24); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 121: + memcpy_sse2_64(dd - 121, ss - 121); + case 57: + memcpy_sse2_32(dd - 57, ss - 57); + memcpy_sse2_16(dd - 25, ss - 25); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 122: + memcpy_sse2_64(dd - 122, ss - 122); + case 58: + memcpy_sse2_32(dd - 58, ss - 58); + memcpy_sse2_16(dd - 26, ss - 26); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 123: + memcpy_sse2_64(dd - 123, ss - 123); + case 59: + memcpy_sse2_32(dd - 59, ss - 59); + memcpy_sse2_16(dd - 27, ss - 27); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 124: + memcpy_sse2_64(dd - 124, ss - 124); + case 60: + memcpy_sse2_32(dd - 60, ss - 60); + memcpy_sse2_16(dd - 28, ss - 28); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 125: + memcpy_sse2_64(dd - 125, ss - 125); + case 61: + memcpy_sse2_32(dd - 61, ss - 61); + memcpy_sse2_16(dd - 29, ss - 29); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 126: + memcpy_sse2_64(dd - 126, ss - 126); + case 62: + memcpy_sse2_32(dd - 62, ss - 62); + memcpy_sse2_16(dd - 30, ss - 30); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 127: + memcpy_sse2_64(dd - 127, ss - 127); + case 63: + memcpy_sse2_32(dd - 63, ss - 63); + memcpy_sse2_16(dd - 31, ss - 31); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 128: + memcpy_sse2_128(dd - 128, ss - 128); + break; + } + + return dst; +} + + +//--------------------------------------------------------------------- +// main routine +//--------------------------------------------------------------------- +static void* memcpy_fast(void *destination, const void *source, size_t size) +{ + unsigned char *dst = (unsigned char*)destination; + const unsigned char *src = (const unsigned char*)source; + static size_t cachesize = 0x200000; // L2-cache size + size_t padding; + + // small memory copy + if (size <= 128) { + return memcpy_tiny(dst, src, size); + } + + // align destination to 16 bytes boundary + padding = (16 - (((size_t)dst) & 15)) & 15; + + if (padding > 0) { + __m128i head = _mm_loadu_si128((const __m128i*)src); + _mm_storeu_si128((__m128i*)dst, head); + dst += padding; + src += padding; + size -= padding; + } + + // medium size copy + if (size <= cachesize) { + __m128i c0, c1, c2, c3, c4, c5, c6, c7; + + for (; size >= 128; size -= 128) { + c0 = _mm_loadu_si128(((const __m128i*)src) + 0); + c1 = _mm_loadu_si128(((const __m128i*)src) + 1); + c2 = _mm_loadu_si128(((const __m128i*)src) + 2); + c3 = _mm_loadu_si128(((const __m128i*)src) + 3); + c4 = _mm_loadu_si128(((const __m128i*)src) + 4); + c5 = _mm_loadu_si128(((const __m128i*)src) + 5); + c6 = _mm_loadu_si128(((const __m128i*)src) + 6); + c7 = _mm_loadu_si128(((const __m128i*)src) + 7); + _mm_prefetch((const char*)(src + 256), _MM_HINT_NTA); + src += 128; + _mm_store_si128((((__m128i*)dst) + 0), c0); + _mm_store_si128((((__m128i*)dst) + 1), c1); + _mm_store_si128((((__m128i*)dst) + 2), c2); + _mm_store_si128((((__m128i*)dst) + 3), c3); + _mm_store_si128((((__m128i*)dst) + 4), c4); + _mm_store_si128((((__m128i*)dst) + 5), c5); + _mm_store_si128((((__m128i*)dst) + 6), c6); + _mm_store_si128((((__m128i*)dst) + 7), c7); + dst += 128; + } + } + else { // big memory copy + __m128i c0, c1, c2, c3, c4, c5, c6, c7; + + _mm_prefetch((const char*)(src), _MM_HINT_NTA); + + if ((((size_t)src) & 15) == 0) { // source aligned + for (; size >= 128; size -= 128) { + c0 = _mm_load_si128(((const __m128i*)src) + 0); + c1 = _mm_load_si128(((const __m128i*)src) + 1); + c2 = _mm_load_si128(((const __m128i*)src) + 2); + c3 = _mm_load_si128(((const __m128i*)src) + 3); + c4 = _mm_load_si128(((const __m128i*)src) + 4); + c5 = _mm_load_si128(((const __m128i*)src) + 5); + c6 = _mm_load_si128(((const __m128i*)src) + 6); + c7 = _mm_load_si128(((const __m128i*)src) + 7); + _mm_prefetch((const char*)(src + 256), _MM_HINT_NTA); + src += 128; + _mm_stream_si128((((__m128i*)dst) + 0), c0); + _mm_stream_si128((((__m128i*)dst) + 1), c1); + _mm_stream_si128((((__m128i*)dst) + 2), c2); + _mm_stream_si128((((__m128i*)dst) + 3), c3); + _mm_stream_si128((((__m128i*)dst) + 4), c4); + _mm_stream_si128((((__m128i*)dst) + 5), c5); + _mm_stream_si128((((__m128i*)dst) + 6), c6); + _mm_stream_si128((((__m128i*)dst) + 7), c7); + dst += 128; + } + } + else { // source unaligned + for (; size >= 128; size -= 128) { + c0 = _mm_loadu_si128(((const __m128i*)src) + 0); + c1 = _mm_loadu_si128(((const __m128i*)src) + 1); + c2 = _mm_loadu_si128(((const __m128i*)src) + 2); + c3 = _mm_loadu_si128(((const __m128i*)src) + 3); + c4 = _mm_loadu_si128(((const __m128i*)src) + 4); + c5 = _mm_loadu_si128(((const __m128i*)src) + 5); + c6 = _mm_loadu_si128(((const __m128i*)src) + 6); + c7 = _mm_loadu_si128(((const __m128i*)src) + 7); + _mm_prefetch((const char*)(src + 256), _MM_HINT_NTA); + src += 128; + _mm_stream_si128((((__m128i*)dst) + 0), c0); + _mm_stream_si128((((__m128i*)dst) + 1), c1); + _mm_stream_si128((((__m128i*)dst) + 2), c2); + _mm_stream_si128((((__m128i*)dst) + 3), c3); + _mm_stream_si128((((__m128i*)dst) + 4), c4); + _mm_stream_si128((((__m128i*)dst) + 5), c5); + _mm_stream_si128((((__m128i*)dst) + 6), c6); + _mm_stream_si128((((__m128i*)dst) + 7), c7); + dst += 128; + } + } + _mm_sfence(); + } + + memcpy_tiny(dst, src, size); + + return destination; +} + + +#endif diff --git a/src/components/implementation/simple_vmm/nf_multicore/guest/.gitignore b/src/components/implementation/simple_vmm/nf_multicore/guest/.gitignore new file mode 100644 index 0000000000..4a60f24ce6 --- /dev/null +++ b/src/components/implementation/simple_vmm/nf_multicore/guest/.gitignore @@ -0,0 +1,2 @@ +*.elf +*.map \ No newline at end of file diff --git a/src/components/implementation/simple_vmm/nf_multicore/guest/Makefile b/src/components/implementation/simple_vmm/nf_multicore/guest/Makefile new file mode 100644 index 0000000000..0228863f04 --- /dev/null +++ b/src/components/implementation/simple_vmm/nf_multicore/guest/Makefile @@ -0,0 +1,47 @@ +CC := gcc -m64 +LD := ld -m elf_x86_64 --nmagic +AS := as --64 -g + +CFLAGS := -g -O0 -ffreestanding -Wno-unused-function -Wno-unused-variable -Wno-unused-but-set-variable -nostdinc -nostdlib -fno-pic -mno-red-zone -mcmodel=large -mno-sse -mno-sse2 -mgeneral-regs-only +LDFLAGS := -nostdlib -fno-builtin -nostartfiles -nostdinc -nodefaultlibs + +GUEST_ELF = guest.elf +GUEST_IMG = guest.img +GUEST_MAP = guest.map + +AS_FILES = guest_realmode.S +AS_OBJS = $(patsubst %.S,%.o,$(AS_FILES)) + +WARNINGS += -Wall +WARNINGS += -Wcast-align +WARNINGS += -Wformat=2 +WARNINGS += -Winit-self +WARNINGS += -Wnested-externs +WARNINGS += -Wno-system-headers +WARNINGS += -Wold-style-definition +WARNINGS += -Wredundant-decls +WARNINGS += -Wsign-compare +WARNINGS += -Wstrict-prototypes +WARNINGS += -Wundef +WARNINGS += -Wvolatile-register-var +WARNINGS += -Wwrite-strings +WARNINGS += -Wno-address-of-packed-member + +CFLAGS += $(WARNINGS) + +all: $(GUEST_IMG) + +%.o: %.S + $(CC) $(CFLAGS) -I. -o $@ -c $< + +$(GUEST_IMG):$(GUEST_ELF) + @echo "[CT] $@" + @cp $< $@ + @objcopy $@ -O binary + +$(GUEST_ELF):$(AS_OBJS) + @echo "[LD] $@" + $(LD) $(LDPARAMS) -static -Map=$(GUEST_MAP) -T guest.ld -o $(GUEST_ELF) $(AS_OBJS) + +clean: + @rm -f $(GUEST_ELF) $(GUEST_IMG) $(GUEST_MAP) *.o \ No newline at end of file diff --git a/src/components/implementation/simple_vmm/nf_multicore/guest/guest.ld b/src/components/implementation/simple_vmm/nf_multicore/guest/guest.ld new file mode 100644 index 0000000000..07f9206c1f --- /dev/null +++ b/src/components/implementation/simple_vmm/nf_multicore/guest/guest.ld @@ -0,0 +1,34 @@ +ENTRY(guest_real_mode_entry) +OUTPUT_FORMAT(elf64-x86-64) +OUTPUT_ARCH(i386:x86-64) + + +SECTIONS +{ + . = 0x1000; + + .text BLOCK(4K) : ALIGN(4K) + { + *(.guest_kernel_initfn*) + *(.text*) + *(.rodata*) + } + + .data BLOCK(4K) : ALIGN(4K) + { + KEEP(*( .init_array )); + KEEP(*(SORT_BY_INIT_PRIORITY( .init_array.* ))); + *(.data*) + } + + .bss BLOCK(4K) : ALIGN(4K) + { + *(.bss*) + } + + /DISCARD/ : + { + *(.fini_array*) + *(.comment*) + } +} diff --git a/src/components/implementation/simple_vmm/nf_multicore/guest/guest_realmode.S b/src/components/implementation/simple_vmm/nf_multicore/guest/guest_realmode.S new file mode 100644 index 0000000000..ac2e2ec0a7 --- /dev/null +++ b/src/components/implementation/simple_vmm/nf_multicore/guest/guest_realmode.S @@ -0,0 +1,60 @@ +#define SEG_NULLASM \ + .word 0, 0; \ + .byte 0, 0, 0, 0 +#define SEG_ASM(type,base,lim) \ + .word (((lim) >> 12) & 0xffff), ((base) & 0xffff); \ + .byte (((base) >> 16) & 0xff), (0x90 | (type)), \ + (0xC0 | (((lim) >> 28) & 0xf)), (((base) >> 24) & 0xff) + +#define STA_X 0x8 // Executable segment +#define STA_E 0x4 // Expand down (non-executable segments) +#define STA_C 0x4 // Conforming code segment (executable only) +#define STA_W 0x2 // Writeable (non-executable segments) +#define STA_R 0x2 // Readable (executable segments) +#define STA_A 0x1 // Accessed + +#define CR0_PE 0x00000001 // Protection Enable +#define CR0_WP 0x00010000 // Write Protect +#define CR0_PG 0x80000000 // Paging + +#define SEL_KCSEG 0x08 /* Kernel code selector. */ +#define SEL_KDSEG 0x10 /* Kernel data selector. */ + +.global guest_real_mode_entry +/* code start entry */ +.section .guest_kernel_initfn +.code16 +guest_real_mode_entry: + ljmp $0x0, $start + +start: + cli + lgdt smpgdtdesc + movl %cr0, %eax + orl $CR0_PE, %eax + movl %eax, %cr0 + ljmpl $(SEL_KCSEG), $smpstart32 +.align 0x10 +.code32 +smpstart32: + movw $(SEL_KDSEG), %ax + movw %ax, %ds + movw %ax, %es + movw %ax, %ss + movw $0, %ax + movw %ax, %fs + movw %ax, %gs + + /* jmp to vmlinux bootloader at the specific address */ + ljmpl $(SEL_KCSEG), $0x100000 + jmp . + +.p2align 2 +smpgdt: + SEG_NULLASM + SEG_ASM(STA_X|STA_R, 0, 0xffffffff) /* code segment for protected mode, mapping 0-4G memory */ + SEG_ASM(STA_W, 0, 0xffffffff) /* data segment for protected mode, mapping 0-4G memory */ + +smpgdtdesc: + .word (smpgdtdesc - smpgdt - 1) + .long smpgdt diff --git a/src/components/implementation/simple_vmm/nf_multicore/instr_emul.c b/src/components/implementation/simple_vmm/nf_multicore/instr_emul.c new file mode 100644 index 0000000000..230a0a9bdf --- /dev/null +++ b/src/components/implementation/simple_vmm/nf_multicore/instr_emul.c @@ -0,0 +1,1381 @@ +/*- + * Copyright (c) 2012 Sandvine, Inc. + * Copyright (c) 2012 NetApp, Inc. + * Copyright (c) 2017-2022 Intel Corporation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#include +#include + +#include + +#define CPU_REG_FIRST CPU_REG_RAX +#define CPU_REG_LAST CPU_REG_GDTR +#define CPU_REG_GENERAL_FIRST CPU_REG_RAX +#define CPU_REG_GENERAL_LAST CPU_REG_R15 +#define CPU_REG_NONGENERAL_FIRST CPU_REG_CR0 +#define CPU_REG_NONGENERAL_LAST CPU_REG_GDTR +#define CPU_REG_NATURAL_FIRST CPU_REG_CR0 +#define CPU_REG_NATURAL_LAST CPU_REG_RFLAGS +#define CPU_REG_64BIT_FIRST CPU_REG_EFER +#define CPU_REG_64BIT_LAST CPU_REG_PDPTE3 +#define CPU_REG_SEG_FIRST CPU_REG_ES +#define CPU_REG_SEG_LAST CPU_REG_GS + +#define PSL_C 0x00000001U /* carry bit */ +#define PSL_PF 0x00000004U /* parity bit */ +#define PSL_AF 0x00000010U /* bcd carry bit */ +#define PSL_Z 0x00000040U /* zero bit */ +#define PSL_N 0x00000080U /* negative bit */ +#define PSL_D 0x00000400U /* string instruction direction bit */ +#define PSL_V 0x00000800U /* overflow bit */ +#define PSL_AC 0x00040000U /* alignment checking */ + +/* + * Protections are chosen from these bits, or-ed together + */ +#define PROT_READ 0x01U /* pages can be read */ +#define PROT_WRITE 0x02U /* pages can be written */ + +/* struct vie_op.op_type */ +#define VIE_OP_TYPE_NONE 0U +#define VIE_OP_TYPE_MOV 1U +#define VIE_OP_TYPE_MOVSX 2U +#define VIE_OP_TYPE_MOVZX 3U +#define VIE_OP_TYPE_AND 4U +#define VIE_OP_TYPE_OR 5U +#define VIE_OP_TYPE_SUB 6U +#define VIE_OP_TYPE_TWO_BYTE 7U +#define VIE_OP_TYPE_PUSH 8U +#define VIE_OP_TYPE_CMP 9U +#define VIE_OP_TYPE_POP 10U +#define VIE_OP_TYPE_MOVS 11U +#define VIE_OP_TYPE_GROUP1 12U +#define VIE_OP_TYPE_STOS 13U +#define VIE_OP_TYPE_BITTEST 14U +#define VIE_OP_TYPE_TEST 15U +#define VIE_OP_TYPE_XCHG 16U + +/* struct vie_op.op_flags */ +#define VIE_OP_F_IMM (1U << 0U) /* 16/32-bit immediate operand */ +#define VIE_OP_F_IMM8 (1U << 1U) /* 8-bit immediate operand */ +#define VIE_OP_F_MOFFSET (1U << 2U) /* 16/32/64-bit immediate moffset */ +#define VIE_OP_F_NO_MODRM (1U << 3U) +#define VIE_OP_F_CHECK_GVA_DI (1U << 4U) /* for movs, need to check DI */ +/* + * The VIE_OP_F_BYTE_OP only set when the instruction support + * Encoding of Operand Size (w) Bit and the w bit of opcode is 0. + * according B.2 GENERAL-PURPOSE INSTRUCTION FORMATS AND ENCODINGS + * FOR NON-64-BIT MODES, Vol 2, Intel SDM. + */ +#define VIE_OP_F_BYTE_OP (1U << 5U) /* 8-bit operands. */ +#define VIE_OP_F_WORD_OP (1U << 6U) /* 16-bit operands. */ + +static const struct instr_emul_vie_op two_byte_opcodes[256] = { + [0xB6] = { + .op_type = VIE_OP_TYPE_MOVZX, + .op_flags = VIE_OP_F_BYTE_OP, + }, + [0xB7] = { + .op_type = VIE_OP_TYPE_MOVZX, + .op_flags = VIE_OP_F_WORD_OP, + }, + [0xBA] = { + .op_type = VIE_OP_TYPE_BITTEST, + .op_flags = VIE_OP_F_IMM8, + }, + [0xBE] = { + .op_type = VIE_OP_TYPE_MOVSX, + .op_flags = VIE_OP_F_BYTE_OP, + }, +}; + +static const struct instr_emul_vie_op one_byte_opcodes[256] = { + [0x0F] = { + .op_type = VIE_OP_TYPE_TWO_BYTE + }, + [0x2B] = { + .op_type = VIE_OP_TYPE_SUB, + }, + [0x39] = { + .op_type = VIE_OP_TYPE_CMP, + }, + [0x3B] = { + .op_type = VIE_OP_TYPE_CMP, + }, + [0x88] = { + .op_type = VIE_OP_TYPE_MOV, + .op_flags = VIE_OP_F_BYTE_OP, + }, + [0x89] = { + .op_type = VIE_OP_TYPE_MOV, + }, + [0x8A] = { + .op_type = VIE_OP_TYPE_MOV, + .op_flags = VIE_OP_F_BYTE_OP, + }, + [0x8B] = { + .op_type = VIE_OP_TYPE_MOV, + }, + [0xA1] = { + .op_type = VIE_OP_TYPE_MOV, + .op_flags = VIE_OP_F_MOFFSET | VIE_OP_F_NO_MODRM, + }, + [0xA3] = { + .op_type = VIE_OP_TYPE_MOV, + .op_flags = VIE_OP_F_MOFFSET | VIE_OP_F_NO_MODRM, + }, + [0xA4] = { + .op_type = VIE_OP_TYPE_MOVS, + .op_flags = VIE_OP_F_NO_MODRM | VIE_OP_F_CHECK_GVA_DI | VIE_OP_F_BYTE_OP, + }, + [0xA5] = { + .op_type = VIE_OP_TYPE_MOVS, + .op_flags = VIE_OP_F_NO_MODRM | VIE_OP_F_CHECK_GVA_DI, + }, + [0xAA] = { + .op_type = VIE_OP_TYPE_STOS, + .op_flags = VIE_OP_F_NO_MODRM | VIE_OP_F_BYTE_OP, + }, + [0xAB] = { + .op_type = VIE_OP_TYPE_STOS, + .op_flags = VIE_OP_F_NO_MODRM + }, + [0xC6] = { + /* XXX Group 11 extended opcode - not just MOV */ + .op_type = VIE_OP_TYPE_MOV, + .op_flags = VIE_OP_F_IMM8 | VIE_OP_F_BYTE_OP, + }, + [0xC7] = { + .op_type = VIE_OP_TYPE_MOV, + .op_flags = VIE_OP_F_IMM, + }, + [0x23] = { + .op_type = VIE_OP_TYPE_AND, + }, + [0x80] = { + /* Group 1 extended opcode */ + .op_type = VIE_OP_TYPE_GROUP1, + .op_flags = VIE_OP_F_IMM8, + }, + [0x81] = { + /* Group 1 extended opcode */ + .op_type = VIE_OP_TYPE_GROUP1, + .op_flags = VIE_OP_F_IMM, + }, + [0x83] = { + /* Group 1 extended opcode */ + .op_type = VIE_OP_TYPE_GROUP1, + .op_flags = VIE_OP_F_IMM8, + }, + [0x84] = { + .op_type = VIE_OP_TYPE_TEST, + .op_flags = VIE_OP_F_BYTE_OP, + }, + [0x85] = { + .op_type = VIE_OP_TYPE_TEST, + }, + [0x86] = { + .op_type = VIE_OP_TYPE_XCHG, + }, + [0x87] = { + .op_type = VIE_OP_TYPE_XCHG, + }, + [0x08] = { + .op_type = VIE_OP_TYPE_OR, + .op_flags = VIE_OP_F_BYTE_OP, + }, + [0x09] = { + .op_type = VIE_OP_TYPE_OR, + }, +}; + +/* struct vie.mod */ +#define VIE_MOD_INDIRECT 0U +#define VIE_MOD_INDIRECT_DISP8 1U +#define VIE_MOD_INDIRECT_DISP32 2U +#define VIE_MOD_DIRECT 3U + +/* struct vie.rm */ +#define VIE_RM_SIB 4U +#define VIE_RM_DISP32 5U + +static uint64_t size2mask[9] = { + [1] = (1UL << 8U) - 1UL, + [2] = (1UL << 16U) - 1UL, + [4] = (1UL << 32U) - 1UL, + [8] = ~0UL, +}; + +#define VMX_INVALID_VMCS_FIELD 0xffffffffU + +/* + * This struct vmcs_seg_field is defined separately to hold the vmcs field + * address of segment selector. + */ +struct vmcs_seg_field { + uint32_t base_field; + uint32_t limit_field; + uint32_t access_field; +}; + +/* + * The 'access' field has the format specified in Table 21-2 of the Intel + * Architecture Manual vol 3b. + * + * XXX The contents of the 'access' field are architecturally defined except + * bit 16 - Segment Unusable. + */ +struct seg_desc { + uint64_t base; + uint32_t limit; + uint32_t access; +}; + +static inline struct acrn_mmio_request *vcpu_mmio_req(struct vmrt_vm_vcpu *vcpu) +{ + return (struct acrn_mmio_request *)(vcpu->mmio_request); +} + +static inline uint32_t seg_desc_type(uint32_t access) +{ + return (access & 0x001fU); +} + +static uint64_t vm_get_register(struct vmrt_vm_vcpu *vcpu, enum cpu_reg_name reg) +{ + volatile struct vm_vcpu_shared_region *regs = vcpu->shared_region; + uint64_t reg_val = 0UL; + + switch (reg) + { + case CPU_REG_RAX: + reg_val = regs->ax; + break; + case CPU_REG_RCX: + reg_val = regs->cx; + break; + case CPU_REG_RDX: + reg_val = regs->dx; + break; + case CPU_REG_RBX: + reg_val = regs->bx; + break; + case CPU_REG_RSP: + reg_val = regs->sp; + break; + case CPU_REG_RBP: + reg_val = regs->bp; + break; + case CPU_REG_RSI: + reg_val = regs->si; + break; + case CPU_REG_RDI: + reg_val = regs->di; + break; + case CPU_REG_R8: + reg_val = regs->r8; + break; + case CPU_REG_R9: + reg_val = regs->r9; + break; + case CPU_REG_R10: + reg_val = regs->r10; + break; + case CPU_REG_R11: + reg_val = regs->r11; + break; + case CPU_REG_R12: + reg_val = regs->r12; + break; + case CPU_REG_R13: + reg_val = regs->r13; + break; + case CPU_REG_R14: + reg_val = regs->r14; + break; + case CPU_REG_R15: + reg_val = regs->r15; + break; + default: + VM_PANIC(vcpu); + break; + } + + return reg_val; +} + +static void vm_set_register(struct vmrt_vm_vcpu *vcpu, enum cpu_reg_name reg, + uint64_t val) +{ + volatile struct vm_vcpu_shared_region *regs = vcpu->shared_region; + + switch (reg) + { + case CPU_REG_RAX: + regs->ax = val; + break; + case CPU_REG_RCX: + regs->cx = val; + break; + case CPU_REG_RDX: + regs->dx = val; + break; + case CPU_REG_RBX: + regs->bx = val; + break; + case CPU_REG_RSP: + regs->sp = val; + break; + case CPU_REG_RBP: + regs->bp = val; + break; + case CPU_REG_RSI: + regs->si = val; + break; + case CPU_REG_RDI: + regs->di = val; + break; + case CPU_REG_R8: + regs->r8 = val; + break; + case CPU_REG_R9: + regs->r9 = val; + break; + case CPU_REG_R10: + regs->r10 = val; + break; + case CPU_REG_R11: + regs->r11 = val; + break; + case CPU_REG_R12: + regs->r12 = val; + break; + case CPU_REG_R13: + regs->r13 = val; + break; + case CPU_REG_R14: + regs->r14 = val; + break; + case CPU_REG_R15: + regs->r15 = val; + break; + default: + VM_PANIC(vcpu); + break; + } +} + +static int32_t vie_canonical_check(uint64_t gla) +{ + int32_t ret = 0; + uint64_t mask; + + /* + * The value of the bit 47 in the 'gla' should be replicated in the + * most significant 16 bits. + */ + mask = ~((1UL << 48U) - 1UL); + if ((gla & (1UL << 47U)) != 0U) { + ret = ((gla & mask) != mask) ? 1 : 0; + } else { + ret = ((gla & mask) != 0U) ? 1 : 0; + } + + return ret; +} + +/* + * @pre vcpu != NULL + */ +static inline void vie_mmio_read(struct vmrt_vm_vcpu *vcpu, uint64_t *rval) +{ + *rval = vcpu_mmio_req(vcpu)->value; +} + +/* + * @pre vcpu != NULL + */ +static inline void vie_mmio_write(struct vmrt_vm_vcpu *vcpu, uint64_t wval) +{ + vcpu_mmio_req(vcpu)->value = wval; +} + +static void vie_calc_bytereg(const struct instr_emul_vie *vie, + enum cpu_reg_name *reg, int32_t *lhbr) +{ + *lhbr = 0; + *reg = (enum cpu_reg_name)(vie->reg); + + /* + * 64-bit mode imposes limitations on accessing legacy high byte + * registers (lhbr). + * + * The legacy high-byte registers cannot be addressed if the REX + * prefix is present. In this case the values 4, 5, 6 and 7 of the + * 'ModRM:reg' field address %spl, %bpl, %sil and %dil respectively. + * + * If the REX prefix is not present then the values 4, 5, 6 and 7 + * of the 'ModRM:reg' field address the legacy high-byte registers, + * %ah, %ch, %dh and %bh respectively. + */ + if (vie->rex_present == 0U) { + if ((vie->reg & 0x4U) != 0U) { + *lhbr = 1; + *reg = (enum cpu_reg_name)(vie->reg & 0x3U); + } + } +} + +static uint8_t vie_read_bytereg(struct vmrt_vm_vcpu *vcpu, const struct instr_emul_vie *vie) +{ + int32_t lhbr; + uint64_t val; + uint8_t reg_val; + enum cpu_reg_name reg; + + vie_calc_bytereg(vie, ®, &lhbr); + val = vm_get_register(vcpu, reg); + + /* + * To obtain the value of a legacy high byte register shift the + * base register right by 8 bits (%ah = %rax >> 8). + */ + if (lhbr != 0) { + reg_val = (uint8_t)(val >> 8U); + } else { + reg_val = (uint8_t)val; + } + + return reg_val; +} + +static void vie_write_bytereg(struct vmrt_vm_vcpu *vcpu, const struct instr_emul_vie *vie, + uint8_t byte) +{ + uint64_t origval, val, mask; + enum cpu_reg_name reg; + int32_t lhbr; + + vie_calc_bytereg(vie, ®, &lhbr); + origval = vm_get_register(vcpu, reg); + + val = byte; + mask = 0xffU; + if (lhbr != 0) { + /* + * Shift left by 8 to store 'byte' in a legacy high + * byte register. + */ + val <<= 8U; + mask <<= 8U; + } + val |= origval & ~mask; + vm_set_register(vcpu, reg, val); +} + +/** + * @pre vcpu != NULL + * @pre size = 1, 2, 4 or 8 + * @pre ((reg <= CPU_REG_LAST) && (reg >= CPU_REG_FIRST)) + * @pre ((reg != CPU_REG_CR2) && (reg != CPU_REG_IDTR) && (reg != CPU_REG_GDTR)) + */ +static void vie_update_register(struct vmrt_vm_vcpu *vcpu, enum cpu_reg_name reg, + uint64_t val_arg, uint8_t size) +{ + uint64_t origval; + uint64_t val = val_arg; + + switch (size) { + case 1U: + case 2U: + origval = vm_get_register(vcpu, reg); + val &= size2mask[size]; + val |= origval & ~size2mask[size]; + break; + case 4U: + val &= 0xffffffffUL; + break; + default: /* size == 8 */ + break; + } + + vm_set_register(vcpu, reg, val); +} + +#define RFLAGS_STATUS_BITS (PSL_C | PSL_PF | PSL_AF | PSL_Z | PSL_N | PSL_V) + +static void vie_update_rflags(struct vmrt_vm_vcpu *vcpu, uint64_t rflags2, uint64_t psl) +{ + uint8_t size; + uint64_t rflags; + + rflags = vm_get_register(vcpu, CPU_REG_RFLAGS); + + rflags &= ~RFLAGS_STATUS_BITS; + rflags |= rflags2 & psl; + size = 8U; + + vie_update_register(vcpu, CPU_REG_RFLAGS, rflags, size); +} + +/* + * Return the status flags that would result from doing (x - y). + */ +#define build_getcc(name, type) \ +static uint64_t name(type x, type y) \ +{ \ + uint64_t rflags; \ + \ + __asm __volatile("sub %2,%1; pushfq; popq %0" : \ + "=r" (rflags), "+r" (x) : "m" (y)); \ + return rflags; \ +} +build_getcc(getcc8, uint8_t) +build_getcc(getcc16, uint16_t) +build_getcc(getcc32, uint32_t) +build_getcc(getcc64, uint64_t) + +/** + * @pre opsize = 1, 2, 4 or 8 + */ +static uint64_t getcc(uint8_t opsize, uint64_t x, uint64_t y) +{ + uint64_t rflags; + switch (opsize) { + case 1U: + rflags = getcc8((uint8_t) x, (uint8_t) y); + break; + case 2U: + rflags = getcc16((uint16_t) x, (uint16_t) y); + break; + case 4U: + rflags = getcc32((uint32_t) x, (uint32_t) y); + break; + default: /* opsize == 8 */ + rflags = getcc64(x, y); + break; + } + + return rflags; +} + +static int32_t emulate_mov(struct vmrt_vm_vcpu *vcpu, const struct instr_emul_vie *vie) +{ + int32_t error; + uint8_t size; + enum cpu_reg_name reg; + uint8_t byte; + uint64_t val; + + size = vie->opsize; + error = 0; + switch (vie->opcode) { + case 0x88U: + /* + * MOV byte from reg (ModRM:reg) to mem (ModRM:r/m) + * 88/r: mov r/m8, r8 + * REX + 88/r: mov r/m8, r8 (%ah, %ch, %dh, %bh not available) + */ + byte = vie_read_bytereg(vcpu, vie); + vie_mmio_write(vcpu, byte); + break; + case 0x89U: + /* + * MOV from reg (ModRM:reg) to mem (ModRM:r/m) + * 89/r: mov r/m16, r16 + * 89/r: mov r/m32, r32 + * REX.W + 89/r mov r/m64, r64 + */ + + reg = (enum cpu_reg_name)(vie->reg); + val = vm_get_register(vcpu, reg); + val &= size2mask[size]; + vie_mmio_write(vcpu, val); + break; + case 0x8AU: + /* + * MOV byte from mem (ModRM:r/m) to reg (ModRM:reg) + * 8A/r: mov r8, r/m8 + * REX + 8A/r: mov r8, r/m8 + */ + vie_mmio_read(vcpu, &val); + vie_write_bytereg(vcpu, vie, (uint8_t)val); + break; + case 0x8BU: + /* + * MOV from mem (ModRM:r/m) to reg (ModRM:reg) + * 8B/r: mov r16, r/m16 + * 8B/r: mov r32, r/m32 + * REX.W 8B/r: mov r64, r/m64 + */ + vie_mmio_read(vcpu, &val); + reg = (enum cpu_reg_name)(vie->reg); + vie_update_register(vcpu, reg, val, size); + break; + case 0xA1U: + /* + * MOV from seg:moffset to AX/EAX/RAX + * A1: mov AX, moffs16 + * A1: mov EAX, moffs32 + * REX.W + A1: mov RAX, moffs64 + */ + vie_mmio_read(vcpu, &val); + reg = CPU_REG_RAX; + vie_update_register(vcpu, reg, val, size); + break; + case 0xA3U: + /* + * MOV from AX/EAX/RAX to seg:moffset + * A3: mov moffs16, AX + * A3: mov moffs32, EAX + * REX.W + A3: mov moffs64, RAX + */ + val = vm_get_register(vcpu, CPU_REG_RAX); + val &= size2mask[size]; + vie_mmio_write(vcpu, val); + break; + case 0xC6U: + /* + * MOV from imm8 to mem (ModRM:r/m) + * C6/0 mov r/m8, imm8 + * REX + C6/0 mov r/m8, imm8 + */ + vie_mmio_write(vcpu, (uint64_t)vie->immediate); + break; + case 0xC7U: + /* + * MOV from imm16/imm32 to mem (ModRM:r/m) + * C7/0 mov r/m16, imm16 + * C7/0 mov r/m32, imm32 + * REX.W + C7/0 mov r/m64, imm32 + * (sign-extended to 64-bits) + */ + val = (uint64_t)(vie->immediate) & size2mask[size]; + vie_mmio_write(vcpu, val); + break; + default: + /* + * For the opcode that is not handled (an invalid opcode), the + * error code is assigned to a default value (-EINVAL). + * Gracefully return this error code if prior case clauses have + * not been met. + */ + error = -EINVAL; + break; + } + + return error; +} + +static void copy_from_gva(struct vmrt_vm_vcpu *vcpu, void *buf, u64_t gva, u32_t len) +{ + void *src = GPA2HVA(vmrt_vm_gva2gpa(vcpu, gva), vcpu->vm); + memcpy(buf, src, len); +} + +static int32_t vie_init(struct instr_emul_vie *vie, struct vmrt_vm_vcpu *vcpu) +{ + volatile struct vm_vcpu_shared_region *regs = vcpu->shared_region; + u64_t inst_len = regs->inst_length; + int32_t ret; + + if ((inst_len > VIE_INST_SIZE) || (inst_len == 0U)) { + VM_PANIC(vcpu); + } else { + (void)memset(vie, 0U, sizeof(struct instr_emul_vie)); + + /* init register fields in vie. */ + vie->base_register = CPU_REG_LAST; + vie->index_register = CPU_REG_LAST; + vie->segment_register = CPU_REG_LAST; + + copy_from_gva(vcpu, vie->inst, regs->ip, inst_len); + /* + * Use this to print the inst binary to verify if the decodeed inst is correct + * + printc("inst to be decode: "); + for (u64_t i = 0; i < inst_len; i++) { + printc("%x ", vie->inst[i]); + } + printc("\ninst vie init done\n"); + */ + + vie->num_valid = (uint8_t)inst_len; + ret = 0; + } + + return ret; +} + +static int32_t vie_peek(const struct instr_emul_vie *vie, uint8_t *x) +{ + int32_t ret; + if (vie->num_processed < vie->num_valid) { + *x = vie->inst[vie->num_processed]; + ret = 0; + } else { + ret = -1; + } + return ret; +} + +static void vie_advance(struct instr_emul_vie *vie) +{ + + vie->num_processed++; +} + +static bool segment_override(uint8_t x, enum cpu_reg_name *seg) +{ + bool override = true; + switch (x) { + case 0x2EU: + *seg = CPU_REG_CS; + break; + case 0x36U: + *seg = CPU_REG_SS; + break; + case 0x3EU: + *seg = CPU_REG_DS; + break; + case 0x26U: + *seg = CPU_REG_ES; + break; + case 0x64U: + *seg = CPU_REG_FS; + break; + case 0x65U: + *seg = CPU_REG_GS; + break; + default: + override = false; + break; + } + return override; +} + +static void decode_op_and_addr_size(struct instr_emul_vie *vie) +{ + /* + * Section "Operand-Size And Address-Size Attributes", Intel SDM, Vol 1 + */ + + /* + * Default address size is 64-bits and default operand size + * is 32-bits. + */ + vie->addrsize = ((vie->addrsize_override != 0U) ? 4U : 8U); + if (vie->rex_w != 0U) { + vie->opsize = 8U; + } else if (vie->opsize_override != 0U) { + vie->opsize = 2U; + } else { + vie->opsize = 4U; + } +} +static int32_t decode_prefixes(struct instr_emul_vie *vie) +{ + uint8_t x, i; + int32_t ret = 0; + + for (i = 0U; i < VIE_PREFIX_SIZE; i++) { + if (vie_peek(vie, &x) != 0) { + ret = -1; + break; + } else { + if (x == 0x66U) { + vie->opsize_override = 1U; + } else if (x == 0x67U) { + vie->addrsize_override = 1U; + } else if (x == 0xF3U) { + vie->repz_present = 1U; + } else if (x == 0xF2U) { + vie->repnz_present = 1U; + } else if (segment_override(x, &vie->segment_register)) { + vie->seg_override = 1U; + } else { + break; + } + + vie_advance(vie); + } + } + + if (ret == 0) { + /* + * From section 2.2.1, "REX Prefixes", Intel SDM Vol 2: + * - Only one REX prefix is allowed per instruction. + * - The REX prefix must immediately precede the opcode byte or the + * escape opcode byte. + * - If an instruction has a mandatory prefix (0x66, 0xF2 or 0xF3) + * the mandatory prefix must come before the REX prefix. + */ + if ( (x >= 0x40U) && (x <= 0x4FU)) { + vie->rex_present = 1U; + vie->rex_w = (x >> 0x3U) & 1U; + vie->rex_r = (x >> 0x2U) & 1U; + vie->rex_x = (x >> 0x1U) & 1U; + vie->rex_b = (x >> 0x0U) & 1U; + vie_advance(vie); + } + decode_op_and_addr_size(vie); + } + + return ret; +} + +static int32_t decode_two_byte_opcode(struct instr_emul_vie *vie) +{ + int32_t ret = 0; + uint8_t x; + + if (vie_peek(vie, &x) != 0) { + ret = -1; + } else { + vie->opcode = x; + vie->op = two_byte_opcodes[x]; + + if (vie->op.op_type == VIE_OP_TYPE_NONE) { + ret = -1; + } else { + vie_advance(vie); + } + } + + return ret; +} + +static int32_t decode_opcode(struct instr_emul_vie *vie) +{ + int32_t ret = 0; + uint8_t x; + + if (vie_peek(vie, &x) != 0) { + ret = -1; + } else { + vie->opcode = x; + vie->op = one_byte_opcodes[x]; + + if (vie->op.op_type == VIE_OP_TYPE_NONE) { + ret = -1; + } else { + vie_advance(vie); + + if (vie->op.op_type == VIE_OP_TYPE_TWO_BYTE) { + ret = decode_two_byte_opcode(vie); + } + } + } + + return ret; +} + +static int32_t decode_modrm(struct instr_emul_vie *vie) +{ + uint8_t x; + int32_t ret; + + if ((vie->op.op_flags & VIE_OP_F_NO_MODRM) != 0U) { + ret = 0; + } else if (vie_peek(vie, &x) != 0) { + ret = -1; + } else { + vie->mod = (x >> 6U) & 0x3U; + vie->rm = (x >> 0U) & 0x7U; + vie->reg = (x >> 3U) & 0x7U; + + /* + * A direct addressing mode makes no sense in the context of an EPT + * fault. There has to be a memory access involved to cause the + * EPT fault. + */ + if (vie->mod == VIE_MOD_DIRECT) { + ret = -1; + } else { + if (((vie->mod == VIE_MOD_INDIRECT) && (vie->rm == VIE_RM_DISP32)) || + ((vie->mod != VIE_MOD_DIRECT) && (vie->rm == VIE_RM_SIB))) { + /* + * Table 2-5: Special Cases of REX Encodings + * + * mod=0, r/m=5 is used in the compatibility mode to + * indicate a disp32 without a base register. + * + * mod!=3, r/m=4 is used in the compatibility mode to + * indicate that the SIB byte is present. + * + * The 'b' bit in the REX prefix is don't care in + * this case. + */ + } else { + vie->rm |= (vie->rex_b << 3U); + } + + vie->reg |= (vie->rex_r << 3U); + + /* SIB */ + if ((vie->mod != VIE_MOD_DIRECT) && (vie->rm == VIE_RM_SIB)) { + /* done */ + } else { + vie->base_register = (enum cpu_reg_name)vie->rm; + + switch (vie->mod) { + case VIE_MOD_INDIRECT_DISP8: + vie->disp_bytes = 1U; + break; + case VIE_MOD_INDIRECT_DISP32: + vie->disp_bytes = 4U; + break; + case VIE_MOD_INDIRECT: + if (vie->rm == VIE_RM_DISP32) { + vie->disp_bytes = 4U; + /* + * Table 2-7. RIP-Relative Addressing + * + * In 64-bit mode mod=00 r/m=101 implies [rip] + disp32 + * whereas in compatibility mode it just implies disp32. + */ + + vie->base_register = CPU_REG_RIP; + printc("VM exit with RIP as indirect access"); + assert(0); + } + break; + default: + /* VIE_MOD_DIRECT */ + break; + } + + } + vie_advance(vie); + + ret = 0; + } + } + + return ret; +} + +static int32_t decode_sib(struct instr_emul_vie *vie) +{ + uint8_t x; + int32_t ret; + + /* Proceed only if SIB byte is present */ + if ((vie->mod == VIE_MOD_DIRECT) || (vie->rm != VIE_RM_SIB)) { + ret = 0; + } else if (vie_peek(vie, &x) != 0) { + ret = -1; + } else { + + /* De-construct the SIB byte */ + vie->ss = (x >> 6U) & 0x3U; + vie->index = (x >> 3U) & 0x7U; + vie->base = (x >> 0U) & 0x7U; + + /* Apply the REX prefix modifiers */ + vie->index |= vie->rex_x << 3U; + vie->base |= vie->rex_b << 3U; + + switch (vie->mod) { + case VIE_MOD_INDIRECT_DISP8: + vie->disp_bytes = 1U; + break; + case VIE_MOD_INDIRECT_DISP32: + vie->disp_bytes = 4U; + break; + default: + /* + * All possible values of 'vie->mod': + * 1. VIE_MOD_DIRECT + * has been handled at the start of this function + * 2. VIE_MOD_INDIRECT_DISP8 + * has been handled in prior case clauses + * 3. VIE_MOD_INDIRECT_DISP32 + * has been handled in prior case clauses + * 4. VIE_MOD_INDIRECT + * will be handled later after this switch statement + */ + break; + } + + if ((vie->mod == VIE_MOD_INDIRECT) && ((vie->base == 5U) || (vie->base == 13U))) { + /* + * Special case when base register is unused if mod = 0 + * and base = %rbp or %r13. + * + * Documented in: + * Table 2-3: 32-bit Addressing Forms with the SIB Byte + * Table 2-5: Special Cases of REX Encodings + */ + vie->disp_bytes = 4U; + } else { + vie->base_register = (enum cpu_reg_name)vie->base; + } + + /* + * All encodings of 'index' are valid except for %rsp (4). + * + * Documented in: + * Table 2-3: 32-bit Addressing Forms with the SIB Byte + * Table 2-5: Special Cases of REX Encodings + */ + if (vie->index != 4U) { + vie->index_register = (enum cpu_reg_name)vie->index; + } + + /* 'scale' makes sense only in the context of an index register */ + if (vie->index_register < CPU_REG_LAST) { + vie->scale = 1U << vie->ss; + } + + vie_advance(vie); + + ret = 0; + } + + return ret; +} + +static int32_t decode_displacement(struct instr_emul_vie *vie) +{ + uint8_t n, i, x; + int32_t ret = 0; + + union { + uint8_t buf[4]; + int8_t signed8; + int32_t signed32; + } u; + + n = vie->disp_bytes; + if (n != 0U) { + if ((n != 1U) && (n != 4U)) { + printc("%s: decode_displacement: invalid disp_bytes %d", __func__, n); + ret = -EINVAL; + } else { + + for (i = 0U; i < n; i++) { + if (vie_peek(vie, &x) != 0) { + ret = -1; + break; + } + + u.buf[i] = x; + vie_advance(vie); + } + + if (ret == 0) { + if (n == 1U) { + vie->displacement = u.signed8; /* sign-extended */ + } else { + vie->displacement = u.signed32; /* sign-extended */ + } + } + } + } + + return ret; +} + +static int32_t decode_immediate(struct instr_emul_vie *vie) +{ + uint8_t i, n, x; + int32_t ret = 0; + union { + uint8_t buf[4]; + int8_t signed8; + int16_t signed16; + int32_t signed32; + } u; + + /* Figure out immediate operand size (if any) */ + if ((vie->op.op_flags & VIE_OP_F_IMM) != 0U) { + /* + * Section 2.2.1.5 "Immediates", Intel SDM: + * In 64-bit mode the typical size of immediate operands + * remains 32-bits. When the operand size if 64-bits, the + * processor sign-extends all immediates to 64-bits prior + * to their use. + */ + if ((vie->opsize == 4U) || (vie->opsize == 8U)) { + vie->imm_bytes = 4U; + } + else { + vie->imm_bytes = 2U; + } + } else if ((vie->op.op_flags & VIE_OP_F_IMM8) != 0U) { + vie->imm_bytes = 1U; + } else { + /* No op_flag on immediate operand size */ + } + + n = vie->imm_bytes; + if (n != 0U) { + if ((n != 1U) && (n != 2U) && (n != 4U)) { + printc("%s: invalid number of immediate bytes: %d", __func__, n); + ret = -EINVAL; + } else { + for (i = 0U; i < n; i++) { + if (vie_peek(vie, &x) != 0) { + ret = -1; + break; + } + + u.buf[i] = x; + vie_advance(vie); + } + + if (ret == 0) { + /* sign-extend the immediate value before use */ + if (n == 1U) { + vie->immediate = u.signed8; + } else if (n == 2U) { + vie->immediate = u.signed16; + } else { + vie->immediate = u.signed32; + } + } + } + } + + return ret; +} + +static int32_t decode_moffset(struct instr_emul_vie *vie) +{ + uint8_t i, n, x; + int32_t ret = 0; + union { + uint8_t buf[8]; + uint64_t u64; + } u; + + if ((vie->op.op_flags & VIE_OP_F_MOFFSET) != 0U) { + /* + * Section 2.2.1.4, "Direct Memory-Offset MOVs", Intel SDM: + * The memory offset size follows the address-size of the instruction. + */ + n = vie->addrsize; + if ((n != 2U) && (n != 4U) && (n != 8U)) { + printc("%s: invalid moffset bytes: %hhu", __func__, n); + ret = -EINVAL; + } else { + u.u64 = 0UL; + for (i = 0U; i < n; i++) { + if (vie_peek(vie, &x) != 0) { + ret = -1; + break; + } + + u.buf[i] = x; + vie_advance(vie); + } + if (ret == 0) { + vie->displacement = (int64_t)u.u64; + } + } + } + + return ret; +} + +static int32_t local_decode_instruction(struct instr_emul_vie *vie) +{ + int32_t ret; + + if (decode_prefixes(vie) != 0) { + ret = -1; + } else if (decode_opcode(vie) != 0) { + ret = -1; + } else if (decode_modrm(vie) != 0) { + ret = -1; + } else if (decode_sib(vie) != 0) { + ret = -1; + } else if (decode_displacement(vie) != 0) { + ret = -1; + } else if (decode_immediate(vie) != 0) { + ret = -1; + } else if (decode_moffset(vie) != 0) { + ret = -1; + } else { + vie->decoded = 1U; /* success */ + ret = 0; + } + + return ret; +} + +static int32_t instr_check_gva(struct vmrt_vm_vcpu *vcpu) +{ + int32_t ret = 0; + uint64_t base, segbase, idx, gva; + enum cpu_reg_name seg; + struct instr_emul_vie *vie = &((struct instr_emul_ctxt *)vcpu->inst_ctxt)->vie; + + base = 0UL; + if (vie->base_register != CPU_REG_LAST) { + base = vm_get_register(vcpu, vie->base_register); + + /* RIP relative addressing starts from the + * following instruction + */ + if (vie->base_register == CPU_REG_RIP) { + base += vie->num_processed; + } + + } + + idx = 0UL; + if (vie->index_register != CPU_REG_LAST) { + idx = vm_get_register(vcpu, vie->index_register); + } + + /* "Specifying a Segment Selector" of SDM Vol1 3.7.4 + * + * In legacy IA-32 mode, when ESP or EBP register is used as + * base, the SS segment is default segment. + * + * All data references, except when relative to stack or + * string destination, DS is default segment. + * + * segment override could overwrite the default segment + * + * 64bit mode, segmentation is generally disabled. The + * exception are FS and GS. + */ + if (vie->seg_override != 0U) { + seg = vie->segment_register; + } else if ((vie->base_register == CPU_REG_RSP) || + (vie->base_register == CPU_REG_RBP)) { + seg = CPU_REG_SS; + } else { + seg = CPU_REG_DS; + } + + if ((seg != CPU_REG_FS) && + (seg != CPU_REG_GS)) { + segbase = 0UL; + } else { + struct seg_desc desc; + + VM_PANIC(vcpu); + segbase = desc.base; + } + + gva = segbase + base + (uint64_t)vie->scale * idx + (uint64_t)vie->displacement; + + vie->gva = gva; + + if (vie_canonical_check(gva) != 0) { + VM_PANIC(vcpu); + } else { + #define PAGE_FAULT_WR_FLAG 0x00000002U + + vmrt_vm_gva2gpa(vcpu, gva); + ret = 0; + if (ret < 0) { + VM_PANIC(vcpu); + } else { + ret = 0; + } + } + + return ret; +} + +int32_t decode_instruction(struct vmrt_vm_vcpu *vcpu) +{ + struct instr_emul_ctxt *emul_ctxt; + uint32_t csar; + int32_t retval; + + emul_ctxt = vcpu->inst_ctxt; + retval = vie_init(&emul_ctxt->vie, vcpu); + + if (retval < 0) { + VM_PANIC(vcpu); + } else { + retval = local_decode_instruction(&emul_ctxt->vie); + + if (retval != 0) { + VM_PANIC(vcpu); + } else { + /* + * We do operand check in instruction decode phase and + * inject exception accordingly. In late instruction + * emulation, it will always success. + * + * We only need to do dst check for movs. For other instructions, + * they always has one register and one mmio which trigger EPT + * by access mmio. With VMX enabled, the related check is done + * by VMX itself before hit EPT violation. + * + */ + if ((emul_ctxt->vie.op.op_flags & VIE_OP_F_CHECK_GVA_DI) != 0U) { + VM_PANIC(vcpu); + } else { + retval = instr_check_gva(vcpu); + } + + if (retval >= 0) { + /* return the Memory Operand byte size */ + if ((emul_ctxt->vie.op.op_flags & VIE_OP_F_BYTE_OP) != 0U) { + retval = 1; + } else if ((emul_ctxt->vie.op.op_flags & VIE_OP_F_WORD_OP) != 0U) { + retval = 2; + } else { + retval = (int32_t)emul_ctxt->vie.opsize; + } + } + } + } + + return retval; +} + +int32_t emulate_instruction(struct vmrt_vm_vcpu *vcpu) +{ + struct instr_emul_vie *vie = &((struct instr_emul_ctxt *)vcpu->inst_ctxt)->vie; + int32_t error; + + if (vie->decoded != 0U) { + switch (vie->op.op_type) { + case VIE_OP_TYPE_MOV: + error = emulate_mov(vcpu, vie); + break; + default: + VM_PANIC(vcpu); + error = -EINVAL; + break; + } + } else { + VM_PANIC(vcpu); + error = -EINVAL; + } + + return error; +} diff --git a/src/components/implementation/simple_vmm/nf_multicore/instr_emul.h b/src/components/implementation/simple_vmm/nf_multicore/instr_emul.h new file mode 100644 index 0000000000..901428dcb4 --- /dev/null +++ b/src/components/implementation/simple_vmm/nf_multicore/instr_emul.h @@ -0,0 +1,95 @@ +/*- + * Copyright (c) 2012 NetApp, Inc. + * Copyright (c) 2017-2022 Intel Corporation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef INSTR_EMUL_H +#define INSTR_EMUL_H + +#include +#include + +struct vmrt_vm_vcpu; +struct instr_emul_vie_op { + uint8_t op_type; /* type of operation (e.g. MOV) */ + uint16_t op_flags; +}; + +#define VIE_PREFIX_SIZE 4U +#define VIE_INST_SIZE 15U +struct instr_emul_vie { + uint8_t inst[VIE_INST_SIZE]; /* instruction bytes */ + uint8_t num_valid; /* size of the instruction */ + uint8_t num_processed; + + uint8_t addrsize:4, opsize:4; /* address and operand sizes */ + uint8_t rex_w:1, /* REX prefix */ + rex_r:1, + rex_x:1, + rex_b:1, + rex_present:1, + repz_present:1, /* REP/REPE/REPZ prefix */ + repnz_present:1, /* REPNE/REPNZ prefix */ + opsize_override:1, /* Operand size override */ + addrsize_override:1, /* Address size override */ + seg_override:1; /* Segment override */ + + uint8_t mod:2, /* ModRM byte */ + reg:4, + rm:4; + + uint8_t ss:2, /* SIB byte */ + index:4, + base:4; + + uint8_t disp_bytes; + uint8_t imm_bytes; + + uint8_t scale; + enum cpu_reg_name base_register; /* CPU_REG_xyz */ + enum cpu_reg_name index_register; /* CPU_REG_xyz */ + enum cpu_reg_name segment_register; /* CPU_REG_xyz */ + + int64_t displacement; /* optional addr displacement */ + int64_t immediate; /* optional immediate operand */ + + uint8_t decoded; /* set to 1 if successfully decoded */ + + uint8_t opcode; + struct instr_emul_vie_op op; /* opcode description */ + + uint64_t dst_gpa; /* saved dst operand gpa. Only for movs */ + uint64_t gva; /* saved gva for instruction emulation */ +}; + +struct instr_emul_ctxt { + struct instr_emul_vie vie; +}; + +int32_t emulate_instruction(struct vmrt_vm_vcpu *vcpu); +int32_t decode_instruction(struct vmrt_vm_vcpu *vcpu); + +#endif diff --git a/src/components/implementation/simple_vmm/nf_multicore/ioapic.h b/src/components/implementation/simple_vmm/nf_multicore/ioapic.h new file mode 100644 index 0000000000..55b214a1e4 --- /dev/null +++ b/src/components/implementation/simple_vmm/nf_multicore/ioapic.h @@ -0,0 +1,99 @@ +/* + * Copyright (C) 2018-2022 Intel Corporation. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef ARCH_X86_IOAPIC_H +#define ARCH_X86_IOAPIC_H + +#include + +#define NR_LEGACY_IRQ 16U +#define NR_LEGACY_PIN NR_LEGACY_IRQ + +struct ioapic_info { + uint8_t id; /* IOAPIC ID as indicated in ACPI MADT */ + uint32_t addr; /* IOAPIC Register address */ + uint32_t gsi_base; /* Global System Interrupt where this IO-APIC's interrupt input start */ + uint32_t nr_pins; /* Number of Interrupt inputs as determined by Max. Redir Entry Register */ +}; + +void ioapic_setup_irqs(void); + +bool is_ioapic_irq(uint32_t irq); +uint32_t gsi_to_ioapic_pin(uint32_t gsi); +int32_t init_ioapic_id_info(void); +uint8_t ioapic_irq_to_ioapic_id(uint32_t irq); + +uint8_t get_platform_ioapic_info (struct ioapic_info **plat_ioapic_info); + +/** + * @defgroup ioapic_ext_apis IOAPIC External Interfaces + * + * This is a group that includes IOAPIC External Interfaces. + * + * @{ + */ + +/** + * @brief Get irq num from gsi num + * + * @param[in] gsi The gsi number + * + * @return irq number + */ +uint32_t ioapic_gsi_to_irq(uint32_t gsi); +/** + * @brief Set the redirection table entry + * + * Set the redirection table entry of an interrupt + * + * @param[in] irq The number of irq to set + * @param[in] rte Union of ioapic_rte to set + */ +void ioapic_set_rte(uint32_t irq, union ioapic_rte rte); + +/** + * @brief Get the redirection table entry + * + * Get the redirection table entry of an interrupt + * + * @param[in] irq The number of irq to fetch RTE + * @param[inout] rte Pointer to union ioapic_rte to return result RTE + * + * @pre rte != NULL + */ +void ioapic_get_rte(uint32_t irq, union ioapic_rte *rte); + +/** + * @brief Suspend ioapic + * + * Suspend ioapic, mainly save the RTEs. + */ +void suspend_ioapic(void); + +/** + * @brief Resume ioapic + * + * Resume ioapic, mainly restore the RTEs. + */ +void resume_ioapic(void); + +/** + * @} + */ +/* End of ioapic_ext_apis */ + +void ioapic_gsi_mask_irq(uint32_t irq); +void ioapic_gsi_unmask_irq(uint32_t irq); + +void ioapic_get_rte_entry(void *ioapic_base, uint32_t pin, union ioapic_rte *rte); + +void *gsi_to_ioapic_base(uint32_t gsi); +uint32_t get_max_nr_gsi(void); +uint8_t get_gsi_to_ioapic_index(uint32_t gsi); +uint32_t get_pic_pin_from_ioapic_pin(uint32_t pin_index); +bool is_gsi_valid(uint32_t gsi); + +#endif /* ARCH_X86_IOAPIC_H */ diff --git a/src/components/implementation/simple_vmm/nf_multicore/irq.h b/src/components/implementation/simple_vmm/nf_multicore/irq.h new file mode 100644 index 0000000000..06c21c902a --- /dev/null +++ b/src/components/implementation/simple_vmm/nf_multicore/irq.h @@ -0,0 +1,136 @@ +/* + * Copyright (C) 2018-2022 Intel Corporation. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef ARCH_X86_IRQ_H +#define ARCH_X86_IRQ_H + +#include + +/** + * @file arch/x86/asm/irq.h + * + * @brief public APIs for x86 IRQ handling + */ + +#define DBG_LEVEL_PTIRQ 6U +#define DBG_LEVEL_IRQ 6U + +#define NR_MAX_VECTOR 0xFFU +#define VECTOR_INVALID (NR_MAX_VECTOR + 1U) + +/* # of NR_STATIC_MAPPINGS_1 entries for timer, vcpu notify, and PMI */ +#define NR_STATIC_MAPPINGS_1 3U + +/* + * The static IRQ/Vector mapping table in irq.c consists of the following entries: + * # of NR_STATIC_MAPPINGS_1 entries for timer, vcpu notify, and PMI + * + * # of CONFIG_MAX_VM_NUM entries for posted interrupt notification, platform + * specific but known at build time: + * Allocate unique Activation Notification Vectors (ANV) for each vCPU that belongs + * to the same pCPU, the ANVs need only be unique within each pCPU, not across all + * vCPUs. The max numbers of vCPUs may be running on top of a pCPU is CONFIG_MAX_VM_NUM, + * since ACRN does not support 2 vCPUs of same VM running on top of same pCPU. + * This reduces # of pre-allocated ANVs for posted interrupts to CONFIG_MAX_VM_NUM, + * and enables ACRN to avoid switching between active and wake-up vector values + * in the posted interrupt descriptor on vCPU scheduling state changes. + */ +#define NR_STATIC_MAPPINGS (NR_STATIC_MAPPINGS_1 + CONFIG_MAX_VM_NUM) + +#define HYPERVISOR_CALLBACK_HSM_VECTOR 0xF3U + +/* vectors range for dynamic allocation, usually for devices */ +#define VECTOR_DYNAMIC_START 0x20U +#define VECTOR_DYNAMIC_END 0xDFU + +/* vectors range for fixed vectors, usually for HV service */ +#define VECTOR_FIXED_START 0xE0U +#define VECTOR_FIXED_END 0xFFU + +#define TIMER_VECTOR (VECTOR_FIXED_START) +#define NOTIFY_VCPU_VECTOR (VECTOR_FIXED_START + 1U) +#define PMI_VECTOR (VECTOR_FIXED_START + 2U) +/* + * Starting vector for posted interrupts + * # of CONFIG_MAX_VM_NUM (POSTED_INTR_VECTOR ~ (POSTED_INTR_VECTOR + CONFIG_MAX_VM_NUM - 1U)) + * consecutive vectors reserved for posted interrupts + */ +#define POSTED_INTR_VECTOR (VECTOR_FIXED_START + NR_STATIC_MAPPINGS_1) + +#define TIMER_IRQ (NR_IRQS - 1U) +#define NOTIFY_VCPU_IRQ (NR_IRQS - 2U) +#define PMI_IRQ (NR_IRQS - 3U) +/* + * Starting IRQ for posted interrupts + * # of CONFIG_MAX_VM_NUM (POSTED_INTR_IRQ ~ (POSTED_INTR_IRQ + CONFIG_MAX_VM_NUM - 1U)) + * consecutive IRQs reserved for posted interrupts + */ +#define POSTED_INTR_IRQ (NR_IRQS - NR_STATIC_MAPPINGS_1 - CONFIG_MAX_VM_NUM) + +/* the maximum number of msi entry is 2048 according to PCI + * local bus specification + */ +#define MAX_MSI_ENTRY 0x800U + +#define INVALID_INTERRUPT_PIN 0xffffffffU + +/* + * x86 irq data + */ +struct x86_irq_data { + uint32_t vector; /**< assigned vector */ +#ifdef PROFILING_ON + uint64_t ctx_rip; + uint64_t ctx_rflags; + uint64_t ctx_cs; +#endif +}; + +struct intr_excp_ctx; + +/** + * @brief Allocate a vectror and bind it to irq + * + * For legacy irq (num < 16) and statically mapped ones, do nothing + * if mapping is correct. + * + * @param[in] irq The irq num to bind + * + * @return valid vector num on susccess, VECTOR_INVALID on failure + */ +uint32_t alloc_irq_vector(uint32_t irq); + +/** + * @brief Get vector number of an interrupt from irq number + * + * @param[in] irq The irq_num to convert + * + * @return vector number + */ +uint32_t irq_to_vector(uint32_t irq); + +/** + * @brief Dispatch interrupt + * + * To dispatch an interrupt, an action callback will be called if registered. + * + * @param ctx Pointer to interrupt exception context + */ +void dispatch_interrupt(const struct intr_excp_ctx *ctx); + +/* Arch specific routines called from generic IRQ handling */ + +struct irq_desc; + +void init_irq_descs_arch(struct irq_desc *descs); +void setup_irqs_arch(void); +void init_interrupt_arch(uint16_t pcpu_id); +void free_irq_arch(uint32_t irq); +bool request_irq_arch(uint32_t irq); +void pre_irq_arch(const struct irq_desc *desc); +void post_irq_arch(const struct irq_desc *desc); + +#endif /* ARCH_X86_IRQ_H */ diff --git a/src/components/implementation/simple_vmm/nf_multicore/netio.c b/src/components/implementation/simple_vmm/nf_multicore/netio.c new file mode 100644 index 0000000000..7891fd1ee2 --- /dev/null +++ b/src/components/implementation/simple_vmm/nf_multicore/netio.c @@ -0,0 +1,275 @@ +#include +#include +#include +#include +#include +#include +#include +#include + +shm_bm_objid_t +netio_get_a_packet(u16_t *pkt_len) +{ + struct netshmem_pkt_buf *tx_obj; + shm_bm_t tx_shmemd = 0; + shm_bm_objid_t tx_pktid; + u16_t _pkt_len = 0; + + tx_shmemd = netshmem_get_shm(); + tx_obj = shm_bm_alloc_net_pkt_buf(tx_shmemd, &tx_pktid); + assert(tx_obj); + + virtio_net_send_one_pkt(tx_obj->data, &_pkt_len); + *pkt_len = _pkt_len; + + return tx_pktid; +} + +void pkt_hex_dump(void *_data, u16_t len) +{ + int rowsize = 16; + int i, l, linelen, remaining; + int li = 0; + u8_t *data, ch; + + data = _data; + + printc("Packet hex dump, len:%d\n", len); + remaining = len; + for (i = 0; i < len; i += rowsize) { + printc("%06d\t", li); + + linelen = remaining < rowsize ? remaining : rowsize; + remaining -= rowsize; + + for (l = 0; l < linelen; l++) { + ch = data[l]; + printc( "%02X ", (u32_t) ch); + } + + data += linelen; + li += 10; + + printc( "dump done\n"); + } +} + +#if 0 +shm_bm_objid_t +netio_get_a_packet_batch(u8_t batch_limit) +{ + struct netshmem_pkt_buf *tx_obj; + shm_bm_t tx_shmemd = 0; + shm_bm_objid_t tx_pktid; + u16_t _pkt_len = 0; + shm_bm_objid_t first_objid; + struct netshmem_pkt_buf *first_obj; + struct netshmem_pkt_pri *first_obj_pri; + struct netshmem_meta_tuple *pkt_arr; + u8_t batch_ct = 0; + + tx_shmemd = netshmem_get_shm(); + tx_obj = first_obj = shm_bm_alloc_net_pkt_buf(tx_shmemd, &tx_pktid); + assert(tx_obj); + first_objid = tx_pktid; + first_obj_pri = netshmem_get_pri(tx_obj); + pkt_arr = (struct netshmem_meta_tuple *)&first_obj_pri->pkt_arr; + first_obj_pri->batch_len = 0; + + while (batch_ct < batch_limit) { + assert(tx_obj); + if (likely(batch_ct > 0)) { + tx_obj = shm_bm_alloc_net_pkt_buf(tx_shmemd, &tx_pktid); + assert(tx_obj); + } + + virtio_net_send_one_pkt(netshmem_get_data_buf(tx_obj), &_pkt_len); + + // pkt_hex_dump(netshmem_get_data_buf(tx_obj), _pkt_len); + if (likely(_pkt_len != 0)) { + pkt_arr[batch_ct].obj_id = tx_pktid; + pkt_arr[batch_ct].pkt_len = _pkt_len; + batch_ct++; + } else { + if (batch_ct == 0) { + sched_thd_yield(); + } else { + shm_bm_free_net_pkt_buf(tx_obj); + break; + } + } + } + first_obj_pri->batch_len = batch_ct; + return first_objid; +} +#endif + +struct nf_svc { + int svc_id; + struct vmrt_vm_comp *vm; +}; + +#define MAX_NFS 10 +#define MAX_THD_PER_NF 100 + +static struct nf_svc nf_svc_tbl[MAX_NFS][MAX_THD_PER_NF]; + +void +nf_svc_update(compid_t nf_id, int thd, int svc_id, struct vmrt_vm_comp *vm) +{ + // printc("svc update:%d, %d, %d\n", nf_id, thd, nf_svc_tbl[nf_id][thd].svc_id); + if (nf_svc_tbl[nf_id][thd].svc_id < 0) { + nf_svc_tbl[nf_id][thd].svc_id = svc_id; + nf_svc_tbl[nf_id][thd].vm = vm; + } else { + return; + } +} + +void +nf_svc_init(void) +{ + for (int i = 0; i < MAX_NFS; i++) { + for (int j = 0; j < MAX_THD_PER_NF; j++) { + nf_svc_tbl[i][j].svc_id = -1; + nf_svc_tbl[i][j].vm = NULL; + } + } +} + +#if 1 +shm_bm_objid_t +netio_get_a_packet_batch(u8_t batch_limit) +{ + shm_bm_objid_t first_objid; + struct netshmem_pkt_buf *first_obj; + struct netshmem_pkt_pri *first_obj_pri; + struct netshmem_pkt_buf *tx_obj; + shm_bm_objid_t tx_pktid; + struct netshmem_meta_tuple *pkt_arr; + + struct nf_session *session; + struct nf_pkt_meta_data buf; + u8_t batch_ct = 0; + compid_t vmm_id = cos_compid(); + compid_t nf_id = (compid_t)cos_inv_token(); + if (nf_id == 0) nf_id = vmm_id; + thdid_t nf_thd = cos_thdid(); + + int svc_id = nf_svc_tbl[nf_id][nf_thd].svc_id; + + if (svc_id < 0) { + printc("no svc available for this nf:%d, thd:%d\n", nf_id, nf_thd); + assert(0); + } + + session = get_nf_session(svc_id); + + while (nf_tx_ring_buf_empty(&session->nf_tx_ring_buf)) { + sched_thd_yield(); + } + + assert(nf_tx_ring_buf_dequeue(&session->nf_tx_ring_buf, &buf)); + tx_obj = first_obj = buf.obj; + assert(tx_obj); + tx_pktid = first_objid = buf.objid; + first_obj_pri = netshmem_get_pri(tx_obj); + pkt_arr = (struct netshmem_meta_tuple *)&first_obj_pri->pkt_arr; + first_obj_pri->batch_len = 0; + + pkt_arr[batch_ct].obj_id = tx_pktid; + pkt_arr[batch_ct].pkt_len = buf.pkt_len; + batch_ct++; + + while (batch_ct < batch_limit && nf_tx_ring_buf_dequeue(&session->nf_tx_ring_buf, &buf)) { + pkt_arr[batch_ct].obj_id = buf.objid; + pkt_arr[batch_ct].pkt_len = buf.pkt_len; + batch_ct++; + } + + first_obj_pri->batch_len = batch_ct; + return first_objid; +} +#endif + +int +netio_send_packet(shm_bm_objid_t pktid, u16_t pkt_len) +{ + struct netshmem_pkt_buf *rx_obj; + shm_bm_t rx_shmemd = 0; + + rx_shmemd = netshmem_get_shm(); + + rx_obj = shm_bm_transfer_net_pkt_buf(rx_shmemd, pktid); + virtio_net_rcv_one_pkt(rx_obj->data, pkt_len); + shm_bm_free_net_pkt_buf(rx_obj); + + return 0; +} + + +int +netio_send_packet_batch(shm_bm_objid_t pktid) +{ + struct netshmem_pkt_buf *rx_obj; + shm_bm_objid_t first_objid; + struct netshmem_pkt_buf *first_obj; + struct netshmem_pkt_pri *first_obj_pri; + struct netshmem_meta_tuple *pkt_arr; + u16_t pkt_len; + u8_t batch_tc = 0; + shm_bm_t rx_shmemd = 0; + + rx_shmemd = netshmem_get_shm(); + first_objid = pktid; + + + first_obj = shm_bm_transfer_net_pkt_buf(rx_shmemd, first_objid); + + first_obj_pri = netshmem_get_pri(first_obj); + pkt_arr = (struct netshmem_meta_tuple *)&(first_obj_pri->pkt_arr); + batch_tc = first_obj_pri->batch_len; + + pkt_len = pkt_arr[0].pkt_len; + // pkt_hex_dump(netshmem_get_data_buf(first_obj), pkt_len); + virtio_net_rcv_one_pkt(netshmem_get_data_buf(first_obj), pkt_len); + + for (u8_t i = 1; i < batch_tc; i++) { + pkt_len = pkt_arr[i].pkt_len; + pktid = pkt_arr[i].obj_id; + rx_obj = shm_bm_transfer_net_pkt_buf(rx_shmemd, pktid); + virtio_net_rcv_one_pkt(netshmem_get_data_buf(rx_obj), pkt_len); + shm_bm_free_net_pkt_buf(rx_obj); + } + + shm_bm_free_net_pkt_buf(first_obj); + + return 0; +} + +void +netio_shmem_map(cbuf_t shm_id) +{ + netshmem_map_shmem(shm_id); +} + +extern struct vmrt_vm_comp *vm_list[2]; + +void +netio_svc_update(int svc_id, u32_t vm) +{ + compid_t nf_id = cos_inv_token(); + thdid_t thd = cos_thdid(); + assert(vm < 2); + shm_bm_t tx_shm = netshmem_get_shm(); + assert(tx_shm); + + nf_svc_update(nf_id, thd, svc_id, vm_list[vm]); + + struct nf_session *session; + session = get_nf_session(svc_id); + nf_session_tx_update(session, tx_shm, thd); + sync_sem_init(&session->tx_sem, 0); + + nf_tx_ring_buf_init(&session->nf_tx_ring_buf, NF_TX_PKT_RBUF_NUM, NF_TX_PKT_RING_SZ); +} diff --git a/src/components/implementation/simple_vmm/nf_multicore/nf_session.c b/src/components/implementation/simple_vmm/nf_multicore/nf_session.c new file mode 100644 index 0000000000..a5d56bdb82 --- /dev/null +++ b/src/components/implementation/simple_vmm/nf_multicore/nf_session.c @@ -0,0 +1,74 @@ +#pragma once + +#include + +CK_RING_PROTOTYPE(nf_tx_ring_buf, nf_pkt_meta_data); + +static char ring_buffers[NF_TX_MAX_RING_NUM][NF_TX_PKT_RING_SZ]; +static struct nf_session nf_sessions[MAX_SVC_NUM]; + +void +nf_sessions_init(void) +{ + for (int i = 0; i < MAX_SVC_NUM; i++) { + nf_sessions[i].rx_shmemd = 0; + nf_sessions[i].rx_thd = 0; + nf_sessions[i].tx_shmemd = 0; + nf_sessions[i].tx_thd = 0; + nf_sessions[i].nf_tx_ring_buf.ring = 0; + nf_sessions[i].nf_tx_ring_buf.ringbuf = 0; + + } +} + +void +nf_tx_ring_buf_init(struct nf_tx_ring_buf *pkt_ring_buf, size_t ringbuf_num, size_t ringbuf_sz) +{ + struct ck_ring *buf_addr; + + /* prevent multiple thread from contending memory */ + assert(cos_thdid() < 30); + buf_addr = (struct ck_ring *)&ring_buffers[cos_thdid()]; + + ck_ring_init(buf_addr, ringbuf_num); + + pkt_ring_buf->ring = buf_addr; + pkt_ring_buf->ringbuf = (struct pkt_buf *)((char *)buf_addr + sizeof(struct ck_ring)); +} + +inline int +nf_tx_ring_buf_enqueue(struct nf_tx_ring_buf *pkt_ring_buf, struct nf_pkt_meta_data *buf) +{ + assert(pkt_ring_buf->ring && pkt_ring_buf->ringbuf); + + return CK_RING_ENQUEUE_SPSC(nf_tx_ring_buf, pkt_ring_buf->ring, pkt_ring_buf->ringbuf, buf); +} + +inline int +nf_tx_ring_buf_dequeue(struct nf_tx_ring_buf *pkt_ring_buf, struct nf_pkt_meta_data *buf) +{ + assert(pkt_ring_buf->ring && pkt_ring_buf->ringbuf); + + return CK_RING_DEQUEUE_SPSC(nf_tx_ring_buf, pkt_ring_buf->ring, pkt_ring_buf->ringbuf, buf); +} + +inline int +nf_tx_ring_buf_empty(struct nf_tx_ring_buf *pkt_ring_buf) +{ + assert(pkt_ring_buf->ring); + + return (!ck_ring_size(pkt_ring_buf->ring)); +} + +struct nf_session *get_nf_session(int svc_id) +{ + if (unlikely(svc_id < 0 || svc_id > 1000)) return &nf_sessions[0]; + else return &nf_sessions[svc_id]; +} + +void +nf_session_tx_update(struct nf_session *session, shm_bm_t tx_shmemd, thdid_t tx_thd) +{ + session->tx_shmemd = tx_shmemd; + session->tx_thd = tx_thd; +} diff --git a/src/components/implementation/simple_vmm/nf_multicore/nf_session.h b/src/components/implementation/simple_vmm/nf_multicore/nf_session.h new file mode 100644 index 0000000000..00f81a0d44 --- /dev/null +++ b/src/components/implementation/simple_vmm/nf_multicore/nf_session.h @@ -0,0 +1,49 @@ +#include +#include +#include +#include + +struct nf_pkt_meta_data { + void *obj; + shm_bm_objid_t objid; + u16_t pkt_len; +}; + +struct nf_tx_ring_buf { + struct ck_ring *ring; + struct nf_pkt_meta_data *ringbuf; +}; + +struct nf_session { + shm_bm_t rx_shmemd; + shm_bm_t tx_shmemd; + + thdid_t rx_thd; + thdid_t tx_thd; + + struct sync_sem tx_sem; + + struct nf_tx_ring_buf nf_tx_ring_buf; +}; + +#define NF_TX_PKT_RBUF_NUM 512 +#define NF_TX_PKT_RBUF_SZ (NF_TX_PKT_RBUF_NUM * sizeof(struct nf_tx_ring_buf)) +#define NF_TX_PKT_RING_SZ (sizeof(struct ck_ring) + NF_TX_PKT_RBUF_SZ) +#define NF_TX_PKT_RING_PAGES (round_up_to_page(NF_TX_PKT_RING_SZ)/PAGE_SIZE) + +#define NF_TX_MAX_RING_NUM 30 + +#define MAX_NF_SESSION 10 + +#define MAX_SVC_NUM (20000) + +struct nf_session *get_nf_session(int svc_id); +void nf_session_tx_update(struct nf_session *session, shm_bm_t tx_shmemd, thdid_t tx_thd); +void nf_tx_ring_buf_init(struct nf_tx_ring_buf *pkt_ring_buf, size_t ringbuf_num, size_t ringbuf_sz); +int nf_tx_ring_buf_enqueue(struct nf_tx_ring_buf *pkt_ring_buf, struct nf_pkt_meta_data *buf); +int nf_tx_ring_buf_dequeue(struct nf_tx_ring_buf *pkt_ring_buf, struct nf_pkt_meta_data *buf); +int nf_tx_ring_buf_empty(struct nf_tx_ring_buf *pkt_ring_buf); + +void nf_svc_update(compid_t nf_id, int thd_id, int svc_id, struct vmrt_vm_comp *vm); +void nf_svc_init(void); +void nf_sessions_init(void); diff --git a/src/components/implementation/simple_vmm/nf_multicore/simple_vmm.c b/src/components/implementation/simple_vmm/nf_multicore/simple_vmm.c new file mode 100644 index 0000000000..f84f08ebac --- /dev/null +++ b/src/components/implementation/simple_vmm/nf_multicore/simple_vmm.c @@ -0,0 +1,384 @@ +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include + +#define NF_THD_PRIORITY 31 + +#define NO_NF_TEST 1 + +#define RX_BATCH 1 +#define TX_BATCH 1 + +#define RX_PROCESSING 0 +#define TX_PROCESSING 0 + +thdid_t rx_tid = 0; +thdid_t tx_tid = 0; + +thdid_t virtio_tx_tid = 0; + +char tx_nf_buffer[4096]; +char rx_nf_buffer[4096]; + + +INCBIN(vmlinux, "guest/vmlinux.img") +INCBIN(bios, "guest/guest.img") + +/* Currently only have one VM component globally managed by this VMM */ +static struct vmrt_vm_comp *g_vm; +static struct vmrt_vm_comp *g_vm1; + +struct vmrt_vm_comp *vm_list[2] = {0}; + +#define VM_MAX_COMPS (2) +#define GUEST_MEM_SZ (310*1024*1024) + +SS_STATIC_SLAB(vm_comp, struct vmrt_vm_comp, VM_MAX_COMPS); +SS_STATIC_SLAB(vm_lapic, struct acrn_vlapic, VM_MAX_COMPS * VMRT_VM_MAX_VCPU); +SS_STATIC_SLAB(vcpu_inst_ctxt, struct instr_emul_ctxt, VM_MAX_COMPS * VMRT_VM_MAX_VCPU); +SS_STATIC_SLAB(vm_io_apic, struct acrn_vioapics, VM_MAX_COMPS); +SS_STATIC_SLAB(vcpu_mmio_req, struct acrn_mmio_request, VM_MAX_COMPS * VMRT_VM_MAX_VCPU); + +struct sync_lock vm_boot_lock; + +void +pause_handler(struct vmrt_vm_vcpu *vcpu) +{ + sched_thd_yield(); + GOTO_NEXT_INST(vcpu->shared_region); +} + +extern void check_intr(struct vmrt_vm_vcpu *vcpu); +void +hlt_handler(struct vmrt_vm_vcpu *vcpu) +{ + sched_thd_yield(); + check_intr(vcpu); + GOTO_NEXT_INST(vcpu->shared_region); +} + +void +mmio_init(struct vmrt_vm_vcpu *vcpu) +{ + vcpu->mmio_request = ss_vcpu_mmio_req_alloc(); + assert(vcpu->mmio_request); + + ss_vcpu_mmio_req_activate(vcpu->mmio_request); +} + +void +ioapic_init(struct vmrt_vm_comp *vm) +{ + vm->ioapic = ss_vm_io_apic_alloc(); + assert(vm->ioapic); + + vioapic_init(vm); + ss_vm_io_apic_activate(vm->ioapic); +} + +void +iinst_ctxt_init(struct vmrt_vm_vcpu *vcpu) +{ + vcpu->inst_ctxt = ss_vcpu_inst_ctxt_alloc(); + assert(vcpu->inst_ctxt); + + ss_vcpu_inst_ctxt_activate(vcpu->inst_ctxt); +} + +void +lapic_init(struct vmrt_vm_vcpu *vcpu) +{ + struct acrn_vlapic *vlapic = ss_vm_lapic_alloc(); + assert(vlapic); + + /* A vcpu can only have one vlapic */ + assert(vcpu->vlapic == NULL); + + vcpu->vlapic = vlapic; + vlapic->apic_page = vcpu->lapic_page; + vlapic->vcpu = vcpu; + + /* Status: enable APIC and vector be 0xFF */ + vlapic_reset(vlapic); + + ss_vm_lapic_activate(vlapic); + return; +} + +struct vmrt_vm_comp * +vm_comp_create(void) +{ + u64_t guest_mem_sz = GUEST_MEM_SZ; + u64_t num_vcpu = 1; + void *start; + void *end; + cbuf_t shm_id; + void *mem, *vm_mem; + size_t sz; + + struct vmrt_vm_comp *vm = ss_vm_comp_alloc(); + assert(vm); + + vmrt_vm_create(vm, "vmlinux-5.15", num_vcpu, guest_mem_sz); + + /* Allocate memory for the VM */ + shm_id = memmgr_shared_page_allocn_aligned(guest_mem_sz / PAGE_SIZE_4K, PAGE_SIZE_4K, (vaddr_t *)&mem); + /* Make the memory accessible to VM */ + int ret = memmgr_shared_page_map_aligned_in_vm(shm_id, PAGE_SIZE_4K, (vaddr_t *)&vm_mem, vm->comp_id); + vmrt_vm_mem_init(vm, mem); + printc("created VM with %u cpus, memory size: %luMB, at host vaddr: %p\n", vm->num_vcpu, vm->guest_mem_sz/1024/1024, vm->guest_addr); + + ss_vm_comp_activate(vm); + + start = &incbin_bios_start; + end = &incbin_bios_end; + sz = end - start + 1; + + printc("BIOS image start: %p, end: %p, size: %lu(%luKB)\n", start, end, sz, sz/1024); + vmrt_vm_data_copy_to(vm, start, sz, PAGE_SIZE_4K); + + start = &incbin_vmlinux_start; + end = &incbin_vmlinux_end; + sz = end - start + 1; + + printc("Guest Linux image start: %p, end: %p, size: %lu(%luMB)\n", start, end, sz, sz/1024/1024); + #define GUEST_IMAGE_ADDR 0x100000 + vmrt_vm_data_copy_to(vm, start, sz, GUEST_IMAGE_ADDR); + + ioapic_init(vm); + + printc("Guest(%s) image has been loaded into the VM component\n", vm->name); + + return vm; +} + +#if 0 +static void +tx_task(void) +{ + u16_t pkt_len; + shm_bm_objid_t objid; + + // netio_shmem_map(netshmem_get_shm_id()); + nic_shmem_map(netshmem_get_shm_id()); + + shm_bm_objid_t first_objid; + struct netshmem_pkt_buf *first_obj; + struct netshmem_pkt_pri *first_obj_pri; + struct netshmem_meta_tuple *pkt_arr; + u8_t tx_batch_ct = 0; + struct netshmem_pkt_buf *tx_obj; + + nic_bind_port(0, 1); + + shm_bm_t tx_shmemd = 0; + tx_shmemd = netshmem_get_shm(); + + while(1) { +#if !TX_BATCH + objid = netio_get_a_packet(&pkt_len); + nic_send_packet(objid, 0, pkt_len); + +#else + u8_t batch_ct = 32; + + first_objid = objid = netio_get_a_packet_batch(batch_ct); + first_obj = shm_bm_transfer_net_pkt_buf(tx_shmemd, objid); + first_obj_pri = netshmem_get_pri(first_obj); + pkt_arr = (struct netshmem_meta_tuple *)&(first_obj_pri->pkt_arr); + tx_batch_ct = first_obj_pri->batch_len; + +#if TX_PROCESSING + for (u8_t i = 0; i < tx_batch_ct; i++) { + pkt_len = pkt_arr[i].pkt_len; + objid = pkt_arr[i].obj_id; + tx_obj = shm_bm_transfer_net_pkt_buf(tx_shmemd, objid); + memcpy(tx_nf_buffer, netshmem_get_data_buf(tx_obj), pkt_len); + } +#endif + nic_send_packet_batch(first_objid); +#endif + } +} +#endif + +static void +rx_task(void) +{ + /* TODO: port NF applications here */ + shm_bm_objid_t objid; + struct netshmem_pkt_buf *rx_obj; + shm_bm_objid_t first_objid; + struct netshmem_pkt_buf *first_obj; + struct netshmem_pkt_pri *first_obj_pri; + struct netshmem_meta_tuple *pkt_arr; + u16_t pkt_len; + u32_t ip; + + u8_t batch_ct = 50; + + // netio_shmem_map(netshmem_get_shm_id()); + nic_shmem_map(netshmem_get_shm_id()); + ip = inet_addr("10.10.1.2"); + + nic_bind_port(ip, 0); + + int i = 0; + u64_t times = 0; + u64_t overhead = 0; + + shm_bm_t rx_shmemd = 0; + + rx_shmemd = netshmem_get_shm(); + while(1) + { + u8_t rx_batch_ct = 0; +#if !RX_BATCH + objid = nic_get_a_packet(&pkt_len); + netio_send_packet(objid, pkt_len); +#else + first_objid = nic_get_a_packet_batch(batch_ct); + + first_obj = shm_bm_transfer_net_pkt_buf(rx_shmemd, first_objid); + first_obj_pri = netshmem_get_pri(first_obj); + pkt_arr = (struct netshmem_meta_tuple *)&(first_obj_pri->pkt_arr); + rx_batch_ct = first_obj_pri->batch_len; +#if RX_PROCESSING + for (u8_t i = 0; i < rx_batch_ct; i++) { + pkt_len = pkt_arr[i].pkt_len; + objid = pkt_arr[i].obj_id; + rx_obj = shm_bm_transfer_net_pkt_buf(rx_shmemd, objid); + memcpy(rx_nf_buffer, netshmem_get_data_buf(rx_obj), pkt_len); + } +#endif + + netio_send_packet_batch(first_objid); +#endif + } +} + +static void +tx_task(void) +{ + u16_t pkt_len; + shm_bm_objid_t objid; + + nic_shmem_map(netshmem_get_shm_id()); + + shm_bm_objid_t first_objid; + struct netshmem_pkt_buf *first_obj; + struct netshmem_pkt_pri *first_obj_pri; + struct netshmem_meta_tuple *pkt_arr; + u8_t tx_batch_ct = 0; + struct netshmem_pkt_buf *tx_obj; + u32_t ip; + + shm_bm_t tx_shmemd = 0; + tx_shmemd = netshmem_get_shm(); + ip = inet_addr("10.10.1.2"); + + nic_bind_port(ip, 1); + int svc_id = 0; + + nf_svc_update(cos_compid(), cos_thdid(), svc_id, g_vm); + + struct nf_session *session; + session = get_nf_session(svc_id); + nf_session_tx_update(session, tx_shmemd, cos_thdid()); + sync_sem_init(&session->tx_sem, 0); + + nf_tx_ring_buf_init(&session->nf_tx_ring_buf, NF_TX_PKT_RBUF_NUM, NF_TX_PKT_RING_SZ); + + virtio_tx_task(0); +} + +void +cos_init(void) +{ + + nf_svc_init(); + nf_sessions_init(); + + struct vmrt_vm_vcpu *vcpu; + g_vm = vm_comp_create(); + printc("created vm done:%d, %p\n", g_vm->comp_id, g_vm); + g_vm->vm_mac_id = 0; + + vm_list[0] = g_vm; +} + +struct ps_lock shmem_lock = {.o = 0}; + +void +cos_parallel_init(coreid_t cid, int init_core, int ncores) +{ + struct vmrt_vm_vcpu *vcpu; + + if (cid == 0) { + ps_lock_take(&shmem_lock); + rx_tid = sched_thd_create((void *)rx_task, NULL); + netshmem_create(rx_tid); + ps_lock_release(&shmem_lock); + tx_tid = sched_thd_create((void *)tx_task, NULL); + netshmem_create(tx_tid); + } else { + ps_lock_take(&shmem_lock); + vmrt_vm_vcpu_init(g_vm, 0); + vcpu = vmrt_get_vcpu(g_vm, 0); + + lapic_init(vcpu); + iinst_ctxt_init(vcpu); + mmio_init(vcpu); + ps_lock_release(&shmem_lock); + } + + return; +} + +void +parallel_main(coreid_t cid) +{ + struct vmrt_vm_vcpu *vcpu; + + if (cid == 0) { + sched_thd_param_set(rx_tid, sched_param_pack(SCHEDP_PRIO, NF_THD_PRIORITY)); + sched_thd_param_set(tx_tid, sched_param_pack(SCHEDP_PRIO, NF_THD_PRIORITY)); + } else if(cid == 1) { + printc("------STARTING VM------\n"); + sched_thd_block_timeout(0, time_now() + time_usec2cyc(10000000)); + vcpu = vmrt_get_vcpu(g_vm, 0); + vmrt_vm_vcpu_start(vcpu); + } + + while (1) + { + sched_thd_block(0); + /* Should not be here, or there is a bug in the scheduler! */ + assert(0); + } + + +} diff --git a/src/components/implementation/simple_vmm/nf_multicore/vcpuid.c b/src/components/implementation/simple_vmm/nf_multicore/vcpuid.c new file mode 100644 index 0000000000..0335ccb596 --- /dev/null +++ b/src/components/implementation/simple_vmm/nf_multicore/vcpuid.c @@ -0,0 +1,766 @@ +#include +#include +#include +#include +#include +#include +#include "cpu.h" +#include "cpuid.h" +#include "vcpuid.h" +#include "cpu_caps.h" +#include "apicreg.h" + +/* + * Copyright (C) 2018-2022 Intel Corporation. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +static struct cpuinfo_x86 boot_cpu_data; +static struct vcpuid_entry vcpuid_entries[MAX_VM_VCPUID_ENTRIES]; +static u32_t g_entry_nr = 0, g_vcpuid_level, g_vcpuid_xlevel; +void memcpy_erms(void *d, const void *s, size_t slen) +{ + asm volatile ("rep; movsb" + : "=&D"(d), "=&S"(s) + : "c"(slen), "0" (d), "1" (s) + : "memory"); +} + +static uint64_t get_address_mask(uint8_t limit) +{ + return ((1UL << limit) - 1UL) & PAGE_MASK; +} + +/* + * @brief Copies at most slen bytes from src address to dest address, up to dmax. + * + * INPUTS + * + * @param[in] d pointer to Destination address + * @param[in] dmax maximum length of dest + * @param[in] s pointer to Source address + * @param[in] slen maximum number of bytes of src to copy + * + * @return 0 for success and -1 for runtime-constraint violation. + */ +int32_t memcpy_s(void *d, size_t dmax, const void *s, size_t slen) +{ + int32_t ret = -1; + + if ((d != NULL) && (s != NULL) && (dmax >= slen) && ((d > (s + slen)) || (s > (d + dmax)))) { + if (slen != 0U) { + memcpy_erms(d, s, slen); + } + ret = 0; + } else { + (void)memset(d, 0U, dmax); + } + + return ret; +} + +uint32_t get_tsc_khz(void) +{ + //3100.000 MHz + return 3100000; +} + +struct cpuinfo_x86 *get_pcpu_info(void) +{ + return &boot_cpu_data; +} + +/** + * initialization of virtual CPUID leaf + */ +static void init_vcpuid_entry(uint32_t leaf, uint32_t subleaf, + uint32_t flags, struct vcpuid_entry *entry) +{ + struct cpuinfo_x86 *cpu_info; + + entry->leaf = leaf; + entry->subleaf = subleaf; + entry->flags = flags; + + switch (leaf) { + + case 0x06U: + cpuid_subleaf(leaf, subleaf, &entry->eax, &entry->ebx, &entry->ecx, &entry->edx); + entry->eax &= ~(CPUID_EAX_DTHERM | CPUID_EAX_HWP | CPUID_EAX_HWP_N | CPUID_EAX_HWP_AW | CPUID_EAX_HWP_EPP | CPUID_EAX_HWP_PLR); + entry->ecx &= ~CPUID_ECX_HCFC; + break; + + case 0x07U: + if (subleaf == 0U) { + cpuid_subleaf(leaf, subleaf, &entry->eax, &entry->ebx, &entry->ecx, &entry->edx); + + entry->ebx &= ~(CPUID_EBX_PQM | CPUID_EBX_PQE); + + /* mask LA57 */ + entry->ecx &= ~CPUID_ECX_LA57; + + /* mask CPUID_EDX_IBRS_IBPB */ + entry->edx &= ~CPUID_EDX_IBRS_IBPB; + + /* mask SGX and SGX_LC */ + entry->ebx &= ~CPUID_EBX_SGX; + entry->ecx &= ~CPUID_ECX_SGX_LC; + + /* mask MPX */ + entry->ebx &= ~CPUID_EBX_MPX; + + /* mask Intel Processor Trace, since 14h is disabled */ + entry->ebx &= ~CPUID_EBX_PROC_TRC; + + /* mask CET shadow stack and indirect branch tracking */ + entry->ecx &= ~CPUID_ECX_CET_SS; + entry->edx &= ~CPUID_EDX_CET_IBT; + + // entry->ebx &= ~CPUID_EBX_FSGSBASE; + + entry->ebx &= ~CPUID_EBX_SMEP; + + entry->ebx &= ~CPUID_EBX_SMAP; + + entry->ecx &= ~CPUID_ECX_UMIP; + + entry->ecx &= ~CPUID_ECX_PKE; + + entry->ecx &= ~CPUID_ECX_LA57; + + entry->ecx &= ~CPUID_ECX_PKS; + } else { + entry->eax = 0U; + entry->ebx = 0U; + entry->ecx = 0U; + entry->edx = 0U; + } + break; + + case 0x16U: + cpu_info = get_pcpu_info(); + if (cpu_info->cpuid_level >= 0x16U) { + /* + * call the cpuid when 0x16 is supported, + * but nested vmx will not return correct values, + * thus use the second way here. If you are using + * the real hardware, can test if this will work. + */ + // cpuid_subleaf(leaf, subleaf, &entry->eax, &entry->ebx, &entry->ecx, &entry->edx); + + /* Use the tsc to derive the emulated 0x16U cpuid. */ + entry->eax = (uint32_t) (get_tsc_khz() / 1000U); + entry->ebx = entry->eax; + /* Bus frequency: hard coded to 100M */ + entry->ecx = 100U; + entry->edx = 0U; + + } else { + /* Use the tsc to derive the emulated 0x16U cpuid. */ + entry->eax = (uint32_t) (get_tsc_khz() / 1000U); + entry->ebx = entry->eax; + /* Bus frequency: hard coded to 100M */ + entry->ecx = 100U; + entry->edx = 0U; + } + break; + + /* + * Leaf 0x40000000 + * This leaf returns the CPUID leaf range supported by the + * hypervisor and the hypervisor vendor signature. + * + * EAX: The maximum input value for CPUID supported by the + * hypervisor. + * EBX, ECX, EDX: Hypervisor vendor ID signature. + */ + case 0x40000000U: + { + static const char sig[12] = "ACRNACRNACRN"; + const uint32_t *sigptr = (const uint32_t *)sig; + + entry->eax = 0x40000010U; + entry->ebx = sigptr[0]; + entry->ecx = sigptr[1]; + entry->edx = sigptr[2]; + break; + } + + /* + * Leaf 0x40000001 - ACRN extended information. + * This leaf returns the extended information of ACRN hypervisor. + * + * EAX: Guest capability flags + * EBX, ECX, EDX: RESERVED (reserved fields are set to zero). + */ + case 0x40000001U: + entry->eax = 0U; + entry->ebx = 0U; + entry->ecx = 0U; + entry->edx = 0U; + break; + + /* + * Leaf 0x40000010 - Timing Information. + * This leaf returns the current TSC frequency and + * current Bus frequency in kHz. + * + * EAX: (Virtual) TSC frequency in kHz. + * TSC frequency is calculated from PIT in ACRN + * EBX, ECX, EDX: RESERVED (reserved fields are set to zero). + */ + case 0x40000010U: + entry->eax = get_tsc_khz(); + entry->ebx = 0U; + entry->ecx = 0U; + entry->edx = 0U; + break; + + default: + cpuid_subleaf(leaf, subleaf, &entry->eax, &entry->ebx, &entry->ecx, &entry->edx); + break; + } +} + +static inline int32_t set_vcpuid_entry(struct vcpuid_entry vcpuid_entries[], + const struct vcpuid_entry *entry) +{ + struct vcpuid_entry *tmp; + size_t entry_size = sizeof(struct vcpuid_entry); + int32_t ret; + + if (g_entry_nr == MAX_VM_VCPUID_ENTRIES) { + printc("%s, vcpuid entry over MAX_VM_VCPUID_ENTRIES(%u)\n", __func__, MAX_VM_VCPUID_ENTRIES); + ret = -ENOMEM; + } else { + tmp = &vcpuid_entries[g_entry_nr]; + g_entry_nr++; + (void)memcpy_s(tmp, entry_size, entry, entry_size); + ret = 0; + } + return ret; +} + +static inline bool is_percpu_related(uint32_t leaf) +{ + return ((leaf == 0x1U) || (leaf == 0xbU) || (leaf == 0xdU) || (leaf == 0x19U) || (leaf == 0x80000001U) || (leaf == 0x2U) || (leaf == 0x1aU)); +} + +static int32_t set_vcpuid_extended_function(void) +{ + uint32_t i, limit; + struct vcpuid_entry entry; + int32_t result; + + init_vcpuid_entry(0x40000000U, 0U, 0U, &entry); + result = set_vcpuid_entry(vcpuid_entries, &entry); + if (result == 0) { + init_vcpuid_entry(0x40000001U, 0U, 0U, &entry); + + result = set_vcpuid_entry(vcpuid_entries, &entry); + } + + if (result == 0) { + init_vcpuid_entry(0x40000010U, 0U, 0U, &entry); + result = set_vcpuid_entry(vcpuid_entries, &entry); + } + + if (result == 0) { + init_vcpuid_entry(0x80000000U, 0U, 0U, &entry); + result = set_vcpuid_entry(vcpuid_entries, &entry); + } + + if (result == 0) { + limit = entry.eax; + g_vcpuid_xlevel = limit; + for (i = 0x80000002U; i <= limit; i++) { + init_vcpuid_entry(i, 0U, 0U, &entry); + result = set_vcpuid_entry(vcpuid_entries, &entry); + if (result != 0) { + break; + } + } + } + + return result; +} + +void init_pcpu_capabilities(void) +{ + uint32_t eax, unused; + uint32_t family_id, model_id, displayfamily, displaymodel; + + cpuid_subleaf(CPUID_VENDORSTRING, 0x0U, + &boot_cpu_data.cpuid_level, + &unused, &unused, &unused); + + cpuid_subleaf(CPUID_FEATURES, 0x0U, &eax, &unused, + &boot_cpu_data.cpuid_leaves[FEAT_1_ECX], + &boot_cpu_data.cpuid_leaves[FEAT_1_EDX]); + + /* SDM Vol.2A 3-211 states the algorithm to calculate DisplayFamily and DisplayModel */ + family_id = (eax >> 8U) & 0xfU; + displayfamily = family_id; + if (family_id == 0xFU) { + displayfamily += ((eax >> 20U) & 0xffU); + } + boot_cpu_data.displayfamily = (uint8_t)displayfamily; + + model_id = (eax >> 4U) & 0xfU; + displaymodel = model_id; + if ((family_id == 0x06U) || (family_id == 0xFU)) { + displaymodel += ((eax >> 16U) & 0xfU) << 4U; + } + boot_cpu_data.displaymodel = (uint8_t)displaymodel; + + + cpuid_subleaf(CPUID_EXTEND_FEATURE, 0x0U, &unused, + &boot_cpu_data.cpuid_leaves[FEAT_7_0_EBX], + &boot_cpu_data.cpuid_leaves[FEAT_7_0_ECX], + &boot_cpu_data.cpuid_leaves[FEAT_7_0_EDX]); + + cpuid_subleaf(CPUID_EXTEND_FEATURE, 0x2U, &unused, &unused, &unused, + &boot_cpu_data.cpuid_leaves[FEAT_7_2_EDX]); + + cpuid_subleaf(CPUID_MAX_EXTENDED_FUNCTION, 0x0U, + &boot_cpu_data.extended_cpuid_level, + &unused, &unused, &unused); + + if (boot_cpu_data.extended_cpuid_level >= CPUID_EXTEND_FUNCTION_1) { + cpuid_subleaf(CPUID_EXTEND_FUNCTION_1, 0x0U, &unused, &unused, + &boot_cpu_data.cpuid_leaves[FEAT_8000_0001_ECX], + &boot_cpu_data.cpuid_leaves[FEAT_8000_0001_EDX]); + } + + if (boot_cpu_data.extended_cpuid_level >= CPUID_EXTEND_INVA_TSC) { + cpuid_subleaf(CPUID_EXTEND_INVA_TSC, 0x0U, &eax, &unused, &unused, + &boot_cpu_data.cpuid_leaves[FEAT_8000_0007_EDX]); + } + + if (boot_cpu_data.extended_cpuid_level >= CPUID_EXTEND_ADDRESS_SIZE) { + cpuid_subleaf(CPUID_EXTEND_ADDRESS_SIZE, 0x0U, &eax, + &boot_cpu_data.cpuid_leaves[FEAT_8000_0008_EBX], + &unused, &unused); + + /* EAX bits 07-00: #Physical Address Bits + * bits 15-08: #Linear Address Bits + */ + boot_cpu_data.virt_bits = (uint8_t)((eax >> 8U) & 0xffU); + boot_cpu_data.phys_bits = (uint8_t)(eax & 0xffU); + boot_cpu_data.physical_address_mask = + get_address_mask(boot_cpu_data.phys_bits); + } + + // detect_pcpu_cap(); +} + +int32_t +set_vcpuid_entries(void) +{ + int32_t result; + struct vcpuid_entry entry; + uint32_t limit; + uint32_t i, j; + struct cpuinfo_x86 *cpu_info = get_pcpu_info(); + + init_vcpuid_entry(0U, 0U, 0U, &entry); + + if (cpu_info->cpuid_level < 0x16U) { + /* The cpuid with zero leaf returns the max level. Emulate that the 0x16U is supported */ + entry.eax = 0x16U; + } + result = set_vcpuid_entry(vcpuid_entries, &entry); + if (result == 0) { + limit = entry.eax; + g_vcpuid_level = limit; + + for (i = 1U; i <= limit; i++) { + if (is_percpu_related(i)) { + continue; + } + + switch (i) { + case 0x04U: + for (j = 0U; ; j++) { + init_vcpuid_entry(i, j, CPUID_CHECK_SUBLEAF, &entry); + if (entry.eax == 0U) { + break; + } + + result = set_vcpuid_entry(vcpuid_entries, &entry); + if (result != 0) { + /* wants to break out of switch */ + break; + } + } + break; + /* MONITOR/MWAIT */ + case 0x05U: + break; + case 0x07U: + init_vcpuid_entry(i, 0U, CPUID_CHECK_SUBLEAF, &entry); + if (entry.eax != 0U) { + printc("vcpuid: only support subleaf 0 for cpu leaf 07h\n"); + entry.eax = 0U; + } + /* mask CPUID_EDX_IBRS_IBPB */ + entry.edx &= ~CPUID_EDX_IBRS_IBPB; + + entry.ecx &= ~CPUID_ECX_WAITPKG; + + result = set_vcpuid_entry(vcpuid_entries, &entry); + break; + case 0x12U: + break; + /* These features are disabled */ + /* PMU is not supported except for core partition VM, like RTVM */ + case 0x0aU: + break; + + /* Intel RDT */ + case 0x0fU: + break; + /* Intel RDT */ + case 0x10U: + break; + + /* Intel Processor Trace */ + case 0x14U: + /* PCONFIG */ + case 0x1bU: + /* V2 Extended Topology Enumeration Leaf */ + case 0x1fU: + break; + default: + init_vcpuid_entry(i, 0U, 0U, &entry); + result = set_vcpuid_entry(vcpuid_entries, &entry); + break; + } + + /* WARNING: do nothing between break out of switch and before this check */ + if (result != 0) { + /* break out of for */ + break; + } + } + + if (result == 0) { + result = set_vcpuid_extended_function(); + } + } + + return result; +} + +static inline const struct vcpuid_entry *local_find_vcpuid_entry(uint32_t leaf, uint32_t subleaf) +{ + uint32_t i = 0U, nr, half; + const struct vcpuid_entry *found_entry = NULL; + + nr = g_entry_nr; + half = nr >> 1U; + if (vcpuid_entries[half].leaf < leaf) { + i = half; + } + + for (; i < nr; i++) { + const struct vcpuid_entry *tmp = (const struct vcpuid_entry *)(&vcpuid_entries[i]); + + if (tmp->leaf < leaf) { + continue; + } else if (tmp->leaf == leaf) { + if (((tmp->flags & CPUID_CHECK_SUBLEAF) != 0U) && (tmp->subleaf != subleaf)) { + continue; + } + found_entry = tmp; + break; + } else { + /* tmp->leaf > leaf */ + break; + } + } + + return found_entry; +} + +static inline const struct vcpuid_entry *find_vcpuid_entry(uint32_t leaf_arg, uint32_t subleaf) +{ + const struct vcpuid_entry *entry; + uint32_t leaf = leaf_arg; + + entry = local_find_vcpuid_entry(leaf, subleaf); + if (entry == NULL) { + uint32_t limit; + + if ((leaf & 0x80000000U) != 0U) { + limit = g_vcpuid_xlevel; + } else { + limit = g_vcpuid_level; + } + + if (leaf > limit) { + /* Intel documentation states that invalid EAX input + * will return the same information as EAX=cpuid_level + * (Intel SDM Vol. 2A - Instruction Set Reference - + * CPUID) + */ + leaf = g_vcpuid_level; + entry = local_find_vcpuid_entry(leaf, subleaf); + } + + } + + return entry; +} + +static void guest_cpuid_01h(struct vmrt_vm_vcpu *vcpu, uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx) +{ + uint32_t apicid = 1; + + cpuid_subleaf(0x1U, 0x0U, eax, ebx, ecx, edx); + /* Patching initial APIC ID */ + *ebx &= ~APIC_ID_MASK; + *ebx |= (apicid << APIC_ID_SHIFT); + + *edx &= ~CPUID_EDX_MTRR; + + /* mask Safer Mode Extension */ + *ecx &= ~CPUID_ECX_SMX; + + *ecx &= ~CPUID_ECX_EST; + + /* mask SDBG for silicon debug */ + *ecx &= ~CPUID_ECX_SDBG; + + /* mask VMX to guest OS */ + *ecx &= ~CPUID_ECX_VMX; + + /* set Hypervisor Present Bit */ + *ecx |= CPUID_ECX_HV; + + /* Warning: should we support pcid in VM? Let's begin with not setting it first */ + *ecx &= ~CPUID_ECX_PCID; + + /* + * Hide MONITOR/MWAIT. + */ + // *ecx &= ~CPUID_ECX_MONITOR; + + /* Warning: should we support CPUID_ECX_OSXSAVE in VM? Let's begin with not setting it first */ + *ecx &= ~CPUID_ECX_OSXSAVE; + if ((*ecx & CPUID_ECX_XSAVE) != 0U) { + uint64_t cr4; + /*read guest CR4*/ + cr4 = vcpu->shared_region->cr4; + if ((cr4 & CR4_OSXSAVE) != 0UL) { + *ecx |= CPUID_ECX_OSXSAVE; + } + } + + /* disable thermal ctrl*/ + *edx &= ~CPUID_EDX_TM1; + + *edx &= ~CPUID_EDX_VME; + + *edx &= ~CPUID_EDX_DE; + + *edx &= ~CPUID_EDX_PSE; + + /* Warning: it seems that PAE, PGE, FXSR should be supported */ + // *edx &= ~CPUID_EDX_PAE; + + // *edx &= ~CPUID_EDX_PGE; + + // *edx &= ~CPUID_EDX_FXSR; + + /* Don't support complex apic */ + *ecx &= ~CPUID_ECX_x2APIC; + + /* DS/PEBS is not supported except for core partition VM, like RTVM */ + /* mask Debug Store feature */ + *ecx &= ~(CPUID_ECX_DTES64 | CPUID_ECX_DS_CPL); + + /* mask PDCM: Perfmon and Debug Capability */ + *ecx &= ~CPUID_ECX_PDCM; + + /* mask Debug Store feature */ + *edx &= ~CPUID_EDX_DTES; +} + +static void guest_cpuid_0bh(uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx) +{ + /* Forward host cpu topology to the guest, guest will know the native platform information such as host cpu topology here */ + cpuid_subleaf(0x0BU, *ecx, eax, ebx, ecx, edx); + + /* Patching X2APIC */ + *edx = 1; +} + +static void guest_cpuid_0dh(uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx) +{ + uint32_t subleaf = *ecx; + + cpuid_subleaf(0x0dU, subleaf, eax, ebx, ecx, edx); + switch (subleaf) { + case 0U: + /* SDM Vol.1 17-2, On processors that do not support Intel MPX, + * CPUID.(EAX=0DH,ECX=0):EAX[3] and + * CPUID.(EAX=0DH,ECX=0):EAX[4] will both be 0 */ + *eax &= ~(CPUID_EAX_XCR0_BNDREGS | CPUID_EAX_XCR0_BNDCSR); + break; + case 1U: + *ecx &= ~(CPUID_ECX_CET_U_STATE | CPUID_ECX_CET_S_STATE); + break; + case 11U: + case 12U: + *eax = 0U; + *ebx = 0U; + *ecx = 0U; + *edx = 0U; + break; + default: + /* No emulation for other leaves */ + break; + } +} + +static void guest_cpuid_19h(uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx) +{ + *eax = 0U; + *ebx = 0U; + *ecx = 0U; + *edx = 0U; +} + +static void guest_cpuid_80000001h(const struct vmrt_vm_vcpu *vcpu, + uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx) +{ + const struct vcpuid_entry *entry_check = find_vcpuid_entry(0x80000000U, 0); + uint64_t guest_ia32_misc_enable = 0x800001; + uint32_t leaf = 0x80000001U; + + if ((entry_check != NULL) && (entry_check->eax >= leaf)) { + cpuid_subleaf(leaf, 0x0U, eax, ebx, ecx, edx); + /* SDM Vol4 2.1, XD Bit Disable of MSR_IA32_MISC_ENABLE + * When set to 1, the Execute Disable Bit feature (XD Bit) is disabled and the XD Bit + * extended feature flag will be clear (CPUID.80000001H: EDX[20]=0) + */ + if ((guest_ia32_misc_enable & MSR_IA32_MISC_ENABLE_XD_DISABLE) != 0UL) { + *edx = *edx & ~CPUID_EDX_XD_BIT_AVIL; + } + } else { + *eax = 0U; + *ebx = 0U; + *ecx = 0U; + *edx = 0U; + } +} + +static void guest_limit_cpuid(const struct vmrt_vm_vcpu *vcpu, uint32_t leaf, + uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx) +{ + uint64_t guest_ia32_misc_enable = 0x800001; + + if ((guest_ia32_misc_enable & MSR_IA32_MISC_ENABLE_LIMIT_CPUID) != 0UL) { + /* limit the leaf number to 2 */ + if (leaf == 0U) { + *eax = 2U; + } else if (leaf > 2U) { + *eax = 0U; + *ebx = 0U; + *ecx = 0U; + *edx = 0U; + } else { + /* In this case, leaf is 1U, return the cpuid value get above */ + } + } +} + +void guest_cpuid(struct vmrt_vm_vcpu *vcpu, uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx) +{ + uint32_t leaf = *eax; + uint32_t subleaf = *ecx; + + /* vm related */ + if (!is_percpu_related(leaf)) { + const struct vcpuid_entry *entry = find_vcpuid_entry(leaf, subleaf); + + if (entry != NULL) { + *eax = entry->eax; + *ebx = entry->ebx; + *ecx = entry->ecx; + *edx = entry->edx; + } else { + *eax = 0U; + *ebx = 0U; + *ecx = 0U; + *edx = 0U; + } + } else { + /* percpu related */ + switch (leaf) { + case 0x01U: + guest_cpuid_01h(vcpu, eax, ebx, ecx, edx); + break; + + case 0x0bU: + guest_cpuid_0bh(eax, ebx, ecx, edx); + break; + + case 0x0dU: + guest_cpuid_0dh(eax, ebx, ecx, edx); + break; + + case 0x19U: + guest_cpuid_19h(eax, ebx, ecx, edx); + break; + + case 0x80000001U: + guest_cpuid_80000001h(vcpu, eax, ebx, ecx, edx); + break; + + default: + /* + * In this switch statement, leaf 0x01/0x0b/0x0d/0x19/0x80000001 + * shall be handled specifically. All the other cases + * just return physical value. + */ + cpuid_subleaf(leaf, *ecx, eax, ebx, ecx, edx); + break; + } + } + + guest_limit_cpuid(vcpu, leaf, eax, ebx, ecx, edx); +} + +void +cpuid_handler(struct vmrt_vm_vcpu *vcpu) +{ + uint64_t rax, rbx, rcx, rdx; + volatile struct vm_vcpu_shared_region *regs = vcpu->shared_region; + int test = 0; + + rax = regs->ax; + rbx = regs->bx; + rcx = regs->cx; + rdx = regs->dx; + + guest_cpuid(vcpu, (uint32_t *)&rax, (uint32_t *)&rbx, (uint32_t *)&rcx, (uint32_t *)&rdx); + + regs->ax = rax; + regs->bx = rbx; + regs->cx = rcx; + regs->dx = rdx; + + GOTO_NEXT_INST(regs); + + return; +} + +static void __attribute__((constructor)) +init(void) +{ + init_pcpu_capabilities(); + set_vcpuid_entries(); +} diff --git a/src/components/implementation/simple_vmm/nf_multicore/vcpuid.h b/src/components/implementation/simple_vmm/nf_multicore/vcpuid.h new file mode 100644 index 0000000000..9124eedb0e --- /dev/null +++ b/src/components/implementation/simple_vmm/nf_multicore/vcpuid.h @@ -0,0 +1,35 @@ +/* + * Copyright (C) 2018-2022 Intel Corporation. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef VCPUID_H_ +#define VCPUID_H_ +#include + +#define CPUID_CHECK_SUBLEAF (1U << 0U) +#define MAX_VM_VCPUID_ENTRIES 64U + +/* Guest capability flags reported by CPUID */ +#define GUEST_CAPS_PRIVILEGE_VM (1U << 0U) + +struct vcpuid_entry { + uint32_t eax; + uint32_t ebx; + uint32_t ecx; + uint32_t edx; + uint32_t leaf; + uint32_t subleaf; + uint32_t flags; + uint32_t padding; +}; + +#define FEATURE_WORDS 16U + +int32_t set_vcpuid_entries(void); +void guest_cpuid(struct vmrt_vm_vcpu *vcpu, + uint32_t *eax, uint32_t *ebx, + uint32_t *ecx, uint32_t *edx); + +#endif /* VCPUID_H_ */ diff --git a/src/components/implementation/simple_vmm/nf_multicore/vio.c b/src/components/implementation/simple_vmm/nf_multicore/vio.c new file mode 100644 index 0000000000..b63253b7b1 --- /dev/null +++ b/src/components/implementation/simple_vmm/nf_multicore/vio.c @@ -0,0 +1,106 @@ +#include +#include "devices/serial/serial.h" +#include "devices/vpci/vpci.h" +#include "devices/vpic/vpic.h" +#include "devices/vrtc/vrtc.h" +#include "devices/vps2/vps2.h" +#include "devices/vpci/virtio_net_io.h" + +void +io_handler(struct vmrt_vm_vcpu *vcpu) +{ + volatile struct vm_vcpu_shared_region *regs = vcpu->shared_region; + u64_t qualification = regs->qualification; + + u16_t port_id = (qualification >> 16) & 0XFFFF; + u8_t access_sz = qualification & 7; + u8_t access_dir = (qualification >> 3) & 1; + + assert(!((qualification >> 4) & 1)); + assert(!((qualification >> 5) & 1)); + + switch (access_sz) + { + case 0: + access_sz = IO_BYTE; + break; + case 1: + access_sz = IO_WORD; + break; + case 3: + access_sz = IO_LONG; + break; + default: + VM_PANIC(vcpu); + + } + if (port_id == 0x3ff || port_id == 0x2f9 || port_id == 0x2fc || port_id == 0x2fb || port_id == 0x2fa || port_id == 0x2ff || port_id == 0x2f8 || port_id == 0x3e9 || port_id == 0x3ec || port_id == 0x3eb || port_id == 0x3ea || port_id == 0x3ef || port_id == 0x3e8 + || port_id == 0x2e9 || port_id == 0x2ec || port_id == 0x2eb || port_id == 0x2ee) { + /* TODO: fix these io ports emulcation */ + goto done; + } + if (port_id <= SERIAL_PORT_MAX && port_id >= SERIAL_PORT_MIN) { + serial_handler(port_id, access_dir, access_sz, vcpu); + goto done; + } + + /* Fast path for virtio-net processing */ + switch (port_id) + { + case VIRTIO_NET_DEV_FEATURES: + case VIRTIO_NET_GUEST_FEATURES: + case VIRTIO_NET_QUEUE_ADDR: + case VIRTIO_NET_QUEUE_SIZE: + case VIRTIO_NET_QUEUE_SELECT: + case VIRTIO_NET_QUEUE_NOTIFY: + case VIRTIO_NET_DEV_STATUS: + case VIRTIO_NET_ISR: + case VIRTIO_NET_MAC: + case VIRTIO_NET_MAC1: + case VIRTIO_NET_MAC2: + case VIRTIO_NET_MAC3: + case VIRTIO_NET_MAC4: + case VIRTIO_NET_MAC5: + case VIRTIO_NET_STATUS: + case VIRTIO_NET_STATUS_H: + virtio_net_handler(port_id, access_dir, access_sz, vcpu); + goto done; + default: + break; + } + + switch (port_id) + { + case CMOS_CMD_PORT: + case CMOS_DATA_PORT: + vrtc_handler(port_id, access_dir, access_sz, vcpu); + goto done; + case PIC_MASTER_CMD_PORT: + case PIC_MASTER_DATA_PORT: + case PIC_SLAVE_CMD_PORT: + case PIC_SLAVE_DATA_PORT: + case PIC_ELCR1: + case PIC_ELCR2: + vpic_handler(port_id, access_dir, access_sz, vcpu); + goto done; + case PS2_CONTROL_PORT_A: + case PS2_CONTROL_PORT_B: + ps2_handler(port_id, access_dir, access_sz, vcpu); + goto done; + case VPCI_CONFIG_ADDRESS: + case VPCI_CONFIG_DATA0: + case VPCI_CONFIG_DATA1: + case VPCI_CONFIG_DATA2: + case VPCI_CONFIG_DATA3: + case VPCI_MECHANISM_CONTROL_REG: + vpci_handler(port_id, access_dir, access_sz, vcpu); + goto done; + } + + printc("port id:%x, sz:%d, dir:%d\n", port_id, access_sz, access_dir); + VM_PANIC(vcpu); +done: + GOTO_NEXT_INST(regs); + + return; +} \ No newline at end of file diff --git a/src/components/implementation/simple_vmm/nf_multicore/vioapic.c b/src/components/implementation/simple_vmm/nf_multicore/vioapic.c new file mode 100644 index 0000000000..1dfcdbdc43 --- /dev/null +++ b/src/components/implementation/simple_vmm/nf_multicore/vioapic.c @@ -0,0 +1,564 @@ +/*- + * Copyright (c) 2013 Tycho Nightingale + * Copyright (c) 2013 Neel Natu + * Copyright (c) 2017-2022 Intel Corporation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#define pr_prefix "vioapic: " + +#include +#include +#include +#include +#include +#include +#include +#include + + +#define RTBL_RO_BITS ((uint32_t)0x00004000U | (uint32_t)0x00001000U) /*Remote IRR and Delivery Status bits*/ + +#define DBG_LEVEL_VIOAPIC 6U +#define ACRN_IOAPIC_VERSION 0x11U + +#define MASK_ALL_INTERRUPTS 0x0001000000010000UL + +static inline struct acrn_vioapics *vm_ioapics(const struct vmrt_vm_comp *vm) +{ + return (struct acrn_vioapics *)(vm->ioapic); +} + +/** + * @pre pin < vioapic->chipinfo.nr_pins + */ +static void +vioapic_generate_intr(struct acrn_single_vioapic *vioapic, uint32_t pin) +{ + uint32_t vector, dest, delmode; + union ioapic_rte rte; + bool level, phys; + + rte = vioapic->rtbl[pin]; + + if (rte.bits.intr_mask == IOAPIC_RTE_MASK_SET) { + printc("ioapic pin%hhu: masked\n", pin); + } else { + phys = (rte.bits.dest_mode == IOAPIC_RTE_DESTMODE_PHY); + delmode = rte.bits.delivery_mode; + level = (rte.bits.trigger_mode == IOAPIC_RTE_TRGRMODE_LEVEL); + + /* For level trigger irq, avoid send intr if + * previous one hasn't received EOI + */ + if (!level || (vioapic->rtbl[pin].bits.remote_irr == 0UL)) { + if (level) { + vioapic->rtbl[pin].bits.remote_irr = IOAPIC_RTE_REM_IRR; + } + vector = rte.bits.vector; + dest = rte.bits.dest_field; + vlapic_receive_intr(vioapic->vm, level, dest, phys, delmode, vector, false); + } + } +} + +/** + * @pre pin < vioapic->chipinfo.nr_pins + */ +static void +vioapic_set_pinstate(struct acrn_single_vioapic *vioapic, uint32_t pin, uint32_t level) +{ + uint32_t old_lvl; + union ioapic_rte rte; + + if (pin < vioapic->chipinfo.nr_pins) { + rte = vioapic->rtbl[pin]; + old_lvl = (uint32_t)bitmap_test((uint16_t)(pin & 0x3FU), &vioapic->pin_state[pin >> 6U]); + if (level == 0U) { + /* clear pin_state and deliver interrupt according to polarity */ + bitmap_clear_nolock((uint16_t)(pin & 0x3FU), &vioapic->pin_state[pin >> 6U]); + if ((rte.bits.intr_polarity == IOAPIC_RTE_INTPOL_ALO) + && (old_lvl != level)) { + vioapic_generate_intr(vioapic, pin); + } + } else { + /* set pin_state and deliver intrrupt according to polarity */ + bitmap_set_nolock((uint16_t)(pin & 0x3FU), &vioapic->pin_state[pin >> 6U]); + if ((rte.bits.intr_polarity == IOAPIC_RTE_INTPOL_AHI) + && (old_lvl != level)) { + vioapic_generate_intr(vioapic, pin); + } + } + } +} + + +struct acrn_single_vioapic * +vgsi_to_vioapic_and_vpin(const struct vmrt_vm_comp *vm, uint32_t vgsi, uint32_t *vpin) +{ + struct acrn_single_vioapic *vioapic; + uint8_t vioapic_index = 0U; + + if (vpin != NULL) { + *vpin = vgsi; + } + + vioapic = (struct acrn_single_vioapic *)&(vm_ioapics(vm)->vioapic_array[vioapic_index]); + + return vioapic; +} + +/** + * @brief Set vIOAPIC IRQ line status. + * + * Similar with vioapic_set_irqline_lock(),but would not make sure + * operation be done with ioapic lock. + * + * @param[in] vm Pointer to target VM + * @param[in] vgsi Target GSI number + * @param[in] operation Action options: GSI_SET_HIGH/GSI_SET_LOW/ + * GSI_RAISING_PULSE/GSI_FALLING_PULSE + * + * @pre vgsi < get_vm_gsicount(vm) + * @pre vm != NULL + * @return None + */ +void +vioapic_set_irqline_nolock(const struct vmrt_vm_comp *vm, uint32_t vgsi, uint32_t operation) +{ + struct acrn_single_vioapic *vioapic; + uint32_t pin; + + vioapic = vgsi_to_vioapic_and_vpin(vm, vgsi, &pin); + + switch (operation) { + case GSI_SET_HIGH: + vioapic_set_pinstate(vioapic, pin, 1U); + break; + case GSI_SET_LOW: + vioapic_set_pinstate(vioapic, pin, 0U); + break; + case GSI_RAISING_PULSE: + vioapic_set_pinstate(vioapic, pin, 1U); + vioapic_set_pinstate(vioapic, pin, 0U); + break; + case GSI_FALLING_PULSE: + vioapic_set_pinstate(vioapic, pin, 0U); + vioapic_set_pinstate(vioapic, pin, 1U); + break; + default: + /* + * The function caller could guarantee the pre condition. + */ + break; + } +} + +/** + * @brief Set vIOAPIC IRQ line status. + * + * @param[in] vm Pointer to target VM + * @param[in] vgsi Target GSI number + * @param[in] operation Action options: GSI_SET_HIGH/GSI_SET_LOW/ + * GSI_RAISING_PULSE/GSI_FALLING_PULSE + * + * @pre vgsi < get_vm_gsicount(vm) + * @pre vm != NULL + * + * @return None + */ +void +vioapic_set_irqline_lock(const struct vmrt_vm_comp *vm, uint32_t vgsi, uint32_t operation) +{ + uint64_t rflags; + + vioapic_set_irqline_nolock(vm, vgsi, operation); +} + +static uint32_t +vioapic_indirect_read(struct acrn_single_vioapic *vioapic, uint32_t addr) +{ + uint32_t regnum, ret = 0U; + uint32_t pin, pincount = vioapic->chipinfo.nr_pins; + + regnum = addr & 0xffU; + switch (regnum) { + case IOAPIC_ID: + ret = (uint32_t)vioapic->chipinfo.id << IOAPIC_ID_SHIFT; + break; + case IOAPIC_VER: + ret = ((pincount - 1U) << MAX_RTE_SHIFT) | ACRN_IOAPIC_VERSION; + break; + case IOAPIC_ARB: + ret = (uint32_t)vioapic->chipinfo.id << IOAPIC_ID_SHIFT; + break; + default: + /* + * In this switch statement, regnum shall either be IOAPIC_ID or + * IOAPIC_VER or IOAPIC_ARB. + * All the other cases will be handled properly later after this + * switch statement. + */ + break; + } + + /* redirection table entries */ + if ((regnum >= IOAPIC_REDTBL) && + (regnum < (IOAPIC_REDTBL + (pincount * 2U)))) { + uint32_t addr_offset = regnum - IOAPIC_REDTBL; + uint32_t rte_offset = addr_offset >> 1U; + pin = rte_offset; + if ((addr_offset & 0x1U) != 0U) { + ret = vioapic->rtbl[pin].u.hi_32; + } else { + ret = vioapic->rtbl[pin].u.lo_32; + } + } + + return ret; +} + +static inline bool vioapic_need_intr(const struct acrn_single_vioapic *vioapic, uint16_t pin) +{ + uint32_t lvl; + union ioapic_rte rte; + bool ret = false; + + if ((uint32_t)pin < vioapic->chipinfo.nr_pins) { + rte = vioapic->rtbl[pin]; + lvl = (uint32_t)bitmap_test(pin & 0x3FU, &vioapic->pin_state[pin >> 6U]); + ret = !!(((rte.bits.intr_polarity == IOAPIC_RTE_INTPOL_ALO) && (lvl == 0U)) || + ((rte.bits.intr_polarity == IOAPIC_RTE_INTPOL_AHI) && (lvl != 0U))); + } + + return ret; +} + +/* + * Due to the race between vcpus and vioapic->lock could be accessed from softirq, ensure to do + * spinlock_irqsave_obtain(&(vioapic->lock), &rflags) & spinlock_irqrestore_release(&(vioapic->lock), rflags) + * by caller. + */ +static void vioapic_indirect_write(struct acrn_single_vioapic *vioapic, uint32_t addr, uint32_t data) +{ + union ioapic_rte last, new, changed; + uint32_t regnum; + uint32_t pin, pincount = vioapic->chipinfo.nr_pins; + + regnum = addr & 0xffUL; + switch (regnum) { + case IOAPIC_ID: + vioapic->chipinfo.id = (uint8_t)((data & IOAPIC_ID_MASK) >> IOAPIC_ID_SHIFT); + break; + case IOAPIC_VER: + case IOAPIC_ARB: + /* readonly */ + break; + default: + /* + * In this switch statement, regnum shall either be IOAPIC_ID or + * IOAPIC_VER or IOAPIC_ARB. + * All the other cases will be handled properly later after this + * switch statement. + */ + break; + } + + /* redirection table entries */ + if ((regnum >= IOAPIC_REDTBL) && (regnum < (IOAPIC_REDTBL + (pincount * 2U)))) { + bool wire_mode_valid = true; + uint32_t addr_offset = regnum - IOAPIC_REDTBL; + uint32_t rte_offset = addr_offset >> 1U; + pin = rte_offset; + + last = vioapic->rtbl[pin]; + new = last; + if ((addr_offset & 1U) != 0U) { + new.u.hi_32 = data; + } else { + new.u.lo_32 &= RTBL_RO_BITS; + new.u.lo_32 |= (data & ~RTBL_RO_BITS); + } + + /* In some special scenarios, the LAPIC somehow hasn't send + * EOI to IOAPIC which cause the Remote IRR bit can't be clear. + * To clear it, some OSes will use EOI Register to clear it for + * 0x20 version IOAPIC, otherwise use switch Trigger Mode to + * Edge Sensitive to clear it. + */ + if (new.bits.trigger_mode == IOAPIC_RTE_TRGRMODE_EDGE) { + new.bits.remote_irr = 0U; + } + + changed.full = last.full ^ new.full; + /* pin0 from vpic mask/unmask */ + if ((pin == 0U) && (changed.bits.intr_mask != 0UL)) { + /* mask -> umask */ + if (last.bits.intr_mask == IOAPIC_RTE_MASK_SET) { + if ((vioapic->vm->wire_mode == VPIC_WIRE_NULL) || + (vioapic->vm->wire_mode == VPIC_WIRE_INTR)) { + vioapic->vm->wire_mode = VPIC_WIRE_IOAPIC; + printc("vpic wire mode -> IOAPIC\n"); + } else { + printc("WARNING: invalid vpic wire mode change\n"); + wire_mode_valid = false; + } + /* unmask -> mask */ + } else { + if (vioapic->vm->wire_mode == VPIC_WIRE_IOAPIC) { + vioapic->vm->wire_mode = VPIC_WIRE_INTR; + printc("vpic wire mode -> INTR\n"); + } + } + } + + if (wire_mode_valid) { + vioapic->rtbl[pin] = new; + + /* remap for ptdev */ + if ((new.bits.intr_mask == IOAPIC_RTE_MASK_CLR) || (last.bits.intr_mask == IOAPIC_RTE_MASK_CLR)) { + /* TODO: set pin remap*/ + } + + /* + * Generate an interrupt if the following conditions are met: + * - pin is not masked + * - previous interrupt has been EOIed + * - pin level is asserted + */ + if ((vioapic->rtbl[pin].bits.intr_mask == IOAPIC_RTE_MASK_CLR) && + (vioapic->rtbl[pin].bits.remote_irr == 0UL) && + vioapic_need_intr(vioapic, (uint16_t)pin)) { + vioapic_generate_intr(vioapic, pin); + } + } + } +} + +static void +vioapic_mmio_rw(struct acrn_single_vioapic *vioapic, uint64_t gpa, + uint32_t *data, bool do_read) +{ + uint32_t offset; + uint64_t rflags; + + offset = (uint32_t)(gpa - vioapic->chipinfo.addr); + + /* The IOAPIC specification allows 32-bit wide accesses to the + * IOAPIC_REGSEL (offset 0) and IOAPIC_WINDOW (offset 16) registers. + */ + switch (offset) { + case IOAPIC_REGSEL: + if (do_read) { + *data = vioapic->ioregsel; + } else { + vioapic->ioregsel = *data & 0xFFU; + } + break; + case IOAPIC_WINDOW: + if (do_read) { + *data = vioapic_indirect_read(vioapic, + vioapic->ioregsel); + } else { + vioapic_indirect_write(vioapic, + vioapic->ioregsel, *data); + } + break; + default: + assert(0); + if (do_read) { + *data = 0xFFFFFFFFU; + } + break; + } +} + +/* + * @pre vm != NULL + */ +static void +vioapic_process_eoi(struct acrn_single_vioapic *vioapic, uint32_t vector) +{ + uint32_t pin, pincount = vioapic->chipinfo.nr_pins; + union ioapic_rte rte; + uint64_t rflags; + + if ((vector < VECTOR_DYNAMIC_START) || (vector > NR_MAX_VECTOR)) { + printc("vioapic_process_eoi: invalid vector %u", vector); + } + + printc("ioapic processing eoi for vector %u\n", vector); + + /* notify device to ack if assigned pin */ + for (pin = 0U; pin < pincount; pin++) { + rte = vioapic->rtbl[pin]; + if ((rte.bits.vector != vector) || + (rte.bits.remote_irr == 0U)) { + continue; + } + } + + /* + * XXX keep track of the pins associated with this vector instead + * of iterating on every single pin each time. + */ + for (pin = 0U; pin < pincount; pin++) { + rte = vioapic->rtbl[pin]; + if ((rte.bits.vector != vector) || + (rte.bits.remote_irr == 0U)) { + continue; + } + + vioapic->rtbl[pin].bits.remote_irr = 0U; + if (vioapic_need_intr(vioapic, (uint16_t)pin)) { + printc("ioapic pin%hhu: asserted at eoi\n", pin); + vioapic_generate_intr(vioapic, pin); + } + } +} + +void vioapic_broadcast_eoi(const struct vmrt_vm_comp *vm, uint32_t vector) +{ + struct acrn_single_vioapic *vioapic; + uint8_t vioapic_index; + + /* + * For platforms with multiple IO-APICs, EOI message from LAPIC is + * broadcast to all IO-APICs. Emulating the same behavior here. + */ + + for (vioapic_index = 0U; vioapic_index < vm_ioapics(vm)->ioapic_num; vioapic_index++) { + vioapic = &(vm_ioapics(vm)->vioapic_array[vioapic_index]); + vioapic_process_eoi(vioapic, vector); + } +} + +static void reset_one_vioapic(struct acrn_single_vioapic *vioapic) +{ + uint32_t pin, pincount; + + /* Initialize all redirection entries to mask all interrupts */ + pincount = vioapic->chipinfo.nr_pins; + for (pin = 0U; pin < pincount; pin++) { + vioapic->rtbl[pin].full = MASK_ALL_INTERRUPTS; + } + vioapic->chipinfo.id = 0U; + vioapic->ioregsel = 0U; +} + +void reset_vioapics(const struct vmrt_vm_comp *vm) +{ + struct acrn_vioapics *vioapics = vm_ioapics(vm); + uint8_t vioapic_index; + + for (vioapic_index = 0U; vioapic_index < vioapics->ioapic_num; vioapic_index++) { + reset_one_vioapic(&vioapics->vioapic_array[vioapic_index]); + } +} + +void +vioapic_init(struct vmrt_vm_comp *vm) +{ + static struct ioapic_info virt_ioapic_info = { + .nr_pins = VIOAPIC_RTE_NUM, + .addr = VIOAPIC_BASE + }; + + struct ioapic_info *vioapic_info; + uint8_t vioapic_index; + struct acrn_single_vioapic *vioapic = NULL; + struct acrn_vioapics *vioapics = vm_ioapics(vm); + + /* only set one io apic */ + vioapics->ioapic_num = 1U; + vioapic_info = &virt_ioapic_info; + + for (vioapic_index = 0U; vioapic_index < vioapics->ioapic_num; vioapic_index++) { + vioapic = &vioapics->vioapic_array[vioapic_index]; + vioapic->chipinfo = vioapic_info[vioapic_index]; + + vioapic->vm = vm; + reset_one_vioapic(vioapic); + } + + /* + * Maximum number of GSI is computed as GSI base of the IOAPIC i.e. enumerated last in ACPI MADT + * plus the number of interrupt pins of that IOAPIC. + */ + if (vioapic != NULL) { + vioapics->nr_gsi = vioapic->chipinfo.gsi_base + vioapic->chipinfo.nr_pins; + } +} + +uint32_t +get_vm_gsicount(const struct vmrt_vm_comp *vm) +{ + struct acrn_vioapics *vioapics = vm_ioapics(vm); + return vioapics->nr_gsi; +} + +/* + * @pre handler_private_data != NULL + */ +int32_t vioapic_mmio_access_handler(struct vmrt_vm_vcpu *vcpu) +{ + struct acrn_mmio_request *mmio = vcpu->mmio_request; + struct acrn_single_vioapic *vioapic = &vm_ioapics(vcpu->vm)->vioapic_array[0]; + uint64_t gpa = mmio->address; + int32_t ret = 0; + + /* Note all RW to IOAPIC are 32-Bit in size */ + if (mmio->size == 4UL) { + uint32_t data = (uint32_t)mmio->value; + + if (mmio->direction == ACRN_IOREQ_DIR_READ) { + vioapic_mmio_rw(vioapic, gpa, &data, true); + mmio->value = (uint64_t)data; + } else if (mmio->direction == ACRN_IOREQ_DIR_WRITE) { + vioapic_mmio_rw(vioapic, gpa, &data, false); + } else { + ret = -EINVAL; + } + } else { + printc("All RW to IOAPIC must be 32-bits in size\n"); + assert(0); + } + + return ret; +} + +/** + * @pre vm->arch_vm.vioapics != NULL + * @pre vgsi < get_vm_gsicount(vm) + * @pre rte != NULL + */ +void vioapic_get_rte(const struct vmrt_vm_comp *vm, uint32_t vgsi, union ioapic_rte *rte) +{ + struct acrn_single_vioapic *vioapic; + uint32_t pin; + vioapic = vgsi_to_vioapic_and_vpin(vm, vgsi, &pin); + + *rte = vioapic->rtbl[pin]; +} diff --git a/src/components/implementation/simple_vmm/nf_multicore/vioapic.h b/src/components/implementation/simple_vmm/nf_multicore/vioapic.h new file mode 100644 index 0000000000..73794a091e --- /dev/null +++ b/src/components/implementation/simple_vmm/nf_multicore/vioapic.h @@ -0,0 +1,128 @@ +/*- + * Copyright (c) 2013 Tycho Nightingale + * Copyright (c) 2013 Neel Natu + * Copyright (c) 2017-2022 Intel Corporation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef VIOAPIC_H +#define VIOAPIC_H + +/** + * @file vioapic.h + * + * @brief public APIs for virtual I/O APIC + */ + +#include +#include +#include + +#define VIOAPIC_BASE 0xFEC00000UL +#define VIOAPIC_SIZE 4096UL +#define MAX_IOAPIC_NUM 1 + +#define REDIR_ENTRIES_HW 120U /* Service VM align with native ioapic */ +#define STATE_BITMAP_SIZE INT_DIV_ROUNDUP(REDIR_ENTRIES_HW, 64U) + +#define IOAPIC_RTE_LOW_INTVEC ((uint32_t)IOAPIC_RTE_INTVEC) + +/* + * id field is used to emulate the IOAPIC_ID register of vIOAPIC + */ + +struct acrn_single_vioapic { + // spinlock_t lock; + struct vmrt_vm_comp *vm; + struct ioapic_info chipinfo; + uint32_t ioregsel; + union ioapic_rte rtbl[REDIR_ENTRIES_HW]; + /* pin_state status bitmap: 1 - high, 0 - low */ + uint64_t pin_state[STATE_BITMAP_SIZE]; +}; + +/* + * ioapic_num represents the number of IO-APICs emulated for the VM. + * nr_gsi represents the maximum number of GSI emulated for the VM. + */ +struct acrn_vioapics { + uint8_t ioapic_num; + uint32_t nr_gsi; + struct acrn_single_vioapic vioapic_array[MAX_IOAPIC_NUM]; +}; + +void dump_vioapic(struct vmrt_vm_comp *vm); +void vioapic_init(struct vmrt_vm_comp *vm); +void reset_vioapics(const struct vmrt_vm_comp *vm); + + +/** + * @brief virtual I/O APIC + * + * @addtogroup acrn_vioapic ACRN vIOAPIC + * @{ + */ + +/** + * @brief Set vIOAPIC IRQ line status. + * + * @param[in] vm Pointer to target VM + * @param[in] vgsi GSI for the virtual interrupt + * @param[in] operation Action options: GSI_SET_HIGH/GSI_SET_LOW/ + * GSI_RAISING_PULSE/GSI_FALLING_PULSE + * + * @pre irqline < vioapic_pincount(vm) + * + * @return None + */ +void vioapic_set_irqline_lock(const struct vmrt_vm_comp *vm, uint32_t vgsi, uint32_t operation); + +/** + * @brief Set vIOAPIC IRQ line status. + * + * Similar with vioapic_set_irqline_lock(),but would not make sure + * operation be done with ioapic lock. + * + * @param[in] vm Pointer to target VM + * @param[in] vgsi GSI for the virtual interrupt + * @param[in] operation Action options: GSI_SET_HIGH/GSI_SET_LOW/ + * GSI_RAISING_PULSE/GSI_FALLING_PULSE + * + * @pre irqline < vioapic_pincount(vm) + * @return None + */ +void vioapic_set_irqline_nolock(const struct vmrt_vm_comp *vm, uint32_t vgsi, uint32_t operation); + +uint32_t get_vm_gsicount(const struct vmrt_vm_comp *vm); +void vioapic_broadcast_eoi(const struct vmrt_vm_comp *vm, uint32_t vector); +void vioapic_get_rte(const struct vmrt_vm_comp *vm, uint32_t vgsi, union ioapic_rte *rte); +int32_t vioapic_mmio_access_handler(struct vmrt_vm_vcpu *vcpu); +struct acrn_single_vioapic *vgsi_to_vioapic_and_vpin(const struct vmrt_vm_comp *vm, uint32_t vgsi, uint32_t *vpin); + +/** + * @} + */ +/* End of acrn_vioapic */ +#endif /* VIOAPIC_H */ diff --git a/src/components/implementation/simple_vmm/nf_multicore/vlapic.c b/src/components/implementation/simple_vmm/nf_multicore/vlapic.c new file mode 100644 index 0000000000..155eed10e3 --- /dev/null +++ b/src/components/implementation/simple_vmm/nf_multicore/vlapic.c @@ -0,0 +1,1554 @@ +/*- + * Copyright (c) 2011 NetApp, Inc. + * Copyright (c) 2017-2022 Intel Corporation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#define pr_prefix "vlapic: " + +#include +#include +#include +#include +#include +#include +#include "vpic.h" +#include "bits.h" +#include "atomic.h" + +#include + +#pragma GCC diagnostic ignored "-Wunused-but-set-variable" +#define VLAPIC_VERBOS 0 + +#define VLAPIC_VERSION (16U) +#define APICBASE_BSP 0x00000100UL +#define APICBASE_X2APIC 0x00000400UL +#define APICBASE_XAPIC 0x00000800UL +#define APICBASE_LAPIC_MODE (APICBASE_XAPIC | APICBASE_X2APIC) +#define APICBASE_ENABLED 0x00000800UL +#define LOGICAL_ID_MASK 0xFU +#define CLUSTER_ID_MASK 0xFFFF0U + +#define DBG_LEVEL_VLAPIC 6U + +int g_vlapi_enabled = 0; + +static inline struct vmrt_vm_vcpu *vlapic2vcpu(const struct acrn_vlapic *vlapic) +{ + return vlapic->vcpu; +} +static inline struct acrn_vlapic *vcpu_vlapic(struct vmrt_vm_vcpu *vcpu) +{ + return vcpu->vlapic; +} +static inline bool is_lapic_pt_configured(void) +{ + return false; +} + +static inline void vlapic_dump_irr(__unused const struct acrn_vlapic *vlapic, __unused const char *msg) {} +static inline void vlapic_dump_isr(__unused const struct acrn_vlapic *vlapic, __unused const char *msg) {} + +const struct acrn_apicv_ops *apicv_ops; + +static bool apicv_set_intr_ready(struct acrn_vlapic *vlapic, uint32_t vector); + +static void apicv_trigger_pi_anv(uint16_t dest_pcpu_id, uint32_t anv); + +static void vlapic_x2apic_self_ipi_handler(struct acrn_vlapic *vlapic); + +/* + * Post an interrupt to the vcpu running on 'hostcpu'. This will use a + * hardware assist if available (e.g. Posted Interrupt) or fall back to + * sending an 'ipinum' to interrupt the 'hostcpu'. + */ +static void vlapic_set_error(struct acrn_vlapic *vlapic, uint32_t mask); + +void vlapic_timer_expired(struct vmrt_vm_vcpu *vcpu); +static struct pi_desc *get_pi_desc(struct vmrt_vm_vcpu *vcpu); + +static inline bool vlapic_enabled(const struct acrn_vlapic *vlapic) +{ + const struct lapic_regs *lapic = vlapic->apic_page; + + return (((vlapic->msr_apicbase & APICBASE_ENABLED) != 0UL) && + ((lapic->svr.v & APIC_SVR_ENABLE) != 0U)); +} + +static inline void vlapic_build_x2apic_id(struct acrn_vlapic *vlapic) +{ + struct lapic_regs *lapic; + uint32_t logical_id, cluster_id; + + lapic = vlapic->apic_page; + lapic->id.v = vlapic->vapic_id; + logical_id = lapic->id.v & LOGICAL_ID_MASK; + cluster_id = (lapic->id.v & CLUSTER_ID_MASK) >> 4U; + lapic->ldr.v = (cluster_id << 16U) | (1U << logical_id); +} + +static inline uint32_t vlapic_find_isrv(const struct acrn_vlapic *vlapic) +{ + const struct lapic_regs *lapic = vlapic->apic_page; + uint32_t i, val, bitpos, isrv = 0U; + const struct lapic_reg *isrptr; + + isrptr = &lapic->isr[0]; + + /* i ranges effectively from 7 to 1 */ + for (i = 7U; i > 0U; i--) { + val = isrptr[i].v; + if (val != 0U) { + bitpos = (uint32_t)fls32(val); + isrv = (i << 5U) | bitpos; + break; + } + } + + return isrv; +} + +static void +vlapic_write_dfr(struct acrn_vlapic *vlapic) +{ + struct lapic_regs *lapic; + + lapic = vlapic->apic_page; + lapic->dfr.v &= APIC_DFR_MODEL_MASK; + lapic->dfr.v |= APIC_DFR_RESERVED; + + if ((lapic->dfr.v & APIC_DFR_MODEL_MASK) == APIC_DFR_MODEL_FLAT) { + printc("vlapic DFR in Flat Model\n"); + } else if ((lapic->dfr.v & APIC_DFR_MODEL_MASK) + == APIC_DFR_MODEL_CLUSTER) { + printc("vlapic DFR in Cluster Model\n"); + } else { + assert(0); + } +} + +static void +vlapic_write_ldr(struct acrn_vlapic *vlapic) +{ + struct lapic_regs *lapic; + + lapic = vlapic->apic_page; + lapic->ldr.v &= ~APIC_LDR_RESERVED; +} + +static inline uint32_t +vlapic_timer_divisor_shift(uint32_t dcr) +{ + uint32_t val; + + val = ((dcr & 0x3U) | ((dcr & 0x8U) >> 1U)); + return ((val + 1U) & 0x7U); +} + +__unused static inline bool +vlapic_lvtt_oneshot(const struct acrn_vlapic *vlapic) +{ + return (((vlapic->apic_page->lvt[APIC_LVT_TIMER].v) & APIC_LVTT_TM) + == APIC_LVTT_TM_ONE_SHOT); +} + +static inline bool +vlapic_lvtt_period(const struct acrn_vlapic *vlapic) +{ + return (((vlapic->apic_page->lvt[APIC_LVT_TIMER].v) & APIC_LVTT_TM) + == APIC_LVTT_TM_PERIODIC); +} + +static inline bool +vlapic_lvtt_tsc_deadline(const struct acrn_vlapic *vlapic) +{ + return (((vlapic->apic_page->lvt[APIC_LVT_TIMER].v) & APIC_LVTT_TM) + == APIC_LVTT_TM_TSCDLT); +} + +static inline bool +vlapic_lvtt_masked(const struct acrn_vlapic *vlapic) +{ + return (((vlapic->apic_page->lvt[APIC_LVT_TIMER].v) & APIC_LVTT_M) != 0U); +} + +static bool +set_expiration(struct acrn_vlapic *vlapic) +{ + struct vlapic_timer *vtimer; + uint32_t tmicr, divisor_shift; + bool ret; + + vtimer = &vlapic->vtimer; + tmicr = vtimer->tmicr; + divisor_shift = vtimer->divisor_shift; + + if ((tmicr == 0U) || (divisor_shift > 8U)) { + ret = false; + } else { + uint64_t delta = (uint64_t)tmicr << divisor_shift; + assert(0); + + ret = true; + } + return ret; +} + +static void vlapic_update_lvtt(struct acrn_vlapic *vlapic, + uint32_t val) +{ + uint32_t timer_mode = val & APIC_LVTT_TM; + struct vlapic_timer *vtimer = &vlapic->vtimer; + + if (vtimer->mode != timer_mode) { + struct hv_timer *timer = &vtimer->timer; + + /* + * A write to the LVT Timer Register that changes + * the timer mode disarms the local APIC timer. + */ + /* TODO: reset timer */ + vtimer->mode = timer_mode; + } +} + +static uint32_t vlapic_get_ccr(const struct acrn_vlapic *vlapic) +{ + uint32_t remain_count = 0U; + const struct vlapic_timer *vtimer = &vlapic->vtimer; + + if ((vtimer->tmicr != 0U) && (!vlapic_lvtt_tsc_deadline(vlapic))) { + uint64_t remains; + assert(0); + } + + return remain_count; +} + +static void vlapic_write_dcr(struct acrn_vlapic *vlapic) +{ + uint32_t divisor_shift; + struct vlapic_timer *vtimer; + struct lapic_regs *lapic = vlapic->apic_page; + + vtimer = &vlapic->vtimer; + divisor_shift = vlapic_timer_divisor_shift(lapic->dcr_timer.v); + + vtimer->divisor_shift = divisor_shift; +} + +static void vlapic_write_icrtmr(struct acrn_vlapic *vlapic) +{ + struct lapic_regs *lapic; + struct vlapic_timer *vtimer; + + if (!vlapic_lvtt_tsc_deadline(vlapic)) { + lapic = vlapic->apic_page; + vtimer = &vlapic->vtimer; + vtimer->tmicr = lapic->icr_timer.v; + } +} + +static void +vlapic_write_esr(struct acrn_vlapic *vlapic) +{ + struct lapic_regs *lapic; + + lapic = vlapic->apic_page; + lapic->esr.v = vlapic->esr_pending; + vlapic->esr_pending = 0U; +} + +static void +vlapic_set_tmr(struct acrn_vlapic *vlapic, uint32_t vector, bool level) +{ + struct lapic_reg *tmrptr = &(vlapic->apic_page->tmr[0]); + if (level) { + if (!bitmap32_test_and_set_lock((uint16_t)(vector & 0x1fU), &tmrptr[(vector & 0xffU) >> 5U].v)) { + assert(0); + } + } else { + if (bitmap32_test_and_clear_lock((uint16_t)(vector & 0x1fU), &tmrptr[(vector & 0xffU) >> 5U].v)) { + assert(0); + } + } +} + +static void apicv_basic_accept_intr(struct acrn_vlapic *vlapic, uint32_t vector, bool level) +{ + struct lapic_regs *lapic; + struct lapic_reg *irrptr; + uint32_t idx; + + lapic = vlapic->apic_page; + idx = vector >> 5U; + irrptr = &lapic->irr[0]; + + /* If the interrupt is set, don't try to do it again */ + if (!bitmap32_test_and_set_lock((uint16_t)(vector & 0x1fU), &irrptr[idx].v)) { + /* update TMR if interrupt trigger mode has changed */ + vlapic_set_tmr(vlapic, vector, level); + assert(0); + } +} + +static void apicv_advanced_accept_intr(struct acrn_vlapic *vlapic, uint32_t vector, bool level) +{ + /* update TMR if interrupt trigger mode has changed */ + vlapic_set_tmr(vlapic, vector, level); + + if (apicv_set_intr_ready(vlapic, vector)) { + /* + * Send interrupt to vCPU via posted interrupt way: + * 1. If target vCPU is in root mode(isn't running), + * record this request as ACRN_REQUEST_EVENT,then + * will pick up the interrupt from PIR and inject + * it to vCPU in next vmentry. + * 2. If target vCPU is in non-root mode(running), + * send PI notification to vCPU and hardware will + * sync PIR to vIRR automatically. + */ + + /* TODO: handle cross-core virtual interrupt notification */ + } +} + +/* + * @pre vector >= 16 + */ +static void vlapic_accept_intr(struct acrn_vlapic *vlapic, uint32_t vector, bool level) +{ + struct lapic_regs *lapic; + assert(vector <= 255); + + lapic = vlapic->apic_page; + if ((lapic->svr.v & APIC_SVR_ENABLE) == 0U) { + printc("vlapic is software disabled, ignoring interrupt %u", vector); + assert(0); + } else { + apicv_advanced_accept_intr(vlapic, vector, level); + } +} + +/** + * @brief Send notification vector to target pCPU. + * + * If APICv Posted-Interrupt is enabled and target pCPU is in non-root mode, + * pCPU will sync pending virtual interrupts from PIR to vIRR automatically, + * without VM exit. + * If pCPU in root-mode, virtual interrupt will be injected in next VM entry. + * + * @param[in] dest_pcpu_id Target CPU ID. + * @param[in] anv Activation Notification Vectors (ANV) + * + * @return None + */ +static void apicv_trigger_pi_anv(uint16_t dest_pcpu_id, uint32_t anv) +{ + /* TODO: support pi in the future */ + assert(0); +} + +/** + * @pre offset value shall be one of the folllowing values: + * APIC_OFFSET_CMCI_LVT + * APIC_OFFSET_TIMER_LVT + * APIC_OFFSET_THERM_LVT + * APIC_OFFSET_PERF_LVT + * APIC_OFFSET_LINT0_LVT + * APIC_OFFSET_LINT1_LVT + * APIC_OFFSET_ERROR_LVT + */ +static inline uint32_t +lvt_off_to_idx(uint32_t offset) +{ + uint32_t index; + + switch (offset) { + case APIC_OFFSET_CMCI_LVT: + index = APIC_LVT_CMCI; + break; + case APIC_OFFSET_TIMER_LVT: + index = APIC_LVT_TIMER; + break; + case APIC_OFFSET_THERM_LVT: + index = APIC_LVT_THERMAL; + break; + case APIC_OFFSET_PERF_LVT: + index = APIC_LVT_PMC; + break; + case APIC_OFFSET_LINT0_LVT: + index = APIC_LVT_LINT0; + break; + case APIC_OFFSET_LINT1_LVT: + index = APIC_LVT_LINT1; + break; + case APIC_OFFSET_ERROR_LVT: + default: + /* + * The function caller could guarantee the pre condition. + * So, all of the possible 'offset' other than + * APIC_OFFSET_ERROR_LVT has been handled in prior cases. + */ + index = APIC_LVT_ERROR; + break; + } + + return index; +} + +/** + * @pre offset value shall be one of the folllowing values: + * APIC_OFFSET_CMCI_LVT + * APIC_OFFSET_TIMER_LVT + * APIC_OFFSET_THERM_LVT + * APIC_OFFSET_PERF_LVT + * APIC_OFFSET_LINT0_LVT + * APIC_OFFSET_LINT1_LVT + * APIC_OFFSET_ERROR_LVT + */ +static inline uint32_t * +vlapic_get_lvtptr(struct acrn_vlapic *vlapic, uint32_t offset) +{ + struct lapic_regs *lapic = vlapic->apic_page; + uint32_t i; + uint32_t *lvt_ptr; + + switch (offset) { + case APIC_OFFSET_CMCI_LVT: + lvt_ptr = &lapic->lvt_cmci.v; + break; + default: + /* + * The function caller could guarantee the pre condition. + * All the possible 'offset' other than APIC_OFFSET_CMCI_LVT + * could be handled here. + */ + i = lvt_off_to_idx(offset); + lvt_ptr = &(lapic->lvt[i].v); + break; + } + return lvt_ptr; +} + +static inline uint32_t +vlapic_get_lvt(const struct acrn_vlapic *vlapic, uint32_t offset) +{ + uint32_t idx; + + idx = lvt_off_to_idx(offset); + return vlapic->lvt_last[idx]; +} + +static void +vlapic_write_lvt(struct acrn_vlapic *vlapic, uint32_t offset) +{ + uint32_t *lvtptr, mask, val, idx; + struct lapic_regs *lapic; + bool error = false; + + lapic = vlapic->apic_page; + lvtptr = vlapic_get_lvtptr(vlapic, offset); + val = *lvtptr; + + if ((lapic->svr.v & APIC_SVR_ENABLE) == 0U) { + val |= APIC_LVT_M; + } + mask = APIC_LVT_M | APIC_LVT_DS | APIC_LVT_VECTOR; + switch (offset) { + case APIC_OFFSET_TIMER_LVT: + mask |= APIC_LVTT_TM; + break; + case APIC_OFFSET_ERROR_LVT: + break; + case APIC_OFFSET_LINT0_LVT: + case APIC_OFFSET_LINT1_LVT: + mask |= APIC_LVT_TM | APIC_LVT_RIRR | APIC_LVT_IIPP; + /* FALLTHROUGH */ + default: + mask |= APIC_LVT_DM; + break; + } + val &= mask; + + /* vlapic mask/unmask LINT0 for ExtINT? */ + if ((offset == APIC_OFFSET_LINT0_LVT) && + ((val & APIC_LVT_DM) == APIC_LVT_DM_EXTINT)) { + uint32_t last = vlapic_get_lvt(vlapic, offset); + struct vmrt_vm_comp *vm = vlapic2vcpu(vlapic)->vm; + + /* mask -> unmask: may from every vlapic in the vm */ + if (((last & APIC_LVT_M) != 0U) && ((val & APIC_LVT_M) == 0U)) { + if ((vm->wire_mode == VPIC_WIRE_INTR) || + (vm->wire_mode == VPIC_WIRE_NULL)) { + vm->wire_mode = VPIC_WIRE_LAPIC; + printc("vpic wire mode -> LAPIC\n"); + } else { + printc("WARNING:invalid vpic wire mode change\n"); + assert(0); + } + /* unmask -> mask: only from the vlapic LINT0-ExtINT enabled */ + } else if (((last & APIC_LVT_M) == 0U) && ((val & APIC_LVT_M) != 0U)) { + if (vm->wire_mode == VPIC_WIRE_LAPIC) { + vm->wire_mode = VPIC_WIRE_NULL; + printc("vpic wire mode -> NULL\n"); + } + } else { + /* APIC_LVT_M unchanged. No action required. */ + } + } else if (offset == APIC_OFFSET_TIMER_LVT) { + vlapic_update_lvtt(vlapic, val); + } else { + /* No action required. */ + } + + if (!error) { + *lvtptr = val; + idx = lvt_off_to_idx(offset); + vlapic->lvt_last[idx] = val; + } +} + +static void +vlapic_mask_lvts(struct acrn_vlapic *vlapic) +{ + struct lapic_regs *lapic = vlapic->apic_page; + + lapic->lvt_cmci.v |= APIC_LVT_M; + vlapic_write_lvt(vlapic, APIC_OFFSET_CMCI_LVT); + + lapic->lvt[APIC_LVT_TIMER].v |= APIC_LVT_M; + vlapic_write_lvt(vlapic, APIC_OFFSET_TIMER_LVT); + + lapic->lvt[APIC_LVT_THERMAL].v |= APIC_LVT_M; + vlapic_write_lvt(vlapic, APIC_OFFSET_THERM_LVT); + + lapic->lvt[APIC_LVT_PMC].v |= APIC_LVT_M; + vlapic_write_lvt(vlapic, APIC_OFFSET_PERF_LVT); + + lapic->lvt[APIC_LVT_LINT0].v |= APIC_LVT_M; + vlapic_write_lvt(vlapic, APIC_OFFSET_LINT0_LVT); + + lapic->lvt[APIC_LVT_LINT1].v |= APIC_LVT_M; + vlapic_write_lvt(vlapic, APIC_OFFSET_LINT1_LVT); + + lapic->lvt[APIC_LVT_ERROR].v |= APIC_LVT_M; + vlapic_write_lvt(vlapic, APIC_OFFSET_ERROR_LVT); +} + +/* + * Algorithm adopted from section "Interrupt, Task and Processor Priority" + * in Intel Architecture Manual Vol 3a. + */ +static void +vlapic_update_ppr(struct acrn_vlapic *vlapic) +{ + uint32_t isrv, tpr, ppr; + + isrv = vlapic->isrv; + tpr = vlapic->apic_page->tpr.v; + + if (prio(tpr) >= prio(isrv)) { + ppr = tpr; + } else { + ppr = isrv & 0xf0U; + } + + vlapic->apic_page->ppr.v = ppr; +} + +static void +vlapic_process_eoi(struct acrn_vlapic *vlapic) +{ + struct lapic_regs *lapic = vlapic->apic_page; + struct lapic_reg *isrptr, *tmrptr; + uint32_t i, vector, bitpos; + + isrptr = &lapic->isr[0]; + tmrptr = &lapic->tmr[0]; + + if (vlapic->isrv != 0U) { + vector = vlapic->isrv; + i = (vector >> 5U); + bitpos = (vector & 0x1fU); + bitmap32_clear_nolock((uint16_t)bitpos, &isrptr[i].v); + + vlapic_dump_isr(vlapic, "vlapic_process_eoi"); + + vlapic->isrv = vlapic_find_isrv(vlapic); + vlapic_update_ppr(vlapic); + } +} + +static void +vlapic_set_error(struct acrn_vlapic *vlapic, uint32_t mask) +{ + uint32_t lvt, vec; + + vlapic->esr_pending |= mask; + if (vlapic->esr_firing == 0) { + vlapic->esr_firing = 1; + + /* The error LVT always uses the fixed delivery mode. */ + lvt = vlapic_get_lvt(vlapic, APIC_OFFSET_ERROR_LVT); + if ((lvt & APIC_LVT_M) == 0U) { + vec = lvt & APIC_LVT_VECTOR; + if (vec >= 16U) { + vlapic_accept_intr(vlapic, vec, LAPIC_TRIG_EDGE); + } + } + vlapic->esr_firing = 0; + } +} + +static void vlapic_write_icrlo(struct acrn_vlapic *vlapic) +{ + uint16_t vcpu_id; + bool phys = false, is_broadcast = false; + uint64_t dmask; + uint32_t icr_low, icr_high, dest; + uint32_t vec, mode, shorthand; + struct lapic_regs *lapic; + struct vmrt_vm_vcpu *target_vcpu; + + lapic = vlapic->apic_page; + lapic->icr_lo.v &= ~APIC_DELSTAT_PEND; + + icr_low = lapic->icr_lo.v; + icr_high = lapic->icr_hi.v; + if (is_x2apic_enabled(vlapic)) { + dest = icr_high; + is_broadcast = (dest == 0xffffffffU); + } else { + dest = icr_high >> APIC_ID_SHIFT; + is_broadcast = (dest == 0xffU); + } + vec = icr_low & APIC_VECTOR_MASK; + mode = icr_low & APIC_DELMODE_MASK; + phys = ((icr_low & APIC_DESTMODE_LOG) == 0UL); + shorthand = icr_low & APIC_DEST_MASK; + + if ((mode == APIC_DELMODE_FIXED) && (vec < 16U)) { + vlapic_set_error(vlapic, APIC_ESR_SEND_ILLEGAL_VECTOR); + printc("Ignoring invalid IPI %u", vec); + assert(0); + } else if (((shorthand == APIC_DEST_SELF) || (shorthand == APIC_DEST_ALLISELF)) + && ((mode == APIC_DELMODE_NMI) || (mode == APIC_DELMODE_INIT) + || (mode == APIC_DELMODE_STARTUP))) { + printc("unsupported ICR command, ignore it\n"); + } else { + struct vmrt_vm_vcpu *vcpu = vlapic2vcpu(vlapic); + + printc( + "icrlo 0x%08x icrhi 0x%08x triggered ipi %u", + icr_low, icr_high, vec); + + assert(0); + } +} + +static inline uint32_t vlapic_find_highest_irr(const struct acrn_vlapic *vlapic) +{ + const struct lapic_regs *lapic = vlapic->apic_page; + uint32_t i, val, bitpos, vec = 0U; + const struct lapic_reg *irrptr; + + irrptr = &lapic->irr[0]; + + /* i ranges effectively from 7 to 1 */ + for (i = 7U; i > 0U; i--) { + val = irrptr[i].v; + if (val != 0U) { + bitpos = (uint32_t)fls32(val); + vec = (i * 32U) + bitpos; + break; + } + } + + return vec; +} + +/** + * @brief Find a deliverable virtual interrupts for vLAPIC in irr. + * + * @param[in] vlapic Pointer to target vLAPIC data structure + * @param[inout] vecptr Pointer to vector buffer and will be filled + * with eligible vector if any. + * + * @retval false There is no deliverable pending vector. + * @retval true There is deliverable vector. + * + * @remark The vector does not automatically transition to the ISR as a + * result of calling this function. + * This function is only for case that APICv/VID is NOT supported. + */ +static bool vlapic_find_deliverable_intr(const struct acrn_vlapic *vlapic, uint32_t *vecptr) +{ + const struct lapic_regs *lapic = vlapic->apic_page; + uint32_t vec; + bool ret = false; + + vec = vlapic_find_highest_irr(vlapic); + if (prio(vec) > prio(lapic->ppr.v)) { + ret = true; + if (vecptr != NULL) { + *vecptr = vec; + } + } + + return ret; +} + +/** + * @brief Get a deliverable virtual interrupt from irr to isr. + * + * Transition 'vector' from IRR to ISR. This function is called with the + * vector returned by 'vlapic_find_deliverable_intr()' when the guest is able to + * accept this interrupt (i.e. RFLAGS.IF = 1 and no conditions exist that + * block interrupt delivery). + * + * @param[in] vlapic Pointer to target vLAPIC data structure + * @param[in] vector Target virtual interrupt vector + * + * @return None + * + * @pre vlapic != NULL + */ +static void vlapic_get_deliverable_intr(struct acrn_vlapic *vlapic, uint32_t vector) +{ + struct lapic_regs *lapic = vlapic->apic_page; + struct lapic_reg *irrptr, *isrptr; + uint32_t idx; + + /* + * clear the ready bit for vector being accepted in irr + * and set the vector as in service in isr. + */ + idx = vector >> 5U; + + irrptr = &lapic->irr[0]; + bitmap32_clear_lock((uint16_t)(vector & 0x1fU), &irrptr[idx].v); + + vlapic_dump_irr(vlapic, "vlapic_get_deliverable_intr"); + + isrptr = &lapic->isr[0]; + bitmap32_set_nolock((uint16_t)(vector & 0x1fU), &isrptr[idx].v); + vlapic_dump_isr(vlapic, "vlapic_get_deliverable_intr"); + + vlapic->isrv = vector; + + /* + * Update the PPR + */ + vlapic_update_ppr(vlapic); +} + +static void +vlapic_write_svr(struct acrn_vlapic *vlapic) +{ + struct lapic_regs *lapic; + uint32_t old, new, changed; + + lapic = vlapic->apic_page; + + new = lapic->svr.v; + old = vlapic->svr_last; + vlapic->svr_last = new; + + changed = old ^ new; + + if ((changed & APIC_SVR_ENABLE) != 0U) { + if ((new & APIC_SVR_ENABLE) == 0U) { + struct vmrt_vm_comp *vm = vlapic2vcpu(vlapic)->vm; + /* + * The apic is now disabled so stop the apic timer + * and mask all the LVT entries. + */ + printc("vlapic is software-disabled\n"); + + vlapic_mask_lvts(vlapic); + /* the only one enabled LINT0-ExtINT vlapic disabled */ + if (vm->wire_mode == VPIC_WIRE_NULL) { + vm->wire_mode = VPIC_WIRE_INTR; + printc("vpic wire mode -> INTR\n"); + } + } else { + /* + * The apic is now enabled so restart the apic timer + * if it is configured in periodic mode. + */ + printc("vlapic is software-enabled\n"); + g_vlapi_enabled = 1; + if (vlapic_lvtt_period(vlapic)) { + /* TODO: set timer logic */ + assert(0); + } + } + } +} + +static int32_t vlapic_read(struct acrn_vlapic *vlapic, uint32_t offset_arg, uint64_t *data) +{ + int32_t ret = 0; + struct lapic_regs *lapic = vlapic->apic_page; + uint32_t i; + uint32_t offset = offset_arg; + *data = 0UL; + + if (offset > sizeof(*lapic)) { + ret = -EACCES; + } else { + + offset &= ~0x3UL; + switch (offset) { + case APIC_OFFSET_ID: + *data = lapic->id.v; + break; + case APIC_OFFSET_VER: + *data = lapic->version.v; + break; + case APIC_OFFSET_PPR: + *data = lapic->ppr.v; + break; + case APIC_OFFSET_EOI: + *data = lapic->eoi.v; + break; + case APIC_OFFSET_LDR: + *data = lapic->ldr.v; + break; + case APIC_OFFSET_DFR: + *data = lapic->dfr.v; + break; + case APIC_OFFSET_SVR: + *data = lapic->svr.v; + break; + case APIC_OFFSET_ISR0: + case APIC_OFFSET_ISR1: + case APIC_OFFSET_ISR2: + case APIC_OFFSET_ISR3: + case APIC_OFFSET_ISR4: + case APIC_OFFSET_ISR5: + case APIC_OFFSET_ISR6: + case APIC_OFFSET_ISR7: + i = (offset - APIC_OFFSET_ISR0) >> 4U; + *data = lapic->isr[i].v; + break; + case APIC_OFFSET_TMR0: + case APIC_OFFSET_TMR1: + case APIC_OFFSET_TMR2: + case APIC_OFFSET_TMR3: + case APIC_OFFSET_TMR4: + case APIC_OFFSET_TMR5: + case APIC_OFFSET_TMR6: + case APIC_OFFSET_TMR7: + i = (offset - APIC_OFFSET_TMR0) >> 4U; + *data = lapic->tmr[i].v; + break; + case APIC_OFFSET_IRR0: + case APIC_OFFSET_IRR1: + case APIC_OFFSET_IRR2: + case APIC_OFFSET_IRR3: + case APIC_OFFSET_IRR4: + case APIC_OFFSET_IRR5: + case APIC_OFFSET_IRR6: + case APIC_OFFSET_IRR7: + i = (offset - APIC_OFFSET_IRR0) >> 4U; + *data = lapic->irr[i].v; + break; + case APIC_OFFSET_ESR: + *data = lapic->esr.v; + break; + case APIC_OFFSET_ICR_LOW: + *data = lapic->icr_lo.v; + if (is_x2apic_enabled(vlapic)) { + *data |= ((uint64_t)lapic->icr_hi.v) << 32U; + } + break; + case APIC_OFFSET_ICR_HI: + *data = lapic->icr_hi.v; + break; + case APIC_OFFSET_CMCI_LVT: + case APIC_OFFSET_TIMER_LVT: + case APIC_OFFSET_THERM_LVT: + case APIC_OFFSET_PERF_LVT: + case APIC_OFFSET_LINT0_LVT: + case APIC_OFFSET_LINT1_LVT: + case APIC_OFFSET_ERROR_LVT: + *data = vlapic_get_lvt(vlapic, offset); +#ifdef INVARIANTS + reg = vlapic_get_lvtptr(vlapic, offset); + assert(*data == *reg, "inconsistent lvt value at offset %#x: %#lx/%#x", offset, *data, *reg); +#endif + break; + case APIC_OFFSET_TIMER_ICR: + /* if TSCDEADLINE mode always return 0*/ + if (vlapic_lvtt_tsc_deadline(vlapic)) { + *data = 0UL; + } else { + *data = lapic->icr_timer.v; + } + break; + case APIC_OFFSET_TIMER_CCR: + *data = vlapic_get_ccr(vlapic); + break; + case APIC_OFFSET_TIMER_DCR: + *data = lapic->dcr_timer.v; + break; + default: + ret = -EACCES; + break; + } + } + + return ret; +} + + + +/* + * @pre vcpu != NULL + * @pre vector <= 255U + */ +void +vlapic_set_intr(struct vmrt_vm_vcpu *vcpu, uint32_t vector, bool level) +{ + struct acrn_vlapic *vlapic; + + vlapic = vcpu_vlapic(vcpu); + if (vector < 16U) { + vlapic_set_error(vlapic, APIC_ESR_RECEIVE_ILLEGAL_VECTOR); + assert(0); + } else { + vlapic_accept_intr(vlapic, vector, level); + } +} + +void vlapic_timer_expired(struct vmrt_vm_vcpu *vcpu) +{ + struct acrn_vlapic *vlapic; + struct lapic_regs *lapic; + + vlapic = vcpu_vlapic(vcpu); + lapic = vlapic->apic_page; + + /* inject vcpu timer interrupt if not masked */ + if (!vlapic_lvtt_masked(vlapic)) { + vlapic_set_intr(vcpu, lapic->lvt[APIC_LVT_TIMER].v & APIC_LVTT_VECTOR, LAPIC_TRIG_EDGE); + } +} + +/* + * @pre vm != NULL + */ +bool is_x2apic_enabled(const struct acrn_vlapic *vlapic) +{ + bool ret = false; + + return ret; +} + +bool is_xapic_enabled(const struct acrn_vlapic *vlapic) +{ + bool ret = true; + + return ret; +} + + +static bool apicv_basic_x2apic_read_msr_may_valid(uint32_t offset) +{ + return (offset != APIC_OFFSET_DFR) && (offset != APIC_OFFSET_ICR_HI); +} + +static bool apicv_advanced_x2apic_read_msr_may_valid(uint32_t offset) +{ + return (offset == APIC_OFFSET_TIMER_CCR); +} + +static bool apicv_basic_x2apic_write_msr_may_valid(uint32_t offset) +{ + return (offset != APIC_OFFSET_DFR) && (offset != APIC_OFFSET_ICR_HI); +} + +static bool apicv_advanced_x2apic_write_msr_may_valid(uint32_t offset) +{ + return (offset != APIC_OFFSET_DFR) && (offset != APIC_OFFSET_ICR_HI) && + (offset != APIC_OFFSET_EOI) && (offset != APIC_OFFSET_SELF_IPI); +} + + +/** + * APIC-v functions + * @pre get_pi_desc(vlapic2vcpu(vlapic)) != NULL + */ +static bool +apicv_set_intr_ready(struct acrn_vlapic *vlapic, uint32_t vector) +{ + struct pi_desc *pid; + uint32_t idx; + bool notify = false; + + pid = get_pi_desc(vlapic2vcpu(vlapic)); + idx = vector >> 6U; + if (!bitmap_test_and_set_lock((uint16_t)(vector & 0x3fU), &pid->pir[idx])) { + notify = !bitmap_test_and_set_lock(POSTED_INTR_ON, &pid->control.value); + } + return notify; +} + + +static void apicv_basic_inject_intr(struct acrn_vlapic *vlapic, + bool guest_irq_enabled, bool injected) +{ + uint32_t vector = 0U; + + if (guest_irq_enabled && (!injected)) { + vlapic_update_ppr(vlapic); + if (vlapic_find_deliverable_intr(vlapic, &vector)) { + assert(0); + vlapic_get_deliverable_intr(vlapic, vector); + } + } + + vlapic_update_tpr_threshold(vlapic); +} + +/* + * @brief Send a Posted Interrupt to itself. + * + * Interrupts are disabled on pCPU at this point of time. + * Upon the next VMEnter the self-IPI is serviced by the logical processor. + * Since the IPI vector is Posted Interrupt vector, logical processor syncs + * PIR to vIRR and updates RVI. + * + * @pre get_pi_desc(vlapic->vcpu) != NULL + */ +static inline struct pi_desc *get_pi_desc(struct vmrt_vm_vcpu *vcpu) +{ + return (struct pi_desc *)&(vcpu->shared_region->pi_desc); +} + +static void apicv_advanced_inject_intr(struct acrn_vlapic *vlapic, + __unused bool guest_irq_enabled, __unused bool injected) +{ + struct vmrt_vm_vcpu *vcpu = vlapic2vcpu(vlapic); + struct pi_desc *pid = get_pi_desc(vcpu); + + if (bitmap_test(POSTED_INTR_ON, &(pid->control.value))) { + vcpu->shared_region->inject_evt = 1; + } +} + +void vlapic_inject_intr(struct vmrt_vm_vcpu *vcpu) +{ + struct acrn_vlapic *vlapic = vcpu_vlapic(vcpu); + apicv_advanced_inject_intr(vlapic, 0, 0); +} + +static bool apicv_basic_has_pending_delivery_intr(struct vmrt_vm_vcpu *vcpu) +{ + uint32_t vector; + struct acrn_vlapic *vlapic = vcpu_vlapic(vcpu); + + vlapic_update_ppr(vlapic); + + /* check and raise request if we have a deliverable irq in LAPIC IRR */ + if (vlapic_find_deliverable_intr(vlapic, &vector)) { + /* we have pending IRR */ + assert(0); + } + + return vcpu->pending_req != 0UL; +} + +static bool apicv_advanced_has_pending_delivery_intr(__unused struct vmrt_vm_vcpu *vcpu) +{ + return false; +} + +bool vlapic_has_pending_delivery_intr(struct vmrt_vm_vcpu *vcpu) +{ + struct acrn_vlapic *vlapic = vcpu_vlapic(vcpu); + return vlapic->ops->has_pending_delivery_intr(vcpu); +} + +uint32_t vlapic_get_next_pending_intr(struct vmrt_vm_vcpu *vcpu) +{ + struct acrn_vlapic *vlapic = vcpu_vlapic(vcpu); + uint32_t vector; + + vector = vlapic_find_highest_irr(vlapic); + + return vector; +} + +static bool apicv_basic_has_pending_intr(struct vmrt_vm_vcpu *vcpu) +{ + return vlapic_get_next_pending_intr(vcpu) != 0UL; +} + +static bool apicv_advanced_has_pending_intr(struct vmrt_vm_vcpu *vcpu) +{ + return apicv_basic_has_pending_intr(vcpu); +} + +bool vlapic_clear_pending_intr(struct vmrt_vm_vcpu *vcpu, uint32_t vector) +{ + struct acrn_vlapic *vlapic = vcpu_vlapic(vcpu); + struct lapic_reg *irrptr = &(vlapic->apic_page->irr[0]); + uint32_t idx = vector >> 5U; + return bitmap32_test_and_clear_lock((uint16_t)(vector & 0x1fU), &irrptr[idx].v); +} + +bool vlapic_has_pending_intr(struct vmrt_vm_vcpu *vcpu) +{ + struct acrn_vlapic *vlapic = vcpu_vlapic(vcpu); + return vlapic->ops->has_pending_intr(vcpu); +} + +static bool apicv_basic_apic_read_access_may_valid(__unused uint32_t offset) +{ + return true; +} + +static bool apicv_advanced_apic_read_access_may_valid(uint32_t offset) +{ + return ((offset == APIC_OFFSET_CMCI_LVT) || (offset == APIC_OFFSET_TIMER_CCR)); +} + +static bool apicv_basic_apic_write_access_may_valid(uint32_t offset) +{ + return (offset != APIC_OFFSET_SELF_IPI); +} + +static bool apicv_advanced_apic_write_access_may_valid(uint32_t offset) +{ + return (offset == APIC_OFFSET_CMCI_LVT); +} + +int32_t veoi_vmexit_handler(struct vmrt_vm_vcpu *vcpu) +{ + struct acrn_vlapic *vlapic = NULL; + + uint32_t vector; + struct lapic_regs *lapic; + struct lapic_reg *tmrptr; + uint32_t idx; + + /* TODO: fix veoi if necessary */ + assert(0); + + return 0; +} + +static void vlapic_x2apic_self_ipi_handler(struct acrn_vlapic *vlapic) +{ + /* TODO: fix x2apic virtualization if necessary */ + struct lapic_regs *lapic; + uint32_t vector; + + lapic = vlapic->apic_page; + vector = lapic->self_ipi.v & APIC_VECTOR_MASK; + assert(0); +} + + +/* + * TPR threshold (32 bits). Bits 3:0 of this field determine the threshold + * below which bits 7:4 of VTPR (see Section 29.1.1) cannot fall. + */ +void vlapic_update_tpr_threshold(const struct acrn_vlapic *vlapic) +{ + /* TODO: fix trp virtualization if necessary */ + uint32_t irr, tpr, threshold; + assert(0); +} + +int32_t tpr_below_threshold_vmexit_handler(struct vmrt_vm_vcpu *vcpu) +{ + /* TODO: fix trp virtualization if necessary */ + assert(0); + + return 0; +} + +static const struct acrn_apicv_ops apicv_basic_ops = { + .accept_intr = apicv_basic_accept_intr, + .inject_intr = apicv_basic_inject_intr, + .has_pending_delivery_intr = apicv_basic_has_pending_delivery_intr, + .has_pending_intr = apicv_basic_has_pending_intr, + .apic_read_access_may_valid = apicv_basic_apic_read_access_may_valid, + .apic_write_access_may_valid = apicv_basic_apic_write_access_may_valid, + .x2apic_read_msr_may_valid = apicv_basic_x2apic_read_msr_may_valid, + .x2apic_write_msr_may_valid = apicv_basic_x2apic_write_msr_may_valid, +}; + +static const struct acrn_apicv_ops apicv_advanced_ops = { + .accept_intr = apicv_advanced_accept_intr, + .inject_intr = apicv_advanced_inject_intr, + .has_pending_delivery_intr = apicv_advanced_has_pending_delivery_intr, + .has_pending_intr = apicv_advanced_has_pending_intr, + .apic_read_access_may_valid = apicv_advanced_apic_read_access_may_valid, + .apic_write_access_may_valid = apicv_advanced_apic_write_access_may_valid, + .x2apic_read_msr_may_valid = apicv_advanced_x2apic_read_msr_may_valid, + .x2apic_write_msr_may_valid = apicv_advanced_x2apic_write_msr_may_valid, +}; + +/* + * set apicv ops for apicv basic mode or apicv advenced mode. + */ +void vlapic_set_apicv_ops(void) +{ + if (is_apicv_advanced_feature_supported()) { + apicv_ops = &apicv_advanced_ops; + } else { + apicv_ops = &apicv_basic_ops; + } +} + +static uint16_t vm_apicid2vcpu_id(struct vmrt_vm_comp *vm, uint32_t lapicid) +{ + uint16_t i; + struct vmrt_vm_vcpu *vcpu = NULL; + uint16_t cpu_id = INVALID_CPU_ID; + + for (int i = 0; i < vm->num_vcpu; i++) { + vcpu = &vm->vcpus[i]; + if (vcpu_vlapic(vcpu)->vapic_id == lapicid) { + cpu_id = vcpu->cpuid; + break; + } + } + + if (cpu_id == INVALID_CPU_ID) { + printc("%s: bad lapicid %u", __func__, lapicid); + assert(0); + } + + return cpu_id; + +} + +static inline void set_dest_mask_phys(struct vmrt_vm_comp *vm, uint64_t *dmask, uint32_t dest) +{ + uint16_t vcpu_id; + + vcpu_id = vm_apicid2vcpu_id(vm, dest); + if (vcpu_id < vm->num_vcpu) { + bitmap_set_nolock(vcpu_id, dmask); + } +} + +/* + * This function tells if a vlapic belongs to the destination. + * If yes, return true, else reture false. + * + * @pre vlapic != NULL + */ +static inline bool is_dest_field_matched(const struct acrn_vlapic *vlapic, uint32_t dest) +{ + uint32_t logical_id, cluster_id, dest_logical_id, dest_cluster_id; + uint32_t ldr = vlapic->apic_page->ldr.v; + bool ret = false; + + if (is_x2apic_enabled(vlapic)) { + logical_id = ldr & 0xFFFFU; + cluster_id = (ldr >> 16U) & 0xFFFFU; + dest_logical_id = dest & 0xFFFFU; + dest_cluster_id = (dest >> 16U) & 0xFFFFU; + if ((cluster_id == dest_cluster_id) && ((logical_id & dest_logical_id) != 0U)) { + ret = true; + } + } else { + uint32_t dfr = vlapic->apic_page->dfr.v; + if ((dfr & APIC_DFR_MODEL_MASK) == APIC_DFR_MODEL_FLAT) { + /* + * In the "Flat Model" the MDA is interpreted as an 8-bit wide + * bitmask. This model is available in the xAPIC mode only. + */ + logical_id = ldr >> 24U; + dest_logical_id = dest & 0xffU; + if ((logical_id & dest_logical_id) != 0U) { + ret = true; + } + } else if ((dfr & APIC_DFR_MODEL_MASK) == APIC_DFR_MODEL_CLUSTER) { + /* + * In the "Cluster Model" the MDA is used to identify a + * specific cluster and a set of APICs in that cluster. + */ + logical_id = (ldr >> 24U) & 0xfU; + cluster_id = ldr >> 28U; + dest_logical_id = dest & 0xfU; + dest_cluster_id = (dest >> 4U) & 0xfU; + if ((cluster_id == dest_cluster_id) && ((logical_id & dest_logical_id) != 0U)) { + ret = true; + } + } else { + /* Guest has configured a bad logical model for this vcpu. */ + printc("vlapic has bad logical model %x", dfr); + assert(0); + } + } + + return ret; +} + +/* + * This function populates 'dmask' with the set of vcpus that match the + * addressing specified by the (dest, phys, lowprio) tuple. + */ +uint64_t +vlapic_calc_dest_noshort(struct vmrt_vm_comp *vm, bool is_broadcast, + uint32_t dest, bool phys, bool lowprio) +{ + uint64_t dmask = 0UL; + struct acrn_vlapic *vlapic, *lowprio_dest = NULL; + struct vmrt_vm_vcpu *vcpu; + uint16_t vcpu_id; + + if (is_broadcast) { + /* Broadcast in both logical and physical modes. */ + printc("Broadcast is not supported now\n"); + assert(0); + } else if (phys) { + /* Physical mode: "dest" is local APIC ID. */ + printc("vlapic phy dst mode to find cpu\n"); + set_dest_mask_phys(vm, &dmask, dest); + } else { + /* + * Logical mode: "dest" is message destination addr + * to be compared with the logical APIC ID in LDR. + */ + for (int i = 0; i < vm->num_vcpu; i++) { + vcpu = &vm->vcpus[i]; + vcpu_id = i; + vlapic = vcpu_vlapic(vcpu); + if (!is_dest_field_matched(vlapic, dest)) { + continue; + } + + if (lowprio) { + /* + * for lowprio delivery mode, the lowest-priority one + * among all "dest" matched processors accepts the intr. + */ + if (lowprio_dest == NULL) { + lowprio_dest = vlapic; + } else if (lowprio_dest->apic_page->ppr.v > vlapic->apic_page->ppr.v) { + lowprio_dest = vlapic; + } else { + /* No other state currently, do nothing */ + } + } else { + bitmap_set_nolock(vcpu_id, &dmask); + } + } + + if (lowprio && (lowprio_dest != NULL)) { + bitmap_set_nolock(vlapic2vcpu(lowprio_dest)->cpuid, &dmask); + } + } + + return dmask; +} + +void +vlapic_receive_intr(struct vmrt_vm_comp *vm, bool level, uint32_t dest, bool phys, + uint32_t delmode, uint32_t vec, bool rh) +{ + bool lowprio; + uint16_t vcpu_id; + uint64_t dmask; + struct vmrt_vm_vcpu *target_vcpu; + + if ((delmode != IOAPIC_RTE_DELMODE_FIXED) && + (delmode != IOAPIC_RTE_DELMODE_LOPRI) && + (delmode != IOAPIC_RTE_DELMODE_EXINT)) { + printc("vlapic intr invalid delmode %#x", delmode); + assert(0); + } else { + lowprio = (delmode == IOAPIC_RTE_DELMODE_LOPRI) || rh; + + /* + * We don't provide any virtual interrupt redirection hardware so + * all interrupts originating from the ioapic or MSI specify the + * 'dest' in the legacy xAPIC format. + */ + dmask = vlapic_calc_dest_noshort(vm, false, dest, phys, lowprio); + + for (vcpu_id = 0U; vcpu_id < vm->num_vcpu; vcpu_id++) { + struct acrn_vlapic *vlapic; + if ((dmask & (1UL << vcpu_id)) != 0UL) { + target_vcpu = vmrt_get_vcpu(vm, vcpu_id); + + /* only make request when vlapic enabled */ + vlapic = vcpu_vlapic(target_vcpu); + if (vlapic_enabled(vlapic)) { + if (delmode == IOAPIC_RTE_DELMODE_EXINT) { + assert(0); + } else { + vlapic_set_intr(target_vcpu, vec, level); + } + } else {assert(0);} + } + } + } +} + +void +vlapic_reset(struct acrn_vlapic *vlapic) +{ + struct lapic_regs *lapic; + + vlapic->msr_apicbase = DEFAULT_APIC_BASE; + + if (vlapic2vcpu(vlapic)->cpuid == BSP_CPU_ID) { + vlapic->msr_apicbase |= APICBASE_BSP; + } + vlapic->vapic_id = vlapic2vcpu(vlapic)->cpuid; + + /* Upon reset, vlapic is set to xAPIC mode. */ + vlapic->msr_apicbase |= APICBASE_XAPIC; + + lapic = vlapic->apic_page; + (void)memset((void *)lapic, 0U, sizeof(struct lapic_regs)); + + lapic->id.v = vlapic->vapic_id; + if (!is_x2apic_enabled(vlapic)) { + lapic->id.v <<= APIC_ID_SHIFT; + } + + lapic->version.v = VLAPIC_VERSION; + lapic->version.v |= (VLAPIC_MAXLVT_INDEX << MAXLVTSHIFT); + lapic->dfr.v = 0xffffffffU; + lapic->svr.v = APIC_SVR_VECTOR; + vlapic_mask_lvts(vlapic); + + lapic->icr_timer.v = 0U; + lapic->dcr_timer.v = 0U; + vlapic_write_dcr(vlapic); + + vlapic->svr_last = lapic->svr.v; + + vlapic->isrv = 0U; +} + + +int32_t apic_write_vmexit_handler(struct vmrt_vm_vcpu *vcpu) +{ + uint64_t qual; + int32_t err = 0; + uint32_t offset; + struct acrn_vlapic *vlapic = NULL; + + qual = vcpu->shared_region->qualification; + offset = (uint32_t)(qual & 0xFFFUL); + + vlapic = vcpu->vlapic; + + switch (offset) { + case APIC_OFFSET_ID: + /* Force APIC ID as read only */ + break; + case APIC_OFFSET_LDR: + vlapic_write_ldr(vlapic); + break; + case APIC_OFFSET_DFR: + vlapic_write_dfr(vlapic); + break; + case APIC_OFFSET_SVR: + vlapic_write_svr(vlapic); + break; + case APIC_OFFSET_ESR: + vlapic_write_esr(vlapic); + break; + case APIC_OFFSET_ICR_LOW: + vlapic_write_icrlo(vlapic); + break; + case APIC_OFFSET_CMCI_LVT: + case APIC_OFFSET_TIMER_LVT: + case APIC_OFFSET_THERM_LVT: + case APIC_OFFSET_PERF_LVT: + case APIC_OFFSET_LINT0_LVT: + case APIC_OFFSET_LINT1_LVT: + case APIC_OFFSET_ERROR_LVT: + vlapic_write_lvt(vlapic, offset); + break; + case APIC_OFFSET_TIMER_ICR: + vlapic_write_icrtmr(vlapic); + break; + case APIC_OFFSET_TIMER_DCR: + vlapic_write_dcr(vlapic); + break; + case APIC_OFFSET_SELF_IPI: + if (is_x2apic_enabled(vlapic)) { + /* Don't support x2apic */ + assert(0); + break; + } + /* falls through */ + default: + err = -EACCES; + printc("Unhandled APIC-Write, offset:0x%x", offset); + VM_PANIC(vcpu); + break; + } + + return err; +} + +void +lapic_write_handler(struct vmrt_vm_vcpu *vcpu) +{ + apic_write_vmexit_handler(vcpu); +} + +void +lapic_intr_inject(struct vmrt_vm_vcpu *vcpu, u8_t vector, int autoeoi) +{ + struct vm_vcpu_shared_region *shared_region = vcpu->shared_region; + struct acrn_vlapic *vlapic = vcpu_vlapic(vcpu); + struct lapic_regs *lapic = vlapic->apic_page; + u8_t offset = vector / 32; + u8_t bit = vector % 32; + + u8_t svi = (u8_t)(shared_region->interrupt_status >> 8); + u8_t rvi = (u8_t)shared_region->interrupt_status; + + if (svi == vector && autoeoi) { + /* TODO: svi should be the second highest priority bit in isr */ + svi = 0; + lapic->isr[offset].v &= ~(1U << bit); + } + if (rvi < vector) { + rvi = vector; + } + + /* Accept the interrupt */ + lapic->irr[offset].v |= (1U << bit); + + shared_region->interrupt_status = svi << 8 | rvi; +} diff --git a/src/components/implementation/simple_vmm/nf_multicore/vlapic.h b/src/components/implementation/simple_vmm/nf_multicore/vlapic.h new file mode 100644 index 0000000000..d4e8645661 --- /dev/null +++ b/src/components/implementation/simple_vmm/nf_multicore/vlapic.h @@ -0,0 +1,260 @@ +/*- + * Copyright (c) 2011 NetApp, Inc. + * Copyright (c) 2017-2022 Intel Corporation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef VLAPIC_H +#define VLAPIC_H + +#include +#include + +/** + * @file vlapic.h + * + * @brief public APIs for virtual LAPIC + */ + + +#define VLAPIC_MAXLVT_INDEX APIC_LVT_CMCI + +struct hv_timer { + // struct list_head node; /**< link all timers */ + int mode; /**< timer mode: one-shot or periodic */ + uint64_t timeout; /**< tsc deadline to interrupt */ + uint64_t period_in_cycle; /**< period of the periodic timer in CPU ticks */ + // timer_handle_t func; /**< callback if time reached */ + void *priv_data; /**< func private data */ +}; + +struct vlapic_timer { + struct hv_timer timer; + uint32_t mode; + uint32_t tmicr; + uint32_t divisor_shift; +}; + +struct acrn_vlapic { + /* + * Please keep 'apic_page' as the first field in + * current structure, as below alignment restrictions are mandatory + * to support APICv features: + * - 'apic_page' MUST be 4KB aligned. + * IRR, TMR and PIR could be accessed by other vCPUs when deliver + * an interrupt to vLAPIC. + */ + struct lapic_regs *apic_page; + + struct vmrt_vm_vcpu *vcpu; + + uint32_t vapic_id; + uint32_t esr_pending; + int32_t esr_firing; + + struct vlapic_timer vtimer; + + /* + * isrv: vector number for the highest priority bit that is set in the ISR + */ + uint32_t isrv; + + uint64_t msr_apicbase; + + const struct acrn_apicv_ops *ops; + + /* + * Copies of some registers in the virtual APIC page. We do this for + * a couple of different reasons: + * - to be able to detect what changed (e.g. svr_last) + * - to maintain a coherent snapshot of the register (e.g. lvt_last) + */ + uint32_t svr_last; + uint32_t lvt_last[VLAPIC_MAXLVT_INDEX + 1]; +} __attribute__((aligned(PAGE_SIZE_4K))); + + +struct vmrt_vm_vcpu; +struct acrn_apicv_ops { + void (*accept_intr)(struct acrn_vlapic *vlapic, uint32_t vector, bool level); + void (*inject_intr)(struct acrn_vlapic *vlapic, bool guest_irq_enabled, bool injected); + bool (*has_pending_delivery_intr)(struct vmrt_vm_vcpu *vcpu); + bool (*has_pending_intr)(struct vmrt_vm_vcpu *vcpu); + bool (*apic_read_access_may_valid)(uint32_t offset); + bool (*apic_write_access_may_valid)(uint32_t offset); + bool (*x2apic_read_msr_may_valid)(uint32_t offset); + bool (*x2apic_write_msr_may_valid)(uint32_t offset); +}; + +enum reset_mode; +extern const struct acrn_apicv_ops *apicv_ops; +void vlapic_set_apicv_ops(void); + +/** + * @brief virtual LAPIC + * + * @addtogroup acrn_vlapic ACRN vLAPIC + * @{ + */ + +void vlapic_inject_intr(struct vmrt_vm_vcpu *vcpu); +bool vlapic_has_pending_delivery_intr(struct vmrt_vm_vcpu *vcpu); +bool vlapic_has_pending_intr(struct vmrt_vm_vcpu *vcpu); + +/** + * Returns the highest priority pending vector on vLAPIC, or + * 0 if there is no pending vector. + */ +uint32_t vlapic_get_next_pending_intr(struct vmrt_vm_vcpu *vcpu); + +/** + * Clears a pending vector from vIRR. Returns true if + * the bit was previously present, false otherwise. + */ +bool vlapic_clear_pending_intr(struct vmrt_vm_vcpu *vcpu, uint32_t vector); + +uint64_t vlapic_get_tsc_deadline_msr(const struct acrn_vlapic *vlapic); +void vlapic_set_tsc_deadline_msr(struct acrn_vlapic *vlapic, uint64_t val_arg); +uint64_t vlapic_get_apicbase(const struct acrn_vlapic *vlapic); +int32_t vlapic_set_apicbase(struct acrn_vlapic *vlapic, uint64_t new); +int32_t vlapic_x2apic_read(struct vmrt_vm_vcpu *vcpu, uint32_t msr, uint64_t *val); +int32_t vlapic_x2apic_write(struct vmrt_vm_vcpu *vcpu, uint32_t msr, uint64_t val); + +/* + * Signals to the LAPIC that an interrupt at 'vector' needs to be generated + * to the 'cpu', the state is recorded in IRR. + * @pre vcpu != NULL + * @pre vector <= 255U + */ +void vlapic_set_intr(struct vmrt_vm_vcpu *vcpu, uint32_t vector, bool level); + +#define LAPIC_TRIG_LEVEL true +#define LAPIC_TRIG_EDGE false + +static inline uint32_t prio(uint32_t x) +{ + return (x >> 4U); +} + +/** + * @brief Triggers LAPIC local interrupt(LVT). + * + * @param[in] vm Pointer to VM data structure + * @param[in] vcpu_id_arg ID of vCPU, BROADCAST_CPU_ID means triggering + * interrupt to all vCPUs. + * @param[in] lvt_index The index which LVT would to be fired. + * + * @retval 0 on success. + * @retval -EINVAL on error that vcpu_id_arg or vector of the LVT is invalid. + * + * @pre vm != NULL + */ +int32_t vlapic_set_local_intr(struct vmrt_vm_comp *vm, uint16_t vcpu_id_arg, uint32_t lvt_index); + +/** + * @brief Inject MSI to target VM. + * + * @param[in] vm Pointer to VM data structure + * @param[in] addr MSI address. + * @param[in] data MSI data. + * + * @retval 0 on success. + * @retval -1 on error that addr is invalid. + * + * @pre vm != NULL + */ +int32_t vlapic_inject_msi(struct vmrt_vm_comp *vm, uint64_t addr, uint64_t data); + + +void vlapic_receive_intr(struct vmrt_vm_comp *vm, bool level, uint32_t dest, + bool phys, uint32_t delmode, uint32_t vec, bool rh); + +/** + * @pre vlapic != NULL + */ +static inline uint32_t vlapic_get_apicid(const struct acrn_vlapic *vlapic) +{ + return vlapic->vapic_id; +} + +void vlapic_create(struct vmrt_vm_vcpu *vcpu, uint16_t pcpu_id); +/* + * @pre vcpu != NULL + */ +void vlapic_free(struct vmrt_vm_vcpu *vcpu); + +void vlapic_reset(struct acrn_vlapic *vlapic); +void vlapic_restore(struct acrn_vlapic *vlapic, const struct lapic_regs *regs); +uint64_t vlapic_apicv_get_apic_access_addr(void); +uint64_t vlapic_apicv_get_apic_page_addr(struct acrn_vlapic *vlapic); +int32_t apic_access_vmexit_handler(struct vmrt_vm_vcpu *vcpu); +int32_t apic_write_vmexit_handler(struct vmrt_vm_vcpu *vcpu); +int32_t veoi_vmexit_handler(struct vmrt_vm_vcpu *vcpu); +void vlapic_update_tpr_threshold(const struct acrn_vlapic *vlapic); +int32_t tpr_below_threshold_vmexit_handler(struct vmrt_vm_vcpu *vcpu); +uint64_t vlapic_calc_dest_noshort(struct vmrt_vm_comp *vm, bool is_broadcast, + uint32_t dest, bool phys, bool lowprio); +bool is_x2apic_enabled(const struct acrn_vlapic *vlapic); +bool is_xapic_enabled(const struct acrn_vlapic *vlapic); + +static inline bool is_apicv_advanced_feature_supported(void) +{ + return false; +} +#define POSTED_INTR_ON 0U +/* Posted Interrupt Descriptor (PID) in VT-d spec */ +struct pi_desc { + /* Posted Interrupt Requests, one bit per requested vector */ + uint64_t pir[4]; + + union { + struct { + /* Outstanding Notification */ + uint16_t on:1; + + /* Suppress Notification, of non-urgent interrupts */ + uint16_t sn:1; + + uint16_t rsvd_1:14; + + /* Notification Vector */ + uint8_t nv; + + uint8_t rsvd_2; + + /* Notification destination, a physical LAPIC ID */ + uint32_t ndst; + } bits; + + uint64_t value; + } control; + + uint32_t rsvd[6]; +} __attribute__((aligned(64)));; +/** + * @} + */ +/* End of acrn_vlapic */ +#endif /* VLAPIC_H */ diff --git a/src/components/implementation/simple_vmm/nf_multicore/vlapic_priv.h b/src/components/implementation/simple_vmm/nf_multicore/vlapic_priv.h new file mode 100644 index 0000000000..6c66f6c84e --- /dev/null +++ b/src/components/implementation/simple_vmm/nf_multicore/vlapic_priv.h @@ -0,0 +1,84 @@ +/*- + * Copyright (c) 2013 Neel Natu + * Copyright (c) 2017-2022 Intel Corporation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef VLAPIC_PRIV_H +#define VLAPIC_PRIV_H + +/* + * APIC Register: Offset Description + */ +#define APIC_OFFSET_ID 0x20U /* Local APIC ID */ +#define APIC_OFFSET_VER 0x30U /* Local APIC Version */ +#define APIC_OFFSET_TPR 0x80U /* Task Priority Register */ +#define APIC_OFFSET_APR 0x90U /* Arbitration Priority */ +#define APIC_OFFSET_PPR 0xA0U /* Processor Priority Register */ +#define APIC_OFFSET_EOI 0xB0U /* EOI Register */ +#define APIC_OFFSET_RRR 0xC0U /* Remote read */ +#define APIC_OFFSET_LDR 0xD0U /* Logical Destination */ +#define APIC_OFFSET_DFR 0xE0U /* Destination Format Register */ +#define APIC_OFFSET_SVR 0xF0U /* Spurious Vector Register */ +#define APIC_OFFSET_ISR0 0x100U /* In Service Register */ +#define APIC_OFFSET_ISR1 0x110U +#define APIC_OFFSET_ISR2 0x120U +#define APIC_OFFSET_ISR3 0x130U +#define APIC_OFFSET_ISR4 0x140U +#define APIC_OFFSET_ISR5 0x150U +#define APIC_OFFSET_ISR6 0x160U +#define APIC_OFFSET_ISR7 0x170U +#define APIC_OFFSET_TMR0 0x180U /* Trigger Mode Register */ +#define APIC_OFFSET_TMR1 0x190U +#define APIC_OFFSET_TMR2 0x1A0U +#define APIC_OFFSET_TMR3 0x1B0U +#define APIC_OFFSET_TMR4 0x1C0U +#define APIC_OFFSET_TMR5 0x1D0U +#define APIC_OFFSET_TMR6 0x1E0U +#define APIC_OFFSET_TMR7 0x1F0U +#define APIC_OFFSET_IRR0 0x200U /* Interrupt Request Register */ +#define APIC_OFFSET_IRR1 0x210U +#define APIC_OFFSET_IRR2 0x220U +#define APIC_OFFSET_IRR3 0x230U +#define APIC_OFFSET_IRR4 0x240U +#define APIC_OFFSET_IRR5 0x250U +#define APIC_OFFSET_IRR6 0x260U +#define APIC_OFFSET_IRR7 0x270U +#define APIC_OFFSET_ESR 0x280U /* Error Status Register */ +#define APIC_OFFSET_CMCI_LVT 0x2F0U /* Local Vector Table (CMCI) */ +#define APIC_OFFSET_ICR_LOW 0x300U /* Interrupt Command Register */ +#define APIC_OFFSET_ICR_HI 0x310U +#define APIC_OFFSET_TIMER_LVT 0x320U /* Local Vector Table (Timer) */ +#define APIC_OFFSET_THERM_LVT 0x330U /* Local Vector Table (Thermal) */ +#define APIC_OFFSET_PERF_LVT 0x340U /* Local Vector Table (PMC) */ +#define APIC_OFFSET_LINT0_LVT 0x350U /* Local Vector Table (LINT0) */ +#define APIC_OFFSET_LINT1_LVT 0x360U /* Local Vector Table (LINT1) */ +#define APIC_OFFSET_ERROR_LVT 0x370U /* Local Vector Table (ERROR) */ +#define APIC_OFFSET_TIMER_ICR 0x380U /* Timer's Initial Count */ +#define APIC_OFFSET_TIMER_CCR 0x390U /* Timer's Current Count */ +#define APIC_OFFSET_TIMER_DCR 0x3E0U /* Timer's Divide Configuration */ +#define APIC_OFFSET_SELF_IPI 0x3F0U /* Self IPI Register */ + +#endif /* VLAPIC_PRIV_H */ diff --git a/src/components/implementation/simple_vmm/nf_multicore/vmmio.c b/src/components/implementation/simple_vmm/nf_multicore/vmmio.c new file mode 100644 index 0000000000..1efb26ee1b --- /dev/null +++ b/src/components/implementation/simple_vmm/nf_multicore/vmmio.c @@ -0,0 +1,53 @@ +#include +#include +#include +#include + +void +ept_violation_handler(struct vmrt_vm_vcpu *vcpu) +{ + volatile struct vm_vcpu_shared_region *regs = vcpu->shared_region; + u64_t qualification = regs->qualification; + u64_t gpa; + struct acrn_mmio_request *mmio_req = vcpu->mmio_request; + + gpa = regs->gpa; + + /* Specify if read or write operation */ + if ((qualification & 0x2UL) != 0UL) { + /* Write operation */ + mmio_req->direction = ACRN_IOREQ_DIR_WRITE; + mmio_req->value = 0UL; + } else { + /* Read operation */ + mmio_req->direction = ACRN_IOREQ_DIR_READ; + } + + mmio_req->address = gpa; + + if (gpa >= IOAPIC_BASE_ADDR && gpa < IOAPIC_BASE_ADDR + PAGE_SIZE_4K) { + int ret = decode_instruction(vcpu); + + if (ret > 0) { + mmio_req->size = (uint64_t)ret; + } else { + VM_PANIC(vcpu); + } + + if (mmio_req->direction == ACRN_IOREQ_DIR_WRITE) { + if (emulate_instruction(vcpu) != 0) { + VM_PANIC(vcpu); + } + } + + vioapic_mmio_access_handler(vcpu); + + if (mmio_req->direction == ACRN_IOREQ_DIR_READ) { + /* Emulate instruction and update vcpu register set */ + (void)emulate_instruction(vcpu); + } + GOTO_NEXT_INST(regs); + } else { + VM_PANIC(vcpu); + } +} diff --git a/src/components/implementation/simple_vmm/nf_multicore/vmsr.c b/src/components/implementation/simple_vmm/nf_multicore/vmsr.c new file mode 100644 index 0000000000..1f45f13692 --- /dev/null +++ b/src/components/implementation/simple_vmm/nf_multicore/vmsr.c @@ -0,0 +1,249 @@ +#include +#include + +void +rdmsr_handler(struct vmrt_vm_vcpu *vcpu) +{ + volatile struct vm_vcpu_shared_region *regs = vcpu->shared_region; + + switch (regs->cx) { + case MSR_IA32_EFER: + { + u64_t guest_efer = regs->efer; + regs->ax = (u32_t)guest_efer; + regs->dx = (u32_t)(guest_efer >> 32); + goto done; + } + case MSR_IA32_MISC_ENABLE: + { + /* Note: read only MSR, and its value can be fixed for all cores */ + u64_t misc = 0x800001; + regs->ax = (u32_t)misc; + regs->dx = (u32_t)(misc >> 32); + goto done; + } + case MSR_IA32_BIOS_SIGN_ID: + { + /* Note: microcode is pre-set in the kernel */ + u64_t v = regs->microcode_version; + regs->ax = (u32_t)v; + regs->dx = (u32_t)(v >> 32); + goto done; + } + case MSR_IA32_TSC_ADJUST: + { + /* TODO: need to handle tsc adjustment in VM */ + u32_t ax, dx; + regs->ax = 0; + regs->dx = 0; + goto done; + } + + /* MTRRs can be ingored in Linux and Linux knows it is a virtual environment */ + case MSR_IA32_MTRR_CAP: + case MSR_IA32_MTRR_DEF_TYPE: + case MSR_IA32_MTRR_PHYSBASE_0: + case MSR_IA32_MTRR_PHYSMASK_0: + case MSR_IA32_MTRR_PHYSBASE_1: + case MSR_IA32_MTRR_PHYSMASK_1: + case MSR_IA32_MTRR_PHYSBASE_2: + case MSR_IA32_MTRR_PHYSMASK_2: + case MSR_IA32_MTRR_PHYSBASE_3: + case MSR_IA32_MTRR_PHYSMASK_3: + case MSR_IA32_MTRR_PHYSBASE_4: + case MSR_IA32_MTRR_PHYSMASK_4: + case MSR_IA32_MTRR_PHYSBASE_5: + case MSR_IA32_MTRR_PHYSMASK_5: + case MSR_IA32_MTRR_PHYSBASE_6: + case MSR_IA32_MTRR_PHYSMASK_6: + case MSR_IA32_MTRR_PHYSBASE_7: + case MSR_IA32_MTRR_PHYSMASK_7: + case MSR_IA32_MTRR_PHYSBASE_8: + case MSR_IA32_MTRR_PHYSMASK_8: + case MSR_IA32_MTRR_PHYSBASE_9: + case MSR_IA32_MTRR_PHYSMASK_9: + case MSR_IA32_MTRR_FIX64K_00000: + case MSR_IA32_MTRR_FIX16K_80000: + case MSR_IA32_MTRR_FIX16K_A0000: + case MSR_IA32_MTRR_FIX4K_C0000: + case MSR_IA32_MTRR_FIX4K_C8000: + case MSR_IA32_MTRR_FIX4K_D0000: + case MSR_IA32_MTRR_FIX4K_D8000: + case MSR_IA32_MTRR_FIX4K_E0000: + case MSR_IA32_MTRR_FIX4K_E8000: + case MSR_IA32_MTRR_FIX4K_F0000: + case MSR_IA32_MTRR_FIX4K_F8000: + case MSR_IA32_PAT: + { + regs->ax = 0; + regs->dx = 0; + goto done; + } + case MSR_PPERF: + { + /* FIXME: should inject #GP to guest, thus guest knows this MSR is not present */ + regs->ax = 0; + regs->dx = 0; + goto done; + } + case MSR_SMI_COUNT: + { + /* FIXME: should inject #GP to guest, thus guest knows this MSR is not present */ + regs->ax = 0; + regs->dx = 0; + goto done; + } + case MSR_IA32_APIC_BASE: + { + /* TODO: for non-BSP, the BSP flag should be cleared */ + /* 0x900 : enable xapic and this is BSP */ + regs->ax = 0XFEE00000 | 0x900; + regs->dx = 0; + goto done; + } + case MSR_IA32_FEATURE_CONTROL: + { + /* Lock the feature control in VM */ + regs->ax = 1; + regs->dx = 0; + goto done; + } + case MSR_MISC_FEATURE_ENABLES: + { + /* This MSR can be reserved to 0 */ + regs->ax = 0; + regs->dx = 0; + goto done; + } + case MSR_PLATFORM_INFO: + { + /* Contains power management stuff and can be ignored */ + regs->ax = 0; + regs->dx = 0; + goto done; + } + case MSR_IA32_SPEC_CTRL: + { + /* This MSR has a value of 0 after reset, thus just keep it ad default, don't modify */ + regs->ax = 0; + regs->dx = 0; + goto done; + } + default: + VM_PANIC(vcpu); + } +done: + GOTO_NEXT_INST(regs); + return; +} + +void +wrmsr_handler(struct vmrt_vm_vcpu *vcpu) +{ + volatile struct vm_vcpu_shared_region *regs = vcpu->shared_region; + + switch (regs->cx) { + case MSR_IA32_EFER: + { + u64_t guest_efer; + guest_efer = regs->ax & 0XFFFFFFFF; + guest_efer |= ((regs->dx & 0XFFFFFFFF) << 32); + regs->efer = guest_efer; + + goto done; + } + case MSR_IA32_BIOS_SIGN_ID: + { + /* Microcode has been retrived in the kernel, thus don't need to process here */ + goto done; + } + case MSR_IA32_XSS: + { + u64_t guest_xss; + guest_xss = regs->ax & 0XFFFFFFFF; + guest_xss |= ((regs->dx & 0XFFFFFFFF) << 32); + if ((guest_xss & ~(MSR_IA32_XSS_PT | MSR_IA32_XSS_HDC)) != 0UL) { + /* Assuming other features are not supported */ + VM_PANIC(vcpu); + } else { + /* TODO: only enable the xss pt and hdx, but currently just ignore them */ + } + goto done; + } + case MSR_IA32_MTRR_CAP: + case MSR_IA32_MTRR_DEF_TYPE: + case MSR_IA32_MTRR_PHYSBASE_0: + case MSR_IA32_MTRR_PHYSMASK_0: + case MSR_IA32_MTRR_PHYSBASE_1: + case MSR_IA32_MTRR_PHYSMASK_1: + case MSR_IA32_MTRR_PHYSBASE_2: + case MSR_IA32_MTRR_PHYSMASK_2: + case MSR_IA32_MTRR_PHYSBASE_3: + case MSR_IA32_MTRR_PHYSMASK_3: + case MSR_IA32_MTRR_PHYSBASE_4: + case MSR_IA32_MTRR_PHYSMASK_4: + case MSR_IA32_MTRR_PHYSBASE_5: + case MSR_IA32_MTRR_PHYSMASK_5: + case MSR_IA32_MTRR_PHYSBASE_6: + case MSR_IA32_MTRR_PHYSMASK_6: + case MSR_IA32_MTRR_PHYSBASE_7: + case MSR_IA32_MTRR_PHYSMASK_7: + case MSR_IA32_MTRR_PHYSBASE_8: + case MSR_IA32_MTRR_PHYSMASK_8: + case MSR_IA32_MTRR_PHYSBASE_9: + case MSR_IA32_MTRR_PHYSMASK_9: + case MSR_IA32_MTRR_FIX64K_00000: + case MSR_IA32_MTRR_FIX16K_80000: + case MSR_IA32_MTRR_FIX16K_A0000: + case MSR_IA32_MTRR_FIX4K_C0000: + case MSR_IA32_MTRR_FIX4K_C8000: + case MSR_IA32_MTRR_FIX4K_D0000: + case MSR_IA32_MTRR_FIX4K_D8000: + case MSR_IA32_MTRR_FIX4K_E0000: + case MSR_IA32_MTRR_FIX4K_E8000: + case MSR_IA32_MTRR_FIX4K_F0000: + case MSR_IA32_MTRR_FIX4K_F8000: + case MSR_IA32_PAT: + { + /* MTRRs can be ingored in Linux and Linux knows it is a virtual environment */ + goto done; + } + case MSR_IA32_TSC_DEADLINE: { + u64_t tsc_future, curr_tsc; + rdtscll(curr_tsc); + tsc_future = regs->ax & 0xffffffff; + tsc_future |= ((regs->dx & 0xffffffff) << 32); + vcpu->next_timer = tsc_future; + + goto done; + } + case MSR_MISC_FEATURE_ENABLES: + { + /* Write to this MSR will be all 0 since we ignored this, doesn't matter */ + goto done; + } + case MSR_IA32_SYSENTER_CS: + case MSR_IA32_SYSENTER_ESP: + case MSR_IA32_SYSENTER_EIP: + { + /* 64-bit system doesn't require these MSRs, its fine to ignore them */ + goto done; + } + case MSR_IA32_SPEC_CTRL: + { + /* This MSR has a value of 0 after reset, thus just keep it ad default, don't modify */ + goto done; + } + case MSR_IA32_APIC_BASE: + { + VM_PANIC(vcpu); + goto done; + } + default: + VM_PANIC(vcpu);; + } + +done: + GOTO_NEXT_INST(regs); + return; +} diff --git a/src/components/implementation/simple_vmm/nf_multicore/vpic.h b/src/components/implementation/simple_vmm/nf_multicore/vpic.h new file mode 100644 index 0000000000..b9cab609cb --- /dev/null +++ b/src/components/implementation/simple_vmm/nf_multicore/vpic.h @@ -0,0 +1,191 @@ +/*- + * Copyright (c) 2014 Tycho Nightingale + * Copyright (c) 2017-2022 Intel Corporation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef VPIC_H +#define VPIC_H + +#include +/** + * @file vpic.h + * + * @brief public APIs for virtual PIC + */ + + +#define ICU_IMR_OFFSET 1U + +/* Initialization control word 1. Written to even address. */ +#define ICW1_IC4 0x01U /* ICW4 present */ +#define ICW1_SNGL 0x02U /* 1 = single, 0 = cascaded */ +#define ICW1_ADI 0x04U /* 1 = 4, 0 = 8 byte vectors */ +#define ICW1_LTIM 0x08U /* 1 = level trigger, 0 = edge */ +#define ICW1_RESET 0x10U /* must be 1 */ +/* 0x20 - 0x80 - in 8080/8085 mode only */ + +/* Initialization control word 2. Written to the odd address. */ +/* No definitions, it is the base vector of the IDT for 8086 mode */ + +/* Initialization control word 3. Written to the odd address. */ +/* For a primary PIC, bitfield indicating a secondary PIC on given input */ +/* For a secondary PIC, lower 3 bits are the PIC's ID binary id on primary PIC */ + +/* Initialization control word 4. Written to the odd address. */ +#define ICW4_8086 0x01U /* 1 = 8086, 0 = 8080 */ +#define ICW4_AEOI 0x02U /* 1 = Auto EOI */ +#define ICW4_MS 0x04U /* 1 = buffered primary PIC, 0 = secondary PIC*/ +#define ICW4_BUF 0x08U /* 1 = enable buffer mode */ +#define ICW4_SFNM 0x10U /* 1 = special fully nested mode */ + +/* Operation control words. Written after initialization. */ + +/* Operation control word type 1 */ +/* + * No definitions. Written to the odd address. Bitmask for interrupts. + * 1 = disabled. + */ + +/* Operation control word type 2. Bit 3 (0x08) must be zero. Even address. */ +#define OCW2_L0 0x01U /* Level */ +#define OCW2_L1 0x02U +#define OCW2_L2 0x04U +/* 0x08 must be 0 to select OCW2 vs OCW3 */ +/* 0x10 must be 0 to select OCW2 vs ICW1 */ +#define OCW2_EOI 0x20U /* 1 = EOI */ +#define OCW2_SL 0x40U /* EOI mode */ +#define OCW2_R 0x80U /* EOI mode */ + +/* Operation control word type 3. Bit 3 (0x08) must be set. Even address. */ +#define OCW3_RIS 0x01U /* 1 = read IS, 0 = read IR */ +#define OCW3_RR 0x02U /* register read */ +#define OCW3_P 0x04U /* poll mode command */ +/* 0x08 must be 1 to select OCW3 vs OCW2 */ +#define OCW3_SEL 0x08U /* must be 1 */ +/* 0x10 must be 0 to select OCW3 vs ICW1 */ +#define OCW3_SMM 0x20U /* special mode mask */ +#define OCW3_ESMM 0x40U /* enable SMM */ + +#define IO_ELCR1 0x4d0U +#define IO_ELCR2 0x4d1U + +#define NR_VPIC_PINS_PER_CHIP 8U +#define NR_VPIC_PINS_TOTAL 16U + +enum vpic_wire_mode { + VPIC_WIRE_INTR = 0, + VPIC_WIRE_LAPIC, + VPIC_WIRE_IOAPIC, + VPIC_WIRE_NULL +}; + +enum vpic_trigger { + EDGE_TRIGGER, + LEVEL_TRIGGER +}; + +struct i8259_reg_state { + bool ready; + uint8_t icw_num; + uint8_t rd_cmd_reg; + + bool aeoi; + bool poll; + bool rotate; + bool sfn; /* special fully-nested mode */ + + uint32_t irq_base; + uint8_t request; /* Interrupt Request Register (IIR) */ + uint8_t service; /* Interrupt Service (ISR) */ + uint8_t mask; /* Interrupt Mask Register (IMR) */ + uint8_t smm; /* special mask mode */ + + uint8_t pin_state[8]; /* pin state for level */ + uint32_t lowprio; /* lowest priority irq */ + + bool intr_raised; + uint8_t elc; +}; + +struct acrn_vpic { + // spinlock_t lock; + struct i8259_reg_state i8259[2]; +}; + +struct acrn_vm; +void vpic_init(struct acrn_vm *vm); + +/** + * @brief virtual PIC + * + * @addtogroup acrn_vpic ACRN vPIC + * @{ + */ + +/** + * @brief Set vPIC IRQ line status. + * + * @param[in] vpic Pointer to target VM's vpic table + * @param[in] vgsi GSI for the virtual interrupt + * @param[in] operation action options:GSI_SET_HIGH/GSI_SET_LOW/ + * GSI_RAISING_PULSE/GSI_FALLING_PULSE + * + * @return None + */ +void vpic_set_irqline(struct acrn_vpic *vpic, uint32_t vgsi, uint32_t operation); + +/** + * @brief Get pending virtual interrupts for vPIC. + * + * @param[in] vpic Pointer to target VM's vpic table + * @param[inout] vecptr Pointer to vector buffer and will be filled + * with eligible vector if any. + * + * @return None + */ +void vpic_pending_intr(struct acrn_vpic *vpic, uint32_t *vecptr); + +/** + * @brief Accept virtual interrupt for vPIC. + * + * @param[in] vpic Pointer to target VM's vpic table + * @param[in] vector Target virtual interrupt vector + * + * @return None + * + * @pre vm != NULL + */ +void vpic_intr_accepted(struct acrn_vpic *vpic, uint32_t vector); +void vpic_get_irqline_trigger_mode(const struct acrn_vpic *vpic, uint32_t vgsi, enum vpic_trigger *trigger); +uint32_t vpic_pincount(void); +struct acrn_vpic *vm_pic(const struct acrn_vm *vm); + +/** + * @} + */ +/* End of acrn_vpic */ + +#endif /* VPIC_H */ diff --git a/src/components/implementation/simple_vmm/noop_nf/Makefile b/src/components/implementation/simple_vmm/noop_nf/Makefile new file mode 100644 index 0000000000..96d9511070 --- /dev/null +++ b/src/components/implementation/simple_vmm/noop_nf/Makefile @@ -0,0 +1,29 @@ +# Required variables used to drive the compilation process. It is OK +# for many of these to be empty. +# +# The set of interfaces that this component exports for use by other +# components. This is a list of the interface names. +INTERFACE_EXPORTS = netio +# The interfaces this component is dependent on for compilation (this +# is a list of directory names in interface/) +INTERFACE_DEPENDENCIES = contigmem netshmem nic sched nic +# The library dependencies this component is reliant on for +# compilation/linking (this is a list of directory names in lib/) +LIBRARY_DEPENDENCIES = ubench component kernel initargs vmrt shm_bm sync time ck +# Note: Both the interface and library dependencies should be +# *minimal*. That is to say that removing a dependency should cause +# the build to fail. The build system does not validate this +# minimality; that's on you! + +CFILES+=devices/serial/serial.c +CFILES+=devices/vpci/vpci.c +CFILES+=devices/vpci/vpci_io.c +CFILES+=devices/vpci/virtio_net_vpci.c +CFILES+=devices/vpci/virtio_net_io.c +CFILES+=devices/vpic/vpic.c +CFILES+=devices/vrtc/vrtc.c +CFILES+=devices/vps2/vps2.c + +C_OBJS+=$(CFILES:%.c=%.o) +COMP_FLAGS= -mavx -mavx2 -mfma -I$(LIBDIR)/dpdk/dpdk/build/install/include +include Makefile.subsubdir diff --git a/src/components/implementation/simple_vmm/noop_nf/acrn_common.h b/src/components/implementation/simple_vmm/noop_nf/acrn_common.h new file mode 100644 index 0000000000..b97561f61b --- /dev/null +++ b/src/components/implementation/simple_vmm/noop_nf/acrn_common.h @@ -0,0 +1,797 @@ +/* + * common definition + * + * Copyright (C) 2017-2022 Intel Corporation. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +/** + * @file acrn_common.h + * + * @brief acrn common data structure for hypercall or ioctl + */ + +#ifndef ACRN_COMMON_H +#define ACRN_COMMON_H + +#include + +/* + * Common structures for ACRN/HSM/DM + */ + +/* + * IO request + */ + +#define ACRN_IO_REQUEST_MAX 16U +#define ACRN_ASYNCIO_MAX 64U + +#define ACRN_IOREQ_STATE_PENDING 0U +#define ACRN_IOREQ_STATE_COMPLETE 1U +#define ACRN_IOREQ_STATE_PROCESSING 2U +#define ACRN_IOREQ_STATE_FREE 3U + +#define ACRN_IOREQ_TYPE_PORTIO 0U +#define ACRN_IOREQ_TYPE_MMIO 1U +#define ACRN_IOREQ_TYPE_PCICFG 2U +#define ACRN_IOREQ_TYPE_WP 3U + +#define ACRN_IOREQ_DIR_READ 0U +#define ACRN_IOREQ_DIR_WRITE 1U + + + +/* IOAPIC device model info */ +#define VIOAPIC_RTE_NUM 48U /* vioapic pins */ + +#if VIOAPIC_RTE_NUM < 24U +#error "VIOAPIC_RTE_NUM must be larger than 23" +#endif + +/* Generic VM flags from guest OS */ +#define GUEST_FLAG_SECURE_WORLD_ENABLED (1UL << 0U) /* Whether secure world is enabled */ +#define GUEST_FLAG_LAPIC_PASSTHROUGH (1UL << 1U) /* Whether LAPIC is passed through */ +#define GUEST_FLAG_IO_COMPLETION_POLLING (1UL << 2U) /* Whether need hypervisor poll IO completion */ +#define GUEST_FLAG_HIDE_MTRR (1UL << 3U) /* Whether hide MTRR from VM */ +#define GUEST_FLAG_RT (1UL << 4U) /* Whether the vm is RT-VM */ +#define GUEST_FLAG_NVMX_ENABLED (1UL << 5U) /* Whether this VM supports nested virtualization */ +#define GUEST_FLAG_SECURITY_VM (1UL << 6U) /* Whether this VM needs to do security-vm related fixup (TPM2 and SMBIOS pt) */ +#define GUEST_FLAG_VCAT_ENABLED (1UL << 7U) /* Whether this VM supports vCAT */ +#define GUEST_FLAG_STATIC_VM (1UL << 8U) /* Whether this VM uses static VM configuration */ +#define GUEST_FLAG_TEE (1UL << 9U) /* Whether the VM is TEE VM */ +#define GUEST_FLAG_REE (1UL << 10U) /* Whether the VM is REE VM */ +#define GUEST_FLAG_PMU_PASSTHROUGH (1UL << 11U) /* Whether PMU is passed through */ + + +/* TODO: We may need to get this addr from guest ACPI instead of hardcode here */ +#define VIRTUAL_SLEEP_CTL_ADDR 0x400U /* Pre-launched VM uses ACPI reduced HW mode and sleep control register */ +#define VIRTUAL_PM1A_CNT_ADDR 0x404U +#define VIRTUAL_PM1A_SCI_EN 0x0001 +#define VIRTUAL_PM1A_SLP_TYP 0x1c00U +#define VIRTUAL_PM1A_SLP_EN 0x2000U +#define VIRTUAL_PM1A_ALWAYS_ZERO 0xc003 + +#define MAX_VM_NAME_LEN (16U) + +/** + * @brief Hypercall + * + * @addtogroup acrn_hypercall ACRN Hypercall + * @{ + */ + +/** + * @brief Representation of a MMIO request + */ +struct acrn_mmio_request { + /** + * @brief Direction of the access + * + * Either \p ACRN_IOREQ_DIR_READ or \p ACRN_IOREQ_DIR_WRITE. + */ + uint32_t direction; + + /** + * @brief reserved + */ + uint32_t reserved; + + /** + * @brief Address of the I/O access + */ + uint64_t address; + + /** + * @brief Width of the I/O access in byte + */ + uint64_t size; + + /** + * @brief The value read for I/O reads or to be written for I/O writes + */ + uint64_t value; +}; + +/** + * @brief Representation of a port I/O request + */ +struct acrn_pio_request { + /** + * @brief Direction of the access + * + * Either \p ACRN_IOREQ_DIR_READ or \p ACRN_IOREQ_DIR_WRITE. + */ + uint32_t direction; + + /** + * @brief reserved + */ + uint32_t reserved; + + /** + * @brief Port address of the I/O access + */ + uint64_t address; + + /** + * @brief Width of the I/O access in byte + */ + uint64_t size; + + /** + * @brief The value read for I/O reads or to be written for I/O writes + */ + uint32_t value; +}; + +/** + * @brief Representation of a PCI configuration space access + */ +struct acrn_pci_request { + /** + * @brief Direction of the access + * + * Either \p ACRN_IOREQ_DIR_READ or \p ACRN_IOREQ_DIR_WRITE. + */ + uint32_t direction; + + /** + * @brief Reserved + */ + uint32_t reserved[3];/* need keep same header fields with pio_request */ + + /** + * @brief Width of the I/O access in byte + */ + int64_t size; + + /** + * @brief The value read for I/O reads or to be written for I/O writes + */ + int32_t value; + + /** + * @brief The \p bus part of the BDF of the device + */ + int32_t bus; + + /** + * @brief The \p device part of the BDF of the device + */ + int32_t dev; + + /** + * @brief The \p function part of the BDF of the device + */ + int32_t func; + + /** + * @brief The register to be accessed in the configuration space + */ + int32_t reg; +}; + +/** + * @brief 256-byte I/O requests + * + * The state transitions of a I/O request are: + * + * FREE -> PENDING -> PROCESSING -> COMPLETE -> FREE -> ... + * + * When a request is in COMPLETE or FREE state, the request is owned by the + * hypervisor. Service VM (HSM or DM) shall not read or write the internals of the + * request except the state. + * + * When a request is in PENDING or PROCESSING state, the request is owned by + * Service VM. The hypervisor shall not read or write the request other than the state. + * + * Based on the rules above, a typical I/O request lifecycle should looks like + * the following. + * + * @verbatim embed:rst:leading-asterisk + * + * +-----------------------+-------------------------+----------------------+ + * | Service VM vCPU 0 | Service VM vCPU x | User VM vCPU y | + * +=======================+=========================+======================+ + * | | | Hypervisor: | + * | | | | + * | | | - Fill in type, | + * | | | addr, etc. | + * | | | - Pause User VM vCPU | + * | | | - Set state to | + * | | | PENDING (a) | + * | | | - Fire upcall to | + * | | | Service VM vCPU 0 | + * | | | | + * +-----------------------+-------------------------+----------------------+ + * | HSM: | | | + * | | | | + * | - Scan for pending | | | + * | requests | | | + * | - Set state to | | | + * | PROCESSING (b) | | | + * | - Assign requests to | | | + * | clients (c) | | | + * | | | | + * +-----------------------+-------------------------+----------------------+ + * | | Client: | | + * | | | | + * | | - Scan for assigned | | + * | | requests | | + * | | - Handle the | | + * | | requests (d) | | + * | | - Set state to COMPLETE | | + * | | - Notify the hypervisor | | + * | | | | + * +-----------------------+-------------------------+----------------------+ + * | | Hypervisor: | | + * | | | | + * | | - resume User VM vCPU y | | + * | | (e) | | + * | | | | + * +-----------------------+-------------------------+----------------------+ + * | | | Hypervisor: | + * | | | | + * | | | - Post-work (f) | + * | | | - set state to FREE | + * | | | | + * +-----------------------+-------------------------+----------------------+ + * + * @endverbatim + * + * Note that the following shall hold. + * + * 1. (a) happens before (b) + * 2. (c) happens before (d) + * 3. (e) happens before (f) + * 4. One vCPU cannot trigger another I/O request before the previous one has + * completed (i.e. the state switched to FREE) + * + * Accesses to the state of a acrn_io_request shall be atomic and proper barriers + * are needed to ensure that: + * + * 1. Setting state to PENDING is the last operation when issuing a request in + * the hypervisor, as the hypervisor shall not access the request any more. + * + * 2. Due to similar reasons, setting state to COMPLETE is the last operation + * of request handling in HSM or clients in Service VM. + */ +struct acrn_io_request { + /** + * @brief Type of this request. + * + * Byte offset: 0. + */ + uint32_t type; + + /** + * @brief Hypervisor will poll completion if set. + * + * Byte offset: 4. + */ + uint32_t completion_polling; + + /** + * @brief Reserved. + * + * Byte offset: 8. + */ + uint32_t reserved0[14]; + + /** + * @brief Details about this request. + * + * Byte offset: 64. + */ + union { + struct acrn_pio_request pio_request; + struct acrn_pci_request pci_request; + struct acrn_mmio_request mmio_request; + uint64_t data[8]; + } reqs; + + /** + * @brief Reserved. + * + * Byte offset: 128. + */ + uint32_t reserved1; + + /** + * @brief If this request has been handled by HSM driver. + * + * Byte offset: 132. + */ + int32_t kernel_handled; + + /** + * @brief The status of this request. + * + * Taking ACRN_IOREQ_STATE_xxx as values. + * + * Byte offset: 136. + */ + uint32_t processed; +}__attribute__((aligned(256))); + +struct acrn_io_request_buffer { + union { + struct acrn_io_request req_slot[ACRN_IO_REQUEST_MAX]; + int8_t reserved[4096]; + }; +}; + +struct acrn_asyncio_info { + uint32_t type; + uint64_t addr; + uint64_t fd; +}; + +/** + * @brief Info to create a VM, the parameter for HC_CREATE_VM hypercall + */ +struct acrn_vm_creation { + /** created vmid return to HSM. Keep it first field */ + uint16_t vmid; + + /** Reserved */ + uint16_t reserved0; + + /** VCPU numbers this VM want to create */ + uint16_t vcpu_num; + + /** Reserved */ + uint16_t reserved1; + + /** the name of this VM */ + uint8_t name[MAX_VM_NAME_LEN]; + + /* VM flag bits from Guest OS, now used + * GUEST_FLAG_SECURE_WORLD_ENABLED (1UL<<0) + */ + uint64_t vm_flag; + + uint64_t ioreq_buf; + + /** + * The least significant set bit is the PCPU # the VCPU 0 maps to; + * second set least significant bit is the PCPU # the VCPU 1 maps to; + * and so on... + */ + uint64_t cpu_affinity; +}; + +/* General-purpose register layout aligned with the general-purpose register idx + * when vmexit, such as vmexit due to CR access, refer to SMD Vol.3C 27-6. + */ +struct acrn_gp_regs { + uint64_t rax; + uint64_t rcx; + uint64_t rdx; + uint64_t rbx; + uint64_t rsp; + uint64_t rbp; + uint64_t rsi; + uint64_t rdi; + uint64_t r8; + uint64_t r9; + uint64_t r10; + uint64_t r11; + uint64_t r12; + uint64_t r13; + uint64_t r14; + uint64_t r15; +}; + +/* struct to define how the descriptor stored in memory. + * Refer SDM Vol3 3.5.1 "Segment Descriptor Tables" + * Figure 3-11 + */ +struct acrn_descriptor_ptr { + uint16_t limit; + uint64_t base; + uint16_t reserved[3]; /* align struct size to 64bit */ +} __packed; + +/** + * @brief registers info for vcpu. + */ +struct acrn_regs { + struct acrn_gp_regs gprs; + struct acrn_descriptor_ptr gdt; + struct acrn_descriptor_ptr idt; + + uint64_t rip; + uint64_t cs_base; + uint64_t cr0; + uint64_t cr4; + uint64_t cr3; + uint64_t ia32_efer; + uint64_t rflags; + uint64_t reserved_64[4]; + + uint32_t cs_ar; + uint32_t cs_limit; + uint32_t reserved_32[3]; + + /* don't change the order of following sel */ + uint16_t cs_sel; + uint16_t ss_sel; + uint16_t ds_sel; + uint16_t es_sel; + uint16_t fs_sel; + uint16_t gs_sel; + uint16_t ldt_sel; + uint16_t tr_sel; +}; + +/** + * @brief Info to set vcpu state + * + * the parameter for HC_SET_VCPU_STATE + */ +struct acrn_vcpu_regs { + /** the virtual CPU ID for the VCPU to set state */ + uint16_t vcpu_id; + + /** reserved space to make cpu_state aligned to 8 bytes */ + uint16_t reserved[3]; + + /** the structure to hold vcpu state */ + struct acrn_regs vcpu_regs; +}; + +/** Operation types for setting IRQ line */ +#define GSI_SET_HIGH 0U +#define GSI_SET_LOW 1U +#define GSI_RAISING_PULSE 2U +#define GSI_FALLING_PULSE 3U + +/** + * @brief Info to Set/Clear/Pulse a virtual IRQ line for a VM + * + * the parameter for HC_SET_IRQLINE hypercall + */ +struct acrn_irqline_ops { + uint32_t gsi; + uint32_t op; +}; + + +/** + * @brief Info to inject a MSI interrupt to VM + * + * the parameter for HC_INJECT_MSI hypercall + */ +struct acrn_msi_entry { + /** MSI addr[19:12] with dest VCPU ID */ + uint64_t msi_addr; + + /** MSI data[7:0] with vector */ + uint64_t msi_data; +}; + +/** + * @brief Info The power state data of a VCPU. + * + */ + +#define SPACE_SYSTEM_MEMORY 0U +#define SPACE_SYSTEM_IO 1U +#define SPACE_PCI_CONFIG 2U +#define SPACE_Embedded_Control 3U +#define SPACE_SMBUS 4U +#define SPACE_PLATFORM_COMM 10U +#define SPACE_FFixedHW 0x7FU + +struct acrn_acpi_generic_address { + uint8_t space_id; + uint8_t bit_width; + uint8_t bit_offset; + uint8_t access_size; + uint64_t address; +} __attribute__ ((__packed__)); + +struct acrn_cstate_data { + struct acrn_acpi_generic_address cx_reg; + uint8_t type; + uint32_t latency; + uint64_t power; +}; + +struct acrn_pstate_data { + uint64_t core_frequency; /* megahertz */ + uint64_t power; /* milliWatts */ + uint64_t transition_latency; /* microseconds */ + uint64_t bus_master_latency; /* microseconds */ + uint64_t control; /* control value */ + uint64_t status; /* success indicator */ +}; + +enum acrn_cpufreq_policy_type { + CPUFREQ_POLICY_PERFORMANCE, + CPUFREQ_POLICY_NOMINAL, +}; + +struct acrn_cpufreq_limits { + /* Performance levels for HWP */ + uint8_t guaranteed_hwp_lvl; + uint8_t highest_hwp_lvl; + uint8_t lowest_hwp_lvl; + /* Index for the p-state table _PSS */ + uint8_t nominal_pstate; + uint8_t performance_pstate; +}; + +struct acpi_sx_pkg { + uint8_t val_pm1a; + uint8_t val_pm1b; + uint16_t reserved; +} __attribute__((aligned(8))); + +struct pm_s_state_data { + struct acrn_acpi_generic_address pm1a_evt; + struct acrn_acpi_generic_address pm1b_evt; + struct acrn_acpi_generic_address pm1a_cnt; + struct acrn_acpi_generic_address pm1b_cnt; + struct acpi_sx_pkg s3_pkg; + struct acpi_sx_pkg s5_pkg; + uint32_t *wake_vector_32; + uint64_t *wake_vector_64; +} __attribute__((aligned(8))); + +/** + * @brief Info PM command from DM/HSM. + * + * The command would specify request type(e.g. get px count or data) for + * specific VM and specific VCPU with specific state number. + * For Px, PMCMD_STATE_NUM means Px number from 0 to (MAX_PSTATE - 1), + * For Cx, PMCMD_STATE_NUM means Cx entry index from 1 to MAX_CX_ENTRY. + */ +#define PMCMD_VMID_MASK 0xff000000U +#define PMCMD_VCPUID_MASK 0x00ff0000U +#define PMCMD_STATE_NUM_MASK 0x0000ff00U +#define PMCMD_TYPE_MASK 0x000000ffU + +#define PMCMD_VMID_SHIFT 24U +#define PMCMD_VCPUID_SHIFT 16U +#define PMCMD_STATE_NUM_SHIFT 8U + +enum acrn_pm_cmd_type { + ACRN_PMCMD_GET_PX_CNT, + ACRN_PMCMD_GET_PX_DATA, + ACRN_PMCMD_GET_CX_CNT, + ACRN_PMCMD_GET_CX_DATA, +}; + +/** + * @brief Info to get a VM interrupt count data + * + * the parameter for HC_VM_INTR_MONITOR hypercall + */ +#define MAX_PTDEV_NUM 24U +struct acrn_intr_monitor { + /** sub command for intr monitor */ + uint32_t cmd; + /** the count of this buffer to save */ + uint32_t buf_cnt; + + /** the buffer which save each interrupt count */ + uint64_t buffer[MAX_PTDEV_NUM * 2]; +} __attribute__((aligned(8))); + +/** cmd for intr monitor **/ +#define INTR_CMD_GET_DATA 0U +#define INTR_CMD_DELAY_INT 1U + +/* + * PRE_LAUNCHED_VM is launched by ACRN hypervisor, with LAPIC_PT; + * Service VM is launched by ACRN hypervisor, without LAPIC_PT; + * POST_LAUNCHED_VM is launched by ACRN devicemodel, with/without LAPIC_PT depends on usecases. + * + * Assumption: vm_configs array is completely initialized w.r.t. load_order member of + * acrn_vm_config for all the VMs. + */ +enum acrn_vm_load_order { + PRE_LAUNCHED_VM = 0, + SERVICE_VM, + POST_LAUNCHED_VM, /* Launched by Devicemodel in Service VM */ + MAX_LOAD_ORDER +}; + +struct acrn_vm_config_header { + enum acrn_vm_load_order load_order; + char name[MAX_VM_NAME_LEN]; + uint8_t reserved[2]; + uint8_t severity; + uint64_t cpu_affinity; + uint64_t guest_flags; + /* + * The following are hv-specific members and are thus opaque. + * vm_config_entry_size determines the real size of this structure. + */ +} __attribute__((aligned(8))); + +/** + * @brief Info to configure virtual root port + * + * Configuration passed to hv when adding a virtual root port which + * is used as PTM root + */ +struct vrp_config +{ + uint16_t phy_bdf; + uint8_t max_payload; /* dev cap's max payload */ + uint8_t primary_bus; + uint8_t secondary_bus; + uint8_t subordinate_bus; + uint8_t ptm_capable; + uint32_t ptm_cap_offset; +}; + +/* Type of PCI device assignment */ +#define ACRN_PTDEV_QUIRK_ASSIGN (1U << 0) + +#define ACRN_PCI_NUM_BARS 6U +/** + * @brief Info to assign or deassign PCI for a VM + * + */ +struct acrn_pcidev { + /** the type of the the pass-through PCI device */ + uint32_t type; + + /** virtual BDF# of the pass-through PCI device */ + uint16_t virt_bdf; + + /** physical BDF# of the pass-through PCI device */ + uint16_t phys_bdf; + + /** the PCI Interrupt Line, initialized by ACRN-DM, which is RO and + * ideally not used for pass-through MSI/MSI-x devices. + */ + uint8_t intr_line; + + /** the PCI Interrupt Pin, initialized by ACRN-DM, which is RO and + * ideally not used for pass-through MSI/MSI-x devices. + */ + uint8_t intr_pin; + + /** the base address of the PCI BAR, initialized by ACRN-DM. */ + uint32_t bar[ACRN_PCI_NUM_BARS]; +}; + +#define MMIODEV_RES_NUM 3 + +/** + * @brief Info to assign or deassign a MMIO device for a VM + */ +struct acrn_mmiodev { + char name[8]; + struct acrn_mmiores { + /** the gpa of the MMIO region for the MMIO device */ + uint64_t user_vm_pa; + /** the hpa of the MMIO region for the MMIO device: for post-launched VM + * it's pa in service vm; for pre-launched VM it's pa in HV. + */ + uint64_t host_pa; + /** the size of the MMIO region for the MMIO resource */ + uint64_t size; + /** the memory type of the MMIO region for the MMIO resource */ + uint64_t mem_type; + } res[MMIODEV_RES_NUM]; +}; + +/** + * @brief Info to create or destroy a virtual PCI or legacy device for a VM + * + * the parameter for HC_CREATE_VDEV or HC_DESTROY_VDEV hypercall + */ +struct acrn_vdev { + /* + * the identifier of the device, the low 32 bits represent the vendor + * id and device id of PCI device and the high 32 bits represent the + * device number of the legacy device + */ + union { + uint64_t value; + struct { + uint16_t vendor; + uint16_t device; + uint32_t legacy_id; + } fields; + } id; + + /* + * the slot of the device, if the device is a PCI device, the slot + * represents BDF, otherwise it represents legacy device slot number + */ + uint64_t slot; + + /** the IO resource address of the device, initialized by ACRN-DM. */ + uint32_t io_addr[ACRN_PCI_NUM_BARS]; + + /** the IO resource size of the device, initialized by ACRN-DM. */ + uint32_t io_size[ACRN_PCI_NUM_BARS]; + + /** the options for the virtual device, initialized by ACRN-DM. */ + uint8_t args[128]; +}; + +#define ACRN_ASYNCIO_PIO (0x01U) +#define ACRN_ASYNCIO_MMIO (0x02U) + +#define SBUF_MAGIC 0x5aa57aa71aa13aa3UL +#define SBUF_MAX_SIZE (1UL << 22U) +#define SBUF_HEAD_SIZE 64U + +/* sbuf flags */ +#define OVERRUN_CNT_EN (1U << 0U) /* whether overrun counting is enabled */ +#define OVERWRITE_EN (1U << 1U) /* whether overwrite is enabled */ + +/** + * (sbuf) head + buf (store (ele_num - 1) elements at most) + * buffer empty: tail == head + * buffer full: (tail + ele_size) % size == head + * + * Base of memory for elements + * | + * | + * ---------------------------------------------------------------------- + * | struct shared_buf | raw data (ele_size)| ... | raw data (ele_size) | + * ---------------------------------------------------------------------- + * | + * | + * struct shared_buf *buf + */ + +enum { + ACRN_TRACE = 0U, + ACRN_HVLOG, + ACRN_SEP, + ACRN_SOCWATCH, + /* The sbuf with above ids are created each pcpu */ + ACRN_SBUF_PER_PCPU_ID_MAX, + ACRN_ASYNCIO = 64, +}; + +/* Make sure sizeof(struct shared_buf) == SBUF_HEAD_SIZE */ +struct shared_buf { + uint64_t magic; + uint32_t ele_num; /* number of elements */ + uint32_t ele_size; /* sizeof of elements */ + uint32_t head; /* offset from base, to read */ + uint32_t tail; /* offset from base, to write */ + uint32_t flags; + uint32_t reserved; + uint32_t overrun_cnt; /* count of overrun */ + uint32_t size; /* ele_num * ele_size */ + uint32_t padding[6]; +}; + +/** + * @} + */ +#endif /* ACRN_COMMON_H */ diff --git a/src/components/implementation/simple_vmm/noop_nf/acrn_types.h b/src/components/implementation/simple_vmm/noop_nf/acrn_types.h new file mode 100644 index 0000000000..0d6b92fcd9 --- /dev/null +++ b/src/components/implementation/simple_vmm/noop_nf/acrn_types.h @@ -0,0 +1,51 @@ +/* + * Copyright (C) 2018-2022 Intel Corporation. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef ACRN_TYPES_H +#define ACRN_TYPES_H + +#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0])) +#define __aligned(x) __attribute__((aligned(x))) +#define __packed __attribute__((packed)) +#define __unused __attribute__((unused)) + +#include + +/** Roundup (x/y) to ( x/y + (x%y) ? 1 : 0) **/ +#define INT_DIV_ROUNDUP(x, y) ((((x)+(y))-1)/(y)) + +/* Define standard data types. These definitions allow software components + * to perform in the same manner on different target platforms. + */ +typedef signed char int8_t; +typedef unsigned char uint8_t; +typedef signed short int16_t; +typedef unsigned short uint16_t; +typedef signed int int32_t; +typedef unsigned int uint32_t; +typedef unsigned long uint64_t; +typedef signed long int64_t; +typedef __builtin_va_list va_list; + +#ifndef NULL +#define NULL ((void *) 0) +#endif + +#ifndef true +#define true ((_Bool) 1) +#define false ((_Bool) 0) +#endif + +#ifndef UINT64_MAX +#define UINT64_MAX (0xffffffffffffffffUL) +#endif + +#ifndef UINT32_MAX +#define UINT32_MAX (0xffffffffU) +#endif + + +#endif /* INCLUDE_TYPES_H defined */ diff --git a/src/components/implementation/simple_vmm/noop_nf/apicreg.h b/src/components/implementation/simple_vmm/noop_nf/apicreg.h new file mode 100644 index 0000000000..0b8579ffb2 --- /dev/null +++ b/src/components/implementation/simple_vmm/noop_nf/apicreg.h @@ -0,0 +1,444 @@ +/*- + * Copyright (c) 1996, by Peter Wemm and Steve Passe + * Copyright (c) 2017-2022 Intel Corporation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. The name of the developer may NOT be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef APICREG_H +#define APICREG_H + +#include +/* + * Local && I/O APIC definitions. + */ + +/****************************************************************************** + * global defines, etc. + */ + + +/****************************************************************************** + * LOCAL APIC structure + */ +struct lapic_reg { + uint32_t v; + uint32_t pad[3]; +}; + +struct lapic_regs { /*OFFSET(Hex)*/ + struct lapic_reg rsv0[2]; + struct lapic_reg id; /*020*/ + struct lapic_reg version; /*030*/ + struct lapic_reg rsv1[4]; + struct lapic_reg tpr; /*080*/ + struct lapic_reg apr; /*090*/ + struct lapic_reg ppr; /*0A0*/ + struct lapic_reg eoi; /*0B0*/ + struct lapic_reg rrd; /*0C0*/ + struct lapic_reg ldr; /*0D0*/ + struct lapic_reg dfr; /*0EO*/ + struct lapic_reg svr; /*0F0*/ + struct lapic_reg isr[8]; /*100 -- 170*/ + struct lapic_reg tmr[8]; /*180 -- 1F0*/ + struct lapic_reg irr[8]; /*200 -- 270*/ + struct lapic_reg esr; /*280*/ + struct lapic_reg rsv2[6]; + struct lapic_reg lvt_cmci; /*2F0*/ + struct lapic_reg icr_lo; /*300*/ + struct lapic_reg icr_hi; /*310*/ + struct lapic_reg lvt[6]; /*320 -- 370*/ + struct lapic_reg icr_timer;/*380*/ + struct lapic_reg ccr_timer;/*390*/ + struct lapic_reg rsv3[4]; + struct lapic_reg dcr_timer;/*3E0*/ + struct lapic_reg self_ipi; /*3F0*/ + + /*roundup sizeof current struct to 4KB*/ + struct lapic_reg rsv5[192]; /*400 -- FF0*/ +} __attribute__((aligned(4096))); + +enum LAPIC_REGISTERS { + LAPIC_ID = 0x2, + LAPIC_VERSION = 0x3, + LAPIC_TPR = 0x8, + LAPIC_APR = 0x9, + LAPIC_PPR = 0xa, + LAPIC_EOI = 0xb, + LAPIC_LDR = 0xd, + LAPIC_DFR = 0xe, /* Not in x2APIC */ + LAPIC_SVR = 0xf, + LAPIC_ISR0 = 0x10, + LAPIC_ISR1 = 0x11, + LAPIC_ISR2 = 0x12, + LAPIC_ISR3 = 0x13, + LAPIC_ISR4 = 0x14, + LAPIC_ISR5 = 0x15, + LAPIC_ISR6 = 0x16, + LAPIC_ISR7 = 0x17, + LAPIC_TMR0 = 0x18, + LAPIC_TMR1 = 0x19, + LAPIC_TMR2 = 0x1a, + LAPIC_TMR3 = 0x1b, + LAPIC_TMR4 = 0x1c, + LAPIC_TMR5 = 0x1d, + LAPIC_TMR6 = 0x1e, + LAPIC_TMR7 = 0x1f, + LAPIC_IRR0 = 0x20, + LAPIC_IRR1 = 0x21, + LAPIC_IRR2 = 0x22, + LAPIC_IRR3 = 0x23, + LAPIC_IRR4 = 0x24, + LAPIC_IRR5 = 0x25, + LAPIC_IRR6 = 0x26, + LAPIC_IRR7 = 0x27, + LAPIC_ESR = 0x28, + LAPIC_LVT_CMCI = 0x2f, + LAPIC_ICR_LO = 0x30, + LAPIC_ICR_HI = 0x31, /* Not in x2APIC */ + LAPIC_LVT_TIMER = 0x32, + LAPIC_LVT_THERMAL = 0x33, + LAPIC_LVT_PCINT = 0x34, + LAPIC_LVT_LINT0 = 0x35, + LAPIC_LVT_LINT1 = 0x36, + LAPIC_LVT_ERROR = 0x37, + LAPIC_ICR_TIMER = 0x38, + LAPIC_CCR_TIMER = 0x39, + LAPIC_DCR_TIMER = 0x3e, + LAPIC_SELF_IPI = 0x3f, /* Only in x2APIC */ + LAPIC_EXT_FEATURES = 0x40, /* AMD */ + LAPIC_EXT_CTRL = 0x41, /* AMD */ + LAPIC_EXT_SEOI = 0x42, /* AMD */ + LAPIC_EXT_IER0 = 0x48, /* AMD */ + LAPIC_EXT_IER1 = 0x49, /* AMD */ + LAPIC_EXT_IER2 = 0x4a, /* AMD */ + LAPIC_EXT_IER3 = 0x4b, /* AMD */ + LAPIC_EXT_IER4 = 0x4c, /* AMD */ + LAPIC_EXT_IER5 = 0x4d, /* AMD */ + LAPIC_EXT_IER6 = 0x4e, /* AMD */ + LAPIC_EXT_IER7 = 0x4f, /* AMD */ + LAPIC_EXT_LVT0 = 0x50, /* AMD */ + LAPIC_EXT_LVT1 = 0x51, /* AMD */ + LAPIC_EXT_LVT2 = 0x52, /* AMD */ + LAPIC_EXT_LVT3 = 0x53, /* AMD */ +}; + +#define LAPIC_MEM_MUL 0x10 + +/* + * Although some registers are available on AMD processors only, + * it's not a big waste to reserve them on all platforms. + * However, we need to watch out for this space being assigned for + * non-APIC purposes in the future processor models. + */ +#define LAPIC_MEM_REGION ((LAPIC_EXT_LVT3 + 1) * LAPIC_MEM_MUL) + +/****************************************************************************** + * I/O APIC structure + */ + +struct ioapic { + uint32_t ioregsel; + uint32_t rsv0[3]; + uint32_t iowin; + uint32_t rsv1[3]; +}; + +/* + * Macros for bits in union ioapic_rte + */ +#define IOAPIC_RTE_MASK_CLR 0x0U /* Interrupt Mask: Clear */ +#define IOAPIC_RTE_MASK_SET 0x1U /* Interrupt Mask: Set */ + +#define IOAPIC_RTE_TRGRMODE_EDGE 0x0U /* Trigger Mode: Edge */ +#define IOAPIC_RTE_TRGRMODE_LEVEL 0x1U /* Trigger Mode: Level */ + +#define IOAPIC_RTE_REM_IRR 0x1U /* Remote IRR: Read-Only */ + +#define IOAPIC_RTE_INTPOL_AHI 0x0U /* Interrupt Polarity: active high */ +#define IOAPIC_RTE_INTPOL_ALO 0x1U /* Interrupt Polarity: active low */ + +#define IOAPIC_RTE_DELIVS 0x1U /* Delivery Status: Read-Only */ + +#define IOAPIC_RTE_DESTMODE_PHY 0x0U /* Destination Mode: Physical */ +#define IOAPIC_RTE_DESTMODE_LOGICAL 0x1U /* Destination Mode: Logical */ + +#define IOAPIC_RTE_DELMODE_FIXED 0x0U /* Delivery Mode: Fixed */ +#define IOAPIC_RTE_DELMODE_LOPRI 0x1U /* Delivery Mode: Lowest priority */ +#define IOAPIC_RTE_DELMODE_INIT 0x5U /* Delivery Mode: INIT signal */ +#define IOAPIC_RTE_DELMODE_EXINT 0x7U /* Delivery Mode: External INTerrupt */ + +/* IOAPIC Redirection Table (RTE) Entry structure */ +union ioapic_rte { + uint64_t full; + struct { + uint32_t lo_32; + uint32_t hi_32; + } u; + struct { + uint8_t vector:8; + uint64_t delivery_mode:3; + uint64_t dest_mode:1; + uint64_t delivery_status:1; + uint64_t intr_polarity:1; + uint64_t remote_irr:1; + uint64_t trigger_mode:1; + uint64_t intr_mask:1; + uint64_t rsvd_1:39; + uint8_t dest_field:8; + } bits __attribute__((packed)); + struct { + uint32_t vector:8; + uint32_t constant:3; + uint32_t intr_index_high:1; + uint32_t delivery_status:1; + uint32_t intr_polarity:1; + uint32_t remote_irr:1; + uint32_t trigger_mode:1; + uint32_t intr_mask:1; + uint32_t rsvd_1:15; + uint32_t rsvd_2:16; + uint32_t intr_format:1; + uint32_t intr_index_low:15; + } ir_bits __attribute__((packed)); +}; + +/****************************************************************************** + * various code 'logical' values + */ + +/****************************************************************************** + * LOCAL APIC defines + */ + +/* default physical locations of LOCAL (CPU) APICs */ +#define DEFAULT_APIC_BASE 0xfee00000UL + +/* constants relating to APIC ID registers */ +#define APIC_ID_MASK 0xff000000U +#define APIC_ID_SHIFT 24U +#define APIC_ID_CLUSTER 0xf0U +#define APIC_ID_CLUSTER_ID 0x0fU +#define APIC_MAX_CLUSTER 0xeU +#define APIC_MAX_INTRACLUSTER_ID 3 +#define APIC_ID_CLUSTER_SHIFT 4 + +/* fields in VER */ +#define APIC_VER_VERSION 0x000000ffU +#define APIC_VER_MAXLVT 0x00ff0000U +#define MAXLVTSHIFT 16U +#define APIC_VER_EOI_SUPPRESSION 0x01000000U +#define APIC_VER_AMD_EXT_SPACE 0x80000000U + +/* fields in LDR */ +#define APIC_LDR_RESERVED 0x00ffffffU + +/* fields in DFR */ +#define APIC_DFR_RESERVED 0x0fffffffU +#define APIC_DFR_MODEL_MASK 0xf0000000U +#define APIC_DFR_MODEL_FLAT 0xf0000000U +#define APIC_DFR_MODEL_CLUSTER 0x00000000U + +/* fields in SVR */ +#define APIC_SVR_VECTOR 0x000000ffU +#define APIC_SVR_VEC_PROG 0x000000f0U +#define APIC_SVR_VEC_FIX 0x0000000fU +#define APIC_SVR_ENABLE 0x00000100U +#define APIC_SVR_SWDIS 0x00000000U +#define APIC_SVR_SWEN 0x00000100U +#define APIC_SVR_FOCUS 0x00000200U +#define APIC_SVR_FEN 0x00000000U +#define APIC_SVR_FDIS 0x00000200U +#define APIC_SVR_EOI_SUPPRESSION 0x00001000U + +/* fields in TPR */ +#define APIC_TPR_PRIO 0x000000ffU +#define APIC_TPR_INT 0x000000f0U +#define APIC_TPR_SUB 0x0000000fU + +/* fields in ESR */ +#define APIC_ESR_SEND_CS_ERROR 0x00000001U +#define APIC_ESR_RECEIVE_CS_ERROR 0x00000002U +#define APIC_ESR_SEND_ACCEPT 0x00000004U +#define APIC_ESR_RECEIVE_ACCEPT 0x00000008U +#define APIC_ESR_SEND_ILLEGAL_VECTOR 0x00000020U +#define APIC_ESR_RECEIVE_ILLEGAL_VECTOR 0x00000040U +#define APIC_ESR_ILLEGAL_REGISTER 0x00000080U + +/* fields in ICR_LOW */ +#define APIC_VECTOR_MASK 0x000000ffU + +#define APIC_DELMODE_MASK 0x00000700U +#define APIC_DELMODE_FIXED 0x00000000U +#define APIC_DELMODE_LOWPRIO 0x00000100U +#define APIC_DELMODE_SMI 0x00000200U +#define APIC_DELMODE_RR 0x00000300U +#define APIC_DELMODE_NMI 0x00000400U +#define APIC_DELMODE_INIT 0x00000500U +#define APIC_DELMODE_STARTUP 0x00000600U +#define APIC_DELMODE_RESV 0x00000700U + +#define APIC_DESTMODE_MASK 0x00000800U +#define APIC_DESTMODE_PHY 0x00000000U +#define APIC_DESTMODE_LOG 0x00000800U + +#define APIC_DELSTAT_MASK 0x00001000U +#define APIC_DELSTAT_IDLE 0x00000000U +#define APIC_DELSTAT_PEND 0x00001000U + +#define APIC_RESV1_MASK 0x00002000U + +#define APIC_LEVEL_MASK 0x00004000U +#define APIC_LEVEL_DEASSERT 0x00000000U +#define APIC_LEVEL_ASSERT 0x00004000U + +#define APIC_TRIGMOD_MASK 0x00008000U +#define APIC_TRIGMOD_EDGE 0x00000000U +#define APIC_TRIGMOD_LEVEL 0x00008000U + +#define APIC_RRSTAT_MASK 0x00030000U +#define APIC_RRSTAT_INVALID 0x00000000U +#define APIC_RRSTAT_INPROG 0x00010000U +#define APIC_RRSTAT_VALID 0x00020000U +#define APIC_RRSTAT_RESV 0x00030000U + +#define APIC_DEST_MASK 0x000c0000U +#define APIC_DEST_NOSHORT 0x00000000U +#define APIC_DEST_SELF 0x00040000U +#define APIC_DEST_ALLISELF 0x00080000U +#define APIC_DEST_ALLESELF 0x000c0000U + +#define APIC_RESV2_MASK 0xfff00000U + +#define APIC_ICRLO_RESV_MASK (APIC_RESV1_MASK | APIC_RESV2_MASK) + +/* fields in LVT1/2 */ +#define APIC_LVT_VECTOR 0x000000ffU +#define APIC_LVT_DM 0x00000700U +#define APIC_LVT_DM_FIXED 0x00000000U +#define APIC_LVT_DM_SMI 0x00000200U +#define APIC_LVT_DM_NMI 0x00000400U +#define APIC_LVT_DM_INIT 0x00000500U +#define APIC_LVT_DM_EXTINT 0x00000700U +#define APIC_LVT_DS 0x00001000U +#define APIC_LVT_IIPP 0x00002000U +#define APIC_LVT_IIPP_INTALO 0x00002000U +#define APIC_LVT_IIPP_INTAHI 0x00000000U +#define APIC_LVT_RIRR 0x00004000U +#define APIC_LVT_TM 0x00008000U +#define APIC_LVT_M 0x00010000U + + +/* fields in LVT Timer */ +#define APIC_LVTT_VECTOR 0x000000ffU +#define APIC_LVTT_DS 0x00001000U +#define APIC_LVTT_M 0x00010000U +#define APIC_LVTT_TM 0x00060000U +#define APIC_LVTT_TM_ONE_SHOT 0x00000000U +#define APIC_LVTT_TM_PERIODIC 0x00020000U +#define APIC_LVTT_TM_TSCDLT 0x00040000U +#define APIC_LVTT_TM_RSRV 0x00060000U + +/* APIC timer current count */ +#define APIC_TIMER_MAX_COUNT 0xffffffffU + +/* fields in TDCR */ +#define APIC_TDCR_2 0x00U +#define APIC_TDCR_4 0x01U +#define APIC_TDCR_8 0x02U +#define APIC_TDCR_16 0x03U +#define APIC_TDCR_32 0x08U +#define APIC_TDCR_64 0x09U +#define APIC_TDCR_128 0x0aU +#define APIC_TDCR_1 0x0bU + +/* Constants related to AMD Extended APIC Features Register */ +#define APIC_EXTF_ELVT_MASK 0x00ff0000U +#define APIC_EXTF_ELVT_SHIFT 16 +#define APIC_EXTF_EXTID_CAP 0x00000004U +#define APIC_EXTF_SEIO_CAP 0x00000002U +#define APIC_EXTF_IER_CAP 0x00000001U + +/* LVT table indices */ +#define APIC_LVT_TIMER 0U +#define APIC_LVT_THERMAL 1U +#define APIC_LVT_PMC 2U +#define APIC_LVT_LINT0 3U +#define APIC_LVT_LINT1 4U +#define APIC_LVT_ERROR 5U +#define APIC_LVT_CMCI 6U +#define APIC_LVT_MAX APIC_LVT_CMCI + +/* AMD extended LVT constants, seem to be assigned by fiat */ +#define APIC_ELVT_IBS 0 /* Instruction based sampling */ +#define APIC_ELVT_MCA 1 /* MCE thresholding */ +#define APIC_ELVT_DEI 2 /* Deferred error interrupt */ +#define APIC_ELVT_SBI 3 /* Sideband interface */ +#define APIC_ELVT_MAX APIC_ELVT_SBI + +/****************************************************************************** + * I/O APIC defines + */ + +/* window register offset */ +#define IOAPIC_REGSEL 0x00U +#define IOAPIC_WINDOW 0x10U + +/* indexes into IO APIC */ +#define IOAPIC_ID 0x00U +#define IOAPIC_VER 0x01U +#define IOAPIC_ARB 0x02U +#define IOAPIC_REDTBL 0x10U +#define IOAPIC_REDTBL0 IOAPIC_REDTBL +#define IOAPIC_REDTBL1 (IOAPIC_REDTBL+0x02U) +#define IOAPIC_REDTBL2 (IOAPIC_REDTBL+0x04U) +#define IOAPIC_REDTBL3 (IOAPIC_REDTBL+0x06U) +#define IOAPIC_REDTBL4 (IOAPIC_REDTBL+0x08U) +#define IOAPIC_REDTBL5 (IOAPIC_REDTBL+0x0aU) +#define IOAPIC_REDTBL6 (IOAPIC_REDTBL+0x0cU) +#define IOAPIC_REDTBL7 (IOAPIC_REDTBL+0x0eU) +#define IOAPIC_REDTBL8 (IOAPIC_REDTBL+0x10U) +#define IOAPIC_REDTBL9 (IOAPIC_REDTBL+0x12U) +#define IOAPIC_REDTBL10 (IOAPIC_REDTBL+0x14U) +#define IOAPIC_REDTBL11 (IOAPIC_REDTBL+0x16U) +#define IOAPIC_REDTBL12 (IOAPIC_REDTBL+0x18U) +#define IOAPIC_REDTBL13 (IOAPIC_REDTBL+0x1aU) +#define IOAPIC_REDTBL14 (IOAPIC_REDTBL+0x1cU) +#define IOAPIC_REDTBL15 (IOAPIC_REDTBL+0x1eU) +#define IOAPIC_REDTBL16 (IOAPIC_REDTBL+0x20U) +#define IOAPIC_REDTBL17 (IOAPIC_REDTBL+0x22U) +#define IOAPIC_REDTBL18 (IOAPIC_REDTBL+0x24U) +#define IOAPIC_REDTBL19 (IOAPIC_REDTBL+0x26U) +#define IOAPIC_REDTBL20 (IOAPIC_REDTBL+0x28U) +#define IOAPIC_REDTBL21 (IOAPIC_REDTBL+0x2aU) +#define IOAPIC_REDTBL22 (IOAPIC_REDTBL+0x2cU) +#define IOAPIC_REDTBL23 (IOAPIC_REDTBL+0x2eU) + +#define IOAPIC_ID_MASK 0x0f000000U +#define IOAPIC_ID_SHIFT 24U + +/* fields in VER, for redirection entry */ +#define IOAPIC_MAX_RTE_MASK 0x00ff0000U +#define MAX_RTE_SHIFT 16U + +#endif /* APICREG_H */ diff --git a/src/components/implementation/simple_vmm/noop_nf/atomic.h b/src/components/implementation/simple_vmm/noop_nf/atomic.h new file mode 100644 index 0000000000..08de71b656 --- /dev/null +++ b/src/components/implementation/simple_vmm/noop_nf/atomic.h @@ -0,0 +1,152 @@ +/*- + * Copyright (c) 1998 Doug Rabson + * Copyright (c) 2018-2022 Intel Corporation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef ATOMIC_H +#define ATOMIC_H +#include +#define BUS_LOCK "lock ; " + +#define build_atomic_inc(name, size, type) \ +static inline void name(type *ptr) \ +{ \ + asm volatile(BUS_LOCK "inc" size " %0" \ + : "=m" (*ptr) \ + : "m" (*ptr)); \ +} +build_atomic_inc(atomic_inc16, "w", uint16_t) +build_atomic_inc(atomic_inc32, "l", uint32_t) +build_atomic_inc(atomic_inc64, "q", uint64_t) + +#define build_atomic_dec(name, size, type) \ +static inline void name(type *ptr) \ +{ \ + asm volatile(BUS_LOCK "dec" size " %0" \ + : "=m" (*ptr) \ + : "m" (*ptr)); \ +} +build_atomic_dec(atomic_dec16, "w", uint16_t) +build_atomic_dec(atomic_dec32, "l", uint32_t) +build_atomic_dec(atomic_dec64, "q", uint64_t) + +#define build_atomic_swap(name, size, type) \ +static inline type name(type *ptr, type v) \ +{ \ + asm volatile(BUS_LOCK "xchg" size " %1,%0" \ + : "+m" (*ptr), "+r" (v) \ + : \ + : "cc", "memory"); \ + return v; \ +} +build_atomic_swap(atomic_swap32, "l", uint32_t) +build_atomic_swap(atomic_swap64, "q", uint64_t) + + /* + * #define atomic_readandclear32(P) \ + * (return (*(uint32_t *)(P)); *(uint32_t *)(P) = 0U;) + */ +static inline uint32_t atomic_readandclear32(uint32_t *p) +{ + return atomic_swap32(p, 0U); +} + + /* + * #define atomic_readandclear64(P) \ + * (return (*(uint64_t *)(P)); *(uint64_t *)(P) = 0UL;) + */ +static inline uint64_t atomic_readandclear64(uint64_t *p) +{ + return atomic_swap64(p, 0UL); +} + +#define build_atomic_cmpxchg(name, size, type) \ +static inline type name(volatile type *ptr, type old, type new) \ +{ \ + type ret; \ + asm volatile(BUS_LOCK "cmpxchg" size " %2,%1" \ + : "=a" (ret), "+m" (*ptr) \ + : "r" (new), "0" (old) \ + : "memory"); \ + return ret; \ +} +build_atomic_cmpxchg(atomic_cmpxchg32, "l", uint32_t) +build_atomic_cmpxchg(atomic_cmpxchg64, "q", uint64_t) + +#define build_atomic_xadd(name, size, type) \ +static inline type name(type *ptr, type v) \ +{ \ + asm volatile(BUS_LOCK "xadd" size " %0,%1" \ + : "+r" (v), "+m" (*ptr) \ + : \ + : "cc", "memory"); \ + return v; \ + } +build_atomic_xadd(atomic_xadd16, "w", uint16_t) +build_atomic_xadd(atomic_xadd32, "l", int32_t) +build_atomic_xadd(atomic_xadd64, "q", int64_t) + +static inline int32_t atomic_add_return(int32_t *p, int32_t v) +{ + return (atomic_xadd32(p, v) + v); +} + +static inline int32_t atomic_sub_return(int32_t *p, int32_t v) +{ + return (atomic_xadd32(p, -v) - v); +} + +static inline int32_t atomic_inc_return(int32_t *v) +{ + return atomic_add_return(v, 1); +} + +static inline int32_t atomic_dec_return(int32_t *v) +{ + return atomic_sub_return(v, 1); +} + +static inline int64_t atomic_add64_return(int64_t *p, int64_t v) +{ + return (atomic_xadd64(p, v) + v); +} + +static inline int64_t atomic_sub64_return(int64_t *p, int64_t v) +{ + return (atomic_xadd64(p, -v) - v); +} + +static inline int64_t atomic_inc64_return(int64_t *v) +{ + return atomic_add64_return(v, 1); +} + +static inline int64_t atomic_dec64_return(int64_t *v) +{ + return atomic_sub64_return(v, 1); +} + +#endif /* ATOMIC_H*/ diff --git a/src/components/implementation/simple_vmm/noop_nf/bits.h b/src/components/implementation/simple_vmm/noop_nf/bits.h new file mode 100644 index 0000000000..f7f8b732e7 --- /dev/null +++ b/src/components/implementation/simple_vmm/noop_nf/bits.h @@ -0,0 +1,298 @@ +/*- + * Copyright (c) 1998 Doug Rabson + * Copyright (c) 2017-2022 Intel Corporation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef BITS_H +#define BITS_H +#include "atomic.h" + +/** + * + * INVALID_BIT_INDEX means when input paramter is zero, + * bit operations function can't find bit set and return + * the invalid bit index directly. + * + **/ +#define INVALID_BIT_INDEX 0xffffU + +/* + * + * fls32 - Find the Last (most significant) bit Set in value and + * return the bit index of that bit. + * + * Bits are numbered starting at 0,the least significant bit. + * A return value of INVALID_BIT_INDEX means return value is + * invalid bit index when the input argument was zero. + * + * Examples: + * fls32 (0x0) = INVALID_BIT_INDEX + * fls32 (0x01) = 0 + * fls32 (0x80) = 7 + * ... + * fls32 (0x80000001) = 31 + * + * @param value: 'uint32_t' type value + * + * @return value: zero-based bit index, INVALID_BIT_INDEX means + * when 'value' was zero, bit operations function can't find bit + * set and return the invalid bit index directly. + * + */ +static inline uint16_t fls32(uint32_t value) +{ + uint32_t ret; + asm volatile("bsrl %1,%0\n\t" + "jnz 1f\n\t" + "mov %2,%0\n" + "1:" : "=r" (ret) + : "rm" (value), "i" (INVALID_BIT_INDEX)); + return (uint16_t)ret; +} + +static inline uint16_t fls64(uint64_t value) +{ + uint64_t ret = 0UL; + asm volatile("bsrq %1,%0\n\t" + "jnz 1f\n\t" + "mov %2,%0\n" + "1:" : "=r" (ret) + : "rm" (value), "i" (INVALID_BIT_INDEX)); + return (uint16_t)ret; +} + +/* + * + * ffs64 - Find the First (least significant) bit Set in value(Long type) + * and return the index of that bit. + * + * Bits are numbered starting at 0,the least significant bit. + * A return value of INVALID_BIT_INDEX means that the return value is the inalid + * bit index when the input argument was zero. + * + * Examples: + * ffs64 (0x0) = INVALID_BIT_INDEX + * ffs64 (0x01) = 0 + * ffs64 (0xf0) = 4 + * ffs64 (0xf00) = 8 + * ... + * ffs64 (0x8000000000000001) = 0 + * ffs64 (0xf000000000000000) = 60 + * + * @param value: 'uint64_t' type value + * + * @return value: zero-based bit index, INVALID_BIT_INDEX means + * when 'value' was zero, bit operations function can't find bit + * set and return the invalid bit index directly. + * + */ +static inline uint16_t ffs64(uint64_t value) +{ + uint64_t ret; + asm volatile("bsfq %1,%0\n\t" + "jnz 1f\n\t" + "mov %2,%0\n" + "1:" : "=r" (ret) + : "rm" (value), "i" (INVALID_BIT_INDEX)); + return (uint16_t)ret; +} + +/*bit scan forward for the least significant bit '0'*/ +static inline uint16_t ffz64(uint64_t value) +{ + return ffs64(~value); +} + + +/* + * find the first zero bit in a uint64_t array. + * @pre: the size must be multiple of 64. + */ +static inline uint64_t ffz64_ex(const uint64_t *addr, uint64_t size) +{ + uint64_t ret = size; + uint64_t idx; + + for (idx = 0UL; (idx << 6U) < size; idx++) { + if (addr[idx] != ~0UL) { + ret = (idx << 6U) + ffz64(addr[idx]); + break; + } + } + + return ret; +} +/* + * Counts leading zeros. + * + * The number of leading zeros is defined as the number of + * most significant bits which are not '1'. E.g.: + * clz(0x80000000)==0 + * clz(0x40000000)==1 + * ... + * clz(0x00000001)==31 + * clz(0x00000000)==32 + * + * @param value:The 32 bit value to count the number of leading zeros. + * + * @return The number of leading zeros in 'value'. + */ +static inline uint16_t clz(uint32_t value) +{ + return ((value != 0U) ? (31U - fls32(value)) : 32U); +} + +/* + * Counts leading zeros (64 bit version). + * + * @param value:The 64 bit value to count the number of leading zeros. + * + * @return The number of leading zeros in 'value'. + */ +static inline uint16_t clz64(uint64_t value) +{ + return ((value != 0UL) ? (63U - fls64(value)) : 64U); +} + +/* + * (*addr) |= (1UL<=64, it will be truncated. + */ +#define build_bitmap_set(name, op_len, op_type, lock) \ +static inline void name(uint16_t nr_arg, volatile op_type *addr) \ +{ \ + uint16_t nr; \ + nr = nr_arg & ((8U * sizeof(op_type)) - 1U); \ + asm volatile(lock "or" op_len " %1,%0" \ + : "+m" (*addr) \ + : "r" ((op_type)(1UL<=64, it will be truncated. + */ +#define build_bitmap_clear(name, op_len, op_type, lock) \ +static inline void name(uint16_t nr_arg, volatile op_type *addr) \ +{ \ + uint16_t nr; \ + nr = nr_arg & ((8U * sizeof(op_type)) - 1U); \ + asm volatile(lock "and" op_len " %1,%0" \ + : "+m" (*addr) \ + : "r" ((op_type)(~(1UL<<(nr)))) \ + : "cc", "memory"); \ +} +build_bitmap_clear(bitmap_clear_nolock, "q", uint64_t, "") +build_bitmap_clear(bitmap_clear_lock, "q", uint64_t, BUS_LOCK) +build_bitmap_clear(bitmap32_clear_nolock, "l", uint32_t, "") +build_bitmap_clear(bitmap32_clear_lock, "l", uint32_t, BUS_LOCK) + +/* + * return !!((*addr) & (1UL<=64, it will + * be truncated. + */ +static inline bool bitmap_test(uint16_t nr, const volatile uint64_t *addr) +{ + int32_t ret = 0; + asm volatile("btq %q2,%1\n\tsbbl %0, %0" + : "=r" (ret) + : "m" (*addr), "r" ((uint64_t)(nr & 0x3fU)) + : "cc", "memory"); + return (ret != 0); +} + +static inline bool bitmap32_test(uint16_t nr, const volatile uint32_t *addr) +{ + int32_t ret = 0; + asm volatile("btl %2,%1\n\tsbbl %0, %0" + : "=r" (ret) + : "m" (*addr), "r" ((uint32_t)(nr & 0x1fU)) + : "cc", "memory"); + return (ret != 0); +} + +/* + * bool ret = (*addr) & (1UL<=64, it + * will be truncated. + */ +#define build_bitmap_testandset(name, op_len, op_type, lock) \ +static inline bool name(uint16_t nr_arg, volatile op_type *addr) \ +{ \ + uint16_t nr; \ + int32_t ret=0; \ + nr = nr_arg & ((8U * sizeof(op_type)) - 1U); \ + asm volatile(lock "bts" op_len " %2,%1\n\tsbbl %0,%0" \ + : "=r" (ret), "=m" (*addr) \ + : "r" ((op_type)nr) \ + : "cc", "memory"); \ + return (ret != 0); \ +} +build_bitmap_testandset(bitmap_test_and_set_nolock, "q", uint64_t, "") +build_bitmap_testandset(bitmap_test_and_set_lock, "q", uint64_t, BUS_LOCK) +build_bitmap_testandset(bitmap32_test_and_set_nolock, "l", uint32_t, "") +build_bitmap_testandset(bitmap32_test_and_set_lock, "l", uint32_t, BUS_LOCK) + +/* + * bool ret = (*addr) & (1UL<=64, + * it will be truncated. + */ +#define build_bitmap_testandclear(name, op_len, op_type, lock) \ +static inline bool name(uint16_t nr_arg, volatile op_type *addr) \ +{ \ + uint16_t nr; \ + int32_t ret=0; \ + nr = nr_arg & ((8U * sizeof(op_type)) - 1U); \ + asm volatile(lock "btr" op_len " %2,%1\n\tsbbl %0,%0" \ + : "=r" (ret), "=m" (*addr) \ + : "r" ((op_type)nr) \ + : "cc", "memory"); \ + return (ret != 0); \ +} +build_bitmap_testandclear(bitmap_test_and_clear_nolock, "q", uint64_t, "") +build_bitmap_testandclear(bitmap_test_and_clear_lock, "q", uint64_t, BUS_LOCK) +build_bitmap_testandclear(bitmap32_test_and_clear_nolock, "l", uint32_t, "") +build_bitmap_testandclear(bitmap32_test_and_clear_lock, "l", uint32_t, BUS_LOCK) + +static inline uint16_t bitmap_weight(uint64_t bits) +{ + return (uint16_t)__builtin_popcountl(bits); +} + +#endif /* BITS_H*/ diff --git a/src/components/implementation/simple_vmm/noop_nf/cpu.h b/src/components/implementation/simple_vmm/noop_nf/cpu.h new file mode 100755 index 0000000000..96f6a6ce4d --- /dev/null +++ b/src/components/implementation/simple_vmm/noop_nf/cpu.h @@ -0,0 +1,337 @@ +/*- + * Copyright (c) 1989, 1990 William F. Jolitz + * Copyright (c) 1990 The Regents of the University of California. + * Copyright (c) 2017-2022 Intel Corporation. + * + * This code is derived from software contributed to Berkeley by + * William Jolitz. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * from: @(#)segments.h 7.1 (Berkeley) 5/9/91 + * $FreeBSD$ + */ + +#ifndef CPU_H +#define CPU_H +#include +#include +#include +#include + +/* Define CPU stack alignment */ +#define CPU_STACK_ALIGN 16UL + +/* CR0 register definitions */ +#define CR0_PG (1UL<<31U) /* paging enable */ +#define CR0_CD (1UL<<30U) /* cache disable */ +#define CR0_NW (1UL<<29U) /* not write through */ +#define CR0_AM (1UL<<18U) /* alignment mask */ +#define CR0_WP (1UL<<16U) /* write protect */ +#define CR0_NE (1UL<<5U) /* numeric error */ +#define CR0_ET (1UL<<4U) /* extension type */ +#define CR0_TS (1UL<<3U) /* task switched */ +#define CR0_EM (1UL<<2U) /* emulation */ +#define CR0_MP (1UL<<1U) /* monitor coprocessor */ +#define CR0_PE (1UL<<0U) /* protected mode enabled */ + +/* CR3 register definitions */ +#define CR3_PWT (1UL<<3U) /* page-level write through */ +#define CR3_PCD (1UL<<4U) /* page-level cache disable */ + +/* CR4 register definitions */ +#define CR4_VME (1UL<<0U) /* virtual 8086 mode extensions */ +#define CR4_PVI (1UL<<1U) /* protected mode virtual interrupts */ +#define CR4_TSD (1UL<<2U) /* time stamp disable */ +#define CR4_DE (1UL<<3U) /* debugging extensions */ +#define CR4_PSE (1UL<<4U) /* page size extensions */ +#define CR4_PAE (1UL<<5U) /* physical address extensions */ +#define CR4_MCE (1UL<<6U) /* machine check enable */ +#define CR4_PGE (1UL<<7U) /* page global enable */ +#define CR4_PCE (1UL<<8U) +/* performance monitoring counter enable */ +#define CR4_OSFXSR (1UL<<9U) /* OS support for FXSAVE/FXRSTOR */ +#define CR4_OSXMMEXCPT (1UL<<10U) +/* OS support for unmasked SIMD floating point exceptions */ +#define CR4_UMIP (1UL<<11U) /* User-Mode Inst prevention */ +#define CR4_LA57 (1UL<<12U) /* 57-bit linear address */ +#define CR4_VMXE (1UL<<13U) /* VMX enable */ +#define CR4_SMXE (1UL<<14U) /* SMX enable */ +#define CR4_FSGSBASE (1UL<<16U) /* RD(FS|GS|FS)BASE inst */ +#define CR4_PCIDE (1UL<<17U) /* PCID enable */ +/* XSAVE and Processor Extended States enable bit */ +#define CR4_OSXSAVE (1UL<<18U) +#define CR4_KL (1UL<<19U) /* KeyLocker enable */ +#define CR4_SMEP (1UL<<20U) +#define CR4_SMAP (1UL<<21U) +#define CR4_PKE (1UL<<22U) /* Protect-key-enable */ +#define CR4_CET (1UL<<23U) /* Control-flow Enforcement Technology enable */ +#define CR4_PKS (1UL<<24U) /* Enable protection keys for supervisor-mode pages */ + +/* XCR0_SSE */ +#define XCR0_SSE (1UL<<1U) +/* XCR0_AVX */ +#define XCR0_AVX (1UL<<2U) +/* XCR0_BNDREGS */ +#define XCR0_BNDREGS (1UL<<3U) +/* XCR0_BNDCSR */ +#define XCR0_BNDCSR (1UL<<4U) +/* According to SDM Vol1 13.3: + * XCR0[63:10] and XCR0[8] are reserved. Executing the XSETBV instruction causes + * a general-protection fault if ECX = 0 and any corresponding bit in EDX:EAX + * is not 0. + */ +#define XCR0_RESERVED_BITS ((~((1UL << 10U) - 1UL)) | (1UL << 8U)) + + +/* + * Entries in the Interrupt Descriptor Table (IDT) + */ +#define IDT_DE 0U /* #DE: Divide Error */ +#define IDT_DB 1U /* #DB: Debug */ +#define IDT_NMI 2U /* Nonmaskable External Interrupt */ +#define IDT_BP 3U /* #BP: Breakpoint */ +#define IDT_OF 4U /* #OF: Overflow */ +#define IDT_BR 5U /* #BR: Bound Range Exceeded */ +#define IDT_UD 6U /* #UD: Undefined/Invalid Opcode */ +#define IDT_NM 7U /* #NM: No Math Coprocessor */ +#define IDT_DF 8U /* #DF: Double Fault */ +#define IDT_FPUGP 9U /* Coprocessor Segment Overrun */ +#define IDT_TS 10U /* #TS: Invalid TSS */ +#define IDT_NP 11U /* #NP: Segment Not Present */ +#define IDT_SS 12U /* #SS: Stack Segment Fault */ +#define IDT_GP 13U /* #GP: General Protection Fault */ +#define IDT_PF 14U /* #PF: Page Fault */ +#define IDT_MF 16U /* #MF: FPU Floating-Point Error */ +#define IDT_AC 17U /* #AC: Alignment Check */ +#define IDT_MC 18U /* #MC: Machine Check */ +#define IDT_XF 19U /* #XF: SIMD Floating-Point Exception */ +#define IDT_VE 20U /* #VE: Virtualization Exception */ + +/*Bits in EFER special registers */ +#define EFER_LMA 0x00000400U /* Long mode active (R) */ + +#define RFLAGS_C (1U<<0U) +#define RFLAGS_P (1U<<2U) +#define RFLAGS_A (1U<<4U) +#define RFLAGS_Z (1U<<6U) +#define RFLAGS_S (1U<<7U) +#define RFLAGS_O (1U<<11U) +#define RFLAGS_VM (1U<<17U) +#define RFLAGS_AC (1U<<18U) + +/* CPU clock frequencies (FSB) */ +#define CPU_FSB_83KHZ 83200 +#define CPU_FSB_100KHZ 99840 +#define CPU_FSB_133KHZ 133200 +#define CPU_FSB_166KHZ 166400 + +/* Time conversions */ +#define CPU_GHZ_TO_HZ 1000000000 +#define CPU_GHZ_TO_KHZ 1000000 +#define CPU_GHZ_TO_MHZ 1000 +#define CPU_MHZ_TO_HZ 1000000 +#define CPU_MHZ_TO_KHZ 1000 + + +/* Number of GPRs saved / restored for guest in VCPU structure */ +#define NUM_GPRS 16U + +#define XSAVE_STATE_AREA_SIZE 4096U +#define XSAVE_LEGACY_AREA_SIZE 512U +#define XSAVE_HEADER_AREA_SIZE 64U +#define XSAVE_EXTEND_AREA_SIZE (XSAVE_STATE_AREA_SIZE - \ + XSAVE_HEADER_AREA_SIZE - \ + XSAVE_LEGACY_AREA_SIZE) +#define XSAVE_COMPACTED_FORMAT (1UL << 63U) + +#define XSAVE_FPU (1UL << 0U) +#define XSAVE_SSE (1UL << 1U) + +#define CPU_CONTEXT_OFFSET_RAX 0U +#define CPU_CONTEXT_OFFSET_RCX 8U +#define CPU_CONTEXT_OFFSET_RDX 16U +#define CPU_CONTEXT_OFFSET_RBX 24U +#define CPU_CONTEXT_OFFSET_RSP 32U +#define CPU_CONTEXT_OFFSET_RBP 40U +#define CPU_CONTEXT_OFFSET_RSI 48U +#define CPU_CONTEXT_OFFSET_RDI 56U +#define CPU_CONTEXT_OFFSET_R8 64U +#define CPU_CONTEXT_OFFSET_R9 72U +#define CPU_CONTEXT_OFFSET_R10 80U +#define CPU_CONTEXT_OFFSET_R11 88U +#define CPU_CONTEXT_OFFSET_R12 96U +#define CPU_CONTEXT_OFFSET_R13 104U +#define CPU_CONTEXT_OFFSET_R14 112U +#define CPU_CONTEXT_OFFSET_R15 120U +#define CPU_CONTEXT_OFFSET_CR0 128U +#define CPU_CONTEXT_OFFSET_CR2 136U +#define CPU_CONTEXT_OFFSET_CR4 144U +#define CPU_CONTEXT_OFFSET_RIP 152U +#define CPU_CONTEXT_OFFSET_RFLAGS 160U +#define CPU_CONTEXT_OFFSET_IA32_SPEC_CTRL 168U +#define CPU_CONTEXT_OFFSET_IA32_EFER 176U +#define CPU_CONTEXT_OFFSET_EXTCTX_START 184U +#define CPU_CONTEXT_OFFSET_CR3 184U +#define CPU_CONTEXT_OFFSET_IDTR 192U +#define CPU_CONTEXT_OFFSET_LDTR 216U + +#ifndef ASSEMBLER + +#define ALL_CPUS_MASK ((1UL << get_pcpu_nums()) - 1UL) +#define AP_MASK (ALL_CPUS_MASK & ~(1UL << BSP_CPU_ID)) + +/** + * + * Identifiers for architecturally defined registers. + * + * These register names is used in condition statement. + * Within the following groups,register name need to be + * kept in order: + * General register names group (CPU_REG_RAX~CPU_REG_R15); + * Non general register names group (CPU_REG_CR0~CPU_REG_GDTR); + * Segement register names group (CPU_REG_ES~CPU_REG_GS). + */ +enum cpu_reg_name { + /* General purpose register layout should align with + * struct acrn_gp_regs + */ + CPU_REG_RAX, + CPU_REG_RCX, + CPU_REG_RDX, + CPU_REG_RBX, + CPU_REG_RSP, + CPU_REG_RBP, + CPU_REG_RSI, + CPU_REG_RDI, + CPU_REG_R8, + CPU_REG_R9, + CPU_REG_R10, + CPU_REG_R11, + CPU_REG_R12, + CPU_REG_R13, + CPU_REG_R14, + CPU_REG_R15, + + CPU_REG_CR0, + CPU_REG_CR2, + CPU_REG_CR3, + CPU_REG_CR4, + CPU_REG_DR7, + CPU_REG_RIP, + CPU_REG_RFLAGS, + /*CPU_REG_NATURAL_LAST*/ + CPU_REG_EFER, + CPU_REG_PDPTE0, + CPU_REG_PDPTE1, + CPU_REG_PDPTE2, + CPU_REG_PDPTE3, + /*CPU_REG_64BIT_LAST,*/ + CPU_REG_ES, + CPU_REG_CS, + CPU_REG_SS, + CPU_REG_DS, + CPU_REG_FS, + CPU_REG_GS, + CPU_REG_LDTR, + CPU_REG_TR, + CPU_REG_IDTR, + CPU_REG_GDTR + /*CPU_REG_LAST*/ +}; + +/**********************************/ +/* EXTERNAL VARIABLES */ +/**********************************/ + +/* In trampoline range, hold the jump target which trampline will jump to */ +extern uint64_t main_entry[1]; +extern uint64_t secondary_cpu_stack[1]; + +/* + * To support per_cpu access, we use a special struct "per_cpu_region" to hold + * the pattern of per CPU data. And we allocate memory for per CPU data + * according to multiple this struct size and pcpu number. + * + * +-------------------+------------------+---+------------------+ + * | percpu for pcpu0 | percpu for pcpu1 |...| percpu for pcpuX | + * +-------------------+------------------+---+------------------+ + * ^ ^ + * | | + * + * + * To access per cpu data, we use: + * per_cpu_base_ptr + sizeof(struct per_cpu_region) * curr_pcpu_id + * + offset_of_member_per_cpu_region + * to locate the per cpu data. + */ + +/* Boot CPU ID */ +#define BSP_CPU_ID 0U + +/** + *The invalid cpu_id (INVALID_CPU_ID) is error + *code for error handling, this means that + *caller can't find a valid physical cpu + *or virtual cpu. + */ +#define INVALID_CPU_ID 0xffffU +/** + *The broadcast id (BROADCAST_CPU_ID) + *used to notify all valid phyiscal cpu + *or virtual cpu. + */ +#define BROADCAST_CPU_ID 0xfffeU + +struct descriptor_table { + uint16_t limit; + uint64_t base; +} __packed; + +/* CPU states defined */ +enum pcpu_boot_state { + PCPU_STATE_RESET = 0U, + PCPU_STATE_INITIALIZING, + PCPU_STATE_RUNNING, + PCPU_STATE_HALTED, + PCPU_STATE_DEAD, +}; + +#define NEED_OFFLINE (1U) +#define NEED_SHUTDOWN_VM (2U) +void make_pcpu_offline(uint16_t pcpu_id); +bool need_offline(uint16_t pcpu_id); + +struct segment_sel { + uint16_t selector; + uint64_t base; + uint32_t limit; + uint32_t attr; +}; +#else /* ASSEMBLER defined */ + +#endif /* ASSEMBLER defined */ + +#endif /* CPU_H */ diff --git a/src/components/implementation/simple_vmm/noop_nf/cpu_caps.h b/src/components/implementation/simple_vmm/noop_nf/cpu_caps.h new file mode 100644 index 0000000000..466a024840 --- /dev/null +++ b/src/components/implementation/simple_vmm/noop_nf/cpu_caps.h @@ -0,0 +1,68 @@ +/* + * Copyright (C) 2018-2022 Intel Corporation. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef CPUINFO_H +#define CPUINFO_H + +#define MAX_PSTATE 20U /* max num of supported Px count */ +#define MAX_CSTATE 8U /* max num of supported Cx count */ +/* We support MAX_CSTATE num of Cx, means have (MAX_CSTATE - 1) Cx entries, + * i.e. supported Cx entry index range from 1 to MAX_CX_ENTRY. + */ +#define MAX_CX_ENTRY (MAX_CSTATE - 1U) + +/* CPUID feature words */ +#define FEAT_1_ECX 0U /* CPUID[1].ECX */ +#define FEAT_1_EDX 1U /* CPUID[1].EDX */ +#define FEAT_7_0_EBX 2U /* CPUID[EAX=7,ECX=0].EBX */ +#define FEAT_7_0_ECX 3U /* CPUID[EAX=7,ECX=0].ECX */ +#define FEAT_7_0_EDX 4U /* CPUID[EAX=7,ECX=0].EDX */ +#define FEAT_8000_0001_ECX 5U /* CPUID[8000_0001].ECX */ +#define FEAT_8000_0001_EDX 6U /* CPUID[8000_0001].EDX */ +#define FEAT_8000_0007_EDX 7U /* CPUID[8000_0007].EDX */ +#define FEAT_8000_0008_EBX 8U /* CPUID[8000_0008].EBX */ +#define FEAT_D_0_EAX 9U /* CPUID[D][0].EAX */ +#define FEAT_D_0_EDX 10U /* CPUID[D][0].EDX */ +#define FEAT_D_1_EAX 11U /* CPUID[D][1].EAX */ +#define FEAT_D_1_ECX 13U /* CPUID[D][1].ECX */ +#define FEAT_D_1_EDX 14U /* CPUID[D][1].EDX */ +#define FEAT_7_2_EDX 15U /* CPUID[EAX=7,ECX=2].EDX */ +#define FEATURE_WORDS 16U + +struct cpuinfo_x86 { + /* SDM 2-2 Vol.4 Table 2-1 uses DisplayFamily_DisplayModel to + * distinguish Processor Families/Processor Number Series. + */ + uint8_t displayfamily, displaymodel; + uint8_t virt_bits; + uint8_t phys_bits; + uint32_t cpuid_level; + uint32_t extended_cpuid_level; + uint64_t physical_address_mask; + uint32_t cpuid_leaves[FEATURE_WORDS]; + char model_name[64]; +}; + +bool has_monitor_cap(void); +bool disable_host_monitor_wait(void); +bool is_apl_platform(void); +bool pcpu_has_cap(uint32_t bit); +bool pcpu_has_vmx_ept_vpid_cap(uint64_t bit_mask); +bool is_apl_platform(void); +bool has_core_cap(uint32_t bit_mask); +bool is_ac_enabled(void); +bool is_gp_enabled(void); +void init_pcpu_capabilities(void); +void init_pcpu_model_name(void); +int32_t detect_hardware_support(void); +struct cpuinfo_x86 *get_pcpu_info(void); + +/* The bits of MSR IA32_CORE_CAPABILITIES */ +#define CORE_CAP_SPLIT_LOCK (1U << 5U) /* support #AC for Split-locked Access */ +#define CORE_CAP_UC_LOCK (1U << 4U) /* support #GP for non-guaranteed-atomic-locked access at Non-WB memory */ + + +#endif /* CPUINFO_H */ diff --git a/src/components/implementation/simple_vmm/noop_nf/cpuid.h b/src/components/implementation/simple_vmm/noop_nf/cpuid.h new file mode 100644 index 0000000000..cd6bfa93ad --- /dev/null +++ b/src/components/implementation/simple_vmm/noop_nf/cpuid.h @@ -0,0 +1,186 @@ +/* + * Copyright (C) 2018-2022 Intel Corporation. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +/* +* cpuid.h +* +* Created on: Jan 4, 2018 +* Author: don +*/ + +#ifndef CPUID_H_ +#define CPUID_H_ + +/* CPUID bit definitions */ +#define CPUID_ECX_SSE3 (1U<<0U) +#define CPUID_ECX_PCLMUL (1U<<1U) +#define CPUID_ECX_DTES64 (1U<<2U) +#define CPUID_ECX_MONITOR (1U<<3U) +#define CPUID_ECX_DS_CPL (1U<<4U) +#define CPUID_ECX_VMX (1U<<5U) +#define CPUID_ECX_SMX (1U<<6U) +#define CPUID_ECX_EST (1U<<7U) +#define CPUID_ECX_TM2 (1U<<8U) +#define CPUID_ECX_SSSE3 (1U<<9U) +#define CPUID_ECX_CID (1U<<10U) +#define CPUID_ECX_SDBG (1U<<11U) +#define CPUID_ECX_FMA (1U<<12U) +#define CPUID_ECX_CX16 (1U<<13U) +#define CPUID_ECX_ETPRD (1U<<14U) +#define CPUID_ECX_PDCM (1U<<15U) +#define CPUID_ECX_DCA (1U<<18U) +#define CPUID_ECX_SSE4_1 (1U<<19U) +#define CPUID_ECX_SSE4_2 (1U<<20U) +#define CPUID_ECX_x2APIC (1U<<21U) +#define CPUID_ECX_MOVBE (1U<<22U) +#define CPUID_ECX_POPCNT (1U<<23U) +#define CPUID_ECX_AES (1U<<25U) +#define CPUID_ECX_XSAVE (1U<<26U) +#define CPUID_ECX_OSXSAVE (1U<<27U) +#define CPUID_ECX_AVX (1U<<28U) +#define CPUID_ECX_HV (1U<<31U) +#define CPUID_ECX_MWAIT (1U<<0U) +#define CPUID_ECX_MWAIT_INT (1U<<1U) +#define CPUID_EDX_FPU (1U<<0U) +#define CPUID_EDX_VME (1U<<1U) +#define CPUID_EDX_DE (1U<<2U) +#define CPUID_EDX_PSE (1U<<3U) +#define CPUID_EDX_TSC (1U<<4U) +#define CPUID_EDX_MSR (1U<<5U) +#define CPUID_EDX_PAE (1U<<6U) +#define CPUID_EDX_MCE (1U<<7U) +#define CPUID_EDX_CX8 (1U<<8U) +#define CPUID_EDX_APIC (1U<<9U) +#define CPUID_EDX_SEP (1U<<11U) +#define CPUID_EDX_MTRR (1U<<12U) +#define CPUID_EDX_PGE (1U<<13U) +#define CPUID_EDX_MCA (1U<<14U) +#define CPUID_EDX_CMOV (1U<<15U) +#define CPUID_EDX_PAT (1U<<16U) +#define CPUID_EDX_PSE36 (1U<<17U) +#define CPUID_EDX_PSN (1U<<18U) +#define CPUID_EDX_CLF (1U<<19U) +#define CPUID_EDX_DTES (1U<<21U) +#define CPUID_EDX_ACPI (1U<<22U) +#define CPUID_EDX_MMX (1U<<23U) +#define CPUID_EDX_FXSR (1U<<24U) +#define CPUID_EDX_SSE (1U<<25U) +#define CPUID_EDX_SSE2 (1U<<26U) +#define CPUID_EDX_SS (1U<<27U) +#define CPUID_EDX_HTT (1U<<28U) +#define CPUID_EDX_TM1 (1U<<29U) +#define CPUID_EDX_IA64 (1U<<30U) +#define CPUID_EDX_PBE (1U<<31U) + +/* CPUID.06H:EAX.DTHERM */ +#define CPUID_EAX_DTHERM (1U<<0U) +/* CPUID.06H:EAX.HWP */ +#define CPUID_EAX_HWP (1U<<7U) +/* CPUID.06H:EAX.HWP_Notification */ +#define CPUID_EAX_HWP_N (1U<<8U) +/* CPUID.06H:EAX.HWP_Activity_Window */ +#define CPUID_EAX_HWP_AW (1U<<9U) +/* CPUID.06H:EAX.HWP_Energy_Performance_Preference */ +#define CPUID_EAX_HWP_EPP (1U<<10U) +/* CPUID.06H:EAX.HWP_Package_Level_Request */ +#define CPUID_EAX_HWP_PLR (1U<<11U) +/* CPUID.06H:ECX.Hardware_Coordination_Feedback_Capability */ +#define CPUID_ECX_HCFC (1U<<0U) +/* CPUID.07H:EBX.FSGSBASE*/ +#define CPUID_EBX_FSGSBASE (1U<<0U) +/* CPUID.07H:EBX.TSC_ADJUST*/ +#define CPUID_EBX_TSC_ADJ (1U<<1U) +/* CPUID.07H:EBX.SGX */ +#define CPUID_EBX_SGX (1U<<2U) +/* CPUID.07H:EBX.SMEP*/ +#define CPUID_EBX_SMEP (1U<<7U) +/* CPUID.07H:EBX.MPX */ +#define CPUID_EBX_MPX (1U<<14U) +/* CPUID.07H:EBX.SMAP*/ +#define CPUID_EBX_SMAP (1U<<20U) +/* CPUID.07H:ECX.UMIP */ +#define CPUID_ECX_UMIP (1U<<2U) +/* CPUID.07H:ECX.PKE */ +#define CPUID_ECX_PKE (1U<<3U) +/* CPUID.07H:ECX.WAITPKG */ +#define CPUID_ECX_WAITPKG (1U<<5U) +/* CPUID.07H:ECX.CET_SS */ +#define CPUID_ECX_CET_SS (1U<<7U) +/* CPUID.07H:ECX.LA57 */ +#define CPUID_ECX_LA57 (1U<<16U) +/* CPUID.07H:ECX.SGX_LC*/ +#define CPUID_ECX_SGX_LC (1U<<30U) +/* CPUID.07H:ECX.PKS*/ +#define CPUID_ECX_PKS (1U<<31U) +/* CPUID.07H:EDX.CET_IBT */ +#define CPUID_EDX_CET_IBT (1U<<20U) +/* CPUID.07H:EDX.IBRS_IBPB*/ +#define CPUID_EDX_IBRS_IBPB (1U<<26U) +/* CPUID.07H:EDX.STIBP*/ +#define CPUID_EDX_STIBP (1U<<27U) +/* CPUID.80000001H:EDX.Page1GB*/ +#define CPUID_EDX_PAGE1GB (1U<<26U) +/* CPUID.07H:EBX.INVPCID*/ +#define CPUID_EBX_INVPCID (1U<<10U) +/* CPUID.07H:EBX.PQM */ +#define CPUID_EBX_PQM (1U<<12U) +/* CPUID.07H:EBX.PQE */ +#define CPUID_EBX_PQE (1U<<15U) +/* CPUID.07H:EBX.INTEL_PROCESSOR_TRACE */ +#define CPUID_EBX_PROC_TRC (1U<<25U) +/* CPUID.01H:ECX.PCID*/ +#define CPUID_ECX_PCID (1U<<17U) +/* CPUID.0DH.EAX.XCR0_BNDREGS */ +#define CPUID_EAX_XCR0_BNDREGS (1U<<3U) +/* CPUID.0DH.EAX.XCR0_BNDCSR */ +#define CPUID_EAX_XCR0_BNDCSR (1U<<4U) +/* CPUID.0DH.ECX.CET_U_STATE */ +#define CPUID_ECX_CET_U_STATE (1U<<11U) +/* CPUID.0DH.ECX.CET_S_STATE */ +#define CPUID_ECX_CET_S_STATE (1U<<12U) +/* CPUID.12H.EAX.SGX1 */ +#define CPUID_EAX_SGX1 (1U<<0U) +/* CPUID.12H.EAX.SGX2 */ +#define CPUID_EAX_SGX2 (1U<<1U) +/* CPUID.19H.EBX.KL_AES_ENABLED */ +#define CPUID_EBX_KL_AES_EN (1U<<0U) +/* CPUID.19H.EBX.KL_BACKUP_MSR */ +#define CPUID_EBX_KL_BACKUP_MSR (1U<<4U) +/* CPUID.19H.ECX.KL_NOBACKUP */ +#define CPUID_ECX_KL_NOBACKUP (1U<<0U) +/* CPUID.19H.ECX.KL_RANDOM_KS */ +#define CPUID_ECX_KL_RANDOM_KS (1U<<1U) +/* CPUID.80000001H.EDX.XD_BIT_AVAILABLE */ +#define CPUID_EDX_XD_BIT_AVIL (1U<<20U) + +/* CPUID source operands */ +#define CPUID_VENDORSTRING 0U +#define CPUID_FEATURES 1U +#define CPUID_TLB 2U +#define CPUID_SERIALNUM 3U +#define CPUID_EXTEND_FEATURE 7U +#define CPUID_XSAVE_FEATURES 0xDU +#define CPUID_RDT_ALLOCATION 0x10U +#define CPUID_MAX_EXTENDED_FUNCTION 0x80000000U +#define CPUID_EXTEND_FUNCTION_1 0x80000001U +#define CPUID_EXTEND_FUNCTION_2 0x80000002U +#define CPUID_EXTEND_FUNCTION_3 0x80000003U +#define CPUID_EXTEND_FUNCTION_4 0x80000004U +#define CPUID_EXTEND_INVA_TSC 0x80000007U +#define CPUID_EXTEND_ADDRESS_SIZE 0x80000008U + +static inline void cpuid_subleaf(uint32_t leaf, uint32_t subleaf, + uint32_t *eax, uint32_t *ebx, + uint32_t *ecx, uint32_t *edx) +{ + /* Execute CPUID instruction and save results */ + asm volatile("cpuid":"=a"(*eax), "=b"(*ebx), + "=c"(*ecx), "=d"(*edx) + : "a" (leaf), "c" (subleaf) + : "memory"); +} + +#endif /* CPUID_H_ */ diff --git a/src/components/implementation/simple_vmm/noop_nf/devices/serial/serial.c b/src/components/implementation/simple_vmm/noop_nf/devices/serial/serial.c new file mode 100644 index 0000000000..41044b056d --- /dev/null +++ b/src/components/implementation/simple_vmm/noop_nf/devices/serial/serial.c @@ -0,0 +1,56 @@ +#include "serial.h" + +static u8_t serial_data[0x08]; +static u8_t send_intr_enable = 0; + +void +serial_handler(u16_t port, int dir, int sz, struct vmrt_vm_vcpu *vcpu) +{ + assert(port <= SERIAL_PORT_MAX && port >= SERIAL_PORT_MIN); + assert(sz == IO_BYTE); + + if (dir == IO_IN) { + vcpu->shared_region->ax = serial_data[port - SERIAL_PORT_MIN]; + } else if (dir == IO_OUT) { + serial_data[port - SERIAL_PORT_MIN] = (u8_t)vcpu->shared_region->ax; + switch (port) + { + + case SERIAL_PORT1: + printc("%c", (u8_t)vcpu->shared_region->ax); + if (send_intr_enable) { + /* + * TODO: correctly handle serial output(eg: multiple vcpu case) and inject serial interrupt, + * with io apic, 34 is serial8250_interrupt vector. + */ +#if VMX_SUPPORT_POSTED_INTR + vlapic_set_intr(vcpu, 34, 0); +#else + lapic_intr_inject(vcpu, 34, 1); +#endif + serial_data[SERIAL_IIR - SERIAL_PORT_MIN] = 0x2; + serial_data[MODEM_STATUS_REGISTER - SERIAL_PORT_MIN] = 0x20; + serial_data[SERIAL_LSR - SERIAL_PORT_MIN] = 0x60; + } + break; + case SERIAL_IER: + if (0x2 & (u8_t)vcpu->shared_region->ax) { + send_intr_enable = 1; + } else { + send_intr_enable = 0; + } + break; + } + } else { + VM_PANIC(vcpu); + } + + return; +} + +static void __attribute__((constructor)) +init(void) +{ + memset(&serial_data, 0, sizeof(serial_data)); + serial_data[SERIAL_LSR - SERIAL_PORT_MIN] = 0x60; +} diff --git a/src/components/implementation/simple_vmm/noop_nf/devices/serial/serial.h b/src/components/implementation/simple_vmm/noop_nf/devices/serial/serial.h new file mode 100644 index 0000000000..46ac88dd1e --- /dev/null +++ b/src/components/implementation/simple_vmm/noop_nf/devices/serial/serial.h @@ -0,0 +1,17 @@ +#pragma once +#include +#include + +/* Reference: https://www.lammertbies.nl/comm/info/serial-uart */ +#define SERIAL_PORT1 0x3F8 +#define SERIAL_IER 0x3F9 +#define SERIAL_IIR 0x3FA +#define SERIAL_LCR 0x3FB +#define SERIAL_MCR 0x3FC +#define SERIAL_LSR 0x3FD +#define MODEM_STATUS_REGISTER 0x3FE + +#define SERIAL_PORT_MIN SERIAL_PORT1 +#define SERIAL_PORT_MAX MODEM_STATUS_REGISTER + +void serial_handler(u16_t port, int dir, int sz, struct vmrt_vm_vcpu *vcpu); diff --git a/src/components/implementation/simple_vmm/noop_nf/devices/vpci/virtio_net_io.c b/src/components/implementation/simple_vmm/noop_nf/devices/vpci/virtio_net_io.c new file mode 100644 index 0000000000..3d561a5036 --- /dev/null +++ b/src/components/implementation/simple_vmm/noop_nf/devices/vpci/virtio_net_io.c @@ -0,0 +1,693 @@ +/*- + * Copyright (c) 2011 NetApp, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ +#include +#include +#include +#include "virtio_net_io.h" +#include "vpci.h" +#include "virtio_ring.h" +#include +#include +#include +#include +#include +#include +#include +#include + +/* TODO: remove this warning flag when virtio-net is done */ +#pragma GCC diagnostic ignored "-Wunused-but-set-variable" + +static struct virtio_net_io_reg virtio_net_regs; +static struct virtio_queue virtio_queues[2]; +struct virtio_vq_info virtio_net_vqs[VIRTIO_NET_MAXQ - 1]; + +static unsigned char icmp_reply[] = { + /* TODO: remove icmp reply and process nic input from nic component */ +}; + +static inline int +vq_ring_ready(struct virtio_vq_info *vq) +{ + return ((vq->flags & VQ_ALLOC) == VQ_ALLOC); +} + +static inline int +vq_has_descs(struct virtio_vq_info *vq) +{ + int ret = 0; + if (vq_ring_ready(vq) && vq->last_avail != vq->avail->idx) { + if (unlikely((u16_t)((unsigned int)vq->avail->idx - vq->last_avail) > vq->qsize)) { + printc("no valid descriptor\n"); + assert(0); + } + else + ret = 1; + } + return ret; + +} + +void * +paddr_guest2host(uintptr_t gaddr, struct vmrt_vm_comp *vm) +{ + void *va = GPA2HVA(gaddr, vm); + return va; +} + +#define roundup2(x, y) (((x)+((y)-1))&(~((y)-1))) +#define mb() ({ asm volatile("mfence" ::: "memory"); (void)0; }) + +void +vq_endchains(struct vmrt_vm_vcpu *vcpu, struct virtio_vq_info *vq, int used_all_avail) +{ + u16_t event_idx, new_idx, old_idx; + int intr; + + if (unlikely(!vq || !vq->used)) + return; + + old_idx = vq->save_used; + vq->save_used = new_idx = vq->used->idx; + + intr = new_idx != old_idx && + !(vq->avail->flags & VRING_AVAIL_F_NO_INTERRUPT); + + if (intr) { + virtio_net_regs.header.ISR = 1; + /* TODO: 57 is virtio-net interrupt without io apic, 33 is with io apic */ +#if VMX_SUPPORT_POSTED_INTR + vlapic_set_intr(vcpu, 33, 0); +#else + lapic_intr_inject(vcpu, 33, 0); +#endif + } + +} + +static inline struct iovec * +rx_iov_trim(struct iovec *iov, int *niov, size_t tlen) +{ + struct iovec *riov; + + iov[0].iov_len -= tlen; + + iov[0].iov_base = (void *)((uintptr_t)iov[0].iov_base + tlen); + riov = &iov[0]; + + return riov; +} + +static void +virtio_vq_init(struct vmrt_vm_vcpu *vcpu, int nr_queue, u32_t pfn) +{ + struct virtio_vq_info *vq; + u64_t phys; + size_t size; + char *vb; + + vq = &virtio_net_vqs[nr_queue]; + vq->pfn = pfn; + phys = (u64_t)pfn << VRING_PAGE_BITS; + size = vring_size(vq->qsize, VIRTIO_PCI_VRING_ALIGN); + vb = paddr_guest2host(phys, vcpu->vm); + if (!vb) + goto error; + + /* First page(s) are descriptors... */ + vq->desc = (struct vring_desc *)vb; + vb += vq->qsize * sizeof(struct vring_desc); + + /* ... immediately followed by "avail" ring (entirely u16_t's) */ + vq->avail = (struct vring_avail *)vb; + vb += (2 + vq->qsize + 1) * sizeof(u16_t); + + /* Then it's rounded up to the next page... */ + vb = (char *)roundup2((uintptr_t)vb, VIRTIO_PCI_VRING_ALIGN); + + /* ... and the last page(s) are the used ring. */ + vq->used = (struct vring_used *)vb; + + /* Start at 0 when we use it. */ + vq->last_avail = 0; + vq->save_used = 0; + + /* Mark queue as allocated after initialization is complete. */ + mb(); + vq->flags = VQ_ALLOC; + vq->vcpu = vcpu; + + return; + +error: + vq->flags = 0; + printc("%s: vq enable failed\n", __func__); + assert(0); +} + +static inline int +_vq_record(int i, volatile struct vring_desc *vd, + struct iovec *iov, int n_iov, u16_t *flags, struct vmrt_vm_vcpu *vcpu) { + + void *host_addr; + + if (i >= n_iov) { + printc("Number of descs is more than iov slots\n"); + assert(0); + } + + host_addr = paddr_guest2host(vd->addr, vcpu->vm); + if (unlikely(!host_addr)) { + printc("Invalid host addr\n"); + assert(0); + } + iov[i].iov_base = host_addr; + iov[i].iov_len = vd->len; + if (unlikely(flags != NULL)) + flags[i] = vd->flags; + + return 0; +} + +static void +dump_packet(char *p, u16_t sz) +{ + for (int i = 0; i < sz; i++) { + if (i > 0 && (i % 8 == 0)) printc("\n"); + u8_t c = p[i]; + printc("%02x ", c); + } + printc("\n"); +} + +int +vq_getchain(struct vmrt_vm_vcpu *vcpu, struct virtio_vq_info *vq, u16_t *pidx, + struct iovec *iov, int n_iov, u16_t *flags) +{ + int i; + unsigned int ndesc, n_indir; + unsigned int idx, next; + + volatile struct vring_desc *vdir, *vindir, *vp; + /* + * Note: it's the responsibility of the guest not to + * update vq->avail->idx until all of the descriptors + * the guest has written are valid (including all their + * next fields and vd_flags). + * + * Compute (last_avail - idx) in integers mod 2**16. This is + * the number of descriptors the device has made available + * since the last time we updated vq->last_avail. + * + * We just need to do the subtraction as an unsigned int, + * then trim off excess bits. + */ + idx = vq->last_avail; + ndesc = (u16_t)((unsigned int)vq->avail->idx - idx); + if (unlikely(ndesc == 0)) + return 0; + if (unlikely(ndesc > vq->qsize)) { + printc("ndesc (%u) out of range, driver confused?\r\n", + (unsigned int)ndesc); + assert(0); + } + + /* + * Now count/parse "involved" descriptors starting from + * the head of the chain. + * + * To prevent loops, we could be more complicated and + * check whether we're re-visiting a previously visited + * index, but we just abort if the count gets excessive. + */ + *pidx = next = vq->avail->ring[idx & (vq->qsize - 1)]; + vq->last_avail++; + for (i = 0; i < VQ_MAX_DESCRIPTORS; next = vdir->next) { + if (next >= vq->qsize) { + printc("tx: descriptor index %u out of range, " + "driver confused?\r\n", + next); + assert(0); + } + vdir = &vq->desc[next]; + if (likely((vdir->flags & VRING_DESC_F_INDIRECT) == 0)) { + if (unlikely(_vq_record(i, vdir, iov, n_iov, flags, vcpu))) { + printc("mapping to host failed\r\n"); + assert(0); + } + i++; + } else { + printc("descriptor has forbidden INDIRECT flag, " + "driver confused?\r\n"); + assert(0); + } + if ((vdir->flags & VRING_DESC_F_NEXT) == 0) + return i; + } + + /* code should not come here */ + printc("descriptor loop? count > %d - driver confused?\r\n", i); + assert(0); + return -1; +} + +void +vq_relchain(struct virtio_vq_info *vq, u16_t idx, u32_t iolen) +{ + u16_t uidx, mask; + volatile struct vring_used *vuh; + volatile struct vring_used_elem *vue; + + /* + * Notes: + * - mask is N-1 where N is a power of 2 so computes x % N + * - vuh points to the "used" data shared with guest + * - vue points to the "used" ring entry we want to update + * - head is the same value we compute in vq_iovecs(). + * + * (I apologize for the two fields named idx; the + * virtio spec calls the one that vue points to, "id"...) + */ + mask = vq->qsize - 1; + vuh = vq->used; + + uidx = vuh->idx; + vue = &vuh->ring[uidx++ & mask]; + vue->id = idx; + vue->len = iolen; + vuh->idx = uidx; +} + +void +vq_retchain(struct virtio_vq_info *vq) +{ + vq->last_avail--; +} + +void +virtio_net_rcv_one_pkt(void *data, int pkt_len) +{ + struct iovec iov[VIRTIO_NET_MAXSEGS], *riov; + struct virtio_vq_info *vq; + struct vmrt_vm_vcpu *vcpu; + void *vrx; + int n; + u16_t idx; + int ret; + + vq = &virtio_net_vqs[VIRTIO_NET_RXQ]; + + vcpu = vq->vcpu; + + if (unlikely(!vq_has_descs(vq))) { + return; + } + + n = vq_getchain(vcpu, vq, &idx, iov, VIRTIO_NET_MAXSEGS, NULL); + + // if (unlikely (n < 1 || n >= VIRTIO_NET_MAXSEGS )) { + // printc("vtnet: virtio_net_tap_rx: vq_getchain = %d\n", n); + // assert(0); + // } + + vrx = iov[0].iov_base; + /* every packet needs to be proceeded by a virtio_net_rxhdr header space */ + riov = rx_iov_trim(iov, &n, sizeof(struct virtio_net_rxhdr)); + + // assert(iov[0].iov_len >= (size_t)pkt_len); + + // memcpy(iov[0].iov_base, data, pkt_len); + memcpy_fast(iov[0].iov_base, data, pkt_len); + + memset(vrx, 0, sizeof(struct virtio_net_rxhdr)); + + vq_relchain(vq, idx, pkt_len + sizeof(struct virtio_net_rxhdr)); + + vq_endchains(vcpu, vq, 1); + return; +} + +void +virtio_net_send_one_pkt(void *data, u16_t *pkt_len) +{ + struct virtio_vq_info *vq = &virtio_net_vqs[VIRTIO_NET_TXQ]; + struct iovec iov[VIRTIO_NET_MAXSEGS]; + struct vmrt_vm_vcpu *vcpu; + int i, n; + int plen, tlen; + u16_t idx; + + while (!vq_has_descs(vq)) { + *pkt_len = 0; + return; + // sched_thd_block(0); + } + vcpu = vq->vcpu; + + memset(&iov, 0, sizeof(iov)); + n = vq_getchain(vcpu, vq, &idx, iov, VIRTIO_NET_MAXSEGS, NULL); + if (unlikely(n < 1 || n >= VIRTIO_NET_MAXSEGS)) { + printc("vtnet: virtio_net_proctx: vq_getchain = %d\n", n); + assert(0); + } + + plen = 0; + tlen = iov[0].iov_len; + assert(n == 2); + + plen += iov[1].iov_len; + tlen += iov[1].iov_len; + + // memcpy(data, iov[1].iov_base, iov[1].iov_len); + memcpy_fast(data, iov[1].iov_base, iov[1].iov_len); + + *pkt_len = plen; + vq_relchain(vq, idx, tlen); + + vq_endchains(vcpu, vq, 1); + return; +} + +static void +virtio_net_outb(u32_t port_id, struct vmrt_vm_vcpu *vcpu) +{ + u8_t val = vcpu->shared_region->ax; + + switch (port_id) + { + case VIRTIO_NET_DEV_STATUS: + virtio_net_regs.header.dev_status = val; + break; + default: + VM_PANIC(vcpu); + break; + } + return; +} + +#define REAL_NIC 0 + +#if REAL_NIC +static u8_t virtio_net_mac[6] = {0x6c, 0xfe, 0x54, 0x40, 0x41, 0x01}; +#else +static u8_t virtio_net_mac[6] = {0x10, 0x10, 0x10, 0x10, 0x10, 0x11}; +#endif + +static void +virtio_net_inb(u32_t port_id, struct vmrt_vm_vcpu *vcpu) +{ + u32_t bdf = 0; + + switch (port_id) + { + case VIRTIO_NET_DEV_STATUS: + vcpu->shared_region->ax = virtio_net_regs.header.dev_status; + break; + case VIRTIO_NET_ISR: + vcpu->shared_region->ax = virtio_net_regs.header.ISR; + virtio_net_regs.header.ISR = 0; + break; + case VIRTIO_NET_STATUS: + vcpu->shared_region->ax = virtio_net_regs.config_reg.status; + break; + case VIRTIO_NET_STATUS_H: + vcpu->shared_region->ax = virtio_net_regs.config_reg.status >> 8; + break; + /* TODO: read mac address from virtio-net config space */ + case VIRTIO_NET_MAC: + vcpu->shared_region->ax = virtio_net_mac[0]; + break; + case VIRTIO_NET_MAC1: + vcpu->shared_region->ax = virtio_net_mac[1]; + break; + case VIRTIO_NET_MAC2: + vcpu->shared_region->ax = virtio_net_mac[2]; + break; + case VIRTIO_NET_MAC3: + vcpu->shared_region->ax = virtio_net_mac[3]; + break; + case VIRTIO_NET_MAC4: + vcpu->shared_region->ax = virtio_net_mac[4]; + break; + case VIRTIO_NET_MAC5: + vcpu->shared_region->ax = virtio_net_mac[5]; + break; + default: + VM_PANIC(vcpu); + break; + } +} + +static void +virtio_net_inw(u32_t port_id, struct vmrt_vm_vcpu *vcpu) +{ + switch (port_id) + { + case VIRTIO_NET_QUEUE_SIZE: + vcpu->shared_region->ax = virtio_queues[virtio_net_regs.header.queue_select].queue_sz; + break; + case VIRTIO_NET_QUEUE_SELECT: + vcpu->shared_region->ax = virtio_net_regs.header.queue_select; + break; + case VIRTIO_NET_QUEUE_NOTIFY: + VM_PANIC(vcpu); + vcpu->shared_region->ax = virtio_net_regs.header.queue_notify; + break; + default: + VM_PANIC(vcpu); + break; + } +} + +static void +virtio_net_outw(u32_t port_id, struct vmrt_vm_vcpu *vcpu) +{ + u16_t val = vcpu->shared_region->ax; + + switch (port_id) + { + case VIRTIO_NET_QUEUE_SELECT: + virtio_net_regs.header.queue_select = val; + break; + case VIRTIO_NET_QUEUE_NOTIFY: + if (val == VIRTIO_NET_TXQ) { + // sched_thd_yield(); + // sched_thd_wakeup(11); + } + virtio_net_regs.header.queue_notify = val; + break; + default: + VM_PANIC(vcpu); + break; + } +} + +static void +virtio_net_outl(u32_t port_id, struct vmrt_vm_vcpu *vcpu) +{ + u32_t val = vcpu->shared_region->ax; + u64_t tmp = val; + + switch (port_id) + { + case VIRTIO_NET_GUEST_FEATURES: + virtio_net_regs.header.guest_features = val; + break; + case VIRTIO_NET_QUEUE_ADDR: + virtio_queues[virtio_net_regs.header.queue_select].queue = (void *)tmp; + virtio_vq_init(vcpu, virtio_net_regs.header.queue_select, val); + break; + default: + VM_PANIC(vcpu); + break; + } + return; +} + +static void +virtio_net_inl(u32_t port_id, struct vmrt_vm_vcpu *vcpu) +{ + switch (port_id) + { + case VIRTIO_NET_DEV_FEATURES: + vcpu->shared_region->ax = virtio_net_regs.header.dev_features; + break; + case VIRTIO_NET_GUEST_FEATURES: + vcpu->shared_region->ax = virtio_net_regs.header.guest_features; + break; + case VIRTIO_NET_QUEUE_ADDR: + vcpu->shared_region->ax = virtio_net_regs.header.queue_addr; + break; + default: + VM_PANIC(vcpu); + break; + } +} + +void +virtio_net_handler(u16_t port, int dir, int sz, struct vmrt_vm_vcpu *vcpu) +{ + if (dir == IO_IN) { + switch (sz) + { + case IO_BYTE: + virtio_net_inb(port, vcpu); + break; + case IO_WORD: + virtio_net_inw(port, vcpu); + break; + case IO_LONG: + virtio_net_inl(port, vcpu); + break; + default: + VM_PANIC(vcpu); + } + } else { + switch (sz) + { + case IO_BYTE: + virtio_net_outb(port, vcpu); + break; + case IO_WORD: + virtio_net_outw(port, vcpu); + break; + case IO_LONG: + virtio_net_outl(port, vcpu); + break; + default: + VM_PANIC(vcpu); + } + } +} + +void +virtio_net_io_init(void) +{ + memset(&virtio_net_regs, 0, sizeof(virtio_net_regs)); + memset(&virtio_queues, 0, sizeof(virtio_queues)); + memset(&virtio_net_vqs, 0, sizeof(virtio_net_vqs)); + + virtio_net_regs.header.dev_features |= (1 << VIRTIO_NET_F_STATUS); + virtio_net_regs.header.dev_features |= (1 << VIRTIO_NET_F_MAC); + virtio_net_regs.config_reg.status = VIRTIO_NET_S_LINK_UP; + virtio_queues[0].queue_sz = VQ_MAX_DESCRIPTORS; + virtio_queues[1].queue_sz = VQ_MAX_DESCRIPTORS; + virtio_net_vqs[VIRTIO_NET_RX].qsize = VQ_MAX_DESCRIPTORS; + virtio_net_vqs[VIRTIO_NET_TX].qsize = VQ_MAX_DESCRIPTORS; +} + +struct tcp_udp_port +{ + u16_t src_port; + u16_t dst_port; +} __attribute__((packed)); + +void +virtio_tx_task(void *data) +{ + struct virtio_vq_info *vq; + struct iovec iov[VIRTIO_NET_MAXSEGS]; + struct vmrt_vm_vcpu *vcpu; + int i, n; + int plen, tlen; + u16_t idx; + char *pkt; + struct netshmem_pkt_buf *tx_obj; + shm_bm_objid_t tx_pktid; + struct nf_pkt_meta_data buf; + + struct nf_session *session = NULL; + shm_bm_t tx_shmemd = 0; + u16_t svc_id = 0; + + struct iphdr *iphdr = NULL; + struct tcp_udp_port *port; + + vq = &virtio_net_vqs[VIRTIO_NET_TXQ]; + while (1) { + while (!vq_has_descs(vq)) { + sched_thd_yield(); + } + + vcpu = vq->vcpu; + + memset(&iov, 0, sizeof(iov)); + + n = vq_getchain(vcpu, vq, &idx, iov, VIRTIO_NET_MAXSEGS, NULL); + if (unlikely(n < 1 || n >= VIRTIO_NET_MAXSEGS)) { + printc("vtnet: virtio_net_proctx: vq_getchain = %d\n", n); + assert(0); + } + + plen = 0; + tlen = iov[0].iov_len; + assert(n == 2); + + plen += iov[1].iov_len; + tlen += iov[1].iov_len; + + pkt = iov[1].iov_base; + + iphdr = (struct iphdr *) (pkt + ETH_HLEN); + port = (struct tcp_udp_port *)((char *)pkt + ETH_HLEN + iphdr->ihl * 4); + u16_t svc_id = ntohs(port->dst_port); + + session = get_nf_session(svc_id); + + tx_shmemd = session->tx_shmemd; + if (unlikely(!tx_shmemd)) { + svc_id = 0; + session = get_nf_session(svc_id); + tx_shmemd = session->tx_shmemd; + } + + tx_obj = shm_bm_alloc_net_pkt_buf(tx_shmemd, &tx_pktid); + + if (likely(tx_obj != NULL)){ + buf.objid = tx_pktid; + buf.pkt_len = plen; + buf.obj = tx_obj; + + // memcpy(netshmem_get_data_buf(tx_obj), pkt, plen); + memcpy_fast(netshmem_get_data_buf(tx_obj), pkt, plen); + + if ((unlikely(!nf_tx_ring_buf_enqueue(&(session->nf_tx_ring_buf), &buf)))){ + shm_bm_free_net_pkt_buf(tx_obj); + } else { + // sched_thd_wakeup(session->tx_thd); + // sync_sem_give(&session->tx_sem); + } + } else { + printc("cannot allocate objects\n"); + assert(0); + } + + vq_relchain(vq, idx, tlen); + vq_endchains(vcpu, vq, 1); + } +} diff --git a/src/components/implementation/simple_vmm/noop_nf/devices/vpci/virtio_net_io.h b/src/components/implementation/simple_vmm/noop_nf/devices/vpci/virtio_net_io.h new file mode 100644 index 0000000000..ba50bb2b77 --- /dev/null +++ b/src/components/implementation/simple_vmm/noop_nf/devices/vpci/virtio_net_io.h @@ -0,0 +1,144 @@ +#pragma once + +#include +#include + +#define VIRTIO_NET_IO_ADDR 0x4000 + +#define VIRTIO_NET_DEV_FEATURES (VIRTIO_NET_IO_ADDR + 0) +#define VIRTIO_NET_GUEST_FEATURES (VIRTIO_NET_IO_ADDR + 4) +#define VIRTIO_NET_QUEUE_ADDR (VIRTIO_NET_IO_ADDR + 8) +#define VIRTIO_NET_QUEUE_SIZE (VIRTIO_NET_IO_ADDR + 12) +#define VIRTIO_NET_QUEUE_SELECT (VIRTIO_NET_IO_ADDR + 14) +#define VIRTIO_NET_QUEUE_NOTIFY (VIRTIO_NET_IO_ADDR + 16) +#define VIRTIO_NET_DEV_STATUS (VIRTIO_NET_IO_ADDR + 18) +#define VIRTIO_NET_ISR (VIRTIO_NET_IO_ADDR + 19) + +#define VIRTIO_NET_MAC (VIRTIO_NET_IO_ADDR + 20) +#define VIRTIO_NET_MAC1 (VIRTIO_NET_IO_ADDR + 21) +#define VIRTIO_NET_MAC2 (VIRTIO_NET_IO_ADDR + 22) +#define VIRTIO_NET_MAC3 (VIRTIO_NET_IO_ADDR + 23) +#define VIRTIO_NET_MAC4 (VIRTIO_NET_IO_ADDR + 24) +#define VIRTIO_NET_MAC5 (VIRTIO_NET_IO_ADDR + 25) + +#define VIRTIO_NET_STATUS (VIRTIO_NET_IO_ADDR + 26) +#define VIRTIO_NET_STATUS_H (VIRTIO_NET_IO_ADDR + 27) + +#define VIRTIO_NET_F_CSUM (0) +#define VIRTIO_NET_F_GUEST_CSUM (1) +#define VIRTIO_NET_F_MAC (5) +#define VIRTIO_NET_F_GSO (6) +#define VIRTIO_NET_F_GUEST_TSO4 (7) +#define VIRTIO_NET_F_GUEST_TSO6 (8) +#define VIRTIO_NET_F_GUEST_ECN (9) +#define VIRTIO_NET_F_GUEST_UFO (10) +#define VIRTIO_NET_F_HOST_TSO4 (11) +#define VIRTIO_NET_F_HOST_TSO6 (12) +#define VIRTIO_NET_F_HOST_ECN (13) +#define VIRTIO_NET_F_HOST_UFO (14) +#define VIRTIO_NET_F_MRG_RXBUF (15) +#define VIRTIO_NET_F_STATUS (16) +#define VIRTIO_NET_F_CTRL_VQ (17) +#define VIRTIO_NET_F_CTRL_RX (18) +#define VIRTIO_NET_F_CTRL_VLAN (19) +#define VIRTIO_NET_F_GUEST_ANNOUNCE (21) + +#define VIRTIO_NET_RINGSZ 512 +#define VIRTIO_NET_MAXSEGS 32 +#define VQ_MAX_DESCRIPTORS 512 + +struct virtio_header { + u32_t dev_features; + u32_t guest_features; + u32_t queue_addr; + u16_t queue_size; + u16_t queue_select; + u16_t queue_notify; + u8_t dev_status; + u8_t ISR; +} __attribute__((packed)); + +struct virtio_queue { + u16_t queue_sz; + void *queue; +}; + +#define VIRTIO_NET_S_LINK_UP 1 +#define VIRTIO_NET_S_ANNOUNCE 2 + +#define VIRTIO_NET_RX 0 +#define VIRTIO_NET_TX 1 + +#define VIRTIO_NET_RXQ 0 +#define VIRTIO_NET_TXQ 1 +#define VIRTIO_NET_CTLQ 2 + +#define VIRTIO_NET_MAXQ 3 + +#define VRING_PAGE_BITS 12 +#define VIRTIO_PCI_VRING_ALIGN 4096 + +#define VQ_ALLOC 0x01 /* set once we have a pfn */ +#define VQ_BROKED 0x02 + +struct virtio_net_config { + u8_t mac[6]; + u16_t status; +} __attribute__((packed)); + +struct virtio_net_io_reg { + struct virtio_header header; + struct virtio_net_config config_reg; +} __attribute__((packed)); + +// struct iovec +// { +// void *iov_base; /* Pointer to data. */ +// size_t iov_len; /* Length of data. */ +// }; + +struct virtio_vq_info { + u16_t qsize; /* size of this queue (a power of 2) */ + void (*notify)(void *, struct virtio_vq_info *); + /* called instead of notify, if not NULL */ + + u16_t num; /* the num'th queue in the virtio_base */ + + u16_t flags; /* flags (see above) */ + u16_t last_avail; /* a recent value of avail->idx */ + u16_t save_used; /* saved used->idx; see vq_endchains */ + u16_t msix_idx; /* MSI-X index, or VIRTIO_MSI_NO_VECTOR */ + + u32_t pfn; /* PFN of virt queue (not shifted!) */ + + volatile struct vring_desc *desc; + /* descriptor array */ + volatile struct vring_avail *avail; + /* the "avail" ring */ + volatile struct vring_used *used; + /* the "used" ring */ + + u32_t gpa_desc[2]; /* gpa of descriptors */ + u32_t gpa_avail[2]; /* gpa of avail_ring */ + u32_t gpa_used[2]; /* gpa of used_ring */ + int enabled; /* whether the virtqueue is enabled */ + + /* each vq is bounded to a vcpu */ + struct vmrt_vm_vcpu *vcpu; +}; + +/* + * Fixed network header size + */ +struct virtio_net_rxhdr { + u8_t vrh_flags; + u8_t vrh_gso_type; + u16_t vrh_hdr_len; + u16_t vrh_gso_size; + u16_t vrh_csum_start; + u16_t vrh_csum_offset; +} __attribute__((packed)); + +void virtio_net_handler(u16_t port, int dir, int sz, struct vmrt_vm_vcpu *vcpu); +void virtio_net_rcv_one_pkt(void *data, int pkt_len); +void virtio_net_send_one_pkt(void *data, u16_t *pkt_len); diff --git a/src/components/implementation/simple_vmm/noop_nf/devices/vpci/virtio_net_vpci.c b/src/components/implementation/simple_vmm/noop_nf/devices/vpci/virtio_net_vpci.c new file mode 100644 index 0000000000..c1c8846def --- /dev/null +++ b/src/components/implementation/simple_vmm/noop_nf/devices/vpci/virtio_net_vpci.c @@ -0,0 +1,51 @@ +#include "vpci.h" + +#define VIRTIO_VENDOR_ID 0x1AF4 +#define VIRTIO_NETWORK_DEV_ID 0x1000 +#define VIRTIO_CLASS_NETWORK 0x02 +#define VIRTIO_TYPE_NET 1 + +struct vpci_config_type0 virtio_net_dev = { + .header.vendor_id = VIRTIO_VENDOR_ID, + .header.device_id = VIRTIO_NETWORK_DEV_ID, + .header.command = 0, + .header.status = 0, + .header.revision_id = 0, + .header.prog_if = 0, + .header.subclass = 0, + .header.class_code = VIRTIO_CLASS_NETWORK, + .header.cache_line_sz = 0, + .header.latency_timer = 0, + .header.header_type = PCI_HDR_TYPE_DEV, + .header.BIST = 0, + + /* Legacy virtio-net only uses bar 0, and it should be a IO bar, no capability is supported */ + .bars[0].io_bar.fixed_bit = 1, + .bars[0].io_bar.reserved = 0, + .bars[0].io_bar.base_addr = 0x1000, + + + .bars[1].raw_data = 0, + .bars[2].raw_data = 0, + .bars[3].raw_data = 0, + .bars[4].raw_data = 0, + .bars[5].raw_data = 0, + + .cardbus_cis_pointer = 0, + .subsystem_vendor_id = VIRTIO_VENDOR_ID, + .subsystem_id = VIRTIO_TYPE_NET, + .exp_rom_base = 0, + .cap_pointer = 0, + .reserved = 0, + .interrupt_line = 0, + .interrupt_pin = 0, + .min_grant = 0, + .max_lentency = 0 +}; + +void +virtio_net_dev_init(void){ + vpci_regist((struct vpci_config_space *)&virtio_net_dev, sizeof(virtio_net_dev)); + extern void virtio_net_io_init(void); + virtio_net_io_init(); +} diff --git a/src/components/implementation/simple_vmm/noop_nf/devices/vpci/virtio_ring.h b/src/components/implementation/simple_vmm/noop_nf/devices/vpci/virtio_ring.h new file mode 100644 index 0000000000..f03125851b --- /dev/null +++ b/src/components/implementation/simple_vmm/noop_nf/devices/vpci/virtio_ring.h @@ -0,0 +1,260 @@ +#ifndef _LINUX_VIRTIO_RING_H +#define _LINUX_VIRTIO_RING_H +/* An interface for efficient virtio implementation, currently for use by KVM, + * but hopefully others soon. Do NOT change this since it will + * break existing servers and clients. + * + * This header is BSD licensed so anyone can use the definitions to implement + * compatible drivers/servers. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of IBM nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL IBM OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * Copyright Rusty Russell IBM Corporation 2007. */ + +typedef unsigned short int __virtio16; +typedef unsigned int __virtio32; +typedef unsigned long long __virtio64; + +typedef short int __le16; +typedef short int __be16; +typedef unsigned int __le32; +typedef unsigned int __be32; +typedef unsigned long long __le64; +typedef unsigned long long __be64; + +typedef char __s8; +typedef unsigned char __u8; + +typedef short __s16; +typedef unsigned short __u16; + +typedef int __s32; +typedef unsigned int __u32; + +typedef unsigned long int uintptr_t; + +/* This marks a buffer as continuing via the next field. */ +#define VRING_DESC_F_NEXT 1 +/* This marks a buffer as write-only (otherwise read-only). */ +#define VRING_DESC_F_WRITE 2 +/* This means the buffer contains a list of buffer descriptors. */ +#define VRING_DESC_F_INDIRECT 4 + +/* + * Mark a descriptor as available or used in packed ring. + * Notice: they are defined as shifts instead of shifted values. + */ +#define VRING_PACKED_DESC_F_AVAIL 7 +#define VRING_PACKED_DESC_F_USED 15 + +/* The Host uses this in used->flags to advise the Guest: don't kick me when + * you add a buffer. It's unreliable, so it's simply an optimization. Guest + * will still kick if it's out of buffers. */ +#define VRING_USED_F_NO_NOTIFY 1 +/* The Guest uses this in avail->flags to advise the Host: don't interrupt me + * when you consume a buffer. It's unreliable, so it's simply an + * optimization. */ +#define VRING_AVAIL_F_NO_INTERRUPT 1 + +/* Enable events in packed ring. */ +#define VRING_PACKED_EVENT_FLAG_ENABLE 0x0 +/* Disable events in packed ring. */ +#define VRING_PACKED_EVENT_FLAG_DISABLE 0x1 +/* + * Enable events for a specific descriptor in packed ring. + * (as specified by Descriptor Ring Change Event Offset/Wrap Counter). + * Only valid if VIRTIO_RING_F_EVENT_IDX has been negotiated. + */ +#define VRING_PACKED_EVENT_FLAG_DESC 0x2 + +/* + * Wrap counter bit shift in event suppression structure + * of packed ring. + */ +#define VRING_PACKED_EVENT_F_WRAP_CTR 15 + +/* We support indirect buffer descriptors */ +#define VIRTIO_RING_F_INDIRECT_DESC 28 + +/* The Guest publishes the used index for which it expects an interrupt + * at the end of the avail ring. Host should ignore the avail->flags field. */ +/* The Host publishes the avail index for which it expects a kick + * at the end of the used ring. Guest should ignore the used->flags field. */ +#define VIRTIO_RING_F_EVENT_IDX 29 + +/* Alignment requirements for vring elements. + * When using pre-virtio 1.0 layout, these fall out naturally. + */ +#define VRING_AVAIL_ALIGN_SIZE 2 +#define VRING_USED_ALIGN_SIZE 4 +#define VRING_DESC_ALIGN_SIZE 16 + +/* Virtio ring descriptors: 16 bytes. These can chain together via "next". */ +struct vring_desc { + /* Address (guest-physical). */ + __virtio64 addr; + /* Length. */ + __virtio32 len; + /* The flags as indicated above. */ + __virtio16 flags; + /* We chain unused descriptors via this, too */ + __virtio16 next; +}; + +struct vring_avail { + __virtio16 flags; + __virtio16 idx; + __virtio16 ring[]; +}; + +/* u32 is used here for ids for padding reasons. */ +struct vring_used_elem { + /* Index of start of used descriptor chain. */ + __virtio32 id; + /* Total length of the descriptor chain which was used (written to) */ + __virtio32 len; +}; + +typedef struct vring_used_elem __attribute__((aligned(VRING_USED_ALIGN_SIZE))) + vring_used_elem_t; + +struct vring_used { + __virtio16 flags; + __virtio16 idx; + vring_used_elem_t ring[]; +}; + +/* + * The ring element addresses are passed between components with different + * alignments assumptions. Thus, we might need to decrease the compiler-selected + * alignment, and so must use a typedef to make sure the aligned attribute + * actually takes hold: + * + * https://gcc.gnu.org/onlinedocs//gcc/Common-Type-Attributes.html#Common-Type-Attributes + * + * When used on a struct, or struct member, the aligned attribute can only + * increase the alignment; in order to decrease it, the packed attribute must + * be specified as well. When used as part of a typedef, the aligned attribute + * can both increase and decrease alignment, and specifying the packed + * attribute generates a warning. + */ +typedef struct vring_desc __attribute__((aligned(VRING_DESC_ALIGN_SIZE))) + vring_desc_t; +typedef struct vring_avail __attribute__((aligned(VRING_AVAIL_ALIGN_SIZE))) + vring_avail_t; +typedef struct vring_used __attribute__((aligned(VRING_USED_ALIGN_SIZE))) + vring_used_t; + +struct vring { + unsigned int num; + + vring_desc_t *desc; + + vring_avail_t *avail; + + vring_used_t *used; +}; + +#ifndef VIRTIO_RING_NO_LEGACY + +/* The standard layout for the ring is a continuous chunk of memory which looks + * like this. We assume num is a power of 2. + * + * struct vring + * { + * // The actual descriptors (16 bytes each) + * struct vring_desc desc[num]; + * + * // A ring of available descriptor heads with free-running index. + * __virtio16 avail_flags; + * __virtio16 avail_idx; + * __virtio16 available[num]; + * __virtio16 used_event_idx; + * + * // Padding to the next align boundary. + * char pad[]; + * + * // A ring of used descriptor heads with free-running index. + * __virtio16 used_flags; + * __virtio16 used_idx; + * struct vring_used_elem used[num]; + * __virtio16 avail_event_idx; + * }; + */ +/* We publish the used event index at the end of the available ring, and vice + * versa. They are at the end for backwards compatibility. */ +#define vring_used_event(vr) ((vr)->avail->ring[(vr)->num]) +#define vring_avail_event(vr) (*(__virtio16 *)&(vr)->used->ring[(vr)->num]) + +static __inline__ void vring_init(struct vring *vr, unsigned int num, void *p, + unsigned long align) +{ + vr->num = num; + vr->desc = p; + vr->avail = (struct vring_avail *)((char *)p + num * sizeof(struct vring_desc)); + vr->used = (void *)(((uintptr_t)&vr->avail->ring[num] + sizeof(__virtio16) + + align-1) & ~(align - 1)); +} + +static __inline__ unsigned vring_size(unsigned int num, unsigned long align) +{ + return ((sizeof(struct vring_desc) * num + sizeof(__virtio16) * (3 + num) + + align - 1) & ~(align - 1)) + + sizeof(__virtio16) * 3 + sizeof(struct vring_used_elem) * num; +} + +#endif /* VIRTIO_RING_NO_LEGACY */ + +/* The following is used with USED_EVENT_IDX and AVAIL_EVENT_IDX */ +/* Assuming a given event_idx value from the other side, if + * we have just incremented index from old to new_idx, + * should we trigger an event? */ +static __inline__ int vring_need_event(__u16 event_idx, __u16 new_idx, __u16 old) +{ + /* Note: Xen has similar logic for notification hold-off + * in include/xen/interface/io/ring.h with req_event and req_prod + * corresponding to event_idx + 1 and new_idx respectively. + * Note also that req_event and req_prod in Xen start at 1, + * event indexes in virtio start at 0. */ + return (__u16)(new_idx - event_idx - 1) < (__u16)(new_idx - old); +} + +struct vring_packed_desc_event { + /* Descriptor Ring Change Event Offset/Wrap Counter. */ + __le16 off_wrap; + /* Descriptor Ring Change Event Flags. */ + __le16 flags; +}; + +struct vring_packed_desc { + /* Buffer Address. */ + __le64 addr; + /* Buffer Length. */ + __le32 len; + /* Buffer ID. */ + __le16 id; + /* The flags depending on descriptor type. */ + __le16 flags; +}; +#endif /* _LINUX_VIRTIO_RING_H */ diff --git a/src/components/implementation/simple_vmm/noop_nf/devices/vpci/vpci.c b/src/components/implementation/simple_vmm/noop_nf/devices/vpci/vpci.c new file mode 100644 index 0000000000..e1571dc17b --- /dev/null +++ b/src/components/implementation/simple_vmm/noop_nf/devices/vpci/vpci.c @@ -0,0 +1,316 @@ +#include +#include +#include "vpci.h" + +/* Only two are supported: one bridge pci and one virtio-net pci */ +#define MAX_VPCI_NUM 2 + +#define PCI_HOST_BRIDGE_VENDOR 0x8086 +#define PCI_HOST_BRIDGE_DEV 0x29C0 +#define PCI_CLASS_BRIDGE 0x06 +#define PCI_SUBCLASS_BRIDGE_HOST 0x00 + +struct vpci_config_space vpci_devs[MAX_VPCI_NUM]; +static u8_t free_dev = 0; + +struct vpci_config_type1 vpci_host_bridge = { + .header.vendor_id = PCI_HOST_BRIDGE_VENDOR, + .header.device_id = PCI_HOST_BRIDGE_DEV, + .header.command = 0, + .header.status = 0, + .header.revision_id = 0, + .header.prog_if = 0, + .header.subclass = PCI_SUBCLASS_BRIDGE_HOST, + .header.class_code = PCI_CLASS_BRIDGE, + .header.cache_line_sz = 0, + .header.latency_timer = 0, + .header.header_type = PCI_HDR_TYPE_BRIDGE, + .header.BIST = 0, + + .bars[0].raw_data = 0, + .bars[1].raw_data = 0, + + .primary_bus_number = 0, + .secondary_bus_number = 0, + .subordinate_bus_number = 0, + .secondary_latency_timer = 0, + .io_base = 0, + .io_limit = 0, + .secondary_status = 0, + .memory_base = 0, + .memory_limit = 0, + .prefetchable_memory_base = 0, + .prefetchable_memory_limit = 0, + .prefetchable_base_upper_32_bits = 0, + .prefetchable_limit_upper_32_bits = 0, + .io_base_upper_16_bits = 0, + .io_limit_upper_16_bits = 0, + .capability_pointer = 0, + .reserved = 0, + .expansion_rom_base_address = 0, + .interrupt_line = 0, + .interrupt_pin = 0, + .bridge_control = 0 +}; + +void +vpci_regist(struct vpci_config_space *vpci, u32_t sz) +{ + memcpy(&vpci_devs[free_dev++], vpci, sz); +} + +void +set_vpci_comm_hdr(u8_t* raw_data, u8_t reg, u32_t val) +{ + switch (reg) + { + /* TODO: implement necessary pci write emulations */ + case OFFSET_COMMAND: + break; + case OFFSET_CACHE_LINE_SZ: + break; + case OFFSET_LATENCY_TIMER: + break; + case OFFSET_STATUS: + /* Linux writes 0xFFFF to clear errors, thus ignore it */ + break; + default: + printc("trying to write RO reg:0x%x, val:0x%x", reg, val); + assert(0); + } +} + +void +set_vpci_bar(u8_t* raw_data, u8_t reg, u32_t val) +{ + u32_t bar0; + + switch (reg) + { + case OFFSET_BAR0: + bar0 = *(u32_t *)raw_data; + if (bar0 & 0x1) { /* IO bar */ + /* mask all bits that should not be writable */ + val = val & 0xFFFFC000; + val |= 0x1; + *(u32_t *)raw_data = val; + } else { /* Mem bar */ + /* Currently don't support IO bar */ + printc("no vpci bar\n"); + assert(0); + } + + break; + /* Currently only support one bar, other bars are ignored */ + case OFFSET_BAR1: + break; + case OFFSET_BAR2: + break; + case OFFSET_BAR3: + break; + case OFFSET_BAR4: + break; + case OFFSET_BAR5: + break; + default: + printc("trying to write RO reg:0x%x, val:0x%x", reg, val); + assert(0); + } +} + +void +set_vpci_host_bridge_reg(u8_t *raw_data, u8_t reg, u32_t val, u8_t sz) +{ + if (reg < OFFSET_BAR0) { + set_vpci_comm_hdr(raw_data, reg, val); + return; + } + + if (reg < OFFSET_PRIMARY_BUS_NUM) { + /* transparent bridge, ignore the write */ + return; + } + + switch (reg) + { + case OFFSET_PRIMARY_BUS_NUM: + *raw_data = (u8_t) val; + break; + case OFFSET_SECONDARY_BUS_NUMBER: + *raw_data = (u8_t) val; + break; + case OFFSET_SUBORDINATE_BUS_NUMBER: + *raw_data = (u8_t) val; + break; + case OFFSET_SECONDARY_LATENCY_TIMER: + /* Currently ignore this */ + break; + case OFFSET_IO_BASE: + /* this bridge won't support IO base */ + break; + case OFFSET_IO_LIMIT: + /* this bridge won't support IO base */ + assert(0); + break; + case OFFSET_SECONDARY_STATUS: + assert(0); + break; + case OFFSET_MEMORY_BASE: + /* Currently ignore this */ + break; + case OFFSET_MEMORY_LIMIT: + assert(0); + break; + case OFFSET_PREFETCHABLE_MEMORY_BASE: + /* Currently ignore this */ + break; + case OFFSET_PREFETCHABLE_MEMORY_LIMIT: + printc("trying to write RO reg:0x%x, val:0x%x", reg, val); + assert(0); + break; + case OFFSET_PREFETCHABLE_BASE_UPPER_32_BITS: + /* Currently ignore this */ + break; + case OFFSET_PREFETCHABLE_LIMIT_UPPER_32_BITS: + /* Currently ignore this */ + break; + case OFFSET_IO_BASE_UPPER_16_BITS: + /* Currently ignore this */ + break; + case OFFSET_IO_LIMIT_UPPER_16_BITS: + assert(0); + break; + case OFFSET_CAPABILITY_POINTER: + assert(0); + break; + case OFFSET_EXPANSION_ROM_BASE_ADDRESS: + /* Ingore this, we don't support EXP ROM */ + break; + case OFFSET_INTERRUPT_LINE: + assert(0); + break; + case OFFSET_INTERRUPT_PIN: + assert(0); + break; + case OFFSET_BRIDGE_CONTROL: + /* Currently ignore this */ + break; + default: + assert(0); + } +} + +void +set_vpci_dev_reg(u8_t* raw_data, u8_t reg, u32_t val, u8_t sz) +{ + if (reg < OFFSET_BAR0) { + set_vpci_comm_hdr(raw_data, reg, val); + return; + } + + if (reg < OFFSET_CARDBUS_CIS_POINTER) { + set_vpci_bar(raw_data, reg, val); + return; + } + switch (reg) + { + case OFFSET_CARDBUS_CIS_POINTER: + assert(0); + break; + case OFFSET_SUBSYSTEM_VENDOR_ID: + assert(0); + break; + case OFFSET_SUBSYSTEM_ID: + assert(0); + break; + case OFFSET_EXP_ROM_BASE: + /* Currently ignore this */ + break; + case OFFSET_CAP_POINTER: + assert(0); + break; + case OFFSET_RESERVED: + assert(0); + break; + case OFFSET_INTERRUPT_LINE: + assert(0); + break; + case OFFSET_INTERRUPT_PIN: + assert(0); + break; + case OFFSET_MIN_GRANT: + assert(0); + break; + case OFFSET_MAX_LENTENCY: + assert(0); + break; + default: + assert(0); + } +} + +void +set_vpci_reg(u32_t bdf, u32_t val, u8_t idx, u8_t sz) +{ + struct vpci_bdf vbdf; + u8_t index; + struct vpci_config_space *vpci; + u8_t *raw_data; + u8_t reg; + + assert(idx < 4 && sz > 0 && sz < 4); + + memcpy(&vbdf, &bdf, sizeof(vbdf)); + + index = vbdf.bus_num + vbdf.dev_num; + if (vbdf.bus_num > 0 || vbdf.dev_num > 1) return; + + vpci = &vpci_devs[index]; + + raw_data = (u8_t *)(vpci) + vbdf.reg_offset; + + raw_data += idx; + reg = vbdf.reg_offset + idx; + + switch (index) + { + case 0: + /* Process host bridge */ + set_vpci_host_bridge_reg(raw_data, reg, val, sz); + break; + + case 1: + /* Process with device */ + set_vpci_dev_reg(raw_data, reg, val, sz); + break; + default: + assert(0); + } +} + +u32_t +get_vpci_reg(u32_t bdf) +{ + struct vpci_bdf vbdf; + struct vpci_config_space *vpci; + u8_t index; + + memcpy(&vbdf, &bdf, sizeof(vbdf)); + index = vbdf.bus_num + vbdf.dev_num; + + if (vbdf.bus_num > 0 || vbdf.dev_num > 1) return 0XFFFFFFFF; + + vpci = &vpci_devs[index]; + + return *(u32_t *)((char *)(vpci) + vbdf.reg_offset); +} + +extern void virtio_net_dev_init(void); + +static void __attribute__((constructor)) +init(void) +{ + memset(&vpci_devs, 0, sizeof(vpci_devs)); + vpci_regist((struct vpci_config_space *)&vpci_host_bridge, sizeof(vpci_host_bridge)); + virtio_net_dev_init(); +} diff --git a/src/components/implementation/simple_vmm/noop_nf/devices/vpci/vpci.h b/src/components/implementation/simple_vmm/noop_nf/devices/vpci/vpci.h new file mode 100644 index 0000000000..6bfcdf004b --- /dev/null +++ b/src/components/implementation/simple_vmm/noop_nf/devices/vpci/vpci.h @@ -0,0 +1,180 @@ +#pragma once + +#include +#include + +#define VPCI_CONFIG_ADDRESS 0xCF8 +#define VPCI_CONFIG_DATA0 0xCFC +#define VPCI_CONFIG_DATA1 0xCFD +#define VPCI_CONFIG_DATA2 0xCFE +#define VPCI_CONFIG_DATA3 0xCFF +#define VPCI_MECHANISM_CONTROL_REG 0xCFB + +#define VPCI_MAX_CONFIG_SPACE_SZ 256 + +#define OFFSET_VENDOR_ID 0x00 +#define OFFSET_DEVICE_ID 0x02 +#define OFFSET_COMMAND 0x04 +#define OFFSET_STATUS 0x06 +#define OFFSET_REVISION_ID 0x08 +#define OFFSET_PROG_IF 0x09 +#define OFFSET_SUBCLASS 0x0A +#define OFFSET_CLASS_CODE 0x0B +#define OFFSET_CACHE_LINE_SZ 0x0C +#define OFFSET_LATENCY_TIMER 0x0D +#define OFFSET_HEADER 0x0E +#define OFFSET_BIST 0x0F + +#define OFFSET_BAR0 0x10 +#define OFFSET_BAR1 0x14 +#define OFFSET_BAR2 0x18 +#define OFFSET_BAR3 0x1C +#define OFFSET_BAR4 0x20 +#define OFFSET_BAR5 0x24 + +#define OFFSET_PRIMARY_BUS_NUM 0x18 +#define OFFSET_SECONDARY_BUS_NUMBER 0x19 +#define OFFSET_SUBORDINATE_BUS_NUMBER 0x1A +#define OFFSET_SECONDARY_LATENCY_TIMER 0x1B +#define OFFSET_IO_BASE 0x1C +#define OFFSET_IO_LIMIT 0x1D +#define OFFSET_SECONDARY_STATUS 0x1E +#define OFFSET_MEMORY_BASE 0x20 +#define OFFSET_MEMORY_LIMIT 0x22 +#define OFFSET_PREFETCHABLE_MEMORY_BASE 0x24 +#define OFFSET_PREFETCHABLE_MEMORY_LIMIT 0x26 +#define OFFSET_PREFETCHABLE_BASE_UPPER_32_BITS 0x28 +#define OFFSET_PREFETCHABLE_LIMIT_UPPER_32_BITS 0x2C +#define OFFSET_IO_BASE_UPPER_16_BITS 0x30 +#define OFFSET_IO_LIMIT_UPPER_16_BITS 0x32 +#define OFFSET_CAPABILITY_POINTER 0x34 +#define OFFSET_EXPANSION_ROM_BASE_ADDRESS 0x38 +#define OFFSET_INTERRUPT_LINE 0x3C +#define OFFSET_INTERRUPT_PIN 0x3D +#define OFFSET_BRIDGE_CONTROL 0x3E + +#define OFFSET_CARDBUS_CIS_POINTER 0x28 +#define OFFSET_SUBSYSTEM_VENDOR_ID 0x2C +#define OFFSET_SUBSYSTEM_ID 0x2E +#define OFFSET_EXP_ROM_BASE 0x30 +#define OFFSET_CAP_POINTER 0x34 +#define OFFSET_RESERVED 0x38 +#define OFFSET_MIN_GRANT 0x3E +#define OFFSET_MAX_LENTENCY 0x3F + +#define PCI_HDR_TYPE_BRIDGE 0x01 +#define PCI_HDR_TYPE_DEV 0x00 + +struct vpci_common_header { + u16_t vendor_id; + u16_t device_id; + u16_t command; + u16_t status; + u8_t revision_id; + u8_t prog_if; + u8_t subclass; + u8_t class_code; + u8_t cache_line_sz; + u8_t latency_timer; + + union + { + u8_t header_type:7; + u8_t MF:1; + u8_t header; + }; + + union + { + u8_t completion_code:4; + u8_t reserved:2; + u8_t Start_BIST:1; + u8_t BIST_capable:1; + u8_t BIST; + }; +} __attribute__((packed)); + +struct mem_bar { + u32_t fixed_bit:1; + u32_t type:2; + u32_t prefetchable:1; + /* Needs to be 16-byte aligned */ + u32_t base_addr:28; +} __attribute__((packed)); + +struct io_bar { + u32_t fixed_bit:1; + u32_t reserved:1; + /* Needs to be 4-byte aligned */ + u32_t base_addr:30; +} __attribute__((packed)); + +struct vpci_bar { + union + { + u32_t raw_data; + struct mem_bar mem_bar; + struct io_bar io_bar; + }; +} __attribute__((packed)); + +#define PCI_TYPE0_BAR_NUM 6 +#define PCI_TYPE1_BAR_NUM 2 + +struct vpci_config_type0 { + struct vpci_common_header header; + struct vpci_bar bars[PCI_TYPE0_BAR_NUM]; + u32_t cardbus_cis_pointer; + u16_t subsystem_vendor_id; + u16_t subsystem_id; + u32_t exp_rom_base; + u32_t cap_pointer; + u32_t reserved; + u8_t interrupt_line; + u8_t interrupt_pin; + u8_t min_grant; + u8_t max_lentency; +} __attribute__((packed)); + +struct vpci_config_type1 { + struct vpci_common_header header; + struct vpci_bar bars[PCI_TYPE1_BAR_NUM]; + u8_t primary_bus_number; + u8_t secondary_bus_number; + u8_t subordinate_bus_number; + u8_t secondary_latency_timer; + u8_t io_base; + u8_t io_limit; + u16_t secondary_status; + u16_t memory_base; + u16_t memory_limit; + u16_t prefetchable_memory_base; + u16_t prefetchable_memory_limit; + u32_t prefetchable_base_upper_32_bits; + u32_t prefetchable_limit_upper_32_bits; + u16_t io_base_upper_16_bits; + u16_t io_limit_upper_16_bits; + u32_t capability_pointer:8; + u32_t reserved:24; + u32_t expansion_rom_base_address; + u8_t interrupt_line; + u8_t interrupt_pin; + u16_t bridge_control; +} __attribute__((packed)); + +struct vpci_config_space { + struct vpci_common_header header; + char data[VPCI_MAX_CONFIG_SPACE_SZ - sizeof(struct vpci_common_header)]; +} __attribute__((packed)); + +struct vpci_bdf { + u8_t reg_offset; + u8_t func_num:3; + u8_t dev_num:5; + u8_t bus_num; + u8_t resverd:7; + u8_t enable_bit:1; +}; + +void vpci_handler(u16_t port, int dir, int sz, struct vmrt_vm_vcpu *vcpu); +void vpci_regist(struct vpci_config_space *vpci, u32_t sz); diff --git a/src/components/implementation/simple_vmm/noop_nf/devices/vpci/vpci_io.c b/src/components/implementation/simple_vmm/noop_nf/devices/vpci/vpci_io.c new file mode 100644 index 0000000000..98667e1999 --- /dev/null +++ b/src/components/implementation/simple_vmm/noop_nf/devices/vpci/vpci_io.c @@ -0,0 +1,191 @@ +#include +#include +#include +#include "vpci.h" + +static u32_t curr_bdf = 0; + +extern u32_t get_vpci_reg(u32_t bdf); +extern void set_vpci_reg(u32_t bdf, u32_t val, u8_t idx, u8_t sz); + +static void +vpci_outb(u32_t port_id, struct vmrt_vm_vcpu *vcpu) +{ + u8_t val = vcpu->shared_region->ax; + + switch (port_id) + { + case VPCI_MECHANISM_CONTROL_REG: + /* This is the register to configure the PCI access mecanism, we only support type 1 which is commonly used */ + assert(val == 0x1); + break; + case VPCI_CONFIG_DATA0: + set_vpci_reg(curr_bdf, val, 0, 1); + break; + case VPCI_CONFIG_DATA1: + set_vpci_reg(curr_bdf, val, 1, 1); + break; + case VPCI_CONFIG_DATA2: + set_vpci_reg(curr_bdf, val, 2, 1); + break; + case VPCI_CONFIG_DATA3: + set_vpci_reg(curr_bdf, val, 3, 1); + break; + default: + VM_PANIC(vcpu); + break; + } + return; +} + +static void +vpci_inb(u32_t port_id, struct vmrt_vm_vcpu *vcpu) +{ + u32_t bdf = 0; + + switch (port_id) + { + case VPCI_MECHANISM_CONTROL_REG: + vcpu->shared_region->ax = 1; + break; + case VPCI_CONFIG_DATA0: + bdf = get_vpci_reg(curr_bdf); + vcpu->shared_region->ax = (u8_t)bdf; + break; + case VPCI_CONFIG_DATA1: + bdf = get_vpci_reg(curr_bdf); + vcpu->shared_region->ax = (u8_t)(bdf >> 8); + break; + case VPCI_CONFIG_DATA2: + bdf = get_vpci_reg(curr_bdf); + vcpu->shared_region->ax = (u8_t)(bdf >> 16); + break; + case VPCI_CONFIG_DATA3: + bdf = get_vpci_reg(curr_bdf); + vcpu->shared_region->ax = (u8_t)(bdf >> 24); + break; + default: + VM_PANIC(vcpu); + break; + } + + return; +} + +static void +vpci_inw(u32_t port_id, struct vmrt_vm_vcpu *vcpu) +{ + u32_t bdf = 0; + + switch (port_id) + { + case VPCI_CONFIG_DATA0: + bdf = get_vpci_reg(curr_bdf); + vcpu->shared_region->ax = (u16_t)bdf; + break; + case VPCI_CONFIG_DATA2: + bdf = get_vpci_reg(curr_bdf); + vcpu->shared_region->ax = (u16_t)(bdf>>16); + break; + default: + VM_PANIC(vcpu); + break; + } + + return; +} + +static void +vpci_outw(u32_t port_id, struct vmrt_vm_vcpu *vcpu) +{ + u16_t val = vcpu->shared_region->ax; + + switch (port_id) + { + case VPCI_CONFIG_DATA0: + set_vpci_reg(curr_bdf, val, 0, 2); + break; + case VPCI_CONFIG_DATA2: + set_vpci_reg(curr_bdf, val, 2, 2); + break; + default: + VM_PANIC(vcpu); + break; + } + + return; +} + +static void +vpci_outl(u32_t port_id, struct vmrt_vm_vcpu *vcpu) +{ + u32_t val = vcpu->shared_region->ax; + + switch (port_id) + { + case VPCI_CONFIG_ADDRESS: + curr_bdf = val; + break; + case VPCI_CONFIG_DATA0: + set_vpci_reg(curr_bdf, val, 0, 3); + break; + default: + VM_PANIC(vcpu); + break; + } + return; +} + +static u32_t +vpci_inl(u32_t port_id, struct vmrt_vm_vcpu *vcpu) +{ + switch (port_id) + { + case VPCI_CONFIG_DATA0: + vcpu->shared_region->ax = get_vpci_reg(curr_bdf); + break; + case VPCI_CONFIG_ADDRESS: + vcpu->shared_region->ax = curr_bdf; + break; + default: + VM_PANIC(vcpu); + break; + } + return 0; +} + +void +vpci_handler(u16_t port, int dir, int sz, struct vmrt_vm_vcpu *vcpu) +{ + if (dir == IO_IN) { + switch (sz) + { + case IO_BYTE: + vpci_inb(port, vcpu); + break; + case IO_WORD: + vpci_inw(port, vcpu); + break; + case IO_LONG: + vpci_inl(port, vcpu); + break; + default: + VM_PANIC(vcpu); + } + } else { + switch (sz) + { + case IO_BYTE: + vpci_outb(port, vcpu); + break; + case IO_WORD: + vpci_outw(port, vcpu); + break; + case IO_LONG: + vpci_outl(port, vcpu); + break; + default: + VM_PANIC(vcpu); + } + } +} diff --git a/src/components/implementation/simple_vmm/noop_nf/devices/vpic/vpic.c b/src/components/implementation/simple_vmm/noop_nf/devices/vpic/vpic.c new file mode 100644 index 0000000000..f80471d528 --- /dev/null +++ b/src/components/implementation/simple_vmm/noop_nf/devices/vpic/vpic.c @@ -0,0 +1,109 @@ +#include +#include +#include +#include "vpic.h" + +/* TODO: implement necessary functions needed by VM */ +struct chip_8259 { + u8_t master_cmd; + u8_t master_data; + u8_t is_master_init; + u8_t master_offset; + + u8_t slave_cmd; + u8_t slave_data; + u8_t is_slave_init; + u8_t slave_offset; + + u8_t interrupt_pending; +}; + +static struct chip_8259 chip; + +static u8_t pic_elcr1 = 0, pic_elcr2 = 0; + +void +vpic_handler(u16_t port, int dir, int sz, struct vmrt_vm_vcpu *vcpu) +{ + assert(sz == IO_BYTE); + if (dir == IO_IN) { + switch (port) + { + case PIC_MASTER_DATA_PORT: + vcpu->shared_region->ax = chip.master_data; + break; + case PIC_SLAVE_DATA_PORT: + vcpu->shared_region->ax = chip.slave_data; + break; + case PIC_MASTER_CMD_PORT: + vcpu->shared_region->ax = chip.master_cmd; + break; + case PIC_SLAVE_CMD_PORT: + vcpu->shared_region->ax = chip.slave_cmd; + break; + case PIC_ELCR1: + vcpu->shared_region->ax = pic_elcr1; + break; + case PIC_ELCR2: + vcpu->shared_region->ax = pic_elcr2; + break; + default: + printc("vpic_handler: port: 0x%x, dir: %d\n", port, dir); + VM_PANIC(vcpu); + break; + } + } else { + u8_t val = vcpu->shared_region->ax; + switch (port) + { + case PIC_MASTER_CMD_PORT: + chip.master_cmd = val; + if (chip.master_cmd & ICW1_INIT) { + chip.is_master_init = 1; + } + if (chip.master_cmd == PIC_EOI) { + chip.interrupt_pending = 0; + } + break; + case PIC_MASTER_DATA_PORT: + chip.master_data = val; + if (chip.is_master_init) { + chip.master_offset = chip.master_data; + chip.is_master_init = 0; + } + break; + case PIC_SLAVE_CMD_PORT: + chip.slave_cmd = val; + if (chip.slave_cmd & ICW1_INIT) { + chip.is_slave_init = 1; + } + if (chip.slave_cmd == PIC_EOI) { + chip.interrupt_pending = 0; + } + break; + case PIC_SLAVE_DATA_PORT: + chip.slave_data = val; + if (chip.is_slave_init) { + chip.slave_offset = chip.slave_data; + chip.is_slave_init = 0; + } + break; + case PIC_ELCR1: + pic_elcr1 = val; + break; + case PIC_ELCR2: + pic_elcr2 = val; + break; + default: + assert(0); + break; + } + + } +} + +static void __attribute__((constructor)) +init(void) +{ + memset(&chip, 0, sizeof(chip)); +} diff --git a/src/components/implementation/simple_vmm/noop_nf/devices/vpic/vpic.h b/src/components/implementation/simple_vmm/noop_nf/devices/vpic/vpic.h new file mode 100644 index 0000000000..a7001a6b52 --- /dev/null +++ b/src/components/implementation/simple_vmm/noop_nf/devices/vpic/vpic.h @@ -0,0 +1,24 @@ +#pragma once + +#define PIC_MASTER_CMD_PORT 0x20 +#define PIC_MASTER_DATA_PORT 0x21 +#define PIC_SLAVE_CMD_PORT 0XA0 +#define PIC_SLAVE_DATA_PORT 0XA1 + +#define ICW1_ICW4 0x01 +#define ICW1_SINGLE 0x02 +#define ICW1_INTERVAL4 0x04 +#define ICW1_LEVEL 0x08 +#define ICW1_INIT 0x10 + +#define ICW4_8086 0x01 +#define ICW4_AUTO 0x02 +#define ICW4_BUF_SLAVE 0x08 +#define ICW4_BUF_MASTER 0x0C +#define ICW4_SFNM 0x10 + +#define PIC_EOI 0x20 +#define PIC_ELCR1 0x4d0 +#define PIC_ELCR2 0x4d1 + +void vpic_handler(u16_t port, int dir, int sz, struct vmrt_vm_vcpu *vcpu); diff --git a/src/components/implementation/simple_vmm/noop_nf/devices/vps2/vps2.c b/src/components/implementation/simple_vmm/noop_nf/devices/vps2/vps2.c new file mode 100644 index 0000000000..52eb9895b5 --- /dev/null +++ b/src/components/implementation/simple_vmm/noop_nf/devices/vps2/vps2.c @@ -0,0 +1,47 @@ +#include +#include +#include +#include "vps2.h" + +static u8_t ps2_porta_data[0x0F]; +static u8_t ps2_portb_data[0x0F]; + +void +ps2_handler(u16_t port, int dir, int sz, struct vmrt_vm_vcpu *vcpu) +{ + assert(port == PS2_CONTROL_PORT_A || port == PS2_CONTROL_PORT_B); + assert(sz == IO_BYTE); + + if (dir == IO_IN) { + switch (port) + { + case PS2_CONTROL_PORT_A: + vcpu->shared_region->ax = ps2_porta_data[port - 0x90]; + break; + default: + VM_PANIC(vcpu); + break; + } + } else if (dir == IO_OUT) { + switch (port) + { + case PS2_CONTROL_PORT_A: + ps2_porta_data[port - 0x90] = (u8_t)vcpu->shared_region->ax; + break; + default: + VM_PANIC(vcpu); + break; + } + } else { + VM_PANIC(vcpu); + } + + return; +} + +static void __attribute__((constructor)) +init(void) +{ + memset(&ps2_porta_data, 0, sizeof(ps2_porta_data)); + memset(&ps2_portb_data, 0, sizeof(ps2_portb_data)); +} diff --git a/src/components/implementation/simple_vmm/noop_nf/devices/vps2/vps2.h b/src/components/implementation/simple_vmm/noop_nf/devices/vps2/vps2.h new file mode 100644 index 0000000000..971009a319 --- /dev/null +++ b/src/components/implementation/simple_vmm/noop_nf/devices/vps2/vps2.h @@ -0,0 +1,6 @@ +#pragma once + +/* PS/2 system control port A (port B is at 0061) */ +#define PS2_CONTROL_PORT_A 0x92 +#define PS2_CONTROL_PORT_B 0x61 +void ps2_handler(u16_t port, int dir, int sz, struct vmrt_vm_vcpu *vcpu); diff --git a/src/components/implementation/simple_vmm/noop_nf/devices/vrtc/vrtc.c b/src/components/implementation/simple_vmm/noop_nf/devices/vrtc/vrtc.c new file mode 100644 index 0000000000..c971cef94e --- /dev/null +++ b/src/components/implementation/simple_vmm/noop_nf/devices/vrtc/vrtc.c @@ -0,0 +1,58 @@ +#include +#include +#include +#include "vrtc.h" + +/* NOTE: this is just to emulate those data indexed by the CMOS data adress, the functionality of rtc is not fully implemented */ +static u8_t rtc_data_address[0x1A]; +static u8_t curr_data_addr; + +void +vrtc_handler(u16_t port, int dir, int sz, struct vmrt_vm_vcpu *vcpu) +{ + assert(sz == IO_BYTE); + if (dir == IO_IN) { + switch (port) + { + case CMOS_CMD_PORT: + assert(0); + break;; + case CMOS_DATA_PORT: + vcpu->shared_region->ax = rtc_data_address[curr_data_addr]; + break; + default: + assert(0); + break; + } + } else { + u8_t val = vcpu->shared_region->ax; + switch (port) + { + case CMOS_CMD_PORT: + if (val & 0x80) { + printc("NMI disabled\n"); + } else { + printc("NMI enabled\n"); + } + curr_data_addr = val & 0x7f; + if (curr_data_addr == 0x0f) { + printc("shutdown status byte is set now\n"); + } else { + /* NOTE: do nothing and don't include full functionality */ + } + break; + case CMOS_DATA_PORT: + break; + default: + assert(0); + break; + } + + } +} + +static void __attribute__((constructor)) +init(void) +{ + memset(&rtc_data_address, 0, sizeof(rtc_data_address)); +} diff --git a/src/components/implementation/simple_vmm/noop_nf/devices/vrtc/vrtc.h b/src/components/implementation/simple_vmm/noop_nf/devices/vrtc/vrtc.h new file mode 100644 index 0000000000..78074feba9 --- /dev/null +++ b/src/components/implementation/simple_vmm/noop_nf/devices/vrtc/vrtc.h @@ -0,0 +1,7 @@ +#pragma once + +#define CMOS_CMD_PORT 0x70 +#define CMOS_DATA_PORT 0x71 + +void +vrtc_handler(u16_t port, int dir, int sz, struct vmrt_vm_vcpu *vcpu); diff --git a/src/components/implementation/simple_vmm/noop_nf/fast_memcpy.h b/src/components/implementation/simple_vmm/noop_nf/fast_memcpy.h new file mode 100644 index 0000000000..ddd282d4ba --- /dev/null +++ b/src/components/implementation/simple_vmm/noop_nf/fast_memcpy.h @@ -0,0 +1,689 @@ +//===================================================================== +// +// FastMemcpy.c - skywind3000@163.com, 2015 +// +// feature: +// 50% speed up in avg. vs standard memcpy (tested in vc2012/gcc5.1) +// +//===================================================================== +#ifndef __FAST_MEMCPY_H__ +#define __FAST_MEMCPY_H__ + +#include +#include +#include + + +//--------------------------------------------------------------------- +// force inline for compilers +//--------------------------------------------------------------------- +#ifndef INLINE +#ifdef __GNUC__ +#if (__GNUC__ > 3) || ((__GNUC__ == 3) && (__GNUC_MINOR__ >= 1)) + #define INLINE __inline__ __attribute__((always_inline)) +#else + #define INLINE __inline__ +#endif +#elif defined(_MSC_VER) + #define INLINE __forceinline +#elif (defined(__BORLANDC__) || defined(__WATCOMC__)) + #define INLINE __inline +#else + #define INLINE +#endif +#endif + + + +//--------------------------------------------------------------------- +// fast copy for different sizes +//--------------------------------------------------------------------- +static INLINE void memcpy_sse2_16(void *dst, const void *src) { + __m128i m0 = _mm_loadu_si128(((const __m128i*)src) + 0); + _mm_storeu_si128(((__m128i*)dst) + 0, m0); +} + +static INLINE void memcpy_sse2_32(void *dst, const void *src) { + __m128i m0 = _mm_loadu_si128(((const __m128i*)src) + 0); + __m128i m1 = _mm_loadu_si128(((const __m128i*)src) + 1); + _mm_storeu_si128(((__m128i*)dst) + 0, m0); + _mm_storeu_si128(((__m128i*)dst) + 1, m1); +} + +static INLINE void memcpy_sse2_64(void *dst, const void *src) { + __m128i m0 = _mm_loadu_si128(((const __m128i*)src) + 0); + __m128i m1 = _mm_loadu_si128(((const __m128i*)src) + 1); + __m128i m2 = _mm_loadu_si128(((const __m128i*)src) + 2); + __m128i m3 = _mm_loadu_si128(((const __m128i*)src) + 3); + _mm_storeu_si128(((__m128i*)dst) + 0, m0); + _mm_storeu_si128(((__m128i*)dst) + 1, m1); + _mm_storeu_si128(((__m128i*)dst) + 2, m2); + _mm_storeu_si128(((__m128i*)dst) + 3, m3); +} + +static INLINE void memcpy_sse2_128(void *dst, const void *src) { + __m128i m0 = _mm_loadu_si128(((const __m128i*)src) + 0); + __m128i m1 = _mm_loadu_si128(((const __m128i*)src) + 1); + __m128i m2 = _mm_loadu_si128(((const __m128i*)src) + 2); + __m128i m3 = _mm_loadu_si128(((const __m128i*)src) + 3); + __m128i m4 = _mm_loadu_si128(((const __m128i*)src) + 4); + __m128i m5 = _mm_loadu_si128(((const __m128i*)src) + 5); + __m128i m6 = _mm_loadu_si128(((const __m128i*)src) + 6); + __m128i m7 = _mm_loadu_si128(((const __m128i*)src) + 7); + _mm_storeu_si128(((__m128i*)dst) + 0, m0); + _mm_storeu_si128(((__m128i*)dst) + 1, m1); + _mm_storeu_si128(((__m128i*)dst) + 2, m2); + _mm_storeu_si128(((__m128i*)dst) + 3, m3); + _mm_storeu_si128(((__m128i*)dst) + 4, m4); + _mm_storeu_si128(((__m128i*)dst) + 5, m5); + _mm_storeu_si128(((__m128i*)dst) + 6, m6); + _mm_storeu_si128(((__m128i*)dst) + 7, m7); +} + + +//--------------------------------------------------------------------- +// tiny memory copy with jump table optimized +//--------------------------------------------------------------------- +static INLINE void *memcpy_tiny(void *dst, const void *src, size_t size) { + unsigned char *dd = ((unsigned char*)dst) + size; + const unsigned char *ss = ((const unsigned char*)src) + size; + + switch (size) { + case 64: + memcpy_sse2_64(dd - 64, ss - 64); + case 0: + break; + + case 65: + memcpy_sse2_64(dd - 65, ss - 65); + case 1: + dd[-1] = ss[-1]; + break; + + case 66: + memcpy_sse2_64(dd - 66, ss - 66); + case 2: + *((uint16_t*)(dd - 2)) = *((uint16_t*)(ss - 2)); + break; + + case 67: + memcpy_sse2_64(dd - 67, ss - 67); + case 3: + *((uint16_t*)(dd - 3)) = *((uint16_t*)(ss - 3)); + dd[-1] = ss[-1]; + break; + + case 68: + memcpy_sse2_64(dd - 68, ss - 68); + case 4: + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 69: + memcpy_sse2_64(dd - 69, ss - 69); + case 5: + *((uint32_t*)(dd - 5)) = *((uint32_t*)(ss - 5)); + dd[-1] = ss[-1]; + break; + + case 70: + memcpy_sse2_64(dd - 70, ss - 70); + case 6: + *((uint32_t*)(dd - 6)) = *((uint32_t*)(ss - 6)); + *((uint16_t*)(dd - 2)) = *((uint16_t*)(ss - 2)); + break; + + case 71: + memcpy_sse2_64(dd - 71, ss - 71); + case 7: + *((uint32_t*)(dd - 7)) = *((uint32_t*)(ss - 7)); + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 72: + memcpy_sse2_64(dd - 72, ss - 72); + case 8: + *((uint64_t*)(dd - 8)) = *((uint64_t*)(ss - 8)); + break; + + case 73: + memcpy_sse2_64(dd - 73, ss - 73); + case 9: + *((uint64_t*)(dd - 9)) = *((uint64_t*)(ss - 9)); + dd[-1] = ss[-1]; + break; + + case 74: + memcpy_sse2_64(dd - 74, ss - 74); + case 10: + *((uint64_t*)(dd - 10)) = *((uint64_t*)(ss - 10)); + *((uint16_t*)(dd - 2)) = *((uint16_t*)(ss - 2)); + break; + + case 75: + memcpy_sse2_64(dd - 75, ss - 75); + case 11: + *((uint64_t*)(dd - 11)) = *((uint64_t*)(ss - 11)); + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 76: + memcpy_sse2_64(dd - 76, ss - 76); + case 12: + *((uint64_t*)(dd - 12)) = *((uint64_t*)(ss - 12)); + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 77: + memcpy_sse2_64(dd - 77, ss - 77); + case 13: + *((uint64_t*)(dd - 13)) = *((uint64_t*)(ss - 13)); + *((uint32_t*)(dd - 5)) = *((uint32_t*)(ss - 5)); + dd[-1] = ss[-1]; + break; + + case 78: + memcpy_sse2_64(dd - 78, ss - 78); + case 14: + *((uint64_t*)(dd - 14)) = *((uint64_t*)(ss - 14)); + *((uint64_t*)(dd - 8)) = *((uint64_t*)(ss - 8)); + break; + + case 79: + memcpy_sse2_64(dd - 79, ss - 79); + case 15: + *((uint64_t*)(dd - 15)) = *((uint64_t*)(ss - 15)); + *((uint64_t*)(dd - 8)) = *((uint64_t*)(ss - 8)); + break; + + case 80: + memcpy_sse2_64(dd - 80, ss - 80); + case 16: + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 81: + memcpy_sse2_64(dd - 81, ss - 81); + case 17: + memcpy_sse2_16(dd - 17, ss - 17); + dd[-1] = ss[-1]; + break; + + case 82: + memcpy_sse2_64(dd - 82, ss - 82); + case 18: + memcpy_sse2_16(dd - 18, ss - 18); + *((uint16_t*)(dd - 2)) = *((uint16_t*)(ss - 2)); + break; + + case 83: + memcpy_sse2_64(dd - 83, ss - 83); + case 19: + memcpy_sse2_16(dd - 19, ss - 19); + *((uint16_t*)(dd - 3)) = *((uint16_t*)(ss - 3)); + dd[-1] = ss[-1]; + break; + + case 84: + memcpy_sse2_64(dd - 84, ss - 84); + case 20: + memcpy_sse2_16(dd - 20, ss - 20); + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 85: + memcpy_sse2_64(dd - 85, ss - 85); + case 21: + memcpy_sse2_16(dd - 21, ss - 21); + *((uint32_t*)(dd - 5)) = *((uint32_t*)(ss - 5)); + dd[-1] = ss[-1]; + break; + + case 86: + memcpy_sse2_64(dd - 86, ss - 86); + case 22: + memcpy_sse2_16(dd - 22, ss - 22); + *((uint32_t*)(dd - 6)) = *((uint32_t*)(ss - 6)); + *((uint16_t*)(dd - 2)) = *((uint16_t*)(ss - 2)); + break; + + case 87: + memcpy_sse2_64(dd - 87, ss - 87); + case 23: + memcpy_sse2_16(dd - 23, ss - 23); + *((uint32_t*)(dd - 7)) = *((uint32_t*)(ss - 7)); + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 88: + memcpy_sse2_64(dd - 88, ss - 88); + case 24: + memcpy_sse2_16(dd - 24, ss - 24); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 89: + memcpy_sse2_64(dd - 89, ss - 89); + case 25: + memcpy_sse2_16(dd - 25, ss - 25); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 90: + memcpy_sse2_64(dd - 90, ss - 90); + case 26: + memcpy_sse2_16(dd - 26, ss - 26); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 91: + memcpy_sse2_64(dd - 91, ss - 91); + case 27: + memcpy_sse2_16(dd - 27, ss - 27); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 92: + memcpy_sse2_64(dd - 92, ss - 92); + case 28: + memcpy_sse2_16(dd - 28, ss - 28); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 93: + memcpy_sse2_64(dd - 93, ss - 93); + case 29: + memcpy_sse2_16(dd - 29, ss - 29); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 94: + memcpy_sse2_64(dd - 94, ss - 94); + case 30: + memcpy_sse2_16(dd - 30, ss - 30); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 95: + memcpy_sse2_64(dd - 95, ss - 95); + case 31: + memcpy_sse2_16(dd - 31, ss - 31); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 96: + memcpy_sse2_64(dd - 96, ss - 96); + case 32: + memcpy_sse2_32(dd - 32, ss - 32); + break; + + case 97: + memcpy_sse2_64(dd - 97, ss - 97); + case 33: + memcpy_sse2_32(dd - 33, ss - 33); + dd[-1] = ss[-1]; + break; + + case 98: + memcpy_sse2_64(dd - 98, ss - 98); + case 34: + memcpy_sse2_32(dd - 34, ss - 34); + *((uint16_t*)(dd - 2)) = *((uint16_t*)(ss - 2)); + break; + + case 99: + memcpy_sse2_64(dd - 99, ss - 99); + case 35: + memcpy_sse2_32(dd - 35, ss - 35); + *((uint16_t*)(dd - 3)) = *((uint16_t*)(ss - 3)); + dd[-1] = ss[-1]; + break; + + case 100: + memcpy_sse2_64(dd - 100, ss - 100); + case 36: + memcpy_sse2_32(dd - 36, ss - 36); + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 101: + memcpy_sse2_64(dd - 101, ss - 101); + case 37: + memcpy_sse2_32(dd - 37, ss - 37); + *((uint32_t*)(dd - 5)) = *((uint32_t*)(ss - 5)); + dd[-1] = ss[-1]; + break; + + case 102: + memcpy_sse2_64(dd - 102, ss - 102); + case 38: + memcpy_sse2_32(dd - 38, ss - 38); + *((uint32_t*)(dd - 6)) = *((uint32_t*)(ss - 6)); + *((uint16_t*)(dd - 2)) = *((uint16_t*)(ss - 2)); + break; + + case 103: + memcpy_sse2_64(dd - 103, ss - 103); + case 39: + memcpy_sse2_32(dd - 39, ss - 39); + *((uint32_t*)(dd - 7)) = *((uint32_t*)(ss - 7)); + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 104: + memcpy_sse2_64(dd - 104, ss - 104); + case 40: + memcpy_sse2_32(dd - 40, ss - 40); + *((uint64_t*)(dd - 8)) = *((uint64_t*)(ss - 8)); + break; + + case 105: + memcpy_sse2_64(dd - 105, ss - 105); + case 41: + memcpy_sse2_32(dd - 41, ss - 41); + *((uint64_t*)(dd - 9)) = *((uint64_t*)(ss - 9)); + dd[-1] = ss[-1]; + break; + + case 106: + memcpy_sse2_64(dd - 106, ss - 106); + case 42: + memcpy_sse2_32(dd - 42, ss - 42); + *((uint64_t*)(dd - 10)) = *((uint64_t*)(ss - 10)); + *((uint16_t*)(dd - 2)) = *((uint16_t*)(ss - 2)); + break; + + case 107: + memcpy_sse2_64(dd - 107, ss - 107); + case 43: + memcpy_sse2_32(dd - 43, ss - 43); + *((uint64_t*)(dd - 11)) = *((uint64_t*)(ss - 11)); + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 108: + memcpy_sse2_64(dd - 108, ss - 108); + case 44: + memcpy_sse2_32(dd - 44, ss - 44); + *((uint64_t*)(dd - 12)) = *((uint64_t*)(ss - 12)); + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 109: + memcpy_sse2_64(dd - 109, ss - 109); + case 45: + memcpy_sse2_32(dd - 45, ss - 45); + *((uint64_t*)(dd - 13)) = *((uint64_t*)(ss - 13)); + *((uint32_t*)(dd - 5)) = *((uint32_t*)(ss - 5)); + dd[-1] = ss[-1]; + break; + + case 110: + memcpy_sse2_64(dd - 110, ss - 110); + case 46: + memcpy_sse2_32(dd - 46, ss - 46); + *((uint64_t*)(dd - 14)) = *((uint64_t*)(ss - 14)); + *((uint64_t*)(dd - 8)) = *((uint64_t*)(ss - 8)); + break; + + case 111: + memcpy_sse2_64(dd - 111, ss - 111); + case 47: + memcpy_sse2_32(dd - 47, ss - 47); + *((uint64_t*)(dd - 15)) = *((uint64_t*)(ss - 15)); + *((uint64_t*)(dd - 8)) = *((uint64_t*)(ss - 8)); + break; + + case 112: + memcpy_sse2_64(dd - 112, ss - 112); + case 48: + memcpy_sse2_32(dd - 48, ss - 48); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 113: + memcpy_sse2_64(dd - 113, ss - 113); + case 49: + memcpy_sse2_32(dd - 49, ss - 49); + memcpy_sse2_16(dd - 17, ss - 17); + dd[-1] = ss[-1]; + break; + + case 114: + memcpy_sse2_64(dd - 114, ss - 114); + case 50: + memcpy_sse2_32(dd - 50, ss - 50); + memcpy_sse2_16(dd - 18, ss - 18); + *((uint16_t*)(dd - 2)) = *((uint16_t*)(ss - 2)); + break; + + case 115: + memcpy_sse2_64(dd - 115, ss - 115); + case 51: + memcpy_sse2_32(dd - 51, ss - 51); + memcpy_sse2_16(dd - 19, ss - 19); + *((uint16_t*)(dd - 3)) = *((uint16_t*)(ss - 3)); + dd[-1] = ss[-1]; + break; + + case 116: + memcpy_sse2_64(dd - 116, ss - 116); + case 52: + memcpy_sse2_32(dd - 52, ss - 52); + memcpy_sse2_16(dd - 20, ss - 20); + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 117: + memcpy_sse2_64(dd - 117, ss - 117); + case 53: + memcpy_sse2_32(dd - 53, ss - 53); + memcpy_sse2_16(dd - 21, ss - 21); + *((uint32_t*)(dd - 5)) = *((uint32_t*)(ss - 5)); + dd[-1] = ss[-1]; + break; + + case 118: + memcpy_sse2_64(dd - 118, ss - 118); + case 54: + memcpy_sse2_32(dd - 54, ss - 54); + memcpy_sse2_16(dd - 22, ss - 22); + *((uint32_t*)(dd - 6)) = *((uint32_t*)(ss - 6)); + *((uint16_t*)(dd - 2)) = *((uint16_t*)(ss - 2)); + break; + + case 119: + memcpy_sse2_64(dd - 119, ss - 119); + case 55: + memcpy_sse2_32(dd - 55, ss - 55); + memcpy_sse2_16(dd - 23, ss - 23); + *((uint32_t*)(dd - 7)) = *((uint32_t*)(ss - 7)); + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 120: + memcpy_sse2_64(dd - 120, ss - 120); + case 56: + memcpy_sse2_32(dd - 56, ss - 56); + memcpy_sse2_16(dd - 24, ss - 24); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 121: + memcpy_sse2_64(dd - 121, ss - 121); + case 57: + memcpy_sse2_32(dd - 57, ss - 57); + memcpy_sse2_16(dd - 25, ss - 25); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 122: + memcpy_sse2_64(dd - 122, ss - 122); + case 58: + memcpy_sse2_32(dd - 58, ss - 58); + memcpy_sse2_16(dd - 26, ss - 26); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 123: + memcpy_sse2_64(dd - 123, ss - 123); + case 59: + memcpy_sse2_32(dd - 59, ss - 59); + memcpy_sse2_16(dd - 27, ss - 27); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 124: + memcpy_sse2_64(dd - 124, ss - 124); + case 60: + memcpy_sse2_32(dd - 60, ss - 60); + memcpy_sse2_16(dd - 28, ss - 28); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 125: + memcpy_sse2_64(dd - 125, ss - 125); + case 61: + memcpy_sse2_32(dd - 61, ss - 61); + memcpy_sse2_16(dd - 29, ss - 29); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 126: + memcpy_sse2_64(dd - 126, ss - 126); + case 62: + memcpy_sse2_32(dd - 62, ss - 62); + memcpy_sse2_16(dd - 30, ss - 30); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 127: + memcpy_sse2_64(dd - 127, ss - 127); + case 63: + memcpy_sse2_32(dd - 63, ss - 63); + memcpy_sse2_16(dd - 31, ss - 31); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 128: + memcpy_sse2_128(dd - 128, ss - 128); + break; + } + + return dst; +} + + +//--------------------------------------------------------------------- +// main routine +//--------------------------------------------------------------------- +static void* memcpy_fast(void *destination, const void *source, size_t size) +{ + unsigned char *dst = (unsigned char*)destination; + const unsigned char *src = (const unsigned char*)source; + static size_t cachesize = 0x200000; // L2-cache size + size_t padding; + + // small memory copy + if (size <= 128) { + return memcpy_tiny(dst, src, size); + } + + // align destination to 16 bytes boundary + padding = (16 - (((size_t)dst) & 15)) & 15; + + if (padding > 0) { + __m128i head = _mm_loadu_si128((const __m128i*)src); + _mm_storeu_si128((__m128i*)dst, head); + dst += padding; + src += padding; + size -= padding; + } + + // medium size copy + if (size <= cachesize) { + __m128i c0, c1, c2, c3, c4, c5, c6, c7; + + for (; size >= 128; size -= 128) { + c0 = _mm_loadu_si128(((const __m128i*)src) + 0); + c1 = _mm_loadu_si128(((const __m128i*)src) + 1); + c2 = _mm_loadu_si128(((const __m128i*)src) + 2); + c3 = _mm_loadu_si128(((const __m128i*)src) + 3); + c4 = _mm_loadu_si128(((const __m128i*)src) + 4); + c5 = _mm_loadu_si128(((const __m128i*)src) + 5); + c6 = _mm_loadu_si128(((const __m128i*)src) + 6); + c7 = _mm_loadu_si128(((const __m128i*)src) + 7); + _mm_prefetch((const char*)(src + 256), _MM_HINT_NTA); + src += 128; + _mm_store_si128((((__m128i*)dst) + 0), c0); + _mm_store_si128((((__m128i*)dst) + 1), c1); + _mm_store_si128((((__m128i*)dst) + 2), c2); + _mm_store_si128((((__m128i*)dst) + 3), c3); + _mm_store_si128((((__m128i*)dst) + 4), c4); + _mm_store_si128((((__m128i*)dst) + 5), c5); + _mm_store_si128((((__m128i*)dst) + 6), c6); + _mm_store_si128((((__m128i*)dst) + 7), c7); + dst += 128; + } + } + else { // big memory copy + __m128i c0, c1, c2, c3, c4, c5, c6, c7; + + _mm_prefetch((const char*)(src), _MM_HINT_NTA); + + if ((((size_t)src) & 15) == 0) { // source aligned + for (; size >= 128; size -= 128) { + c0 = _mm_load_si128(((const __m128i*)src) + 0); + c1 = _mm_load_si128(((const __m128i*)src) + 1); + c2 = _mm_load_si128(((const __m128i*)src) + 2); + c3 = _mm_load_si128(((const __m128i*)src) + 3); + c4 = _mm_load_si128(((const __m128i*)src) + 4); + c5 = _mm_load_si128(((const __m128i*)src) + 5); + c6 = _mm_load_si128(((const __m128i*)src) + 6); + c7 = _mm_load_si128(((const __m128i*)src) + 7); + _mm_prefetch((const char*)(src + 256), _MM_HINT_NTA); + src += 128; + _mm_stream_si128((((__m128i*)dst) + 0), c0); + _mm_stream_si128((((__m128i*)dst) + 1), c1); + _mm_stream_si128((((__m128i*)dst) + 2), c2); + _mm_stream_si128((((__m128i*)dst) + 3), c3); + _mm_stream_si128((((__m128i*)dst) + 4), c4); + _mm_stream_si128((((__m128i*)dst) + 5), c5); + _mm_stream_si128((((__m128i*)dst) + 6), c6); + _mm_stream_si128((((__m128i*)dst) + 7), c7); + dst += 128; + } + } + else { // source unaligned + for (; size >= 128; size -= 128) { + c0 = _mm_loadu_si128(((const __m128i*)src) + 0); + c1 = _mm_loadu_si128(((const __m128i*)src) + 1); + c2 = _mm_loadu_si128(((const __m128i*)src) + 2); + c3 = _mm_loadu_si128(((const __m128i*)src) + 3); + c4 = _mm_loadu_si128(((const __m128i*)src) + 4); + c5 = _mm_loadu_si128(((const __m128i*)src) + 5); + c6 = _mm_loadu_si128(((const __m128i*)src) + 6); + c7 = _mm_loadu_si128(((const __m128i*)src) + 7); + _mm_prefetch((const char*)(src + 256), _MM_HINT_NTA); + src += 128; + _mm_stream_si128((((__m128i*)dst) + 0), c0); + _mm_stream_si128((((__m128i*)dst) + 1), c1); + _mm_stream_si128((((__m128i*)dst) + 2), c2); + _mm_stream_si128((((__m128i*)dst) + 3), c3); + _mm_stream_si128((((__m128i*)dst) + 4), c4); + _mm_stream_si128((((__m128i*)dst) + 5), c5); + _mm_stream_si128((((__m128i*)dst) + 6), c6); + _mm_stream_si128((((__m128i*)dst) + 7), c7); + dst += 128; + } + } + _mm_sfence(); + } + + memcpy_tiny(dst, src, size); + + return destination; +} + + +#endif diff --git a/src/components/implementation/simple_vmm/noop_nf/guest/.gitignore b/src/components/implementation/simple_vmm/noop_nf/guest/.gitignore new file mode 100644 index 0000000000..4a60f24ce6 --- /dev/null +++ b/src/components/implementation/simple_vmm/noop_nf/guest/.gitignore @@ -0,0 +1,2 @@ +*.elf +*.map \ No newline at end of file diff --git a/src/components/implementation/simple_vmm/noop_nf/guest/Makefile b/src/components/implementation/simple_vmm/noop_nf/guest/Makefile new file mode 100644 index 0000000000..0228863f04 --- /dev/null +++ b/src/components/implementation/simple_vmm/noop_nf/guest/Makefile @@ -0,0 +1,47 @@ +CC := gcc -m64 +LD := ld -m elf_x86_64 --nmagic +AS := as --64 -g + +CFLAGS := -g -O0 -ffreestanding -Wno-unused-function -Wno-unused-variable -Wno-unused-but-set-variable -nostdinc -nostdlib -fno-pic -mno-red-zone -mcmodel=large -mno-sse -mno-sse2 -mgeneral-regs-only +LDFLAGS := -nostdlib -fno-builtin -nostartfiles -nostdinc -nodefaultlibs + +GUEST_ELF = guest.elf +GUEST_IMG = guest.img +GUEST_MAP = guest.map + +AS_FILES = guest_realmode.S +AS_OBJS = $(patsubst %.S,%.o,$(AS_FILES)) + +WARNINGS += -Wall +WARNINGS += -Wcast-align +WARNINGS += -Wformat=2 +WARNINGS += -Winit-self +WARNINGS += -Wnested-externs +WARNINGS += -Wno-system-headers +WARNINGS += -Wold-style-definition +WARNINGS += -Wredundant-decls +WARNINGS += -Wsign-compare +WARNINGS += -Wstrict-prototypes +WARNINGS += -Wundef +WARNINGS += -Wvolatile-register-var +WARNINGS += -Wwrite-strings +WARNINGS += -Wno-address-of-packed-member + +CFLAGS += $(WARNINGS) + +all: $(GUEST_IMG) + +%.o: %.S + $(CC) $(CFLAGS) -I. -o $@ -c $< + +$(GUEST_IMG):$(GUEST_ELF) + @echo "[CT] $@" + @cp $< $@ + @objcopy $@ -O binary + +$(GUEST_ELF):$(AS_OBJS) + @echo "[LD] $@" + $(LD) $(LDPARAMS) -static -Map=$(GUEST_MAP) -T guest.ld -o $(GUEST_ELF) $(AS_OBJS) + +clean: + @rm -f $(GUEST_ELF) $(GUEST_IMG) $(GUEST_MAP) *.o \ No newline at end of file diff --git a/src/components/implementation/simple_vmm/noop_nf/guest/guest.ld b/src/components/implementation/simple_vmm/noop_nf/guest/guest.ld new file mode 100644 index 0000000000..07f9206c1f --- /dev/null +++ b/src/components/implementation/simple_vmm/noop_nf/guest/guest.ld @@ -0,0 +1,34 @@ +ENTRY(guest_real_mode_entry) +OUTPUT_FORMAT(elf64-x86-64) +OUTPUT_ARCH(i386:x86-64) + + +SECTIONS +{ + . = 0x1000; + + .text BLOCK(4K) : ALIGN(4K) + { + *(.guest_kernel_initfn*) + *(.text*) + *(.rodata*) + } + + .data BLOCK(4K) : ALIGN(4K) + { + KEEP(*( .init_array )); + KEEP(*(SORT_BY_INIT_PRIORITY( .init_array.* ))); + *(.data*) + } + + .bss BLOCK(4K) : ALIGN(4K) + { + *(.bss*) + } + + /DISCARD/ : + { + *(.fini_array*) + *(.comment*) + } +} diff --git a/src/components/implementation/simple_vmm/noop_nf/guest/guest_realmode.S b/src/components/implementation/simple_vmm/noop_nf/guest/guest_realmode.S new file mode 100644 index 0000000000..ac2e2ec0a7 --- /dev/null +++ b/src/components/implementation/simple_vmm/noop_nf/guest/guest_realmode.S @@ -0,0 +1,60 @@ +#define SEG_NULLASM \ + .word 0, 0; \ + .byte 0, 0, 0, 0 +#define SEG_ASM(type,base,lim) \ + .word (((lim) >> 12) & 0xffff), ((base) & 0xffff); \ + .byte (((base) >> 16) & 0xff), (0x90 | (type)), \ + (0xC0 | (((lim) >> 28) & 0xf)), (((base) >> 24) & 0xff) + +#define STA_X 0x8 // Executable segment +#define STA_E 0x4 // Expand down (non-executable segments) +#define STA_C 0x4 // Conforming code segment (executable only) +#define STA_W 0x2 // Writeable (non-executable segments) +#define STA_R 0x2 // Readable (executable segments) +#define STA_A 0x1 // Accessed + +#define CR0_PE 0x00000001 // Protection Enable +#define CR0_WP 0x00010000 // Write Protect +#define CR0_PG 0x80000000 // Paging + +#define SEL_KCSEG 0x08 /* Kernel code selector. */ +#define SEL_KDSEG 0x10 /* Kernel data selector. */ + +.global guest_real_mode_entry +/* code start entry */ +.section .guest_kernel_initfn +.code16 +guest_real_mode_entry: + ljmp $0x0, $start + +start: + cli + lgdt smpgdtdesc + movl %cr0, %eax + orl $CR0_PE, %eax + movl %eax, %cr0 + ljmpl $(SEL_KCSEG), $smpstart32 +.align 0x10 +.code32 +smpstart32: + movw $(SEL_KDSEG), %ax + movw %ax, %ds + movw %ax, %es + movw %ax, %ss + movw $0, %ax + movw %ax, %fs + movw %ax, %gs + + /* jmp to vmlinux bootloader at the specific address */ + ljmpl $(SEL_KCSEG), $0x100000 + jmp . + +.p2align 2 +smpgdt: + SEG_NULLASM + SEG_ASM(STA_X|STA_R, 0, 0xffffffff) /* code segment for protected mode, mapping 0-4G memory */ + SEG_ASM(STA_W, 0, 0xffffffff) /* data segment for protected mode, mapping 0-4G memory */ + +smpgdtdesc: + .word (smpgdtdesc - smpgdt - 1) + .long smpgdt diff --git a/src/components/implementation/simple_vmm/noop_nf/instr_emul.c b/src/components/implementation/simple_vmm/noop_nf/instr_emul.c new file mode 100644 index 0000000000..230a0a9bdf --- /dev/null +++ b/src/components/implementation/simple_vmm/noop_nf/instr_emul.c @@ -0,0 +1,1381 @@ +/*- + * Copyright (c) 2012 Sandvine, Inc. + * Copyright (c) 2012 NetApp, Inc. + * Copyright (c) 2017-2022 Intel Corporation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#include +#include + +#include + +#define CPU_REG_FIRST CPU_REG_RAX +#define CPU_REG_LAST CPU_REG_GDTR +#define CPU_REG_GENERAL_FIRST CPU_REG_RAX +#define CPU_REG_GENERAL_LAST CPU_REG_R15 +#define CPU_REG_NONGENERAL_FIRST CPU_REG_CR0 +#define CPU_REG_NONGENERAL_LAST CPU_REG_GDTR +#define CPU_REG_NATURAL_FIRST CPU_REG_CR0 +#define CPU_REG_NATURAL_LAST CPU_REG_RFLAGS +#define CPU_REG_64BIT_FIRST CPU_REG_EFER +#define CPU_REG_64BIT_LAST CPU_REG_PDPTE3 +#define CPU_REG_SEG_FIRST CPU_REG_ES +#define CPU_REG_SEG_LAST CPU_REG_GS + +#define PSL_C 0x00000001U /* carry bit */ +#define PSL_PF 0x00000004U /* parity bit */ +#define PSL_AF 0x00000010U /* bcd carry bit */ +#define PSL_Z 0x00000040U /* zero bit */ +#define PSL_N 0x00000080U /* negative bit */ +#define PSL_D 0x00000400U /* string instruction direction bit */ +#define PSL_V 0x00000800U /* overflow bit */ +#define PSL_AC 0x00040000U /* alignment checking */ + +/* + * Protections are chosen from these bits, or-ed together + */ +#define PROT_READ 0x01U /* pages can be read */ +#define PROT_WRITE 0x02U /* pages can be written */ + +/* struct vie_op.op_type */ +#define VIE_OP_TYPE_NONE 0U +#define VIE_OP_TYPE_MOV 1U +#define VIE_OP_TYPE_MOVSX 2U +#define VIE_OP_TYPE_MOVZX 3U +#define VIE_OP_TYPE_AND 4U +#define VIE_OP_TYPE_OR 5U +#define VIE_OP_TYPE_SUB 6U +#define VIE_OP_TYPE_TWO_BYTE 7U +#define VIE_OP_TYPE_PUSH 8U +#define VIE_OP_TYPE_CMP 9U +#define VIE_OP_TYPE_POP 10U +#define VIE_OP_TYPE_MOVS 11U +#define VIE_OP_TYPE_GROUP1 12U +#define VIE_OP_TYPE_STOS 13U +#define VIE_OP_TYPE_BITTEST 14U +#define VIE_OP_TYPE_TEST 15U +#define VIE_OP_TYPE_XCHG 16U + +/* struct vie_op.op_flags */ +#define VIE_OP_F_IMM (1U << 0U) /* 16/32-bit immediate operand */ +#define VIE_OP_F_IMM8 (1U << 1U) /* 8-bit immediate operand */ +#define VIE_OP_F_MOFFSET (1U << 2U) /* 16/32/64-bit immediate moffset */ +#define VIE_OP_F_NO_MODRM (1U << 3U) +#define VIE_OP_F_CHECK_GVA_DI (1U << 4U) /* for movs, need to check DI */ +/* + * The VIE_OP_F_BYTE_OP only set when the instruction support + * Encoding of Operand Size (w) Bit and the w bit of opcode is 0. + * according B.2 GENERAL-PURPOSE INSTRUCTION FORMATS AND ENCODINGS + * FOR NON-64-BIT MODES, Vol 2, Intel SDM. + */ +#define VIE_OP_F_BYTE_OP (1U << 5U) /* 8-bit operands. */ +#define VIE_OP_F_WORD_OP (1U << 6U) /* 16-bit operands. */ + +static const struct instr_emul_vie_op two_byte_opcodes[256] = { + [0xB6] = { + .op_type = VIE_OP_TYPE_MOVZX, + .op_flags = VIE_OP_F_BYTE_OP, + }, + [0xB7] = { + .op_type = VIE_OP_TYPE_MOVZX, + .op_flags = VIE_OP_F_WORD_OP, + }, + [0xBA] = { + .op_type = VIE_OP_TYPE_BITTEST, + .op_flags = VIE_OP_F_IMM8, + }, + [0xBE] = { + .op_type = VIE_OP_TYPE_MOVSX, + .op_flags = VIE_OP_F_BYTE_OP, + }, +}; + +static const struct instr_emul_vie_op one_byte_opcodes[256] = { + [0x0F] = { + .op_type = VIE_OP_TYPE_TWO_BYTE + }, + [0x2B] = { + .op_type = VIE_OP_TYPE_SUB, + }, + [0x39] = { + .op_type = VIE_OP_TYPE_CMP, + }, + [0x3B] = { + .op_type = VIE_OP_TYPE_CMP, + }, + [0x88] = { + .op_type = VIE_OP_TYPE_MOV, + .op_flags = VIE_OP_F_BYTE_OP, + }, + [0x89] = { + .op_type = VIE_OP_TYPE_MOV, + }, + [0x8A] = { + .op_type = VIE_OP_TYPE_MOV, + .op_flags = VIE_OP_F_BYTE_OP, + }, + [0x8B] = { + .op_type = VIE_OP_TYPE_MOV, + }, + [0xA1] = { + .op_type = VIE_OP_TYPE_MOV, + .op_flags = VIE_OP_F_MOFFSET | VIE_OP_F_NO_MODRM, + }, + [0xA3] = { + .op_type = VIE_OP_TYPE_MOV, + .op_flags = VIE_OP_F_MOFFSET | VIE_OP_F_NO_MODRM, + }, + [0xA4] = { + .op_type = VIE_OP_TYPE_MOVS, + .op_flags = VIE_OP_F_NO_MODRM | VIE_OP_F_CHECK_GVA_DI | VIE_OP_F_BYTE_OP, + }, + [0xA5] = { + .op_type = VIE_OP_TYPE_MOVS, + .op_flags = VIE_OP_F_NO_MODRM | VIE_OP_F_CHECK_GVA_DI, + }, + [0xAA] = { + .op_type = VIE_OP_TYPE_STOS, + .op_flags = VIE_OP_F_NO_MODRM | VIE_OP_F_BYTE_OP, + }, + [0xAB] = { + .op_type = VIE_OP_TYPE_STOS, + .op_flags = VIE_OP_F_NO_MODRM + }, + [0xC6] = { + /* XXX Group 11 extended opcode - not just MOV */ + .op_type = VIE_OP_TYPE_MOV, + .op_flags = VIE_OP_F_IMM8 | VIE_OP_F_BYTE_OP, + }, + [0xC7] = { + .op_type = VIE_OP_TYPE_MOV, + .op_flags = VIE_OP_F_IMM, + }, + [0x23] = { + .op_type = VIE_OP_TYPE_AND, + }, + [0x80] = { + /* Group 1 extended opcode */ + .op_type = VIE_OP_TYPE_GROUP1, + .op_flags = VIE_OP_F_IMM8, + }, + [0x81] = { + /* Group 1 extended opcode */ + .op_type = VIE_OP_TYPE_GROUP1, + .op_flags = VIE_OP_F_IMM, + }, + [0x83] = { + /* Group 1 extended opcode */ + .op_type = VIE_OP_TYPE_GROUP1, + .op_flags = VIE_OP_F_IMM8, + }, + [0x84] = { + .op_type = VIE_OP_TYPE_TEST, + .op_flags = VIE_OP_F_BYTE_OP, + }, + [0x85] = { + .op_type = VIE_OP_TYPE_TEST, + }, + [0x86] = { + .op_type = VIE_OP_TYPE_XCHG, + }, + [0x87] = { + .op_type = VIE_OP_TYPE_XCHG, + }, + [0x08] = { + .op_type = VIE_OP_TYPE_OR, + .op_flags = VIE_OP_F_BYTE_OP, + }, + [0x09] = { + .op_type = VIE_OP_TYPE_OR, + }, +}; + +/* struct vie.mod */ +#define VIE_MOD_INDIRECT 0U +#define VIE_MOD_INDIRECT_DISP8 1U +#define VIE_MOD_INDIRECT_DISP32 2U +#define VIE_MOD_DIRECT 3U + +/* struct vie.rm */ +#define VIE_RM_SIB 4U +#define VIE_RM_DISP32 5U + +static uint64_t size2mask[9] = { + [1] = (1UL << 8U) - 1UL, + [2] = (1UL << 16U) - 1UL, + [4] = (1UL << 32U) - 1UL, + [8] = ~0UL, +}; + +#define VMX_INVALID_VMCS_FIELD 0xffffffffU + +/* + * This struct vmcs_seg_field is defined separately to hold the vmcs field + * address of segment selector. + */ +struct vmcs_seg_field { + uint32_t base_field; + uint32_t limit_field; + uint32_t access_field; +}; + +/* + * The 'access' field has the format specified in Table 21-2 of the Intel + * Architecture Manual vol 3b. + * + * XXX The contents of the 'access' field are architecturally defined except + * bit 16 - Segment Unusable. + */ +struct seg_desc { + uint64_t base; + uint32_t limit; + uint32_t access; +}; + +static inline struct acrn_mmio_request *vcpu_mmio_req(struct vmrt_vm_vcpu *vcpu) +{ + return (struct acrn_mmio_request *)(vcpu->mmio_request); +} + +static inline uint32_t seg_desc_type(uint32_t access) +{ + return (access & 0x001fU); +} + +static uint64_t vm_get_register(struct vmrt_vm_vcpu *vcpu, enum cpu_reg_name reg) +{ + volatile struct vm_vcpu_shared_region *regs = vcpu->shared_region; + uint64_t reg_val = 0UL; + + switch (reg) + { + case CPU_REG_RAX: + reg_val = regs->ax; + break; + case CPU_REG_RCX: + reg_val = regs->cx; + break; + case CPU_REG_RDX: + reg_val = regs->dx; + break; + case CPU_REG_RBX: + reg_val = regs->bx; + break; + case CPU_REG_RSP: + reg_val = regs->sp; + break; + case CPU_REG_RBP: + reg_val = regs->bp; + break; + case CPU_REG_RSI: + reg_val = regs->si; + break; + case CPU_REG_RDI: + reg_val = regs->di; + break; + case CPU_REG_R8: + reg_val = regs->r8; + break; + case CPU_REG_R9: + reg_val = regs->r9; + break; + case CPU_REG_R10: + reg_val = regs->r10; + break; + case CPU_REG_R11: + reg_val = regs->r11; + break; + case CPU_REG_R12: + reg_val = regs->r12; + break; + case CPU_REG_R13: + reg_val = regs->r13; + break; + case CPU_REG_R14: + reg_val = regs->r14; + break; + case CPU_REG_R15: + reg_val = regs->r15; + break; + default: + VM_PANIC(vcpu); + break; + } + + return reg_val; +} + +static void vm_set_register(struct vmrt_vm_vcpu *vcpu, enum cpu_reg_name reg, + uint64_t val) +{ + volatile struct vm_vcpu_shared_region *regs = vcpu->shared_region; + + switch (reg) + { + case CPU_REG_RAX: + regs->ax = val; + break; + case CPU_REG_RCX: + regs->cx = val; + break; + case CPU_REG_RDX: + regs->dx = val; + break; + case CPU_REG_RBX: + regs->bx = val; + break; + case CPU_REG_RSP: + regs->sp = val; + break; + case CPU_REG_RBP: + regs->bp = val; + break; + case CPU_REG_RSI: + regs->si = val; + break; + case CPU_REG_RDI: + regs->di = val; + break; + case CPU_REG_R8: + regs->r8 = val; + break; + case CPU_REG_R9: + regs->r9 = val; + break; + case CPU_REG_R10: + regs->r10 = val; + break; + case CPU_REG_R11: + regs->r11 = val; + break; + case CPU_REG_R12: + regs->r12 = val; + break; + case CPU_REG_R13: + regs->r13 = val; + break; + case CPU_REG_R14: + regs->r14 = val; + break; + case CPU_REG_R15: + regs->r15 = val; + break; + default: + VM_PANIC(vcpu); + break; + } +} + +static int32_t vie_canonical_check(uint64_t gla) +{ + int32_t ret = 0; + uint64_t mask; + + /* + * The value of the bit 47 in the 'gla' should be replicated in the + * most significant 16 bits. + */ + mask = ~((1UL << 48U) - 1UL); + if ((gla & (1UL << 47U)) != 0U) { + ret = ((gla & mask) != mask) ? 1 : 0; + } else { + ret = ((gla & mask) != 0U) ? 1 : 0; + } + + return ret; +} + +/* + * @pre vcpu != NULL + */ +static inline void vie_mmio_read(struct vmrt_vm_vcpu *vcpu, uint64_t *rval) +{ + *rval = vcpu_mmio_req(vcpu)->value; +} + +/* + * @pre vcpu != NULL + */ +static inline void vie_mmio_write(struct vmrt_vm_vcpu *vcpu, uint64_t wval) +{ + vcpu_mmio_req(vcpu)->value = wval; +} + +static void vie_calc_bytereg(const struct instr_emul_vie *vie, + enum cpu_reg_name *reg, int32_t *lhbr) +{ + *lhbr = 0; + *reg = (enum cpu_reg_name)(vie->reg); + + /* + * 64-bit mode imposes limitations on accessing legacy high byte + * registers (lhbr). + * + * The legacy high-byte registers cannot be addressed if the REX + * prefix is present. In this case the values 4, 5, 6 and 7 of the + * 'ModRM:reg' field address %spl, %bpl, %sil and %dil respectively. + * + * If the REX prefix is not present then the values 4, 5, 6 and 7 + * of the 'ModRM:reg' field address the legacy high-byte registers, + * %ah, %ch, %dh and %bh respectively. + */ + if (vie->rex_present == 0U) { + if ((vie->reg & 0x4U) != 0U) { + *lhbr = 1; + *reg = (enum cpu_reg_name)(vie->reg & 0x3U); + } + } +} + +static uint8_t vie_read_bytereg(struct vmrt_vm_vcpu *vcpu, const struct instr_emul_vie *vie) +{ + int32_t lhbr; + uint64_t val; + uint8_t reg_val; + enum cpu_reg_name reg; + + vie_calc_bytereg(vie, ®, &lhbr); + val = vm_get_register(vcpu, reg); + + /* + * To obtain the value of a legacy high byte register shift the + * base register right by 8 bits (%ah = %rax >> 8). + */ + if (lhbr != 0) { + reg_val = (uint8_t)(val >> 8U); + } else { + reg_val = (uint8_t)val; + } + + return reg_val; +} + +static void vie_write_bytereg(struct vmrt_vm_vcpu *vcpu, const struct instr_emul_vie *vie, + uint8_t byte) +{ + uint64_t origval, val, mask; + enum cpu_reg_name reg; + int32_t lhbr; + + vie_calc_bytereg(vie, ®, &lhbr); + origval = vm_get_register(vcpu, reg); + + val = byte; + mask = 0xffU; + if (lhbr != 0) { + /* + * Shift left by 8 to store 'byte' in a legacy high + * byte register. + */ + val <<= 8U; + mask <<= 8U; + } + val |= origval & ~mask; + vm_set_register(vcpu, reg, val); +} + +/** + * @pre vcpu != NULL + * @pre size = 1, 2, 4 or 8 + * @pre ((reg <= CPU_REG_LAST) && (reg >= CPU_REG_FIRST)) + * @pre ((reg != CPU_REG_CR2) && (reg != CPU_REG_IDTR) && (reg != CPU_REG_GDTR)) + */ +static void vie_update_register(struct vmrt_vm_vcpu *vcpu, enum cpu_reg_name reg, + uint64_t val_arg, uint8_t size) +{ + uint64_t origval; + uint64_t val = val_arg; + + switch (size) { + case 1U: + case 2U: + origval = vm_get_register(vcpu, reg); + val &= size2mask[size]; + val |= origval & ~size2mask[size]; + break; + case 4U: + val &= 0xffffffffUL; + break; + default: /* size == 8 */ + break; + } + + vm_set_register(vcpu, reg, val); +} + +#define RFLAGS_STATUS_BITS (PSL_C | PSL_PF | PSL_AF | PSL_Z | PSL_N | PSL_V) + +static void vie_update_rflags(struct vmrt_vm_vcpu *vcpu, uint64_t rflags2, uint64_t psl) +{ + uint8_t size; + uint64_t rflags; + + rflags = vm_get_register(vcpu, CPU_REG_RFLAGS); + + rflags &= ~RFLAGS_STATUS_BITS; + rflags |= rflags2 & psl; + size = 8U; + + vie_update_register(vcpu, CPU_REG_RFLAGS, rflags, size); +} + +/* + * Return the status flags that would result from doing (x - y). + */ +#define build_getcc(name, type) \ +static uint64_t name(type x, type y) \ +{ \ + uint64_t rflags; \ + \ + __asm __volatile("sub %2,%1; pushfq; popq %0" : \ + "=r" (rflags), "+r" (x) : "m" (y)); \ + return rflags; \ +} +build_getcc(getcc8, uint8_t) +build_getcc(getcc16, uint16_t) +build_getcc(getcc32, uint32_t) +build_getcc(getcc64, uint64_t) + +/** + * @pre opsize = 1, 2, 4 or 8 + */ +static uint64_t getcc(uint8_t opsize, uint64_t x, uint64_t y) +{ + uint64_t rflags; + switch (opsize) { + case 1U: + rflags = getcc8((uint8_t) x, (uint8_t) y); + break; + case 2U: + rflags = getcc16((uint16_t) x, (uint16_t) y); + break; + case 4U: + rflags = getcc32((uint32_t) x, (uint32_t) y); + break; + default: /* opsize == 8 */ + rflags = getcc64(x, y); + break; + } + + return rflags; +} + +static int32_t emulate_mov(struct vmrt_vm_vcpu *vcpu, const struct instr_emul_vie *vie) +{ + int32_t error; + uint8_t size; + enum cpu_reg_name reg; + uint8_t byte; + uint64_t val; + + size = vie->opsize; + error = 0; + switch (vie->opcode) { + case 0x88U: + /* + * MOV byte from reg (ModRM:reg) to mem (ModRM:r/m) + * 88/r: mov r/m8, r8 + * REX + 88/r: mov r/m8, r8 (%ah, %ch, %dh, %bh not available) + */ + byte = vie_read_bytereg(vcpu, vie); + vie_mmio_write(vcpu, byte); + break; + case 0x89U: + /* + * MOV from reg (ModRM:reg) to mem (ModRM:r/m) + * 89/r: mov r/m16, r16 + * 89/r: mov r/m32, r32 + * REX.W + 89/r mov r/m64, r64 + */ + + reg = (enum cpu_reg_name)(vie->reg); + val = vm_get_register(vcpu, reg); + val &= size2mask[size]; + vie_mmio_write(vcpu, val); + break; + case 0x8AU: + /* + * MOV byte from mem (ModRM:r/m) to reg (ModRM:reg) + * 8A/r: mov r8, r/m8 + * REX + 8A/r: mov r8, r/m8 + */ + vie_mmio_read(vcpu, &val); + vie_write_bytereg(vcpu, vie, (uint8_t)val); + break; + case 0x8BU: + /* + * MOV from mem (ModRM:r/m) to reg (ModRM:reg) + * 8B/r: mov r16, r/m16 + * 8B/r: mov r32, r/m32 + * REX.W 8B/r: mov r64, r/m64 + */ + vie_mmio_read(vcpu, &val); + reg = (enum cpu_reg_name)(vie->reg); + vie_update_register(vcpu, reg, val, size); + break; + case 0xA1U: + /* + * MOV from seg:moffset to AX/EAX/RAX + * A1: mov AX, moffs16 + * A1: mov EAX, moffs32 + * REX.W + A1: mov RAX, moffs64 + */ + vie_mmio_read(vcpu, &val); + reg = CPU_REG_RAX; + vie_update_register(vcpu, reg, val, size); + break; + case 0xA3U: + /* + * MOV from AX/EAX/RAX to seg:moffset + * A3: mov moffs16, AX + * A3: mov moffs32, EAX + * REX.W + A3: mov moffs64, RAX + */ + val = vm_get_register(vcpu, CPU_REG_RAX); + val &= size2mask[size]; + vie_mmio_write(vcpu, val); + break; + case 0xC6U: + /* + * MOV from imm8 to mem (ModRM:r/m) + * C6/0 mov r/m8, imm8 + * REX + C6/0 mov r/m8, imm8 + */ + vie_mmio_write(vcpu, (uint64_t)vie->immediate); + break; + case 0xC7U: + /* + * MOV from imm16/imm32 to mem (ModRM:r/m) + * C7/0 mov r/m16, imm16 + * C7/0 mov r/m32, imm32 + * REX.W + C7/0 mov r/m64, imm32 + * (sign-extended to 64-bits) + */ + val = (uint64_t)(vie->immediate) & size2mask[size]; + vie_mmio_write(vcpu, val); + break; + default: + /* + * For the opcode that is not handled (an invalid opcode), the + * error code is assigned to a default value (-EINVAL). + * Gracefully return this error code if prior case clauses have + * not been met. + */ + error = -EINVAL; + break; + } + + return error; +} + +static void copy_from_gva(struct vmrt_vm_vcpu *vcpu, void *buf, u64_t gva, u32_t len) +{ + void *src = GPA2HVA(vmrt_vm_gva2gpa(vcpu, gva), vcpu->vm); + memcpy(buf, src, len); +} + +static int32_t vie_init(struct instr_emul_vie *vie, struct vmrt_vm_vcpu *vcpu) +{ + volatile struct vm_vcpu_shared_region *regs = vcpu->shared_region; + u64_t inst_len = regs->inst_length; + int32_t ret; + + if ((inst_len > VIE_INST_SIZE) || (inst_len == 0U)) { + VM_PANIC(vcpu); + } else { + (void)memset(vie, 0U, sizeof(struct instr_emul_vie)); + + /* init register fields in vie. */ + vie->base_register = CPU_REG_LAST; + vie->index_register = CPU_REG_LAST; + vie->segment_register = CPU_REG_LAST; + + copy_from_gva(vcpu, vie->inst, regs->ip, inst_len); + /* + * Use this to print the inst binary to verify if the decodeed inst is correct + * + printc("inst to be decode: "); + for (u64_t i = 0; i < inst_len; i++) { + printc("%x ", vie->inst[i]); + } + printc("\ninst vie init done\n"); + */ + + vie->num_valid = (uint8_t)inst_len; + ret = 0; + } + + return ret; +} + +static int32_t vie_peek(const struct instr_emul_vie *vie, uint8_t *x) +{ + int32_t ret; + if (vie->num_processed < vie->num_valid) { + *x = vie->inst[vie->num_processed]; + ret = 0; + } else { + ret = -1; + } + return ret; +} + +static void vie_advance(struct instr_emul_vie *vie) +{ + + vie->num_processed++; +} + +static bool segment_override(uint8_t x, enum cpu_reg_name *seg) +{ + bool override = true; + switch (x) { + case 0x2EU: + *seg = CPU_REG_CS; + break; + case 0x36U: + *seg = CPU_REG_SS; + break; + case 0x3EU: + *seg = CPU_REG_DS; + break; + case 0x26U: + *seg = CPU_REG_ES; + break; + case 0x64U: + *seg = CPU_REG_FS; + break; + case 0x65U: + *seg = CPU_REG_GS; + break; + default: + override = false; + break; + } + return override; +} + +static void decode_op_and_addr_size(struct instr_emul_vie *vie) +{ + /* + * Section "Operand-Size And Address-Size Attributes", Intel SDM, Vol 1 + */ + + /* + * Default address size is 64-bits and default operand size + * is 32-bits. + */ + vie->addrsize = ((vie->addrsize_override != 0U) ? 4U : 8U); + if (vie->rex_w != 0U) { + vie->opsize = 8U; + } else if (vie->opsize_override != 0U) { + vie->opsize = 2U; + } else { + vie->opsize = 4U; + } +} +static int32_t decode_prefixes(struct instr_emul_vie *vie) +{ + uint8_t x, i; + int32_t ret = 0; + + for (i = 0U; i < VIE_PREFIX_SIZE; i++) { + if (vie_peek(vie, &x) != 0) { + ret = -1; + break; + } else { + if (x == 0x66U) { + vie->opsize_override = 1U; + } else if (x == 0x67U) { + vie->addrsize_override = 1U; + } else if (x == 0xF3U) { + vie->repz_present = 1U; + } else if (x == 0xF2U) { + vie->repnz_present = 1U; + } else if (segment_override(x, &vie->segment_register)) { + vie->seg_override = 1U; + } else { + break; + } + + vie_advance(vie); + } + } + + if (ret == 0) { + /* + * From section 2.2.1, "REX Prefixes", Intel SDM Vol 2: + * - Only one REX prefix is allowed per instruction. + * - The REX prefix must immediately precede the opcode byte or the + * escape opcode byte. + * - If an instruction has a mandatory prefix (0x66, 0xF2 or 0xF3) + * the mandatory prefix must come before the REX prefix. + */ + if ( (x >= 0x40U) && (x <= 0x4FU)) { + vie->rex_present = 1U; + vie->rex_w = (x >> 0x3U) & 1U; + vie->rex_r = (x >> 0x2U) & 1U; + vie->rex_x = (x >> 0x1U) & 1U; + vie->rex_b = (x >> 0x0U) & 1U; + vie_advance(vie); + } + decode_op_and_addr_size(vie); + } + + return ret; +} + +static int32_t decode_two_byte_opcode(struct instr_emul_vie *vie) +{ + int32_t ret = 0; + uint8_t x; + + if (vie_peek(vie, &x) != 0) { + ret = -1; + } else { + vie->opcode = x; + vie->op = two_byte_opcodes[x]; + + if (vie->op.op_type == VIE_OP_TYPE_NONE) { + ret = -1; + } else { + vie_advance(vie); + } + } + + return ret; +} + +static int32_t decode_opcode(struct instr_emul_vie *vie) +{ + int32_t ret = 0; + uint8_t x; + + if (vie_peek(vie, &x) != 0) { + ret = -1; + } else { + vie->opcode = x; + vie->op = one_byte_opcodes[x]; + + if (vie->op.op_type == VIE_OP_TYPE_NONE) { + ret = -1; + } else { + vie_advance(vie); + + if (vie->op.op_type == VIE_OP_TYPE_TWO_BYTE) { + ret = decode_two_byte_opcode(vie); + } + } + } + + return ret; +} + +static int32_t decode_modrm(struct instr_emul_vie *vie) +{ + uint8_t x; + int32_t ret; + + if ((vie->op.op_flags & VIE_OP_F_NO_MODRM) != 0U) { + ret = 0; + } else if (vie_peek(vie, &x) != 0) { + ret = -1; + } else { + vie->mod = (x >> 6U) & 0x3U; + vie->rm = (x >> 0U) & 0x7U; + vie->reg = (x >> 3U) & 0x7U; + + /* + * A direct addressing mode makes no sense in the context of an EPT + * fault. There has to be a memory access involved to cause the + * EPT fault. + */ + if (vie->mod == VIE_MOD_DIRECT) { + ret = -1; + } else { + if (((vie->mod == VIE_MOD_INDIRECT) && (vie->rm == VIE_RM_DISP32)) || + ((vie->mod != VIE_MOD_DIRECT) && (vie->rm == VIE_RM_SIB))) { + /* + * Table 2-5: Special Cases of REX Encodings + * + * mod=0, r/m=5 is used in the compatibility mode to + * indicate a disp32 without a base register. + * + * mod!=3, r/m=4 is used in the compatibility mode to + * indicate that the SIB byte is present. + * + * The 'b' bit in the REX prefix is don't care in + * this case. + */ + } else { + vie->rm |= (vie->rex_b << 3U); + } + + vie->reg |= (vie->rex_r << 3U); + + /* SIB */ + if ((vie->mod != VIE_MOD_DIRECT) && (vie->rm == VIE_RM_SIB)) { + /* done */ + } else { + vie->base_register = (enum cpu_reg_name)vie->rm; + + switch (vie->mod) { + case VIE_MOD_INDIRECT_DISP8: + vie->disp_bytes = 1U; + break; + case VIE_MOD_INDIRECT_DISP32: + vie->disp_bytes = 4U; + break; + case VIE_MOD_INDIRECT: + if (vie->rm == VIE_RM_DISP32) { + vie->disp_bytes = 4U; + /* + * Table 2-7. RIP-Relative Addressing + * + * In 64-bit mode mod=00 r/m=101 implies [rip] + disp32 + * whereas in compatibility mode it just implies disp32. + */ + + vie->base_register = CPU_REG_RIP; + printc("VM exit with RIP as indirect access"); + assert(0); + } + break; + default: + /* VIE_MOD_DIRECT */ + break; + } + + } + vie_advance(vie); + + ret = 0; + } + } + + return ret; +} + +static int32_t decode_sib(struct instr_emul_vie *vie) +{ + uint8_t x; + int32_t ret; + + /* Proceed only if SIB byte is present */ + if ((vie->mod == VIE_MOD_DIRECT) || (vie->rm != VIE_RM_SIB)) { + ret = 0; + } else if (vie_peek(vie, &x) != 0) { + ret = -1; + } else { + + /* De-construct the SIB byte */ + vie->ss = (x >> 6U) & 0x3U; + vie->index = (x >> 3U) & 0x7U; + vie->base = (x >> 0U) & 0x7U; + + /* Apply the REX prefix modifiers */ + vie->index |= vie->rex_x << 3U; + vie->base |= vie->rex_b << 3U; + + switch (vie->mod) { + case VIE_MOD_INDIRECT_DISP8: + vie->disp_bytes = 1U; + break; + case VIE_MOD_INDIRECT_DISP32: + vie->disp_bytes = 4U; + break; + default: + /* + * All possible values of 'vie->mod': + * 1. VIE_MOD_DIRECT + * has been handled at the start of this function + * 2. VIE_MOD_INDIRECT_DISP8 + * has been handled in prior case clauses + * 3. VIE_MOD_INDIRECT_DISP32 + * has been handled in prior case clauses + * 4. VIE_MOD_INDIRECT + * will be handled later after this switch statement + */ + break; + } + + if ((vie->mod == VIE_MOD_INDIRECT) && ((vie->base == 5U) || (vie->base == 13U))) { + /* + * Special case when base register is unused if mod = 0 + * and base = %rbp or %r13. + * + * Documented in: + * Table 2-3: 32-bit Addressing Forms with the SIB Byte + * Table 2-5: Special Cases of REX Encodings + */ + vie->disp_bytes = 4U; + } else { + vie->base_register = (enum cpu_reg_name)vie->base; + } + + /* + * All encodings of 'index' are valid except for %rsp (4). + * + * Documented in: + * Table 2-3: 32-bit Addressing Forms with the SIB Byte + * Table 2-5: Special Cases of REX Encodings + */ + if (vie->index != 4U) { + vie->index_register = (enum cpu_reg_name)vie->index; + } + + /* 'scale' makes sense only in the context of an index register */ + if (vie->index_register < CPU_REG_LAST) { + vie->scale = 1U << vie->ss; + } + + vie_advance(vie); + + ret = 0; + } + + return ret; +} + +static int32_t decode_displacement(struct instr_emul_vie *vie) +{ + uint8_t n, i, x; + int32_t ret = 0; + + union { + uint8_t buf[4]; + int8_t signed8; + int32_t signed32; + } u; + + n = vie->disp_bytes; + if (n != 0U) { + if ((n != 1U) && (n != 4U)) { + printc("%s: decode_displacement: invalid disp_bytes %d", __func__, n); + ret = -EINVAL; + } else { + + for (i = 0U; i < n; i++) { + if (vie_peek(vie, &x) != 0) { + ret = -1; + break; + } + + u.buf[i] = x; + vie_advance(vie); + } + + if (ret == 0) { + if (n == 1U) { + vie->displacement = u.signed8; /* sign-extended */ + } else { + vie->displacement = u.signed32; /* sign-extended */ + } + } + } + } + + return ret; +} + +static int32_t decode_immediate(struct instr_emul_vie *vie) +{ + uint8_t i, n, x; + int32_t ret = 0; + union { + uint8_t buf[4]; + int8_t signed8; + int16_t signed16; + int32_t signed32; + } u; + + /* Figure out immediate operand size (if any) */ + if ((vie->op.op_flags & VIE_OP_F_IMM) != 0U) { + /* + * Section 2.2.1.5 "Immediates", Intel SDM: + * In 64-bit mode the typical size of immediate operands + * remains 32-bits. When the operand size if 64-bits, the + * processor sign-extends all immediates to 64-bits prior + * to their use. + */ + if ((vie->opsize == 4U) || (vie->opsize == 8U)) { + vie->imm_bytes = 4U; + } + else { + vie->imm_bytes = 2U; + } + } else if ((vie->op.op_flags & VIE_OP_F_IMM8) != 0U) { + vie->imm_bytes = 1U; + } else { + /* No op_flag on immediate operand size */ + } + + n = vie->imm_bytes; + if (n != 0U) { + if ((n != 1U) && (n != 2U) && (n != 4U)) { + printc("%s: invalid number of immediate bytes: %d", __func__, n); + ret = -EINVAL; + } else { + for (i = 0U; i < n; i++) { + if (vie_peek(vie, &x) != 0) { + ret = -1; + break; + } + + u.buf[i] = x; + vie_advance(vie); + } + + if (ret == 0) { + /* sign-extend the immediate value before use */ + if (n == 1U) { + vie->immediate = u.signed8; + } else if (n == 2U) { + vie->immediate = u.signed16; + } else { + vie->immediate = u.signed32; + } + } + } + } + + return ret; +} + +static int32_t decode_moffset(struct instr_emul_vie *vie) +{ + uint8_t i, n, x; + int32_t ret = 0; + union { + uint8_t buf[8]; + uint64_t u64; + } u; + + if ((vie->op.op_flags & VIE_OP_F_MOFFSET) != 0U) { + /* + * Section 2.2.1.4, "Direct Memory-Offset MOVs", Intel SDM: + * The memory offset size follows the address-size of the instruction. + */ + n = vie->addrsize; + if ((n != 2U) && (n != 4U) && (n != 8U)) { + printc("%s: invalid moffset bytes: %hhu", __func__, n); + ret = -EINVAL; + } else { + u.u64 = 0UL; + for (i = 0U; i < n; i++) { + if (vie_peek(vie, &x) != 0) { + ret = -1; + break; + } + + u.buf[i] = x; + vie_advance(vie); + } + if (ret == 0) { + vie->displacement = (int64_t)u.u64; + } + } + } + + return ret; +} + +static int32_t local_decode_instruction(struct instr_emul_vie *vie) +{ + int32_t ret; + + if (decode_prefixes(vie) != 0) { + ret = -1; + } else if (decode_opcode(vie) != 0) { + ret = -1; + } else if (decode_modrm(vie) != 0) { + ret = -1; + } else if (decode_sib(vie) != 0) { + ret = -1; + } else if (decode_displacement(vie) != 0) { + ret = -1; + } else if (decode_immediate(vie) != 0) { + ret = -1; + } else if (decode_moffset(vie) != 0) { + ret = -1; + } else { + vie->decoded = 1U; /* success */ + ret = 0; + } + + return ret; +} + +static int32_t instr_check_gva(struct vmrt_vm_vcpu *vcpu) +{ + int32_t ret = 0; + uint64_t base, segbase, idx, gva; + enum cpu_reg_name seg; + struct instr_emul_vie *vie = &((struct instr_emul_ctxt *)vcpu->inst_ctxt)->vie; + + base = 0UL; + if (vie->base_register != CPU_REG_LAST) { + base = vm_get_register(vcpu, vie->base_register); + + /* RIP relative addressing starts from the + * following instruction + */ + if (vie->base_register == CPU_REG_RIP) { + base += vie->num_processed; + } + + } + + idx = 0UL; + if (vie->index_register != CPU_REG_LAST) { + idx = vm_get_register(vcpu, vie->index_register); + } + + /* "Specifying a Segment Selector" of SDM Vol1 3.7.4 + * + * In legacy IA-32 mode, when ESP or EBP register is used as + * base, the SS segment is default segment. + * + * All data references, except when relative to stack or + * string destination, DS is default segment. + * + * segment override could overwrite the default segment + * + * 64bit mode, segmentation is generally disabled. The + * exception are FS and GS. + */ + if (vie->seg_override != 0U) { + seg = vie->segment_register; + } else if ((vie->base_register == CPU_REG_RSP) || + (vie->base_register == CPU_REG_RBP)) { + seg = CPU_REG_SS; + } else { + seg = CPU_REG_DS; + } + + if ((seg != CPU_REG_FS) && + (seg != CPU_REG_GS)) { + segbase = 0UL; + } else { + struct seg_desc desc; + + VM_PANIC(vcpu); + segbase = desc.base; + } + + gva = segbase + base + (uint64_t)vie->scale * idx + (uint64_t)vie->displacement; + + vie->gva = gva; + + if (vie_canonical_check(gva) != 0) { + VM_PANIC(vcpu); + } else { + #define PAGE_FAULT_WR_FLAG 0x00000002U + + vmrt_vm_gva2gpa(vcpu, gva); + ret = 0; + if (ret < 0) { + VM_PANIC(vcpu); + } else { + ret = 0; + } + } + + return ret; +} + +int32_t decode_instruction(struct vmrt_vm_vcpu *vcpu) +{ + struct instr_emul_ctxt *emul_ctxt; + uint32_t csar; + int32_t retval; + + emul_ctxt = vcpu->inst_ctxt; + retval = vie_init(&emul_ctxt->vie, vcpu); + + if (retval < 0) { + VM_PANIC(vcpu); + } else { + retval = local_decode_instruction(&emul_ctxt->vie); + + if (retval != 0) { + VM_PANIC(vcpu); + } else { + /* + * We do operand check in instruction decode phase and + * inject exception accordingly. In late instruction + * emulation, it will always success. + * + * We only need to do dst check for movs. For other instructions, + * they always has one register and one mmio which trigger EPT + * by access mmio. With VMX enabled, the related check is done + * by VMX itself before hit EPT violation. + * + */ + if ((emul_ctxt->vie.op.op_flags & VIE_OP_F_CHECK_GVA_DI) != 0U) { + VM_PANIC(vcpu); + } else { + retval = instr_check_gva(vcpu); + } + + if (retval >= 0) { + /* return the Memory Operand byte size */ + if ((emul_ctxt->vie.op.op_flags & VIE_OP_F_BYTE_OP) != 0U) { + retval = 1; + } else if ((emul_ctxt->vie.op.op_flags & VIE_OP_F_WORD_OP) != 0U) { + retval = 2; + } else { + retval = (int32_t)emul_ctxt->vie.opsize; + } + } + } + } + + return retval; +} + +int32_t emulate_instruction(struct vmrt_vm_vcpu *vcpu) +{ + struct instr_emul_vie *vie = &((struct instr_emul_ctxt *)vcpu->inst_ctxt)->vie; + int32_t error; + + if (vie->decoded != 0U) { + switch (vie->op.op_type) { + case VIE_OP_TYPE_MOV: + error = emulate_mov(vcpu, vie); + break; + default: + VM_PANIC(vcpu); + error = -EINVAL; + break; + } + } else { + VM_PANIC(vcpu); + error = -EINVAL; + } + + return error; +} diff --git a/src/components/implementation/simple_vmm/noop_nf/instr_emul.h b/src/components/implementation/simple_vmm/noop_nf/instr_emul.h new file mode 100644 index 0000000000..901428dcb4 --- /dev/null +++ b/src/components/implementation/simple_vmm/noop_nf/instr_emul.h @@ -0,0 +1,95 @@ +/*- + * Copyright (c) 2012 NetApp, Inc. + * Copyright (c) 2017-2022 Intel Corporation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef INSTR_EMUL_H +#define INSTR_EMUL_H + +#include +#include + +struct vmrt_vm_vcpu; +struct instr_emul_vie_op { + uint8_t op_type; /* type of operation (e.g. MOV) */ + uint16_t op_flags; +}; + +#define VIE_PREFIX_SIZE 4U +#define VIE_INST_SIZE 15U +struct instr_emul_vie { + uint8_t inst[VIE_INST_SIZE]; /* instruction bytes */ + uint8_t num_valid; /* size of the instruction */ + uint8_t num_processed; + + uint8_t addrsize:4, opsize:4; /* address and operand sizes */ + uint8_t rex_w:1, /* REX prefix */ + rex_r:1, + rex_x:1, + rex_b:1, + rex_present:1, + repz_present:1, /* REP/REPE/REPZ prefix */ + repnz_present:1, /* REPNE/REPNZ prefix */ + opsize_override:1, /* Operand size override */ + addrsize_override:1, /* Address size override */ + seg_override:1; /* Segment override */ + + uint8_t mod:2, /* ModRM byte */ + reg:4, + rm:4; + + uint8_t ss:2, /* SIB byte */ + index:4, + base:4; + + uint8_t disp_bytes; + uint8_t imm_bytes; + + uint8_t scale; + enum cpu_reg_name base_register; /* CPU_REG_xyz */ + enum cpu_reg_name index_register; /* CPU_REG_xyz */ + enum cpu_reg_name segment_register; /* CPU_REG_xyz */ + + int64_t displacement; /* optional addr displacement */ + int64_t immediate; /* optional immediate operand */ + + uint8_t decoded; /* set to 1 if successfully decoded */ + + uint8_t opcode; + struct instr_emul_vie_op op; /* opcode description */ + + uint64_t dst_gpa; /* saved dst operand gpa. Only for movs */ + uint64_t gva; /* saved gva for instruction emulation */ +}; + +struct instr_emul_ctxt { + struct instr_emul_vie vie; +}; + +int32_t emulate_instruction(struct vmrt_vm_vcpu *vcpu); +int32_t decode_instruction(struct vmrt_vm_vcpu *vcpu); + +#endif diff --git a/src/components/implementation/simple_vmm/noop_nf/ioapic.h b/src/components/implementation/simple_vmm/noop_nf/ioapic.h new file mode 100644 index 0000000000..55b214a1e4 --- /dev/null +++ b/src/components/implementation/simple_vmm/noop_nf/ioapic.h @@ -0,0 +1,99 @@ +/* + * Copyright (C) 2018-2022 Intel Corporation. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef ARCH_X86_IOAPIC_H +#define ARCH_X86_IOAPIC_H + +#include + +#define NR_LEGACY_IRQ 16U +#define NR_LEGACY_PIN NR_LEGACY_IRQ + +struct ioapic_info { + uint8_t id; /* IOAPIC ID as indicated in ACPI MADT */ + uint32_t addr; /* IOAPIC Register address */ + uint32_t gsi_base; /* Global System Interrupt where this IO-APIC's interrupt input start */ + uint32_t nr_pins; /* Number of Interrupt inputs as determined by Max. Redir Entry Register */ +}; + +void ioapic_setup_irqs(void); + +bool is_ioapic_irq(uint32_t irq); +uint32_t gsi_to_ioapic_pin(uint32_t gsi); +int32_t init_ioapic_id_info(void); +uint8_t ioapic_irq_to_ioapic_id(uint32_t irq); + +uint8_t get_platform_ioapic_info (struct ioapic_info **plat_ioapic_info); + +/** + * @defgroup ioapic_ext_apis IOAPIC External Interfaces + * + * This is a group that includes IOAPIC External Interfaces. + * + * @{ + */ + +/** + * @brief Get irq num from gsi num + * + * @param[in] gsi The gsi number + * + * @return irq number + */ +uint32_t ioapic_gsi_to_irq(uint32_t gsi); +/** + * @brief Set the redirection table entry + * + * Set the redirection table entry of an interrupt + * + * @param[in] irq The number of irq to set + * @param[in] rte Union of ioapic_rte to set + */ +void ioapic_set_rte(uint32_t irq, union ioapic_rte rte); + +/** + * @brief Get the redirection table entry + * + * Get the redirection table entry of an interrupt + * + * @param[in] irq The number of irq to fetch RTE + * @param[inout] rte Pointer to union ioapic_rte to return result RTE + * + * @pre rte != NULL + */ +void ioapic_get_rte(uint32_t irq, union ioapic_rte *rte); + +/** + * @brief Suspend ioapic + * + * Suspend ioapic, mainly save the RTEs. + */ +void suspend_ioapic(void); + +/** + * @brief Resume ioapic + * + * Resume ioapic, mainly restore the RTEs. + */ +void resume_ioapic(void); + +/** + * @} + */ +/* End of ioapic_ext_apis */ + +void ioapic_gsi_mask_irq(uint32_t irq); +void ioapic_gsi_unmask_irq(uint32_t irq); + +void ioapic_get_rte_entry(void *ioapic_base, uint32_t pin, union ioapic_rte *rte); + +void *gsi_to_ioapic_base(uint32_t gsi); +uint32_t get_max_nr_gsi(void); +uint8_t get_gsi_to_ioapic_index(uint32_t gsi); +uint32_t get_pic_pin_from_ioapic_pin(uint32_t pin_index); +bool is_gsi_valid(uint32_t gsi); + +#endif /* ARCH_X86_IOAPIC_H */ diff --git a/src/components/implementation/simple_vmm/noop_nf/irq.h b/src/components/implementation/simple_vmm/noop_nf/irq.h new file mode 100644 index 0000000000..06c21c902a --- /dev/null +++ b/src/components/implementation/simple_vmm/noop_nf/irq.h @@ -0,0 +1,136 @@ +/* + * Copyright (C) 2018-2022 Intel Corporation. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef ARCH_X86_IRQ_H +#define ARCH_X86_IRQ_H + +#include + +/** + * @file arch/x86/asm/irq.h + * + * @brief public APIs for x86 IRQ handling + */ + +#define DBG_LEVEL_PTIRQ 6U +#define DBG_LEVEL_IRQ 6U + +#define NR_MAX_VECTOR 0xFFU +#define VECTOR_INVALID (NR_MAX_VECTOR + 1U) + +/* # of NR_STATIC_MAPPINGS_1 entries for timer, vcpu notify, and PMI */ +#define NR_STATIC_MAPPINGS_1 3U + +/* + * The static IRQ/Vector mapping table in irq.c consists of the following entries: + * # of NR_STATIC_MAPPINGS_1 entries for timer, vcpu notify, and PMI + * + * # of CONFIG_MAX_VM_NUM entries for posted interrupt notification, platform + * specific but known at build time: + * Allocate unique Activation Notification Vectors (ANV) for each vCPU that belongs + * to the same pCPU, the ANVs need only be unique within each pCPU, not across all + * vCPUs. The max numbers of vCPUs may be running on top of a pCPU is CONFIG_MAX_VM_NUM, + * since ACRN does not support 2 vCPUs of same VM running on top of same pCPU. + * This reduces # of pre-allocated ANVs for posted interrupts to CONFIG_MAX_VM_NUM, + * and enables ACRN to avoid switching between active and wake-up vector values + * in the posted interrupt descriptor on vCPU scheduling state changes. + */ +#define NR_STATIC_MAPPINGS (NR_STATIC_MAPPINGS_1 + CONFIG_MAX_VM_NUM) + +#define HYPERVISOR_CALLBACK_HSM_VECTOR 0xF3U + +/* vectors range for dynamic allocation, usually for devices */ +#define VECTOR_DYNAMIC_START 0x20U +#define VECTOR_DYNAMIC_END 0xDFU + +/* vectors range for fixed vectors, usually for HV service */ +#define VECTOR_FIXED_START 0xE0U +#define VECTOR_FIXED_END 0xFFU + +#define TIMER_VECTOR (VECTOR_FIXED_START) +#define NOTIFY_VCPU_VECTOR (VECTOR_FIXED_START + 1U) +#define PMI_VECTOR (VECTOR_FIXED_START + 2U) +/* + * Starting vector for posted interrupts + * # of CONFIG_MAX_VM_NUM (POSTED_INTR_VECTOR ~ (POSTED_INTR_VECTOR + CONFIG_MAX_VM_NUM - 1U)) + * consecutive vectors reserved for posted interrupts + */ +#define POSTED_INTR_VECTOR (VECTOR_FIXED_START + NR_STATIC_MAPPINGS_1) + +#define TIMER_IRQ (NR_IRQS - 1U) +#define NOTIFY_VCPU_IRQ (NR_IRQS - 2U) +#define PMI_IRQ (NR_IRQS - 3U) +/* + * Starting IRQ for posted interrupts + * # of CONFIG_MAX_VM_NUM (POSTED_INTR_IRQ ~ (POSTED_INTR_IRQ + CONFIG_MAX_VM_NUM - 1U)) + * consecutive IRQs reserved for posted interrupts + */ +#define POSTED_INTR_IRQ (NR_IRQS - NR_STATIC_MAPPINGS_1 - CONFIG_MAX_VM_NUM) + +/* the maximum number of msi entry is 2048 according to PCI + * local bus specification + */ +#define MAX_MSI_ENTRY 0x800U + +#define INVALID_INTERRUPT_PIN 0xffffffffU + +/* + * x86 irq data + */ +struct x86_irq_data { + uint32_t vector; /**< assigned vector */ +#ifdef PROFILING_ON + uint64_t ctx_rip; + uint64_t ctx_rflags; + uint64_t ctx_cs; +#endif +}; + +struct intr_excp_ctx; + +/** + * @brief Allocate a vectror and bind it to irq + * + * For legacy irq (num < 16) and statically mapped ones, do nothing + * if mapping is correct. + * + * @param[in] irq The irq num to bind + * + * @return valid vector num on susccess, VECTOR_INVALID on failure + */ +uint32_t alloc_irq_vector(uint32_t irq); + +/** + * @brief Get vector number of an interrupt from irq number + * + * @param[in] irq The irq_num to convert + * + * @return vector number + */ +uint32_t irq_to_vector(uint32_t irq); + +/** + * @brief Dispatch interrupt + * + * To dispatch an interrupt, an action callback will be called if registered. + * + * @param ctx Pointer to interrupt exception context + */ +void dispatch_interrupt(const struct intr_excp_ctx *ctx); + +/* Arch specific routines called from generic IRQ handling */ + +struct irq_desc; + +void init_irq_descs_arch(struct irq_desc *descs); +void setup_irqs_arch(void); +void init_interrupt_arch(uint16_t pcpu_id); +void free_irq_arch(uint32_t irq); +bool request_irq_arch(uint32_t irq); +void pre_irq_arch(const struct irq_desc *desc); +void post_irq_arch(const struct irq_desc *desc); + +#endif /* ARCH_X86_IRQ_H */ diff --git a/src/components/implementation/simple_vmm/noop_nf/netio.c b/src/components/implementation/simple_vmm/noop_nf/netio.c new file mode 100644 index 0000000000..cc0e4acdbb --- /dev/null +++ b/src/components/implementation/simple_vmm/noop_nf/netio.c @@ -0,0 +1,274 @@ +#include +#include +#include +#include +#include +#include +#include +#include + +shm_bm_objid_t +netio_get_a_packet(u16_t *pkt_len) +{ + struct netshmem_pkt_buf *tx_obj; + shm_bm_t tx_shmemd = 0; + shm_bm_objid_t tx_pktid; + u16_t _pkt_len = 0; + + tx_shmemd = netshmem_get_shm(); + tx_obj = shm_bm_alloc_net_pkt_buf(tx_shmemd, &tx_pktid); + assert(tx_obj); + + virtio_net_send_one_pkt(tx_obj->data, &_pkt_len); + *pkt_len = _pkt_len; + + return tx_pktid; +} + +void pkt_hex_dump(void *_data, u16_t len) +{ + int rowsize = 16; + int i, l, linelen, remaining; + int li = 0; + u8_t *data, ch; + + data = _data; + + printc("Packet hex dump, len:%d\n", len); + remaining = len; + for (i = 0; i < len; i += rowsize) { + printc("%06d\t", li); + + linelen = remaining < rowsize ? remaining : rowsize; + remaining -= rowsize; + + for (l = 0; l < linelen; l++) { + ch = data[l]; + printc( "%02X ", (u32_t) ch); + } + + data += linelen; + li += 10; + + printc( "dump done\n"); + } +} + +#if 0 +shm_bm_objid_t +netio_get_a_packet_batch(u8_t batch_limit) +{ + struct netshmem_pkt_buf *tx_obj; + shm_bm_t tx_shmemd = 0; + shm_bm_objid_t tx_pktid; + u16_t _pkt_len = 0; + shm_bm_objid_t first_objid; + struct netshmem_pkt_buf *first_obj; + struct netshmem_pkt_pri *first_obj_pri; + struct netshmem_meta_tuple *pkt_arr; + u8_t batch_ct = 0; + + tx_shmemd = netshmem_get_shm(); + tx_obj = first_obj = shm_bm_alloc_net_pkt_buf(tx_shmemd, &tx_pktid); + assert(tx_obj); + first_objid = tx_pktid; + first_obj_pri = netshmem_get_pri(tx_obj); + pkt_arr = (struct netshmem_meta_tuple *)&first_obj_pri->pkt_arr; + first_obj_pri->batch_len = 0; + + while (batch_ct < batch_limit) { + assert(tx_obj); + if (likely(batch_ct > 0)) { + tx_obj = shm_bm_alloc_net_pkt_buf(tx_shmemd, &tx_pktid); + assert(tx_obj); + } + + virtio_net_send_one_pkt(netshmem_get_data_buf(tx_obj), &_pkt_len); + + // pkt_hex_dump(netshmem_get_data_buf(tx_obj), _pkt_len); + if (likely(_pkt_len != 0)) { + pkt_arr[batch_ct].obj_id = tx_pktid; + pkt_arr[batch_ct].pkt_len = _pkt_len; + batch_ct++; + } else { + if (batch_ct == 0) { + sched_thd_yield(); + } else { + shm_bm_free_net_pkt_buf(tx_obj); + break; + } + } + } + first_obj_pri->batch_len = batch_ct; + return first_objid; +} +#endif + +struct nf_svc { + int svc_id; + struct vmrt_vm_comp *vm; +}; + +#define MAX_NFS 10 +#define MAX_THD_PER_NF 100 + +static struct nf_svc nf_svc_tbl[MAX_NFS][MAX_THD_PER_NF]; + +void +nf_svc_update(compid_t nf_id, int thd, int svc_id, struct vmrt_vm_comp *vm) +{ + // printc("svc update:%d, %d, %d\n", nf_id, thd, nf_svc_tbl[nf_id][thd].svc_id); + if (nf_svc_tbl[nf_id][thd].svc_id < 0) { + nf_svc_tbl[nf_id][thd].svc_id = svc_id; + nf_svc_tbl[nf_id][thd].vm = vm; + } else { + return; + } +} + +void +nf_svc_init(void) +{ + for (int i = 0; i < MAX_NFS; i++) { + for (int j = 0; j < MAX_THD_PER_NF; j++) { + nf_svc_tbl[i][j].svc_id = -1; + nf_svc_tbl[i][j].vm = NULL; + } + } +} + +shm_bm_objid_t +netio_get_a_packet_batch(u8_t batch_limit) +{ + shm_bm_objid_t first_objid; + struct netshmem_pkt_buf *first_obj; + struct netshmem_pkt_pri *first_obj_pri; + struct netshmem_pkt_buf *tx_obj; + shm_bm_objid_t tx_pktid; + struct netshmem_meta_tuple *pkt_arr; + + struct nf_session *session; + struct nf_pkt_meta_data buf; + u8_t batch_ct = 0; + compid_t vmm_id = cos_compid(); + compid_t nf_id = (compid_t)cos_inv_token(); + if (nf_id == 0) nf_id = vmm_id; + thdid_t nf_thd = cos_thdid(); + + int svc_id = nf_svc_tbl[nf_id][nf_thd].svc_id; + + if (svc_id < 0) { + printc("no svc available for this nf:%d, thd:%d\n", nf_id, nf_thd); + assert(0); + } + + session = get_nf_session(svc_id); + + while (nf_tx_ring_buf_empty(&session->nf_tx_ring_buf)) { + sched_thd_yield(); + } + + assert(nf_tx_ring_buf_dequeue(&session->nf_tx_ring_buf, &buf)); + tx_obj = first_obj = buf.obj; + assert(tx_obj); + tx_pktid = first_objid = buf.objid; + first_obj_pri = netshmem_get_pri(tx_obj); + pkt_arr = (struct netshmem_meta_tuple *)&first_obj_pri->pkt_arr; + first_obj_pri->batch_len = 0; + + pkt_arr[batch_ct].obj_id = tx_pktid; + pkt_arr[batch_ct].pkt_len = buf.pkt_len; + batch_ct++; + + while (batch_ct < batch_limit && nf_tx_ring_buf_dequeue(&session->nf_tx_ring_buf, &buf)) { + // printc("netio out a pkt, batch_ct:%d\n", batch_ct); + pkt_arr[batch_ct].obj_id = buf.objid; + pkt_arr[batch_ct].pkt_len = buf.pkt_len; + batch_ct++; + } + + first_obj_pri->batch_len = batch_ct; + return first_objid; +} + +int +netio_send_packet(shm_bm_objid_t pktid, u16_t pkt_len) +{ + struct netshmem_pkt_buf *rx_obj; + shm_bm_t rx_shmemd = 0; + + rx_shmemd = netshmem_get_shm(); + + rx_obj = shm_bm_transfer_net_pkt_buf(rx_shmemd, pktid); + virtio_net_rcv_one_pkt(rx_obj->data, pkt_len); + shm_bm_free_net_pkt_buf(rx_obj); + + return 0; +} + + +int +netio_send_packet_batch(shm_bm_objid_t pktid) +{ + struct netshmem_pkt_buf *rx_obj; + shm_bm_objid_t first_objid; + struct netshmem_pkt_buf *first_obj; + struct netshmem_pkt_pri *first_obj_pri; + struct netshmem_meta_tuple *pkt_arr; + u16_t pkt_len; + u8_t batch_tc = 0; + shm_bm_t rx_shmemd = 0; + + rx_shmemd = netshmem_get_shm(); + first_objid = pktid; + + + first_obj = shm_bm_transfer_net_pkt_buf(rx_shmemd, first_objid); + + first_obj_pri = netshmem_get_pri(first_obj); + pkt_arr = (struct netshmem_meta_tuple *)&(first_obj_pri->pkt_arr); + batch_tc = first_obj_pri->batch_len; + + pkt_len = pkt_arr[0].pkt_len; + // pkt_hex_dump(netshmem_get_data_buf(first_obj), pkt_len); + virtio_net_rcv_one_pkt(netshmem_get_data_buf(first_obj), pkt_len); + + for (u8_t i = 1; i < batch_tc; i++) { + pkt_len = pkt_arr[i].pkt_len; + pktid = pkt_arr[i].obj_id; + rx_obj = shm_bm_transfer_net_pkt_buf(rx_shmemd, pktid); + virtio_net_rcv_one_pkt(netshmem_get_data_buf(rx_obj), pkt_len); + shm_bm_free_net_pkt_buf(rx_obj); + } + + shm_bm_free_net_pkt_buf(first_obj); + + return 0; +} + +void +netio_shmem_map(cbuf_t shm_id) +{ + netshmem_map_shmem(shm_id); +} + +extern struct vmrt_vm_comp *vm_list[2]; + +void +netio_svc_update(int svc_id, u32_t vm) +{ + compid_t nf_id = cos_inv_token(); + thdid_t thd = cos_thdid(); + assert(vm < 2); + shm_bm_t tx_shm = netshmem_get_shm(); + assert(tx_shm); + + nf_svc_update(nf_id, thd, svc_id, vm_list[vm]); + + struct nf_session *session; + session = get_nf_session(svc_id); + nf_session_tx_update(session, tx_shm, thd); + sync_sem_init(&session->tx_sem, 0); + + nf_tx_ring_buf_init(&session->nf_tx_ring_buf, NF_TX_PKT_RBUF_NUM, NF_TX_PKT_RING_SZ); +} diff --git a/src/components/implementation/simple_vmm/noop_nf/nf_session.c b/src/components/implementation/simple_vmm/noop_nf/nf_session.c new file mode 100644 index 0000000000..a5d56bdb82 --- /dev/null +++ b/src/components/implementation/simple_vmm/noop_nf/nf_session.c @@ -0,0 +1,74 @@ +#pragma once + +#include + +CK_RING_PROTOTYPE(nf_tx_ring_buf, nf_pkt_meta_data); + +static char ring_buffers[NF_TX_MAX_RING_NUM][NF_TX_PKT_RING_SZ]; +static struct nf_session nf_sessions[MAX_SVC_NUM]; + +void +nf_sessions_init(void) +{ + for (int i = 0; i < MAX_SVC_NUM; i++) { + nf_sessions[i].rx_shmemd = 0; + nf_sessions[i].rx_thd = 0; + nf_sessions[i].tx_shmemd = 0; + nf_sessions[i].tx_thd = 0; + nf_sessions[i].nf_tx_ring_buf.ring = 0; + nf_sessions[i].nf_tx_ring_buf.ringbuf = 0; + + } +} + +void +nf_tx_ring_buf_init(struct nf_tx_ring_buf *pkt_ring_buf, size_t ringbuf_num, size_t ringbuf_sz) +{ + struct ck_ring *buf_addr; + + /* prevent multiple thread from contending memory */ + assert(cos_thdid() < 30); + buf_addr = (struct ck_ring *)&ring_buffers[cos_thdid()]; + + ck_ring_init(buf_addr, ringbuf_num); + + pkt_ring_buf->ring = buf_addr; + pkt_ring_buf->ringbuf = (struct pkt_buf *)((char *)buf_addr + sizeof(struct ck_ring)); +} + +inline int +nf_tx_ring_buf_enqueue(struct nf_tx_ring_buf *pkt_ring_buf, struct nf_pkt_meta_data *buf) +{ + assert(pkt_ring_buf->ring && pkt_ring_buf->ringbuf); + + return CK_RING_ENQUEUE_SPSC(nf_tx_ring_buf, pkt_ring_buf->ring, pkt_ring_buf->ringbuf, buf); +} + +inline int +nf_tx_ring_buf_dequeue(struct nf_tx_ring_buf *pkt_ring_buf, struct nf_pkt_meta_data *buf) +{ + assert(pkt_ring_buf->ring && pkt_ring_buf->ringbuf); + + return CK_RING_DEQUEUE_SPSC(nf_tx_ring_buf, pkt_ring_buf->ring, pkt_ring_buf->ringbuf, buf); +} + +inline int +nf_tx_ring_buf_empty(struct nf_tx_ring_buf *pkt_ring_buf) +{ + assert(pkt_ring_buf->ring); + + return (!ck_ring_size(pkt_ring_buf->ring)); +} + +struct nf_session *get_nf_session(int svc_id) +{ + if (unlikely(svc_id < 0 || svc_id > 1000)) return &nf_sessions[0]; + else return &nf_sessions[svc_id]; +} + +void +nf_session_tx_update(struct nf_session *session, shm_bm_t tx_shmemd, thdid_t tx_thd) +{ + session->tx_shmemd = tx_shmemd; + session->tx_thd = tx_thd; +} diff --git a/src/components/implementation/simple_vmm/noop_nf/nf_session.h b/src/components/implementation/simple_vmm/noop_nf/nf_session.h new file mode 100644 index 0000000000..00f81a0d44 --- /dev/null +++ b/src/components/implementation/simple_vmm/noop_nf/nf_session.h @@ -0,0 +1,49 @@ +#include +#include +#include +#include + +struct nf_pkt_meta_data { + void *obj; + shm_bm_objid_t objid; + u16_t pkt_len; +}; + +struct nf_tx_ring_buf { + struct ck_ring *ring; + struct nf_pkt_meta_data *ringbuf; +}; + +struct nf_session { + shm_bm_t rx_shmemd; + shm_bm_t tx_shmemd; + + thdid_t rx_thd; + thdid_t tx_thd; + + struct sync_sem tx_sem; + + struct nf_tx_ring_buf nf_tx_ring_buf; +}; + +#define NF_TX_PKT_RBUF_NUM 512 +#define NF_TX_PKT_RBUF_SZ (NF_TX_PKT_RBUF_NUM * sizeof(struct nf_tx_ring_buf)) +#define NF_TX_PKT_RING_SZ (sizeof(struct ck_ring) + NF_TX_PKT_RBUF_SZ) +#define NF_TX_PKT_RING_PAGES (round_up_to_page(NF_TX_PKT_RING_SZ)/PAGE_SIZE) + +#define NF_TX_MAX_RING_NUM 30 + +#define MAX_NF_SESSION 10 + +#define MAX_SVC_NUM (20000) + +struct nf_session *get_nf_session(int svc_id); +void nf_session_tx_update(struct nf_session *session, shm_bm_t tx_shmemd, thdid_t tx_thd); +void nf_tx_ring_buf_init(struct nf_tx_ring_buf *pkt_ring_buf, size_t ringbuf_num, size_t ringbuf_sz); +int nf_tx_ring_buf_enqueue(struct nf_tx_ring_buf *pkt_ring_buf, struct nf_pkt_meta_data *buf); +int nf_tx_ring_buf_dequeue(struct nf_tx_ring_buf *pkt_ring_buf, struct nf_pkt_meta_data *buf); +int nf_tx_ring_buf_empty(struct nf_tx_ring_buf *pkt_ring_buf); + +void nf_svc_update(compid_t nf_id, int thd_id, int svc_id, struct vmrt_vm_comp *vm); +void nf_svc_init(void); +void nf_sessions_init(void); diff --git a/src/components/implementation/simple_vmm/noop_nf/simple_vmm.c b/src/components/implementation/simple_vmm/noop_nf/simple_vmm.c new file mode 100644 index 0000000000..ee1923c1e9 --- /dev/null +++ b/src/components/implementation/simple_vmm/noop_nf/simple_vmm.c @@ -0,0 +1,274 @@ +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include + +#define NF_THD_PRIORITY 31 + +#define NO_NF_TEST 1 + +#define RX_BATCH 1 +#define TX_BATCH 1 + +#define RX_PROCESSING 0 +#define TX_PROCESSING 0 + +thdid_t rx_tid = 0; +thdid_t tx_tid = 0; + +thdid_t virtio_tx_tid = 0; + +char tx_nf_buffer[4096]; +char rx_nf_buffer[4096]; + + +INCBIN(vmlinux, "guest/vmlinux.img") +INCBIN(bios, "guest/guest.img") + +/* Currently only have one VM component globally managed by this VMM */ +static struct vmrt_vm_comp *g_vm; +static struct vmrt_vm_comp *g_vm1; + +struct vmrt_vm_comp *vm_list[2] = {0}; + +#define VM_MAX_COMPS (2) +#define GUEST_MEM_SZ (310*1024*1024) + +SS_STATIC_SLAB(vm_comp, struct vmrt_vm_comp, VM_MAX_COMPS); +SS_STATIC_SLAB(vm_lapic, struct acrn_vlapic, VM_MAX_COMPS * VMRT_VM_MAX_VCPU); +SS_STATIC_SLAB(vcpu_inst_ctxt, struct instr_emul_ctxt, VM_MAX_COMPS * VMRT_VM_MAX_VCPU); +SS_STATIC_SLAB(vm_io_apic, struct acrn_vioapics, VM_MAX_COMPS); +SS_STATIC_SLAB(vcpu_mmio_req, struct acrn_mmio_request, VM_MAX_COMPS * VMRT_VM_MAX_VCPU); + +struct sync_lock vm_boot_lock; + +void +pause_handler(struct vmrt_vm_vcpu *vcpu) +{ + sched_thd_yield(); + GOTO_NEXT_INST(vcpu->shared_region); +} + +void +hlt_handler(struct vmrt_vm_vcpu *vcpu) +{ + sched_thd_yield(); + GOTO_NEXT_INST(vcpu->shared_region); +} + +void +mmio_init(struct vmrt_vm_vcpu *vcpu) +{ + vcpu->mmio_request = ss_vcpu_mmio_req_alloc(); + assert(vcpu->mmio_request); + + ss_vcpu_mmio_req_activate(vcpu->mmio_request); +} + +void +ioapic_init(struct vmrt_vm_comp *vm) +{ + vm->ioapic = ss_vm_io_apic_alloc(); + assert(vm->ioapic); + + vioapic_init(vm); + ss_vm_io_apic_activate(vm->ioapic); +} + +void +iinst_ctxt_init(struct vmrt_vm_vcpu *vcpu) +{ + vcpu->inst_ctxt = ss_vcpu_inst_ctxt_alloc(); + assert(vcpu->inst_ctxt); + + ss_vcpu_inst_ctxt_activate(vcpu->inst_ctxt); +} + +void +lapic_init(struct vmrt_vm_vcpu *vcpu) +{ + struct acrn_vlapic *vlapic = ss_vm_lapic_alloc(); + assert(vlapic); + + /* A vcpu can only have one vlapic */ + assert(vcpu->vlapic == NULL); + + vcpu->vlapic = vlapic; + vlapic->apic_page = vcpu->lapic_page; + vlapic->vcpu = vcpu; + + /* Status: enable APIC and vector be 0xFF */ + vlapic_reset(vlapic); + + ss_vm_lapic_activate(vlapic); + return; +} + +struct vmrt_vm_comp * +vm_comp_create(void) +{ + u64_t guest_mem_sz = GUEST_MEM_SZ; + u64_t num_vcpu = 1; + void *start; + void *end; + cbuf_t shm_id; + void *mem, *vm_mem; + size_t sz; + + struct vmrt_vm_comp *vm = ss_vm_comp_alloc(); + assert(vm); + + vmrt_vm_create(vm, "vmlinux-5.15", num_vcpu, guest_mem_sz); + + /* Allocate memory for the VM */ + shm_id = memmgr_shared_page_allocn_aligned(guest_mem_sz / PAGE_SIZE_4K, PAGE_SIZE_4K, (vaddr_t *)&mem); + /* Make the memory accessible to VM */ + int ret = memmgr_shared_page_map_aligned_in_vm(shm_id, PAGE_SIZE_4K, (vaddr_t *)&vm_mem, vm->comp_id); + vmrt_vm_mem_init(vm, mem); + printc("created VM with %u cpus, memory size: %luMB, at host vaddr: %p\n", vm->num_vcpu, vm->guest_mem_sz/1024/1024, vm->guest_addr); + + ss_vm_comp_activate(vm); + + start = &incbin_bios_start; + end = &incbin_bios_end; + sz = end - start + 1; + + printc("BIOS image start: %p, end: %p, size: %lu(%luKB)\n", start, end, sz, sz/1024); + vmrt_vm_data_copy_to(vm, start, sz, PAGE_SIZE_4K); + + start = &incbin_vmlinux_start; + end = &incbin_vmlinux_end; + sz = end - start + 1; + + printc("Guest Linux image start: %p, end: %p, size: %lu(%luMB)\n", start, end, sz, sz/1024/1024); + #define GUEST_IMAGE_ADDR 0x100000 + vmrt_vm_data_copy_to(vm, start, sz, GUEST_IMAGE_ADDR); + + ioapic_init(vm); + + printc("Guest(%s) image has been loaded into the VM component\n", vm->name); + + return vm; +} + +static void +tx_task(void) +{ + u16_t pkt_len; + shm_bm_objid_t objid; + + nic_shmem_map(netshmem_get_shm_id()); + + shm_bm_objid_t first_objid; + struct netshmem_pkt_buf *first_obj; + struct netshmem_pkt_pri *first_obj_pri; + struct netshmem_meta_tuple *pkt_arr; + u8_t tx_batch_ct = 0; + struct netshmem_pkt_buf *tx_obj; + u32_t ip; + + shm_bm_t tx_shmemd = 0; + tx_shmemd = netshmem_get_shm(); + ip = inet_addr("10.10.1.2"); + + nic_bind_port(ip, 1); + int svc_id = 60; + + nf_svc_update(cos_compid(), cos_thdid(), svc_id, g_vm); + + struct nf_session *session; + session = get_nf_session(svc_id); + nf_session_tx_update(session, tx_shmemd, cos_thdid()); + sync_sem_init(&session->tx_sem, 0); + + nf_tx_ring_buf_init(&session->nf_tx_ring_buf, NF_TX_PKT_RBUF_NUM, NF_TX_PKT_RING_SZ); + + virtio_tx_task(0); +} + +void +cos_init(void) +{ + + nf_svc_init(); + nf_sessions_init(); + + struct vmrt_vm_vcpu *vcpu; + g_vm = vm_comp_create(); + printc("created vm done:%d, %p\n", g_vm->comp_id, g_vm); + g_vm->vm_mac_id = 0; + + vm_list[0] = g_vm; +} + +void +cos_parallel_init(coreid_t cid, int init_core, int ncores) +{ + struct vmrt_vm_vcpu *vcpu; + + if (cid == 0) { + tx_tid = sched_thd_create((void *)tx_task, NULL); + netshmem_create(tx_tid); + + vmrt_vm_vcpu_init(g_vm, 0); + vcpu = vmrt_get_vcpu(g_vm, 0); + + lapic_init(vcpu); + iinst_ctxt_init(vcpu); + mmio_init(vcpu); + + } else { + + } + + return; +} + +void +parallel_main(coreid_t cid) +{ + struct vmrt_vm_vcpu *vcpu; + + if (cid == 0) { + printc("------STARTING VM------\n"); + sched_thd_block_timeout(0, time_now() + time_usec2cyc(10000000)); + vcpu = vmrt_get_vcpu(g_vm, 0); + vmrt_vm_vcpu_start(vcpu); + + sched_thd_param_set(tx_tid, sched_param_pack(SCHEDP_PRIO, NF_THD_PRIORITY)); + + } else if(cid == 1) { + + } + + while (1) + { + sched_thd_block(0); + /* Should not be here, or there is a bug in the scheduler! */ + assert(0); + } + + +} diff --git a/src/components/implementation/simple_vmm/noop_nf/vcpuid.c b/src/components/implementation/simple_vmm/noop_nf/vcpuid.c new file mode 100644 index 0000000000..0335ccb596 --- /dev/null +++ b/src/components/implementation/simple_vmm/noop_nf/vcpuid.c @@ -0,0 +1,766 @@ +#include +#include +#include +#include +#include +#include +#include "cpu.h" +#include "cpuid.h" +#include "vcpuid.h" +#include "cpu_caps.h" +#include "apicreg.h" + +/* + * Copyright (C) 2018-2022 Intel Corporation. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +static struct cpuinfo_x86 boot_cpu_data; +static struct vcpuid_entry vcpuid_entries[MAX_VM_VCPUID_ENTRIES]; +static u32_t g_entry_nr = 0, g_vcpuid_level, g_vcpuid_xlevel; +void memcpy_erms(void *d, const void *s, size_t slen) +{ + asm volatile ("rep; movsb" + : "=&D"(d), "=&S"(s) + : "c"(slen), "0" (d), "1" (s) + : "memory"); +} + +static uint64_t get_address_mask(uint8_t limit) +{ + return ((1UL << limit) - 1UL) & PAGE_MASK; +} + +/* + * @brief Copies at most slen bytes from src address to dest address, up to dmax. + * + * INPUTS + * + * @param[in] d pointer to Destination address + * @param[in] dmax maximum length of dest + * @param[in] s pointer to Source address + * @param[in] slen maximum number of bytes of src to copy + * + * @return 0 for success and -1 for runtime-constraint violation. + */ +int32_t memcpy_s(void *d, size_t dmax, const void *s, size_t slen) +{ + int32_t ret = -1; + + if ((d != NULL) && (s != NULL) && (dmax >= slen) && ((d > (s + slen)) || (s > (d + dmax)))) { + if (slen != 0U) { + memcpy_erms(d, s, slen); + } + ret = 0; + } else { + (void)memset(d, 0U, dmax); + } + + return ret; +} + +uint32_t get_tsc_khz(void) +{ + //3100.000 MHz + return 3100000; +} + +struct cpuinfo_x86 *get_pcpu_info(void) +{ + return &boot_cpu_data; +} + +/** + * initialization of virtual CPUID leaf + */ +static void init_vcpuid_entry(uint32_t leaf, uint32_t subleaf, + uint32_t flags, struct vcpuid_entry *entry) +{ + struct cpuinfo_x86 *cpu_info; + + entry->leaf = leaf; + entry->subleaf = subleaf; + entry->flags = flags; + + switch (leaf) { + + case 0x06U: + cpuid_subleaf(leaf, subleaf, &entry->eax, &entry->ebx, &entry->ecx, &entry->edx); + entry->eax &= ~(CPUID_EAX_DTHERM | CPUID_EAX_HWP | CPUID_EAX_HWP_N | CPUID_EAX_HWP_AW | CPUID_EAX_HWP_EPP | CPUID_EAX_HWP_PLR); + entry->ecx &= ~CPUID_ECX_HCFC; + break; + + case 0x07U: + if (subleaf == 0U) { + cpuid_subleaf(leaf, subleaf, &entry->eax, &entry->ebx, &entry->ecx, &entry->edx); + + entry->ebx &= ~(CPUID_EBX_PQM | CPUID_EBX_PQE); + + /* mask LA57 */ + entry->ecx &= ~CPUID_ECX_LA57; + + /* mask CPUID_EDX_IBRS_IBPB */ + entry->edx &= ~CPUID_EDX_IBRS_IBPB; + + /* mask SGX and SGX_LC */ + entry->ebx &= ~CPUID_EBX_SGX; + entry->ecx &= ~CPUID_ECX_SGX_LC; + + /* mask MPX */ + entry->ebx &= ~CPUID_EBX_MPX; + + /* mask Intel Processor Trace, since 14h is disabled */ + entry->ebx &= ~CPUID_EBX_PROC_TRC; + + /* mask CET shadow stack and indirect branch tracking */ + entry->ecx &= ~CPUID_ECX_CET_SS; + entry->edx &= ~CPUID_EDX_CET_IBT; + + // entry->ebx &= ~CPUID_EBX_FSGSBASE; + + entry->ebx &= ~CPUID_EBX_SMEP; + + entry->ebx &= ~CPUID_EBX_SMAP; + + entry->ecx &= ~CPUID_ECX_UMIP; + + entry->ecx &= ~CPUID_ECX_PKE; + + entry->ecx &= ~CPUID_ECX_LA57; + + entry->ecx &= ~CPUID_ECX_PKS; + } else { + entry->eax = 0U; + entry->ebx = 0U; + entry->ecx = 0U; + entry->edx = 0U; + } + break; + + case 0x16U: + cpu_info = get_pcpu_info(); + if (cpu_info->cpuid_level >= 0x16U) { + /* + * call the cpuid when 0x16 is supported, + * but nested vmx will not return correct values, + * thus use the second way here. If you are using + * the real hardware, can test if this will work. + */ + // cpuid_subleaf(leaf, subleaf, &entry->eax, &entry->ebx, &entry->ecx, &entry->edx); + + /* Use the tsc to derive the emulated 0x16U cpuid. */ + entry->eax = (uint32_t) (get_tsc_khz() / 1000U); + entry->ebx = entry->eax; + /* Bus frequency: hard coded to 100M */ + entry->ecx = 100U; + entry->edx = 0U; + + } else { + /* Use the tsc to derive the emulated 0x16U cpuid. */ + entry->eax = (uint32_t) (get_tsc_khz() / 1000U); + entry->ebx = entry->eax; + /* Bus frequency: hard coded to 100M */ + entry->ecx = 100U; + entry->edx = 0U; + } + break; + + /* + * Leaf 0x40000000 + * This leaf returns the CPUID leaf range supported by the + * hypervisor and the hypervisor vendor signature. + * + * EAX: The maximum input value for CPUID supported by the + * hypervisor. + * EBX, ECX, EDX: Hypervisor vendor ID signature. + */ + case 0x40000000U: + { + static const char sig[12] = "ACRNACRNACRN"; + const uint32_t *sigptr = (const uint32_t *)sig; + + entry->eax = 0x40000010U; + entry->ebx = sigptr[0]; + entry->ecx = sigptr[1]; + entry->edx = sigptr[2]; + break; + } + + /* + * Leaf 0x40000001 - ACRN extended information. + * This leaf returns the extended information of ACRN hypervisor. + * + * EAX: Guest capability flags + * EBX, ECX, EDX: RESERVED (reserved fields are set to zero). + */ + case 0x40000001U: + entry->eax = 0U; + entry->ebx = 0U; + entry->ecx = 0U; + entry->edx = 0U; + break; + + /* + * Leaf 0x40000010 - Timing Information. + * This leaf returns the current TSC frequency and + * current Bus frequency in kHz. + * + * EAX: (Virtual) TSC frequency in kHz. + * TSC frequency is calculated from PIT in ACRN + * EBX, ECX, EDX: RESERVED (reserved fields are set to zero). + */ + case 0x40000010U: + entry->eax = get_tsc_khz(); + entry->ebx = 0U; + entry->ecx = 0U; + entry->edx = 0U; + break; + + default: + cpuid_subleaf(leaf, subleaf, &entry->eax, &entry->ebx, &entry->ecx, &entry->edx); + break; + } +} + +static inline int32_t set_vcpuid_entry(struct vcpuid_entry vcpuid_entries[], + const struct vcpuid_entry *entry) +{ + struct vcpuid_entry *tmp; + size_t entry_size = sizeof(struct vcpuid_entry); + int32_t ret; + + if (g_entry_nr == MAX_VM_VCPUID_ENTRIES) { + printc("%s, vcpuid entry over MAX_VM_VCPUID_ENTRIES(%u)\n", __func__, MAX_VM_VCPUID_ENTRIES); + ret = -ENOMEM; + } else { + tmp = &vcpuid_entries[g_entry_nr]; + g_entry_nr++; + (void)memcpy_s(tmp, entry_size, entry, entry_size); + ret = 0; + } + return ret; +} + +static inline bool is_percpu_related(uint32_t leaf) +{ + return ((leaf == 0x1U) || (leaf == 0xbU) || (leaf == 0xdU) || (leaf == 0x19U) || (leaf == 0x80000001U) || (leaf == 0x2U) || (leaf == 0x1aU)); +} + +static int32_t set_vcpuid_extended_function(void) +{ + uint32_t i, limit; + struct vcpuid_entry entry; + int32_t result; + + init_vcpuid_entry(0x40000000U, 0U, 0U, &entry); + result = set_vcpuid_entry(vcpuid_entries, &entry); + if (result == 0) { + init_vcpuid_entry(0x40000001U, 0U, 0U, &entry); + + result = set_vcpuid_entry(vcpuid_entries, &entry); + } + + if (result == 0) { + init_vcpuid_entry(0x40000010U, 0U, 0U, &entry); + result = set_vcpuid_entry(vcpuid_entries, &entry); + } + + if (result == 0) { + init_vcpuid_entry(0x80000000U, 0U, 0U, &entry); + result = set_vcpuid_entry(vcpuid_entries, &entry); + } + + if (result == 0) { + limit = entry.eax; + g_vcpuid_xlevel = limit; + for (i = 0x80000002U; i <= limit; i++) { + init_vcpuid_entry(i, 0U, 0U, &entry); + result = set_vcpuid_entry(vcpuid_entries, &entry); + if (result != 0) { + break; + } + } + } + + return result; +} + +void init_pcpu_capabilities(void) +{ + uint32_t eax, unused; + uint32_t family_id, model_id, displayfamily, displaymodel; + + cpuid_subleaf(CPUID_VENDORSTRING, 0x0U, + &boot_cpu_data.cpuid_level, + &unused, &unused, &unused); + + cpuid_subleaf(CPUID_FEATURES, 0x0U, &eax, &unused, + &boot_cpu_data.cpuid_leaves[FEAT_1_ECX], + &boot_cpu_data.cpuid_leaves[FEAT_1_EDX]); + + /* SDM Vol.2A 3-211 states the algorithm to calculate DisplayFamily and DisplayModel */ + family_id = (eax >> 8U) & 0xfU; + displayfamily = family_id; + if (family_id == 0xFU) { + displayfamily += ((eax >> 20U) & 0xffU); + } + boot_cpu_data.displayfamily = (uint8_t)displayfamily; + + model_id = (eax >> 4U) & 0xfU; + displaymodel = model_id; + if ((family_id == 0x06U) || (family_id == 0xFU)) { + displaymodel += ((eax >> 16U) & 0xfU) << 4U; + } + boot_cpu_data.displaymodel = (uint8_t)displaymodel; + + + cpuid_subleaf(CPUID_EXTEND_FEATURE, 0x0U, &unused, + &boot_cpu_data.cpuid_leaves[FEAT_7_0_EBX], + &boot_cpu_data.cpuid_leaves[FEAT_7_0_ECX], + &boot_cpu_data.cpuid_leaves[FEAT_7_0_EDX]); + + cpuid_subleaf(CPUID_EXTEND_FEATURE, 0x2U, &unused, &unused, &unused, + &boot_cpu_data.cpuid_leaves[FEAT_7_2_EDX]); + + cpuid_subleaf(CPUID_MAX_EXTENDED_FUNCTION, 0x0U, + &boot_cpu_data.extended_cpuid_level, + &unused, &unused, &unused); + + if (boot_cpu_data.extended_cpuid_level >= CPUID_EXTEND_FUNCTION_1) { + cpuid_subleaf(CPUID_EXTEND_FUNCTION_1, 0x0U, &unused, &unused, + &boot_cpu_data.cpuid_leaves[FEAT_8000_0001_ECX], + &boot_cpu_data.cpuid_leaves[FEAT_8000_0001_EDX]); + } + + if (boot_cpu_data.extended_cpuid_level >= CPUID_EXTEND_INVA_TSC) { + cpuid_subleaf(CPUID_EXTEND_INVA_TSC, 0x0U, &eax, &unused, &unused, + &boot_cpu_data.cpuid_leaves[FEAT_8000_0007_EDX]); + } + + if (boot_cpu_data.extended_cpuid_level >= CPUID_EXTEND_ADDRESS_SIZE) { + cpuid_subleaf(CPUID_EXTEND_ADDRESS_SIZE, 0x0U, &eax, + &boot_cpu_data.cpuid_leaves[FEAT_8000_0008_EBX], + &unused, &unused); + + /* EAX bits 07-00: #Physical Address Bits + * bits 15-08: #Linear Address Bits + */ + boot_cpu_data.virt_bits = (uint8_t)((eax >> 8U) & 0xffU); + boot_cpu_data.phys_bits = (uint8_t)(eax & 0xffU); + boot_cpu_data.physical_address_mask = + get_address_mask(boot_cpu_data.phys_bits); + } + + // detect_pcpu_cap(); +} + +int32_t +set_vcpuid_entries(void) +{ + int32_t result; + struct vcpuid_entry entry; + uint32_t limit; + uint32_t i, j; + struct cpuinfo_x86 *cpu_info = get_pcpu_info(); + + init_vcpuid_entry(0U, 0U, 0U, &entry); + + if (cpu_info->cpuid_level < 0x16U) { + /* The cpuid with zero leaf returns the max level. Emulate that the 0x16U is supported */ + entry.eax = 0x16U; + } + result = set_vcpuid_entry(vcpuid_entries, &entry); + if (result == 0) { + limit = entry.eax; + g_vcpuid_level = limit; + + for (i = 1U; i <= limit; i++) { + if (is_percpu_related(i)) { + continue; + } + + switch (i) { + case 0x04U: + for (j = 0U; ; j++) { + init_vcpuid_entry(i, j, CPUID_CHECK_SUBLEAF, &entry); + if (entry.eax == 0U) { + break; + } + + result = set_vcpuid_entry(vcpuid_entries, &entry); + if (result != 0) { + /* wants to break out of switch */ + break; + } + } + break; + /* MONITOR/MWAIT */ + case 0x05U: + break; + case 0x07U: + init_vcpuid_entry(i, 0U, CPUID_CHECK_SUBLEAF, &entry); + if (entry.eax != 0U) { + printc("vcpuid: only support subleaf 0 for cpu leaf 07h\n"); + entry.eax = 0U; + } + /* mask CPUID_EDX_IBRS_IBPB */ + entry.edx &= ~CPUID_EDX_IBRS_IBPB; + + entry.ecx &= ~CPUID_ECX_WAITPKG; + + result = set_vcpuid_entry(vcpuid_entries, &entry); + break; + case 0x12U: + break; + /* These features are disabled */ + /* PMU is not supported except for core partition VM, like RTVM */ + case 0x0aU: + break; + + /* Intel RDT */ + case 0x0fU: + break; + /* Intel RDT */ + case 0x10U: + break; + + /* Intel Processor Trace */ + case 0x14U: + /* PCONFIG */ + case 0x1bU: + /* V2 Extended Topology Enumeration Leaf */ + case 0x1fU: + break; + default: + init_vcpuid_entry(i, 0U, 0U, &entry); + result = set_vcpuid_entry(vcpuid_entries, &entry); + break; + } + + /* WARNING: do nothing between break out of switch and before this check */ + if (result != 0) { + /* break out of for */ + break; + } + } + + if (result == 0) { + result = set_vcpuid_extended_function(); + } + } + + return result; +} + +static inline const struct vcpuid_entry *local_find_vcpuid_entry(uint32_t leaf, uint32_t subleaf) +{ + uint32_t i = 0U, nr, half; + const struct vcpuid_entry *found_entry = NULL; + + nr = g_entry_nr; + half = nr >> 1U; + if (vcpuid_entries[half].leaf < leaf) { + i = half; + } + + for (; i < nr; i++) { + const struct vcpuid_entry *tmp = (const struct vcpuid_entry *)(&vcpuid_entries[i]); + + if (tmp->leaf < leaf) { + continue; + } else if (tmp->leaf == leaf) { + if (((tmp->flags & CPUID_CHECK_SUBLEAF) != 0U) && (tmp->subleaf != subleaf)) { + continue; + } + found_entry = tmp; + break; + } else { + /* tmp->leaf > leaf */ + break; + } + } + + return found_entry; +} + +static inline const struct vcpuid_entry *find_vcpuid_entry(uint32_t leaf_arg, uint32_t subleaf) +{ + const struct vcpuid_entry *entry; + uint32_t leaf = leaf_arg; + + entry = local_find_vcpuid_entry(leaf, subleaf); + if (entry == NULL) { + uint32_t limit; + + if ((leaf & 0x80000000U) != 0U) { + limit = g_vcpuid_xlevel; + } else { + limit = g_vcpuid_level; + } + + if (leaf > limit) { + /* Intel documentation states that invalid EAX input + * will return the same information as EAX=cpuid_level + * (Intel SDM Vol. 2A - Instruction Set Reference - + * CPUID) + */ + leaf = g_vcpuid_level; + entry = local_find_vcpuid_entry(leaf, subleaf); + } + + } + + return entry; +} + +static void guest_cpuid_01h(struct vmrt_vm_vcpu *vcpu, uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx) +{ + uint32_t apicid = 1; + + cpuid_subleaf(0x1U, 0x0U, eax, ebx, ecx, edx); + /* Patching initial APIC ID */ + *ebx &= ~APIC_ID_MASK; + *ebx |= (apicid << APIC_ID_SHIFT); + + *edx &= ~CPUID_EDX_MTRR; + + /* mask Safer Mode Extension */ + *ecx &= ~CPUID_ECX_SMX; + + *ecx &= ~CPUID_ECX_EST; + + /* mask SDBG for silicon debug */ + *ecx &= ~CPUID_ECX_SDBG; + + /* mask VMX to guest OS */ + *ecx &= ~CPUID_ECX_VMX; + + /* set Hypervisor Present Bit */ + *ecx |= CPUID_ECX_HV; + + /* Warning: should we support pcid in VM? Let's begin with not setting it first */ + *ecx &= ~CPUID_ECX_PCID; + + /* + * Hide MONITOR/MWAIT. + */ + // *ecx &= ~CPUID_ECX_MONITOR; + + /* Warning: should we support CPUID_ECX_OSXSAVE in VM? Let's begin with not setting it first */ + *ecx &= ~CPUID_ECX_OSXSAVE; + if ((*ecx & CPUID_ECX_XSAVE) != 0U) { + uint64_t cr4; + /*read guest CR4*/ + cr4 = vcpu->shared_region->cr4; + if ((cr4 & CR4_OSXSAVE) != 0UL) { + *ecx |= CPUID_ECX_OSXSAVE; + } + } + + /* disable thermal ctrl*/ + *edx &= ~CPUID_EDX_TM1; + + *edx &= ~CPUID_EDX_VME; + + *edx &= ~CPUID_EDX_DE; + + *edx &= ~CPUID_EDX_PSE; + + /* Warning: it seems that PAE, PGE, FXSR should be supported */ + // *edx &= ~CPUID_EDX_PAE; + + // *edx &= ~CPUID_EDX_PGE; + + // *edx &= ~CPUID_EDX_FXSR; + + /* Don't support complex apic */ + *ecx &= ~CPUID_ECX_x2APIC; + + /* DS/PEBS is not supported except for core partition VM, like RTVM */ + /* mask Debug Store feature */ + *ecx &= ~(CPUID_ECX_DTES64 | CPUID_ECX_DS_CPL); + + /* mask PDCM: Perfmon and Debug Capability */ + *ecx &= ~CPUID_ECX_PDCM; + + /* mask Debug Store feature */ + *edx &= ~CPUID_EDX_DTES; +} + +static void guest_cpuid_0bh(uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx) +{ + /* Forward host cpu topology to the guest, guest will know the native platform information such as host cpu topology here */ + cpuid_subleaf(0x0BU, *ecx, eax, ebx, ecx, edx); + + /* Patching X2APIC */ + *edx = 1; +} + +static void guest_cpuid_0dh(uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx) +{ + uint32_t subleaf = *ecx; + + cpuid_subleaf(0x0dU, subleaf, eax, ebx, ecx, edx); + switch (subleaf) { + case 0U: + /* SDM Vol.1 17-2, On processors that do not support Intel MPX, + * CPUID.(EAX=0DH,ECX=0):EAX[3] and + * CPUID.(EAX=0DH,ECX=0):EAX[4] will both be 0 */ + *eax &= ~(CPUID_EAX_XCR0_BNDREGS | CPUID_EAX_XCR0_BNDCSR); + break; + case 1U: + *ecx &= ~(CPUID_ECX_CET_U_STATE | CPUID_ECX_CET_S_STATE); + break; + case 11U: + case 12U: + *eax = 0U; + *ebx = 0U; + *ecx = 0U; + *edx = 0U; + break; + default: + /* No emulation for other leaves */ + break; + } +} + +static void guest_cpuid_19h(uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx) +{ + *eax = 0U; + *ebx = 0U; + *ecx = 0U; + *edx = 0U; +} + +static void guest_cpuid_80000001h(const struct vmrt_vm_vcpu *vcpu, + uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx) +{ + const struct vcpuid_entry *entry_check = find_vcpuid_entry(0x80000000U, 0); + uint64_t guest_ia32_misc_enable = 0x800001; + uint32_t leaf = 0x80000001U; + + if ((entry_check != NULL) && (entry_check->eax >= leaf)) { + cpuid_subleaf(leaf, 0x0U, eax, ebx, ecx, edx); + /* SDM Vol4 2.1, XD Bit Disable of MSR_IA32_MISC_ENABLE + * When set to 1, the Execute Disable Bit feature (XD Bit) is disabled and the XD Bit + * extended feature flag will be clear (CPUID.80000001H: EDX[20]=0) + */ + if ((guest_ia32_misc_enable & MSR_IA32_MISC_ENABLE_XD_DISABLE) != 0UL) { + *edx = *edx & ~CPUID_EDX_XD_BIT_AVIL; + } + } else { + *eax = 0U; + *ebx = 0U; + *ecx = 0U; + *edx = 0U; + } +} + +static void guest_limit_cpuid(const struct vmrt_vm_vcpu *vcpu, uint32_t leaf, + uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx) +{ + uint64_t guest_ia32_misc_enable = 0x800001; + + if ((guest_ia32_misc_enable & MSR_IA32_MISC_ENABLE_LIMIT_CPUID) != 0UL) { + /* limit the leaf number to 2 */ + if (leaf == 0U) { + *eax = 2U; + } else if (leaf > 2U) { + *eax = 0U; + *ebx = 0U; + *ecx = 0U; + *edx = 0U; + } else { + /* In this case, leaf is 1U, return the cpuid value get above */ + } + } +} + +void guest_cpuid(struct vmrt_vm_vcpu *vcpu, uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx) +{ + uint32_t leaf = *eax; + uint32_t subleaf = *ecx; + + /* vm related */ + if (!is_percpu_related(leaf)) { + const struct vcpuid_entry *entry = find_vcpuid_entry(leaf, subleaf); + + if (entry != NULL) { + *eax = entry->eax; + *ebx = entry->ebx; + *ecx = entry->ecx; + *edx = entry->edx; + } else { + *eax = 0U; + *ebx = 0U; + *ecx = 0U; + *edx = 0U; + } + } else { + /* percpu related */ + switch (leaf) { + case 0x01U: + guest_cpuid_01h(vcpu, eax, ebx, ecx, edx); + break; + + case 0x0bU: + guest_cpuid_0bh(eax, ebx, ecx, edx); + break; + + case 0x0dU: + guest_cpuid_0dh(eax, ebx, ecx, edx); + break; + + case 0x19U: + guest_cpuid_19h(eax, ebx, ecx, edx); + break; + + case 0x80000001U: + guest_cpuid_80000001h(vcpu, eax, ebx, ecx, edx); + break; + + default: + /* + * In this switch statement, leaf 0x01/0x0b/0x0d/0x19/0x80000001 + * shall be handled specifically. All the other cases + * just return physical value. + */ + cpuid_subleaf(leaf, *ecx, eax, ebx, ecx, edx); + break; + } + } + + guest_limit_cpuid(vcpu, leaf, eax, ebx, ecx, edx); +} + +void +cpuid_handler(struct vmrt_vm_vcpu *vcpu) +{ + uint64_t rax, rbx, rcx, rdx; + volatile struct vm_vcpu_shared_region *regs = vcpu->shared_region; + int test = 0; + + rax = regs->ax; + rbx = regs->bx; + rcx = regs->cx; + rdx = regs->dx; + + guest_cpuid(vcpu, (uint32_t *)&rax, (uint32_t *)&rbx, (uint32_t *)&rcx, (uint32_t *)&rdx); + + regs->ax = rax; + regs->bx = rbx; + regs->cx = rcx; + regs->dx = rdx; + + GOTO_NEXT_INST(regs); + + return; +} + +static void __attribute__((constructor)) +init(void) +{ + init_pcpu_capabilities(); + set_vcpuid_entries(); +} diff --git a/src/components/implementation/simple_vmm/noop_nf/vcpuid.h b/src/components/implementation/simple_vmm/noop_nf/vcpuid.h new file mode 100644 index 0000000000..9124eedb0e --- /dev/null +++ b/src/components/implementation/simple_vmm/noop_nf/vcpuid.h @@ -0,0 +1,35 @@ +/* + * Copyright (C) 2018-2022 Intel Corporation. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef VCPUID_H_ +#define VCPUID_H_ +#include + +#define CPUID_CHECK_SUBLEAF (1U << 0U) +#define MAX_VM_VCPUID_ENTRIES 64U + +/* Guest capability flags reported by CPUID */ +#define GUEST_CAPS_PRIVILEGE_VM (1U << 0U) + +struct vcpuid_entry { + uint32_t eax; + uint32_t ebx; + uint32_t ecx; + uint32_t edx; + uint32_t leaf; + uint32_t subleaf; + uint32_t flags; + uint32_t padding; +}; + +#define FEATURE_WORDS 16U + +int32_t set_vcpuid_entries(void); +void guest_cpuid(struct vmrt_vm_vcpu *vcpu, + uint32_t *eax, uint32_t *ebx, + uint32_t *ecx, uint32_t *edx); + +#endif /* VCPUID_H_ */ diff --git a/src/components/implementation/simple_vmm/noop_nf/vio.c b/src/components/implementation/simple_vmm/noop_nf/vio.c new file mode 100644 index 0000000000..b63253b7b1 --- /dev/null +++ b/src/components/implementation/simple_vmm/noop_nf/vio.c @@ -0,0 +1,106 @@ +#include +#include "devices/serial/serial.h" +#include "devices/vpci/vpci.h" +#include "devices/vpic/vpic.h" +#include "devices/vrtc/vrtc.h" +#include "devices/vps2/vps2.h" +#include "devices/vpci/virtio_net_io.h" + +void +io_handler(struct vmrt_vm_vcpu *vcpu) +{ + volatile struct vm_vcpu_shared_region *regs = vcpu->shared_region; + u64_t qualification = regs->qualification; + + u16_t port_id = (qualification >> 16) & 0XFFFF; + u8_t access_sz = qualification & 7; + u8_t access_dir = (qualification >> 3) & 1; + + assert(!((qualification >> 4) & 1)); + assert(!((qualification >> 5) & 1)); + + switch (access_sz) + { + case 0: + access_sz = IO_BYTE; + break; + case 1: + access_sz = IO_WORD; + break; + case 3: + access_sz = IO_LONG; + break; + default: + VM_PANIC(vcpu); + + } + if (port_id == 0x3ff || port_id == 0x2f9 || port_id == 0x2fc || port_id == 0x2fb || port_id == 0x2fa || port_id == 0x2ff || port_id == 0x2f8 || port_id == 0x3e9 || port_id == 0x3ec || port_id == 0x3eb || port_id == 0x3ea || port_id == 0x3ef || port_id == 0x3e8 + || port_id == 0x2e9 || port_id == 0x2ec || port_id == 0x2eb || port_id == 0x2ee) { + /* TODO: fix these io ports emulcation */ + goto done; + } + if (port_id <= SERIAL_PORT_MAX && port_id >= SERIAL_PORT_MIN) { + serial_handler(port_id, access_dir, access_sz, vcpu); + goto done; + } + + /* Fast path for virtio-net processing */ + switch (port_id) + { + case VIRTIO_NET_DEV_FEATURES: + case VIRTIO_NET_GUEST_FEATURES: + case VIRTIO_NET_QUEUE_ADDR: + case VIRTIO_NET_QUEUE_SIZE: + case VIRTIO_NET_QUEUE_SELECT: + case VIRTIO_NET_QUEUE_NOTIFY: + case VIRTIO_NET_DEV_STATUS: + case VIRTIO_NET_ISR: + case VIRTIO_NET_MAC: + case VIRTIO_NET_MAC1: + case VIRTIO_NET_MAC2: + case VIRTIO_NET_MAC3: + case VIRTIO_NET_MAC4: + case VIRTIO_NET_MAC5: + case VIRTIO_NET_STATUS: + case VIRTIO_NET_STATUS_H: + virtio_net_handler(port_id, access_dir, access_sz, vcpu); + goto done; + default: + break; + } + + switch (port_id) + { + case CMOS_CMD_PORT: + case CMOS_DATA_PORT: + vrtc_handler(port_id, access_dir, access_sz, vcpu); + goto done; + case PIC_MASTER_CMD_PORT: + case PIC_MASTER_DATA_PORT: + case PIC_SLAVE_CMD_PORT: + case PIC_SLAVE_DATA_PORT: + case PIC_ELCR1: + case PIC_ELCR2: + vpic_handler(port_id, access_dir, access_sz, vcpu); + goto done; + case PS2_CONTROL_PORT_A: + case PS2_CONTROL_PORT_B: + ps2_handler(port_id, access_dir, access_sz, vcpu); + goto done; + case VPCI_CONFIG_ADDRESS: + case VPCI_CONFIG_DATA0: + case VPCI_CONFIG_DATA1: + case VPCI_CONFIG_DATA2: + case VPCI_CONFIG_DATA3: + case VPCI_MECHANISM_CONTROL_REG: + vpci_handler(port_id, access_dir, access_sz, vcpu); + goto done; + } + + printc("port id:%x, sz:%d, dir:%d\n", port_id, access_sz, access_dir); + VM_PANIC(vcpu); +done: + GOTO_NEXT_INST(regs); + + return; +} \ No newline at end of file diff --git a/src/components/implementation/simple_vmm/noop_nf/vioapic.c b/src/components/implementation/simple_vmm/noop_nf/vioapic.c new file mode 100644 index 0000000000..1dfcdbdc43 --- /dev/null +++ b/src/components/implementation/simple_vmm/noop_nf/vioapic.c @@ -0,0 +1,564 @@ +/*- + * Copyright (c) 2013 Tycho Nightingale + * Copyright (c) 2013 Neel Natu + * Copyright (c) 2017-2022 Intel Corporation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#define pr_prefix "vioapic: " + +#include +#include +#include +#include +#include +#include +#include +#include + + +#define RTBL_RO_BITS ((uint32_t)0x00004000U | (uint32_t)0x00001000U) /*Remote IRR and Delivery Status bits*/ + +#define DBG_LEVEL_VIOAPIC 6U +#define ACRN_IOAPIC_VERSION 0x11U + +#define MASK_ALL_INTERRUPTS 0x0001000000010000UL + +static inline struct acrn_vioapics *vm_ioapics(const struct vmrt_vm_comp *vm) +{ + return (struct acrn_vioapics *)(vm->ioapic); +} + +/** + * @pre pin < vioapic->chipinfo.nr_pins + */ +static void +vioapic_generate_intr(struct acrn_single_vioapic *vioapic, uint32_t pin) +{ + uint32_t vector, dest, delmode; + union ioapic_rte rte; + bool level, phys; + + rte = vioapic->rtbl[pin]; + + if (rte.bits.intr_mask == IOAPIC_RTE_MASK_SET) { + printc("ioapic pin%hhu: masked\n", pin); + } else { + phys = (rte.bits.dest_mode == IOAPIC_RTE_DESTMODE_PHY); + delmode = rte.bits.delivery_mode; + level = (rte.bits.trigger_mode == IOAPIC_RTE_TRGRMODE_LEVEL); + + /* For level trigger irq, avoid send intr if + * previous one hasn't received EOI + */ + if (!level || (vioapic->rtbl[pin].bits.remote_irr == 0UL)) { + if (level) { + vioapic->rtbl[pin].bits.remote_irr = IOAPIC_RTE_REM_IRR; + } + vector = rte.bits.vector; + dest = rte.bits.dest_field; + vlapic_receive_intr(vioapic->vm, level, dest, phys, delmode, vector, false); + } + } +} + +/** + * @pre pin < vioapic->chipinfo.nr_pins + */ +static void +vioapic_set_pinstate(struct acrn_single_vioapic *vioapic, uint32_t pin, uint32_t level) +{ + uint32_t old_lvl; + union ioapic_rte rte; + + if (pin < vioapic->chipinfo.nr_pins) { + rte = vioapic->rtbl[pin]; + old_lvl = (uint32_t)bitmap_test((uint16_t)(pin & 0x3FU), &vioapic->pin_state[pin >> 6U]); + if (level == 0U) { + /* clear pin_state and deliver interrupt according to polarity */ + bitmap_clear_nolock((uint16_t)(pin & 0x3FU), &vioapic->pin_state[pin >> 6U]); + if ((rte.bits.intr_polarity == IOAPIC_RTE_INTPOL_ALO) + && (old_lvl != level)) { + vioapic_generate_intr(vioapic, pin); + } + } else { + /* set pin_state and deliver intrrupt according to polarity */ + bitmap_set_nolock((uint16_t)(pin & 0x3FU), &vioapic->pin_state[pin >> 6U]); + if ((rte.bits.intr_polarity == IOAPIC_RTE_INTPOL_AHI) + && (old_lvl != level)) { + vioapic_generate_intr(vioapic, pin); + } + } + } +} + + +struct acrn_single_vioapic * +vgsi_to_vioapic_and_vpin(const struct vmrt_vm_comp *vm, uint32_t vgsi, uint32_t *vpin) +{ + struct acrn_single_vioapic *vioapic; + uint8_t vioapic_index = 0U; + + if (vpin != NULL) { + *vpin = vgsi; + } + + vioapic = (struct acrn_single_vioapic *)&(vm_ioapics(vm)->vioapic_array[vioapic_index]); + + return vioapic; +} + +/** + * @brief Set vIOAPIC IRQ line status. + * + * Similar with vioapic_set_irqline_lock(),but would not make sure + * operation be done with ioapic lock. + * + * @param[in] vm Pointer to target VM + * @param[in] vgsi Target GSI number + * @param[in] operation Action options: GSI_SET_HIGH/GSI_SET_LOW/ + * GSI_RAISING_PULSE/GSI_FALLING_PULSE + * + * @pre vgsi < get_vm_gsicount(vm) + * @pre vm != NULL + * @return None + */ +void +vioapic_set_irqline_nolock(const struct vmrt_vm_comp *vm, uint32_t vgsi, uint32_t operation) +{ + struct acrn_single_vioapic *vioapic; + uint32_t pin; + + vioapic = vgsi_to_vioapic_and_vpin(vm, vgsi, &pin); + + switch (operation) { + case GSI_SET_HIGH: + vioapic_set_pinstate(vioapic, pin, 1U); + break; + case GSI_SET_LOW: + vioapic_set_pinstate(vioapic, pin, 0U); + break; + case GSI_RAISING_PULSE: + vioapic_set_pinstate(vioapic, pin, 1U); + vioapic_set_pinstate(vioapic, pin, 0U); + break; + case GSI_FALLING_PULSE: + vioapic_set_pinstate(vioapic, pin, 0U); + vioapic_set_pinstate(vioapic, pin, 1U); + break; + default: + /* + * The function caller could guarantee the pre condition. + */ + break; + } +} + +/** + * @brief Set vIOAPIC IRQ line status. + * + * @param[in] vm Pointer to target VM + * @param[in] vgsi Target GSI number + * @param[in] operation Action options: GSI_SET_HIGH/GSI_SET_LOW/ + * GSI_RAISING_PULSE/GSI_FALLING_PULSE + * + * @pre vgsi < get_vm_gsicount(vm) + * @pre vm != NULL + * + * @return None + */ +void +vioapic_set_irqline_lock(const struct vmrt_vm_comp *vm, uint32_t vgsi, uint32_t operation) +{ + uint64_t rflags; + + vioapic_set_irqline_nolock(vm, vgsi, operation); +} + +static uint32_t +vioapic_indirect_read(struct acrn_single_vioapic *vioapic, uint32_t addr) +{ + uint32_t regnum, ret = 0U; + uint32_t pin, pincount = vioapic->chipinfo.nr_pins; + + regnum = addr & 0xffU; + switch (regnum) { + case IOAPIC_ID: + ret = (uint32_t)vioapic->chipinfo.id << IOAPIC_ID_SHIFT; + break; + case IOAPIC_VER: + ret = ((pincount - 1U) << MAX_RTE_SHIFT) | ACRN_IOAPIC_VERSION; + break; + case IOAPIC_ARB: + ret = (uint32_t)vioapic->chipinfo.id << IOAPIC_ID_SHIFT; + break; + default: + /* + * In this switch statement, regnum shall either be IOAPIC_ID or + * IOAPIC_VER or IOAPIC_ARB. + * All the other cases will be handled properly later after this + * switch statement. + */ + break; + } + + /* redirection table entries */ + if ((regnum >= IOAPIC_REDTBL) && + (regnum < (IOAPIC_REDTBL + (pincount * 2U)))) { + uint32_t addr_offset = regnum - IOAPIC_REDTBL; + uint32_t rte_offset = addr_offset >> 1U; + pin = rte_offset; + if ((addr_offset & 0x1U) != 0U) { + ret = vioapic->rtbl[pin].u.hi_32; + } else { + ret = vioapic->rtbl[pin].u.lo_32; + } + } + + return ret; +} + +static inline bool vioapic_need_intr(const struct acrn_single_vioapic *vioapic, uint16_t pin) +{ + uint32_t lvl; + union ioapic_rte rte; + bool ret = false; + + if ((uint32_t)pin < vioapic->chipinfo.nr_pins) { + rte = vioapic->rtbl[pin]; + lvl = (uint32_t)bitmap_test(pin & 0x3FU, &vioapic->pin_state[pin >> 6U]); + ret = !!(((rte.bits.intr_polarity == IOAPIC_RTE_INTPOL_ALO) && (lvl == 0U)) || + ((rte.bits.intr_polarity == IOAPIC_RTE_INTPOL_AHI) && (lvl != 0U))); + } + + return ret; +} + +/* + * Due to the race between vcpus and vioapic->lock could be accessed from softirq, ensure to do + * spinlock_irqsave_obtain(&(vioapic->lock), &rflags) & spinlock_irqrestore_release(&(vioapic->lock), rflags) + * by caller. + */ +static void vioapic_indirect_write(struct acrn_single_vioapic *vioapic, uint32_t addr, uint32_t data) +{ + union ioapic_rte last, new, changed; + uint32_t regnum; + uint32_t pin, pincount = vioapic->chipinfo.nr_pins; + + regnum = addr & 0xffUL; + switch (regnum) { + case IOAPIC_ID: + vioapic->chipinfo.id = (uint8_t)((data & IOAPIC_ID_MASK) >> IOAPIC_ID_SHIFT); + break; + case IOAPIC_VER: + case IOAPIC_ARB: + /* readonly */ + break; + default: + /* + * In this switch statement, regnum shall either be IOAPIC_ID or + * IOAPIC_VER or IOAPIC_ARB. + * All the other cases will be handled properly later after this + * switch statement. + */ + break; + } + + /* redirection table entries */ + if ((regnum >= IOAPIC_REDTBL) && (regnum < (IOAPIC_REDTBL + (pincount * 2U)))) { + bool wire_mode_valid = true; + uint32_t addr_offset = regnum - IOAPIC_REDTBL; + uint32_t rte_offset = addr_offset >> 1U; + pin = rte_offset; + + last = vioapic->rtbl[pin]; + new = last; + if ((addr_offset & 1U) != 0U) { + new.u.hi_32 = data; + } else { + new.u.lo_32 &= RTBL_RO_BITS; + new.u.lo_32 |= (data & ~RTBL_RO_BITS); + } + + /* In some special scenarios, the LAPIC somehow hasn't send + * EOI to IOAPIC which cause the Remote IRR bit can't be clear. + * To clear it, some OSes will use EOI Register to clear it for + * 0x20 version IOAPIC, otherwise use switch Trigger Mode to + * Edge Sensitive to clear it. + */ + if (new.bits.trigger_mode == IOAPIC_RTE_TRGRMODE_EDGE) { + new.bits.remote_irr = 0U; + } + + changed.full = last.full ^ new.full; + /* pin0 from vpic mask/unmask */ + if ((pin == 0U) && (changed.bits.intr_mask != 0UL)) { + /* mask -> umask */ + if (last.bits.intr_mask == IOAPIC_RTE_MASK_SET) { + if ((vioapic->vm->wire_mode == VPIC_WIRE_NULL) || + (vioapic->vm->wire_mode == VPIC_WIRE_INTR)) { + vioapic->vm->wire_mode = VPIC_WIRE_IOAPIC; + printc("vpic wire mode -> IOAPIC\n"); + } else { + printc("WARNING: invalid vpic wire mode change\n"); + wire_mode_valid = false; + } + /* unmask -> mask */ + } else { + if (vioapic->vm->wire_mode == VPIC_WIRE_IOAPIC) { + vioapic->vm->wire_mode = VPIC_WIRE_INTR; + printc("vpic wire mode -> INTR\n"); + } + } + } + + if (wire_mode_valid) { + vioapic->rtbl[pin] = new; + + /* remap for ptdev */ + if ((new.bits.intr_mask == IOAPIC_RTE_MASK_CLR) || (last.bits.intr_mask == IOAPIC_RTE_MASK_CLR)) { + /* TODO: set pin remap*/ + } + + /* + * Generate an interrupt if the following conditions are met: + * - pin is not masked + * - previous interrupt has been EOIed + * - pin level is asserted + */ + if ((vioapic->rtbl[pin].bits.intr_mask == IOAPIC_RTE_MASK_CLR) && + (vioapic->rtbl[pin].bits.remote_irr == 0UL) && + vioapic_need_intr(vioapic, (uint16_t)pin)) { + vioapic_generate_intr(vioapic, pin); + } + } + } +} + +static void +vioapic_mmio_rw(struct acrn_single_vioapic *vioapic, uint64_t gpa, + uint32_t *data, bool do_read) +{ + uint32_t offset; + uint64_t rflags; + + offset = (uint32_t)(gpa - vioapic->chipinfo.addr); + + /* The IOAPIC specification allows 32-bit wide accesses to the + * IOAPIC_REGSEL (offset 0) and IOAPIC_WINDOW (offset 16) registers. + */ + switch (offset) { + case IOAPIC_REGSEL: + if (do_read) { + *data = vioapic->ioregsel; + } else { + vioapic->ioregsel = *data & 0xFFU; + } + break; + case IOAPIC_WINDOW: + if (do_read) { + *data = vioapic_indirect_read(vioapic, + vioapic->ioregsel); + } else { + vioapic_indirect_write(vioapic, + vioapic->ioregsel, *data); + } + break; + default: + assert(0); + if (do_read) { + *data = 0xFFFFFFFFU; + } + break; + } +} + +/* + * @pre vm != NULL + */ +static void +vioapic_process_eoi(struct acrn_single_vioapic *vioapic, uint32_t vector) +{ + uint32_t pin, pincount = vioapic->chipinfo.nr_pins; + union ioapic_rte rte; + uint64_t rflags; + + if ((vector < VECTOR_DYNAMIC_START) || (vector > NR_MAX_VECTOR)) { + printc("vioapic_process_eoi: invalid vector %u", vector); + } + + printc("ioapic processing eoi for vector %u\n", vector); + + /* notify device to ack if assigned pin */ + for (pin = 0U; pin < pincount; pin++) { + rte = vioapic->rtbl[pin]; + if ((rte.bits.vector != vector) || + (rte.bits.remote_irr == 0U)) { + continue; + } + } + + /* + * XXX keep track of the pins associated with this vector instead + * of iterating on every single pin each time. + */ + for (pin = 0U; pin < pincount; pin++) { + rte = vioapic->rtbl[pin]; + if ((rte.bits.vector != vector) || + (rte.bits.remote_irr == 0U)) { + continue; + } + + vioapic->rtbl[pin].bits.remote_irr = 0U; + if (vioapic_need_intr(vioapic, (uint16_t)pin)) { + printc("ioapic pin%hhu: asserted at eoi\n", pin); + vioapic_generate_intr(vioapic, pin); + } + } +} + +void vioapic_broadcast_eoi(const struct vmrt_vm_comp *vm, uint32_t vector) +{ + struct acrn_single_vioapic *vioapic; + uint8_t vioapic_index; + + /* + * For platforms with multiple IO-APICs, EOI message from LAPIC is + * broadcast to all IO-APICs. Emulating the same behavior here. + */ + + for (vioapic_index = 0U; vioapic_index < vm_ioapics(vm)->ioapic_num; vioapic_index++) { + vioapic = &(vm_ioapics(vm)->vioapic_array[vioapic_index]); + vioapic_process_eoi(vioapic, vector); + } +} + +static void reset_one_vioapic(struct acrn_single_vioapic *vioapic) +{ + uint32_t pin, pincount; + + /* Initialize all redirection entries to mask all interrupts */ + pincount = vioapic->chipinfo.nr_pins; + for (pin = 0U; pin < pincount; pin++) { + vioapic->rtbl[pin].full = MASK_ALL_INTERRUPTS; + } + vioapic->chipinfo.id = 0U; + vioapic->ioregsel = 0U; +} + +void reset_vioapics(const struct vmrt_vm_comp *vm) +{ + struct acrn_vioapics *vioapics = vm_ioapics(vm); + uint8_t vioapic_index; + + for (vioapic_index = 0U; vioapic_index < vioapics->ioapic_num; vioapic_index++) { + reset_one_vioapic(&vioapics->vioapic_array[vioapic_index]); + } +} + +void +vioapic_init(struct vmrt_vm_comp *vm) +{ + static struct ioapic_info virt_ioapic_info = { + .nr_pins = VIOAPIC_RTE_NUM, + .addr = VIOAPIC_BASE + }; + + struct ioapic_info *vioapic_info; + uint8_t vioapic_index; + struct acrn_single_vioapic *vioapic = NULL; + struct acrn_vioapics *vioapics = vm_ioapics(vm); + + /* only set one io apic */ + vioapics->ioapic_num = 1U; + vioapic_info = &virt_ioapic_info; + + for (vioapic_index = 0U; vioapic_index < vioapics->ioapic_num; vioapic_index++) { + vioapic = &vioapics->vioapic_array[vioapic_index]; + vioapic->chipinfo = vioapic_info[vioapic_index]; + + vioapic->vm = vm; + reset_one_vioapic(vioapic); + } + + /* + * Maximum number of GSI is computed as GSI base of the IOAPIC i.e. enumerated last in ACPI MADT + * plus the number of interrupt pins of that IOAPIC. + */ + if (vioapic != NULL) { + vioapics->nr_gsi = vioapic->chipinfo.gsi_base + vioapic->chipinfo.nr_pins; + } +} + +uint32_t +get_vm_gsicount(const struct vmrt_vm_comp *vm) +{ + struct acrn_vioapics *vioapics = vm_ioapics(vm); + return vioapics->nr_gsi; +} + +/* + * @pre handler_private_data != NULL + */ +int32_t vioapic_mmio_access_handler(struct vmrt_vm_vcpu *vcpu) +{ + struct acrn_mmio_request *mmio = vcpu->mmio_request; + struct acrn_single_vioapic *vioapic = &vm_ioapics(vcpu->vm)->vioapic_array[0]; + uint64_t gpa = mmio->address; + int32_t ret = 0; + + /* Note all RW to IOAPIC are 32-Bit in size */ + if (mmio->size == 4UL) { + uint32_t data = (uint32_t)mmio->value; + + if (mmio->direction == ACRN_IOREQ_DIR_READ) { + vioapic_mmio_rw(vioapic, gpa, &data, true); + mmio->value = (uint64_t)data; + } else if (mmio->direction == ACRN_IOREQ_DIR_WRITE) { + vioapic_mmio_rw(vioapic, gpa, &data, false); + } else { + ret = -EINVAL; + } + } else { + printc("All RW to IOAPIC must be 32-bits in size\n"); + assert(0); + } + + return ret; +} + +/** + * @pre vm->arch_vm.vioapics != NULL + * @pre vgsi < get_vm_gsicount(vm) + * @pre rte != NULL + */ +void vioapic_get_rte(const struct vmrt_vm_comp *vm, uint32_t vgsi, union ioapic_rte *rte) +{ + struct acrn_single_vioapic *vioapic; + uint32_t pin; + vioapic = vgsi_to_vioapic_and_vpin(vm, vgsi, &pin); + + *rte = vioapic->rtbl[pin]; +} diff --git a/src/components/implementation/simple_vmm/noop_nf/vioapic.h b/src/components/implementation/simple_vmm/noop_nf/vioapic.h new file mode 100644 index 0000000000..73794a091e --- /dev/null +++ b/src/components/implementation/simple_vmm/noop_nf/vioapic.h @@ -0,0 +1,128 @@ +/*- + * Copyright (c) 2013 Tycho Nightingale + * Copyright (c) 2013 Neel Natu + * Copyright (c) 2017-2022 Intel Corporation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef VIOAPIC_H +#define VIOAPIC_H + +/** + * @file vioapic.h + * + * @brief public APIs for virtual I/O APIC + */ + +#include +#include +#include + +#define VIOAPIC_BASE 0xFEC00000UL +#define VIOAPIC_SIZE 4096UL +#define MAX_IOAPIC_NUM 1 + +#define REDIR_ENTRIES_HW 120U /* Service VM align with native ioapic */ +#define STATE_BITMAP_SIZE INT_DIV_ROUNDUP(REDIR_ENTRIES_HW, 64U) + +#define IOAPIC_RTE_LOW_INTVEC ((uint32_t)IOAPIC_RTE_INTVEC) + +/* + * id field is used to emulate the IOAPIC_ID register of vIOAPIC + */ + +struct acrn_single_vioapic { + // spinlock_t lock; + struct vmrt_vm_comp *vm; + struct ioapic_info chipinfo; + uint32_t ioregsel; + union ioapic_rte rtbl[REDIR_ENTRIES_HW]; + /* pin_state status bitmap: 1 - high, 0 - low */ + uint64_t pin_state[STATE_BITMAP_SIZE]; +}; + +/* + * ioapic_num represents the number of IO-APICs emulated for the VM. + * nr_gsi represents the maximum number of GSI emulated for the VM. + */ +struct acrn_vioapics { + uint8_t ioapic_num; + uint32_t nr_gsi; + struct acrn_single_vioapic vioapic_array[MAX_IOAPIC_NUM]; +}; + +void dump_vioapic(struct vmrt_vm_comp *vm); +void vioapic_init(struct vmrt_vm_comp *vm); +void reset_vioapics(const struct vmrt_vm_comp *vm); + + +/** + * @brief virtual I/O APIC + * + * @addtogroup acrn_vioapic ACRN vIOAPIC + * @{ + */ + +/** + * @brief Set vIOAPIC IRQ line status. + * + * @param[in] vm Pointer to target VM + * @param[in] vgsi GSI for the virtual interrupt + * @param[in] operation Action options: GSI_SET_HIGH/GSI_SET_LOW/ + * GSI_RAISING_PULSE/GSI_FALLING_PULSE + * + * @pre irqline < vioapic_pincount(vm) + * + * @return None + */ +void vioapic_set_irqline_lock(const struct vmrt_vm_comp *vm, uint32_t vgsi, uint32_t operation); + +/** + * @brief Set vIOAPIC IRQ line status. + * + * Similar with vioapic_set_irqline_lock(),but would not make sure + * operation be done with ioapic lock. + * + * @param[in] vm Pointer to target VM + * @param[in] vgsi GSI for the virtual interrupt + * @param[in] operation Action options: GSI_SET_HIGH/GSI_SET_LOW/ + * GSI_RAISING_PULSE/GSI_FALLING_PULSE + * + * @pre irqline < vioapic_pincount(vm) + * @return None + */ +void vioapic_set_irqline_nolock(const struct vmrt_vm_comp *vm, uint32_t vgsi, uint32_t operation); + +uint32_t get_vm_gsicount(const struct vmrt_vm_comp *vm); +void vioapic_broadcast_eoi(const struct vmrt_vm_comp *vm, uint32_t vector); +void vioapic_get_rte(const struct vmrt_vm_comp *vm, uint32_t vgsi, union ioapic_rte *rte); +int32_t vioapic_mmio_access_handler(struct vmrt_vm_vcpu *vcpu); +struct acrn_single_vioapic *vgsi_to_vioapic_and_vpin(const struct vmrt_vm_comp *vm, uint32_t vgsi, uint32_t *vpin); + +/** + * @} + */ +/* End of acrn_vioapic */ +#endif /* VIOAPIC_H */ diff --git a/src/components/implementation/simple_vmm/noop_nf/vlapic.c b/src/components/implementation/simple_vmm/noop_nf/vlapic.c new file mode 100644 index 0000000000..155eed10e3 --- /dev/null +++ b/src/components/implementation/simple_vmm/noop_nf/vlapic.c @@ -0,0 +1,1554 @@ +/*- + * Copyright (c) 2011 NetApp, Inc. + * Copyright (c) 2017-2022 Intel Corporation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#define pr_prefix "vlapic: " + +#include +#include +#include +#include +#include +#include +#include "vpic.h" +#include "bits.h" +#include "atomic.h" + +#include + +#pragma GCC diagnostic ignored "-Wunused-but-set-variable" +#define VLAPIC_VERBOS 0 + +#define VLAPIC_VERSION (16U) +#define APICBASE_BSP 0x00000100UL +#define APICBASE_X2APIC 0x00000400UL +#define APICBASE_XAPIC 0x00000800UL +#define APICBASE_LAPIC_MODE (APICBASE_XAPIC | APICBASE_X2APIC) +#define APICBASE_ENABLED 0x00000800UL +#define LOGICAL_ID_MASK 0xFU +#define CLUSTER_ID_MASK 0xFFFF0U + +#define DBG_LEVEL_VLAPIC 6U + +int g_vlapi_enabled = 0; + +static inline struct vmrt_vm_vcpu *vlapic2vcpu(const struct acrn_vlapic *vlapic) +{ + return vlapic->vcpu; +} +static inline struct acrn_vlapic *vcpu_vlapic(struct vmrt_vm_vcpu *vcpu) +{ + return vcpu->vlapic; +} +static inline bool is_lapic_pt_configured(void) +{ + return false; +} + +static inline void vlapic_dump_irr(__unused const struct acrn_vlapic *vlapic, __unused const char *msg) {} +static inline void vlapic_dump_isr(__unused const struct acrn_vlapic *vlapic, __unused const char *msg) {} + +const struct acrn_apicv_ops *apicv_ops; + +static bool apicv_set_intr_ready(struct acrn_vlapic *vlapic, uint32_t vector); + +static void apicv_trigger_pi_anv(uint16_t dest_pcpu_id, uint32_t anv); + +static void vlapic_x2apic_self_ipi_handler(struct acrn_vlapic *vlapic); + +/* + * Post an interrupt to the vcpu running on 'hostcpu'. This will use a + * hardware assist if available (e.g. Posted Interrupt) or fall back to + * sending an 'ipinum' to interrupt the 'hostcpu'. + */ +static void vlapic_set_error(struct acrn_vlapic *vlapic, uint32_t mask); + +void vlapic_timer_expired(struct vmrt_vm_vcpu *vcpu); +static struct pi_desc *get_pi_desc(struct vmrt_vm_vcpu *vcpu); + +static inline bool vlapic_enabled(const struct acrn_vlapic *vlapic) +{ + const struct lapic_regs *lapic = vlapic->apic_page; + + return (((vlapic->msr_apicbase & APICBASE_ENABLED) != 0UL) && + ((lapic->svr.v & APIC_SVR_ENABLE) != 0U)); +} + +static inline void vlapic_build_x2apic_id(struct acrn_vlapic *vlapic) +{ + struct lapic_regs *lapic; + uint32_t logical_id, cluster_id; + + lapic = vlapic->apic_page; + lapic->id.v = vlapic->vapic_id; + logical_id = lapic->id.v & LOGICAL_ID_MASK; + cluster_id = (lapic->id.v & CLUSTER_ID_MASK) >> 4U; + lapic->ldr.v = (cluster_id << 16U) | (1U << logical_id); +} + +static inline uint32_t vlapic_find_isrv(const struct acrn_vlapic *vlapic) +{ + const struct lapic_regs *lapic = vlapic->apic_page; + uint32_t i, val, bitpos, isrv = 0U; + const struct lapic_reg *isrptr; + + isrptr = &lapic->isr[0]; + + /* i ranges effectively from 7 to 1 */ + for (i = 7U; i > 0U; i--) { + val = isrptr[i].v; + if (val != 0U) { + bitpos = (uint32_t)fls32(val); + isrv = (i << 5U) | bitpos; + break; + } + } + + return isrv; +} + +static void +vlapic_write_dfr(struct acrn_vlapic *vlapic) +{ + struct lapic_regs *lapic; + + lapic = vlapic->apic_page; + lapic->dfr.v &= APIC_DFR_MODEL_MASK; + lapic->dfr.v |= APIC_DFR_RESERVED; + + if ((lapic->dfr.v & APIC_DFR_MODEL_MASK) == APIC_DFR_MODEL_FLAT) { + printc("vlapic DFR in Flat Model\n"); + } else if ((lapic->dfr.v & APIC_DFR_MODEL_MASK) + == APIC_DFR_MODEL_CLUSTER) { + printc("vlapic DFR in Cluster Model\n"); + } else { + assert(0); + } +} + +static void +vlapic_write_ldr(struct acrn_vlapic *vlapic) +{ + struct lapic_regs *lapic; + + lapic = vlapic->apic_page; + lapic->ldr.v &= ~APIC_LDR_RESERVED; +} + +static inline uint32_t +vlapic_timer_divisor_shift(uint32_t dcr) +{ + uint32_t val; + + val = ((dcr & 0x3U) | ((dcr & 0x8U) >> 1U)); + return ((val + 1U) & 0x7U); +} + +__unused static inline bool +vlapic_lvtt_oneshot(const struct acrn_vlapic *vlapic) +{ + return (((vlapic->apic_page->lvt[APIC_LVT_TIMER].v) & APIC_LVTT_TM) + == APIC_LVTT_TM_ONE_SHOT); +} + +static inline bool +vlapic_lvtt_period(const struct acrn_vlapic *vlapic) +{ + return (((vlapic->apic_page->lvt[APIC_LVT_TIMER].v) & APIC_LVTT_TM) + == APIC_LVTT_TM_PERIODIC); +} + +static inline bool +vlapic_lvtt_tsc_deadline(const struct acrn_vlapic *vlapic) +{ + return (((vlapic->apic_page->lvt[APIC_LVT_TIMER].v) & APIC_LVTT_TM) + == APIC_LVTT_TM_TSCDLT); +} + +static inline bool +vlapic_lvtt_masked(const struct acrn_vlapic *vlapic) +{ + return (((vlapic->apic_page->lvt[APIC_LVT_TIMER].v) & APIC_LVTT_M) != 0U); +} + +static bool +set_expiration(struct acrn_vlapic *vlapic) +{ + struct vlapic_timer *vtimer; + uint32_t tmicr, divisor_shift; + bool ret; + + vtimer = &vlapic->vtimer; + tmicr = vtimer->tmicr; + divisor_shift = vtimer->divisor_shift; + + if ((tmicr == 0U) || (divisor_shift > 8U)) { + ret = false; + } else { + uint64_t delta = (uint64_t)tmicr << divisor_shift; + assert(0); + + ret = true; + } + return ret; +} + +static void vlapic_update_lvtt(struct acrn_vlapic *vlapic, + uint32_t val) +{ + uint32_t timer_mode = val & APIC_LVTT_TM; + struct vlapic_timer *vtimer = &vlapic->vtimer; + + if (vtimer->mode != timer_mode) { + struct hv_timer *timer = &vtimer->timer; + + /* + * A write to the LVT Timer Register that changes + * the timer mode disarms the local APIC timer. + */ + /* TODO: reset timer */ + vtimer->mode = timer_mode; + } +} + +static uint32_t vlapic_get_ccr(const struct acrn_vlapic *vlapic) +{ + uint32_t remain_count = 0U; + const struct vlapic_timer *vtimer = &vlapic->vtimer; + + if ((vtimer->tmicr != 0U) && (!vlapic_lvtt_tsc_deadline(vlapic))) { + uint64_t remains; + assert(0); + } + + return remain_count; +} + +static void vlapic_write_dcr(struct acrn_vlapic *vlapic) +{ + uint32_t divisor_shift; + struct vlapic_timer *vtimer; + struct lapic_regs *lapic = vlapic->apic_page; + + vtimer = &vlapic->vtimer; + divisor_shift = vlapic_timer_divisor_shift(lapic->dcr_timer.v); + + vtimer->divisor_shift = divisor_shift; +} + +static void vlapic_write_icrtmr(struct acrn_vlapic *vlapic) +{ + struct lapic_regs *lapic; + struct vlapic_timer *vtimer; + + if (!vlapic_lvtt_tsc_deadline(vlapic)) { + lapic = vlapic->apic_page; + vtimer = &vlapic->vtimer; + vtimer->tmicr = lapic->icr_timer.v; + } +} + +static void +vlapic_write_esr(struct acrn_vlapic *vlapic) +{ + struct lapic_regs *lapic; + + lapic = vlapic->apic_page; + lapic->esr.v = vlapic->esr_pending; + vlapic->esr_pending = 0U; +} + +static void +vlapic_set_tmr(struct acrn_vlapic *vlapic, uint32_t vector, bool level) +{ + struct lapic_reg *tmrptr = &(vlapic->apic_page->tmr[0]); + if (level) { + if (!bitmap32_test_and_set_lock((uint16_t)(vector & 0x1fU), &tmrptr[(vector & 0xffU) >> 5U].v)) { + assert(0); + } + } else { + if (bitmap32_test_and_clear_lock((uint16_t)(vector & 0x1fU), &tmrptr[(vector & 0xffU) >> 5U].v)) { + assert(0); + } + } +} + +static void apicv_basic_accept_intr(struct acrn_vlapic *vlapic, uint32_t vector, bool level) +{ + struct lapic_regs *lapic; + struct lapic_reg *irrptr; + uint32_t idx; + + lapic = vlapic->apic_page; + idx = vector >> 5U; + irrptr = &lapic->irr[0]; + + /* If the interrupt is set, don't try to do it again */ + if (!bitmap32_test_and_set_lock((uint16_t)(vector & 0x1fU), &irrptr[idx].v)) { + /* update TMR if interrupt trigger mode has changed */ + vlapic_set_tmr(vlapic, vector, level); + assert(0); + } +} + +static void apicv_advanced_accept_intr(struct acrn_vlapic *vlapic, uint32_t vector, bool level) +{ + /* update TMR if interrupt trigger mode has changed */ + vlapic_set_tmr(vlapic, vector, level); + + if (apicv_set_intr_ready(vlapic, vector)) { + /* + * Send interrupt to vCPU via posted interrupt way: + * 1. If target vCPU is in root mode(isn't running), + * record this request as ACRN_REQUEST_EVENT,then + * will pick up the interrupt from PIR and inject + * it to vCPU in next vmentry. + * 2. If target vCPU is in non-root mode(running), + * send PI notification to vCPU and hardware will + * sync PIR to vIRR automatically. + */ + + /* TODO: handle cross-core virtual interrupt notification */ + } +} + +/* + * @pre vector >= 16 + */ +static void vlapic_accept_intr(struct acrn_vlapic *vlapic, uint32_t vector, bool level) +{ + struct lapic_regs *lapic; + assert(vector <= 255); + + lapic = vlapic->apic_page; + if ((lapic->svr.v & APIC_SVR_ENABLE) == 0U) { + printc("vlapic is software disabled, ignoring interrupt %u", vector); + assert(0); + } else { + apicv_advanced_accept_intr(vlapic, vector, level); + } +} + +/** + * @brief Send notification vector to target pCPU. + * + * If APICv Posted-Interrupt is enabled and target pCPU is in non-root mode, + * pCPU will sync pending virtual interrupts from PIR to vIRR automatically, + * without VM exit. + * If pCPU in root-mode, virtual interrupt will be injected in next VM entry. + * + * @param[in] dest_pcpu_id Target CPU ID. + * @param[in] anv Activation Notification Vectors (ANV) + * + * @return None + */ +static void apicv_trigger_pi_anv(uint16_t dest_pcpu_id, uint32_t anv) +{ + /* TODO: support pi in the future */ + assert(0); +} + +/** + * @pre offset value shall be one of the folllowing values: + * APIC_OFFSET_CMCI_LVT + * APIC_OFFSET_TIMER_LVT + * APIC_OFFSET_THERM_LVT + * APIC_OFFSET_PERF_LVT + * APIC_OFFSET_LINT0_LVT + * APIC_OFFSET_LINT1_LVT + * APIC_OFFSET_ERROR_LVT + */ +static inline uint32_t +lvt_off_to_idx(uint32_t offset) +{ + uint32_t index; + + switch (offset) { + case APIC_OFFSET_CMCI_LVT: + index = APIC_LVT_CMCI; + break; + case APIC_OFFSET_TIMER_LVT: + index = APIC_LVT_TIMER; + break; + case APIC_OFFSET_THERM_LVT: + index = APIC_LVT_THERMAL; + break; + case APIC_OFFSET_PERF_LVT: + index = APIC_LVT_PMC; + break; + case APIC_OFFSET_LINT0_LVT: + index = APIC_LVT_LINT0; + break; + case APIC_OFFSET_LINT1_LVT: + index = APIC_LVT_LINT1; + break; + case APIC_OFFSET_ERROR_LVT: + default: + /* + * The function caller could guarantee the pre condition. + * So, all of the possible 'offset' other than + * APIC_OFFSET_ERROR_LVT has been handled in prior cases. + */ + index = APIC_LVT_ERROR; + break; + } + + return index; +} + +/** + * @pre offset value shall be one of the folllowing values: + * APIC_OFFSET_CMCI_LVT + * APIC_OFFSET_TIMER_LVT + * APIC_OFFSET_THERM_LVT + * APIC_OFFSET_PERF_LVT + * APIC_OFFSET_LINT0_LVT + * APIC_OFFSET_LINT1_LVT + * APIC_OFFSET_ERROR_LVT + */ +static inline uint32_t * +vlapic_get_lvtptr(struct acrn_vlapic *vlapic, uint32_t offset) +{ + struct lapic_regs *lapic = vlapic->apic_page; + uint32_t i; + uint32_t *lvt_ptr; + + switch (offset) { + case APIC_OFFSET_CMCI_LVT: + lvt_ptr = &lapic->lvt_cmci.v; + break; + default: + /* + * The function caller could guarantee the pre condition. + * All the possible 'offset' other than APIC_OFFSET_CMCI_LVT + * could be handled here. + */ + i = lvt_off_to_idx(offset); + lvt_ptr = &(lapic->lvt[i].v); + break; + } + return lvt_ptr; +} + +static inline uint32_t +vlapic_get_lvt(const struct acrn_vlapic *vlapic, uint32_t offset) +{ + uint32_t idx; + + idx = lvt_off_to_idx(offset); + return vlapic->lvt_last[idx]; +} + +static void +vlapic_write_lvt(struct acrn_vlapic *vlapic, uint32_t offset) +{ + uint32_t *lvtptr, mask, val, idx; + struct lapic_regs *lapic; + bool error = false; + + lapic = vlapic->apic_page; + lvtptr = vlapic_get_lvtptr(vlapic, offset); + val = *lvtptr; + + if ((lapic->svr.v & APIC_SVR_ENABLE) == 0U) { + val |= APIC_LVT_M; + } + mask = APIC_LVT_M | APIC_LVT_DS | APIC_LVT_VECTOR; + switch (offset) { + case APIC_OFFSET_TIMER_LVT: + mask |= APIC_LVTT_TM; + break; + case APIC_OFFSET_ERROR_LVT: + break; + case APIC_OFFSET_LINT0_LVT: + case APIC_OFFSET_LINT1_LVT: + mask |= APIC_LVT_TM | APIC_LVT_RIRR | APIC_LVT_IIPP; + /* FALLTHROUGH */ + default: + mask |= APIC_LVT_DM; + break; + } + val &= mask; + + /* vlapic mask/unmask LINT0 for ExtINT? */ + if ((offset == APIC_OFFSET_LINT0_LVT) && + ((val & APIC_LVT_DM) == APIC_LVT_DM_EXTINT)) { + uint32_t last = vlapic_get_lvt(vlapic, offset); + struct vmrt_vm_comp *vm = vlapic2vcpu(vlapic)->vm; + + /* mask -> unmask: may from every vlapic in the vm */ + if (((last & APIC_LVT_M) != 0U) && ((val & APIC_LVT_M) == 0U)) { + if ((vm->wire_mode == VPIC_WIRE_INTR) || + (vm->wire_mode == VPIC_WIRE_NULL)) { + vm->wire_mode = VPIC_WIRE_LAPIC; + printc("vpic wire mode -> LAPIC\n"); + } else { + printc("WARNING:invalid vpic wire mode change\n"); + assert(0); + } + /* unmask -> mask: only from the vlapic LINT0-ExtINT enabled */ + } else if (((last & APIC_LVT_M) == 0U) && ((val & APIC_LVT_M) != 0U)) { + if (vm->wire_mode == VPIC_WIRE_LAPIC) { + vm->wire_mode = VPIC_WIRE_NULL; + printc("vpic wire mode -> NULL\n"); + } + } else { + /* APIC_LVT_M unchanged. No action required. */ + } + } else if (offset == APIC_OFFSET_TIMER_LVT) { + vlapic_update_lvtt(vlapic, val); + } else { + /* No action required. */ + } + + if (!error) { + *lvtptr = val; + idx = lvt_off_to_idx(offset); + vlapic->lvt_last[idx] = val; + } +} + +static void +vlapic_mask_lvts(struct acrn_vlapic *vlapic) +{ + struct lapic_regs *lapic = vlapic->apic_page; + + lapic->lvt_cmci.v |= APIC_LVT_M; + vlapic_write_lvt(vlapic, APIC_OFFSET_CMCI_LVT); + + lapic->lvt[APIC_LVT_TIMER].v |= APIC_LVT_M; + vlapic_write_lvt(vlapic, APIC_OFFSET_TIMER_LVT); + + lapic->lvt[APIC_LVT_THERMAL].v |= APIC_LVT_M; + vlapic_write_lvt(vlapic, APIC_OFFSET_THERM_LVT); + + lapic->lvt[APIC_LVT_PMC].v |= APIC_LVT_M; + vlapic_write_lvt(vlapic, APIC_OFFSET_PERF_LVT); + + lapic->lvt[APIC_LVT_LINT0].v |= APIC_LVT_M; + vlapic_write_lvt(vlapic, APIC_OFFSET_LINT0_LVT); + + lapic->lvt[APIC_LVT_LINT1].v |= APIC_LVT_M; + vlapic_write_lvt(vlapic, APIC_OFFSET_LINT1_LVT); + + lapic->lvt[APIC_LVT_ERROR].v |= APIC_LVT_M; + vlapic_write_lvt(vlapic, APIC_OFFSET_ERROR_LVT); +} + +/* + * Algorithm adopted from section "Interrupt, Task and Processor Priority" + * in Intel Architecture Manual Vol 3a. + */ +static void +vlapic_update_ppr(struct acrn_vlapic *vlapic) +{ + uint32_t isrv, tpr, ppr; + + isrv = vlapic->isrv; + tpr = vlapic->apic_page->tpr.v; + + if (prio(tpr) >= prio(isrv)) { + ppr = tpr; + } else { + ppr = isrv & 0xf0U; + } + + vlapic->apic_page->ppr.v = ppr; +} + +static void +vlapic_process_eoi(struct acrn_vlapic *vlapic) +{ + struct lapic_regs *lapic = vlapic->apic_page; + struct lapic_reg *isrptr, *tmrptr; + uint32_t i, vector, bitpos; + + isrptr = &lapic->isr[0]; + tmrptr = &lapic->tmr[0]; + + if (vlapic->isrv != 0U) { + vector = vlapic->isrv; + i = (vector >> 5U); + bitpos = (vector & 0x1fU); + bitmap32_clear_nolock((uint16_t)bitpos, &isrptr[i].v); + + vlapic_dump_isr(vlapic, "vlapic_process_eoi"); + + vlapic->isrv = vlapic_find_isrv(vlapic); + vlapic_update_ppr(vlapic); + } +} + +static void +vlapic_set_error(struct acrn_vlapic *vlapic, uint32_t mask) +{ + uint32_t lvt, vec; + + vlapic->esr_pending |= mask; + if (vlapic->esr_firing == 0) { + vlapic->esr_firing = 1; + + /* The error LVT always uses the fixed delivery mode. */ + lvt = vlapic_get_lvt(vlapic, APIC_OFFSET_ERROR_LVT); + if ((lvt & APIC_LVT_M) == 0U) { + vec = lvt & APIC_LVT_VECTOR; + if (vec >= 16U) { + vlapic_accept_intr(vlapic, vec, LAPIC_TRIG_EDGE); + } + } + vlapic->esr_firing = 0; + } +} + +static void vlapic_write_icrlo(struct acrn_vlapic *vlapic) +{ + uint16_t vcpu_id; + bool phys = false, is_broadcast = false; + uint64_t dmask; + uint32_t icr_low, icr_high, dest; + uint32_t vec, mode, shorthand; + struct lapic_regs *lapic; + struct vmrt_vm_vcpu *target_vcpu; + + lapic = vlapic->apic_page; + lapic->icr_lo.v &= ~APIC_DELSTAT_PEND; + + icr_low = lapic->icr_lo.v; + icr_high = lapic->icr_hi.v; + if (is_x2apic_enabled(vlapic)) { + dest = icr_high; + is_broadcast = (dest == 0xffffffffU); + } else { + dest = icr_high >> APIC_ID_SHIFT; + is_broadcast = (dest == 0xffU); + } + vec = icr_low & APIC_VECTOR_MASK; + mode = icr_low & APIC_DELMODE_MASK; + phys = ((icr_low & APIC_DESTMODE_LOG) == 0UL); + shorthand = icr_low & APIC_DEST_MASK; + + if ((mode == APIC_DELMODE_FIXED) && (vec < 16U)) { + vlapic_set_error(vlapic, APIC_ESR_SEND_ILLEGAL_VECTOR); + printc("Ignoring invalid IPI %u", vec); + assert(0); + } else if (((shorthand == APIC_DEST_SELF) || (shorthand == APIC_DEST_ALLISELF)) + && ((mode == APIC_DELMODE_NMI) || (mode == APIC_DELMODE_INIT) + || (mode == APIC_DELMODE_STARTUP))) { + printc("unsupported ICR command, ignore it\n"); + } else { + struct vmrt_vm_vcpu *vcpu = vlapic2vcpu(vlapic); + + printc( + "icrlo 0x%08x icrhi 0x%08x triggered ipi %u", + icr_low, icr_high, vec); + + assert(0); + } +} + +static inline uint32_t vlapic_find_highest_irr(const struct acrn_vlapic *vlapic) +{ + const struct lapic_regs *lapic = vlapic->apic_page; + uint32_t i, val, bitpos, vec = 0U; + const struct lapic_reg *irrptr; + + irrptr = &lapic->irr[0]; + + /* i ranges effectively from 7 to 1 */ + for (i = 7U; i > 0U; i--) { + val = irrptr[i].v; + if (val != 0U) { + bitpos = (uint32_t)fls32(val); + vec = (i * 32U) + bitpos; + break; + } + } + + return vec; +} + +/** + * @brief Find a deliverable virtual interrupts for vLAPIC in irr. + * + * @param[in] vlapic Pointer to target vLAPIC data structure + * @param[inout] vecptr Pointer to vector buffer and will be filled + * with eligible vector if any. + * + * @retval false There is no deliverable pending vector. + * @retval true There is deliverable vector. + * + * @remark The vector does not automatically transition to the ISR as a + * result of calling this function. + * This function is only for case that APICv/VID is NOT supported. + */ +static bool vlapic_find_deliverable_intr(const struct acrn_vlapic *vlapic, uint32_t *vecptr) +{ + const struct lapic_regs *lapic = vlapic->apic_page; + uint32_t vec; + bool ret = false; + + vec = vlapic_find_highest_irr(vlapic); + if (prio(vec) > prio(lapic->ppr.v)) { + ret = true; + if (vecptr != NULL) { + *vecptr = vec; + } + } + + return ret; +} + +/** + * @brief Get a deliverable virtual interrupt from irr to isr. + * + * Transition 'vector' from IRR to ISR. This function is called with the + * vector returned by 'vlapic_find_deliverable_intr()' when the guest is able to + * accept this interrupt (i.e. RFLAGS.IF = 1 and no conditions exist that + * block interrupt delivery). + * + * @param[in] vlapic Pointer to target vLAPIC data structure + * @param[in] vector Target virtual interrupt vector + * + * @return None + * + * @pre vlapic != NULL + */ +static void vlapic_get_deliverable_intr(struct acrn_vlapic *vlapic, uint32_t vector) +{ + struct lapic_regs *lapic = vlapic->apic_page; + struct lapic_reg *irrptr, *isrptr; + uint32_t idx; + + /* + * clear the ready bit for vector being accepted in irr + * and set the vector as in service in isr. + */ + idx = vector >> 5U; + + irrptr = &lapic->irr[0]; + bitmap32_clear_lock((uint16_t)(vector & 0x1fU), &irrptr[idx].v); + + vlapic_dump_irr(vlapic, "vlapic_get_deliverable_intr"); + + isrptr = &lapic->isr[0]; + bitmap32_set_nolock((uint16_t)(vector & 0x1fU), &isrptr[idx].v); + vlapic_dump_isr(vlapic, "vlapic_get_deliverable_intr"); + + vlapic->isrv = vector; + + /* + * Update the PPR + */ + vlapic_update_ppr(vlapic); +} + +static void +vlapic_write_svr(struct acrn_vlapic *vlapic) +{ + struct lapic_regs *lapic; + uint32_t old, new, changed; + + lapic = vlapic->apic_page; + + new = lapic->svr.v; + old = vlapic->svr_last; + vlapic->svr_last = new; + + changed = old ^ new; + + if ((changed & APIC_SVR_ENABLE) != 0U) { + if ((new & APIC_SVR_ENABLE) == 0U) { + struct vmrt_vm_comp *vm = vlapic2vcpu(vlapic)->vm; + /* + * The apic is now disabled so stop the apic timer + * and mask all the LVT entries. + */ + printc("vlapic is software-disabled\n"); + + vlapic_mask_lvts(vlapic); + /* the only one enabled LINT0-ExtINT vlapic disabled */ + if (vm->wire_mode == VPIC_WIRE_NULL) { + vm->wire_mode = VPIC_WIRE_INTR; + printc("vpic wire mode -> INTR\n"); + } + } else { + /* + * The apic is now enabled so restart the apic timer + * if it is configured in periodic mode. + */ + printc("vlapic is software-enabled\n"); + g_vlapi_enabled = 1; + if (vlapic_lvtt_period(vlapic)) { + /* TODO: set timer logic */ + assert(0); + } + } + } +} + +static int32_t vlapic_read(struct acrn_vlapic *vlapic, uint32_t offset_arg, uint64_t *data) +{ + int32_t ret = 0; + struct lapic_regs *lapic = vlapic->apic_page; + uint32_t i; + uint32_t offset = offset_arg; + *data = 0UL; + + if (offset > sizeof(*lapic)) { + ret = -EACCES; + } else { + + offset &= ~0x3UL; + switch (offset) { + case APIC_OFFSET_ID: + *data = lapic->id.v; + break; + case APIC_OFFSET_VER: + *data = lapic->version.v; + break; + case APIC_OFFSET_PPR: + *data = lapic->ppr.v; + break; + case APIC_OFFSET_EOI: + *data = lapic->eoi.v; + break; + case APIC_OFFSET_LDR: + *data = lapic->ldr.v; + break; + case APIC_OFFSET_DFR: + *data = lapic->dfr.v; + break; + case APIC_OFFSET_SVR: + *data = lapic->svr.v; + break; + case APIC_OFFSET_ISR0: + case APIC_OFFSET_ISR1: + case APIC_OFFSET_ISR2: + case APIC_OFFSET_ISR3: + case APIC_OFFSET_ISR4: + case APIC_OFFSET_ISR5: + case APIC_OFFSET_ISR6: + case APIC_OFFSET_ISR7: + i = (offset - APIC_OFFSET_ISR0) >> 4U; + *data = lapic->isr[i].v; + break; + case APIC_OFFSET_TMR0: + case APIC_OFFSET_TMR1: + case APIC_OFFSET_TMR2: + case APIC_OFFSET_TMR3: + case APIC_OFFSET_TMR4: + case APIC_OFFSET_TMR5: + case APIC_OFFSET_TMR6: + case APIC_OFFSET_TMR7: + i = (offset - APIC_OFFSET_TMR0) >> 4U; + *data = lapic->tmr[i].v; + break; + case APIC_OFFSET_IRR0: + case APIC_OFFSET_IRR1: + case APIC_OFFSET_IRR2: + case APIC_OFFSET_IRR3: + case APIC_OFFSET_IRR4: + case APIC_OFFSET_IRR5: + case APIC_OFFSET_IRR6: + case APIC_OFFSET_IRR7: + i = (offset - APIC_OFFSET_IRR0) >> 4U; + *data = lapic->irr[i].v; + break; + case APIC_OFFSET_ESR: + *data = lapic->esr.v; + break; + case APIC_OFFSET_ICR_LOW: + *data = lapic->icr_lo.v; + if (is_x2apic_enabled(vlapic)) { + *data |= ((uint64_t)lapic->icr_hi.v) << 32U; + } + break; + case APIC_OFFSET_ICR_HI: + *data = lapic->icr_hi.v; + break; + case APIC_OFFSET_CMCI_LVT: + case APIC_OFFSET_TIMER_LVT: + case APIC_OFFSET_THERM_LVT: + case APIC_OFFSET_PERF_LVT: + case APIC_OFFSET_LINT0_LVT: + case APIC_OFFSET_LINT1_LVT: + case APIC_OFFSET_ERROR_LVT: + *data = vlapic_get_lvt(vlapic, offset); +#ifdef INVARIANTS + reg = vlapic_get_lvtptr(vlapic, offset); + assert(*data == *reg, "inconsistent lvt value at offset %#x: %#lx/%#x", offset, *data, *reg); +#endif + break; + case APIC_OFFSET_TIMER_ICR: + /* if TSCDEADLINE mode always return 0*/ + if (vlapic_lvtt_tsc_deadline(vlapic)) { + *data = 0UL; + } else { + *data = lapic->icr_timer.v; + } + break; + case APIC_OFFSET_TIMER_CCR: + *data = vlapic_get_ccr(vlapic); + break; + case APIC_OFFSET_TIMER_DCR: + *data = lapic->dcr_timer.v; + break; + default: + ret = -EACCES; + break; + } + } + + return ret; +} + + + +/* + * @pre vcpu != NULL + * @pre vector <= 255U + */ +void +vlapic_set_intr(struct vmrt_vm_vcpu *vcpu, uint32_t vector, bool level) +{ + struct acrn_vlapic *vlapic; + + vlapic = vcpu_vlapic(vcpu); + if (vector < 16U) { + vlapic_set_error(vlapic, APIC_ESR_RECEIVE_ILLEGAL_VECTOR); + assert(0); + } else { + vlapic_accept_intr(vlapic, vector, level); + } +} + +void vlapic_timer_expired(struct vmrt_vm_vcpu *vcpu) +{ + struct acrn_vlapic *vlapic; + struct lapic_regs *lapic; + + vlapic = vcpu_vlapic(vcpu); + lapic = vlapic->apic_page; + + /* inject vcpu timer interrupt if not masked */ + if (!vlapic_lvtt_masked(vlapic)) { + vlapic_set_intr(vcpu, lapic->lvt[APIC_LVT_TIMER].v & APIC_LVTT_VECTOR, LAPIC_TRIG_EDGE); + } +} + +/* + * @pre vm != NULL + */ +bool is_x2apic_enabled(const struct acrn_vlapic *vlapic) +{ + bool ret = false; + + return ret; +} + +bool is_xapic_enabled(const struct acrn_vlapic *vlapic) +{ + bool ret = true; + + return ret; +} + + +static bool apicv_basic_x2apic_read_msr_may_valid(uint32_t offset) +{ + return (offset != APIC_OFFSET_DFR) && (offset != APIC_OFFSET_ICR_HI); +} + +static bool apicv_advanced_x2apic_read_msr_may_valid(uint32_t offset) +{ + return (offset == APIC_OFFSET_TIMER_CCR); +} + +static bool apicv_basic_x2apic_write_msr_may_valid(uint32_t offset) +{ + return (offset != APIC_OFFSET_DFR) && (offset != APIC_OFFSET_ICR_HI); +} + +static bool apicv_advanced_x2apic_write_msr_may_valid(uint32_t offset) +{ + return (offset != APIC_OFFSET_DFR) && (offset != APIC_OFFSET_ICR_HI) && + (offset != APIC_OFFSET_EOI) && (offset != APIC_OFFSET_SELF_IPI); +} + + +/** + * APIC-v functions + * @pre get_pi_desc(vlapic2vcpu(vlapic)) != NULL + */ +static bool +apicv_set_intr_ready(struct acrn_vlapic *vlapic, uint32_t vector) +{ + struct pi_desc *pid; + uint32_t idx; + bool notify = false; + + pid = get_pi_desc(vlapic2vcpu(vlapic)); + idx = vector >> 6U; + if (!bitmap_test_and_set_lock((uint16_t)(vector & 0x3fU), &pid->pir[idx])) { + notify = !bitmap_test_and_set_lock(POSTED_INTR_ON, &pid->control.value); + } + return notify; +} + + +static void apicv_basic_inject_intr(struct acrn_vlapic *vlapic, + bool guest_irq_enabled, bool injected) +{ + uint32_t vector = 0U; + + if (guest_irq_enabled && (!injected)) { + vlapic_update_ppr(vlapic); + if (vlapic_find_deliverable_intr(vlapic, &vector)) { + assert(0); + vlapic_get_deliverable_intr(vlapic, vector); + } + } + + vlapic_update_tpr_threshold(vlapic); +} + +/* + * @brief Send a Posted Interrupt to itself. + * + * Interrupts are disabled on pCPU at this point of time. + * Upon the next VMEnter the self-IPI is serviced by the logical processor. + * Since the IPI vector is Posted Interrupt vector, logical processor syncs + * PIR to vIRR and updates RVI. + * + * @pre get_pi_desc(vlapic->vcpu) != NULL + */ +static inline struct pi_desc *get_pi_desc(struct vmrt_vm_vcpu *vcpu) +{ + return (struct pi_desc *)&(vcpu->shared_region->pi_desc); +} + +static void apicv_advanced_inject_intr(struct acrn_vlapic *vlapic, + __unused bool guest_irq_enabled, __unused bool injected) +{ + struct vmrt_vm_vcpu *vcpu = vlapic2vcpu(vlapic); + struct pi_desc *pid = get_pi_desc(vcpu); + + if (bitmap_test(POSTED_INTR_ON, &(pid->control.value))) { + vcpu->shared_region->inject_evt = 1; + } +} + +void vlapic_inject_intr(struct vmrt_vm_vcpu *vcpu) +{ + struct acrn_vlapic *vlapic = vcpu_vlapic(vcpu); + apicv_advanced_inject_intr(vlapic, 0, 0); +} + +static bool apicv_basic_has_pending_delivery_intr(struct vmrt_vm_vcpu *vcpu) +{ + uint32_t vector; + struct acrn_vlapic *vlapic = vcpu_vlapic(vcpu); + + vlapic_update_ppr(vlapic); + + /* check and raise request if we have a deliverable irq in LAPIC IRR */ + if (vlapic_find_deliverable_intr(vlapic, &vector)) { + /* we have pending IRR */ + assert(0); + } + + return vcpu->pending_req != 0UL; +} + +static bool apicv_advanced_has_pending_delivery_intr(__unused struct vmrt_vm_vcpu *vcpu) +{ + return false; +} + +bool vlapic_has_pending_delivery_intr(struct vmrt_vm_vcpu *vcpu) +{ + struct acrn_vlapic *vlapic = vcpu_vlapic(vcpu); + return vlapic->ops->has_pending_delivery_intr(vcpu); +} + +uint32_t vlapic_get_next_pending_intr(struct vmrt_vm_vcpu *vcpu) +{ + struct acrn_vlapic *vlapic = vcpu_vlapic(vcpu); + uint32_t vector; + + vector = vlapic_find_highest_irr(vlapic); + + return vector; +} + +static bool apicv_basic_has_pending_intr(struct vmrt_vm_vcpu *vcpu) +{ + return vlapic_get_next_pending_intr(vcpu) != 0UL; +} + +static bool apicv_advanced_has_pending_intr(struct vmrt_vm_vcpu *vcpu) +{ + return apicv_basic_has_pending_intr(vcpu); +} + +bool vlapic_clear_pending_intr(struct vmrt_vm_vcpu *vcpu, uint32_t vector) +{ + struct acrn_vlapic *vlapic = vcpu_vlapic(vcpu); + struct lapic_reg *irrptr = &(vlapic->apic_page->irr[0]); + uint32_t idx = vector >> 5U; + return bitmap32_test_and_clear_lock((uint16_t)(vector & 0x1fU), &irrptr[idx].v); +} + +bool vlapic_has_pending_intr(struct vmrt_vm_vcpu *vcpu) +{ + struct acrn_vlapic *vlapic = vcpu_vlapic(vcpu); + return vlapic->ops->has_pending_intr(vcpu); +} + +static bool apicv_basic_apic_read_access_may_valid(__unused uint32_t offset) +{ + return true; +} + +static bool apicv_advanced_apic_read_access_may_valid(uint32_t offset) +{ + return ((offset == APIC_OFFSET_CMCI_LVT) || (offset == APIC_OFFSET_TIMER_CCR)); +} + +static bool apicv_basic_apic_write_access_may_valid(uint32_t offset) +{ + return (offset != APIC_OFFSET_SELF_IPI); +} + +static bool apicv_advanced_apic_write_access_may_valid(uint32_t offset) +{ + return (offset == APIC_OFFSET_CMCI_LVT); +} + +int32_t veoi_vmexit_handler(struct vmrt_vm_vcpu *vcpu) +{ + struct acrn_vlapic *vlapic = NULL; + + uint32_t vector; + struct lapic_regs *lapic; + struct lapic_reg *tmrptr; + uint32_t idx; + + /* TODO: fix veoi if necessary */ + assert(0); + + return 0; +} + +static void vlapic_x2apic_self_ipi_handler(struct acrn_vlapic *vlapic) +{ + /* TODO: fix x2apic virtualization if necessary */ + struct lapic_regs *lapic; + uint32_t vector; + + lapic = vlapic->apic_page; + vector = lapic->self_ipi.v & APIC_VECTOR_MASK; + assert(0); +} + + +/* + * TPR threshold (32 bits). Bits 3:0 of this field determine the threshold + * below which bits 7:4 of VTPR (see Section 29.1.1) cannot fall. + */ +void vlapic_update_tpr_threshold(const struct acrn_vlapic *vlapic) +{ + /* TODO: fix trp virtualization if necessary */ + uint32_t irr, tpr, threshold; + assert(0); +} + +int32_t tpr_below_threshold_vmexit_handler(struct vmrt_vm_vcpu *vcpu) +{ + /* TODO: fix trp virtualization if necessary */ + assert(0); + + return 0; +} + +static const struct acrn_apicv_ops apicv_basic_ops = { + .accept_intr = apicv_basic_accept_intr, + .inject_intr = apicv_basic_inject_intr, + .has_pending_delivery_intr = apicv_basic_has_pending_delivery_intr, + .has_pending_intr = apicv_basic_has_pending_intr, + .apic_read_access_may_valid = apicv_basic_apic_read_access_may_valid, + .apic_write_access_may_valid = apicv_basic_apic_write_access_may_valid, + .x2apic_read_msr_may_valid = apicv_basic_x2apic_read_msr_may_valid, + .x2apic_write_msr_may_valid = apicv_basic_x2apic_write_msr_may_valid, +}; + +static const struct acrn_apicv_ops apicv_advanced_ops = { + .accept_intr = apicv_advanced_accept_intr, + .inject_intr = apicv_advanced_inject_intr, + .has_pending_delivery_intr = apicv_advanced_has_pending_delivery_intr, + .has_pending_intr = apicv_advanced_has_pending_intr, + .apic_read_access_may_valid = apicv_advanced_apic_read_access_may_valid, + .apic_write_access_may_valid = apicv_advanced_apic_write_access_may_valid, + .x2apic_read_msr_may_valid = apicv_advanced_x2apic_read_msr_may_valid, + .x2apic_write_msr_may_valid = apicv_advanced_x2apic_write_msr_may_valid, +}; + +/* + * set apicv ops for apicv basic mode or apicv advenced mode. + */ +void vlapic_set_apicv_ops(void) +{ + if (is_apicv_advanced_feature_supported()) { + apicv_ops = &apicv_advanced_ops; + } else { + apicv_ops = &apicv_basic_ops; + } +} + +static uint16_t vm_apicid2vcpu_id(struct vmrt_vm_comp *vm, uint32_t lapicid) +{ + uint16_t i; + struct vmrt_vm_vcpu *vcpu = NULL; + uint16_t cpu_id = INVALID_CPU_ID; + + for (int i = 0; i < vm->num_vcpu; i++) { + vcpu = &vm->vcpus[i]; + if (vcpu_vlapic(vcpu)->vapic_id == lapicid) { + cpu_id = vcpu->cpuid; + break; + } + } + + if (cpu_id == INVALID_CPU_ID) { + printc("%s: bad lapicid %u", __func__, lapicid); + assert(0); + } + + return cpu_id; + +} + +static inline void set_dest_mask_phys(struct vmrt_vm_comp *vm, uint64_t *dmask, uint32_t dest) +{ + uint16_t vcpu_id; + + vcpu_id = vm_apicid2vcpu_id(vm, dest); + if (vcpu_id < vm->num_vcpu) { + bitmap_set_nolock(vcpu_id, dmask); + } +} + +/* + * This function tells if a vlapic belongs to the destination. + * If yes, return true, else reture false. + * + * @pre vlapic != NULL + */ +static inline bool is_dest_field_matched(const struct acrn_vlapic *vlapic, uint32_t dest) +{ + uint32_t logical_id, cluster_id, dest_logical_id, dest_cluster_id; + uint32_t ldr = vlapic->apic_page->ldr.v; + bool ret = false; + + if (is_x2apic_enabled(vlapic)) { + logical_id = ldr & 0xFFFFU; + cluster_id = (ldr >> 16U) & 0xFFFFU; + dest_logical_id = dest & 0xFFFFU; + dest_cluster_id = (dest >> 16U) & 0xFFFFU; + if ((cluster_id == dest_cluster_id) && ((logical_id & dest_logical_id) != 0U)) { + ret = true; + } + } else { + uint32_t dfr = vlapic->apic_page->dfr.v; + if ((dfr & APIC_DFR_MODEL_MASK) == APIC_DFR_MODEL_FLAT) { + /* + * In the "Flat Model" the MDA is interpreted as an 8-bit wide + * bitmask. This model is available in the xAPIC mode only. + */ + logical_id = ldr >> 24U; + dest_logical_id = dest & 0xffU; + if ((logical_id & dest_logical_id) != 0U) { + ret = true; + } + } else if ((dfr & APIC_DFR_MODEL_MASK) == APIC_DFR_MODEL_CLUSTER) { + /* + * In the "Cluster Model" the MDA is used to identify a + * specific cluster and a set of APICs in that cluster. + */ + logical_id = (ldr >> 24U) & 0xfU; + cluster_id = ldr >> 28U; + dest_logical_id = dest & 0xfU; + dest_cluster_id = (dest >> 4U) & 0xfU; + if ((cluster_id == dest_cluster_id) && ((logical_id & dest_logical_id) != 0U)) { + ret = true; + } + } else { + /* Guest has configured a bad logical model for this vcpu. */ + printc("vlapic has bad logical model %x", dfr); + assert(0); + } + } + + return ret; +} + +/* + * This function populates 'dmask' with the set of vcpus that match the + * addressing specified by the (dest, phys, lowprio) tuple. + */ +uint64_t +vlapic_calc_dest_noshort(struct vmrt_vm_comp *vm, bool is_broadcast, + uint32_t dest, bool phys, bool lowprio) +{ + uint64_t dmask = 0UL; + struct acrn_vlapic *vlapic, *lowprio_dest = NULL; + struct vmrt_vm_vcpu *vcpu; + uint16_t vcpu_id; + + if (is_broadcast) { + /* Broadcast in both logical and physical modes. */ + printc("Broadcast is not supported now\n"); + assert(0); + } else if (phys) { + /* Physical mode: "dest" is local APIC ID. */ + printc("vlapic phy dst mode to find cpu\n"); + set_dest_mask_phys(vm, &dmask, dest); + } else { + /* + * Logical mode: "dest" is message destination addr + * to be compared with the logical APIC ID in LDR. + */ + for (int i = 0; i < vm->num_vcpu; i++) { + vcpu = &vm->vcpus[i]; + vcpu_id = i; + vlapic = vcpu_vlapic(vcpu); + if (!is_dest_field_matched(vlapic, dest)) { + continue; + } + + if (lowprio) { + /* + * for lowprio delivery mode, the lowest-priority one + * among all "dest" matched processors accepts the intr. + */ + if (lowprio_dest == NULL) { + lowprio_dest = vlapic; + } else if (lowprio_dest->apic_page->ppr.v > vlapic->apic_page->ppr.v) { + lowprio_dest = vlapic; + } else { + /* No other state currently, do nothing */ + } + } else { + bitmap_set_nolock(vcpu_id, &dmask); + } + } + + if (lowprio && (lowprio_dest != NULL)) { + bitmap_set_nolock(vlapic2vcpu(lowprio_dest)->cpuid, &dmask); + } + } + + return dmask; +} + +void +vlapic_receive_intr(struct vmrt_vm_comp *vm, bool level, uint32_t dest, bool phys, + uint32_t delmode, uint32_t vec, bool rh) +{ + bool lowprio; + uint16_t vcpu_id; + uint64_t dmask; + struct vmrt_vm_vcpu *target_vcpu; + + if ((delmode != IOAPIC_RTE_DELMODE_FIXED) && + (delmode != IOAPIC_RTE_DELMODE_LOPRI) && + (delmode != IOAPIC_RTE_DELMODE_EXINT)) { + printc("vlapic intr invalid delmode %#x", delmode); + assert(0); + } else { + lowprio = (delmode == IOAPIC_RTE_DELMODE_LOPRI) || rh; + + /* + * We don't provide any virtual interrupt redirection hardware so + * all interrupts originating from the ioapic or MSI specify the + * 'dest' in the legacy xAPIC format. + */ + dmask = vlapic_calc_dest_noshort(vm, false, dest, phys, lowprio); + + for (vcpu_id = 0U; vcpu_id < vm->num_vcpu; vcpu_id++) { + struct acrn_vlapic *vlapic; + if ((dmask & (1UL << vcpu_id)) != 0UL) { + target_vcpu = vmrt_get_vcpu(vm, vcpu_id); + + /* only make request when vlapic enabled */ + vlapic = vcpu_vlapic(target_vcpu); + if (vlapic_enabled(vlapic)) { + if (delmode == IOAPIC_RTE_DELMODE_EXINT) { + assert(0); + } else { + vlapic_set_intr(target_vcpu, vec, level); + } + } else {assert(0);} + } + } + } +} + +void +vlapic_reset(struct acrn_vlapic *vlapic) +{ + struct lapic_regs *lapic; + + vlapic->msr_apicbase = DEFAULT_APIC_BASE; + + if (vlapic2vcpu(vlapic)->cpuid == BSP_CPU_ID) { + vlapic->msr_apicbase |= APICBASE_BSP; + } + vlapic->vapic_id = vlapic2vcpu(vlapic)->cpuid; + + /* Upon reset, vlapic is set to xAPIC mode. */ + vlapic->msr_apicbase |= APICBASE_XAPIC; + + lapic = vlapic->apic_page; + (void)memset((void *)lapic, 0U, sizeof(struct lapic_regs)); + + lapic->id.v = vlapic->vapic_id; + if (!is_x2apic_enabled(vlapic)) { + lapic->id.v <<= APIC_ID_SHIFT; + } + + lapic->version.v = VLAPIC_VERSION; + lapic->version.v |= (VLAPIC_MAXLVT_INDEX << MAXLVTSHIFT); + lapic->dfr.v = 0xffffffffU; + lapic->svr.v = APIC_SVR_VECTOR; + vlapic_mask_lvts(vlapic); + + lapic->icr_timer.v = 0U; + lapic->dcr_timer.v = 0U; + vlapic_write_dcr(vlapic); + + vlapic->svr_last = lapic->svr.v; + + vlapic->isrv = 0U; +} + + +int32_t apic_write_vmexit_handler(struct vmrt_vm_vcpu *vcpu) +{ + uint64_t qual; + int32_t err = 0; + uint32_t offset; + struct acrn_vlapic *vlapic = NULL; + + qual = vcpu->shared_region->qualification; + offset = (uint32_t)(qual & 0xFFFUL); + + vlapic = vcpu->vlapic; + + switch (offset) { + case APIC_OFFSET_ID: + /* Force APIC ID as read only */ + break; + case APIC_OFFSET_LDR: + vlapic_write_ldr(vlapic); + break; + case APIC_OFFSET_DFR: + vlapic_write_dfr(vlapic); + break; + case APIC_OFFSET_SVR: + vlapic_write_svr(vlapic); + break; + case APIC_OFFSET_ESR: + vlapic_write_esr(vlapic); + break; + case APIC_OFFSET_ICR_LOW: + vlapic_write_icrlo(vlapic); + break; + case APIC_OFFSET_CMCI_LVT: + case APIC_OFFSET_TIMER_LVT: + case APIC_OFFSET_THERM_LVT: + case APIC_OFFSET_PERF_LVT: + case APIC_OFFSET_LINT0_LVT: + case APIC_OFFSET_LINT1_LVT: + case APIC_OFFSET_ERROR_LVT: + vlapic_write_lvt(vlapic, offset); + break; + case APIC_OFFSET_TIMER_ICR: + vlapic_write_icrtmr(vlapic); + break; + case APIC_OFFSET_TIMER_DCR: + vlapic_write_dcr(vlapic); + break; + case APIC_OFFSET_SELF_IPI: + if (is_x2apic_enabled(vlapic)) { + /* Don't support x2apic */ + assert(0); + break; + } + /* falls through */ + default: + err = -EACCES; + printc("Unhandled APIC-Write, offset:0x%x", offset); + VM_PANIC(vcpu); + break; + } + + return err; +} + +void +lapic_write_handler(struct vmrt_vm_vcpu *vcpu) +{ + apic_write_vmexit_handler(vcpu); +} + +void +lapic_intr_inject(struct vmrt_vm_vcpu *vcpu, u8_t vector, int autoeoi) +{ + struct vm_vcpu_shared_region *shared_region = vcpu->shared_region; + struct acrn_vlapic *vlapic = vcpu_vlapic(vcpu); + struct lapic_regs *lapic = vlapic->apic_page; + u8_t offset = vector / 32; + u8_t bit = vector % 32; + + u8_t svi = (u8_t)(shared_region->interrupt_status >> 8); + u8_t rvi = (u8_t)shared_region->interrupt_status; + + if (svi == vector && autoeoi) { + /* TODO: svi should be the second highest priority bit in isr */ + svi = 0; + lapic->isr[offset].v &= ~(1U << bit); + } + if (rvi < vector) { + rvi = vector; + } + + /* Accept the interrupt */ + lapic->irr[offset].v |= (1U << bit); + + shared_region->interrupt_status = svi << 8 | rvi; +} diff --git a/src/components/implementation/simple_vmm/noop_nf/vlapic.h b/src/components/implementation/simple_vmm/noop_nf/vlapic.h new file mode 100644 index 0000000000..d4e8645661 --- /dev/null +++ b/src/components/implementation/simple_vmm/noop_nf/vlapic.h @@ -0,0 +1,260 @@ +/*- + * Copyright (c) 2011 NetApp, Inc. + * Copyright (c) 2017-2022 Intel Corporation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef VLAPIC_H +#define VLAPIC_H + +#include +#include + +/** + * @file vlapic.h + * + * @brief public APIs for virtual LAPIC + */ + + +#define VLAPIC_MAXLVT_INDEX APIC_LVT_CMCI + +struct hv_timer { + // struct list_head node; /**< link all timers */ + int mode; /**< timer mode: one-shot or periodic */ + uint64_t timeout; /**< tsc deadline to interrupt */ + uint64_t period_in_cycle; /**< period of the periodic timer in CPU ticks */ + // timer_handle_t func; /**< callback if time reached */ + void *priv_data; /**< func private data */ +}; + +struct vlapic_timer { + struct hv_timer timer; + uint32_t mode; + uint32_t tmicr; + uint32_t divisor_shift; +}; + +struct acrn_vlapic { + /* + * Please keep 'apic_page' as the first field in + * current structure, as below alignment restrictions are mandatory + * to support APICv features: + * - 'apic_page' MUST be 4KB aligned. + * IRR, TMR and PIR could be accessed by other vCPUs when deliver + * an interrupt to vLAPIC. + */ + struct lapic_regs *apic_page; + + struct vmrt_vm_vcpu *vcpu; + + uint32_t vapic_id; + uint32_t esr_pending; + int32_t esr_firing; + + struct vlapic_timer vtimer; + + /* + * isrv: vector number for the highest priority bit that is set in the ISR + */ + uint32_t isrv; + + uint64_t msr_apicbase; + + const struct acrn_apicv_ops *ops; + + /* + * Copies of some registers in the virtual APIC page. We do this for + * a couple of different reasons: + * - to be able to detect what changed (e.g. svr_last) + * - to maintain a coherent snapshot of the register (e.g. lvt_last) + */ + uint32_t svr_last; + uint32_t lvt_last[VLAPIC_MAXLVT_INDEX + 1]; +} __attribute__((aligned(PAGE_SIZE_4K))); + + +struct vmrt_vm_vcpu; +struct acrn_apicv_ops { + void (*accept_intr)(struct acrn_vlapic *vlapic, uint32_t vector, bool level); + void (*inject_intr)(struct acrn_vlapic *vlapic, bool guest_irq_enabled, bool injected); + bool (*has_pending_delivery_intr)(struct vmrt_vm_vcpu *vcpu); + bool (*has_pending_intr)(struct vmrt_vm_vcpu *vcpu); + bool (*apic_read_access_may_valid)(uint32_t offset); + bool (*apic_write_access_may_valid)(uint32_t offset); + bool (*x2apic_read_msr_may_valid)(uint32_t offset); + bool (*x2apic_write_msr_may_valid)(uint32_t offset); +}; + +enum reset_mode; +extern const struct acrn_apicv_ops *apicv_ops; +void vlapic_set_apicv_ops(void); + +/** + * @brief virtual LAPIC + * + * @addtogroup acrn_vlapic ACRN vLAPIC + * @{ + */ + +void vlapic_inject_intr(struct vmrt_vm_vcpu *vcpu); +bool vlapic_has_pending_delivery_intr(struct vmrt_vm_vcpu *vcpu); +bool vlapic_has_pending_intr(struct vmrt_vm_vcpu *vcpu); + +/** + * Returns the highest priority pending vector on vLAPIC, or + * 0 if there is no pending vector. + */ +uint32_t vlapic_get_next_pending_intr(struct vmrt_vm_vcpu *vcpu); + +/** + * Clears a pending vector from vIRR. Returns true if + * the bit was previously present, false otherwise. + */ +bool vlapic_clear_pending_intr(struct vmrt_vm_vcpu *vcpu, uint32_t vector); + +uint64_t vlapic_get_tsc_deadline_msr(const struct acrn_vlapic *vlapic); +void vlapic_set_tsc_deadline_msr(struct acrn_vlapic *vlapic, uint64_t val_arg); +uint64_t vlapic_get_apicbase(const struct acrn_vlapic *vlapic); +int32_t vlapic_set_apicbase(struct acrn_vlapic *vlapic, uint64_t new); +int32_t vlapic_x2apic_read(struct vmrt_vm_vcpu *vcpu, uint32_t msr, uint64_t *val); +int32_t vlapic_x2apic_write(struct vmrt_vm_vcpu *vcpu, uint32_t msr, uint64_t val); + +/* + * Signals to the LAPIC that an interrupt at 'vector' needs to be generated + * to the 'cpu', the state is recorded in IRR. + * @pre vcpu != NULL + * @pre vector <= 255U + */ +void vlapic_set_intr(struct vmrt_vm_vcpu *vcpu, uint32_t vector, bool level); + +#define LAPIC_TRIG_LEVEL true +#define LAPIC_TRIG_EDGE false + +static inline uint32_t prio(uint32_t x) +{ + return (x >> 4U); +} + +/** + * @brief Triggers LAPIC local interrupt(LVT). + * + * @param[in] vm Pointer to VM data structure + * @param[in] vcpu_id_arg ID of vCPU, BROADCAST_CPU_ID means triggering + * interrupt to all vCPUs. + * @param[in] lvt_index The index which LVT would to be fired. + * + * @retval 0 on success. + * @retval -EINVAL on error that vcpu_id_arg or vector of the LVT is invalid. + * + * @pre vm != NULL + */ +int32_t vlapic_set_local_intr(struct vmrt_vm_comp *vm, uint16_t vcpu_id_arg, uint32_t lvt_index); + +/** + * @brief Inject MSI to target VM. + * + * @param[in] vm Pointer to VM data structure + * @param[in] addr MSI address. + * @param[in] data MSI data. + * + * @retval 0 on success. + * @retval -1 on error that addr is invalid. + * + * @pre vm != NULL + */ +int32_t vlapic_inject_msi(struct vmrt_vm_comp *vm, uint64_t addr, uint64_t data); + + +void vlapic_receive_intr(struct vmrt_vm_comp *vm, bool level, uint32_t dest, + bool phys, uint32_t delmode, uint32_t vec, bool rh); + +/** + * @pre vlapic != NULL + */ +static inline uint32_t vlapic_get_apicid(const struct acrn_vlapic *vlapic) +{ + return vlapic->vapic_id; +} + +void vlapic_create(struct vmrt_vm_vcpu *vcpu, uint16_t pcpu_id); +/* + * @pre vcpu != NULL + */ +void vlapic_free(struct vmrt_vm_vcpu *vcpu); + +void vlapic_reset(struct acrn_vlapic *vlapic); +void vlapic_restore(struct acrn_vlapic *vlapic, const struct lapic_regs *regs); +uint64_t vlapic_apicv_get_apic_access_addr(void); +uint64_t vlapic_apicv_get_apic_page_addr(struct acrn_vlapic *vlapic); +int32_t apic_access_vmexit_handler(struct vmrt_vm_vcpu *vcpu); +int32_t apic_write_vmexit_handler(struct vmrt_vm_vcpu *vcpu); +int32_t veoi_vmexit_handler(struct vmrt_vm_vcpu *vcpu); +void vlapic_update_tpr_threshold(const struct acrn_vlapic *vlapic); +int32_t tpr_below_threshold_vmexit_handler(struct vmrt_vm_vcpu *vcpu); +uint64_t vlapic_calc_dest_noshort(struct vmrt_vm_comp *vm, bool is_broadcast, + uint32_t dest, bool phys, bool lowprio); +bool is_x2apic_enabled(const struct acrn_vlapic *vlapic); +bool is_xapic_enabled(const struct acrn_vlapic *vlapic); + +static inline bool is_apicv_advanced_feature_supported(void) +{ + return false; +} +#define POSTED_INTR_ON 0U +/* Posted Interrupt Descriptor (PID) in VT-d spec */ +struct pi_desc { + /* Posted Interrupt Requests, one bit per requested vector */ + uint64_t pir[4]; + + union { + struct { + /* Outstanding Notification */ + uint16_t on:1; + + /* Suppress Notification, of non-urgent interrupts */ + uint16_t sn:1; + + uint16_t rsvd_1:14; + + /* Notification Vector */ + uint8_t nv; + + uint8_t rsvd_2; + + /* Notification destination, a physical LAPIC ID */ + uint32_t ndst; + } bits; + + uint64_t value; + } control; + + uint32_t rsvd[6]; +} __attribute__((aligned(64)));; +/** + * @} + */ +/* End of acrn_vlapic */ +#endif /* VLAPIC_H */ diff --git a/src/components/implementation/simple_vmm/noop_nf/vlapic_priv.h b/src/components/implementation/simple_vmm/noop_nf/vlapic_priv.h new file mode 100644 index 0000000000..6c66f6c84e --- /dev/null +++ b/src/components/implementation/simple_vmm/noop_nf/vlapic_priv.h @@ -0,0 +1,84 @@ +/*- + * Copyright (c) 2013 Neel Natu + * Copyright (c) 2017-2022 Intel Corporation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef VLAPIC_PRIV_H +#define VLAPIC_PRIV_H + +/* + * APIC Register: Offset Description + */ +#define APIC_OFFSET_ID 0x20U /* Local APIC ID */ +#define APIC_OFFSET_VER 0x30U /* Local APIC Version */ +#define APIC_OFFSET_TPR 0x80U /* Task Priority Register */ +#define APIC_OFFSET_APR 0x90U /* Arbitration Priority */ +#define APIC_OFFSET_PPR 0xA0U /* Processor Priority Register */ +#define APIC_OFFSET_EOI 0xB0U /* EOI Register */ +#define APIC_OFFSET_RRR 0xC0U /* Remote read */ +#define APIC_OFFSET_LDR 0xD0U /* Logical Destination */ +#define APIC_OFFSET_DFR 0xE0U /* Destination Format Register */ +#define APIC_OFFSET_SVR 0xF0U /* Spurious Vector Register */ +#define APIC_OFFSET_ISR0 0x100U /* In Service Register */ +#define APIC_OFFSET_ISR1 0x110U +#define APIC_OFFSET_ISR2 0x120U +#define APIC_OFFSET_ISR3 0x130U +#define APIC_OFFSET_ISR4 0x140U +#define APIC_OFFSET_ISR5 0x150U +#define APIC_OFFSET_ISR6 0x160U +#define APIC_OFFSET_ISR7 0x170U +#define APIC_OFFSET_TMR0 0x180U /* Trigger Mode Register */ +#define APIC_OFFSET_TMR1 0x190U +#define APIC_OFFSET_TMR2 0x1A0U +#define APIC_OFFSET_TMR3 0x1B0U +#define APIC_OFFSET_TMR4 0x1C0U +#define APIC_OFFSET_TMR5 0x1D0U +#define APIC_OFFSET_TMR6 0x1E0U +#define APIC_OFFSET_TMR7 0x1F0U +#define APIC_OFFSET_IRR0 0x200U /* Interrupt Request Register */ +#define APIC_OFFSET_IRR1 0x210U +#define APIC_OFFSET_IRR2 0x220U +#define APIC_OFFSET_IRR3 0x230U +#define APIC_OFFSET_IRR4 0x240U +#define APIC_OFFSET_IRR5 0x250U +#define APIC_OFFSET_IRR6 0x260U +#define APIC_OFFSET_IRR7 0x270U +#define APIC_OFFSET_ESR 0x280U /* Error Status Register */ +#define APIC_OFFSET_CMCI_LVT 0x2F0U /* Local Vector Table (CMCI) */ +#define APIC_OFFSET_ICR_LOW 0x300U /* Interrupt Command Register */ +#define APIC_OFFSET_ICR_HI 0x310U +#define APIC_OFFSET_TIMER_LVT 0x320U /* Local Vector Table (Timer) */ +#define APIC_OFFSET_THERM_LVT 0x330U /* Local Vector Table (Thermal) */ +#define APIC_OFFSET_PERF_LVT 0x340U /* Local Vector Table (PMC) */ +#define APIC_OFFSET_LINT0_LVT 0x350U /* Local Vector Table (LINT0) */ +#define APIC_OFFSET_LINT1_LVT 0x360U /* Local Vector Table (LINT1) */ +#define APIC_OFFSET_ERROR_LVT 0x370U /* Local Vector Table (ERROR) */ +#define APIC_OFFSET_TIMER_ICR 0x380U /* Timer's Initial Count */ +#define APIC_OFFSET_TIMER_CCR 0x390U /* Timer's Current Count */ +#define APIC_OFFSET_TIMER_DCR 0x3E0U /* Timer's Divide Configuration */ +#define APIC_OFFSET_SELF_IPI 0x3F0U /* Self IPI Register */ + +#endif /* VLAPIC_PRIV_H */ diff --git a/src/components/implementation/simple_vmm/noop_nf/vmmio.c b/src/components/implementation/simple_vmm/noop_nf/vmmio.c new file mode 100644 index 0000000000..1efb26ee1b --- /dev/null +++ b/src/components/implementation/simple_vmm/noop_nf/vmmio.c @@ -0,0 +1,53 @@ +#include +#include +#include +#include + +void +ept_violation_handler(struct vmrt_vm_vcpu *vcpu) +{ + volatile struct vm_vcpu_shared_region *regs = vcpu->shared_region; + u64_t qualification = regs->qualification; + u64_t gpa; + struct acrn_mmio_request *mmio_req = vcpu->mmio_request; + + gpa = regs->gpa; + + /* Specify if read or write operation */ + if ((qualification & 0x2UL) != 0UL) { + /* Write operation */ + mmio_req->direction = ACRN_IOREQ_DIR_WRITE; + mmio_req->value = 0UL; + } else { + /* Read operation */ + mmio_req->direction = ACRN_IOREQ_DIR_READ; + } + + mmio_req->address = gpa; + + if (gpa >= IOAPIC_BASE_ADDR && gpa < IOAPIC_BASE_ADDR + PAGE_SIZE_4K) { + int ret = decode_instruction(vcpu); + + if (ret > 0) { + mmio_req->size = (uint64_t)ret; + } else { + VM_PANIC(vcpu); + } + + if (mmio_req->direction == ACRN_IOREQ_DIR_WRITE) { + if (emulate_instruction(vcpu) != 0) { + VM_PANIC(vcpu); + } + } + + vioapic_mmio_access_handler(vcpu); + + if (mmio_req->direction == ACRN_IOREQ_DIR_READ) { + /* Emulate instruction and update vcpu register set */ + (void)emulate_instruction(vcpu); + } + GOTO_NEXT_INST(regs); + } else { + VM_PANIC(vcpu); + } +} diff --git a/src/components/implementation/simple_vmm/noop_nf/vmsr.c b/src/components/implementation/simple_vmm/noop_nf/vmsr.c new file mode 100644 index 0000000000..1f45f13692 --- /dev/null +++ b/src/components/implementation/simple_vmm/noop_nf/vmsr.c @@ -0,0 +1,249 @@ +#include +#include + +void +rdmsr_handler(struct vmrt_vm_vcpu *vcpu) +{ + volatile struct vm_vcpu_shared_region *regs = vcpu->shared_region; + + switch (regs->cx) { + case MSR_IA32_EFER: + { + u64_t guest_efer = regs->efer; + regs->ax = (u32_t)guest_efer; + regs->dx = (u32_t)(guest_efer >> 32); + goto done; + } + case MSR_IA32_MISC_ENABLE: + { + /* Note: read only MSR, and its value can be fixed for all cores */ + u64_t misc = 0x800001; + regs->ax = (u32_t)misc; + regs->dx = (u32_t)(misc >> 32); + goto done; + } + case MSR_IA32_BIOS_SIGN_ID: + { + /* Note: microcode is pre-set in the kernel */ + u64_t v = regs->microcode_version; + regs->ax = (u32_t)v; + regs->dx = (u32_t)(v >> 32); + goto done; + } + case MSR_IA32_TSC_ADJUST: + { + /* TODO: need to handle tsc adjustment in VM */ + u32_t ax, dx; + regs->ax = 0; + regs->dx = 0; + goto done; + } + + /* MTRRs can be ingored in Linux and Linux knows it is a virtual environment */ + case MSR_IA32_MTRR_CAP: + case MSR_IA32_MTRR_DEF_TYPE: + case MSR_IA32_MTRR_PHYSBASE_0: + case MSR_IA32_MTRR_PHYSMASK_0: + case MSR_IA32_MTRR_PHYSBASE_1: + case MSR_IA32_MTRR_PHYSMASK_1: + case MSR_IA32_MTRR_PHYSBASE_2: + case MSR_IA32_MTRR_PHYSMASK_2: + case MSR_IA32_MTRR_PHYSBASE_3: + case MSR_IA32_MTRR_PHYSMASK_3: + case MSR_IA32_MTRR_PHYSBASE_4: + case MSR_IA32_MTRR_PHYSMASK_4: + case MSR_IA32_MTRR_PHYSBASE_5: + case MSR_IA32_MTRR_PHYSMASK_5: + case MSR_IA32_MTRR_PHYSBASE_6: + case MSR_IA32_MTRR_PHYSMASK_6: + case MSR_IA32_MTRR_PHYSBASE_7: + case MSR_IA32_MTRR_PHYSMASK_7: + case MSR_IA32_MTRR_PHYSBASE_8: + case MSR_IA32_MTRR_PHYSMASK_8: + case MSR_IA32_MTRR_PHYSBASE_9: + case MSR_IA32_MTRR_PHYSMASK_9: + case MSR_IA32_MTRR_FIX64K_00000: + case MSR_IA32_MTRR_FIX16K_80000: + case MSR_IA32_MTRR_FIX16K_A0000: + case MSR_IA32_MTRR_FIX4K_C0000: + case MSR_IA32_MTRR_FIX4K_C8000: + case MSR_IA32_MTRR_FIX4K_D0000: + case MSR_IA32_MTRR_FIX4K_D8000: + case MSR_IA32_MTRR_FIX4K_E0000: + case MSR_IA32_MTRR_FIX4K_E8000: + case MSR_IA32_MTRR_FIX4K_F0000: + case MSR_IA32_MTRR_FIX4K_F8000: + case MSR_IA32_PAT: + { + regs->ax = 0; + regs->dx = 0; + goto done; + } + case MSR_PPERF: + { + /* FIXME: should inject #GP to guest, thus guest knows this MSR is not present */ + regs->ax = 0; + regs->dx = 0; + goto done; + } + case MSR_SMI_COUNT: + { + /* FIXME: should inject #GP to guest, thus guest knows this MSR is not present */ + regs->ax = 0; + regs->dx = 0; + goto done; + } + case MSR_IA32_APIC_BASE: + { + /* TODO: for non-BSP, the BSP flag should be cleared */ + /* 0x900 : enable xapic and this is BSP */ + regs->ax = 0XFEE00000 | 0x900; + regs->dx = 0; + goto done; + } + case MSR_IA32_FEATURE_CONTROL: + { + /* Lock the feature control in VM */ + regs->ax = 1; + regs->dx = 0; + goto done; + } + case MSR_MISC_FEATURE_ENABLES: + { + /* This MSR can be reserved to 0 */ + regs->ax = 0; + regs->dx = 0; + goto done; + } + case MSR_PLATFORM_INFO: + { + /* Contains power management stuff and can be ignored */ + regs->ax = 0; + regs->dx = 0; + goto done; + } + case MSR_IA32_SPEC_CTRL: + { + /* This MSR has a value of 0 after reset, thus just keep it ad default, don't modify */ + regs->ax = 0; + regs->dx = 0; + goto done; + } + default: + VM_PANIC(vcpu); + } +done: + GOTO_NEXT_INST(regs); + return; +} + +void +wrmsr_handler(struct vmrt_vm_vcpu *vcpu) +{ + volatile struct vm_vcpu_shared_region *regs = vcpu->shared_region; + + switch (regs->cx) { + case MSR_IA32_EFER: + { + u64_t guest_efer; + guest_efer = regs->ax & 0XFFFFFFFF; + guest_efer |= ((regs->dx & 0XFFFFFFFF) << 32); + regs->efer = guest_efer; + + goto done; + } + case MSR_IA32_BIOS_SIGN_ID: + { + /* Microcode has been retrived in the kernel, thus don't need to process here */ + goto done; + } + case MSR_IA32_XSS: + { + u64_t guest_xss; + guest_xss = regs->ax & 0XFFFFFFFF; + guest_xss |= ((regs->dx & 0XFFFFFFFF) << 32); + if ((guest_xss & ~(MSR_IA32_XSS_PT | MSR_IA32_XSS_HDC)) != 0UL) { + /* Assuming other features are not supported */ + VM_PANIC(vcpu); + } else { + /* TODO: only enable the xss pt and hdx, but currently just ignore them */ + } + goto done; + } + case MSR_IA32_MTRR_CAP: + case MSR_IA32_MTRR_DEF_TYPE: + case MSR_IA32_MTRR_PHYSBASE_0: + case MSR_IA32_MTRR_PHYSMASK_0: + case MSR_IA32_MTRR_PHYSBASE_1: + case MSR_IA32_MTRR_PHYSMASK_1: + case MSR_IA32_MTRR_PHYSBASE_2: + case MSR_IA32_MTRR_PHYSMASK_2: + case MSR_IA32_MTRR_PHYSBASE_3: + case MSR_IA32_MTRR_PHYSMASK_3: + case MSR_IA32_MTRR_PHYSBASE_4: + case MSR_IA32_MTRR_PHYSMASK_4: + case MSR_IA32_MTRR_PHYSBASE_5: + case MSR_IA32_MTRR_PHYSMASK_5: + case MSR_IA32_MTRR_PHYSBASE_6: + case MSR_IA32_MTRR_PHYSMASK_6: + case MSR_IA32_MTRR_PHYSBASE_7: + case MSR_IA32_MTRR_PHYSMASK_7: + case MSR_IA32_MTRR_PHYSBASE_8: + case MSR_IA32_MTRR_PHYSMASK_8: + case MSR_IA32_MTRR_PHYSBASE_9: + case MSR_IA32_MTRR_PHYSMASK_9: + case MSR_IA32_MTRR_FIX64K_00000: + case MSR_IA32_MTRR_FIX16K_80000: + case MSR_IA32_MTRR_FIX16K_A0000: + case MSR_IA32_MTRR_FIX4K_C0000: + case MSR_IA32_MTRR_FIX4K_C8000: + case MSR_IA32_MTRR_FIX4K_D0000: + case MSR_IA32_MTRR_FIX4K_D8000: + case MSR_IA32_MTRR_FIX4K_E0000: + case MSR_IA32_MTRR_FIX4K_E8000: + case MSR_IA32_MTRR_FIX4K_F0000: + case MSR_IA32_MTRR_FIX4K_F8000: + case MSR_IA32_PAT: + { + /* MTRRs can be ingored in Linux and Linux knows it is a virtual environment */ + goto done; + } + case MSR_IA32_TSC_DEADLINE: { + u64_t tsc_future, curr_tsc; + rdtscll(curr_tsc); + tsc_future = regs->ax & 0xffffffff; + tsc_future |= ((regs->dx & 0xffffffff) << 32); + vcpu->next_timer = tsc_future; + + goto done; + } + case MSR_MISC_FEATURE_ENABLES: + { + /* Write to this MSR will be all 0 since we ignored this, doesn't matter */ + goto done; + } + case MSR_IA32_SYSENTER_CS: + case MSR_IA32_SYSENTER_ESP: + case MSR_IA32_SYSENTER_EIP: + { + /* 64-bit system doesn't require these MSRs, its fine to ignore them */ + goto done; + } + case MSR_IA32_SPEC_CTRL: + { + /* This MSR has a value of 0 after reset, thus just keep it ad default, don't modify */ + goto done; + } + case MSR_IA32_APIC_BASE: + { + VM_PANIC(vcpu); + goto done; + } + default: + VM_PANIC(vcpu);; + } + +done: + GOTO_NEXT_INST(regs); + return; +} diff --git a/src/components/implementation/simple_vmm/noop_nf/vpic.h b/src/components/implementation/simple_vmm/noop_nf/vpic.h new file mode 100644 index 0000000000..b9cab609cb --- /dev/null +++ b/src/components/implementation/simple_vmm/noop_nf/vpic.h @@ -0,0 +1,191 @@ +/*- + * Copyright (c) 2014 Tycho Nightingale + * Copyright (c) 2017-2022 Intel Corporation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef VPIC_H +#define VPIC_H + +#include +/** + * @file vpic.h + * + * @brief public APIs for virtual PIC + */ + + +#define ICU_IMR_OFFSET 1U + +/* Initialization control word 1. Written to even address. */ +#define ICW1_IC4 0x01U /* ICW4 present */ +#define ICW1_SNGL 0x02U /* 1 = single, 0 = cascaded */ +#define ICW1_ADI 0x04U /* 1 = 4, 0 = 8 byte vectors */ +#define ICW1_LTIM 0x08U /* 1 = level trigger, 0 = edge */ +#define ICW1_RESET 0x10U /* must be 1 */ +/* 0x20 - 0x80 - in 8080/8085 mode only */ + +/* Initialization control word 2. Written to the odd address. */ +/* No definitions, it is the base vector of the IDT for 8086 mode */ + +/* Initialization control word 3. Written to the odd address. */ +/* For a primary PIC, bitfield indicating a secondary PIC on given input */ +/* For a secondary PIC, lower 3 bits are the PIC's ID binary id on primary PIC */ + +/* Initialization control word 4. Written to the odd address. */ +#define ICW4_8086 0x01U /* 1 = 8086, 0 = 8080 */ +#define ICW4_AEOI 0x02U /* 1 = Auto EOI */ +#define ICW4_MS 0x04U /* 1 = buffered primary PIC, 0 = secondary PIC*/ +#define ICW4_BUF 0x08U /* 1 = enable buffer mode */ +#define ICW4_SFNM 0x10U /* 1 = special fully nested mode */ + +/* Operation control words. Written after initialization. */ + +/* Operation control word type 1 */ +/* + * No definitions. Written to the odd address. Bitmask for interrupts. + * 1 = disabled. + */ + +/* Operation control word type 2. Bit 3 (0x08) must be zero. Even address. */ +#define OCW2_L0 0x01U /* Level */ +#define OCW2_L1 0x02U +#define OCW2_L2 0x04U +/* 0x08 must be 0 to select OCW2 vs OCW3 */ +/* 0x10 must be 0 to select OCW2 vs ICW1 */ +#define OCW2_EOI 0x20U /* 1 = EOI */ +#define OCW2_SL 0x40U /* EOI mode */ +#define OCW2_R 0x80U /* EOI mode */ + +/* Operation control word type 3. Bit 3 (0x08) must be set. Even address. */ +#define OCW3_RIS 0x01U /* 1 = read IS, 0 = read IR */ +#define OCW3_RR 0x02U /* register read */ +#define OCW3_P 0x04U /* poll mode command */ +/* 0x08 must be 1 to select OCW3 vs OCW2 */ +#define OCW3_SEL 0x08U /* must be 1 */ +/* 0x10 must be 0 to select OCW3 vs ICW1 */ +#define OCW3_SMM 0x20U /* special mode mask */ +#define OCW3_ESMM 0x40U /* enable SMM */ + +#define IO_ELCR1 0x4d0U +#define IO_ELCR2 0x4d1U + +#define NR_VPIC_PINS_PER_CHIP 8U +#define NR_VPIC_PINS_TOTAL 16U + +enum vpic_wire_mode { + VPIC_WIRE_INTR = 0, + VPIC_WIRE_LAPIC, + VPIC_WIRE_IOAPIC, + VPIC_WIRE_NULL +}; + +enum vpic_trigger { + EDGE_TRIGGER, + LEVEL_TRIGGER +}; + +struct i8259_reg_state { + bool ready; + uint8_t icw_num; + uint8_t rd_cmd_reg; + + bool aeoi; + bool poll; + bool rotate; + bool sfn; /* special fully-nested mode */ + + uint32_t irq_base; + uint8_t request; /* Interrupt Request Register (IIR) */ + uint8_t service; /* Interrupt Service (ISR) */ + uint8_t mask; /* Interrupt Mask Register (IMR) */ + uint8_t smm; /* special mask mode */ + + uint8_t pin_state[8]; /* pin state for level */ + uint32_t lowprio; /* lowest priority irq */ + + bool intr_raised; + uint8_t elc; +}; + +struct acrn_vpic { + // spinlock_t lock; + struct i8259_reg_state i8259[2]; +}; + +struct acrn_vm; +void vpic_init(struct acrn_vm *vm); + +/** + * @brief virtual PIC + * + * @addtogroup acrn_vpic ACRN vPIC + * @{ + */ + +/** + * @brief Set vPIC IRQ line status. + * + * @param[in] vpic Pointer to target VM's vpic table + * @param[in] vgsi GSI for the virtual interrupt + * @param[in] operation action options:GSI_SET_HIGH/GSI_SET_LOW/ + * GSI_RAISING_PULSE/GSI_FALLING_PULSE + * + * @return None + */ +void vpic_set_irqline(struct acrn_vpic *vpic, uint32_t vgsi, uint32_t operation); + +/** + * @brief Get pending virtual interrupts for vPIC. + * + * @param[in] vpic Pointer to target VM's vpic table + * @param[inout] vecptr Pointer to vector buffer and will be filled + * with eligible vector if any. + * + * @return None + */ +void vpic_pending_intr(struct acrn_vpic *vpic, uint32_t *vecptr); + +/** + * @brief Accept virtual interrupt for vPIC. + * + * @param[in] vpic Pointer to target VM's vpic table + * @param[in] vector Target virtual interrupt vector + * + * @return None + * + * @pre vm != NULL + */ +void vpic_intr_accepted(struct acrn_vpic *vpic, uint32_t vector); +void vpic_get_irqline_trigger_mode(const struct acrn_vpic *vpic, uint32_t vgsi, enum vpic_trigger *trigger); +uint32_t vpic_pincount(void); +struct acrn_vpic *vm_pic(const struct acrn_vm *vm); + +/** + * @} + */ +/* End of acrn_vpic */ + +#endif /* VPIC_H */ diff --git a/src/components/implementation/simple_vmm/vmm/simple_vmm.c b/src/components/implementation/simple_vmm/vmm/simple_vmm.c index ccacf9f790..ba71c48eb5 100644 --- a/src/components/implementation/simple_vmm/vmm/simple_vmm.c +++ b/src/components/implementation/simple_vmm/vmm/simple_vmm.c @@ -360,6 +360,8 @@ parallel_main(coreid_t cid) struct vmrt_vm_vcpu *vcpu; if (cid == 0) { + printc("------STARTING VM------\n"); + sched_thd_block_timeout(0, time_now() + time_usec2cyc(10000000)); vcpu = vmrt_get_vcpu(g_vm, 0); vmrt_vm_vcpu_start(vcpu); diff --git a/src/components/interface/netshmem/lib.c b/src/components/interface/netshmem/lib.c index d67671834d..cf6f251907 100644 --- a/src/components/interface/netshmem/lib.c +++ b/src/components/interface/netshmem/lib.c @@ -42,6 +42,8 @@ netshmem_get_shm() return netshmems[cos_thdid()].shm; } +static char testbuffer[PAGE_SIZE]; + void netshmem_map_shmem(cbuf_t shm_id) { @@ -54,6 +56,11 @@ netshmem_map_shmem(cbuf_t shm_id) assert(!netshmems[thd].shm); npages = memmgr_shared_page_map_aligned(shm_id, SHM_BM_ALIGN, (vaddr_t *)&mem); + printc("---test mem accessibility---\n"); + for (int i = 0; i < npages; i++) { + memcpy(testbuffer, mem + i * PAGE_SIZE, PAGE_SIZE); + } + printc("---mem accessibility ok---\n"); shm = shm_bm_create_net_pkt_buf(mem, npages * PAGE_SIZE); assert(shm); diff --git a/src/components/lib/dpdk/cos_dpdk.c b/src/components/lib/dpdk/cos_dpdk.c index c5fe45ef9e..e39f094bfa 100644 --- a/src/components/lib/dpdk/cos_dpdk.c +++ b/src/components/lib/dpdk/cos_dpdk.c @@ -114,10 +114,11 @@ cos_eth_ports_init(void) for (i = 0; i < nb_ports; i++) { cos_eth_info_print(ports_ids[i]); } -#if 1 - ports_ids[0] = 1; - nb_ports = 1; -#endif + + if (nb_ports != 1) { + ports_ids[0] = 1; + nb_ports = 1; + } return nb_ports; } diff --git a/src/components/lib/slm/slm_blkpt.c b/src/components/lib/slm/slm_blkpt.c index ae2f7548c8..94afb68b7f 100644 --- a/src/components/lib/slm/slm_blkpt.c +++ b/src/components/lib/slm/slm_blkpt.c @@ -101,7 +101,7 @@ slm_blkpt_trigger(sched_blkpt_id_t blkpt, struct slm_thd *current, sched_blkpt_e } ps_lock_release(&m->lock); /* most likely we switch to a woken thread here */ - slm_cs_exit_reschedule(current, SLM_CS_CHECK_TIMEOUT); + slm_cs_exit_reschedule(current, SLM_CS_NONE); return 0; unlock: @@ -156,7 +156,7 @@ slm_blkpt_block(sched_blkpt_id_t blkpt, struct slm_thd *current, sched_blkpt_epo ERR_THROW(0, unlock); } ps_lock_release(&m->lock); - slm_cs_exit_reschedule(current, SLM_CS_CHECK_TIMEOUT); + slm_cs_exit_reschedule(current, SLM_CS_NONE); assert(stacklist_is_removed(&sl)); return 0; From d76e0789d2dd755f8855e0db5d9cc3bdc8390366 Mon Sep 17 00:00:00 2001 From: betahxy Date: Wed, 20 Mar 2024 03:20:00 -0400 Subject: [PATCH 09/60] Integration Testing --- .gitignore | 1 + composition_scripts/vmm_no_nf_multi_vm.toml | 49 + .../simple_vmm/multi_vmm/Makefile | 29 + .../simple_vmm/multi_vmm/acrn_common.h | 797 +++++++++ .../simple_vmm/multi_vmm/acrn_types.h | 51 + .../simple_vmm/multi_vmm/apicreg.h | 444 +++++ .../simple_vmm/multi_vmm/atomic.h | 152 ++ .../simple_vmm/multi_vmm/bits.h | 298 ++++ .../implementation/simple_vmm/multi_vmm/cpu.h | 337 ++++ .../simple_vmm/multi_vmm/cpu_caps.h | 68 + .../simple_vmm/multi_vmm/cpuid.h | 186 ++ .../multi_vmm/devices/serial/serial.c | 56 + .../multi_vmm/devices/serial/serial.h | 17 + .../multi_vmm/devices/vpci/virtio_net_io.c | 725 ++++++++ .../multi_vmm/devices/vpci/virtio_net_io.h | 144 ++ .../multi_vmm/devices/vpci/virtio_net_vpci.c | 51 + .../multi_vmm/devices/vpci/virtio_ring.h | 260 +++ .../simple_vmm/multi_vmm/devices/vpci/vpci.c | 316 ++++ .../simple_vmm/multi_vmm/devices/vpci/vpci.h | 180 ++ .../multi_vmm/devices/vpci/vpci_io.c | 191 ++ .../simple_vmm/multi_vmm/devices/vpic/vpic.c | 109 ++ .../simple_vmm/multi_vmm/devices/vpic/vpic.h | 24 + .../simple_vmm/multi_vmm/devices/vps2/vps2.c | 47 + .../simple_vmm/multi_vmm/devices/vps2/vps2.h | 6 + .../simple_vmm/multi_vmm/devices/vrtc/vrtc.c | 58 + .../simple_vmm/multi_vmm/devices/vrtc/vrtc.h | 7 + .../simple_vmm/multi_vmm/fast_memcpy.h | 689 ++++++++ .../simple_vmm/multi_vmm/guest/.gitignore | 2 + .../simple_vmm/multi_vmm/guest/Makefile | 47 + .../simple_vmm/multi_vmm/guest/guest.ld | 34 + .../multi_vmm/guest/guest_realmode.S | 60 + .../simple_vmm/multi_vmm/instr_emul.c | 1381 +++++++++++++++ .../simple_vmm/multi_vmm/instr_emul.h | 95 + .../simple_vmm/multi_vmm/ioapic.h | 99 ++ .../implementation/simple_vmm/multi_vmm/irq.h | 136 ++ .../simple_vmm/multi_vmm/netio.c | 274 +++ .../simple_vmm/multi_vmm/nf_session.c | 74 + .../simple_vmm/multi_vmm/nf_session.h | 49 + .../simple_vmm/multi_vmm/simple_vmm.c | 381 ++++ .../simple_vmm/multi_vmm/vcpuid.c | 766 ++++++++ .../simple_vmm/multi_vmm/vcpuid.h | 35 + .../implementation/simple_vmm/multi_vmm/vio.c | 106 ++ .../simple_vmm/multi_vmm/vioapic.c | 564 ++++++ .../simple_vmm/multi_vmm/vioapic.h | 128 ++ .../simple_vmm/multi_vmm/vlapic.c | 1554 +++++++++++++++++ .../simple_vmm/multi_vmm/vlapic.h | 260 +++ .../simple_vmm/multi_vmm/vlapic_priv.h | 84 + .../simple_vmm/multi_vmm/vmmio.c | 53 + .../simple_vmm/multi_vmm/vmsr.c | 249 +++ .../simple_vmm/multi_vmm/vpic.h | 191 ++ 50 files changed, 11914 insertions(+) create mode 100644 composition_scripts/vmm_no_nf_multi_vm.toml create mode 100644 src/components/implementation/simple_vmm/multi_vmm/Makefile create mode 100644 src/components/implementation/simple_vmm/multi_vmm/acrn_common.h create mode 100644 src/components/implementation/simple_vmm/multi_vmm/acrn_types.h create mode 100644 src/components/implementation/simple_vmm/multi_vmm/apicreg.h create mode 100644 src/components/implementation/simple_vmm/multi_vmm/atomic.h create mode 100644 src/components/implementation/simple_vmm/multi_vmm/bits.h create mode 100755 src/components/implementation/simple_vmm/multi_vmm/cpu.h create mode 100644 src/components/implementation/simple_vmm/multi_vmm/cpu_caps.h create mode 100644 src/components/implementation/simple_vmm/multi_vmm/cpuid.h create mode 100644 src/components/implementation/simple_vmm/multi_vmm/devices/serial/serial.c create mode 100644 src/components/implementation/simple_vmm/multi_vmm/devices/serial/serial.h create mode 100644 src/components/implementation/simple_vmm/multi_vmm/devices/vpci/virtio_net_io.c create mode 100644 src/components/implementation/simple_vmm/multi_vmm/devices/vpci/virtio_net_io.h create mode 100644 src/components/implementation/simple_vmm/multi_vmm/devices/vpci/virtio_net_vpci.c create mode 100644 src/components/implementation/simple_vmm/multi_vmm/devices/vpci/virtio_ring.h create mode 100644 src/components/implementation/simple_vmm/multi_vmm/devices/vpci/vpci.c create mode 100644 src/components/implementation/simple_vmm/multi_vmm/devices/vpci/vpci.h create mode 100644 src/components/implementation/simple_vmm/multi_vmm/devices/vpci/vpci_io.c create mode 100644 src/components/implementation/simple_vmm/multi_vmm/devices/vpic/vpic.c create mode 100644 src/components/implementation/simple_vmm/multi_vmm/devices/vpic/vpic.h create mode 100644 src/components/implementation/simple_vmm/multi_vmm/devices/vps2/vps2.c create mode 100644 src/components/implementation/simple_vmm/multi_vmm/devices/vps2/vps2.h create mode 100644 src/components/implementation/simple_vmm/multi_vmm/devices/vrtc/vrtc.c create mode 100644 src/components/implementation/simple_vmm/multi_vmm/devices/vrtc/vrtc.h create mode 100644 src/components/implementation/simple_vmm/multi_vmm/fast_memcpy.h create mode 100644 src/components/implementation/simple_vmm/multi_vmm/guest/.gitignore create mode 100644 src/components/implementation/simple_vmm/multi_vmm/guest/Makefile create mode 100644 src/components/implementation/simple_vmm/multi_vmm/guest/guest.ld create mode 100644 src/components/implementation/simple_vmm/multi_vmm/guest/guest_realmode.S create mode 100644 src/components/implementation/simple_vmm/multi_vmm/instr_emul.c create mode 100644 src/components/implementation/simple_vmm/multi_vmm/instr_emul.h create mode 100644 src/components/implementation/simple_vmm/multi_vmm/ioapic.h create mode 100644 src/components/implementation/simple_vmm/multi_vmm/irq.h create mode 100644 src/components/implementation/simple_vmm/multi_vmm/netio.c create mode 100644 src/components/implementation/simple_vmm/multi_vmm/nf_session.c create mode 100644 src/components/implementation/simple_vmm/multi_vmm/nf_session.h create mode 100644 src/components/implementation/simple_vmm/multi_vmm/simple_vmm.c create mode 100644 src/components/implementation/simple_vmm/multi_vmm/vcpuid.c create mode 100644 src/components/implementation/simple_vmm/multi_vmm/vcpuid.h create mode 100644 src/components/implementation/simple_vmm/multi_vmm/vio.c create mode 100644 src/components/implementation/simple_vmm/multi_vmm/vioapic.c create mode 100644 src/components/implementation/simple_vmm/multi_vmm/vioapic.h create mode 100644 src/components/implementation/simple_vmm/multi_vmm/vlapic.c create mode 100644 src/components/implementation/simple_vmm/multi_vmm/vlapic.h create mode 100644 src/components/implementation/simple_vmm/multi_vmm/vlapic_priv.h create mode 100644 src/components/implementation/simple_vmm/multi_vmm/vmmio.c create mode 100644 src/components/implementation/simple_vmm/multi_vmm/vmsr.c create mode 100644 src/components/implementation/simple_vmm/multi_vmm/vpic.h diff --git a/.gitignore b/.gitignore index 5336b2fe9c..88c69f830b 100644 --- a/.gitignore +++ b/.gitignore @@ -58,3 +58,4 @@ src/components/lib/libc/musl-1.2.0/include/asm-generic/ src/components/lib/libc/musl-1.2.0/include/linux/ src/components/lib/libc/musl-1.2.0/include/sys/queue.h src/kernel/include/shared/cpu_ghz.h +build.sh diff --git a/composition_scripts/vmm_no_nf_multi_vm.toml b/composition_scripts/vmm_no_nf_multi_vm.toml new file mode 100644 index 0000000000..90adef5c05 --- /dev/null +++ b/composition_scripts/vmm_no_nf_multi_vm.toml @@ -0,0 +1,49 @@ +[system] +description = "Simple VMM" + +[[components]] +name = "booter" +img = "no_interface.llbooter" +implements = [{interface = "init"}, {interface = "addr"}] +deps = [{srv = "kernel", interface = "init", variant = "kernel"}] +constructor = "kernel" + +[[components]] +name = "capmgr" +img = "capmgr.simple" +deps = [{srv = "booter", interface = "init"}, {srv = "booter", interface = "addr"}] +implements = [{interface = "capmgr"}, {interface = "init"}, {interface = "memmgr"}, {interface = "capmgr_create"}, {interface = "contigmem"}] +constructor = "booter" +baseaddr = "0x1000000" + +[[components]] +name = "sched" +img = "sched.pfprr_quantum_static" +deps = [{srv = "capmgr", interface = "init"}, {srv = "capmgr", interface = "capmgr"}, {srv = "capmgr", interface = "memmgr"}] +implements = [{interface = "sched"}, {interface = "syncipc"}, {interface = "init"}] +constructor = "booter" +baseaddr = "0x1600000" + +[[components]] +name = "nicmgr" +img = "nicmgr.dpdk" +deps = [{srv = "sched", interface = "sched"}, {srv = "sched", interface = "init"}, {srv = "capmgr", interface = "capmgr_create"}, {srv = "capmgr", interface = "memmgr"}, {srv = "capmgr", interface = "contigmem"}] +implements = [{interface = "nic"}] +constructor = "booter" +baseaddr = "0x6000000" + +[[components]] +name = "vmm" +img = "simple_vmm.vmm" +deps = [{srv = "sched", interface = "sched"}, {srv = "sched", interface = "init"},{srv = "capmgr", interface = "capmgr"}, {srv = "capmgr", interface = "memmgr"}, {srv = "capmgr", interface = "contigmem"}, {srv = "nicmgr", interface = "nic"}] +implements = [{interface = "netio"}] +constructor = "booter" +baseaddr = "0x2000000" + +[[components]] +name = "vmm1" +img = "simple_vmm.multi_vmm" +deps = [{srv = "sched", interface = "sched"}, {srv = "sched", interface = "init"},{srv = "capmgr", interface = "capmgr"}, {srv = "capmgr", interface = "memmgr"}, {srv = "capmgr", interface = "contigmem"}, {srv = "nicmgr", interface = "nic"}] +implements = [{interface = "netio"}] +constructor = "booter" +baseaddr = "0x9000000" diff --git a/src/components/implementation/simple_vmm/multi_vmm/Makefile b/src/components/implementation/simple_vmm/multi_vmm/Makefile new file mode 100644 index 0000000000..96d9511070 --- /dev/null +++ b/src/components/implementation/simple_vmm/multi_vmm/Makefile @@ -0,0 +1,29 @@ +# Required variables used to drive the compilation process. It is OK +# for many of these to be empty. +# +# The set of interfaces that this component exports for use by other +# components. This is a list of the interface names. +INTERFACE_EXPORTS = netio +# The interfaces this component is dependent on for compilation (this +# is a list of directory names in interface/) +INTERFACE_DEPENDENCIES = contigmem netshmem nic sched nic +# The library dependencies this component is reliant on for +# compilation/linking (this is a list of directory names in lib/) +LIBRARY_DEPENDENCIES = ubench component kernel initargs vmrt shm_bm sync time ck +# Note: Both the interface and library dependencies should be +# *minimal*. That is to say that removing a dependency should cause +# the build to fail. The build system does not validate this +# minimality; that's on you! + +CFILES+=devices/serial/serial.c +CFILES+=devices/vpci/vpci.c +CFILES+=devices/vpci/vpci_io.c +CFILES+=devices/vpci/virtio_net_vpci.c +CFILES+=devices/vpci/virtio_net_io.c +CFILES+=devices/vpic/vpic.c +CFILES+=devices/vrtc/vrtc.c +CFILES+=devices/vps2/vps2.c + +C_OBJS+=$(CFILES:%.c=%.o) +COMP_FLAGS= -mavx -mavx2 -mfma -I$(LIBDIR)/dpdk/dpdk/build/install/include +include Makefile.subsubdir diff --git a/src/components/implementation/simple_vmm/multi_vmm/acrn_common.h b/src/components/implementation/simple_vmm/multi_vmm/acrn_common.h new file mode 100644 index 0000000000..b97561f61b --- /dev/null +++ b/src/components/implementation/simple_vmm/multi_vmm/acrn_common.h @@ -0,0 +1,797 @@ +/* + * common definition + * + * Copyright (C) 2017-2022 Intel Corporation. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +/** + * @file acrn_common.h + * + * @brief acrn common data structure for hypercall or ioctl + */ + +#ifndef ACRN_COMMON_H +#define ACRN_COMMON_H + +#include + +/* + * Common structures for ACRN/HSM/DM + */ + +/* + * IO request + */ + +#define ACRN_IO_REQUEST_MAX 16U +#define ACRN_ASYNCIO_MAX 64U + +#define ACRN_IOREQ_STATE_PENDING 0U +#define ACRN_IOREQ_STATE_COMPLETE 1U +#define ACRN_IOREQ_STATE_PROCESSING 2U +#define ACRN_IOREQ_STATE_FREE 3U + +#define ACRN_IOREQ_TYPE_PORTIO 0U +#define ACRN_IOREQ_TYPE_MMIO 1U +#define ACRN_IOREQ_TYPE_PCICFG 2U +#define ACRN_IOREQ_TYPE_WP 3U + +#define ACRN_IOREQ_DIR_READ 0U +#define ACRN_IOREQ_DIR_WRITE 1U + + + +/* IOAPIC device model info */ +#define VIOAPIC_RTE_NUM 48U /* vioapic pins */ + +#if VIOAPIC_RTE_NUM < 24U +#error "VIOAPIC_RTE_NUM must be larger than 23" +#endif + +/* Generic VM flags from guest OS */ +#define GUEST_FLAG_SECURE_WORLD_ENABLED (1UL << 0U) /* Whether secure world is enabled */ +#define GUEST_FLAG_LAPIC_PASSTHROUGH (1UL << 1U) /* Whether LAPIC is passed through */ +#define GUEST_FLAG_IO_COMPLETION_POLLING (1UL << 2U) /* Whether need hypervisor poll IO completion */ +#define GUEST_FLAG_HIDE_MTRR (1UL << 3U) /* Whether hide MTRR from VM */ +#define GUEST_FLAG_RT (1UL << 4U) /* Whether the vm is RT-VM */ +#define GUEST_FLAG_NVMX_ENABLED (1UL << 5U) /* Whether this VM supports nested virtualization */ +#define GUEST_FLAG_SECURITY_VM (1UL << 6U) /* Whether this VM needs to do security-vm related fixup (TPM2 and SMBIOS pt) */ +#define GUEST_FLAG_VCAT_ENABLED (1UL << 7U) /* Whether this VM supports vCAT */ +#define GUEST_FLAG_STATIC_VM (1UL << 8U) /* Whether this VM uses static VM configuration */ +#define GUEST_FLAG_TEE (1UL << 9U) /* Whether the VM is TEE VM */ +#define GUEST_FLAG_REE (1UL << 10U) /* Whether the VM is REE VM */ +#define GUEST_FLAG_PMU_PASSTHROUGH (1UL << 11U) /* Whether PMU is passed through */ + + +/* TODO: We may need to get this addr from guest ACPI instead of hardcode here */ +#define VIRTUAL_SLEEP_CTL_ADDR 0x400U /* Pre-launched VM uses ACPI reduced HW mode and sleep control register */ +#define VIRTUAL_PM1A_CNT_ADDR 0x404U +#define VIRTUAL_PM1A_SCI_EN 0x0001 +#define VIRTUAL_PM1A_SLP_TYP 0x1c00U +#define VIRTUAL_PM1A_SLP_EN 0x2000U +#define VIRTUAL_PM1A_ALWAYS_ZERO 0xc003 + +#define MAX_VM_NAME_LEN (16U) + +/** + * @brief Hypercall + * + * @addtogroup acrn_hypercall ACRN Hypercall + * @{ + */ + +/** + * @brief Representation of a MMIO request + */ +struct acrn_mmio_request { + /** + * @brief Direction of the access + * + * Either \p ACRN_IOREQ_DIR_READ or \p ACRN_IOREQ_DIR_WRITE. + */ + uint32_t direction; + + /** + * @brief reserved + */ + uint32_t reserved; + + /** + * @brief Address of the I/O access + */ + uint64_t address; + + /** + * @brief Width of the I/O access in byte + */ + uint64_t size; + + /** + * @brief The value read for I/O reads or to be written for I/O writes + */ + uint64_t value; +}; + +/** + * @brief Representation of a port I/O request + */ +struct acrn_pio_request { + /** + * @brief Direction of the access + * + * Either \p ACRN_IOREQ_DIR_READ or \p ACRN_IOREQ_DIR_WRITE. + */ + uint32_t direction; + + /** + * @brief reserved + */ + uint32_t reserved; + + /** + * @brief Port address of the I/O access + */ + uint64_t address; + + /** + * @brief Width of the I/O access in byte + */ + uint64_t size; + + /** + * @brief The value read for I/O reads or to be written for I/O writes + */ + uint32_t value; +}; + +/** + * @brief Representation of a PCI configuration space access + */ +struct acrn_pci_request { + /** + * @brief Direction of the access + * + * Either \p ACRN_IOREQ_DIR_READ or \p ACRN_IOREQ_DIR_WRITE. + */ + uint32_t direction; + + /** + * @brief Reserved + */ + uint32_t reserved[3];/* need keep same header fields with pio_request */ + + /** + * @brief Width of the I/O access in byte + */ + int64_t size; + + /** + * @brief The value read for I/O reads or to be written for I/O writes + */ + int32_t value; + + /** + * @brief The \p bus part of the BDF of the device + */ + int32_t bus; + + /** + * @brief The \p device part of the BDF of the device + */ + int32_t dev; + + /** + * @brief The \p function part of the BDF of the device + */ + int32_t func; + + /** + * @brief The register to be accessed in the configuration space + */ + int32_t reg; +}; + +/** + * @brief 256-byte I/O requests + * + * The state transitions of a I/O request are: + * + * FREE -> PENDING -> PROCESSING -> COMPLETE -> FREE -> ... + * + * When a request is in COMPLETE or FREE state, the request is owned by the + * hypervisor. Service VM (HSM or DM) shall not read or write the internals of the + * request except the state. + * + * When a request is in PENDING or PROCESSING state, the request is owned by + * Service VM. The hypervisor shall not read or write the request other than the state. + * + * Based on the rules above, a typical I/O request lifecycle should looks like + * the following. + * + * @verbatim embed:rst:leading-asterisk + * + * +-----------------------+-------------------------+----------------------+ + * | Service VM vCPU 0 | Service VM vCPU x | User VM vCPU y | + * +=======================+=========================+======================+ + * | | | Hypervisor: | + * | | | | + * | | | - Fill in type, | + * | | | addr, etc. | + * | | | - Pause User VM vCPU | + * | | | - Set state to | + * | | | PENDING (a) | + * | | | - Fire upcall to | + * | | | Service VM vCPU 0 | + * | | | | + * +-----------------------+-------------------------+----------------------+ + * | HSM: | | | + * | | | | + * | - Scan for pending | | | + * | requests | | | + * | - Set state to | | | + * | PROCESSING (b) | | | + * | - Assign requests to | | | + * | clients (c) | | | + * | | | | + * +-----------------------+-------------------------+----------------------+ + * | | Client: | | + * | | | | + * | | - Scan for assigned | | + * | | requests | | + * | | - Handle the | | + * | | requests (d) | | + * | | - Set state to COMPLETE | | + * | | - Notify the hypervisor | | + * | | | | + * +-----------------------+-------------------------+----------------------+ + * | | Hypervisor: | | + * | | | | + * | | - resume User VM vCPU y | | + * | | (e) | | + * | | | | + * +-----------------------+-------------------------+----------------------+ + * | | | Hypervisor: | + * | | | | + * | | | - Post-work (f) | + * | | | - set state to FREE | + * | | | | + * +-----------------------+-------------------------+----------------------+ + * + * @endverbatim + * + * Note that the following shall hold. + * + * 1. (a) happens before (b) + * 2. (c) happens before (d) + * 3. (e) happens before (f) + * 4. One vCPU cannot trigger another I/O request before the previous one has + * completed (i.e. the state switched to FREE) + * + * Accesses to the state of a acrn_io_request shall be atomic and proper barriers + * are needed to ensure that: + * + * 1. Setting state to PENDING is the last operation when issuing a request in + * the hypervisor, as the hypervisor shall not access the request any more. + * + * 2. Due to similar reasons, setting state to COMPLETE is the last operation + * of request handling in HSM or clients in Service VM. + */ +struct acrn_io_request { + /** + * @brief Type of this request. + * + * Byte offset: 0. + */ + uint32_t type; + + /** + * @brief Hypervisor will poll completion if set. + * + * Byte offset: 4. + */ + uint32_t completion_polling; + + /** + * @brief Reserved. + * + * Byte offset: 8. + */ + uint32_t reserved0[14]; + + /** + * @brief Details about this request. + * + * Byte offset: 64. + */ + union { + struct acrn_pio_request pio_request; + struct acrn_pci_request pci_request; + struct acrn_mmio_request mmio_request; + uint64_t data[8]; + } reqs; + + /** + * @brief Reserved. + * + * Byte offset: 128. + */ + uint32_t reserved1; + + /** + * @brief If this request has been handled by HSM driver. + * + * Byte offset: 132. + */ + int32_t kernel_handled; + + /** + * @brief The status of this request. + * + * Taking ACRN_IOREQ_STATE_xxx as values. + * + * Byte offset: 136. + */ + uint32_t processed; +}__attribute__((aligned(256))); + +struct acrn_io_request_buffer { + union { + struct acrn_io_request req_slot[ACRN_IO_REQUEST_MAX]; + int8_t reserved[4096]; + }; +}; + +struct acrn_asyncio_info { + uint32_t type; + uint64_t addr; + uint64_t fd; +}; + +/** + * @brief Info to create a VM, the parameter for HC_CREATE_VM hypercall + */ +struct acrn_vm_creation { + /** created vmid return to HSM. Keep it first field */ + uint16_t vmid; + + /** Reserved */ + uint16_t reserved0; + + /** VCPU numbers this VM want to create */ + uint16_t vcpu_num; + + /** Reserved */ + uint16_t reserved1; + + /** the name of this VM */ + uint8_t name[MAX_VM_NAME_LEN]; + + /* VM flag bits from Guest OS, now used + * GUEST_FLAG_SECURE_WORLD_ENABLED (1UL<<0) + */ + uint64_t vm_flag; + + uint64_t ioreq_buf; + + /** + * The least significant set bit is the PCPU # the VCPU 0 maps to; + * second set least significant bit is the PCPU # the VCPU 1 maps to; + * and so on... + */ + uint64_t cpu_affinity; +}; + +/* General-purpose register layout aligned with the general-purpose register idx + * when vmexit, such as vmexit due to CR access, refer to SMD Vol.3C 27-6. + */ +struct acrn_gp_regs { + uint64_t rax; + uint64_t rcx; + uint64_t rdx; + uint64_t rbx; + uint64_t rsp; + uint64_t rbp; + uint64_t rsi; + uint64_t rdi; + uint64_t r8; + uint64_t r9; + uint64_t r10; + uint64_t r11; + uint64_t r12; + uint64_t r13; + uint64_t r14; + uint64_t r15; +}; + +/* struct to define how the descriptor stored in memory. + * Refer SDM Vol3 3.5.1 "Segment Descriptor Tables" + * Figure 3-11 + */ +struct acrn_descriptor_ptr { + uint16_t limit; + uint64_t base; + uint16_t reserved[3]; /* align struct size to 64bit */ +} __packed; + +/** + * @brief registers info for vcpu. + */ +struct acrn_regs { + struct acrn_gp_regs gprs; + struct acrn_descriptor_ptr gdt; + struct acrn_descriptor_ptr idt; + + uint64_t rip; + uint64_t cs_base; + uint64_t cr0; + uint64_t cr4; + uint64_t cr3; + uint64_t ia32_efer; + uint64_t rflags; + uint64_t reserved_64[4]; + + uint32_t cs_ar; + uint32_t cs_limit; + uint32_t reserved_32[3]; + + /* don't change the order of following sel */ + uint16_t cs_sel; + uint16_t ss_sel; + uint16_t ds_sel; + uint16_t es_sel; + uint16_t fs_sel; + uint16_t gs_sel; + uint16_t ldt_sel; + uint16_t tr_sel; +}; + +/** + * @brief Info to set vcpu state + * + * the parameter for HC_SET_VCPU_STATE + */ +struct acrn_vcpu_regs { + /** the virtual CPU ID for the VCPU to set state */ + uint16_t vcpu_id; + + /** reserved space to make cpu_state aligned to 8 bytes */ + uint16_t reserved[3]; + + /** the structure to hold vcpu state */ + struct acrn_regs vcpu_regs; +}; + +/** Operation types for setting IRQ line */ +#define GSI_SET_HIGH 0U +#define GSI_SET_LOW 1U +#define GSI_RAISING_PULSE 2U +#define GSI_FALLING_PULSE 3U + +/** + * @brief Info to Set/Clear/Pulse a virtual IRQ line for a VM + * + * the parameter for HC_SET_IRQLINE hypercall + */ +struct acrn_irqline_ops { + uint32_t gsi; + uint32_t op; +}; + + +/** + * @brief Info to inject a MSI interrupt to VM + * + * the parameter for HC_INJECT_MSI hypercall + */ +struct acrn_msi_entry { + /** MSI addr[19:12] with dest VCPU ID */ + uint64_t msi_addr; + + /** MSI data[7:0] with vector */ + uint64_t msi_data; +}; + +/** + * @brief Info The power state data of a VCPU. + * + */ + +#define SPACE_SYSTEM_MEMORY 0U +#define SPACE_SYSTEM_IO 1U +#define SPACE_PCI_CONFIG 2U +#define SPACE_Embedded_Control 3U +#define SPACE_SMBUS 4U +#define SPACE_PLATFORM_COMM 10U +#define SPACE_FFixedHW 0x7FU + +struct acrn_acpi_generic_address { + uint8_t space_id; + uint8_t bit_width; + uint8_t bit_offset; + uint8_t access_size; + uint64_t address; +} __attribute__ ((__packed__)); + +struct acrn_cstate_data { + struct acrn_acpi_generic_address cx_reg; + uint8_t type; + uint32_t latency; + uint64_t power; +}; + +struct acrn_pstate_data { + uint64_t core_frequency; /* megahertz */ + uint64_t power; /* milliWatts */ + uint64_t transition_latency; /* microseconds */ + uint64_t bus_master_latency; /* microseconds */ + uint64_t control; /* control value */ + uint64_t status; /* success indicator */ +}; + +enum acrn_cpufreq_policy_type { + CPUFREQ_POLICY_PERFORMANCE, + CPUFREQ_POLICY_NOMINAL, +}; + +struct acrn_cpufreq_limits { + /* Performance levels for HWP */ + uint8_t guaranteed_hwp_lvl; + uint8_t highest_hwp_lvl; + uint8_t lowest_hwp_lvl; + /* Index for the p-state table _PSS */ + uint8_t nominal_pstate; + uint8_t performance_pstate; +}; + +struct acpi_sx_pkg { + uint8_t val_pm1a; + uint8_t val_pm1b; + uint16_t reserved; +} __attribute__((aligned(8))); + +struct pm_s_state_data { + struct acrn_acpi_generic_address pm1a_evt; + struct acrn_acpi_generic_address pm1b_evt; + struct acrn_acpi_generic_address pm1a_cnt; + struct acrn_acpi_generic_address pm1b_cnt; + struct acpi_sx_pkg s3_pkg; + struct acpi_sx_pkg s5_pkg; + uint32_t *wake_vector_32; + uint64_t *wake_vector_64; +} __attribute__((aligned(8))); + +/** + * @brief Info PM command from DM/HSM. + * + * The command would specify request type(e.g. get px count or data) for + * specific VM and specific VCPU with specific state number. + * For Px, PMCMD_STATE_NUM means Px number from 0 to (MAX_PSTATE - 1), + * For Cx, PMCMD_STATE_NUM means Cx entry index from 1 to MAX_CX_ENTRY. + */ +#define PMCMD_VMID_MASK 0xff000000U +#define PMCMD_VCPUID_MASK 0x00ff0000U +#define PMCMD_STATE_NUM_MASK 0x0000ff00U +#define PMCMD_TYPE_MASK 0x000000ffU + +#define PMCMD_VMID_SHIFT 24U +#define PMCMD_VCPUID_SHIFT 16U +#define PMCMD_STATE_NUM_SHIFT 8U + +enum acrn_pm_cmd_type { + ACRN_PMCMD_GET_PX_CNT, + ACRN_PMCMD_GET_PX_DATA, + ACRN_PMCMD_GET_CX_CNT, + ACRN_PMCMD_GET_CX_DATA, +}; + +/** + * @brief Info to get a VM interrupt count data + * + * the parameter for HC_VM_INTR_MONITOR hypercall + */ +#define MAX_PTDEV_NUM 24U +struct acrn_intr_monitor { + /** sub command for intr monitor */ + uint32_t cmd; + /** the count of this buffer to save */ + uint32_t buf_cnt; + + /** the buffer which save each interrupt count */ + uint64_t buffer[MAX_PTDEV_NUM * 2]; +} __attribute__((aligned(8))); + +/** cmd for intr monitor **/ +#define INTR_CMD_GET_DATA 0U +#define INTR_CMD_DELAY_INT 1U + +/* + * PRE_LAUNCHED_VM is launched by ACRN hypervisor, with LAPIC_PT; + * Service VM is launched by ACRN hypervisor, without LAPIC_PT; + * POST_LAUNCHED_VM is launched by ACRN devicemodel, with/without LAPIC_PT depends on usecases. + * + * Assumption: vm_configs array is completely initialized w.r.t. load_order member of + * acrn_vm_config for all the VMs. + */ +enum acrn_vm_load_order { + PRE_LAUNCHED_VM = 0, + SERVICE_VM, + POST_LAUNCHED_VM, /* Launched by Devicemodel in Service VM */ + MAX_LOAD_ORDER +}; + +struct acrn_vm_config_header { + enum acrn_vm_load_order load_order; + char name[MAX_VM_NAME_LEN]; + uint8_t reserved[2]; + uint8_t severity; + uint64_t cpu_affinity; + uint64_t guest_flags; + /* + * The following are hv-specific members and are thus opaque. + * vm_config_entry_size determines the real size of this structure. + */ +} __attribute__((aligned(8))); + +/** + * @brief Info to configure virtual root port + * + * Configuration passed to hv when adding a virtual root port which + * is used as PTM root + */ +struct vrp_config +{ + uint16_t phy_bdf; + uint8_t max_payload; /* dev cap's max payload */ + uint8_t primary_bus; + uint8_t secondary_bus; + uint8_t subordinate_bus; + uint8_t ptm_capable; + uint32_t ptm_cap_offset; +}; + +/* Type of PCI device assignment */ +#define ACRN_PTDEV_QUIRK_ASSIGN (1U << 0) + +#define ACRN_PCI_NUM_BARS 6U +/** + * @brief Info to assign or deassign PCI for a VM + * + */ +struct acrn_pcidev { + /** the type of the the pass-through PCI device */ + uint32_t type; + + /** virtual BDF# of the pass-through PCI device */ + uint16_t virt_bdf; + + /** physical BDF# of the pass-through PCI device */ + uint16_t phys_bdf; + + /** the PCI Interrupt Line, initialized by ACRN-DM, which is RO and + * ideally not used for pass-through MSI/MSI-x devices. + */ + uint8_t intr_line; + + /** the PCI Interrupt Pin, initialized by ACRN-DM, which is RO and + * ideally not used for pass-through MSI/MSI-x devices. + */ + uint8_t intr_pin; + + /** the base address of the PCI BAR, initialized by ACRN-DM. */ + uint32_t bar[ACRN_PCI_NUM_BARS]; +}; + +#define MMIODEV_RES_NUM 3 + +/** + * @brief Info to assign or deassign a MMIO device for a VM + */ +struct acrn_mmiodev { + char name[8]; + struct acrn_mmiores { + /** the gpa of the MMIO region for the MMIO device */ + uint64_t user_vm_pa; + /** the hpa of the MMIO region for the MMIO device: for post-launched VM + * it's pa in service vm; for pre-launched VM it's pa in HV. + */ + uint64_t host_pa; + /** the size of the MMIO region for the MMIO resource */ + uint64_t size; + /** the memory type of the MMIO region for the MMIO resource */ + uint64_t mem_type; + } res[MMIODEV_RES_NUM]; +}; + +/** + * @brief Info to create or destroy a virtual PCI or legacy device for a VM + * + * the parameter for HC_CREATE_VDEV or HC_DESTROY_VDEV hypercall + */ +struct acrn_vdev { + /* + * the identifier of the device, the low 32 bits represent the vendor + * id and device id of PCI device and the high 32 bits represent the + * device number of the legacy device + */ + union { + uint64_t value; + struct { + uint16_t vendor; + uint16_t device; + uint32_t legacy_id; + } fields; + } id; + + /* + * the slot of the device, if the device is a PCI device, the slot + * represents BDF, otherwise it represents legacy device slot number + */ + uint64_t slot; + + /** the IO resource address of the device, initialized by ACRN-DM. */ + uint32_t io_addr[ACRN_PCI_NUM_BARS]; + + /** the IO resource size of the device, initialized by ACRN-DM. */ + uint32_t io_size[ACRN_PCI_NUM_BARS]; + + /** the options for the virtual device, initialized by ACRN-DM. */ + uint8_t args[128]; +}; + +#define ACRN_ASYNCIO_PIO (0x01U) +#define ACRN_ASYNCIO_MMIO (0x02U) + +#define SBUF_MAGIC 0x5aa57aa71aa13aa3UL +#define SBUF_MAX_SIZE (1UL << 22U) +#define SBUF_HEAD_SIZE 64U + +/* sbuf flags */ +#define OVERRUN_CNT_EN (1U << 0U) /* whether overrun counting is enabled */ +#define OVERWRITE_EN (1U << 1U) /* whether overwrite is enabled */ + +/** + * (sbuf) head + buf (store (ele_num - 1) elements at most) + * buffer empty: tail == head + * buffer full: (tail + ele_size) % size == head + * + * Base of memory for elements + * | + * | + * ---------------------------------------------------------------------- + * | struct shared_buf | raw data (ele_size)| ... | raw data (ele_size) | + * ---------------------------------------------------------------------- + * | + * | + * struct shared_buf *buf + */ + +enum { + ACRN_TRACE = 0U, + ACRN_HVLOG, + ACRN_SEP, + ACRN_SOCWATCH, + /* The sbuf with above ids are created each pcpu */ + ACRN_SBUF_PER_PCPU_ID_MAX, + ACRN_ASYNCIO = 64, +}; + +/* Make sure sizeof(struct shared_buf) == SBUF_HEAD_SIZE */ +struct shared_buf { + uint64_t magic; + uint32_t ele_num; /* number of elements */ + uint32_t ele_size; /* sizeof of elements */ + uint32_t head; /* offset from base, to read */ + uint32_t tail; /* offset from base, to write */ + uint32_t flags; + uint32_t reserved; + uint32_t overrun_cnt; /* count of overrun */ + uint32_t size; /* ele_num * ele_size */ + uint32_t padding[6]; +}; + +/** + * @} + */ +#endif /* ACRN_COMMON_H */ diff --git a/src/components/implementation/simple_vmm/multi_vmm/acrn_types.h b/src/components/implementation/simple_vmm/multi_vmm/acrn_types.h new file mode 100644 index 0000000000..0d6b92fcd9 --- /dev/null +++ b/src/components/implementation/simple_vmm/multi_vmm/acrn_types.h @@ -0,0 +1,51 @@ +/* + * Copyright (C) 2018-2022 Intel Corporation. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef ACRN_TYPES_H +#define ACRN_TYPES_H + +#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0])) +#define __aligned(x) __attribute__((aligned(x))) +#define __packed __attribute__((packed)) +#define __unused __attribute__((unused)) + +#include + +/** Roundup (x/y) to ( x/y + (x%y) ? 1 : 0) **/ +#define INT_DIV_ROUNDUP(x, y) ((((x)+(y))-1)/(y)) + +/* Define standard data types. These definitions allow software components + * to perform in the same manner on different target platforms. + */ +typedef signed char int8_t; +typedef unsigned char uint8_t; +typedef signed short int16_t; +typedef unsigned short uint16_t; +typedef signed int int32_t; +typedef unsigned int uint32_t; +typedef unsigned long uint64_t; +typedef signed long int64_t; +typedef __builtin_va_list va_list; + +#ifndef NULL +#define NULL ((void *) 0) +#endif + +#ifndef true +#define true ((_Bool) 1) +#define false ((_Bool) 0) +#endif + +#ifndef UINT64_MAX +#define UINT64_MAX (0xffffffffffffffffUL) +#endif + +#ifndef UINT32_MAX +#define UINT32_MAX (0xffffffffU) +#endif + + +#endif /* INCLUDE_TYPES_H defined */ diff --git a/src/components/implementation/simple_vmm/multi_vmm/apicreg.h b/src/components/implementation/simple_vmm/multi_vmm/apicreg.h new file mode 100644 index 0000000000..0b8579ffb2 --- /dev/null +++ b/src/components/implementation/simple_vmm/multi_vmm/apicreg.h @@ -0,0 +1,444 @@ +/*- + * Copyright (c) 1996, by Peter Wemm and Steve Passe + * Copyright (c) 2017-2022 Intel Corporation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. The name of the developer may NOT be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef APICREG_H +#define APICREG_H + +#include +/* + * Local && I/O APIC definitions. + */ + +/****************************************************************************** + * global defines, etc. + */ + + +/****************************************************************************** + * LOCAL APIC structure + */ +struct lapic_reg { + uint32_t v; + uint32_t pad[3]; +}; + +struct lapic_regs { /*OFFSET(Hex)*/ + struct lapic_reg rsv0[2]; + struct lapic_reg id; /*020*/ + struct lapic_reg version; /*030*/ + struct lapic_reg rsv1[4]; + struct lapic_reg tpr; /*080*/ + struct lapic_reg apr; /*090*/ + struct lapic_reg ppr; /*0A0*/ + struct lapic_reg eoi; /*0B0*/ + struct lapic_reg rrd; /*0C0*/ + struct lapic_reg ldr; /*0D0*/ + struct lapic_reg dfr; /*0EO*/ + struct lapic_reg svr; /*0F0*/ + struct lapic_reg isr[8]; /*100 -- 170*/ + struct lapic_reg tmr[8]; /*180 -- 1F0*/ + struct lapic_reg irr[8]; /*200 -- 270*/ + struct lapic_reg esr; /*280*/ + struct lapic_reg rsv2[6]; + struct lapic_reg lvt_cmci; /*2F0*/ + struct lapic_reg icr_lo; /*300*/ + struct lapic_reg icr_hi; /*310*/ + struct lapic_reg lvt[6]; /*320 -- 370*/ + struct lapic_reg icr_timer;/*380*/ + struct lapic_reg ccr_timer;/*390*/ + struct lapic_reg rsv3[4]; + struct lapic_reg dcr_timer;/*3E0*/ + struct lapic_reg self_ipi; /*3F0*/ + + /*roundup sizeof current struct to 4KB*/ + struct lapic_reg rsv5[192]; /*400 -- FF0*/ +} __attribute__((aligned(4096))); + +enum LAPIC_REGISTERS { + LAPIC_ID = 0x2, + LAPIC_VERSION = 0x3, + LAPIC_TPR = 0x8, + LAPIC_APR = 0x9, + LAPIC_PPR = 0xa, + LAPIC_EOI = 0xb, + LAPIC_LDR = 0xd, + LAPIC_DFR = 0xe, /* Not in x2APIC */ + LAPIC_SVR = 0xf, + LAPIC_ISR0 = 0x10, + LAPIC_ISR1 = 0x11, + LAPIC_ISR2 = 0x12, + LAPIC_ISR3 = 0x13, + LAPIC_ISR4 = 0x14, + LAPIC_ISR5 = 0x15, + LAPIC_ISR6 = 0x16, + LAPIC_ISR7 = 0x17, + LAPIC_TMR0 = 0x18, + LAPIC_TMR1 = 0x19, + LAPIC_TMR2 = 0x1a, + LAPIC_TMR3 = 0x1b, + LAPIC_TMR4 = 0x1c, + LAPIC_TMR5 = 0x1d, + LAPIC_TMR6 = 0x1e, + LAPIC_TMR7 = 0x1f, + LAPIC_IRR0 = 0x20, + LAPIC_IRR1 = 0x21, + LAPIC_IRR2 = 0x22, + LAPIC_IRR3 = 0x23, + LAPIC_IRR4 = 0x24, + LAPIC_IRR5 = 0x25, + LAPIC_IRR6 = 0x26, + LAPIC_IRR7 = 0x27, + LAPIC_ESR = 0x28, + LAPIC_LVT_CMCI = 0x2f, + LAPIC_ICR_LO = 0x30, + LAPIC_ICR_HI = 0x31, /* Not in x2APIC */ + LAPIC_LVT_TIMER = 0x32, + LAPIC_LVT_THERMAL = 0x33, + LAPIC_LVT_PCINT = 0x34, + LAPIC_LVT_LINT0 = 0x35, + LAPIC_LVT_LINT1 = 0x36, + LAPIC_LVT_ERROR = 0x37, + LAPIC_ICR_TIMER = 0x38, + LAPIC_CCR_TIMER = 0x39, + LAPIC_DCR_TIMER = 0x3e, + LAPIC_SELF_IPI = 0x3f, /* Only in x2APIC */ + LAPIC_EXT_FEATURES = 0x40, /* AMD */ + LAPIC_EXT_CTRL = 0x41, /* AMD */ + LAPIC_EXT_SEOI = 0x42, /* AMD */ + LAPIC_EXT_IER0 = 0x48, /* AMD */ + LAPIC_EXT_IER1 = 0x49, /* AMD */ + LAPIC_EXT_IER2 = 0x4a, /* AMD */ + LAPIC_EXT_IER3 = 0x4b, /* AMD */ + LAPIC_EXT_IER4 = 0x4c, /* AMD */ + LAPIC_EXT_IER5 = 0x4d, /* AMD */ + LAPIC_EXT_IER6 = 0x4e, /* AMD */ + LAPIC_EXT_IER7 = 0x4f, /* AMD */ + LAPIC_EXT_LVT0 = 0x50, /* AMD */ + LAPIC_EXT_LVT1 = 0x51, /* AMD */ + LAPIC_EXT_LVT2 = 0x52, /* AMD */ + LAPIC_EXT_LVT3 = 0x53, /* AMD */ +}; + +#define LAPIC_MEM_MUL 0x10 + +/* + * Although some registers are available on AMD processors only, + * it's not a big waste to reserve them on all platforms. + * However, we need to watch out for this space being assigned for + * non-APIC purposes in the future processor models. + */ +#define LAPIC_MEM_REGION ((LAPIC_EXT_LVT3 + 1) * LAPIC_MEM_MUL) + +/****************************************************************************** + * I/O APIC structure + */ + +struct ioapic { + uint32_t ioregsel; + uint32_t rsv0[3]; + uint32_t iowin; + uint32_t rsv1[3]; +}; + +/* + * Macros for bits in union ioapic_rte + */ +#define IOAPIC_RTE_MASK_CLR 0x0U /* Interrupt Mask: Clear */ +#define IOAPIC_RTE_MASK_SET 0x1U /* Interrupt Mask: Set */ + +#define IOAPIC_RTE_TRGRMODE_EDGE 0x0U /* Trigger Mode: Edge */ +#define IOAPIC_RTE_TRGRMODE_LEVEL 0x1U /* Trigger Mode: Level */ + +#define IOAPIC_RTE_REM_IRR 0x1U /* Remote IRR: Read-Only */ + +#define IOAPIC_RTE_INTPOL_AHI 0x0U /* Interrupt Polarity: active high */ +#define IOAPIC_RTE_INTPOL_ALO 0x1U /* Interrupt Polarity: active low */ + +#define IOAPIC_RTE_DELIVS 0x1U /* Delivery Status: Read-Only */ + +#define IOAPIC_RTE_DESTMODE_PHY 0x0U /* Destination Mode: Physical */ +#define IOAPIC_RTE_DESTMODE_LOGICAL 0x1U /* Destination Mode: Logical */ + +#define IOAPIC_RTE_DELMODE_FIXED 0x0U /* Delivery Mode: Fixed */ +#define IOAPIC_RTE_DELMODE_LOPRI 0x1U /* Delivery Mode: Lowest priority */ +#define IOAPIC_RTE_DELMODE_INIT 0x5U /* Delivery Mode: INIT signal */ +#define IOAPIC_RTE_DELMODE_EXINT 0x7U /* Delivery Mode: External INTerrupt */ + +/* IOAPIC Redirection Table (RTE) Entry structure */ +union ioapic_rte { + uint64_t full; + struct { + uint32_t lo_32; + uint32_t hi_32; + } u; + struct { + uint8_t vector:8; + uint64_t delivery_mode:3; + uint64_t dest_mode:1; + uint64_t delivery_status:1; + uint64_t intr_polarity:1; + uint64_t remote_irr:1; + uint64_t trigger_mode:1; + uint64_t intr_mask:1; + uint64_t rsvd_1:39; + uint8_t dest_field:8; + } bits __attribute__((packed)); + struct { + uint32_t vector:8; + uint32_t constant:3; + uint32_t intr_index_high:1; + uint32_t delivery_status:1; + uint32_t intr_polarity:1; + uint32_t remote_irr:1; + uint32_t trigger_mode:1; + uint32_t intr_mask:1; + uint32_t rsvd_1:15; + uint32_t rsvd_2:16; + uint32_t intr_format:1; + uint32_t intr_index_low:15; + } ir_bits __attribute__((packed)); +}; + +/****************************************************************************** + * various code 'logical' values + */ + +/****************************************************************************** + * LOCAL APIC defines + */ + +/* default physical locations of LOCAL (CPU) APICs */ +#define DEFAULT_APIC_BASE 0xfee00000UL + +/* constants relating to APIC ID registers */ +#define APIC_ID_MASK 0xff000000U +#define APIC_ID_SHIFT 24U +#define APIC_ID_CLUSTER 0xf0U +#define APIC_ID_CLUSTER_ID 0x0fU +#define APIC_MAX_CLUSTER 0xeU +#define APIC_MAX_INTRACLUSTER_ID 3 +#define APIC_ID_CLUSTER_SHIFT 4 + +/* fields in VER */ +#define APIC_VER_VERSION 0x000000ffU +#define APIC_VER_MAXLVT 0x00ff0000U +#define MAXLVTSHIFT 16U +#define APIC_VER_EOI_SUPPRESSION 0x01000000U +#define APIC_VER_AMD_EXT_SPACE 0x80000000U + +/* fields in LDR */ +#define APIC_LDR_RESERVED 0x00ffffffU + +/* fields in DFR */ +#define APIC_DFR_RESERVED 0x0fffffffU +#define APIC_DFR_MODEL_MASK 0xf0000000U +#define APIC_DFR_MODEL_FLAT 0xf0000000U +#define APIC_DFR_MODEL_CLUSTER 0x00000000U + +/* fields in SVR */ +#define APIC_SVR_VECTOR 0x000000ffU +#define APIC_SVR_VEC_PROG 0x000000f0U +#define APIC_SVR_VEC_FIX 0x0000000fU +#define APIC_SVR_ENABLE 0x00000100U +#define APIC_SVR_SWDIS 0x00000000U +#define APIC_SVR_SWEN 0x00000100U +#define APIC_SVR_FOCUS 0x00000200U +#define APIC_SVR_FEN 0x00000000U +#define APIC_SVR_FDIS 0x00000200U +#define APIC_SVR_EOI_SUPPRESSION 0x00001000U + +/* fields in TPR */ +#define APIC_TPR_PRIO 0x000000ffU +#define APIC_TPR_INT 0x000000f0U +#define APIC_TPR_SUB 0x0000000fU + +/* fields in ESR */ +#define APIC_ESR_SEND_CS_ERROR 0x00000001U +#define APIC_ESR_RECEIVE_CS_ERROR 0x00000002U +#define APIC_ESR_SEND_ACCEPT 0x00000004U +#define APIC_ESR_RECEIVE_ACCEPT 0x00000008U +#define APIC_ESR_SEND_ILLEGAL_VECTOR 0x00000020U +#define APIC_ESR_RECEIVE_ILLEGAL_VECTOR 0x00000040U +#define APIC_ESR_ILLEGAL_REGISTER 0x00000080U + +/* fields in ICR_LOW */ +#define APIC_VECTOR_MASK 0x000000ffU + +#define APIC_DELMODE_MASK 0x00000700U +#define APIC_DELMODE_FIXED 0x00000000U +#define APIC_DELMODE_LOWPRIO 0x00000100U +#define APIC_DELMODE_SMI 0x00000200U +#define APIC_DELMODE_RR 0x00000300U +#define APIC_DELMODE_NMI 0x00000400U +#define APIC_DELMODE_INIT 0x00000500U +#define APIC_DELMODE_STARTUP 0x00000600U +#define APIC_DELMODE_RESV 0x00000700U + +#define APIC_DESTMODE_MASK 0x00000800U +#define APIC_DESTMODE_PHY 0x00000000U +#define APIC_DESTMODE_LOG 0x00000800U + +#define APIC_DELSTAT_MASK 0x00001000U +#define APIC_DELSTAT_IDLE 0x00000000U +#define APIC_DELSTAT_PEND 0x00001000U + +#define APIC_RESV1_MASK 0x00002000U + +#define APIC_LEVEL_MASK 0x00004000U +#define APIC_LEVEL_DEASSERT 0x00000000U +#define APIC_LEVEL_ASSERT 0x00004000U + +#define APIC_TRIGMOD_MASK 0x00008000U +#define APIC_TRIGMOD_EDGE 0x00000000U +#define APIC_TRIGMOD_LEVEL 0x00008000U + +#define APIC_RRSTAT_MASK 0x00030000U +#define APIC_RRSTAT_INVALID 0x00000000U +#define APIC_RRSTAT_INPROG 0x00010000U +#define APIC_RRSTAT_VALID 0x00020000U +#define APIC_RRSTAT_RESV 0x00030000U + +#define APIC_DEST_MASK 0x000c0000U +#define APIC_DEST_NOSHORT 0x00000000U +#define APIC_DEST_SELF 0x00040000U +#define APIC_DEST_ALLISELF 0x00080000U +#define APIC_DEST_ALLESELF 0x000c0000U + +#define APIC_RESV2_MASK 0xfff00000U + +#define APIC_ICRLO_RESV_MASK (APIC_RESV1_MASK | APIC_RESV2_MASK) + +/* fields in LVT1/2 */ +#define APIC_LVT_VECTOR 0x000000ffU +#define APIC_LVT_DM 0x00000700U +#define APIC_LVT_DM_FIXED 0x00000000U +#define APIC_LVT_DM_SMI 0x00000200U +#define APIC_LVT_DM_NMI 0x00000400U +#define APIC_LVT_DM_INIT 0x00000500U +#define APIC_LVT_DM_EXTINT 0x00000700U +#define APIC_LVT_DS 0x00001000U +#define APIC_LVT_IIPP 0x00002000U +#define APIC_LVT_IIPP_INTALO 0x00002000U +#define APIC_LVT_IIPP_INTAHI 0x00000000U +#define APIC_LVT_RIRR 0x00004000U +#define APIC_LVT_TM 0x00008000U +#define APIC_LVT_M 0x00010000U + + +/* fields in LVT Timer */ +#define APIC_LVTT_VECTOR 0x000000ffU +#define APIC_LVTT_DS 0x00001000U +#define APIC_LVTT_M 0x00010000U +#define APIC_LVTT_TM 0x00060000U +#define APIC_LVTT_TM_ONE_SHOT 0x00000000U +#define APIC_LVTT_TM_PERIODIC 0x00020000U +#define APIC_LVTT_TM_TSCDLT 0x00040000U +#define APIC_LVTT_TM_RSRV 0x00060000U + +/* APIC timer current count */ +#define APIC_TIMER_MAX_COUNT 0xffffffffU + +/* fields in TDCR */ +#define APIC_TDCR_2 0x00U +#define APIC_TDCR_4 0x01U +#define APIC_TDCR_8 0x02U +#define APIC_TDCR_16 0x03U +#define APIC_TDCR_32 0x08U +#define APIC_TDCR_64 0x09U +#define APIC_TDCR_128 0x0aU +#define APIC_TDCR_1 0x0bU + +/* Constants related to AMD Extended APIC Features Register */ +#define APIC_EXTF_ELVT_MASK 0x00ff0000U +#define APIC_EXTF_ELVT_SHIFT 16 +#define APIC_EXTF_EXTID_CAP 0x00000004U +#define APIC_EXTF_SEIO_CAP 0x00000002U +#define APIC_EXTF_IER_CAP 0x00000001U + +/* LVT table indices */ +#define APIC_LVT_TIMER 0U +#define APIC_LVT_THERMAL 1U +#define APIC_LVT_PMC 2U +#define APIC_LVT_LINT0 3U +#define APIC_LVT_LINT1 4U +#define APIC_LVT_ERROR 5U +#define APIC_LVT_CMCI 6U +#define APIC_LVT_MAX APIC_LVT_CMCI + +/* AMD extended LVT constants, seem to be assigned by fiat */ +#define APIC_ELVT_IBS 0 /* Instruction based sampling */ +#define APIC_ELVT_MCA 1 /* MCE thresholding */ +#define APIC_ELVT_DEI 2 /* Deferred error interrupt */ +#define APIC_ELVT_SBI 3 /* Sideband interface */ +#define APIC_ELVT_MAX APIC_ELVT_SBI + +/****************************************************************************** + * I/O APIC defines + */ + +/* window register offset */ +#define IOAPIC_REGSEL 0x00U +#define IOAPIC_WINDOW 0x10U + +/* indexes into IO APIC */ +#define IOAPIC_ID 0x00U +#define IOAPIC_VER 0x01U +#define IOAPIC_ARB 0x02U +#define IOAPIC_REDTBL 0x10U +#define IOAPIC_REDTBL0 IOAPIC_REDTBL +#define IOAPIC_REDTBL1 (IOAPIC_REDTBL+0x02U) +#define IOAPIC_REDTBL2 (IOAPIC_REDTBL+0x04U) +#define IOAPIC_REDTBL3 (IOAPIC_REDTBL+0x06U) +#define IOAPIC_REDTBL4 (IOAPIC_REDTBL+0x08U) +#define IOAPIC_REDTBL5 (IOAPIC_REDTBL+0x0aU) +#define IOAPIC_REDTBL6 (IOAPIC_REDTBL+0x0cU) +#define IOAPIC_REDTBL7 (IOAPIC_REDTBL+0x0eU) +#define IOAPIC_REDTBL8 (IOAPIC_REDTBL+0x10U) +#define IOAPIC_REDTBL9 (IOAPIC_REDTBL+0x12U) +#define IOAPIC_REDTBL10 (IOAPIC_REDTBL+0x14U) +#define IOAPIC_REDTBL11 (IOAPIC_REDTBL+0x16U) +#define IOAPIC_REDTBL12 (IOAPIC_REDTBL+0x18U) +#define IOAPIC_REDTBL13 (IOAPIC_REDTBL+0x1aU) +#define IOAPIC_REDTBL14 (IOAPIC_REDTBL+0x1cU) +#define IOAPIC_REDTBL15 (IOAPIC_REDTBL+0x1eU) +#define IOAPIC_REDTBL16 (IOAPIC_REDTBL+0x20U) +#define IOAPIC_REDTBL17 (IOAPIC_REDTBL+0x22U) +#define IOAPIC_REDTBL18 (IOAPIC_REDTBL+0x24U) +#define IOAPIC_REDTBL19 (IOAPIC_REDTBL+0x26U) +#define IOAPIC_REDTBL20 (IOAPIC_REDTBL+0x28U) +#define IOAPIC_REDTBL21 (IOAPIC_REDTBL+0x2aU) +#define IOAPIC_REDTBL22 (IOAPIC_REDTBL+0x2cU) +#define IOAPIC_REDTBL23 (IOAPIC_REDTBL+0x2eU) + +#define IOAPIC_ID_MASK 0x0f000000U +#define IOAPIC_ID_SHIFT 24U + +/* fields in VER, for redirection entry */ +#define IOAPIC_MAX_RTE_MASK 0x00ff0000U +#define MAX_RTE_SHIFT 16U + +#endif /* APICREG_H */ diff --git a/src/components/implementation/simple_vmm/multi_vmm/atomic.h b/src/components/implementation/simple_vmm/multi_vmm/atomic.h new file mode 100644 index 0000000000..08de71b656 --- /dev/null +++ b/src/components/implementation/simple_vmm/multi_vmm/atomic.h @@ -0,0 +1,152 @@ +/*- + * Copyright (c) 1998 Doug Rabson + * Copyright (c) 2018-2022 Intel Corporation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef ATOMIC_H +#define ATOMIC_H +#include +#define BUS_LOCK "lock ; " + +#define build_atomic_inc(name, size, type) \ +static inline void name(type *ptr) \ +{ \ + asm volatile(BUS_LOCK "inc" size " %0" \ + : "=m" (*ptr) \ + : "m" (*ptr)); \ +} +build_atomic_inc(atomic_inc16, "w", uint16_t) +build_atomic_inc(atomic_inc32, "l", uint32_t) +build_atomic_inc(atomic_inc64, "q", uint64_t) + +#define build_atomic_dec(name, size, type) \ +static inline void name(type *ptr) \ +{ \ + asm volatile(BUS_LOCK "dec" size " %0" \ + : "=m" (*ptr) \ + : "m" (*ptr)); \ +} +build_atomic_dec(atomic_dec16, "w", uint16_t) +build_atomic_dec(atomic_dec32, "l", uint32_t) +build_atomic_dec(atomic_dec64, "q", uint64_t) + +#define build_atomic_swap(name, size, type) \ +static inline type name(type *ptr, type v) \ +{ \ + asm volatile(BUS_LOCK "xchg" size " %1,%0" \ + : "+m" (*ptr), "+r" (v) \ + : \ + : "cc", "memory"); \ + return v; \ +} +build_atomic_swap(atomic_swap32, "l", uint32_t) +build_atomic_swap(atomic_swap64, "q", uint64_t) + + /* + * #define atomic_readandclear32(P) \ + * (return (*(uint32_t *)(P)); *(uint32_t *)(P) = 0U;) + */ +static inline uint32_t atomic_readandclear32(uint32_t *p) +{ + return atomic_swap32(p, 0U); +} + + /* + * #define atomic_readandclear64(P) \ + * (return (*(uint64_t *)(P)); *(uint64_t *)(P) = 0UL;) + */ +static inline uint64_t atomic_readandclear64(uint64_t *p) +{ + return atomic_swap64(p, 0UL); +} + +#define build_atomic_cmpxchg(name, size, type) \ +static inline type name(volatile type *ptr, type old, type new) \ +{ \ + type ret; \ + asm volatile(BUS_LOCK "cmpxchg" size " %2,%1" \ + : "=a" (ret), "+m" (*ptr) \ + : "r" (new), "0" (old) \ + : "memory"); \ + return ret; \ +} +build_atomic_cmpxchg(atomic_cmpxchg32, "l", uint32_t) +build_atomic_cmpxchg(atomic_cmpxchg64, "q", uint64_t) + +#define build_atomic_xadd(name, size, type) \ +static inline type name(type *ptr, type v) \ +{ \ + asm volatile(BUS_LOCK "xadd" size " %0,%1" \ + : "+r" (v), "+m" (*ptr) \ + : \ + : "cc", "memory"); \ + return v; \ + } +build_atomic_xadd(atomic_xadd16, "w", uint16_t) +build_atomic_xadd(atomic_xadd32, "l", int32_t) +build_atomic_xadd(atomic_xadd64, "q", int64_t) + +static inline int32_t atomic_add_return(int32_t *p, int32_t v) +{ + return (atomic_xadd32(p, v) + v); +} + +static inline int32_t atomic_sub_return(int32_t *p, int32_t v) +{ + return (atomic_xadd32(p, -v) - v); +} + +static inline int32_t atomic_inc_return(int32_t *v) +{ + return atomic_add_return(v, 1); +} + +static inline int32_t atomic_dec_return(int32_t *v) +{ + return atomic_sub_return(v, 1); +} + +static inline int64_t atomic_add64_return(int64_t *p, int64_t v) +{ + return (atomic_xadd64(p, v) + v); +} + +static inline int64_t atomic_sub64_return(int64_t *p, int64_t v) +{ + return (atomic_xadd64(p, -v) - v); +} + +static inline int64_t atomic_inc64_return(int64_t *v) +{ + return atomic_add64_return(v, 1); +} + +static inline int64_t atomic_dec64_return(int64_t *v) +{ + return atomic_sub64_return(v, 1); +} + +#endif /* ATOMIC_H*/ diff --git a/src/components/implementation/simple_vmm/multi_vmm/bits.h b/src/components/implementation/simple_vmm/multi_vmm/bits.h new file mode 100644 index 0000000000..f7f8b732e7 --- /dev/null +++ b/src/components/implementation/simple_vmm/multi_vmm/bits.h @@ -0,0 +1,298 @@ +/*- + * Copyright (c) 1998 Doug Rabson + * Copyright (c) 2017-2022 Intel Corporation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef BITS_H +#define BITS_H +#include "atomic.h" + +/** + * + * INVALID_BIT_INDEX means when input paramter is zero, + * bit operations function can't find bit set and return + * the invalid bit index directly. + * + **/ +#define INVALID_BIT_INDEX 0xffffU + +/* + * + * fls32 - Find the Last (most significant) bit Set in value and + * return the bit index of that bit. + * + * Bits are numbered starting at 0,the least significant bit. + * A return value of INVALID_BIT_INDEX means return value is + * invalid bit index when the input argument was zero. + * + * Examples: + * fls32 (0x0) = INVALID_BIT_INDEX + * fls32 (0x01) = 0 + * fls32 (0x80) = 7 + * ... + * fls32 (0x80000001) = 31 + * + * @param value: 'uint32_t' type value + * + * @return value: zero-based bit index, INVALID_BIT_INDEX means + * when 'value' was zero, bit operations function can't find bit + * set and return the invalid bit index directly. + * + */ +static inline uint16_t fls32(uint32_t value) +{ + uint32_t ret; + asm volatile("bsrl %1,%0\n\t" + "jnz 1f\n\t" + "mov %2,%0\n" + "1:" : "=r" (ret) + : "rm" (value), "i" (INVALID_BIT_INDEX)); + return (uint16_t)ret; +} + +static inline uint16_t fls64(uint64_t value) +{ + uint64_t ret = 0UL; + asm volatile("bsrq %1,%0\n\t" + "jnz 1f\n\t" + "mov %2,%0\n" + "1:" : "=r" (ret) + : "rm" (value), "i" (INVALID_BIT_INDEX)); + return (uint16_t)ret; +} + +/* + * + * ffs64 - Find the First (least significant) bit Set in value(Long type) + * and return the index of that bit. + * + * Bits are numbered starting at 0,the least significant bit. + * A return value of INVALID_BIT_INDEX means that the return value is the inalid + * bit index when the input argument was zero. + * + * Examples: + * ffs64 (0x0) = INVALID_BIT_INDEX + * ffs64 (0x01) = 0 + * ffs64 (0xf0) = 4 + * ffs64 (0xf00) = 8 + * ... + * ffs64 (0x8000000000000001) = 0 + * ffs64 (0xf000000000000000) = 60 + * + * @param value: 'uint64_t' type value + * + * @return value: zero-based bit index, INVALID_BIT_INDEX means + * when 'value' was zero, bit operations function can't find bit + * set and return the invalid bit index directly. + * + */ +static inline uint16_t ffs64(uint64_t value) +{ + uint64_t ret; + asm volatile("bsfq %1,%0\n\t" + "jnz 1f\n\t" + "mov %2,%0\n" + "1:" : "=r" (ret) + : "rm" (value), "i" (INVALID_BIT_INDEX)); + return (uint16_t)ret; +} + +/*bit scan forward for the least significant bit '0'*/ +static inline uint16_t ffz64(uint64_t value) +{ + return ffs64(~value); +} + + +/* + * find the first zero bit in a uint64_t array. + * @pre: the size must be multiple of 64. + */ +static inline uint64_t ffz64_ex(const uint64_t *addr, uint64_t size) +{ + uint64_t ret = size; + uint64_t idx; + + for (idx = 0UL; (idx << 6U) < size; idx++) { + if (addr[idx] != ~0UL) { + ret = (idx << 6U) + ffz64(addr[idx]); + break; + } + } + + return ret; +} +/* + * Counts leading zeros. + * + * The number of leading zeros is defined as the number of + * most significant bits which are not '1'. E.g.: + * clz(0x80000000)==0 + * clz(0x40000000)==1 + * ... + * clz(0x00000001)==31 + * clz(0x00000000)==32 + * + * @param value:The 32 bit value to count the number of leading zeros. + * + * @return The number of leading zeros in 'value'. + */ +static inline uint16_t clz(uint32_t value) +{ + return ((value != 0U) ? (31U - fls32(value)) : 32U); +} + +/* + * Counts leading zeros (64 bit version). + * + * @param value:The 64 bit value to count the number of leading zeros. + * + * @return The number of leading zeros in 'value'. + */ +static inline uint16_t clz64(uint64_t value) +{ + return ((value != 0UL) ? (63U - fls64(value)) : 64U); +} + +/* + * (*addr) |= (1UL<=64, it will be truncated. + */ +#define build_bitmap_set(name, op_len, op_type, lock) \ +static inline void name(uint16_t nr_arg, volatile op_type *addr) \ +{ \ + uint16_t nr; \ + nr = nr_arg & ((8U * sizeof(op_type)) - 1U); \ + asm volatile(lock "or" op_len " %1,%0" \ + : "+m" (*addr) \ + : "r" ((op_type)(1UL<=64, it will be truncated. + */ +#define build_bitmap_clear(name, op_len, op_type, lock) \ +static inline void name(uint16_t nr_arg, volatile op_type *addr) \ +{ \ + uint16_t nr; \ + nr = nr_arg & ((8U * sizeof(op_type)) - 1U); \ + asm volatile(lock "and" op_len " %1,%0" \ + : "+m" (*addr) \ + : "r" ((op_type)(~(1UL<<(nr)))) \ + : "cc", "memory"); \ +} +build_bitmap_clear(bitmap_clear_nolock, "q", uint64_t, "") +build_bitmap_clear(bitmap_clear_lock, "q", uint64_t, BUS_LOCK) +build_bitmap_clear(bitmap32_clear_nolock, "l", uint32_t, "") +build_bitmap_clear(bitmap32_clear_lock, "l", uint32_t, BUS_LOCK) + +/* + * return !!((*addr) & (1UL<=64, it will + * be truncated. + */ +static inline bool bitmap_test(uint16_t nr, const volatile uint64_t *addr) +{ + int32_t ret = 0; + asm volatile("btq %q2,%1\n\tsbbl %0, %0" + : "=r" (ret) + : "m" (*addr), "r" ((uint64_t)(nr & 0x3fU)) + : "cc", "memory"); + return (ret != 0); +} + +static inline bool bitmap32_test(uint16_t nr, const volatile uint32_t *addr) +{ + int32_t ret = 0; + asm volatile("btl %2,%1\n\tsbbl %0, %0" + : "=r" (ret) + : "m" (*addr), "r" ((uint32_t)(nr & 0x1fU)) + : "cc", "memory"); + return (ret != 0); +} + +/* + * bool ret = (*addr) & (1UL<=64, it + * will be truncated. + */ +#define build_bitmap_testandset(name, op_len, op_type, lock) \ +static inline bool name(uint16_t nr_arg, volatile op_type *addr) \ +{ \ + uint16_t nr; \ + int32_t ret=0; \ + nr = nr_arg & ((8U * sizeof(op_type)) - 1U); \ + asm volatile(lock "bts" op_len " %2,%1\n\tsbbl %0,%0" \ + : "=r" (ret), "=m" (*addr) \ + : "r" ((op_type)nr) \ + : "cc", "memory"); \ + return (ret != 0); \ +} +build_bitmap_testandset(bitmap_test_and_set_nolock, "q", uint64_t, "") +build_bitmap_testandset(bitmap_test_and_set_lock, "q", uint64_t, BUS_LOCK) +build_bitmap_testandset(bitmap32_test_and_set_nolock, "l", uint32_t, "") +build_bitmap_testandset(bitmap32_test_and_set_lock, "l", uint32_t, BUS_LOCK) + +/* + * bool ret = (*addr) & (1UL<=64, + * it will be truncated. + */ +#define build_bitmap_testandclear(name, op_len, op_type, lock) \ +static inline bool name(uint16_t nr_arg, volatile op_type *addr) \ +{ \ + uint16_t nr; \ + int32_t ret=0; \ + nr = nr_arg & ((8U * sizeof(op_type)) - 1U); \ + asm volatile(lock "btr" op_len " %2,%1\n\tsbbl %0,%0" \ + : "=r" (ret), "=m" (*addr) \ + : "r" ((op_type)nr) \ + : "cc", "memory"); \ + return (ret != 0); \ +} +build_bitmap_testandclear(bitmap_test_and_clear_nolock, "q", uint64_t, "") +build_bitmap_testandclear(bitmap_test_and_clear_lock, "q", uint64_t, BUS_LOCK) +build_bitmap_testandclear(bitmap32_test_and_clear_nolock, "l", uint32_t, "") +build_bitmap_testandclear(bitmap32_test_and_clear_lock, "l", uint32_t, BUS_LOCK) + +static inline uint16_t bitmap_weight(uint64_t bits) +{ + return (uint16_t)__builtin_popcountl(bits); +} + +#endif /* BITS_H*/ diff --git a/src/components/implementation/simple_vmm/multi_vmm/cpu.h b/src/components/implementation/simple_vmm/multi_vmm/cpu.h new file mode 100755 index 0000000000..96f6a6ce4d --- /dev/null +++ b/src/components/implementation/simple_vmm/multi_vmm/cpu.h @@ -0,0 +1,337 @@ +/*- + * Copyright (c) 1989, 1990 William F. Jolitz + * Copyright (c) 1990 The Regents of the University of California. + * Copyright (c) 2017-2022 Intel Corporation. + * + * This code is derived from software contributed to Berkeley by + * William Jolitz. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * from: @(#)segments.h 7.1 (Berkeley) 5/9/91 + * $FreeBSD$ + */ + +#ifndef CPU_H +#define CPU_H +#include +#include +#include +#include + +/* Define CPU stack alignment */ +#define CPU_STACK_ALIGN 16UL + +/* CR0 register definitions */ +#define CR0_PG (1UL<<31U) /* paging enable */ +#define CR0_CD (1UL<<30U) /* cache disable */ +#define CR0_NW (1UL<<29U) /* not write through */ +#define CR0_AM (1UL<<18U) /* alignment mask */ +#define CR0_WP (1UL<<16U) /* write protect */ +#define CR0_NE (1UL<<5U) /* numeric error */ +#define CR0_ET (1UL<<4U) /* extension type */ +#define CR0_TS (1UL<<3U) /* task switched */ +#define CR0_EM (1UL<<2U) /* emulation */ +#define CR0_MP (1UL<<1U) /* monitor coprocessor */ +#define CR0_PE (1UL<<0U) /* protected mode enabled */ + +/* CR3 register definitions */ +#define CR3_PWT (1UL<<3U) /* page-level write through */ +#define CR3_PCD (1UL<<4U) /* page-level cache disable */ + +/* CR4 register definitions */ +#define CR4_VME (1UL<<0U) /* virtual 8086 mode extensions */ +#define CR4_PVI (1UL<<1U) /* protected mode virtual interrupts */ +#define CR4_TSD (1UL<<2U) /* time stamp disable */ +#define CR4_DE (1UL<<3U) /* debugging extensions */ +#define CR4_PSE (1UL<<4U) /* page size extensions */ +#define CR4_PAE (1UL<<5U) /* physical address extensions */ +#define CR4_MCE (1UL<<6U) /* machine check enable */ +#define CR4_PGE (1UL<<7U) /* page global enable */ +#define CR4_PCE (1UL<<8U) +/* performance monitoring counter enable */ +#define CR4_OSFXSR (1UL<<9U) /* OS support for FXSAVE/FXRSTOR */ +#define CR4_OSXMMEXCPT (1UL<<10U) +/* OS support for unmasked SIMD floating point exceptions */ +#define CR4_UMIP (1UL<<11U) /* User-Mode Inst prevention */ +#define CR4_LA57 (1UL<<12U) /* 57-bit linear address */ +#define CR4_VMXE (1UL<<13U) /* VMX enable */ +#define CR4_SMXE (1UL<<14U) /* SMX enable */ +#define CR4_FSGSBASE (1UL<<16U) /* RD(FS|GS|FS)BASE inst */ +#define CR4_PCIDE (1UL<<17U) /* PCID enable */ +/* XSAVE and Processor Extended States enable bit */ +#define CR4_OSXSAVE (1UL<<18U) +#define CR4_KL (1UL<<19U) /* KeyLocker enable */ +#define CR4_SMEP (1UL<<20U) +#define CR4_SMAP (1UL<<21U) +#define CR4_PKE (1UL<<22U) /* Protect-key-enable */ +#define CR4_CET (1UL<<23U) /* Control-flow Enforcement Technology enable */ +#define CR4_PKS (1UL<<24U) /* Enable protection keys for supervisor-mode pages */ + +/* XCR0_SSE */ +#define XCR0_SSE (1UL<<1U) +/* XCR0_AVX */ +#define XCR0_AVX (1UL<<2U) +/* XCR0_BNDREGS */ +#define XCR0_BNDREGS (1UL<<3U) +/* XCR0_BNDCSR */ +#define XCR0_BNDCSR (1UL<<4U) +/* According to SDM Vol1 13.3: + * XCR0[63:10] and XCR0[8] are reserved. Executing the XSETBV instruction causes + * a general-protection fault if ECX = 0 and any corresponding bit in EDX:EAX + * is not 0. + */ +#define XCR0_RESERVED_BITS ((~((1UL << 10U) - 1UL)) | (1UL << 8U)) + + +/* + * Entries in the Interrupt Descriptor Table (IDT) + */ +#define IDT_DE 0U /* #DE: Divide Error */ +#define IDT_DB 1U /* #DB: Debug */ +#define IDT_NMI 2U /* Nonmaskable External Interrupt */ +#define IDT_BP 3U /* #BP: Breakpoint */ +#define IDT_OF 4U /* #OF: Overflow */ +#define IDT_BR 5U /* #BR: Bound Range Exceeded */ +#define IDT_UD 6U /* #UD: Undefined/Invalid Opcode */ +#define IDT_NM 7U /* #NM: No Math Coprocessor */ +#define IDT_DF 8U /* #DF: Double Fault */ +#define IDT_FPUGP 9U /* Coprocessor Segment Overrun */ +#define IDT_TS 10U /* #TS: Invalid TSS */ +#define IDT_NP 11U /* #NP: Segment Not Present */ +#define IDT_SS 12U /* #SS: Stack Segment Fault */ +#define IDT_GP 13U /* #GP: General Protection Fault */ +#define IDT_PF 14U /* #PF: Page Fault */ +#define IDT_MF 16U /* #MF: FPU Floating-Point Error */ +#define IDT_AC 17U /* #AC: Alignment Check */ +#define IDT_MC 18U /* #MC: Machine Check */ +#define IDT_XF 19U /* #XF: SIMD Floating-Point Exception */ +#define IDT_VE 20U /* #VE: Virtualization Exception */ + +/*Bits in EFER special registers */ +#define EFER_LMA 0x00000400U /* Long mode active (R) */ + +#define RFLAGS_C (1U<<0U) +#define RFLAGS_P (1U<<2U) +#define RFLAGS_A (1U<<4U) +#define RFLAGS_Z (1U<<6U) +#define RFLAGS_S (1U<<7U) +#define RFLAGS_O (1U<<11U) +#define RFLAGS_VM (1U<<17U) +#define RFLAGS_AC (1U<<18U) + +/* CPU clock frequencies (FSB) */ +#define CPU_FSB_83KHZ 83200 +#define CPU_FSB_100KHZ 99840 +#define CPU_FSB_133KHZ 133200 +#define CPU_FSB_166KHZ 166400 + +/* Time conversions */ +#define CPU_GHZ_TO_HZ 1000000000 +#define CPU_GHZ_TO_KHZ 1000000 +#define CPU_GHZ_TO_MHZ 1000 +#define CPU_MHZ_TO_HZ 1000000 +#define CPU_MHZ_TO_KHZ 1000 + + +/* Number of GPRs saved / restored for guest in VCPU structure */ +#define NUM_GPRS 16U + +#define XSAVE_STATE_AREA_SIZE 4096U +#define XSAVE_LEGACY_AREA_SIZE 512U +#define XSAVE_HEADER_AREA_SIZE 64U +#define XSAVE_EXTEND_AREA_SIZE (XSAVE_STATE_AREA_SIZE - \ + XSAVE_HEADER_AREA_SIZE - \ + XSAVE_LEGACY_AREA_SIZE) +#define XSAVE_COMPACTED_FORMAT (1UL << 63U) + +#define XSAVE_FPU (1UL << 0U) +#define XSAVE_SSE (1UL << 1U) + +#define CPU_CONTEXT_OFFSET_RAX 0U +#define CPU_CONTEXT_OFFSET_RCX 8U +#define CPU_CONTEXT_OFFSET_RDX 16U +#define CPU_CONTEXT_OFFSET_RBX 24U +#define CPU_CONTEXT_OFFSET_RSP 32U +#define CPU_CONTEXT_OFFSET_RBP 40U +#define CPU_CONTEXT_OFFSET_RSI 48U +#define CPU_CONTEXT_OFFSET_RDI 56U +#define CPU_CONTEXT_OFFSET_R8 64U +#define CPU_CONTEXT_OFFSET_R9 72U +#define CPU_CONTEXT_OFFSET_R10 80U +#define CPU_CONTEXT_OFFSET_R11 88U +#define CPU_CONTEXT_OFFSET_R12 96U +#define CPU_CONTEXT_OFFSET_R13 104U +#define CPU_CONTEXT_OFFSET_R14 112U +#define CPU_CONTEXT_OFFSET_R15 120U +#define CPU_CONTEXT_OFFSET_CR0 128U +#define CPU_CONTEXT_OFFSET_CR2 136U +#define CPU_CONTEXT_OFFSET_CR4 144U +#define CPU_CONTEXT_OFFSET_RIP 152U +#define CPU_CONTEXT_OFFSET_RFLAGS 160U +#define CPU_CONTEXT_OFFSET_IA32_SPEC_CTRL 168U +#define CPU_CONTEXT_OFFSET_IA32_EFER 176U +#define CPU_CONTEXT_OFFSET_EXTCTX_START 184U +#define CPU_CONTEXT_OFFSET_CR3 184U +#define CPU_CONTEXT_OFFSET_IDTR 192U +#define CPU_CONTEXT_OFFSET_LDTR 216U + +#ifndef ASSEMBLER + +#define ALL_CPUS_MASK ((1UL << get_pcpu_nums()) - 1UL) +#define AP_MASK (ALL_CPUS_MASK & ~(1UL << BSP_CPU_ID)) + +/** + * + * Identifiers for architecturally defined registers. + * + * These register names is used in condition statement. + * Within the following groups,register name need to be + * kept in order: + * General register names group (CPU_REG_RAX~CPU_REG_R15); + * Non general register names group (CPU_REG_CR0~CPU_REG_GDTR); + * Segement register names group (CPU_REG_ES~CPU_REG_GS). + */ +enum cpu_reg_name { + /* General purpose register layout should align with + * struct acrn_gp_regs + */ + CPU_REG_RAX, + CPU_REG_RCX, + CPU_REG_RDX, + CPU_REG_RBX, + CPU_REG_RSP, + CPU_REG_RBP, + CPU_REG_RSI, + CPU_REG_RDI, + CPU_REG_R8, + CPU_REG_R9, + CPU_REG_R10, + CPU_REG_R11, + CPU_REG_R12, + CPU_REG_R13, + CPU_REG_R14, + CPU_REG_R15, + + CPU_REG_CR0, + CPU_REG_CR2, + CPU_REG_CR3, + CPU_REG_CR4, + CPU_REG_DR7, + CPU_REG_RIP, + CPU_REG_RFLAGS, + /*CPU_REG_NATURAL_LAST*/ + CPU_REG_EFER, + CPU_REG_PDPTE0, + CPU_REG_PDPTE1, + CPU_REG_PDPTE2, + CPU_REG_PDPTE3, + /*CPU_REG_64BIT_LAST,*/ + CPU_REG_ES, + CPU_REG_CS, + CPU_REG_SS, + CPU_REG_DS, + CPU_REG_FS, + CPU_REG_GS, + CPU_REG_LDTR, + CPU_REG_TR, + CPU_REG_IDTR, + CPU_REG_GDTR + /*CPU_REG_LAST*/ +}; + +/**********************************/ +/* EXTERNAL VARIABLES */ +/**********************************/ + +/* In trampoline range, hold the jump target which trampline will jump to */ +extern uint64_t main_entry[1]; +extern uint64_t secondary_cpu_stack[1]; + +/* + * To support per_cpu access, we use a special struct "per_cpu_region" to hold + * the pattern of per CPU data. And we allocate memory for per CPU data + * according to multiple this struct size and pcpu number. + * + * +-------------------+------------------+---+------------------+ + * | percpu for pcpu0 | percpu for pcpu1 |...| percpu for pcpuX | + * +-------------------+------------------+---+------------------+ + * ^ ^ + * | | + * + * + * To access per cpu data, we use: + * per_cpu_base_ptr + sizeof(struct per_cpu_region) * curr_pcpu_id + * + offset_of_member_per_cpu_region + * to locate the per cpu data. + */ + +/* Boot CPU ID */ +#define BSP_CPU_ID 0U + +/** + *The invalid cpu_id (INVALID_CPU_ID) is error + *code for error handling, this means that + *caller can't find a valid physical cpu + *or virtual cpu. + */ +#define INVALID_CPU_ID 0xffffU +/** + *The broadcast id (BROADCAST_CPU_ID) + *used to notify all valid phyiscal cpu + *or virtual cpu. + */ +#define BROADCAST_CPU_ID 0xfffeU + +struct descriptor_table { + uint16_t limit; + uint64_t base; +} __packed; + +/* CPU states defined */ +enum pcpu_boot_state { + PCPU_STATE_RESET = 0U, + PCPU_STATE_INITIALIZING, + PCPU_STATE_RUNNING, + PCPU_STATE_HALTED, + PCPU_STATE_DEAD, +}; + +#define NEED_OFFLINE (1U) +#define NEED_SHUTDOWN_VM (2U) +void make_pcpu_offline(uint16_t pcpu_id); +bool need_offline(uint16_t pcpu_id); + +struct segment_sel { + uint16_t selector; + uint64_t base; + uint32_t limit; + uint32_t attr; +}; +#else /* ASSEMBLER defined */ + +#endif /* ASSEMBLER defined */ + +#endif /* CPU_H */ diff --git a/src/components/implementation/simple_vmm/multi_vmm/cpu_caps.h b/src/components/implementation/simple_vmm/multi_vmm/cpu_caps.h new file mode 100644 index 0000000000..466a024840 --- /dev/null +++ b/src/components/implementation/simple_vmm/multi_vmm/cpu_caps.h @@ -0,0 +1,68 @@ +/* + * Copyright (C) 2018-2022 Intel Corporation. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef CPUINFO_H +#define CPUINFO_H + +#define MAX_PSTATE 20U /* max num of supported Px count */ +#define MAX_CSTATE 8U /* max num of supported Cx count */ +/* We support MAX_CSTATE num of Cx, means have (MAX_CSTATE - 1) Cx entries, + * i.e. supported Cx entry index range from 1 to MAX_CX_ENTRY. + */ +#define MAX_CX_ENTRY (MAX_CSTATE - 1U) + +/* CPUID feature words */ +#define FEAT_1_ECX 0U /* CPUID[1].ECX */ +#define FEAT_1_EDX 1U /* CPUID[1].EDX */ +#define FEAT_7_0_EBX 2U /* CPUID[EAX=7,ECX=0].EBX */ +#define FEAT_7_0_ECX 3U /* CPUID[EAX=7,ECX=0].ECX */ +#define FEAT_7_0_EDX 4U /* CPUID[EAX=7,ECX=0].EDX */ +#define FEAT_8000_0001_ECX 5U /* CPUID[8000_0001].ECX */ +#define FEAT_8000_0001_EDX 6U /* CPUID[8000_0001].EDX */ +#define FEAT_8000_0007_EDX 7U /* CPUID[8000_0007].EDX */ +#define FEAT_8000_0008_EBX 8U /* CPUID[8000_0008].EBX */ +#define FEAT_D_0_EAX 9U /* CPUID[D][0].EAX */ +#define FEAT_D_0_EDX 10U /* CPUID[D][0].EDX */ +#define FEAT_D_1_EAX 11U /* CPUID[D][1].EAX */ +#define FEAT_D_1_ECX 13U /* CPUID[D][1].ECX */ +#define FEAT_D_1_EDX 14U /* CPUID[D][1].EDX */ +#define FEAT_7_2_EDX 15U /* CPUID[EAX=7,ECX=2].EDX */ +#define FEATURE_WORDS 16U + +struct cpuinfo_x86 { + /* SDM 2-2 Vol.4 Table 2-1 uses DisplayFamily_DisplayModel to + * distinguish Processor Families/Processor Number Series. + */ + uint8_t displayfamily, displaymodel; + uint8_t virt_bits; + uint8_t phys_bits; + uint32_t cpuid_level; + uint32_t extended_cpuid_level; + uint64_t physical_address_mask; + uint32_t cpuid_leaves[FEATURE_WORDS]; + char model_name[64]; +}; + +bool has_monitor_cap(void); +bool disable_host_monitor_wait(void); +bool is_apl_platform(void); +bool pcpu_has_cap(uint32_t bit); +bool pcpu_has_vmx_ept_vpid_cap(uint64_t bit_mask); +bool is_apl_platform(void); +bool has_core_cap(uint32_t bit_mask); +bool is_ac_enabled(void); +bool is_gp_enabled(void); +void init_pcpu_capabilities(void); +void init_pcpu_model_name(void); +int32_t detect_hardware_support(void); +struct cpuinfo_x86 *get_pcpu_info(void); + +/* The bits of MSR IA32_CORE_CAPABILITIES */ +#define CORE_CAP_SPLIT_LOCK (1U << 5U) /* support #AC for Split-locked Access */ +#define CORE_CAP_UC_LOCK (1U << 4U) /* support #GP for non-guaranteed-atomic-locked access at Non-WB memory */ + + +#endif /* CPUINFO_H */ diff --git a/src/components/implementation/simple_vmm/multi_vmm/cpuid.h b/src/components/implementation/simple_vmm/multi_vmm/cpuid.h new file mode 100644 index 0000000000..cd6bfa93ad --- /dev/null +++ b/src/components/implementation/simple_vmm/multi_vmm/cpuid.h @@ -0,0 +1,186 @@ +/* + * Copyright (C) 2018-2022 Intel Corporation. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +/* +* cpuid.h +* +* Created on: Jan 4, 2018 +* Author: don +*/ + +#ifndef CPUID_H_ +#define CPUID_H_ + +/* CPUID bit definitions */ +#define CPUID_ECX_SSE3 (1U<<0U) +#define CPUID_ECX_PCLMUL (1U<<1U) +#define CPUID_ECX_DTES64 (1U<<2U) +#define CPUID_ECX_MONITOR (1U<<3U) +#define CPUID_ECX_DS_CPL (1U<<4U) +#define CPUID_ECX_VMX (1U<<5U) +#define CPUID_ECX_SMX (1U<<6U) +#define CPUID_ECX_EST (1U<<7U) +#define CPUID_ECX_TM2 (1U<<8U) +#define CPUID_ECX_SSSE3 (1U<<9U) +#define CPUID_ECX_CID (1U<<10U) +#define CPUID_ECX_SDBG (1U<<11U) +#define CPUID_ECX_FMA (1U<<12U) +#define CPUID_ECX_CX16 (1U<<13U) +#define CPUID_ECX_ETPRD (1U<<14U) +#define CPUID_ECX_PDCM (1U<<15U) +#define CPUID_ECX_DCA (1U<<18U) +#define CPUID_ECX_SSE4_1 (1U<<19U) +#define CPUID_ECX_SSE4_2 (1U<<20U) +#define CPUID_ECX_x2APIC (1U<<21U) +#define CPUID_ECX_MOVBE (1U<<22U) +#define CPUID_ECX_POPCNT (1U<<23U) +#define CPUID_ECX_AES (1U<<25U) +#define CPUID_ECX_XSAVE (1U<<26U) +#define CPUID_ECX_OSXSAVE (1U<<27U) +#define CPUID_ECX_AVX (1U<<28U) +#define CPUID_ECX_HV (1U<<31U) +#define CPUID_ECX_MWAIT (1U<<0U) +#define CPUID_ECX_MWAIT_INT (1U<<1U) +#define CPUID_EDX_FPU (1U<<0U) +#define CPUID_EDX_VME (1U<<1U) +#define CPUID_EDX_DE (1U<<2U) +#define CPUID_EDX_PSE (1U<<3U) +#define CPUID_EDX_TSC (1U<<4U) +#define CPUID_EDX_MSR (1U<<5U) +#define CPUID_EDX_PAE (1U<<6U) +#define CPUID_EDX_MCE (1U<<7U) +#define CPUID_EDX_CX8 (1U<<8U) +#define CPUID_EDX_APIC (1U<<9U) +#define CPUID_EDX_SEP (1U<<11U) +#define CPUID_EDX_MTRR (1U<<12U) +#define CPUID_EDX_PGE (1U<<13U) +#define CPUID_EDX_MCA (1U<<14U) +#define CPUID_EDX_CMOV (1U<<15U) +#define CPUID_EDX_PAT (1U<<16U) +#define CPUID_EDX_PSE36 (1U<<17U) +#define CPUID_EDX_PSN (1U<<18U) +#define CPUID_EDX_CLF (1U<<19U) +#define CPUID_EDX_DTES (1U<<21U) +#define CPUID_EDX_ACPI (1U<<22U) +#define CPUID_EDX_MMX (1U<<23U) +#define CPUID_EDX_FXSR (1U<<24U) +#define CPUID_EDX_SSE (1U<<25U) +#define CPUID_EDX_SSE2 (1U<<26U) +#define CPUID_EDX_SS (1U<<27U) +#define CPUID_EDX_HTT (1U<<28U) +#define CPUID_EDX_TM1 (1U<<29U) +#define CPUID_EDX_IA64 (1U<<30U) +#define CPUID_EDX_PBE (1U<<31U) + +/* CPUID.06H:EAX.DTHERM */ +#define CPUID_EAX_DTHERM (1U<<0U) +/* CPUID.06H:EAX.HWP */ +#define CPUID_EAX_HWP (1U<<7U) +/* CPUID.06H:EAX.HWP_Notification */ +#define CPUID_EAX_HWP_N (1U<<8U) +/* CPUID.06H:EAX.HWP_Activity_Window */ +#define CPUID_EAX_HWP_AW (1U<<9U) +/* CPUID.06H:EAX.HWP_Energy_Performance_Preference */ +#define CPUID_EAX_HWP_EPP (1U<<10U) +/* CPUID.06H:EAX.HWP_Package_Level_Request */ +#define CPUID_EAX_HWP_PLR (1U<<11U) +/* CPUID.06H:ECX.Hardware_Coordination_Feedback_Capability */ +#define CPUID_ECX_HCFC (1U<<0U) +/* CPUID.07H:EBX.FSGSBASE*/ +#define CPUID_EBX_FSGSBASE (1U<<0U) +/* CPUID.07H:EBX.TSC_ADJUST*/ +#define CPUID_EBX_TSC_ADJ (1U<<1U) +/* CPUID.07H:EBX.SGX */ +#define CPUID_EBX_SGX (1U<<2U) +/* CPUID.07H:EBX.SMEP*/ +#define CPUID_EBX_SMEP (1U<<7U) +/* CPUID.07H:EBX.MPX */ +#define CPUID_EBX_MPX (1U<<14U) +/* CPUID.07H:EBX.SMAP*/ +#define CPUID_EBX_SMAP (1U<<20U) +/* CPUID.07H:ECX.UMIP */ +#define CPUID_ECX_UMIP (1U<<2U) +/* CPUID.07H:ECX.PKE */ +#define CPUID_ECX_PKE (1U<<3U) +/* CPUID.07H:ECX.WAITPKG */ +#define CPUID_ECX_WAITPKG (1U<<5U) +/* CPUID.07H:ECX.CET_SS */ +#define CPUID_ECX_CET_SS (1U<<7U) +/* CPUID.07H:ECX.LA57 */ +#define CPUID_ECX_LA57 (1U<<16U) +/* CPUID.07H:ECX.SGX_LC*/ +#define CPUID_ECX_SGX_LC (1U<<30U) +/* CPUID.07H:ECX.PKS*/ +#define CPUID_ECX_PKS (1U<<31U) +/* CPUID.07H:EDX.CET_IBT */ +#define CPUID_EDX_CET_IBT (1U<<20U) +/* CPUID.07H:EDX.IBRS_IBPB*/ +#define CPUID_EDX_IBRS_IBPB (1U<<26U) +/* CPUID.07H:EDX.STIBP*/ +#define CPUID_EDX_STIBP (1U<<27U) +/* CPUID.80000001H:EDX.Page1GB*/ +#define CPUID_EDX_PAGE1GB (1U<<26U) +/* CPUID.07H:EBX.INVPCID*/ +#define CPUID_EBX_INVPCID (1U<<10U) +/* CPUID.07H:EBX.PQM */ +#define CPUID_EBX_PQM (1U<<12U) +/* CPUID.07H:EBX.PQE */ +#define CPUID_EBX_PQE (1U<<15U) +/* CPUID.07H:EBX.INTEL_PROCESSOR_TRACE */ +#define CPUID_EBX_PROC_TRC (1U<<25U) +/* CPUID.01H:ECX.PCID*/ +#define CPUID_ECX_PCID (1U<<17U) +/* CPUID.0DH.EAX.XCR0_BNDREGS */ +#define CPUID_EAX_XCR0_BNDREGS (1U<<3U) +/* CPUID.0DH.EAX.XCR0_BNDCSR */ +#define CPUID_EAX_XCR0_BNDCSR (1U<<4U) +/* CPUID.0DH.ECX.CET_U_STATE */ +#define CPUID_ECX_CET_U_STATE (1U<<11U) +/* CPUID.0DH.ECX.CET_S_STATE */ +#define CPUID_ECX_CET_S_STATE (1U<<12U) +/* CPUID.12H.EAX.SGX1 */ +#define CPUID_EAX_SGX1 (1U<<0U) +/* CPUID.12H.EAX.SGX2 */ +#define CPUID_EAX_SGX2 (1U<<1U) +/* CPUID.19H.EBX.KL_AES_ENABLED */ +#define CPUID_EBX_KL_AES_EN (1U<<0U) +/* CPUID.19H.EBX.KL_BACKUP_MSR */ +#define CPUID_EBX_KL_BACKUP_MSR (1U<<4U) +/* CPUID.19H.ECX.KL_NOBACKUP */ +#define CPUID_ECX_KL_NOBACKUP (1U<<0U) +/* CPUID.19H.ECX.KL_RANDOM_KS */ +#define CPUID_ECX_KL_RANDOM_KS (1U<<1U) +/* CPUID.80000001H.EDX.XD_BIT_AVAILABLE */ +#define CPUID_EDX_XD_BIT_AVIL (1U<<20U) + +/* CPUID source operands */ +#define CPUID_VENDORSTRING 0U +#define CPUID_FEATURES 1U +#define CPUID_TLB 2U +#define CPUID_SERIALNUM 3U +#define CPUID_EXTEND_FEATURE 7U +#define CPUID_XSAVE_FEATURES 0xDU +#define CPUID_RDT_ALLOCATION 0x10U +#define CPUID_MAX_EXTENDED_FUNCTION 0x80000000U +#define CPUID_EXTEND_FUNCTION_1 0x80000001U +#define CPUID_EXTEND_FUNCTION_2 0x80000002U +#define CPUID_EXTEND_FUNCTION_3 0x80000003U +#define CPUID_EXTEND_FUNCTION_4 0x80000004U +#define CPUID_EXTEND_INVA_TSC 0x80000007U +#define CPUID_EXTEND_ADDRESS_SIZE 0x80000008U + +static inline void cpuid_subleaf(uint32_t leaf, uint32_t subleaf, + uint32_t *eax, uint32_t *ebx, + uint32_t *ecx, uint32_t *edx) +{ + /* Execute CPUID instruction and save results */ + asm volatile("cpuid":"=a"(*eax), "=b"(*ebx), + "=c"(*ecx), "=d"(*edx) + : "a" (leaf), "c" (subleaf) + : "memory"); +} + +#endif /* CPUID_H_ */ diff --git a/src/components/implementation/simple_vmm/multi_vmm/devices/serial/serial.c b/src/components/implementation/simple_vmm/multi_vmm/devices/serial/serial.c new file mode 100644 index 0000000000..41044b056d --- /dev/null +++ b/src/components/implementation/simple_vmm/multi_vmm/devices/serial/serial.c @@ -0,0 +1,56 @@ +#include "serial.h" + +static u8_t serial_data[0x08]; +static u8_t send_intr_enable = 0; + +void +serial_handler(u16_t port, int dir, int sz, struct vmrt_vm_vcpu *vcpu) +{ + assert(port <= SERIAL_PORT_MAX && port >= SERIAL_PORT_MIN); + assert(sz == IO_BYTE); + + if (dir == IO_IN) { + vcpu->shared_region->ax = serial_data[port - SERIAL_PORT_MIN]; + } else if (dir == IO_OUT) { + serial_data[port - SERIAL_PORT_MIN] = (u8_t)vcpu->shared_region->ax; + switch (port) + { + + case SERIAL_PORT1: + printc("%c", (u8_t)vcpu->shared_region->ax); + if (send_intr_enable) { + /* + * TODO: correctly handle serial output(eg: multiple vcpu case) and inject serial interrupt, + * with io apic, 34 is serial8250_interrupt vector. + */ +#if VMX_SUPPORT_POSTED_INTR + vlapic_set_intr(vcpu, 34, 0); +#else + lapic_intr_inject(vcpu, 34, 1); +#endif + serial_data[SERIAL_IIR - SERIAL_PORT_MIN] = 0x2; + serial_data[MODEM_STATUS_REGISTER - SERIAL_PORT_MIN] = 0x20; + serial_data[SERIAL_LSR - SERIAL_PORT_MIN] = 0x60; + } + break; + case SERIAL_IER: + if (0x2 & (u8_t)vcpu->shared_region->ax) { + send_intr_enable = 1; + } else { + send_intr_enable = 0; + } + break; + } + } else { + VM_PANIC(vcpu); + } + + return; +} + +static void __attribute__((constructor)) +init(void) +{ + memset(&serial_data, 0, sizeof(serial_data)); + serial_data[SERIAL_LSR - SERIAL_PORT_MIN] = 0x60; +} diff --git a/src/components/implementation/simple_vmm/multi_vmm/devices/serial/serial.h b/src/components/implementation/simple_vmm/multi_vmm/devices/serial/serial.h new file mode 100644 index 0000000000..46ac88dd1e --- /dev/null +++ b/src/components/implementation/simple_vmm/multi_vmm/devices/serial/serial.h @@ -0,0 +1,17 @@ +#pragma once +#include +#include + +/* Reference: https://www.lammertbies.nl/comm/info/serial-uart */ +#define SERIAL_PORT1 0x3F8 +#define SERIAL_IER 0x3F9 +#define SERIAL_IIR 0x3FA +#define SERIAL_LCR 0x3FB +#define SERIAL_MCR 0x3FC +#define SERIAL_LSR 0x3FD +#define MODEM_STATUS_REGISTER 0x3FE + +#define SERIAL_PORT_MIN SERIAL_PORT1 +#define SERIAL_PORT_MAX MODEM_STATUS_REGISTER + +void serial_handler(u16_t port, int dir, int sz, struct vmrt_vm_vcpu *vcpu); diff --git a/src/components/implementation/simple_vmm/multi_vmm/devices/vpci/virtio_net_io.c b/src/components/implementation/simple_vmm/multi_vmm/devices/vpci/virtio_net_io.c new file mode 100644 index 0000000000..cab977330b --- /dev/null +++ b/src/components/implementation/simple_vmm/multi_vmm/devices/vpci/virtio_net_io.c @@ -0,0 +1,725 @@ +/*- + * Copyright (c) 2011 NetApp, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ +#include +#include +#include +#include "virtio_net_io.h" +#include "vpci.h" +#include "virtio_ring.h" +#include +#include +#include +#include +#include +#include +#include +#include + +/* TODO: remove this warning flag when virtio-net is done */ +#pragma GCC diagnostic ignored "-Wunused-but-set-variable" + +static struct virtio_net_io_reg virtio_net_regs; +static struct virtio_queue virtio_queues[2]; +struct virtio_vq_info virtio_net_vqs[VIRTIO_NET_MAXQ - 1]; + +static unsigned char icmp_reply[] = { + /* TODO: remove icmp reply and process nic input from nic component */ +}; + +static inline int +vq_ring_ready(struct virtio_vq_info *vq) +{ + return ((vq->flags & VQ_ALLOC) == VQ_ALLOC); +} + +static inline int +vq_has_descs(struct virtio_vq_info *vq) +{ + int ret = 0; + if (vq_ring_ready(vq) && vq->last_avail != vq->avail->idx) { + if (unlikely((u16_t)((unsigned int)vq->avail->idx - vq->last_avail) > vq->qsize)) { + printc("no valid descriptor\n"); + assert(0); + } + else + ret = 1; + } + return ret; + +} + +void * +paddr_guest2host(uintptr_t gaddr, struct vmrt_vm_comp *vm) +{ + void *va = GPA2HVA(gaddr, vm); + return va; +} + +#define roundup2(x, y) (((x)+((y)-1))&(~((y)-1))) +#define mb() ({ asm volatile("mfence" ::: "memory"); (void)0; }) + +void +vq_endchains(struct vmrt_vm_vcpu *vcpu, struct virtio_vq_info *vq, int used_all_avail) +{ + u16_t event_idx, new_idx, old_idx; + int intr; + + if (unlikely(!vq || !vq->used)) + return; + + old_idx = vq->save_used; + vq->save_used = new_idx = vq->used->idx; + + intr = new_idx != old_idx && + !(vq->avail->flags & VRING_AVAIL_F_NO_INTERRUPT); + + if (intr) { + virtio_net_regs.header.ISR = 1; + /* TODO: 57 is virtio-net interrupt without io apic, 33 is with io apic */ +#if VMX_SUPPORT_POSTED_INTR + vlapic_set_intr(vcpu, 33, 0); +#else + lapic_intr_inject(vcpu, 33, 0); +#endif + } + +} + +static inline struct iovec * +rx_iov_trim(struct iovec *iov, int *niov, size_t tlen) +{ + struct iovec *riov; + + iov[0].iov_len -= tlen; + + iov[0].iov_base = (void *)((uintptr_t)iov[0].iov_base + tlen); + riov = &iov[0]; + + return riov; +} + +static void +virtio_vq_init(struct vmrt_vm_vcpu *vcpu, int nr_queue, u32_t pfn) +{ + struct virtio_vq_info *vq; + u64_t phys; + size_t size; + char *vb; + + vq = &virtio_net_vqs[nr_queue]; + vq->pfn = pfn; + phys = (u64_t)pfn << VRING_PAGE_BITS; + size = vring_size(vq->qsize, VIRTIO_PCI_VRING_ALIGN); + vb = paddr_guest2host(phys, vcpu->vm); + if (!vb) + goto error; + + /* First page(s) are descriptors... */ + vq->desc = (struct vring_desc *)vb; + vb += vq->qsize * sizeof(struct vring_desc); + + /* ... immediately followed by "avail" ring (entirely u16_t's) */ + vq->avail = (struct vring_avail *)vb; + vb += (2 + vq->qsize + 1) * sizeof(u16_t); + + /* Then it's rounded up to the next page... */ + vb = (char *)roundup2((uintptr_t)vb, VIRTIO_PCI_VRING_ALIGN); + + /* ... and the last page(s) are the used ring. */ + vq->used = (struct vring_used *)vb; + + /* Start at 0 when we use it. */ + vq->last_avail = 0; + vq->save_used = 0; + + /* Mark queue as allocated after initialization is complete. */ + mb(); + vq->flags = VQ_ALLOC; + vq->vcpu = vcpu; + + return; + +error: + vq->flags = 0; + printc("%s: vq enable failed\n", __func__); + assert(0); +} + +static inline int +_vq_record(int i, volatile struct vring_desc *vd, + struct iovec *iov, int n_iov, u16_t *flags, struct vmrt_vm_vcpu *vcpu) { + + void *host_addr; + + if (i >= n_iov) { + printc("Number of descs is more than iov slots\n"); + assert(0); + } + + host_addr = paddr_guest2host(vd->addr, vcpu->vm); + if (unlikely(!host_addr)) { + printc("Invalid host addr\n"); + assert(0); + } + iov[i].iov_base = host_addr; + iov[i].iov_len = vd->len; + if (unlikely(flags != NULL)) + flags[i] = vd->flags; + + return 0; +} + +static void +dump_packet(char *p, u16_t sz) +{ + for (int i = 0; i < sz; i++) { + if (i > 0 && (i % 8 == 0)) printc("\n"); + u8_t c = p[i]; + printc("%02x ", c); + } + printc("\n"); +} + +int +vq_getchain(struct vmrt_vm_vcpu *vcpu, struct virtio_vq_info *vq, u16_t *pidx, + struct iovec *iov, int n_iov, u16_t *flags) +{ + int i; + unsigned int ndesc, n_indir; + unsigned int idx, next; + + volatile struct vring_desc *vdir, *vindir, *vp; + /* + * Note: it's the responsibility of the guest not to + * update vq->avail->idx until all of the descriptors + * the guest has written are valid (including all their + * next fields and vd_flags). + * + * Compute (last_avail - idx) in integers mod 2**16. This is + * the number of descriptors the device has made available + * since the last time we updated vq->last_avail. + * + * We just need to do the subtraction as an unsigned int, + * then trim off excess bits. + */ + idx = vq->last_avail; + ndesc = (u16_t)((unsigned int)vq->avail->idx - idx); + if (unlikely(ndesc == 0)) + return 0; + if (unlikely(ndesc > vq->qsize)) { + printc("ndesc (%u) out of range, driver confused?\r\n", + (unsigned int)ndesc); + assert(0); + } + + /* + * Now count/parse "involved" descriptors starting from + * the head of the chain. + * + * To prevent loops, we could be more complicated and + * check whether we're re-visiting a previously visited + * index, but we just abort if the count gets excessive. + */ + *pidx = next = vq->avail->ring[idx & (vq->qsize - 1)]; + vq->last_avail++; + for (i = 0; i < VQ_MAX_DESCRIPTORS; next = vdir->next) { + if (next >= vq->qsize) { + printc("tx: descriptor index %u out of range, " + "driver confused?\r\n", + next); + assert(0); + } + vdir = &vq->desc[next]; + if (likely((vdir->flags & VRING_DESC_F_INDIRECT) == 0)) { + if (unlikely(_vq_record(i, vdir, iov, n_iov, flags, vcpu))) { + printc("mapping to host failed\r\n"); + assert(0); + } + i++; + } else { + printc("descriptor has forbidden INDIRECT flag, " + "driver confused?\r\n"); + assert(0); + } + if ((vdir->flags & VRING_DESC_F_NEXT) == 0) + return i; + } + + /* code should not come here */ + printc("descriptor loop? count > %d - driver confused?\r\n", i); + assert(0); + return -1; +} + +void +vq_relchain(struct virtio_vq_info *vq, u16_t idx, u32_t iolen) +{ + u16_t uidx, mask; + volatile struct vring_used *vuh; + volatile struct vring_used_elem *vue; + + /* + * Notes: + * - mask is N-1 where N is a power of 2 so computes x % N + * - vuh points to the "used" data shared with guest + * - vue points to the "used" ring entry we want to update + * - head is the same value we compute in vq_iovecs(). + * + * (I apologize for the two fields named idx; the + * virtio spec calls the one that vue points to, "id"...) + */ + mask = vq->qsize - 1; + vuh = vq->used; + + uidx = vuh->idx; + vue = &vuh->ring[uidx++ & mask]; + vue->id = idx; + vue->len = iolen; + vuh->idx = uidx; +} + +void +vq_retchain(struct virtio_vq_info *vq) +{ + vq->last_avail--; +} + +void +virtio_net_rcv_one_pkt(void *data, int pkt_len) +{ + struct iovec iov[VIRTIO_NET_MAXSEGS], *riov; + struct virtio_vq_info *vq; + struct vmrt_vm_vcpu *vcpu; + void *vrx; + int n; + u16_t idx; + int ret; + + vq = &virtio_net_vqs[VIRTIO_NET_RXQ]; + + vcpu = vq->vcpu; + + if (unlikely(!vq_has_descs(vq))) { + return; + } + + n = vq_getchain(vcpu, vq, &idx, iov, VIRTIO_NET_MAXSEGS, NULL); + + // if (unlikely (n < 1 || n >= VIRTIO_NET_MAXSEGS )) { + // printc("vtnet: virtio_net_tap_rx: vq_getchain = %d\n", n); + // assert(0); + // } + + vrx = iov[0].iov_base; + /* every packet needs to be proceeded by a virtio_net_rxhdr header space */ + riov = rx_iov_trim(iov, &n, sizeof(struct virtio_net_rxhdr)); + + // assert(iov[0].iov_len >= (size_t)pkt_len); + + // memcpy(iov[0].iov_base, data, pkt_len); + memcpy_fast(iov[0].iov_base, data, pkt_len); + + memset(vrx, 0, sizeof(struct virtio_net_rxhdr)); + + vq_relchain(vq, idx, pkt_len + sizeof(struct virtio_net_rxhdr)); + + vq_endchains(vcpu, vq, 1); + return; +} + +void +virtio_net_send_one_pkt(void *data, u16_t *pkt_len) +{ + struct virtio_vq_info *vq = &virtio_net_vqs[VIRTIO_NET_TXQ]; + struct iovec iov[VIRTIO_NET_MAXSEGS]; + struct vmrt_vm_vcpu *vcpu; + int i, n; + int plen, tlen; + u16_t idx; + + while (!vq_has_descs(vq)) { + *pkt_len = 0; + return; + // sched_thd_block(0); + } + vcpu = vq->vcpu; + + memset(&iov, 0, sizeof(iov)); + n = vq_getchain(vcpu, vq, &idx, iov, VIRTIO_NET_MAXSEGS, NULL); + if (unlikely(n < 1 || n >= VIRTIO_NET_MAXSEGS)) { + printc("vtnet: virtio_net_proctx: vq_getchain = %d\n", n); + assert(0); + } + + plen = 0; + tlen = iov[0].iov_len; + assert(n == 2); + + plen += iov[1].iov_len; + tlen += iov[1].iov_len; + + // memcpy(data, iov[1].iov_base, iov[1].iov_len); + memcpy_fast(data, iov[1].iov_base, iov[1].iov_len); + + *pkt_len = plen; + vq_relchain(vq, idx, tlen); + + vq_endchains(vcpu, vq, 1); + return; +} + +static void +virtio_net_outb(u32_t port_id, struct vmrt_vm_vcpu *vcpu) +{ + u8_t val = vcpu->shared_region->ax; + + switch (port_id) + { + case VIRTIO_NET_DEV_STATUS: + virtio_net_regs.header.dev_status = val; + break; + default: + VM_PANIC(vcpu); + break; + } + return; +} + +#define REAL_NIC 0 + +#if REAL_NIC +static u8_t virtio_net_mac[6] = {0x6c, 0xfe, 0x54, 0x40, 0x41, 0x01}; +#else +static u8_t virtio_net_mac[6] = {0x10, 0x10, 0x10, 0x10, 0x10, 0x13}; +#endif + +static void +virtio_net_inb(u32_t port_id, struct vmrt_vm_vcpu *vcpu) +{ + u32_t bdf = 0; + + switch (port_id) + { + case VIRTIO_NET_DEV_STATUS: + vcpu->shared_region->ax = virtio_net_regs.header.dev_status; + break; + case VIRTIO_NET_ISR: + vcpu->shared_region->ax = virtio_net_regs.header.ISR; + virtio_net_regs.header.ISR = 0; + break; + case VIRTIO_NET_STATUS: + vcpu->shared_region->ax = virtio_net_regs.config_reg.status; + break; + case VIRTIO_NET_STATUS_H: + vcpu->shared_region->ax = virtio_net_regs.config_reg.status >> 8; + break; + /* TODO: read mac address from virtio-net config space */ + case VIRTIO_NET_MAC: + vcpu->shared_region->ax = virtio_net_mac[0]; + break; + case VIRTIO_NET_MAC1: + vcpu->shared_region->ax = virtio_net_mac[1]; + break; + case VIRTIO_NET_MAC2: + vcpu->shared_region->ax = virtio_net_mac[2]; + break; + case VIRTIO_NET_MAC3: + vcpu->shared_region->ax = virtio_net_mac[3]; + break; + case VIRTIO_NET_MAC4: + vcpu->shared_region->ax = virtio_net_mac[4]; + break; + case VIRTIO_NET_MAC5: + vcpu->shared_region->ax = virtio_net_mac[5]; + break; + default: + VM_PANIC(vcpu); + break; + } +} + +static void +virtio_net_inw(u32_t port_id, struct vmrt_vm_vcpu *vcpu) +{ + switch (port_id) + { + case VIRTIO_NET_QUEUE_SIZE: + vcpu->shared_region->ax = virtio_queues[virtio_net_regs.header.queue_select].queue_sz; + break; + case VIRTIO_NET_QUEUE_SELECT: + vcpu->shared_region->ax = virtio_net_regs.header.queue_select; + break; + case VIRTIO_NET_QUEUE_NOTIFY: + VM_PANIC(vcpu); + vcpu->shared_region->ax = virtio_net_regs.header.queue_notify; + break; + default: + VM_PANIC(vcpu); + break; + } +} + +static void +virtio_net_outw(u32_t port_id, struct vmrt_vm_vcpu *vcpu) +{ + u16_t val = vcpu->shared_region->ax; + + switch (port_id) + { + case VIRTIO_NET_QUEUE_SELECT: + virtio_net_regs.header.queue_select = val; + break; + case VIRTIO_NET_QUEUE_NOTIFY: + if (val == VIRTIO_NET_TXQ) { + // sched_thd_yield(); + // sched_thd_wakeup(11); + } + virtio_net_regs.header.queue_notify = val; + break; + default: + VM_PANIC(vcpu); + break; + } +} + +static void +virtio_net_outl(u32_t port_id, struct vmrt_vm_vcpu *vcpu) +{ + u32_t val = vcpu->shared_region->ax; + u64_t tmp = val; + + switch (port_id) + { + case VIRTIO_NET_GUEST_FEATURES: + virtio_net_regs.header.guest_features = val; + break; + case VIRTIO_NET_QUEUE_ADDR: + virtio_queues[virtio_net_regs.header.queue_select].queue = (void *)tmp; + virtio_vq_init(vcpu, virtio_net_regs.header.queue_select, val); + break; + default: + VM_PANIC(vcpu); + break; + } + return; +} + +static void +virtio_net_inl(u32_t port_id, struct vmrt_vm_vcpu *vcpu) +{ + switch (port_id) + { + case VIRTIO_NET_DEV_FEATURES: + vcpu->shared_region->ax = virtio_net_regs.header.dev_features; + break; + case VIRTIO_NET_GUEST_FEATURES: + vcpu->shared_region->ax = virtio_net_regs.header.guest_features; + break; + case VIRTIO_NET_QUEUE_ADDR: + vcpu->shared_region->ax = virtio_net_regs.header.queue_addr; + break; + default: + VM_PANIC(vcpu); + break; + } +} + +void +virtio_net_handler(u16_t port, int dir, int sz, struct vmrt_vm_vcpu *vcpu) +{ + if (dir == IO_IN) { + switch (sz) + { + case IO_BYTE: + virtio_net_inb(port, vcpu); + break; + case IO_WORD: + virtio_net_inw(port, vcpu); + break; + case IO_LONG: + virtio_net_inl(port, vcpu); + break; + default: + VM_PANIC(vcpu); + } + } else { + switch (sz) + { + case IO_BYTE: + virtio_net_outb(port, vcpu); + break; + case IO_WORD: + virtio_net_outw(port, vcpu); + break; + case IO_LONG: + virtio_net_outl(port, vcpu); + break; + default: + VM_PANIC(vcpu); + } + } +} + +void +virtio_net_io_init(void) +{ + memset(&virtio_net_regs, 0, sizeof(virtio_net_regs)); + memset(&virtio_queues, 0, sizeof(virtio_queues)); + memset(&virtio_net_vqs, 0, sizeof(virtio_net_vqs)); + + virtio_net_regs.header.dev_features |= (1 << VIRTIO_NET_F_STATUS); + virtio_net_regs.header.dev_features |= (1 << VIRTIO_NET_F_MAC); + virtio_net_regs.config_reg.status = VIRTIO_NET_S_LINK_UP; + virtio_queues[0].queue_sz = VQ_MAX_DESCRIPTORS; + virtio_queues[1].queue_sz = VQ_MAX_DESCRIPTORS; + virtio_net_vqs[VIRTIO_NET_RX].qsize = VQ_MAX_DESCRIPTORS; + virtio_net_vqs[VIRTIO_NET_TX].qsize = VQ_MAX_DESCRIPTORS; +} + +struct tcp_udp_port +{ + u16_t src_port; + u16_t dst_port; +} __attribute__((packed)); + +void +virtio_tx_task(void *data) +{ + struct virtio_vq_info *vq; + struct iovec iov[VIRTIO_NET_MAXSEGS]; + struct vmrt_vm_vcpu *vcpu; + int i, n; + int plen, tlen; + u16_t idx; + char *pkt; + struct netshmem_pkt_buf *tx_obj; + shm_bm_objid_t tx_pktid; + struct nf_pkt_meta_data buf; + + struct nf_session *session = NULL; + shm_bm_t tx_shmemd = 0; + u16_t svc_id = 0; + + struct iphdr *iphdr = NULL; + struct tcp_udp_port *port; + + vq = &virtio_net_vqs[VIRTIO_NET_TXQ]; + while (1) { + while (!vq_has_descs(vq)) { + shm_bm_objid_t first_objid; + struct netshmem_pkt_buf *first_obj; + struct netshmem_pkt_pri *first_obj_pri; + struct netshmem_meta_tuple *pkt_arr; + u8_t batch_ct; + + session = get_nf_session(0); + tx_shmemd = session->tx_shmemd; + + while (nf_tx_ring_buf_dequeue(&session->nf_tx_ring_buf, &buf)) { + batch_ct = 0; + first_obj = buf.obj; + first_objid = buf.objid; + first_obj_pri = netshmem_get_pri(first_obj); + pkt_arr = (struct netshmem_meta_tuple *)&first_obj_pri->pkt_arr; + first_obj_pri->batch_len = 0; + + pkt_arr[batch_ct].obj_id = buf.objid; + pkt_arr[batch_ct].pkt_len = buf.pkt_len; + batch_ct++; + while (batch_ct < 32 && nf_tx_ring_buf_dequeue(&session->nf_tx_ring_buf, &buf)) { + pkt_arr[batch_ct].obj_id = buf.objid; + pkt_arr[batch_ct].pkt_len = buf.pkt_len; + batch_ct++; + } + first_obj_pri->batch_len = batch_ct; + // printc("nic send in tx:%d, %u\n", batch_ct, cos_thdid()); + nic_send_packet_batch(first_objid); + } + + sched_thd_yield(); + } + + vcpu = vq->vcpu; + + memset(&iov, 0, sizeof(iov)); + + n = vq_getchain(vcpu, vq, &idx, iov, VIRTIO_NET_MAXSEGS, NULL); + if (unlikely(n < 1 || n >= VIRTIO_NET_MAXSEGS)) { + printc("vtnet: virtio_net_proctx: vq_getchain = %d\n", n); + assert(0); + } + + plen = 0; + tlen = iov[0].iov_len; + assert(n == 2); + + plen += iov[1].iov_len; + tlen += iov[1].iov_len; + + pkt = iov[1].iov_base; + + iphdr = (struct iphdr *) (pkt + ETH_HLEN); + port = (struct tcp_udp_port *)((char *)pkt + ETH_HLEN + iphdr->ihl * 4); + u16_t svc_id = ntohs(port->dst_port); + + session = get_nf_session(svc_id); + + tx_shmemd = session->tx_shmemd; + if (unlikely(!tx_shmemd)) { + svc_id = 0; + session = get_nf_session(svc_id); + tx_shmemd = session->tx_shmemd; + } + + // printc("tx shmemd:%p, %d\n", tx_shmemd, svc_id); + tx_obj = shm_bm_alloc_net_pkt_buf(tx_shmemd, &tx_pktid); + // printc("tx shmemd:%p, tx_obj:%p\n", tx_shmemd, tx_obj); + + if (likely(tx_obj != NULL)){ + buf.objid = tx_pktid; + buf.pkt_len = plen; + buf.obj = tx_obj; + + // memcpy(netshmem_get_data_buf(tx_obj), pkt, plen); + memcpy_fast(netshmem_get_data_buf(tx_obj), pkt, plen); + + if ((unlikely(!nf_tx_ring_buf_enqueue(&(session->nf_tx_ring_buf), &buf)))){ + shm_bm_free_net_pkt_buf(tx_obj); + } else { + // sched_thd_wakeup(session->tx_thd); + // sync_sem_give(&session->tx_sem); + } + } else { + printc("cannot allocate objects\n"); + assert(0); + } + + vq_relchain(vq, idx, tlen); + vq_endchains(vcpu, vq, 1); + } +} diff --git a/src/components/implementation/simple_vmm/multi_vmm/devices/vpci/virtio_net_io.h b/src/components/implementation/simple_vmm/multi_vmm/devices/vpci/virtio_net_io.h new file mode 100644 index 0000000000..ba50bb2b77 --- /dev/null +++ b/src/components/implementation/simple_vmm/multi_vmm/devices/vpci/virtio_net_io.h @@ -0,0 +1,144 @@ +#pragma once + +#include +#include + +#define VIRTIO_NET_IO_ADDR 0x4000 + +#define VIRTIO_NET_DEV_FEATURES (VIRTIO_NET_IO_ADDR + 0) +#define VIRTIO_NET_GUEST_FEATURES (VIRTIO_NET_IO_ADDR + 4) +#define VIRTIO_NET_QUEUE_ADDR (VIRTIO_NET_IO_ADDR + 8) +#define VIRTIO_NET_QUEUE_SIZE (VIRTIO_NET_IO_ADDR + 12) +#define VIRTIO_NET_QUEUE_SELECT (VIRTIO_NET_IO_ADDR + 14) +#define VIRTIO_NET_QUEUE_NOTIFY (VIRTIO_NET_IO_ADDR + 16) +#define VIRTIO_NET_DEV_STATUS (VIRTIO_NET_IO_ADDR + 18) +#define VIRTIO_NET_ISR (VIRTIO_NET_IO_ADDR + 19) + +#define VIRTIO_NET_MAC (VIRTIO_NET_IO_ADDR + 20) +#define VIRTIO_NET_MAC1 (VIRTIO_NET_IO_ADDR + 21) +#define VIRTIO_NET_MAC2 (VIRTIO_NET_IO_ADDR + 22) +#define VIRTIO_NET_MAC3 (VIRTIO_NET_IO_ADDR + 23) +#define VIRTIO_NET_MAC4 (VIRTIO_NET_IO_ADDR + 24) +#define VIRTIO_NET_MAC5 (VIRTIO_NET_IO_ADDR + 25) + +#define VIRTIO_NET_STATUS (VIRTIO_NET_IO_ADDR + 26) +#define VIRTIO_NET_STATUS_H (VIRTIO_NET_IO_ADDR + 27) + +#define VIRTIO_NET_F_CSUM (0) +#define VIRTIO_NET_F_GUEST_CSUM (1) +#define VIRTIO_NET_F_MAC (5) +#define VIRTIO_NET_F_GSO (6) +#define VIRTIO_NET_F_GUEST_TSO4 (7) +#define VIRTIO_NET_F_GUEST_TSO6 (8) +#define VIRTIO_NET_F_GUEST_ECN (9) +#define VIRTIO_NET_F_GUEST_UFO (10) +#define VIRTIO_NET_F_HOST_TSO4 (11) +#define VIRTIO_NET_F_HOST_TSO6 (12) +#define VIRTIO_NET_F_HOST_ECN (13) +#define VIRTIO_NET_F_HOST_UFO (14) +#define VIRTIO_NET_F_MRG_RXBUF (15) +#define VIRTIO_NET_F_STATUS (16) +#define VIRTIO_NET_F_CTRL_VQ (17) +#define VIRTIO_NET_F_CTRL_RX (18) +#define VIRTIO_NET_F_CTRL_VLAN (19) +#define VIRTIO_NET_F_GUEST_ANNOUNCE (21) + +#define VIRTIO_NET_RINGSZ 512 +#define VIRTIO_NET_MAXSEGS 32 +#define VQ_MAX_DESCRIPTORS 512 + +struct virtio_header { + u32_t dev_features; + u32_t guest_features; + u32_t queue_addr; + u16_t queue_size; + u16_t queue_select; + u16_t queue_notify; + u8_t dev_status; + u8_t ISR; +} __attribute__((packed)); + +struct virtio_queue { + u16_t queue_sz; + void *queue; +}; + +#define VIRTIO_NET_S_LINK_UP 1 +#define VIRTIO_NET_S_ANNOUNCE 2 + +#define VIRTIO_NET_RX 0 +#define VIRTIO_NET_TX 1 + +#define VIRTIO_NET_RXQ 0 +#define VIRTIO_NET_TXQ 1 +#define VIRTIO_NET_CTLQ 2 + +#define VIRTIO_NET_MAXQ 3 + +#define VRING_PAGE_BITS 12 +#define VIRTIO_PCI_VRING_ALIGN 4096 + +#define VQ_ALLOC 0x01 /* set once we have a pfn */ +#define VQ_BROKED 0x02 + +struct virtio_net_config { + u8_t mac[6]; + u16_t status; +} __attribute__((packed)); + +struct virtio_net_io_reg { + struct virtio_header header; + struct virtio_net_config config_reg; +} __attribute__((packed)); + +// struct iovec +// { +// void *iov_base; /* Pointer to data. */ +// size_t iov_len; /* Length of data. */ +// }; + +struct virtio_vq_info { + u16_t qsize; /* size of this queue (a power of 2) */ + void (*notify)(void *, struct virtio_vq_info *); + /* called instead of notify, if not NULL */ + + u16_t num; /* the num'th queue in the virtio_base */ + + u16_t flags; /* flags (see above) */ + u16_t last_avail; /* a recent value of avail->idx */ + u16_t save_used; /* saved used->idx; see vq_endchains */ + u16_t msix_idx; /* MSI-X index, or VIRTIO_MSI_NO_VECTOR */ + + u32_t pfn; /* PFN of virt queue (not shifted!) */ + + volatile struct vring_desc *desc; + /* descriptor array */ + volatile struct vring_avail *avail; + /* the "avail" ring */ + volatile struct vring_used *used; + /* the "used" ring */ + + u32_t gpa_desc[2]; /* gpa of descriptors */ + u32_t gpa_avail[2]; /* gpa of avail_ring */ + u32_t gpa_used[2]; /* gpa of used_ring */ + int enabled; /* whether the virtqueue is enabled */ + + /* each vq is bounded to a vcpu */ + struct vmrt_vm_vcpu *vcpu; +}; + +/* + * Fixed network header size + */ +struct virtio_net_rxhdr { + u8_t vrh_flags; + u8_t vrh_gso_type; + u16_t vrh_hdr_len; + u16_t vrh_gso_size; + u16_t vrh_csum_start; + u16_t vrh_csum_offset; +} __attribute__((packed)); + +void virtio_net_handler(u16_t port, int dir, int sz, struct vmrt_vm_vcpu *vcpu); +void virtio_net_rcv_one_pkt(void *data, int pkt_len); +void virtio_net_send_one_pkt(void *data, u16_t *pkt_len); diff --git a/src/components/implementation/simple_vmm/multi_vmm/devices/vpci/virtio_net_vpci.c b/src/components/implementation/simple_vmm/multi_vmm/devices/vpci/virtio_net_vpci.c new file mode 100644 index 0000000000..c1c8846def --- /dev/null +++ b/src/components/implementation/simple_vmm/multi_vmm/devices/vpci/virtio_net_vpci.c @@ -0,0 +1,51 @@ +#include "vpci.h" + +#define VIRTIO_VENDOR_ID 0x1AF4 +#define VIRTIO_NETWORK_DEV_ID 0x1000 +#define VIRTIO_CLASS_NETWORK 0x02 +#define VIRTIO_TYPE_NET 1 + +struct vpci_config_type0 virtio_net_dev = { + .header.vendor_id = VIRTIO_VENDOR_ID, + .header.device_id = VIRTIO_NETWORK_DEV_ID, + .header.command = 0, + .header.status = 0, + .header.revision_id = 0, + .header.prog_if = 0, + .header.subclass = 0, + .header.class_code = VIRTIO_CLASS_NETWORK, + .header.cache_line_sz = 0, + .header.latency_timer = 0, + .header.header_type = PCI_HDR_TYPE_DEV, + .header.BIST = 0, + + /* Legacy virtio-net only uses bar 0, and it should be a IO bar, no capability is supported */ + .bars[0].io_bar.fixed_bit = 1, + .bars[0].io_bar.reserved = 0, + .bars[0].io_bar.base_addr = 0x1000, + + + .bars[1].raw_data = 0, + .bars[2].raw_data = 0, + .bars[3].raw_data = 0, + .bars[4].raw_data = 0, + .bars[5].raw_data = 0, + + .cardbus_cis_pointer = 0, + .subsystem_vendor_id = VIRTIO_VENDOR_ID, + .subsystem_id = VIRTIO_TYPE_NET, + .exp_rom_base = 0, + .cap_pointer = 0, + .reserved = 0, + .interrupt_line = 0, + .interrupt_pin = 0, + .min_grant = 0, + .max_lentency = 0 +}; + +void +virtio_net_dev_init(void){ + vpci_regist((struct vpci_config_space *)&virtio_net_dev, sizeof(virtio_net_dev)); + extern void virtio_net_io_init(void); + virtio_net_io_init(); +} diff --git a/src/components/implementation/simple_vmm/multi_vmm/devices/vpci/virtio_ring.h b/src/components/implementation/simple_vmm/multi_vmm/devices/vpci/virtio_ring.h new file mode 100644 index 0000000000..f03125851b --- /dev/null +++ b/src/components/implementation/simple_vmm/multi_vmm/devices/vpci/virtio_ring.h @@ -0,0 +1,260 @@ +#ifndef _LINUX_VIRTIO_RING_H +#define _LINUX_VIRTIO_RING_H +/* An interface for efficient virtio implementation, currently for use by KVM, + * but hopefully others soon. Do NOT change this since it will + * break existing servers and clients. + * + * This header is BSD licensed so anyone can use the definitions to implement + * compatible drivers/servers. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of IBM nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL IBM OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * Copyright Rusty Russell IBM Corporation 2007. */ + +typedef unsigned short int __virtio16; +typedef unsigned int __virtio32; +typedef unsigned long long __virtio64; + +typedef short int __le16; +typedef short int __be16; +typedef unsigned int __le32; +typedef unsigned int __be32; +typedef unsigned long long __le64; +typedef unsigned long long __be64; + +typedef char __s8; +typedef unsigned char __u8; + +typedef short __s16; +typedef unsigned short __u16; + +typedef int __s32; +typedef unsigned int __u32; + +typedef unsigned long int uintptr_t; + +/* This marks a buffer as continuing via the next field. */ +#define VRING_DESC_F_NEXT 1 +/* This marks a buffer as write-only (otherwise read-only). */ +#define VRING_DESC_F_WRITE 2 +/* This means the buffer contains a list of buffer descriptors. */ +#define VRING_DESC_F_INDIRECT 4 + +/* + * Mark a descriptor as available or used in packed ring. + * Notice: they are defined as shifts instead of shifted values. + */ +#define VRING_PACKED_DESC_F_AVAIL 7 +#define VRING_PACKED_DESC_F_USED 15 + +/* The Host uses this in used->flags to advise the Guest: don't kick me when + * you add a buffer. It's unreliable, so it's simply an optimization. Guest + * will still kick if it's out of buffers. */ +#define VRING_USED_F_NO_NOTIFY 1 +/* The Guest uses this in avail->flags to advise the Host: don't interrupt me + * when you consume a buffer. It's unreliable, so it's simply an + * optimization. */ +#define VRING_AVAIL_F_NO_INTERRUPT 1 + +/* Enable events in packed ring. */ +#define VRING_PACKED_EVENT_FLAG_ENABLE 0x0 +/* Disable events in packed ring. */ +#define VRING_PACKED_EVENT_FLAG_DISABLE 0x1 +/* + * Enable events for a specific descriptor in packed ring. + * (as specified by Descriptor Ring Change Event Offset/Wrap Counter). + * Only valid if VIRTIO_RING_F_EVENT_IDX has been negotiated. + */ +#define VRING_PACKED_EVENT_FLAG_DESC 0x2 + +/* + * Wrap counter bit shift in event suppression structure + * of packed ring. + */ +#define VRING_PACKED_EVENT_F_WRAP_CTR 15 + +/* We support indirect buffer descriptors */ +#define VIRTIO_RING_F_INDIRECT_DESC 28 + +/* The Guest publishes the used index for which it expects an interrupt + * at the end of the avail ring. Host should ignore the avail->flags field. */ +/* The Host publishes the avail index for which it expects a kick + * at the end of the used ring. Guest should ignore the used->flags field. */ +#define VIRTIO_RING_F_EVENT_IDX 29 + +/* Alignment requirements for vring elements. + * When using pre-virtio 1.0 layout, these fall out naturally. + */ +#define VRING_AVAIL_ALIGN_SIZE 2 +#define VRING_USED_ALIGN_SIZE 4 +#define VRING_DESC_ALIGN_SIZE 16 + +/* Virtio ring descriptors: 16 bytes. These can chain together via "next". */ +struct vring_desc { + /* Address (guest-physical). */ + __virtio64 addr; + /* Length. */ + __virtio32 len; + /* The flags as indicated above. */ + __virtio16 flags; + /* We chain unused descriptors via this, too */ + __virtio16 next; +}; + +struct vring_avail { + __virtio16 flags; + __virtio16 idx; + __virtio16 ring[]; +}; + +/* u32 is used here for ids for padding reasons. */ +struct vring_used_elem { + /* Index of start of used descriptor chain. */ + __virtio32 id; + /* Total length of the descriptor chain which was used (written to) */ + __virtio32 len; +}; + +typedef struct vring_used_elem __attribute__((aligned(VRING_USED_ALIGN_SIZE))) + vring_used_elem_t; + +struct vring_used { + __virtio16 flags; + __virtio16 idx; + vring_used_elem_t ring[]; +}; + +/* + * The ring element addresses are passed between components with different + * alignments assumptions. Thus, we might need to decrease the compiler-selected + * alignment, and so must use a typedef to make sure the aligned attribute + * actually takes hold: + * + * https://gcc.gnu.org/onlinedocs//gcc/Common-Type-Attributes.html#Common-Type-Attributes + * + * When used on a struct, or struct member, the aligned attribute can only + * increase the alignment; in order to decrease it, the packed attribute must + * be specified as well. When used as part of a typedef, the aligned attribute + * can both increase and decrease alignment, and specifying the packed + * attribute generates a warning. + */ +typedef struct vring_desc __attribute__((aligned(VRING_DESC_ALIGN_SIZE))) + vring_desc_t; +typedef struct vring_avail __attribute__((aligned(VRING_AVAIL_ALIGN_SIZE))) + vring_avail_t; +typedef struct vring_used __attribute__((aligned(VRING_USED_ALIGN_SIZE))) + vring_used_t; + +struct vring { + unsigned int num; + + vring_desc_t *desc; + + vring_avail_t *avail; + + vring_used_t *used; +}; + +#ifndef VIRTIO_RING_NO_LEGACY + +/* The standard layout for the ring is a continuous chunk of memory which looks + * like this. We assume num is a power of 2. + * + * struct vring + * { + * // The actual descriptors (16 bytes each) + * struct vring_desc desc[num]; + * + * // A ring of available descriptor heads with free-running index. + * __virtio16 avail_flags; + * __virtio16 avail_idx; + * __virtio16 available[num]; + * __virtio16 used_event_idx; + * + * // Padding to the next align boundary. + * char pad[]; + * + * // A ring of used descriptor heads with free-running index. + * __virtio16 used_flags; + * __virtio16 used_idx; + * struct vring_used_elem used[num]; + * __virtio16 avail_event_idx; + * }; + */ +/* We publish the used event index at the end of the available ring, and vice + * versa. They are at the end for backwards compatibility. */ +#define vring_used_event(vr) ((vr)->avail->ring[(vr)->num]) +#define vring_avail_event(vr) (*(__virtio16 *)&(vr)->used->ring[(vr)->num]) + +static __inline__ void vring_init(struct vring *vr, unsigned int num, void *p, + unsigned long align) +{ + vr->num = num; + vr->desc = p; + vr->avail = (struct vring_avail *)((char *)p + num * sizeof(struct vring_desc)); + vr->used = (void *)(((uintptr_t)&vr->avail->ring[num] + sizeof(__virtio16) + + align-1) & ~(align - 1)); +} + +static __inline__ unsigned vring_size(unsigned int num, unsigned long align) +{ + return ((sizeof(struct vring_desc) * num + sizeof(__virtio16) * (3 + num) + + align - 1) & ~(align - 1)) + + sizeof(__virtio16) * 3 + sizeof(struct vring_used_elem) * num; +} + +#endif /* VIRTIO_RING_NO_LEGACY */ + +/* The following is used with USED_EVENT_IDX and AVAIL_EVENT_IDX */ +/* Assuming a given event_idx value from the other side, if + * we have just incremented index from old to new_idx, + * should we trigger an event? */ +static __inline__ int vring_need_event(__u16 event_idx, __u16 new_idx, __u16 old) +{ + /* Note: Xen has similar logic for notification hold-off + * in include/xen/interface/io/ring.h with req_event and req_prod + * corresponding to event_idx + 1 and new_idx respectively. + * Note also that req_event and req_prod in Xen start at 1, + * event indexes in virtio start at 0. */ + return (__u16)(new_idx - event_idx - 1) < (__u16)(new_idx - old); +} + +struct vring_packed_desc_event { + /* Descriptor Ring Change Event Offset/Wrap Counter. */ + __le16 off_wrap; + /* Descriptor Ring Change Event Flags. */ + __le16 flags; +}; + +struct vring_packed_desc { + /* Buffer Address. */ + __le64 addr; + /* Buffer Length. */ + __le32 len; + /* Buffer ID. */ + __le16 id; + /* The flags depending on descriptor type. */ + __le16 flags; +}; +#endif /* _LINUX_VIRTIO_RING_H */ diff --git a/src/components/implementation/simple_vmm/multi_vmm/devices/vpci/vpci.c b/src/components/implementation/simple_vmm/multi_vmm/devices/vpci/vpci.c new file mode 100644 index 0000000000..e1571dc17b --- /dev/null +++ b/src/components/implementation/simple_vmm/multi_vmm/devices/vpci/vpci.c @@ -0,0 +1,316 @@ +#include +#include +#include "vpci.h" + +/* Only two are supported: one bridge pci and one virtio-net pci */ +#define MAX_VPCI_NUM 2 + +#define PCI_HOST_BRIDGE_VENDOR 0x8086 +#define PCI_HOST_BRIDGE_DEV 0x29C0 +#define PCI_CLASS_BRIDGE 0x06 +#define PCI_SUBCLASS_BRIDGE_HOST 0x00 + +struct vpci_config_space vpci_devs[MAX_VPCI_NUM]; +static u8_t free_dev = 0; + +struct vpci_config_type1 vpci_host_bridge = { + .header.vendor_id = PCI_HOST_BRIDGE_VENDOR, + .header.device_id = PCI_HOST_BRIDGE_DEV, + .header.command = 0, + .header.status = 0, + .header.revision_id = 0, + .header.prog_if = 0, + .header.subclass = PCI_SUBCLASS_BRIDGE_HOST, + .header.class_code = PCI_CLASS_BRIDGE, + .header.cache_line_sz = 0, + .header.latency_timer = 0, + .header.header_type = PCI_HDR_TYPE_BRIDGE, + .header.BIST = 0, + + .bars[0].raw_data = 0, + .bars[1].raw_data = 0, + + .primary_bus_number = 0, + .secondary_bus_number = 0, + .subordinate_bus_number = 0, + .secondary_latency_timer = 0, + .io_base = 0, + .io_limit = 0, + .secondary_status = 0, + .memory_base = 0, + .memory_limit = 0, + .prefetchable_memory_base = 0, + .prefetchable_memory_limit = 0, + .prefetchable_base_upper_32_bits = 0, + .prefetchable_limit_upper_32_bits = 0, + .io_base_upper_16_bits = 0, + .io_limit_upper_16_bits = 0, + .capability_pointer = 0, + .reserved = 0, + .expansion_rom_base_address = 0, + .interrupt_line = 0, + .interrupt_pin = 0, + .bridge_control = 0 +}; + +void +vpci_regist(struct vpci_config_space *vpci, u32_t sz) +{ + memcpy(&vpci_devs[free_dev++], vpci, sz); +} + +void +set_vpci_comm_hdr(u8_t* raw_data, u8_t reg, u32_t val) +{ + switch (reg) + { + /* TODO: implement necessary pci write emulations */ + case OFFSET_COMMAND: + break; + case OFFSET_CACHE_LINE_SZ: + break; + case OFFSET_LATENCY_TIMER: + break; + case OFFSET_STATUS: + /* Linux writes 0xFFFF to clear errors, thus ignore it */ + break; + default: + printc("trying to write RO reg:0x%x, val:0x%x", reg, val); + assert(0); + } +} + +void +set_vpci_bar(u8_t* raw_data, u8_t reg, u32_t val) +{ + u32_t bar0; + + switch (reg) + { + case OFFSET_BAR0: + bar0 = *(u32_t *)raw_data; + if (bar0 & 0x1) { /* IO bar */ + /* mask all bits that should not be writable */ + val = val & 0xFFFFC000; + val |= 0x1; + *(u32_t *)raw_data = val; + } else { /* Mem bar */ + /* Currently don't support IO bar */ + printc("no vpci bar\n"); + assert(0); + } + + break; + /* Currently only support one bar, other bars are ignored */ + case OFFSET_BAR1: + break; + case OFFSET_BAR2: + break; + case OFFSET_BAR3: + break; + case OFFSET_BAR4: + break; + case OFFSET_BAR5: + break; + default: + printc("trying to write RO reg:0x%x, val:0x%x", reg, val); + assert(0); + } +} + +void +set_vpci_host_bridge_reg(u8_t *raw_data, u8_t reg, u32_t val, u8_t sz) +{ + if (reg < OFFSET_BAR0) { + set_vpci_comm_hdr(raw_data, reg, val); + return; + } + + if (reg < OFFSET_PRIMARY_BUS_NUM) { + /* transparent bridge, ignore the write */ + return; + } + + switch (reg) + { + case OFFSET_PRIMARY_BUS_NUM: + *raw_data = (u8_t) val; + break; + case OFFSET_SECONDARY_BUS_NUMBER: + *raw_data = (u8_t) val; + break; + case OFFSET_SUBORDINATE_BUS_NUMBER: + *raw_data = (u8_t) val; + break; + case OFFSET_SECONDARY_LATENCY_TIMER: + /* Currently ignore this */ + break; + case OFFSET_IO_BASE: + /* this bridge won't support IO base */ + break; + case OFFSET_IO_LIMIT: + /* this bridge won't support IO base */ + assert(0); + break; + case OFFSET_SECONDARY_STATUS: + assert(0); + break; + case OFFSET_MEMORY_BASE: + /* Currently ignore this */ + break; + case OFFSET_MEMORY_LIMIT: + assert(0); + break; + case OFFSET_PREFETCHABLE_MEMORY_BASE: + /* Currently ignore this */ + break; + case OFFSET_PREFETCHABLE_MEMORY_LIMIT: + printc("trying to write RO reg:0x%x, val:0x%x", reg, val); + assert(0); + break; + case OFFSET_PREFETCHABLE_BASE_UPPER_32_BITS: + /* Currently ignore this */ + break; + case OFFSET_PREFETCHABLE_LIMIT_UPPER_32_BITS: + /* Currently ignore this */ + break; + case OFFSET_IO_BASE_UPPER_16_BITS: + /* Currently ignore this */ + break; + case OFFSET_IO_LIMIT_UPPER_16_BITS: + assert(0); + break; + case OFFSET_CAPABILITY_POINTER: + assert(0); + break; + case OFFSET_EXPANSION_ROM_BASE_ADDRESS: + /* Ingore this, we don't support EXP ROM */ + break; + case OFFSET_INTERRUPT_LINE: + assert(0); + break; + case OFFSET_INTERRUPT_PIN: + assert(0); + break; + case OFFSET_BRIDGE_CONTROL: + /* Currently ignore this */ + break; + default: + assert(0); + } +} + +void +set_vpci_dev_reg(u8_t* raw_data, u8_t reg, u32_t val, u8_t sz) +{ + if (reg < OFFSET_BAR0) { + set_vpci_comm_hdr(raw_data, reg, val); + return; + } + + if (reg < OFFSET_CARDBUS_CIS_POINTER) { + set_vpci_bar(raw_data, reg, val); + return; + } + switch (reg) + { + case OFFSET_CARDBUS_CIS_POINTER: + assert(0); + break; + case OFFSET_SUBSYSTEM_VENDOR_ID: + assert(0); + break; + case OFFSET_SUBSYSTEM_ID: + assert(0); + break; + case OFFSET_EXP_ROM_BASE: + /* Currently ignore this */ + break; + case OFFSET_CAP_POINTER: + assert(0); + break; + case OFFSET_RESERVED: + assert(0); + break; + case OFFSET_INTERRUPT_LINE: + assert(0); + break; + case OFFSET_INTERRUPT_PIN: + assert(0); + break; + case OFFSET_MIN_GRANT: + assert(0); + break; + case OFFSET_MAX_LENTENCY: + assert(0); + break; + default: + assert(0); + } +} + +void +set_vpci_reg(u32_t bdf, u32_t val, u8_t idx, u8_t sz) +{ + struct vpci_bdf vbdf; + u8_t index; + struct vpci_config_space *vpci; + u8_t *raw_data; + u8_t reg; + + assert(idx < 4 && sz > 0 && sz < 4); + + memcpy(&vbdf, &bdf, sizeof(vbdf)); + + index = vbdf.bus_num + vbdf.dev_num; + if (vbdf.bus_num > 0 || vbdf.dev_num > 1) return; + + vpci = &vpci_devs[index]; + + raw_data = (u8_t *)(vpci) + vbdf.reg_offset; + + raw_data += idx; + reg = vbdf.reg_offset + idx; + + switch (index) + { + case 0: + /* Process host bridge */ + set_vpci_host_bridge_reg(raw_data, reg, val, sz); + break; + + case 1: + /* Process with device */ + set_vpci_dev_reg(raw_data, reg, val, sz); + break; + default: + assert(0); + } +} + +u32_t +get_vpci_reg(u32_t bdf) +{ + struct vpci_bdf vbdf; + struct vpci_config_space *vpci; + u8_t index; + + memcpy(&vbdf, &bdf, sizeof(vbdf)); + index = vbdf.bus_num + vbdf.dev_num; + + if (vbdf.bus_num > 0 || vbdf.dev_num > 1) return 0XFFFFFFFF; + + vpci = &vpci_devs[index]; + + return *(u32_t *)((char *)(vpci) + vbdf.reg_offset); +} + +extern void virtio_net_dev_init(void); + +static void __attribute__((constructor)) +init(void) +{ + memset(&vpci_devs, 0, sizeof(vpci_devs)); + vpci_regist((struct vpci_config_space *)&vpci_host_bridge, sizeof(vpci_host_bridge)); + virtio_net_dev_init(); +} diff --git a/src/components/implementation/simple_vmm/multi_vmm/devices/vpci/vpci.h b/src/components/implementation/simple_vmm/multi_vmm/devices/vpci/vpci.h new file mode 100644 index 0000000000..6bfcdf004b --- /dev/null +++ b/src/components/implementation/simple_vmm/multi_vmm/devices/vpci/vpci.h @@ -0,0 +1,180 @@ +#pragma once + +#include +#include + +#define VPCI_CONFIG_ADDRESS 0xCF8 +#define VPCI_CONFIG_DATA0 0xCFC +#define VPCI_CONFIG_DATA1 0xCFD +#define VPCI_CONFIG_DATA2 0xCFE +#define VPCI_CONFIG_DATA3 0xCFF +#define VPCI_MECHANISM_CONTROL_REG 0xCFB + +#define VPCI_MAX_CONFIG_SPACE_SZ 256 + +#define OFFSET_VENDOR_ID 0x00 +#define OFFSET_DEVICE_ID 0x02 +#define OFFSET_COMMAND 0x04 +#define OFFSET_STATUS 0x06 +#define OFFSET_REVISION_ID 0x08 +#define OFFSET_PROG_IF 0x09 +#define OFFSET_SUBCLASS 0x0A +#define OFFSET_CLASS_CODE 0x0B +#define OFFSET_CACHE_LINE_SZ 0x0C +#define OFFSET_LATENCY_TIMER 0x0D +#define OFFSET_HEADER 0x0E +#define OFFSET_BIST 0x0F + +#define OFFSET_BAR0 0x10 +#define OFFSET_BAR1 0x14 +#define OFFSET_BAR2 0x18 +#define OFFSET_BAR3 0x1C +#define OFFSET_BAR4 0x20 +#define OFFSET_BAR5 0x24 + +#define OFFSET_PRIMARY_BUS_NUM 0x18 +#define OFFSET_SECONDARY_BUS_NUMBER 0x19 +#define OFFSET_SUBORDINATE_BUS_NUMBER 0x1A +#define OFFSET_SECONDARY_LATENCY_TIMER 0x1B +#define OFFSET_IO_BASE 0x1C +#define OFFSET_IO_LIMIT 0x1D +#define OFFSET_SECONDARY_STATUS 0x1E +#define OFFSET_MEMORY_BASE 0x20 +#define OFFSET_MEMORY_LIMIT 0x22 +#define OFFSET_PREFETCHABLE_MEMORY_BASE 0x24 +#define OFFSET_PREFETCHABLE_MEMORY_LIMIT 0x26 +#define OFFSET_PREFETCHABLE_BASE_UPPER_32_BITS 0x28 +#define OFFSET_PREFETCHABLE_LIMIT_UPPER_32_BITS 0x2C +#define OFFSET_IO_BASE_UPPER_16_BITS 0x30 +#define OFFSET_IO_LIMIT_UPPER_16_BITS 0x32 +#define OFFSET_CAPABILITY_POINTER 0x34 +#define OFFSET_EXPANSION_ROM_BASE_ADDRESS 0x38 +#define OFFSET_INTERRUPT_LINE 0x3C +#define OFFSET_INTERRUPT_PIN 0x3D +#define OFFSET_BRIDGE_CONTROL 0x3E + +#define OFFSET_CARDBUS_CIS_POINTER 0x28 +#define OFFSET_SUBSYSTEM_VENDOR_ID 0x2C +#define OFFSET_SUBSYSTEM_ID 0x2E +#define OFFSET_EXP_ROM_BASE 0x30 +#define OFFSET_CAP_POINTER 0x34 +#define OFFSET_RESERVED 0x38 +#define OFFSET_MIN_GRANT 0x3E +#define OFFSET_MAX_LENTENCY 0x3F + +#define PCI_HDR_TYPE_BRIDGE 0x01 +#define PCI_HDR_TYPE_DEV 0x00 + +struct vpci_common_header { + u16_t vendor_id; + u16_t device_id; + u16_t command; + u16_t status; + u8_t revision_id; + u8_t prog_if; + u8_t subclass; + u8_t class_code; + u8_t cache_line_sz; + u8_t latency_timer; + + union + { + u8_t header_type:7; + u8_t MF:1; + u8_t header; + }; + + union + { + u8_t completion_code:4; + u8_t reserved:2; + u8_t Start_BIST:1; + u8_t BIST_capable:1; + u8_t BIST; + }; +} __attribute__((packed)); + +struct mem_bar { + u32_t fixed_bit:1; + u32_t type:2; + u32_t prefetchable:1; + /* Needs to be 16-byte aligned */ + u32_t base_addr:28; +} __attribute__((packed)); + +struct io_bar { + u32_t fixed_bit:1; + u32_t reserved:1; + /* Needs to be 4-byte aligned */ + u32_t base_addr:30; +} __attribute__((packed)); + +struct vpci_bar { + union + { + u32_t raw_data; + struct mem_bar mem_bar; + struct io_bar io_bar; + }; +} __attribute__((packed)); + +#define PCI_TYPE0_BAR_NUM 6 +#define PCI_TYPE1_BAR_NUM 2 + +struct vpci_config_type0 { + struct vpci_common_header header; + struct vpci_bar bars[PCI_TYPE0_BAR_NUM]; + u32_t cardbus_cis_pointer; + u16_t subsystem_vendor_id; + u16_t subsystem_id; + u32_t exp_rom_base; + u32_t cap_pointer; + u32_t reserved; + u8_t interrupt_line; + u8_t interrupt_pin; + u8_t min_grant; + u8_t max_lentency; +} __attribute__((packed)); + +struct vpci_config_type1 { + struct vpci_common_header header; + struct vpci_bar bars[PCI_TYPE1_BAR_NUM]; + u8_t primary_bus_number; + u8_t secondary_bus_number; + u8_t subordinate_bus_number; + u8_t secondary_latency_timer; + u8_t io_base; + u8_t io_limit; + u16_t secondary_status; + u16_t memory_base; + u16_t memory_limit; + u16_t prefetchable_memory_base; + u16_t prefetchable_memory_limit; + u32_t prefetchable_base_upper_32_bits; + u32_t prefetchable_limit_upper_32_bits; + u16_t io_base_upper_16_bits; + u16_t io_limit_upper_16_bits; + u32_t capability_pointer:8; + u32_t reserved:24; + u32_t expansion_rom_base_address; + u8_t interrupt_line; + u8_t interrupt_pin; + u16_t bridge_control; +} __attribute__((packed)); + +struct vpci_config_space { + struct vpci_common_header header; + char data[VPCI_MAX_CONFIG_SPACE_SZ - sizeof(struct vpci_common_header)]; +} __attribute__((packed)); + +struct vpci_bdf { + u8_t reg_offset; + u8_t func_num:3; + u8_t dev_num:5; + u8_t bus_num; + u8_t resverd:7; + u8_t enable_bit:1; +}; + +void vpci_handler(u16_t port, int dir, int sz, struct vmrt_vm_vcpu *vcpu); +void vpci_regist(struct vpci_config_space *vpci, u32_t sz); diff --git a/src/components/implementation/simple_vmm/multi_vmm/devices/vpci/vpci_io.c b/src/components/implementation/simple_vmm/multi_vmm/devices/vpci/vpci_io.c new file mode 100644 index 0000000000..98667e1999 --- /dev/null +++ b/src/components/implementation/simple_vmm/multi_vmm/devices/vpci/vpci_io.c @@ -0,0 +1,191 @@ +#include +#include +#include +#include "vpci.h" + +static u32_t curr_bdf = 0; + +extern u32_t get_vpci_reg(u32_t bdf); +extern void set_vpci_reg(u32_t bdf, u32_t val, u8_t idx, u8_t sz); + +static void +vpci_outb(u32_t port_id, struct vmrt_vm_vcpu *vcpu) +{ + u8_t val = vcpu->shared_region->ax; + + switch (port_id) + { + case VPCI_MECHANISM_CONTROL_REG: + /* This is the register to configure the PCI access mecanism, we only support type 1 which is commonly used */ + assert(val == 0x1); + break; + case VPCI_CONFIG_DATA0: + set_vpci_reg(curr_bdf, val, 0, 1); + break; + case VPCI_CONFIG_DATA1: + set_vpci_reg(curr_bdf, val, 1, 1); + break; + case VPCI_CONFIG_DATA2: + set_vpci_reg(curr_bdf, val, 2, 1); + break; + case VPCI_CONFIG_DATA3: + set_vpci_reg(curr_bdf, val, 3, 1); + break; + default: + VM_PANIC(vcpu); + break; + } + return; +} + +static void +vpci_inb(u32_t port_id, struct vmrt_vm_vcpu *vcpu) +{ + u32_t bdf = 0; + + switch (port_id) + { + case VPCI_MECHANISM_CONTROL_REG: + vcpu->shared_region->ax = 1; + break; + case VPCI_CONFIG_DATA0: + bdf = get_vpci_reg(curr_bdf); + vcpu->shared_region->ax = (u8_t)bdf; + break; + case VPCI_CONFIG_DATA1: + bdf = get_vpci_reg(curr_bdf); + vcpu->shared_region->ax = (u8_t)(bdf >> 8); + break; + case VPCI_CONFIG_DATA2: + bdf = get_vpci_reg(curr_bdf); + vcpu->shared_region->ax = (u8_t)(bdf >> 16); + break; + case VPCI_CONFIG_DATA3: + bdf = get_vpci_reg(curr_bdf); + vcpu->shared_region->ax = (u8_t)(bdf >> 24); + break; + default: + VM_PANIC(vcpu); + break; + } + + return; +} + +static void +vpci_inw(u32_t port_id, struct vmrt_vm_vcpu *vcpu) +{ + u32_t bdf = 0; + + switch (port_id) + { + case VPCI_CONFIG_DATA0: + bdf = get_vpci_reg(curr_bdf); + vcpu->shared_region->ax = (u16_t)bdf; + break; + case VPCI_CONFIG_DATA2: + bdf = get_vpci_reg(curr_bdf); + vcpu->shared_region->ax = (u16_t)(bdf>>16); + break; + default: + VM_PANIC(vcpu); + break; + } + + return; +} + +static void +vpci_outw(u32_t port_id, struct vmrt_vm_vcpu *vcpu) +{ + u16_t val = vcpu->shared_region->ax; + + switch (port_id) + { + case VPCI_CONFIG_DATA0: + set_vpci_reg(curr_bdf, val, 0, 2); + break; + case VPCI_CONFIG_DATA2: + set_vpci_reg(curr_bdf, val, 2, 2); + break; + default: + VM_PANIC(vcpu); + break; + } + + return; +} + +static void +vpci_outl(u32_t port_id, struct vmrt_vm_vcpu *vcpu) +{ + u32_t val = vcpu->shared_region->ax; + + switch (port_id) + { + case VPCI_CONFIG_ADDRESS: + curr_bdf = val; + break; + case VPCI_CONFIG_DATA0: + set_vpci_reg(curr_bdf, val, 0, 3); + break; + default: + VM_PANIC(vcpu); + break; + } + return; +} + +static u32_t +vpci_inl(u32_t port_id, struct vmrt_vm_vcpu *vcpu) +{ + switch (port_id) + { + case VPCI_CONFIG_DATA0: + vcpu->shared_region->ax = get_vpci_reg(curr_bdf); + break; + case VPCI_CONFIG_ADDRESS: + vcpu->shared_region->ax = curr_bdf; + break; + default: + VM_PANIC(vcpu); + break; + } + return 0; +} + +void +vpci_handler(u16_t port, int dir, int sz, struct vmrt_vm_vcpu *vcpu) +{ + if (dir == IO_IN) { + switch (sz) + { + case IO_BYTE: + vpci_inb(port, vcpu); + break; + case IO_WORD: + vpci_inw(port, vcpu); + break; + case IO_LONG: + vpci_inl(port, vcpu); + break; + default: + VM_PANIC(vcpu); + } + } else { + switch (sz) + { + case IO_BYTE: + vpci_outb(port, vcpu); + break; + case IO_WORD: + vpci_outw(port, vcpu); + break; + case IO_LONG: + vpci_outl(port, vcpu); + break; + default: + VM_PANIC(vcpu); + } + } +} diff --git a/src/components/implementation/simple_vmm/multi_vmm/devices/vpic/vpic.c b/src/components/implementation/simple_vmm/multi_vmm/devices/vpic/vpic.c new file mode 100644 index 0000000000..f80471d528 --- /dev/null +++ b/src/components/implementation/simple_vmm/multi_vmm/devices/vpic/vpic.c @@ -0,0 +1,109 @@ +#include +#include +#include +#include "vpic.h" + +/* TODO: implement necessary functions needed by VM */ +struct chip_8259 { + u8_t master_cmd; + u8_t master_data; + u8_t is_master_init; + u8_t master_offset; + + u8_t slave_cmd; + u8_t slave_data; + u8_t is_slave_init; + u8_t slave_offset; + + u8_t interrupt_pending; +}; + +static struct chip_8259 chip; + +static u8_t pic_elcr1 = 0, pic_elcr2 = 0; + +void +vpic_handler(u16_t port, int dir, int sz, struct vmrt_vm_vcpu *vcpu) +{ + assert(sz == IO_BYTE); + if (dir == IO_IN) { + switch (port) + { + case PIC_MASTER_DATA_PORT: + vcpu->shared_region->ax = chip.master_data; + break; + case PIC_SLAVE_DATA_PORT: + vcpu->shared_region->ax = chip.slave_data; + break; + case PIC_MASTER_CMD_PORT: + vcpu->shared_region->ax = chip.master_cmd; + break; + case PIC_SLAVE_CMD_PORT: + vcpu->shared_region->ax = chip.slave_cmd; + break; + case PIC_ELCR1: + vcpu->shared_region->ax = pic_elcr1; + break; + case PIC_ELCR2: + vcpu->shared_region->ax = pic_elcr2; + break; + default: + printc("vpic_handler: port: 0x%x, dir: %d\n", port, dir); + VM_PANIC(vcpu); + break; + } + } else { + u8_t val = vcpu->shared_region->ax; + switch (port) + { + case PIC_MASTER_CMD_PORT: + chip.master_cmd = val; + if (chip.master_cmd & ICW1_INIT) { + chip.is_master_init = 1; + } + if (chip.master_cmd == PIC_EOI) { + chip.interrupt_pending = 0; + } + break; + case PIC_MASTER_DATA_PORT: + chip.master_data = val; + if (chip.is_master_init) { + chip.master_offset = chip.master_data; + chip.is_master_init = 0; + } + break; + case PIC_SLAVE_CMD_PORT: + chip.slave_cmd = val; + if (chip.slave_cmd & ICW1_INIT) { + chip.is_slave_init = 1; + } + if (chip.slave_cmd == PIC_EOI) { + chip.interrupt_pending = 0; + } + break; + case PIC_SLAVE_DATA_PORT: + chip.slave_data = val; + if (chip.is_slave_init) { + chip.slave_offset = chip.slave_data; + chip.is_slave_init = 0; + } + break; + case PIC_ELCR1: + pic_elcr1 = val; + break; + case PIC_ELCR2: + pic_elcr2 = val; + break; + default: + assert(0); + break; + } + + } +} + +static void __attribute__((constructor)) +init(void) +{ + memset(&chip, 0, sizeof(chip)); +} diff --git a/src/components/implementation/simple_vmm/multi_vmm/devices/vpic/vpic.h b/src/components/implementation/simple_vmm/multi_vmm/devices/vpic/vpic.h new file mode 100644 index 0000000000..a7001a6b52 --- /dev/null +++ b/src/components/implementation/simple_vmm/multi_vmm/devices/vpic/vpic.h @@ -0,0 +1,24 @@ +#pragma once + +#define PIC_MASTER_CMD_PORT 0x20 +#define PIC_MASTER_DATA_PORT 0x21 +#define PIC_SLAVE_CMD_PORT 0XA0 +#define PIC_SLAVE_DATA_PORT 0XA1 + +#define ICW1_ICW4 0x01 +#define ICW1_SINGLE 0x02 +#define ICW1_INTERVAL4 0x04 +#define ICW1_LEVEL 0x08 +#define ICW1_INIT 0x10 + +#define ICW4_8086 0x01 +#define ICW4_AUTO 0x02 +#define ICW4_BUF_SLAVE 0x08 +#define ICW4_BUF_MASTER 0x0C +#define ICW4_SFNM 0x10 + +#define PIC_EOI 0x20 +#define PIC_ELCR1 0x4d0 +#define PIC_ELCR2 0x4d1 + +void vpic_handler(u16_t port, int dir, int sz, struct vmrt_vm_vcpu *vcpu); diff --git a/src/components/implementation/simple_vmm/multi_vmm/devices/vps2/vps2.c b/src/components/implementation/simple_vmm/multi_vmm/devices/vps2/vps2.c new file mode 100644 index 0000000000..52eb9895b5 --- /dev/null +++ b/src/components/implementation/simple_vmm/multi_vmm/devices/vps2/vps2.c @@ -0,0 +1,47 @@ +#include +#include +#include +#include "vps2.h" + +static u8_t ps2_porta_data[0x0F]; +static u8_t ps2_portb_data[0x0F]; + +void +ps2_handler(u16_t port, int dir, int sz, struct vmrt_vm_vcpu *vcpu) +{ + assert(port == PS2_CONTROL_PORT_A || port == PS2_CONTROL_PORT_B); + assert(sz == IO_BYTE); + + if (dir == IO_IN) { + switch (port) + { + case PS2_CONTROL_PORT_A: + vcpu->shared_region->ax = ps2_porta_data[port - 0x90]; + break; + default: + VM_PANIC(vcpu); + break; + } + } else if (dir == IO_OUT) { + switch (port) + { + case PS2_CONTROL_PORT_A: + ps2_porta_data[port - 0x90] = (u8_t)vcpu->shared_region->ax; + break; + default: + VM_PANIC(vcpu); + break; + } + } else { + VM_PANIC(vcpu); + } + + return; +} + +static void __attribute__((constructor)) +init(void) +{ + memset(&ps2_porta_data, 0, sizeof(ps2_porta_data)); + memset(&ps2_portb_data, 0, sizeof(ps2_portb_data)); +} diff --git a/src/components/implementation/simple_vmm/multi_vmm/devices/vps2/vps2.h b/src/components/implementation/simple_vmm/multi_vmm/devices/vps2/vps2.h new file mode 100644 index 0000000000..971009a319 --- /dev/null +++ b/src/components/implementation/simple_vmm/multi_vmm/devices/vps2/vps2.h @@ -0,0 +1,6 @@ +#pragma once + +/* PS/2 system control port A (port B is at 0061) */ +#define PS2_CONTROL_PORT_A 0x92 +#define PS2_CONTROL_PORT_B 0x61 +void ps2_handler(u16_t port, int dir, int sz, struct vmrt_vm_vcpu *vcpu); diff --git a/src/components/implementation/simple_vmm/multi_vmm/devices/vrtc/vrtc.c b/src/components/implementation/simple_vmm/multi_vmm/devices/vrtc/vrtc.c new file mode 100644 index 0000000000..c971cef94e --- /dev/null +++ b/src/components/implementation/simple_vmm/multi_vmm/devices/vrtc/vrtc.c @@ -0,0 +1,58 @@ +#include +#include +#include +#include "vrtc.h" + +/* NOTE: this is just to emulate those data indexed by the CMOS data adress, the functionality of rtc is not fully implemented */ +static u8_t rtc_data_address[0x1A]; +static u8_t curr_data_addr; + +void +vrtc_handler(u16_t port, int dir, int sz, struct vmrt_vm_vcpu *vcpu) +{ + assert(sz == IO_BYTE); + if (dir == IO_IN) { + switch (port) + { + case CMOS_CMD_PORT: + assert(0); + break;; + case CMOS_DATA_PORT: + vcpu->shared_region->ax = rtc_data_address[curr_data_addr]; + break; + default: + assert(0); + break; + } + } else { + u8_t val = vcpu->shared_region->ax; + switch (port) + { + case CMOS_CMD_PORT: + if (val & 0x80) { + printc("NMI disabled\n"); + } else { + printc("NMI enabled\n"); + } + curr_data_addr = val & 0x7f; + if (curr_data_addr == 0x0f) { + printc("shutdown status byte is set now\n"); + } else { + /* NOTE: do nothing and don't include full functionality */ + } + break; + case CMOS_DATA_PORT: + break; + default: + assert(0); + break; + } + + } +} + +static void __attribute__((constructor)) +init(void) +{ + memset(&rtc_data_address, 0, sizeof(rtc_data_address)); +} diff --git a/src/components/implementation/simple_vmm/multi_vmm/devices/vrtc/vrtc.h b/src/components/implementation/simple_vmm/multi_vmm/devices/vrtc/vrtc.h new file mode 100644 index 0000000000..78074feba9 --- /dev/null +++ b/src/components/implementation/simple_vmm/multi_vmm/devices/vrtc/vrtc.h @@ -0,0 +1,7 @@ +#pragma once + +#define CMOS_CMD_PORT 0x70 +#define CMOS_DATA_PORT 0x71 + +void +vrtc_handler(u16_t port, int dir, int sz, struct vmrt_vm_vcpu *vcpu); diff --git a/src/components/implementation/simple_vmm/multi_vmm/fast_memcpy.h b/src/components/implementation/simple_vmm/multi_vmm/fast_memcpy.h new file mode 100644 index 0000000000..ddd282d4ba --- /dev/null +++ b/src/components/implementation/simple_vmm/multi_vmm/fast_memcpy.h @@ -0,0 +1,689 @@ +//===================================================================== +// +// FastMemcpy.c - skywind3000@163.com, 2015 +// +// feature: +// 50% speed up in avg. vs standard memcpy (tested in vc2012/gcc5.1) +// +//===================================================================== +#ifndef __FAST_MEMCPY_H__ +#define __FAST_MEMCPY_H__ + +#include +#include +#include + + +//--------------------------------------------------------------------- +// force inline for compilers +//--------------------------------------------------------------------- +#ifndef INLINE +#ifdef __GNUC__ +#if (__GNUC__ > 3) || ((__GNUC__ == 3) && (__GNUC_MINOR__ >= 1)) + #define INLINE __inline__ __attribute__((always_inline)) +#else + #define INLINE __inline__ +#endif +#elif defined(_MSC_VER) + #define INLINE __forceinline +#elif (defined(__BORLANDC__) || defined(__WATCOMC__)) + #define INLINE __inline +#else + #define INLINE +#endif +#endif + + + +//--------------------------------------------------------------------- +// fast copy for different sizes +//--------------------------------------------------------------------- +static INLINE void memcpy_sse2_16(void *dst, const void *src) { + __m128i m0 = _mm_loadu_si128(((const __m128i*)src) + 0); + _mm_storeu_si128(((__m128i*)dst) + 0, m0); +} + +static INLINE void memcpy_sse2_32(void *dst, const void *src) { + __m128i m0 = _mm_loadu_si128(((const __m128i*)src) + 0); + __m128i m1 = _mm_loadu_si128(((const __m128i*)src) + 1); + _mm_storeu_si128(((__m128i*)dst) + 0, m0); + _mm_storeu_si128(((__m128i*)dst) + 1, m1); +} + +static INLINE void memcpy_sse2_64(void *dst, const void *src) { + __m128i m0 = _mm_loadu_si128(((const __m128i*)src) + 0); + __m128i m1 = _mm_loadu_si128(((const __m128i*)src) + 1); + __m128i m2 = _mm_loadu_si128(((const __m128i*)src) + 2); + __m128i m3 = _mm_loadu_si128(((const __m128i*)src) + 3); + _mm_storeu_si128(((__m128i*)dst) + 0, m0); + _mm_storeu_si128(((__m128i*)dst) + 1, m1); + _mm_storeu_si128(((__m128i*)dst) + 2, m2); + _mm_storeu_si128(((__m128i*)dst) + 3, m3); +} + +static INLINE void memcpy_sse2_128(void *dst, const void *src) { + __m128i m0 = _mm_loadu_si128(((const __m128i*)src) + 0); + __m128i m1 = _mm_loadu_si128(((const __m128i*)src) + 1); + __m128i m2 = _mm_loadu_si128(((const __m128i*)src) + 2); + __m128i m3 = _mm_loadu_si128(((const __m128i*)src) + 3); + __m128i m4 = _mm_loadu_si128(((const __m128i*)src) + 4); + __m128i m5 = _mm_loadu_si128(((const __m128i*)src) + 5); + __m128i m6 = _mm_loadu_si128(((const __m128i*)src) + 6); + __m128i m7 = _mm_loadu_si128(((const __m128i*)src) + 7); + _mm_storeu_si128(((__m128i*)dst) + 0, m0); + _mm_storeu_si128(((__m128i*)dst) + 1, m1); + _mm_storeu_si128(((__m128i*)dst) + 2, m2); + _mm_storeu_si128(((__m128i*)dst) + 3, m3); + _mm_storeu_si128(((__m128i*)dst) + 4, m4); + _mm_storeu_si128(((__m128i*)dst) + 5, m5); + _mm_storeu_si128(((__m128i*)dst) + 6, m6); + _mm_storeu_si128(((__m128i*)dst) + 7, m7); +} + + +//--------------------------------------------------------------------- +// tiny memory copy with jump table optimized +//--------------------------------------------------------------------- +static INLINE void *memcpy_tiny(void *dst, const void *src, size_t size) { + unsigned char *dd = ((unsigned char*)dst) + size; + const unsigned char *ss = ((const unsigned char*)src) + size; + + switch (size) { + case 64: + memcpy_sse2_64(dd - 64, ss - 64); + case 0: + break; + + case 65: + memcpy_sse2_64(dd - 65, ss - 65); + case 1: + dd[-1] = ss[-1]; + break; + + case 66: + memcpy_sse2_64(dd - 66, ss - 66); + case 2: + *((uint16_t*)(dd - 2)) = *((uint16_t*)(ss - 2)); + break; + + case 67: + memcpy_sse2_64(dd - 67, ss - 67); + case 3: + *((uint16_t*)(dd - 3)) = *((uint16_t*)(ss - 3)); + dd[-1] = ss[-1]; + break; + + case 68: + memcpy_sse2_64(dd - 68, ss - 68); + case 4: + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 69: + memcpy_sse2_64(dd - 69, ss - 69); + case 5: + *((uint32_t*)(dd - 5)) = *((uint32_t*)(ss - 5)); + dd[-1] = ss[-1]; + break; + + case 70: + memcpy_sse2_64(dd - 70, ss - 70); + case 6: + *((uint32_t*)(dd - 6)) = *((uint32_t*)(ss - 6)); + *((uint16_t*)(dd - 2)) = *((uint16_t*)(ss - 2)); + break; + + case 71: + memcpy_sse2_64(dd - 71, ss - 71); + case 7: + *((uint32_t*)(dd - 7)) = *((uint32_t*)(ss - 7)); + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 72: + memcpy_sse2_64(dd - 72, ss - 72); + case 8: + *((uint64_t*)(dd - 8)) = *((uint64_t*)(ss - 8)); + break; + + case 73: + memcpy_sse2_64(dd - 73, ss - 73); + case 9: + *((uint64_t*)(dd - 9)) = *((uint64_t*)(ss - 9)); + dd[-1] = ss[-1]; + break; + + case 74: + memcpy_sse2_64(dd - 74, ss - 74); + case 10: + *((uint64_t*)(dd - 10)) = *((uint64_t*)(ss - 10)); + *((uint16_t*)(dd - 2)) = *((uint16_t*)(ss - 2)); + break; + + case 75: + memcpy_sse2_64(dd - 75, ss - 75); + case 11: + *((uint64_t*)(dd - 11)) = *((uint64_t*)(ss - 11)); + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 76: + memcpy_sse2_64(dd - 76, ss - 76); + case 12: + *((uint64_t*)(dd - 12)) = *((uint64_t*)(ss - 12)); + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 77: + memcpy_sse2_64(dd - 77, ss - 77); + case 13: + *((uint64_t*)(dd - 13)) = *((uint64_t*)(ss - 13)); + *((uint32_t*)(dd - 5)) = *((uint32_t*)(ss - 5)); + dd[-1] = ss[-1]; + break; + + case 78: + memcpy_sse2_64(dd - 78, ss - 78); + case 14: + *((uint64_t*)(dd - 14)) = *((uint64_t*)(ss - 14)); + *((uint64_t*)(dd - 8)) = *((uint64_t*)(ss - 8)); + break; + + case 79: + memcpy_sse2_64(dd - 79, ss - 79); + case 15: + *((uint64_t*)(dd - 15)) = *((uint64_t*)(ss - 15)); + *((uint64_t*)(dd - 8)) = *((uint64_t*)(ss - 8)); + break; + + case 80: + memcpy_sse2_64(dd - 80, ss - 80); + case 16: + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 81: + memcpy_sse2_64(dd - 81, ss - 81); + case 17: + memcpy_sse2_16(dd - 17, ss - 17); + dd[-1] = ss[-1]; + break; + + case 82: + memcpy_sse2_64(dd - 82, ss - 82); + case 18: + memcpy_sse2_16(dd - 18, ss - 18); + *((uint16_t*)(dd - 2)) = *((uint16_t*)(ss - 2)); + break; + + case 83: + memcpy_sse2_64(dd - 83, ss - 83); + case 19: + memcpy_sse2_16(dd - 19, ss - 19); + *((uint16_t*)(dd - 3)) = *((uint16_t*)(ss - 3)); + dd[-1] = ss[-1]; + break; + + case 84: + memcpy_sse2_64(dd - 84, ss - 84); + case 20: + memcpy_sse2_16(dd - 20, ss - 20); + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 85: + memcpy_sse2_64(dd - 85, ss - 85); + case 21: + memcpy_sse2_16(dd - 21, ss - 21); + *((uint32_t*)(dd - 5)) = *((uint32_t*)(ss - 5)); + dd[-1] = ss[-1]; + break; + + case 86: + memcpy_sse2_64(dd - 86, ss - 86); + case 22: + memcpy_sse2_16(dd - 22, ss - 22); + *((uint32_t*)(dd - 6)) = *((uint32_t*)(ss - 6)); + *((uint16_t*)(dd - 2)) = *((uint16_t*)(ss - 2)); + break; + + case 87: + memcpy_sse2_64(dd - 87, ss - 87); + case 23: + memcpy_sse2_16(dd - 23, ss - 23); + *((uint32_t*)(dd - 7)) = *((uint32_t*)(ss - 7)); + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 88: + memcpy_sse2_64(dd - 88, ss - 88); + case 24: + memcpy_sse2_16(dd - 24, ss - 24); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 89: + memcpy_sse2_64(dd - 89, ss - 89); + case 25: + memcpy_sse2_16(dd - 25, ss - 25); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 90: + memcpy_sse2_64(dd - 90, ss - 90); + case 26: + memcpy_sse2_16(dd - 26, ss - 26); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 91: + memcpy_sse2_64(dd - 91, ss - 91); + case 27: + memcpy_sse2_16(dd - 27, ss - 27); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 92: + memcpy_sse2_64(dd - 92, ss - 92); + case 28: + memcpy_sse2_16(dd - 28, ss - 28); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 93: + memcpy_sse2_64(dd - 93, ss - 93); + case 29: + memcpy_sse2_16(dd - 29, ss - 29); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 94: + memcpy_sse2_64(dd - 94, ss - 94); + case 30: + memcpy_sse2_16(dd - 30, ss - 30); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 95: + memcpy_sse2_64(dd - 95, ss - 95); + case 31: + memcpy_sse2_16(dd - 31, ss - 31); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 96: + memcpy_sse2_64(dd - 96, ss - 96); + case 32: + memcpy_sse2_32(dd - 32, ss - 32); + break; + + case 97: + memcpy_sse2_64(dd - 97, ss - 97); + case 33: + memcpy_sse2_32(dd - 33, ss - 33); + dd[-1] = ss[-1]; + break; + + case 98: + memcpy_sse2_64(dd - 98, ss - 98); + case 34: + memcpy_sse2_32(dd - 34, ss - 34); + *((uint16_t*)(dd - 2)) = *((uint16_t*)(ss - 2)); + break; + + case 99: + memcpy_sse2_64(dd - 99, ss - 99); + case 35: + memcpy_sse2_32(dd - 35, ss - 35); + *((uint16_t*)(dd - 3)) = *((uint16_t*)(ss - 3)); + dd[-1] = ss[-1]; + break; + + case 100: + memcpy_sse2_64(dd - 100, ss - 100); + case 36: + memcpy_sse2_32(dd - 36, ss - 36); + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 101: + memcpy_sse2_64(dd - 101, ss - 101); + case 37: + memcpy_sse2_32(dd - 37, ss - 37); + *((uint32_t*)(dd - 5)) = *((uint32_t*)(ss - 5)); + dd[-1] = ss[-1]; + break; + + case 102: + memcpy_sse2_64(dd - 102, ss - 102); + case 38: + memcpy_sse2_32(dd - 38, ss - 38); + *((uint32_t*)(dd - 6)) = *((uint32_t*)(ss - 6)); + *((uint16_t*)(dd - 2)) = *((uint16_t*)(ss - 2)); + break; + + case 103: + memcpy_sse2_64(dd - 103, ss - 103); + case 39: + memcpy_sse2_32(dd - 39, ss - 39); + *((uint32_t*)(dd - 7)) = *((uint32_t*)(ss - 7)); + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 104: + memcpy_sse2_64(dd - 104, ss - 104); + case 40: + memcpy_sse2_32(dd - 40, ss - 40); + *((uint64_t*)(dd - 8)) = *((uint64_t*)(ss - 8)); + break; + + case 105: + memcpy_sse2_64(dd - 105, ss - 105); + case 41: + memcpy_sse2_32(dd - 41, ss - 41); + *((uint64_t*)(dd - 9)) = *((uint64_t*)(ss - 9)); + dd[-1] = ss[-1]; + break; + + case 106: + memcpy_sse2_64(dd - 106, ss - 106); + case 42: + memcpy_sse2_32(dd - 42, ss - 42); + *((uint64_t*)(dd - 10)) = *((uint64_t*)(ss - 10)); + *((uint16_t*)(dd - 2)) = *((uint16_t*)(ss - 2)); + break; + + case 107: + memcpy_sse2_64(dd - 107, ss - 107); + case 43: + memcpy_sse2_32(dd - 43, ss - 43); + *((uint64_t*)(dd - 11)) = *((uint64_t*)(ss - 11)); + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 108: + memcpy_sse2_64(dd - 108, ss - 108); + case 44: + memcpy_sse2_32(dd - 44, ss - 44); + *((uint64_t*)(dd - 12)) = *((uint64_t*)(ss - 12)); + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 109: + memcpy_sse2_64(dd - 109, ss - 109); + case 45: + memcpy_sse2_32(dd - 45, ss - 45); + *((uint64_t*)(dd - 13)) = *((uint64_t*)(ss - 13)); + *((uint32_t*)(dd - 5)) = *((uint32_t*)(ss - 5)); + dd[-1] = ss[-1]; + break; + + case 110: + memcpy_sse2_64(dd - 110, ss - 110); + case 46: + memcpy_sse2_32(dd - 46, ss - 46); + *((uint64_t*)(dd - 14)) = *((uint64_t*)(ss - 14)); + *((uint64_t*)(dd - 8)) = *((uint64_t*)(ss - 8)); + break; + + case 111: + memcpy_sse2_64(dd - 111, ss - 111); + case 47: + memcpy_sse2_32(dd - 47, ss - 47); + *((uint64_t*)(dd - 15)) = *((uint64_t*)(ss - 15)); + *((uint64_t*)(dd - 8)) = *((uint64_t*)(ss - 8)); + break; + + case 112: + memcpy_sse2_64(dd - 112, ss - 112); + case 48: + memcpy_sse2_32(dd - 48, ss - 48); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 113: + memcpy_sse2_64(dd - 113, ss - 113); + case 49: + memcpy_sse2_32(dd - 49, ss - 49); + memcpy_sse2_16(dd - 17, ss - 17); + dd[-1] = ss[-1]; + break; + + case 114: + memcpy_sse2_64(dd - 114, ss - 114); + case 50: + memcpy_sse2_32(dd - 50, ss - 50); + memcpy_sse2_16(dd - 18, ss - 18); + *((uint16_t*)(dd - 2)) = *((uint16_t*)(ss - 2)); + break; + + case 115: + memcpy_sse2_64(dd - 115, ss - 115); + case 51: + memcpy_sse2_32(dd - 51, ss - 51); + memcpy_sse2_16(dd - 19, ss - 19); + *((uint16_t*)(dd - 3)) = *((uint16_t*)(ss - 3)); + dd[-1] = ss[-1]; + break; + + case 116: + memcpy_sse2_64(dd - 116, ss - 116); + case 52: + memcpy_sse2_32(dd - 52, ss - 52); + memcpy_sse2_16(dd - 20, ss - 20); + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 117: + memcpy_sse2_64(dd - 117, ss - 117); + case 53: + memcpy_sse2_32(dd - 53, ss - 53); + memcpy_sse2_16(dd - 21, ss - 21); + *((uint32_t*)(dd - 5)) = *((uint32_t*)(ss - 5)); + dd[-1] = ss[-1]; + break; + + case 118: + memcpy_sse2_64(dd - 118, ss - 118); + case 54: + memcpy_sse2_32(dd - 54, ss - 54); + memcpy_sse2_16(dd - 22, ss - 22); + *((uint32_t*)(dd - 6)) = *((uint32_t*)(ss - 6)); + *((uint16_t*)(dd - 2)) = *((uint16_t*)(ss - 2)); + break; + + case 119: + memcpy_sse2_64(dd - 119, ss - 119); + case 55: + memcpy_sse2_32(dd - 55, ss - 55); + memcpy_sse2_16(dd - 23, ss - 23); + *((uint32_t*)(dd - 7)) = *((uint32_t*)(ss - 7)); + *((uint32_t*)(dd - 4)) = *((uint32_t*)(ss - 4)); + break; + + case 120: + memcpy_sse2_64(dd - 120, ss - 120); + case 56: + memcpy_sse2_32(dd - 56, ss - 56); + memcpy_sse2_16(dd - 24, ss - 24); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 121: + memcpy_sse2_64(dd - 121, ss - 121); + case 57: + memcpy_sse2_32(dd - 57, ss - 57); + memcpy_sse2_16(dd - 25, ss - 25); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 122: + memcpy_sse2_64(dd - 122, ss - 122); + case 58: + memcpy_sse2_32(dd - 58, ss - 58); + memcpy_sse2_16(dd - 26, ss - 26); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 123: + memcpy_sse2_64(dd - 123, ss - 123); + case 59: + memcpy_sse2_32(dd - 59, ss - 59); + memcpy_sse2_16(dd - 27, ss - 27); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 124: + memcpy_sse2_64(dd - 124, ss - 124); + case 60: + memcpy_sse2_32(dd - 60, ss - 60); + memcpy_sse2_16(dd - 28, ss - 28); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 125: + memcpy_sse2_64(dd - 125, ss - 125); + case 61: + memcpy_sse2_32(dd - 61, ss - 61); + memcpy_sse2_16(dd - 29, ss - 29); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 126: + memcpy_sse2_64(dd - 126, ss - 126); + case 62: + memcpy_sse2_32(dd - 62, ss - 62); + memcpy_sse2_16(dd - 30, ss - 30); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 127: + memcpy_sse2_64(dd - 127, ss - 127); + case 63: + memcpy_sse2_32(dd - 63, ss - 63); + memcpy_sse2_16(dd - 31, ss - 31); + memcpy_sse2_16(dd - 16, ss - 16); + break; + + case 128: + memcpy_sse2_128(dd - 128, ss - 128); + break; + } + + return dst; +} + + +//--------------------------------------------------------------------- +// main routine +//--------------------------------------------------------------------- +static void* memcpy_fast(void *destination, const void *source, size_t size) +{ + unsigned char *dst = (unsigned char*)destination; + const unsigned char *src = (const unsigned char*)source; + static size_t cachesize = 0x200000; // L2-cache size + size_t padding; + + // small memory copy + if (size <= 128) { + return memcpy_tiny(dst, src, size); + } + + // align destination to 16 bytes boundary + padding = (16 - (((size_t)dst) & 15)) & 15; + + if (padding > 0) { + __m128i head = _mm_loadu_si128((const __m128i*)src); + _mm_storeu_si128((__m128i*)dst, head); + dst += padding; + src += padding; + size -= padding; + } + + // medium size copy + if (size <= cachesize) { + __m128i c0, c1, c2, c3, c4, c5, c6, c7; + + for (; size >= 128; size -= 128) { + c0 = _mm_loadu_si128(((const __m128i*)src) + 0); + c1 = _mm_loadu_si128(((const __m128i*)src) + 1); + c2 = _mm_loadu_si128(((const __m128i*)src) + 2); + c3 = _mm_loadu_si128(((const __m128i*)src) + 3); + c4 = _mm_loadu_si128(((const __m128i*)src) + 4); + c5 = _mm_loadu_si128(((const __m128i*)src) + 5); + c6 = _mm_loadu_si128(((const __m128i*)src) + 6); + c7 = _mm_loadu_si128(((const __m128i*)src) + 7); + _mm_prefetch((const char*)(src + 256), _MM_HINT_NTA); + src += 128; + _mm_store_si128((((__m128i*)dst) + 0), c0); + _mm_store_si128((((__m128i*)dst) + 1), c1); + _mm_store_si128((((__m128i*)dst) + 2), c2); + _mm_store_si128((((__m128i*)dst) + 3), c3); + _mm_store_si128((((__m128i*)dst) + 4), c4); + _mm_store_si128((((__m128i*)dst) + 5), c5); + _mm_store_si128((((__m128i*)dst) + 6), c6); + _mm_store_si128((((__m128i*)dst) + 7), c7); + dst += 128; + } + } + else { // big memory copy + __m128i c0, c1, c2, c3, c4, c5, c6, c7; + + _mm_prefetch((const char*)(src), _MM_HINT_NTA); + + if ((((size_t)src) & 15) == 0) { // source aligned + for (; size >= 128; size -= 128) { + c0 = _mm_load_si128(((const __m128i*)src) + 0); + c1 = _mm_load_si128(((const __m128i*)src) + 1); + c2 = _mm_load_si128(((const __m128i*)src) + 2); + c3 = _mm_load_si128(((const __m128i*)src) + 3); + c4 = _mm_load_si128(((const __m128i*)src) + 4); + c5 = _mm_load_si128(((const __m128i*)src) + 5); + c6 = _mm_load_si128(((const __m128i*)src) + 6); + c7 = _mm_load_si128(((const __m128i*)src) + 7); + _mm_prefetch((const char*)(src + 256), _MM_HINT_NTA); + src += 128; + _mm_stream_si128((((__m128i*)dst) + 0), c0); + _mm_stream_si128((((__m128i*)dst) + 1), c1); + _mm_stream_si128((((__m128i*)dst) + 2), c2); + _mm_stream_si128((((__m128i*)dst) + 3), c3); + _mm_stream_si128((((__m128i*)dst) + 4), c4); + _mm_stream_si128((((__m128i*)dst) + 5), c5); + _mm_stream_si128((((__m128i*)dst) + 6), c6); + _mm_stream_si128((((__m128i*)dst) + 7), c7); + dst += 128; + } + } + else { // source unaligned + for (; size >= 128; size -= 128) { + c0 = _mm_loadu_si128(((const __m128i*)src) + 0); + c1 = _mm_loadu_si128(((const __m128i*)src) + 1); + c2 = _mm_loadu_si128(((const __m128i*)src) + 2); + c3 = _mm_loadu_si128(((const __m128i*)src) + 3); + c4 = _mm_loadu_si128(((const __m128i*)src) + 4); + c5 = _mm_loadu_si128(((const __m128i*)src) + 5); + c6 = _mm_loadu_si128(((const __m128i*)src) + 6); + c7 = _mm_loadu_si128(((const __m128i*)src) + 7); + _mm_prefetch((const char*)(src + 256), _MM_HINT_NTA); + src += 128; + _mm_stream_si128((((__m128i*)dst) + 0), c0); + _mm_stream_si128((((__m128i*)dst) + 1), c1); + _mm_stream_si128((((__m128i*)dst) + 2), c2); + _mm_stream_si128((((__m128i*)dst) + 3), c3); + _mm_stream_si128((((__m128i*)dst) + 4), c4); + _mm_stream_si128((((__m128i*)dst) + 5), c5); + _mm_stream_si128((((__m128i*)dst) + 6), c6); + _mm_stream_si128((((__m128i*)dst) + 7), c7); + dst += 128; + } + } + _mm_sfence(); + } + + memcpy_tiny(dst, src, size); + + return destination; +} + + +#endif diff --git a/src/components/implementation/simple_vmm/multi_vmm/guest/.gitignore b/src/components/implementation/simple_vmm/multi_vmm/guest/.gitignore new file mode 100644 index 0000000000..4a60f24ce6 --- /dev/null +++ b/src/components/implementation/simple_vmm/multi_vmm/guest/.gitignore @@ -0,0 +1,2 @@ +*.elf +*.map \ No newline at end of file diff --git a/src/components/implementation/simple_vmm/multi_vmm/guest/Makefile b/src/components/implementation/simple_vmm/multi_vmm/guest/Makefile new file mode 100644 index 0000000000..0228863f04 --- /dev/null +++ b/src/components/implementation/simple_vmm/multi_vmm/guest/Makefile @@ -0,0 +1,47 @@ +CC := gcc -m64 +LD := ld -m elf_x86_64 --nmagic +AS := as --64 -g + +CFLAGS := -g -O0 -ffreestanding -Wno-unused-function -Wno-unused-variable -Wno-unused-but-set-variable -nostdinc -nostdlib -fno-pic -mno-red-zone -mcmodel=large -mno-sse -mno-sse2 -mgeneral-regs-only +LDFLAGS := -nostdlib -fno-builtin -nostartfiles -nostdinc -nodefaultlibs + +GUEST_ELF = guest.elf +GUEST_IMG = guest.img +GUEST_MAP = guest.map + +AS_FILES = guest_realmode.S +AS_OBJS = $(patsubst %.S,%.o,$(AS_FILES)) + +WARNINGS += -Wall +WARNINGS += -Wcast-align +WARNINGS += -Wformat=2 +WARNINGS += -Winit-self +WARNINGS += -Wnested-externs +WARNINGS += -Wno-system-headers +WARNINGS += -Wold-style-definition +WARNINGS += -Wredundant-decls +WARNINGS += -Wsign-compare +WARNINGS += -Wstrict-prototypes +WARNINGS += -Wundef +WARNINGS += -Wvolatile-register-var +WARNINGS += -Wwrite-strings +WARNINGS += -Wno-address-of-packed-member + +CFLAGS += $(WARNINGS) + +all: $(GUEST_IMG) + +%.o: %.S + $(CC) $(CFLAGS) -I. -o $@ -c $< + +$(GUEST_IMG):$(GUEST_ELF) + @echo "[CT] $@" + @cp $< $@ + @objcopy $@ -O binary + +$(GUEST_ELF):$(AS_OBJS) + @echo "[LD] $@" + $(LD) $(LDPARAMS) -static -Map=$(GUEST_MAP) -T guest.ld -o $(GUEST_ELF) $(AS_OBJS) + +clean: + @rm -f $(GUEST_ELF) $(GUEST_IMG) $(GUEST_MAP) *.o \ No newline at end of file diff --git a/src/components/implementation/simple_vmm/multi_vmm/guest/guest.ld b/src/components/implementation/simple_vmm/multi_vmm/guest/guest.ld new file mode 100644 index 0000000000..07f9206c1f --- /dev/null +++ b/src/components/implementation/simple_vmm/multi_vmm/guest/guest.ld @@ -0,0 +1,34 @@ +ENTRY(guest_real_mode_entry) +OUTPUT_FORMAT(elf64-x86-64) +OUTPUT_ARCH(i386:x86-64) + + +SECTIONS +{ + . = 0x1000; + + .text BLOCK(4K) : ALIGN(4K) + { + *(.guest_kernel_initfn*) + *(.text*) + *(.rodata*) + } + + .data BLOCK(4K) : ALIGN(4K) + { + KEEP(*( .init_array )); + KEEP(*(SORT_BY_INIT_PRIORITY( .init_array.* ))); + *(.data*) + } + + .bss BLOCK(4K) : ALIGN(4K) + { + *(.bss*) + } + + /DISCARD/ : + { + *(.fini_array*) + *(.comment*) + } +} diff --git a/src/components/implementation/simple_vmm/multi_vmm/guest/guest_realmode.S b/src/components/implementation/simple_vmm/multi_vmm/guest/guest_realmode.S new file mode 100644 index 0000000000..ac2e2ec0a7 --- /dev/null +++ b/src/components/implementation/simple_vmm/multi_vmm/guest/guest_realmode.S @@ -0,0 +1,60 @@ +#define SEG_NULLASM \ + .word 0, 0; \ + .byte 0, 0, 0, 0 +#define SEG_ASM(type,base,lim) \ + .word (((lim) >> 12) & 0xffff), ((base) & 0xffff); \ + .byte (((base) >> 16) & 0xff), (0x90 | (type)), \ + (0xC0 | (((lim) >> 28) & 0xf)), (((base) >> 24) & 0xff) + +#define STA_X 0x8 // Executable segment +#define STA_E 0x4 // Expand down (non-executable segments) +#define STA_C 0x4 // Conforming code segment (executable only) +#define STA_W 0x2 // Writeable (non-executable segments) +#define STA_R 0x2 // Readable (executable segments) +#define STA_A 0x1 // Accessed + +#define CR0_PE 0x00000001 // Protection Enable +#define CR0_WP 0x00010000 // Write Protect +#define CR0_PG 0x80000000 // Paging + +#define SEL_KCSEG 0x08 /* Kernel code selector. */ +#define SEL_KDSEG 0x10 /* Kernel data selector. */ + +.global guest_real_mode_entry +/* code start entry */ +.section .guest_kernel_initfn +.code16 +guest_real_mode_entry: + ljmp $0x0, $start + +start: + cli + lgdt smpgdtdesc + movl %cr0, %eax + orl $CR0_PE, %eax + movl %eax, %cr0 + ljmpl $(SEL_KCSEG), $smpstart32 +.align 0x10 +.code32 +smpstart32: + movw $(SEL_KDSEG), %ax + movw %ax, %ds + movw %ax, %es + movw %ax, %ss + movw $0, %ax + movw %ax, %fs + movw %ax, %gs + + /* jmp to vmlinux bootloader at the specific address */ + ljmpl $(SEL_KCSEG), $0x100000 + jmp . + +.p2align 2 +smpgdt: + SEG_NULLASM + SEG_ASM(STA_X|STA_R, 0, 0xffffffff) /* code segment for protected mode, mapping 0-4G memory */ + SEG_ASM(STA_W, 0, 0xffffffff) /* data segment for protected mode, mapping 0-4G memory */ + +smpgdtdesc: + .word (smpgdtdesc - smpgdt - 1) + .long smpgdt diff --git a/src/components/implementation/simple_vmm/multi_vmm/instr_emul.c b/src/components/implementation/simple_vmm/multi_vmm/instr_emul.c new file mode 100644 index 0000000000..230a0a9bdf --- /dev/null +++ b/src/components/implementation/simple_vmm/multi_vmm/instr_emul.c @@ -0,0 +1,1381 @@ +/*- + * Copyright (c) 2012 Sandvine, Inc. + * Copyright (c) 2012 NetApp, Inc. + * Copyright (c) 2017-2022 Intel Corporation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#include +#include + +#include + +#define CPU_REG_FIRST CPU_REG_RAX +#define CPU_REG_LAST CPU_REG_GDTR +#define CPU_REG_GENERAL_FIRST CPU_REG_RAX +#define CPU_REG_GENERAL_LAST CPU_REG_R15 +#define CPU_REG_NONGENERAL_FIRST CPU_REG_CR0 +#define CPU_REG_NONGENERAL_LAST CPU_REG_GDTR +#define CPU_REG_NATURAL_FIRST CPU_REG_CR0 +#define CPU_REG_NATURAL_LAST CPU_REG_RFLAGS +#define CPU_REG_64BIT_FIRST CPU_REG_EFER +#define CPU_REG_64BIT_LAST CPU_REG_PDPTE3 +#define CPU_REG_SEG_FIRST CPU_REG_ES +#define CPU_REG_SEG_LAST CPU_REG_GS + +#define PSL_C 0x00000001U /* carry bit */ +#define PSL_PF 0x00000004U /* parity bit */ +#define PSL_AF 0x00000010U /* bcd carry bit */ +#define PSL_Z 0x00000040U /* zero bit */ +#define PSL_N 0x00000080U /* negative bit */ +#define PSL_D 0x00000400U /* string instruction direction bit */ +#define PSL_V 0x00000800U /* overflow bit */ +#define PSL_AC 0x00040000U /* alignment checking */ + +/* + * Protections are chosen from these bits, or-ed together + */ +#define PROT_READ 0x01U /* pages can be read */ +#define PROT_WRITE 0x02U /* pages can be written */ + +/* struct vie_op.op_type */ +#define VIE_OP_TYPE_NONE 0U +#define VIE_OP_TYPE_MOV 1U +#define VIE_OP_TYPE_MOVSX 2U +#define VIE_OP_TYPE_MOVZX 3U +#define VIE_OP_TYPE_AND 4U +#define VIE_OP_TYPE_OR 5U +#define VIE_OP_TYPE_SUB 6U +#define VIE_OP_TYPE_TWO_BYTE 7U +#define VIE_OP_TYPE_PUSH 8U +#define VIE_OP_TYPE_CMP 9U +#define VIE_OP_TYPE_POP 10U +#define VIE_OP_TYPE_MOVS 11U +#define VIE_OP_TYPE_GROUP1 12U +#define VIE_OP_TYPE_STOS 13U +#define VIE_OP_TYPE_BITTEST 14U +#define VIE_OP_TYPE_TEST 15U +#define VIE_OP_TYPE_XCHG 16U + +/* struct vie_op.op_flags */ +#define VIE_OP_F_IMM (1U << 0U) /* 16/32-bit immediate operand */ +#define VIE_OP_F_IMM8 (1U << 1U) /* 8-bit immediate operand */ +#define VIE_OP_F_MOFFSET (1U << 2U) /* 16/32/64-bit immediate moffset */ +#define VIE_OP_F_NO_MODRM (1U << 3U) +#define VIE_OP_F_CHECK_GVA_DI (1U << 4U) /* for movs, need to check DI */ +/* + * The VIE_OP_F_BYTE_OP only set when the instruction support + * Encoding of Operand Size (w) Bit and the w bit of opcode is 0. + * according B.2 GENERAL-PURPOSE INSTRUCTION FORMATS AND ENCODINGS + * FOR NON-64-BIT MODES, Vol 2, Intel SDM. + */ +#define VIE_OP_F_BYTE_OP (1U << 5U) /* 8-bit operands. */ +#define VIE_OP_F_WORD_OP (1U << 6U) /* 16-bit operands. */ + +static const struct instr_emul_vie_op two_byte_opcodes[256] = { + [0xB6] = { + .op_type = VIE_OP_TYPE_MOVZX, + .op_flags = VIE_OP_F_BYTE_OP, + }, + [0xB7] = { + .op_type = VIE_OP_TYPE_MOVZX, + .op_flags = VIE_OP_F_WORD_OP, + }, + [0xBA] = { + .op_type = VIE_OP_TYPE_BITTEST, + .op_flags = VIE_OP_F_IMM8, + }, + [0xBE] = { + .op_type = VIE_OP_TYPE_MOVSX, + .op_flags = VIE_OP_F_BYTE_OP, + }, +}; + +static const struct instr_emul_vie_op one_byte_opcodes[256] = { + [0x0F] = { + .op_type = VIE_OP_TYPE_TWO_BYTE + }, + [0x2B] = { + .op_type = VIE_OP_TYPE_SUB, + }, + [0x39] = { + .op_type = VIE_OP_TYPE_CMP, + }, + [0x3B] = { + .op_type = VIE_OP_TYPE_CMP, + }, + [0x88] = { + .op_type = VIE_OP_TYPE_MOV, + .op_flags = VIE_OP_F_BYTE_OP, + }, + [0x89] = { + .op_type = VIE_OP_TYPE_MOV, + }, + [0x8A] = { + .op_type = VIE_OP_TYPE_MOV, + .op_flags = VIE_OP_F_BYTE_OP, + }, + [0x8B] = { + .op_type = VIE_OP_TYPE_MOV, + }, + [0xA1] = { + .op_type = VIE_OP_TYPE_MOV, + .op_flags = VIE_OP_F_MOFFSET | VIE_OP_F_NO_MODRM, + }, + [0xA3] = { + .op_type = VIE_OP_TYPE_MOV, + .op_flags = VIE_OP_F_MOFFSET | VIE_OP_F_NO_MODRM, + }, + [0xA4] = { + .op_type = VIE_OP_TYPE_MOVS, + .op_flags = VIE_OP_F_NO_MODRM | VIE_OP_F_CHECK_GVA_DI | VIE_OP_F_BYTE_OP, + }, + [0xA5] = { + .op_type = VIE_OP_TYPE_MOVS, + .op_flags = VIE_OP_F_NO_MODRM | VIE_OP_F_CHECK_GVA_DI, + }, + [0xAA] = { + .op_type = VIE_OP_TYPE_STOS, + .op_flags = VIE_OP_F_NO_MODRM | VIE_OP_F_BYTE_OP, + }, + [0xAB] = { + .op_type = VIE_OP_TYPE_STOS, + .op_flags = VIE_OP_F_NO_MODRM + }, + [0xC6] = { + /* XXX Group 11 extended opcode - not just MOV */ + .op_type = VIE_OP_TYPE_MOV, + .op_flags = VIE_OP_F_IMM8 | VIE_OP_F_BYTE_OP, + }, + [0xC7] = { + .op_type = VIE_OP_TYPE_MOV, + .op_flags = VIE_OP_F_IMM, + }, + [0x23] = { + .op_type = VIE_OP_TYPE_AND, + }, + [0x80] = { + /* Group 1 extended opcode */ + .op_type = VIE_OP_TYPE_GROUP1, + .op_flags = VIE_OP_F_IMM8, + }, + [0x81] = { + /* Group 1 extended opcode */ + .op_type = VIE_OP_TYPE_GROUP1, + .op_flags = VIE_OP_F_IMM, + }, + [0x83] = { + /* Group 1 extended opcode */ + .op_type = VIE_OP_TYPE_GROUP1, + .op_flags = VIE_OP_F_IMM8, + }, + [0x84] = { + .op_type = VIE_OP_TYPE_TEST, + .op_flags = VIE_OP_F_BYTE_OP, + }, + [0x85] = { + .op_type = VIE_OP_TYPE_TEST, + }, + [0x86] = { + .op_type = VIE_OP_TYPE_XCHG, + }, + [0x87] = { + .op_type = VIE_OP_TYPE_XCHG, + }, + [0x08] = { + .op_type = VIE_OP_TYPE_OR, + .op_flags = VIE_OP_F_BYTE_OP, + }, + [0x09] = { + .op_type = VIE_OP_TYPE_OR, + }, +}; + +/* struct vie.mod */ +#define VIE_MOD_INDIRECT 0U +#define VIE_MOD_INDIRECT_DISP8 1U +#define VIE_MOD_INDIRECT_DISP32 2U +#define VIE_MOD_DIRECT 3U + +/* struct vie.rm */ +#define VIE_RM_SIB 4U +#define VIE_RM_DISP32 5U + +static uint64_t size2mask[9] = { + [1] = (1UL << 8U) - 1UL, + [2] = (1UL << 16U) - 1UL, + [4] = (1UL << 32U) - 1UL, + [8] = ~0UL, +}; + +#define VMX_INVALID_VMCS_FIELD 0xffffffffU + +/* + * This struct vmcs_seg_field is defined separately to hold the vmcs field + * address of segment selector. + */ +struct vmcs_seg_field { + uint32_t base_field; + uint32_t limit_field; + uint32_t access_field; +}; + +/* + * The 'access' field has the format specified in Table 21-2 of the Intel + * Architecture Manual vol 3b. + * + * XXX The contents of the 'access' field are architecturally defined except + * bit 16 - Segment Unusable. + */ +struct seg_desc { + uint64_t base; + uint32_t limit; + uint32_t access; +}; + +static inline struct acrn_mmio_request *vcpu_mmio_req(struct vmrt_vm_vcpu *vcpu) +{ + return (struct acrn_mmio_request *)(vcpu->mmio_request); +} + +static inline uint32_t seg_desc_type(uint32_t access) +{ + return (access & 0x001fU); +} + +static uint64_t vm_get_register(struct vmrt_vm_vcpu *vcpu, enum cpu_reg_name reg) +{ + volatile struct vm_vcpu_shared_region *regs = vcpu->shared_region; + uint64_t reg_val = 0UL; + + switch (reg) + { + case CPU_REG_RAX: + reg_val = regs->ax; + break; + case CPU_REG_RCX: + reg_val = regs->cx; + break; + case CPU_REG_RDX: + reg_val = regs->dx; + break; + case CPU_REG_RBX: + reg_val = regs->bx; + break; + case CPU_REG_RSP: + reg_val = regs->sp; + break; + case CPU_REG_RBP: + reg_val = regs->bp; + break; + case CPU_REG_RSI: + reg_val = regs->si; + break; + case CPU_REG_RDI: + reg_val = regs->di; + break; + case CPU_REG_R8: + reg_val = regs->r8; + break; + case CPU_REG_R9: + reg_val = regs->r9; + break; + case CPU_REG_R10: + reg_val = regs->r10; + break; + case CPU_REG_R11: + reg_val = regs->r11; + break; + case CPU_REG_R12: + reg_val = regs->r12; + break; + case CPU_REG_R13: + reg_val = regs->r13; + break; + case CPU_REG_R14: + reg_val = regs->r14; + break; + case CPU_REG_R15: + reg_val = regs->r15; + break; + default: + VM_PANIC(vcpu); + break; + } + + return reg_val; +} + +static void vm_set_register(struct vmrt_vm_vcpu *vcpu, enum cpu_reg_name reg, + uint64_t val) +{ + volatile struct vm_vcpu_shared_region *regs = vcpu->shared_region; + + switch (reg) + { + case CPU_REG_RAX: + regs->ax = val; + break; + case CPU_REG_RCX: + regs->cx = val; + break; + case CPU_REG_RDX: + regs->dx = val; + break; + case CPU_REG_RBX: + regs->bx = val; + break; + case CPU_REG_RSP: + regs->sp = val; + break; + case CPU_REG_RBP: + regs->bp = val; + break; + case CPU_REG_RSI: + regs->si = val; + break; + case CPU_REG_RDI: + regs->di = val; + break; + case CPU_REG_R8: + regs->r8 = val; + break; + case CPU_REG_R9: + regs->r9 = val; + break; + case CPU_REG_R10: + regs->r10 = val; + break; + case CPU_REG_R11: + regs->r11 = val; + break; + case CPU_REG_R12: + regs->r12 = val; + break; + case CPU_REG_R13: + regs->r13 = val; + break; + case CPU_REG_R14: + regs->r14 = val; + break; + case CPU_REG_R15: + regs->r15 = val; + break; + default: + VM_PANIC(vcpu); + break; + } +} + +static int32_t vie_canonical_check(uint64_t gla) +{ + int32_t ret = 0; + uint64_t mask; + + /* + * The value of the bit 47 in the 'gla' should be replicated in the + * most significant 16 bits. + */ + mask = ~((1UL << 48U) - 1UL); + if ((gla & (1UL << 47U)) != 0U) { + ret = ((gla & mask) != mask) ? 1 : 0; + } else { + ret = ((gla & mask) != 0U) ? 1 : 0; + } + + return ret; +} + +/* + * @pre vcpu != NULL + */ +static inline void vie_mmio_read(struct vmrt_vm_vcpu *vcpu, uint64_t *rval) +{ + *rval = vcpu_mmio_req(vcpu)->value; +} + +/* + * @pre vcpu != NULL + */ +static inline void vie_mmio_write(struct vmrt_vm_vcpu *vcpu, uint64_t wval) +{ + vcpu_mmio_req(vcpu)->value = wval; +} + +static void vie_calc_bytereg(const struct instr_emul_vie *vie, + enum cpu_reg_name *reg, int32_t *lhbr) +{ + *lhbr = 0; + *reg = (enum cpu_reg_name)(vie->reg); + + /* + * 64-bit mode imposes limitations on accessing legacy high byte + * registers (lhbr). + * + * The legacy high-byte registers cannot be addressed if the REX + * prefix is present. In this case the values 4, 5, 6 and 7 of the + * 'ModRM:reg' field address %spl, %bpl, %sil and %dil respectively. + * + * If the REX prefix is not present then the values 4, 5, 6 and 7 + * of the 'ModRM:reg' field address the legacy high-byte registers, + * %ah, %ch, %dh and %bh respectively. + */ + if (vie->rex_present == 0U) { + if ((vie->reg & 0x4U) != 0U) { + *lhbr = 1; + *reg = (enum cpu_reg_name)(vie->reg & 0x3U); + } + } +} + +static uint8_t vie_read_bytereg(struct vmrt_vm_vcpu *vcpu, const struct instr_emul_vie *vie) +{ + int32_t lhbr; + uint64_t val; + uint8_t reg_val; + enum cpu_reg_name reg; + + vie_calc_bytereg(vie, ®, &lhbr); + val = vm_get_register(vcpu, reg); + + /* + * To obtain the value of a legacy high byte register shift the + * base register right by 8 bits (%ah = %rax >> 8). + */ + if (lhbr != 0) { + reg_val = (uint8_t)(val >> 8U); + } else { + reg_val = (uint8_t)val; + } + + return reg_val; +} + +static void vie_write_bytereg(struct vmrt_vm_vcpu *vcpu, const struct instr_emul_vie *vie, + uint8_t byte) +{ + uint64_t origval, val, mask; + enum cpu_reg_name reg; + int32_t lhbr; + + vie_calc_bytereg(vie, ®, &lhbr); + origval = vm_get_register(vcpu, reg); + + val = byte; + mask = 0xffU; + if (lhbr != 0) { + /* + * Shift left by 8 to store 'byte' in a legacy high + * byte register. + */ + val <<= 8U; + mask <<= 8U; + } + val |= origval & ~mask; + vm_set_register(vcpu, reg, val); +} + +/** + * @pre vcpu != NULL + * @pre size = 1, 2, 4 or 8 + * @pre ((reg <= CPU_REG_LAST) && (reg >= CPU_REG_FIRST)) + * @pre ((reg != CPU_REG_CR2) && (reg != CPU_REG_IDTR) && (reg != CPU_REG_GDTR)) + */ +static void vie_update_register(struct vmrt_vm_vcpu *vcpu, enum cpu_reg_name reg, + uint64_t val_arg, uint8_t size) +{ + uint64_t origval; + uint64_t val = val_arg; + + switch (size) { + case 1U: + case 2U: + origval = vm_get_register(vcpu, reg); + val &= size2mask[size]; + val |= origval & ~size2mask[size]; + break; + case 4U: + val &= 0xffffffffUL; + break; + default: /* size == 8 */ + break; + } + + vm_set_register(vcpu, reg, val); +} + +#define RFLAGS_STATUS_BITS (PSL_C | PSL_PF | PSL_AF | PSL_Z | PSL_N | PSL_V) + +static void vie_update_rflags(struct vmrt_vm_vcpu *vcpu, uint64_t rflags2, uint64_t psl) +{ + uint8_t size; + uint64_t rflags; + + rflags = vm_get_register(vcpu, CPU_REG_RFLAGS); + + rflags &= ~RFLAGS_STATUS_BITS; + rflags |= rflags2 & psl; + size = 8U; + + vie_update_register(vcpu, CPU_REG_RFLAGS, rflags, size); +} + +/* + * Return the status flags that would result from doing (x - y). + */ +#define build_getcc(name, type) \ +static uint64_t name(type x, type y) \ +{ \ + uint64_t rflags; \ + \ + __asm __volatile("sub %2,%1; pushfq; popq %0" : \ + "=r" (rflags), "+r" (x) : "m" (y)); \ + return rflags; \ +} +build_getcc(getcc8, uint8_t) +build_getcc(getcc16, uint16_t) +build_getcc(getcc32, uint32_t) +build_getcc(getcc64, uint64_t) + +/** + * @pre opsize = 1, 2, 4 or 8 + */ +static uint64_t getcc(uint8_t opsize, uint64_t x, uint64_t y) +{ + uint64_t rflags; + switch (opsize) { + case 1U: + rflags = getcc8((uint8_t) x, (uint8_t) y); + break; + case 2U: + rflags = getcc16((uint16_t) x, (uint16_t) y); + break; + case 4U: + rflags = getcc32((uint32_t) x, (uint32_t) y); + break; + default: /* opsize == 8 */ + rflags = getcc64(x, y); + break; + } + + return rflags; +} + +static int32_t emulate_mov(struct vmrt_vm_vcpu *vcpu, const struct instr_emul_vie *vie) +{ + int32_t error; + uint8_t size; + enum cpu_reg_name reg; + uint8_t byte; + uint64_t val; + + size = vie->opsize; + error = 0; + switch (vie->opcode) { + case 0x88U: + /* + * MOV byte from reg (ModRM:reg) to mem (ModRM:r/m) + * 88/r: mov r/m8, r8 + * REX + 88/r: mov r/m8, r8 (%ah, %ch, %dh, %bh not available) + */ + byte = vie_read_bytereg(vcpu, vie); + vie_mmio_write(vcpu, byte); + break; + case 0x89U: + /* + * MOV from reg (ModRM:reg) to mem (ModRM:r/m) + * 89/r: mov r/m16, r16 + * 89/r: mov r/m32, r32 + * REX.W + 89/r mov r/m64, r64 + */ + + reg = (enum cpu_reg_name)(vie->reg); + val = vm_get_register(vcpu, reg); + val &= size2mask[size]; + vie_mmio_write(vcpu, val); + break; + case 0x8AU: + /* + * MOV byte from mem (ModRM:r/m) to reg (ModRM:reg) + * 8A/r: mov r8, r/m8 + * REX + 8A/r: mov r8, r/m8 + */ + vie_mmio_read(vcpu, &val); + vie_write_bytereg(vcpu, vie, (uint8_t)val); + break; + case 0x8BU: + /* + * MOV from mem (ModRM:r/m) to reg (ModRM:reg) + * 8B/r: mov r16, r/m16 + * 8B/r: mov r32, r/m32 + * REX.W 8B/r: mov r64, r/m64 + */ + vie_mmio_read(vcpu, &val); + reg = (enum cpu_reg_name)(vie->reg); + vie_update_register(vcpu, reg, val, size); + break; + case 0xA1U: + /* + * MOV from seg:moffset to AX/EAX/RAX + * A1: mov AX, moffs16 + * A1: mov EAX, moffs32 + * REX.W + A1: mov RAX, moffs64 + */ + vie_mmio_read(vcpu, &val); + reg = CPU_REG_RAX; + vie_update_register(vcpu, reg, val, size); + break; + case 0xA3U: + /* + * MOV from AX/EAX/RAX to seg:moffset + * A3: mov moffs16, AX + * A3: mov moffs32, EAX + * REX.W + A3: mov moffs64, RAX + */ + val = vm_get_register(vcpu, CPU_REG_RAX); + val &= size2mask[size]; + vie_mmio_write(vcpu, val); + break; + case 0xC6U: + /* + * MOV from imm8 to mem (ModRM:r/m) + * C6/0 mov r/m8, imm8 + * REX + C6/0 mov r/m8, imm8 + */ + vie_mmio_write(vcpu, (uint64_t)vie->immediate); + break; + case 0xC7U: + /* + * MOV from imm16/imm32 to mem (ModRM:r/m) + * C7/0 mov r/m16, imm16 + * C7/0 mov r/m32, imm32 + * REX.W + C7/0 mov r/m64, imm32 + * (sign-extended to 64-bits) + */ + val = (uint64_t)(vie->immediate) & size2mask[size]; + vie_mmio_write(vcpu, val); + break; + default: + /* + * For the opcode that is not handled (an invalid opcode), the + * error code is assigned to a default value (-EINVAL). + * Gracefully return this error code if prior case clauses have + * not been met. + */ + error = -EINVAL; + break; + } + + return error; +} + +static void copy_from_gva(struct vmrt_vm_vcpu *vcpu, void *buf, u64_t gva, u32_t len) +{ + void *src = GPA2HVA(vmrt_vm_gva2gpa(vcpu, gva), vcpu->vm); + memcpy(buf, src, len); +} + +static int32_t vie_init(struct instr_emul_vie *vie, struct vmrt_vm_vcpu *vcpu) +{ + volatile struct vm_vcpu_shared_region *regs = vcpu->shared_region; + u64_t inst_len = regs->inst_length; + int32_t ret; + + if ((inst_len > VIE_INST_SIZE) || (inst_len == 0U)) { + VM_PANIC(vcpu); + } else { + (void)memset(vie, 0U, sizeof(struct instr_emul_vie)); + + /* init register fields in vie. */ + vie->base_register = CPU_REG_LAST; + vie->index_register = CPU_REG_LAST; + vie->segment_register = CPU_REG_LAST; + + copy_from_gva(vcpu, vie->inst, regs->ip, inst_len); + /* + * Use this to print the inst binary to verify if the decodeed inst is correct + * + printc("inst to be decode: "); + for (u64_t i = 0; i < inst_len; i++) { + printc("%x ", vie->inst[i]); + } + printc("\ninst vie init done\n"); + */ + + vie->num_valid = (uint8_t)inst_len; + ret = 0; + } + + return ret; +} + +static int32_t vie_peek(const struct instr_emul_vie *vie, uint8_t *x) +{ + int32_t ret; + if (vie->num_processed < vie->num_valid) { + *x = vie->inst[vie->num_processed]; + ret = 0; + } else { + ret = -1; + } + return ret; +} + +static void vie_advance(struct instr_emul_vie *vie) +{ + + vie->num_processed++; +} + +static bool segment_override(uint8_t x, enum cpu_reg_name *seg) +{ + bool override = true; + switch (x) { + case 0x2EU: + *seg = CPU_REG_CS; + break; + case 0x36U: + *seg = CPU_REG_SS; + break; + case 0x3EU: + *seg = CPU_REG_DS; + break; + case 0x26U: + *seg = CPU_REG_ES; + break; + case 0x64U: + *seg = CPU_REG_FS; + break; + case 0x65U: + *seg = CPU_REG_GS; + break; + default: + override = false; + break; + } + return override; +} + +static void decode_op_and_addr_size(struct instr_emul_vie *vie) +{ + /* + * Section "Operand-Size And Address-Size Attributes", Intel SDM, Vol 1 + */ + + /* + * Default address size is 64-bits and default operand size + * is 32-bits. + */ + vie->addrsize = ((vie->addrsize_override != 0U) ? 4U : 8U); + if (vie->rex_w != 0U) { + vie->opsize = 8U; + } else if (vie->opsize_override != 0U) { + vie->opsize = 2U; + } else { + vie->opsize = 4U; + } +} +static int32_t decode_prefixes(struct instr_emul_vie *vie) +{ + uint8_t x, i; + int32_t ret = 0; + + for (i = 0U; i < VIE_PREFIX_SIZE; i++) { + if (vie_peek(vie, &x) != 0) { + ret = -1; + break; + } else { + if (x == 0x66U) { + vie->opsize_override = 1U; + } else if (x == 0x67U) { + vie->addrsize_override = 1U; + } else if (x == 0xF3U) { + vie->repz_present = 1U; + } else if (x == 0xF2U) { + vie->repnz_present = 1U; + } else if (segment_override(x, &vie->segment_register)) { + vie->seg_override = 1U; + } else { + break; + } + + vie_advance(vie); + } + } + + if (ret == 0) { + /* + * From section 2.2.1, "REX Prefixes", Intel SDM Vol 2: + * - Only one REX prefix is allowed per instruction. + * - The REX prefix must immediately precede the opcode byte or the + * escape opcode byte. + * - If an instruction has a mandatory prefix (0x66, 0xF2 or 0xF3) + * the mandatory prefix must come before the REX prefix. + */ + if ( (x >= 0x40U) && (x <= 0x4FU)) { + vie->rex_present = 1U; + vie->rex_w = (x >> 0x3U) & 1U; + vie->rex_r = (x >> 0x2U) & 1U; + vie->rex_x = (x >> 0x1U) & 1U; + vie->rex_b = (x >> 0x0U) & 1U; + vie_advance(vie); + } + decode_op_and_addr_size(vie); + } + + return ret; +} + +static int32_t decode_two_byte_opcode(struct instr_emul_vie *vie) +{ + int32_t ret = 0; + uint8_t x; + + if (vie_peek(vie, &x) != 0) { + ret = -1; + } else { + vie->opcode = x; + vie->op = two_byte_opcodes[x]; + + if (vie->op.op_type == VIE_OP_TYPE_NONE) { + ret = -1; + } else { + vie_advance(vie); + } + } + + return ret; +} + +static int32_t decode_opcode(struct instr_emul_vie *vie) +{ + int32_t ret = 0; + uint8_t x; + + if (vie_peek(vie, &x) != 0) { + ret = -1; + } else { + vie->opcode = x; + vie->op = one_byte_opcodes[x]; + + if (vie->op.op_type == VIE_OP_TYPE_NONE) { + ret = -1; + } else { + vie_advance(vie); + + if (vie->op.op_type == VIE_OP_TYPE_TWO_BYTE) { + ret = decode_two_byte_opcode(vie); + } + } + } + + return ret; +} + +static int32_t decode_modrm(struct instr_emul_vie *vie) +{ + uint8_t x; + int32_t ret; + + if ((vie->op.op_flags & VIE_OP_F_NO_MODRM) != 0U) { + ret = 0; + } else if (vie_peek(vie, &x) != 0) { + ret = -1; + } else { + vie->mod = (x >> 6U) & 0x3U; + vie->rm = (x >> 0U) & 0x7U; + vie->reg = (x >> 3U) & 0x7U; + + /* + * A direct addressing mode makes no sense in the context of an EPT + * fault. There has to be a memory access involved to cause the + * EPT fault. + */ + if (vie->mod == VIE_MOD_DIRECT) { + ret = -1; + } else { + if (((vie->mod == VIE_MOD_INDIRECT) && (vie->rm == VIE_RM_DISP32)) || + ((vie->mod != VIE_MOD_DIRECT) && (vie->rm == VIE_RM_SIB))) { + /* + * Table 2-5: Special Cases of REX Encodings + * + * mod=0, r/m=5 is used in the compatibility mode to + * indicate a disp32 without a base register. + * + * mod!=3, r/m=4 is used in the compatibility mode to + * indicate that the SIB byte is present. + * + * The 'b' bit in the REX prefix is don't care in + * this case. + */ + } else { + vie->rm |= (vie->rex_b << 3U); + } + + vie->reg |= (vie->rex_r << 3U); + + /* SIB */ + if ((vie->mod != VIE_MOD_DIRECT) && (vie->rm == VIE_RM_SIB)) { + /* done */ + } else { + vie->base_register = (enum cpu_reg_name)vie->rm; + + switch (vie->mod) { + case VIE_MOD_INDIRECT_DISP8: + vie->disp_bytes = 1U; + break; + case VIE_MOD_INDIRECT_DISP32: + vie->disp_bytes = 4U; + break; + case VIE_MOD_INDIRECT: + if (vie->rm == VIE_RM_DISP32) { + vie->disp_bytes = 4U; + /* + * Table 2-7. RIP-Relative Addressing + * + * In 64-bit mode mod=00 r/m=101 implies [rip] + disp32 + * whereas in compatibility mode it just implies disp32. + */ + + vie->base_register = CPU_REG_RIP; + printc("VM exit with RIP as indirect access"); + assert(0); + } + break; + default: + /* VIE_MOD_DIRECT */ + break; + } + + } + vie_advance(vie); + + ret = 0; + } + } + + return ret; +} + +static int32_t decode_sib(struct instr_emul_vie *vie) +{ + uint8_t x; + int32_t ret; + + /* Proceed only if SIB byte is present */ + if ((vie->mod == VIE_MOD_DIRECT) || (vie->rm != VIE_RM_SIB)) { + ret = 0; + } else if (vie_peek(vie, &x) != 0) { + ret = -1; + } else { + + /* De-construct the SIB byte */ + vie->ss = (x >> 6U) & 0x3U; + vie->index = (x >> 3U) & 0x7U; + vie->base = (x >> 0U) & 0x7U; + + /* Apply the REX prefix modifiers */ + vie->index |= vie->rex_x << 3U; + vie->base |= vie->rex_b << 3U; + + switch (vie->mod) { + case VIE_MOD_INDIRECT_DISP8: + vie->disp_bytes = 1U; + break; + case VIE_MOD_INDIRECT_DISP32: + vie->disp_bytes = 4U; + break; + default: + /* + * All possible values of 'vie->mod': + * 1. VIE_MOD_DIRECT + * has been handled at the start of this function + * 2. VIE_MOD_INDIRECT_DISP8 + * has been handled in prior case clauses + * 3. VIE_MOD_INDIRECT_DISP32 + * has been handled in prior case clauses + * 4. VIE_MOD_INDIRECT + * will be handled later after this switch statement + */ + break; + } + + if ((vie->mod == VIE_MOD_INDIRECT) && ((vie->base == 5U) || (vie->base == 13U))) { + /* + * Special case when base register is unused if mod = 0 + * and base = %rbp or %r13. + * + * Documented in: + * Table 2-3: 32-bit Addressing Forms with the SIB Byte + * Table 2-5: Special Cases of REX Encodings + */ + vie->disp_bytes = 4U; + } else { + vie->base_register = (enum cpu_reg_name)vie->base; + } + + /* + * All encodings of 'index' are valid except for %rsp (4). + * + * Documented in: + * Table 2-3: 32-bit Addressing Forms with the SIB Byte + * Table 2-5: Special Cases of REX Encodings + */ + if (vie->index != 4U) { + vie->index_register = (enum cpu_reg_name)vie->index; + } + + /* 'scale' makes sense only in the context of an index register */ + if (vie->index_register < CPU_REG_LAST) { + vie->scale = 1U << vie->ss; + } + + vie_advance(vie); + + ret = 0; + } + + return ret; +} + +static int32_t decode_displacement(struct instr_emul_vie *vie) +{ + uint8_t n, i, x; + int32_t ret = 0; + + union { + uint8_t buf[4]; + int8_t signed8; + int32_t signed32; + } u; + + n = vie->disp_bytes; + if (n != 0U) { + if ((n != 1U) && (n != 4U)) { + printc("%s: decode_displacement: invalid disp_bytes %d", __func__, n); + ret = -EINVAL; + } else { + + for (i = 0U; i < n; i++) { + if (vie_peek(vie, &x) != 0) { + ret = -1; + break; + } + + u.buf[i] = x; + vie_advance(vie); + } + + if (ret == 0) { + if (n == 1U) { + vie->displacement = u.signed8; /* sign-extended */ + } else { + vie->displacement = u.signed32; /* sign-extended */ + } + } + } + } + + return ret; +} + +static int32_t decode_immediate(struct instr_emul_vie *vie) +{ + uint8_t i, n, x; + int32_t ret = 0; + union { + uint8_t buf[4]; + int8_t signed8; + int16_t signed16; + int32_t signed32; + } u; + + /* Figure out immediate operand size (if any) */ + if ((vie->op.op_flags & VIE_OP_F_IMM) != 0U) { + /* + * Section 2.2.1.5 "Immediates", Intel SDM: + * In 64-bit mode the typical size of immediate operands + * remains 32-bits. When the operand size if 64-bits, the + * processor sign-extends all immediates to 64-bits prior + * to their use. + */ + if ((vie->opsize == 4U) || (vie->opsize == 8U)) { + vie->imm_bytes = 4U; + } + else { + vie->imm_bytes = 2U; + } + } else if ((vie->op.op_flags & VIE_OP_F_IMM8) != 0U) { + vie->imm_bytes = 1U; + } else { + /* No op_flag on immediate operand size */ + } + + n = vie->imm_bytes; + if (n != 0U) { + if ((n != 1U) && (n != 2U) && (n != 4U)) { + printc("%s: invalid number of immediate bytes: %d", __func__, n); + ret = -EINVAL; + } else { + for (i = 0U; i < n; i++) { + if (vie_peek(vie, &x) != 0) { + ret = -1; + break; + } + + u.buf[i] = x; + vie_advance(vie); + } + + if (ret == 0) { + /* sign-extend the immediate value before use */ + if (n == 1U) { + vie->immediate = u.signed8; + } else if (n == 2U) { + vie->immediate = u.signed16; + } else { + vie->immediate = u.signed32; + } + } + } + } + + return ret; +} + +static int32_t decode_moffset(struct instr_emul_vie *vie) +{ + uint8_t i, n, x; + int32_t ret = 0; + union { + uint8_t buf[8]; + uint64_t u64; + } u; + + if ((vie->op.op_flags & VIE_OP_F_MOFFSET) != 0U) { + /* + * Section 2.2.1.4, "Direct Memory-Offset MOVs", Intel SDM: + * The memory offset size follows the address-size of the instruction. + */ + n = vie->addrsize; + if ((n != 2U) && (n != 4U) && (n != 8U)) { + printc("%s: invalid moffset bytes: %hhu", __func__, n); + ret = -EINVAL; + } else { + u.u64 = 0UL; + for (i = 0U; i < n; i++) { + if (vie_peek(vie, &x) != 0) { + ret = -1; + break; + } + + u.buf[i] = x; + vie_advance(vie); + } + if (ret == 0) { + vie->displacement = (int64_t)u.u64; + } + } + } + + return ret; +} + +static int32_t local_decode_instruction(struct instr_emul_vie *vie) +{ + int32_t ret; + + if (decode_prefixes(vie) != 0) { + ret = -1; + } else if (decode_opcode(vie) != 0) { + ret = -1; + } else if (decode_modrm(vie) != 0) { + ret = -1; + } else if (decode_sib(vie) != 0) { + ret = -1; + } else if (decode_displacement(vie) != 0) { + ret = -1; + } else if (decode_immediate(vie) != 0) { + ret = -1; + } else if (decode_moffset(vie) != 0) { + ret = -1; + } else { + vie->decoded = 1U; /* success */ + ret = 0; + } + + return ret; +} + +static int32_t instr_check_gva(struct vmrt_vm_vcpu *vcpu) +{ + int32_t ret = 0; + uint64_t base, segbase, idx, gva; + enum cpu_reg_name seg; + struct instr_emul_vie *vie = &((struct instr_emul_ctxt *)vcpu->inst_ctxt)->vie; + + base = 0UL; + if (vie->base_register != CPU_REG_LAST) { + base = vm_get_register(vcpu, vie->base_register); + + /* RIP relative addressing starts from the + * following instruction + */ + if (vie->base_register == CPU_REG_RIP) { + base += vie->num_processed; + } + + } + + idx = 0UL; + if (vie->index_register != CPU_REG_LAST) { + idx = vm_get_register(vcpu, vie->index_register); + } + + /* "Specifying a Segment Selector" of SDM Vol1 3.7.4 + * + * In legacy IA-32 mode, when ESP or EBP register is used as + * base, the SS segment is default segment. + * + * All data references, except when relative to stack or + * string destination, DS is default segment. + * + * segment override could overwrite the default segment + * + * 64bit mode, segmentation is generally disabled. The + * exception are FS and GS. + */ + if (vie->seg_override != 0U) { + seg = vie->segment_register; + } else if ((vie->base_register == CPU_REG_RSP) || + (vie->base_register == CPU_REG_RBP)) { + seg = CPU_REG_SS; + } else { + seg = CPU_REG_DS; + } + + if ((seg != CPU_REG_FS) && + (seg != CPU_REG_GS)) { + segbase = 0UL; + } else { + struct seg_desc desc; + + VM_PANIC(vcpu); + segbase = desc.base; + } + + gva = segbase + base + (uint64_t)vie->scale * idx + (uint64_t)vie->displacement; + + vie->gva = gva; + + if (vie_canonical_check(gva) != 0) { + VM_PANIC(vcpu); + } else { + #define PAGE_FAULT_WR_FLAG 0x00000002U + + vmrt_vm_gva2gpa(vcpu, gva); + ret = 0; + if (ret < 0) { + VM_PANIC(vcpu); + } else { + ret = 0; + } + } + + return ret; +} + +int32_t decode_instruction(struct vmrt_vm_vcpu *vcpu) +{ + struct instr_emul_ctxt *emul_ctxt; + uint32_t csar; + int32_t retval; + + emul_ctxt = vcpu->inst_ctxt; + retval = vie_init(&emul_ctxt->vie, vcpu); + + if (retval < 0) { + VM_PANIC(vcpu); + } else { + retval = local_decode_instruction(&emul_ctxt->vie); + + if (retval != 0) { + VM_PANIC(vcpu); + } else { + /* + * We do operand check in instruction decode phase and + * inject exception accordingly. In late instruction + * emulation, it will always success. + * + * We only need to do dst check for movs. For other instructions, + * they always has one register and one mmio which trigger EPT + * by access mmio. With VMX enabled, the related check is done + * by VMX itself before hit EPT violation. + * + */ + if ((emul_ctxt->vie.op.op_flags & VIE_OP_F_CHECK_GVA_DI) != 0U) { + VM_PANIC(vcpu); + } else { + retval = instr_check_gva(vcpu); + } + + if (retval >= 0) { + /* return the Memory Operand byte size */ + if ((emul_ctxt->vie.op.op_flags & VIE_OP_F_BYTE_OP) != 0U) { + retval = 1; + } else if ((emul_ctxt->vie.op.op_flags & VIE_OP_F_WORD_OP) != 0U) { + retval = 2; + } else { + retval = (int32_t)emul_ctxt->vie.opsize; + } + } + } + } + + return retval; +} + +int32_t emulate_instruction(struct vmrt_vm_vcpu *vcpu) +{ + struct instr_emul_vie *vie = &((struct instr_emul_ctxt *)vcpu->inst_ctxt)->vie; + int32_t error; + + if (vie->decoded != 0U) { + switch (vie->op.op_type) { + case VIE_OP_TYPE_MOV: + error = emulate_mov(vcpu, vie); + break; + default: + VM_PANIC(vcpu); + error = -EINVAL; + break; + } + } else { + VM_PANIC(vcpu); + error = -EINVAL; + } + + return error; +} diff --git a/src/components/implementation/simple_vmm/multi_vmm/instr_emul.h b/src/components/implementation/simple_vmm/multi_vmm/instr_emul.h new file mode 100644 index 0000000000..901428dcb4 --- /dev/null +++ b/src/components/implementation/simple_vmm/multi_vmm/instr_emul.h @@ -0,0 +1,95 @@ +/*- + * Copyright (c) 2012 NetApp, Inc. + * Copyright (c) 2017-2022 Intel Corporation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef INSTR_EMUL_H +#define INSTR_EMUL_H + +#include +#include + +struct vmrt_vm_vcpu; +struct instr_emul_vie_op { + uint8_t op_type; /* type of operation (e.g. MOV) */ + uint16_t op_flags; +}; + +#define VIE_PREFIX_SIZE 4U +#define VIE_INST_SIZE 15U +struct instr_emul_vie { + uint8_t inst[VIE_INST_SIZE]; /* instruction bytes */ + uint8_t num_valid; /* size of the instruction */ + uint8_t num_processed; + + uint8_t addrsize:4, opsize:4; /* address and operand sizes */ + uint8_t rex_w:1, /* REX prefix */ + rex_r:1, + rex_x:1, + rex_b:1, + rex_present:1, + repz_present:1, /* REP/REPE/REPZ prefix */ + repnz_present:1, /* REPNE/REPNZ prefix */ + opsize_override:1, /* Operand size override */ + addrsize_override:1, /* Address size override */ + seg_override:1; /* Segment override */ + + uint8_t mod:2, /* ModRM byte */ + reg:4, + rm:4; + + uint8_t ss:2, /* SIB byte */ + index:4, + base:4; + + uint8_t disp_bytes; + uint8_t imm_bytes; + + uint8_t scale; + enum cpu_reg_name base_register; /* CPU_REG_xyz */ + enum cpu_reg_name index_register; /* CPU_REG_xyz */ + enum cpu_reg_name segment_register; /* CPU_REG_xyz */ + + int64_t displacement; /* optional addr displacement */ + int64_t immediate; /* optional immediate operand */ + + uint8_t decoded; /* set to 1 if successfully decoded */ + + uint8_t opcode; + struct instr_emul_vie_op op; /* opcode description */ + + uint64_t dst_gpa; /* saved dst operand gpa. Only for movs */ + uint64_t gva; /* saved gva for instruction emulation */ +}; + +struct instr_emul_ctxt { + struct instr_emul_vie vie; +}; + +int32_t emulate_instruction(struct vmrt_vm_vcpu *vcpu); +int32_t decode_instruction(struct vmrt_vm_vcpu *vcpu); + +#endif diff --git a/src/components/implementation/simple_vmm/multi_vmm/ioapic.h b/src/components/implementation/simple_vmm/multi_vmm/ioapic.h new file mode 100644 index 0000000000..55b214a1e4 --- /dev/null +++ b/src/components/implementation/simple_vmm/multi_vmm/ioapic.h @@ -0,0 +1,99 @@ +/* + * Copyright (C) 2018-2022 Intel Corporation. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef ARCH_X86_IOAPIC_H +#define ARCH_X86_IOAPIC_H + +#include + +#define NR_LEGACY_IRQ 16U +#define NR_LEGACY_PIN NR_LEGACY_IRQ + +struct ioapic_info { + uint8_t id; /* IOAPIC ID as indicated in ACPI MADT */ + uint32_t addr; /* IOAPIC Register address */ + uint32_t gsi_base; /* Global System Interrupt where this IO-APIC's interrupt input start */ + uint32_t nr_pins; /* Number of Interrupt inputs as determined by Max. Redir Entry Register */ +}; + +void ioapic_setup_irqs(void); + +bool is_ioapic_irq(uint32_t irq); +uint32_t gsi_to_ioapic_pin(uint32_t gsi); +int32_t init_ioapic_id_info(void); +uint8_t ioapic_irq_to_ioapic_id(uint32_t irq); + +uint8_t get_platform_ioapic_info (struct ioapic_info **plat_ioapic_info); + +/** + * @defgroup ioapic_ext_apis IOAPIC External Interfaces + * + * This is a group that includes IOAPIC External Interfaces. + * + * @{ + */ + +/** + * @brief Get irq num from gsi num + * + * @param[in] gsi The gsi number + * + * @return irq number + */ +uint32_t ioapic_gsi_to_irq(uint32_t gsi); +/** + * @brief Set the redirection table entry + * + * Set the redirection table entry of an interrupt + * + * @param[in] irq The number of irq to set + * @param[in] rte Union of ioapic_rte to set + */ +void ioapic_set_rte(uint32_t irq, union ioapic_rte rte); + +/** + * @brief Get the redirection table entry + * + * Get the redirection table entry of an interrupt + * + * @param[in] irq The number of irq to fetch RTE + * @param[inout] rte Pointer to union ioapic_rte to return result RTE + * + * @pre rte != NULL + */ +void ioapic_get_rte(uint32_t irq, union ioapic_rte *rte); + +/** + * @brief Suspend ioapic + * + * Suspend ioapic, mainly save the RTEs. + */ +void suspend_ioapic(void); + +/** + * @brief Resume ioapic + * + * Resume ioapic, mainly restore the RTEs. + */ +void resume_ioapic(void); + +/** + * @} + */ +/* End of ioapic_ext_apis */ + +void ioapic_gsi_mask_irq(uint32_t irq); +void ioapic_gsi_unmask_irq(uint32_t irq); + +void ioapic_get_rte_entry(void *ioapic_base, uint32_t pin, union ioapic_rte *rte); + +void *gsi_to_ioapic_base(uint32_t gsi); +uint32_t get_max_nr_gsi(void); +uint8_t get_gsi_to_ioapic_index(uint32_t gsi); +uint32_t get_pic_pin_from_ioapic_pin(uint32_t pin_index); +bool is_gsi_valid(uint32_t gsi); + +#endif /* ARCH_X86_IOAPIC_H */ diff --git a/src/components/implementation/simple_vmm/multi_vmm/irq.h b/src/components/implementation/simple_vmm/multi_vmm/irq.h new file mode 100644 index 0000000000..06c21c902a --- /dev/null +++ b/src/components/implementation/simple_vmm/multi_vmm/irq.h @@ -0,0 +1,136 @@ +/* + * Copyright (C) 2018-2022 Intel Corporation. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef ARCH_X86_IRQ_H +#define ARCH_X86_IRQ_H + +#include + +/** + * @file arch/x86/asm/irq.h + * + * @brief public APIs for x86 IRQ handling + */ + +#define DBG_LEVEL_PTIRQ 6U +#define DBG_LEVEL_IRQ 6U + +#define NR_MAX_VECTOR 0xFFU +#define VECTOR_INVALID (NR_MAX_VECTOR + 1U) + +/* # of NR_STATIC_MAPPINGS_1 entries for timer, vcpu notify, and PMI */ +#define NR_STATIC_MAPPINGS_1 3U + +/* + * The static IRQ/Vector mapping table in irq.c consists of the following entries: + * # of NR_STATIC_MAPPINGS_1 entries for timer, vcpu notify, and PMI + * + * # of CONFIG_MAX_VM_NUM entries for posted interrupt notification, platform + * specific but known at build time: + * Allocate unique Activation Notification Vectors (ANV) for each vCPU that belongs + * to the same pCPU, the ANVs need only be unique within each pCPU, not across all + * vCPUs. The max numbers of vCPUs may be running on top of a pCPU is CONFIG_MAX_VM_NUM, + * since ACRN does not support 2 vCPUs of same VM running on top of same pCPU. + * This reduces # of pre-allocated ANVs for posted interrupts to CONFIG_MAX_VM_NUM, + * and enables ACRN to avoid switching between active and wake-up vector values + * in the posted interrupt descriptor on vCPU scheduling state changes. + */ +#define NR_STATIC_MAPPINGS (NR_STATIC_MAPPINGS_1 + CONFIG_MAX_VM_NUM) + +#define HYPERVISOR_CALLBACK_HSM_VECTOR 0xF3U + +/* vectors range for dynamic allocation, usually for devices */ +#define VECTOR_DYNAMIC_START 0x20U +#define VECTOR_DYNAMIC_END 0xDFU + +/* vectors range for fixed vectors, usually for HV service */ +#define VECTOR_FIXED_START 0xE0U +#define VECTOR_FIXED_END 0xFFU + +#define TIMER_VECTOR (VECTOR_FIXED_START) +#define NOTIFY_VCPU_VECTOR (VECTOR_FIXED_START + 1U) +#define PMI_VECTOR (VECTOR_FIXED_START + 2U) +/* + * Starting vector for posted interrupts + * # of CONFIG_MAX_VM_NUM (POSTED_INTR_VECTOR ~ (POSTED_INTR_VECTOR + CONFIG_MAX_VM_NUM - 1U)) + * consecutive vectors reserved for posted interrupts + */ +#define POSTED_INTR_VECTOR (VECTOR_FIXED_START + NR_STATIC_MAPPINGS_1) + +#define TIMER_IRQ (NR_IRQS - 1U) +#define NOTIFY_VCPU_IRQ (NR_IRQS - 2U) +#define PMI_IRQ (NR_IRQS - 3U) +/* + * Starting IRQ for posted interrupts + * # of CONFIG_MAX_VM_NUM (POSTED_INTR_IRQ ~ (POSTED_INTR_IRQ + CONFIG_MAX_VM_NUM - 1U)) + * consecutive IRQs reserved for posted interrupts + */ +#define POSTED_INTR_IRQ (NR_IRQS - NR_STATIC_MAPPINGS_1 - CONFIG_MAX_VM_NUM) + +/* the maximum number of msi entry is 2048 according to PCI + * local bus specification + */ +#define MAX_MSI_ENTRY 0x800U + +#define INVALID_INTERRUPT_PIN 0xffffffffU + +/* + * x86 irq data + */ +struct x86_irq_data { + uint32_t vector; /**< assigned vector */ +#ifdef PROFILING_ON + uint64_t ctx_rip; + uint64_t ctx_rflags; + uint64_t ctx_cs; +#endif +}; + +struct intr_excp_ctx; + +/** + * @brief Allocate a vectror and bind it to irq + * + * For legacy irq (num < 16) and statically mapped ones, do nothing + * if mapping is correct. + * + * @param[in] irq The irq num to bind + * + * @return valid vector num on susccess, VECTOR_INVALID on failure + */ +uint32_t alloc_irq_vector(uint32_t irq); + +/** + * @brief Get vector number of an interrupt from irq number + * + * @param[in] irq The irq_num to convert + * + * @return vector number + */ +uint32_t irq_to_vector(uint32_t irq); + +/** + * @brief Dispatch interrupt + * + * To dispatch an interrupt, an action callback will be called if registered. + * + * @param ctx Pointer to interrupt exception context + */ +void dispatch_interrupt(const struct intr_excp_ctx *ctx); + +/* Arch specific routines called from generic IRQ handling */ + +struct irq_desc; + +void init_irq_descs_arch(struct irq_desc *descs); +void setup_irqs_arch(void); +void init_interrupt_arch(uint16_t pcpu_id); +void free_irq_arch(uint32_t irq); +bool request_irq_arch(uint32_t irq); +void pre_irq_arch(const struct irq_desc *desc); +void post_irq_arch(const struct irq_desc *desc); + +#endif /* ARCH_X86_IRQ_H */ diff --git a/src/components/implementation/simple_vmm/multi_vmm/netio.c b/src/components/implementation/simple_vmm/multi_vmm/netio.c new file mode 100644 index 0000000000..cc0e4acdbb --- /dev/null +++ b/src/components/implementation/simple_vmm/multi_vmm/netio.c @@ -0,0 +1,274 @@ +#include +#include +#include +#include +#include +#include +#include +#include + +shm_bm_objid_t +netio_get_a_packet(u16_t *pkt_len) +{ + struct netshmem_pkt_buf *tx_obj; + shm_bm_t tx_shmemd = 0; + shm_bm_objid_t tx_pktid; + u16_t _pkt_len = 0; + + tx_shmemd = netshmem_get_shm(); + tx_obj = shm_bm_alloc_net_pkt_buf(tx_shmemd, &tx_pktid); + assert(tx_obj); + + virtio_net_send_one_pkt(tx_obj->data, &_pkt_len); + *pkt_len = _pkt_len; + + return tx_pktid; +} + +void pkt_hex_dump(void *_data, u16_t len) +{ + int rowsize = 16; + int i, l, linelen, remaining; + int li = 0; + u8_t *data, ch; + + data = _data; + + printc("Packet hex dump, len:%d\n", len); + remaining = len; + for (i = 0; i < len; i += rowsize) { + printc("%06d\t", li); + + linelen = remaining < rowsize ? remaining : rowsize; + remaining -= rowsize; + + for (l = 0; l < linelen; l++) { + ch = data[l]; + printc( "%02X ", (u32_t) ch); + } + + data += linelen; + li += 10; + + printc( "dump done\n"); + } +} + +#if 0 +shm_bm_objid_t +netio_get_a_packet_batch(u8_t batch_limit) +{ + struct netshmem_pkt_buf *tx_obj; + shm_bm_t tx_shmemd = 0; + shm_bm_objid_t tx_pktid; + u16_t _pkt_len = 0; + shm_bm_objid_t first_objid; + struct netshmem_pkt_buf *first_obj; + struct netshmem_pkt_pri *first_obj_pri; + struct netshmem_meta_tuple *pkt_arr; + u8_t batch_ct = 0; + + tx_shmemd = netshmem_get_shm(); + tx_obj = first_obj = shm_bm_alloc_net_pkt_buf(tx_shmemd, &tx_pktid); + assert(tx_obj); + first_objid = tx_pktid; + first_obj_pri = netshmem_get_pri(tx_obj); + pkt_arr = (struct netshmem_meta_tuple *)&first_obj_pri->pkt_arr; + first_obj_pri->batch_len = 0; + + while (batch_ct < batch_limit) { + assert(tx_obj); + if (likely(batch_ct > 0)) { + tx_obj = shm_bm_alloc_net_pkt_buf(tx_shmemd, &tx_pktid); + assert(tx_obj); + } + + virtio_net_send_one_pkt(netshmem_get_data_buf(tx_obj), &_pkt_len); + + // pkt_hex_dump(netshmem_get_data_buf(tx_obj), _pkt_len); + if (likely(_pkt_len != 0)) { + pkt_arr[batch_ct].obj_id = tx_pktid; + pkt_arr[batch_ct].pkt_len = _pkt_len; + batch_ct++; + } else { + if (batch_ct == 0) { + sched_thd_yield(); + } else { + shm_bm_free_net_pkt_buf(tx_obj); + break; + } + } + } + first_obj_pri->batch_len = batch_ct; + return first_objid; +} +#endif + +struct nf_svc { + int svc_id; + struct vmrt_vm_comp *vm; +}; + +#define MAX_NFS 10 +#define MAX_THD_PER_NF 100 + +static struct nf_svc nf_svc_tbl[MAX_NFS][MAX_THD_PER_NF]; + +void +nf_svc_update(compid_t nf_id, int thd, int svc_id, struct vmrt_vm_comp *vm) +{ + // printc("svc update:%d, %d, %d\n", nf_id, thd, nf_svc_tbl[nf_id][thd].svc_id); + if (nf_svc_tbl[nf_id][thd].svc_id < 0) { + nf_svc_tbl[nf_id][thd].svc_id = svc_id; + nf_svc_tbl[nf_id][thd].vm = vm; + } else { + return; + } +} + +void +nf_svc_init(void) +{ + for (int i = 0; i < MAX_NFS; i++) { + for (int j = 0; j < MAX_THD_PER_NF; j++) { + nf_svc_tbl[i][j].svc_id = -1; + nf_svc_tbl[i][j].vm = NULL; + } + } +} + +shm_bm_objid_t +netio_get_a_packet_batch(u8_t batch_limit) +{ + shm_bm_objid_t first_objid; + struct netshmem_pkt_buf *first_obj; + struct netshmem_pkt_pri *first_obj_pri; + struct netshmem_pkt_buf *tx_obj; + shm_bm_objid_t tx_pktid; + struct netshmem_meta_tuple *pkt_arr; + + struct nf_session *session; + struct nf_pkt_meta_data buf; + u8_t batch_ct = 0; + compid_t vmm_id = cos_compid(); + compid_t nf_id = (compid_t)cos_inv_token(); + if (nf_id == 0) nf_id = vmm_id; + thdid_t nf_thd = cos_thdid(); + + int svc_id = nf_svc_tbl[nf_id][nf_thd].svc_id; + + if (svc_id < 0) { + printc("no svc available for this nf:%d, thd:%d\n", nf_id, nf_thd); + assert(0); + } + + session = get_nf_session(svc_id); + + while (nf_tx_ring_buf_empty(&session->nf_tx_ring_buf)) { + sched_thd_yield(); + } + + assert(nf_tx_ring_buf_dequeue(&session->nf_tx_ring_buf, &buf)); + tx_obj = first_obj = buf.obj; + assert(tx_obj); + tx_pktid = first_objid = buf.objid; + first_obj_pri = netshmem_get_pri(tx_obj); + pkt_arr = (struct netshmem_meta_tuple *)&first_obj_pri->pkt_arr; + first_obj_pri->batch_len = 0; + + pkt_arr[batch_ct].obj_id = tx_pktid; + pkt_arr[batch_ct].pkt_len = buf.pkt_len; + batch_ct++; + + while (batch_ct < batch_limit && nf_tx_ring_buf_dequeue(&session->nf_tx_ring_buf, &buf)) { + // printc("netio out a pkt, batch_ct:%d\n", batch_ct); + pkt_arr[batch_ct].obj_id = buf.objid; + pkt_arr[batch_ct].pkt_len = buf.pkt_len; + batch_ct++; + } + + first_obj_pri->batch_len = batch_ct; + return first_objid; +} + +int +netio_send_packet(shm_bm_objid_t pktid, u16_t pkt_len) +{ + struct netshmem_pkt_buf *rx_obj; + shm_bm_t rx_shmemd = 0; + + rx_shmemd = netshmem_get_shm(); + + rx_obj = shm_bm_transfer_net_pkt_buf(rx_shmemd, pktid); + virtio_net_rcv_one_pkt(rx_obj->data, pkt_len); + shm_bm_free_net_pkt_buf(rx_obj); + + return 0; +} + + +int +netio_send_packet_batch(shm_bm_objid_t pktid) +{ + struct netshmem_pkt_buf *rx_obj; + shm_bm_objid_t first_objid; + struct netshmem_pkt_buf *first_obj; + struct netshmem_pkt_pri *first_obj_pri; + struct netshmem_meta_tuple *pkt_arr; + u16_t pkt_len; + u8_t batch_tc = 0; + shm_bm_t rx_shmemd = 0; + + rx_shmemd = netshmem_get_shm(); + first_objid = pktid; + + + first_obj = shm_bm_transfer_net_pkt_buf(rx_shmemd, first_objid); + + first_obj_pri = netshmem_get_pri(first_obj); + pkt_arr = (struct netshmem_meta_tuple *)&(first_obj_pri->pkt_arr); + batch_tc = first_obj_pri->batch_len; + + pkt_len = pkt_arr[0].pkt_len; + // pkt_hex_dump(netshmem_get_data_buf(first_obj), pkt_len); + virtio_net_rcv_one_pkt(netshmem_get_data_buf(first_obj), pkt_len); + + for (u8_t i = 1; i < batch_tc; i++) { + pkt_len = pkt_arr[i].pkt_len; + pktid = pkt_arr[i].obj_id; + rx_obj = shm_bm_transfer_net_pkt_buf(rx_shmemd, pktid); + virtio_net_rcv_one_pkt(netshmem_get_data_buf(rx_obj), pkt_len); + shm_bm_free_net_pkt_buf(rx_obj); + } + + shm_bm_free_net_pkt_buf(first_obj); + + return 0; +} + +void +netio_shmem_map(cbuf_t shm_id) +{ + netshmem_map_shmem(shm_id); +} + +extern struct vmrt_vm_comp *vm_list[2]; + +void +netio_svc_update(int svc_id, u32_t vm) +{ + compid_t nf_id = cos_inv_token(); + thdid_t thd = cos_thdid(); + assert(vm < 2); + shm_bm_t tx_shm = netshmem_get_shm(); + assert(tx_shm); + + nf_svc_update(nf_id, thd, svc_id, vm_list[vm]); + + struct nf_session *session; + session = get_nf_session(svc_id); + nf_session_tx_update(session, tx_shm, thd); + sync_sem_init(&session->tx_sem, 0); + + nf_tx_ring_buf_init(&session->nf_tx_ring_buf, NF_TX_PKT_RBUF_NUM, NF_TX_PKT_RING_SZ); +} diff --git a/src/components/implementation/simple_vmm/multi_vmm/nf_session.c b/src/components/implementation/simple_vmm/multi_vmm/nf_session.c new file mode 100644 index 0000000000..a5d56bdb82 --- /dev/null +++ b/src/components/implementation/simple_vmm/multi_vmm/nf_session.c @@ -0,0 +1,74 @@ +#pragma once + +#include + +CK_RING_PROTOTYPE(nf_tx_ring_buf, nf_pkt_meta_data); + +static char ring_buffers[NF_TX_MAX_RING_NUM][NF_TX_PKT_RING_SZ]; +static struct nf_session nf_sessions[MAX_SVC_NUM]; + +void +nf_sessions_init(void) +{ + for (int i = 0; i < MAX_SVC_NUM; i++) { + nf_sessions[i].rx_shmemd = 0; + nf_sessions[i].rx_thd = 0; + nf_sessions[i].tx_shmemd = 0; + nf_sessions[i].tx_thd = 0; + nf_sessions[i].nf_tx_ring_buf.ring = 0; + nf_sessions[i].nf_tx_ring_buf.ringbuf = 0; + + } +} + +void +nf_tx_ring_buf_init(struct nf_tx_ring_buf *pkt_ring_buf, size_t ringbuf_num, size_t ringbuf_sz) +{ + struct ck_ring *buf_addr; + + /* prevent multiple thread from contending memory */ + assert(cos_thdid() < 30); + buf_addr = (struct ck_ring *)&ring_buffers[cos_thdid()]; + + ck_ring_init(buf_addr, ringbuf_num); + + pkt_ring_buf->ring = buf_addr; + pkt_ring_buf->ringbuf = (struct pkt_buf *)((char *)buf_addr + sizeof(struct ck_ring)); +} + +inline int +nf_tx_ring_buf_enqueue(struct nf_tx_ring_buf *pkt_ring_buf, struct nf_pkt_meta_data *buf) +{ + assert(pkt_ring_buf->ring && pkt_ring_buf->ringbuf); + + return CK_RING_ENQUEUE_SPSC(nf_tx_ring_buf, pkt_ring_buf->ring, pkt_ring_buf->ringbuf, buf); +} + +inline int +nf_tx_ring_buf_dequeue(struct nf_tx_ring_buf *pkt_ring_buf, struct nf_pkt_meta_data *buf) +{ + assert(pkt_ring_buf->ring && pkt_ring_buf->ringbuf); + + return CK_RING_DEQUEUE_SPSC(nf_tx_ring_buf, pkt_ring_buf->ring, pkt_ring_buf->ringbuf, buf); +} + +inline int +nf_tx_ring_buf_empty(struct nf_tx_ring_buf *pkt_ring_buf) +{ + assert(pkt_ring_buf->ring); + + return (!ck_ring_size(pkt_ring_buf->ring)); +} + +struct nf_session *get_nf_session(int svc_id) +{ + if (unlikely(svc_id < 0 || svc_id > 1000)) return &nf_sessions[0]; + else return &nf_sessions[svc_id]; +} + +void +nf_session_tx_update(struct nf_session *session, shm_bm_t tx_shmemd, thdid_t tx_thd) +{ + session->tx_shmemd = tx_shmemd; + session->tx_thd = tx_thd; +} diff --git a/src/components/implementation/simple_vmm/multi_vmm/nf_session.h b/src/components/implementation/simple_vmm/multi_vmm/nf_session.h new file mode 100644 index 0000000000..00f81a0d44 --- /dev/null +++ b/src/components/implementation/simple_vmm/multi_vmm/nf_session.h @@ -0,0 +1,49 @@ +#include +#include +#include +#include + +struct nf_pkt_meta_data { + void *obj; + shm_bm_objid_t objid; + u16_t pkt_len; +}; + +struct nf_tx_ring_buf { + struct ck_ring *ring; + struct nf_pkt_meta_data *ringbuf; +}; + +struct nf_session { + shm_bm_t rx_shmemd; + shm_bm_t tx_shmemd; + + thdid_t rx_thd; + thdid_t tx_thd; + + struct sync_sem tx_sem; + + struct nf_tx_ring_buf nf_tx_ring_buf; +}; + +#define NF_TX_PKT_RBUF_NUM 512 +#define NF_TX_PKT_RBUF_SZ (NF_TX_PKT_RBUF_NUM * sizeof(struct nf_tx_ring_buf)) +#define NF_TX_PKT_RING_SZ (sizeof(struct ck_ring) + NF_TX_PKT_RBUF_SZ) +#define NF_TX_PKT_RING_PAGES (round_up_to_page(NF_TX_PKT_RING_SZ)/PAGE_SIZE) + +#define NF_TX_MAX_RING_NUM 30 + +#define MAX_NF_SESSION 10 + +#define MAX_SVC_NUM (20000) + +struct nf_session *get_nf_session(int svc_id); +void nf_session_tx_update(struct nf_session *session, shm_bm_t tx_shmemd, thdid_t tx_thd); +void nf_tx_ring_buf_init(struct nf_tx_ring_buf *pkt_ring_buf, size_t ringbuf_num, size_t ringbuf_sz); +int nf_tx_ring_buf_enqueue(struct nf_tx_ring_buf *pkt_ring_buf, struct nf_pkt_meta_data *buf); +int nf_tx_ring_buf_dequeue(struct nf_tx_ring_buf *pkt_ring_buf, struct nf_pkt_meta_data *buf); +int nf_tx_ring_buf_empty(struct nf_tx_ring_buf *pkt_ring_buf); + +void nf_svc_update(compid_t nf_id, int thd_id, int svc_id, struct vmrt_vm_comp *vm); +void nf_svc_init(void); +void nf_sessions_init(void); diff --git a/src/components/implementation/simple_vmm/multi_vmm/simple_vmm.c b/src/components/implementation/simple_vmm/multi_vmm/simple_vmm.c new file mode 100644 index 0000000000..a05244d9f7 --- /dev/null +++ b/src/components/implementation/simple_vmm/multi_vmm/simple_vmm.c @@ -0,0 +1,381 @@ +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include + +#define NF_THD_PRIORITY 31 + +#define NO_NF_TEST 1 + +#define RX_BATCH 1 +#define TX_BATCH 1 + +#define RX_PROCESSING 0 +#define TX_PROCESSING 0 + +thdid_t rx_tid = 0; +thdid_t tx_tid = 0; + +thdid_t virtio_tx_tid = 0; + +char tx_nf_buffer[4096]; +char rx_nf_buffer[4096]; + + +INCBIN(vmlinux, "guest/vmlinux.img") +INCBIN(bios, "guest/guest.img") + +/* Currently only have one VM component globally managed by this VMM */ +static struct vmrt_vm_comp *g_vm; +static struct vmrt_vm_comp *g_vm1; + +struct vmrt_vm_comp *vm_list[2] = {0}; + +#define VM_MAX_COMPS (2) +#define GUEST_MEM_SZ (310*1024*1024) + +SS_STATIC_SLAB(vm_comp, struct vmrt_vm_comp, VM_MAX_COMPS); +SS_STATIC_SLAB(vm_lapic, struct acrn_vlapic, VM_MAX_COMPS * VMRT_VM_MAX_VCPU); +SS_STATIC_SLAB(vcpu_inst_ctxt, struct instr_emul_ctxt, VM_MAX_COMPS * VMRT_VM_MAX_VCPU); +SS_STATIC_SLAB(vm_io_apic, struct acrn_vioapics, VM_MAX_COMPS); +SS_STATIC_SLAB(vcpu_mmio_req, struct acrn_mmio_request, VM_MAX_COMPS * VMRT_VM_MAX_VCPU); + +struct sync_lock vm_boot_lock; + +void +pause_handler(struct vmrt_vm_vcpu *vcpu) +{ + sched_thd_yield(); + GOTO_NEXT_INST(vcpu->shared_region); +} + +void +hlt_handler(struct vmrt_vm_vcpu *vcpu) +{ + sched_thd_yield(); + GOTO_NEXT_INST(vcpu->shared_region); +} + +void +mmio_init(struct vmrt_vm_vcpu *vcpu) +{ + vcpu->mmio_request = ss_vcpu_mmio_req_alloc(); + assert(vcpu->mmio_request); + + ss_vcpu_mmio_req_activate(vcpu->mmio_request); +} + +void +ioapic_init(struct vmrt_vm_comp *vm) +{ + vm->ioapic = ss_vm_io_apic_alloc(); + assert(vm->ioapic); + + vioapic_init(vm); + ss_vm_io_apic_activate(vm->ioapic); +} + +void +iinst_ctxt_init(struct vmrt_vm_vcpu *vcpu) +{ + vcpu->inst_ctxt = ss_vcpu_inst_ctxt_alloc(); + assert(vcpu->inst_ctxt); + + ss_vcpu_inst_ctxt_activate(vcpu->inst_ctxt); +} + +void +lapic_init(struct vmrt_vm_vcpu *vcpu) +{ + struct acrn_vlapic *vlapic = ss_vm_lapic_alloc(); + assert(vlapic); + + /* A vcpu can only have one vlapic */ + assert(vcpu->vlapic == NULL); + + vcpu->vlapic = vlapic; + vlapic->apic_page = vcpu->lapic_page; + vlapic->vcpu = vcpu; + + /* Status: enable APIC and vector be 0xFF */ + vlapic_reset(vlapic); + + ss_vm_lapic_activate(vlapic); + return; +} + +struct vmrt_vm_comp * +vm_comp_create(void) +{ + u64_t guest_mem_sz = GUEST_MEM_SZ; + u64_t num_vcpu = 1; + void *start; + void *end; + cbuf_t shm_id; + void *mem, *vm_mem; + size_t sz; + + struct vmrt_vm_comp *vm = ss_vm_comp_alloc(); + assert(vm); + + vmrt_vm_create(vm, "vmlinux-5.15", num_vcpu, guest_mem_sz); + + /* Allocate memory for the VM */ + shm_id = memmgr_shared_page_allocn_aligned(guest_mem_sz / PAGE_SIZE_4K, PAGE_SIZE_4K, (vaddr_t *)&mem); + /* Make the memory accessible to VM */ + int ret = memmgr_shared_page_map_aligned_in_vm(shm_id, PAGE_SIZE_4K, (vaddr_t *)&vm_mem, vm->comp_id); + vmrt_vm_mem_init(vm, mem); + printc("created VM with %u cpus, memory size: %luMB, at host vaddr: %p\n", vm->num_vcpu, vm->guest_mem_sz/1024/1024, vm->guest_addr); + + ss_vm_comp_activate(vm); + + start = &incbin_bios_start; + end = &incbin_bios_end; + sz = end - start + 1; + + printc("BIOS image start: %p, end: %p, size: %lu(%luKB)\n", start, end, sz, sz/1024); + vmrt_vm_data_copy_to(vm, start, sz, PAGE_SIZE_4K); + + start = &incbin_vmlinux_start; + end = &incbin_vmlinux_end; + sz = end - start + 1; + + printc("Guest Linux image start: %p, end: %p, size: %lu(%luMB)\n", start, end, sz, sz/1024/1024); + #define GUEST_IMAGE_ADDR 0x100000 + vmrt_vm_data_copy_to(vm, start, sz, GUEST_IMAGE_ADDR); + + ioapic_init(vm); + + printc("Guest(%s) image has been loaded into the VM component\n", vm->name); + + return vm; +} + +#if 0 +static void +tx_task(void) +{ + u16_t pkt_len; + shm_bm_objid_t objid; + + // netio_shmem_map(netshmem_get_shm_id()); + nic_shmem_map(netshmem_get_shm_id()); + + shm_bm_objid_t first_objid; + struct netshmem_pkt_buf *first_obj; + struct netshmem_pkt_pri *first_obj_pri; + struct netshmem_meta_tuple *pkt_arr; + u8_t tx_batch_ct = 0; + struct netshmem_pkt_buf *tx_obj; + + nic_bind_port(0, 1); + + shm_bm_t tx_shmemd = 0; + tx_shmemd = netshmem_get_shm(); + + while(1) { +#if !TX_BATCH + objid = netio_get_a_packet(&pkt_len); + nic_send_packet(objid, 0, pkt_len); + +#else + u8_t batch_ct = 32; + + first_objid = objid = netio_get_a_packet_batch(batch_ct); + first_obj = shm_bm_transfer_net_pkt_buf(tx_shmemd, objid); + first_obj_pri = netshmem_get_pri(first_obj); + pkt_arr = (struct netshmem_meta_tuple *)&(first_obj_pri->pkt_arr); + tx_batch_ct = first_obj_pri->batch_len; + +#if TX_PROCESSING + for (u8_t i = 0; i < tx_batch_ct; i++) { + pkt_len = pkt_arr[i].pkt_len; + objid = pkt_arr[i].obj_id; + tx_obj = shm_bm_transfer_net_pkt_buf(tx_shmemd, objid); + memcpy(tx_nf_buffer, netshmem_get_data_buf(tx_obj), pkt_len); + } +#endif + nic_send_packet_batch(first_objid); +#endif + } +} +#endif + +static void +rx_task(void) +{ + /* TODO: port NF applications here */ + shm_bm_objid_t objid; + struct netshmem_pkt_buf *rx_obj; + shm_bm_objid_t first_objid; + struct netshmem_pkt_buf *first_obj; + struct netshmem_pkt_pri *first_obj_pri; + struct netshmem_meta_tuple *pkt_arr; + u16_t pkt_len; + u32_t ip; + + u8_t batch_ct = 50; + + // netio_shmem_map(netshmem_get_shm_id()); + nic_shmem_map(netshmem_get_shm_id()); + ip = inet_addr("10.10.1.3"); + + nic_bind_port(ip, 0); + + int i = 0; + u64_t times = 0; + u64_t overhead = 0; + + shm_bm_t rx_shmemd = 0; + + rx_shmemd = netshmem_get_shm(); + while(1) + { + u8_t rx_batch_ct = 0; +#if !RX_BATCH + objid = nic_get_a_packet(&pkt_len); + netio_send_packet(objid, pkt_len); +#else + first_objid = nic_get_a_packet_batch(batch_ct); + + first_obj = shm_bm_transfer_net_pkt_buf(rx_shmemd, first_objid); + first_obj_pri = netshmem_get_pri(first_obj); + pkt_arr = (struct netshmem_meta_tuple *)&(first_obj_pri->pkt_arr); + rx_batch_ct = first_obj_pri->batch_len; +#if RX_PROCESSING + for (u8_t i = 0; i < rx_batch_ct; i++) { + pkt_len = pkt_arr[i].pkt_len; + objid = pkt_arr[i].obj_id; + rx_obj = shm_bm_transfer_net_pkt_buf(rx_shmemd, objid); + memcpy(rx_nf_buffer, netshmem_get_data_buf(rx_obj), pkt_len); + } +#endif + + netio_send_packet_batch(first_objid); +#endif + } +} + +static void +tx_task(void) +{ + u16_t pkt_len; + shm_bm_objid_t objid; + + nic_shmem_map(netshmem_get_shm_id()); + + shm_bm_objid_t first_objid; + struct netshmem_pkt_buf *first_obj; + struct netshmem_pkt_pri *first_obj_pri; + struct netshmem_meta_tuple *pkt_arr; + u8_t tx_batch_ct = 0; + struct netshmem_pkt_buf *tx_obj; + u32_t ip; + + shm_bm_t tx_shmemd = 0; + tx_shmemd = netshmem_get_shm(); + ip = inet_addr("10.10.1.3"); + + nic_bind_port(ip, 1); + int svc_id = 0; + + nf_svc_update(cos_compid(), cos_thdid(), svc_id, g_vm); + + struct nf_session *session; + session = get_nf_session(svc_id); + nf_session_tx_update(session, tx_shmemd, cos_thdid()); + sync_sem_init(&session->tx_sem, 0); + + nf_tx_ring_buf_init(&session->nf_tx_ring_buf, NF_TX_PKT_RBUF_NUM, NF_TX_PKT_RING_SZ); + + virtio_tx_task(0); +} + +void +cos_init(void) +{ + + nf_svc_init(); + nf_sessions_init(); + + struct vmrt_vm_vcpu *vcpu; + g_vm = vm_comp_create(); + printc("created vm done:%d, %p\n", g_vm->comp_id, g_vm); + g_vm->vm_mac_id = 0; + + vm_list[0] = g_vm; +} + +void +cos_parallel_init(coreid_t cid, int init_core, int ncores) +{ + struct vmrt_vm_vcpu *vcpu; + + if (cid == 0) { + } else { + rx_tid = sched_thd_create((void *)rx_task, NULL); + netshmem_create(rx_tid); + tx_tid = sched_thd_create((void *)tx_task, NULL); + netshmem_create(tx_tid); + printc("NF rx tid:%ld, tx tid:%ld\n", rx_tid, tx_tid); + + vmrt_vm_vcpu_init(g_vm, 0); + vcpu = vmrt_get_vcpu(g_vm, 0); + + lapic_init(vcpu); + iinst_ctxt_init(vcpu); + mmio_init(vcpu); + } + + return; +} + +void +parallel_main(coreid_t cid) +{ + struct vmrt_vm_vcpu *vcpu; + + if (cid == 0) { + } else if(cid == 1) { + sched_thd_block_timeout(0, time_now() + time_usec2cyc(20000000)); + printc("------STARTING SECOND VM------\n"); + vcpu = vmrt_get_vcpu(g_vm, 0); + vmrt_vm_vcpu_start(vcpu); + + sched_thd_param_set(rx_tid, sched_param_pack(SCHEDP_PRIO, NF_THD_PRIORITY)); + sched_thd_param_set(tx_tid, sched_param_pack(SCHEDP_PRIO, NF_THD_PRIORITY)); + + + } + + while (1) + { + sched_thd_block(0); + /* Should not be here, or there is a bug in the scheduler! */ + assert(0); + } + + +} diff --git a/src/components/implementation/simple_vmm/multi_vmm/vcpuid.c b/src/components/implementation/simple_vmm/multi_vmm/vcpuid.c new file mode 100644 index 0000000000..0335ccb596 --- /dev/null +++ b/src/components/implementation/simple_vmm/multi_vmm/vcpuid.c @@ -0,0 +1,766 @@ +#include +#include +#include +#include +#include +#include +#include "cpu.h" +#include "cpuid.h" +#include "vcpuid.h" +#include "cpu_caps.h" +#include "apicreg.h" + +/* + * Copyright (C) 2018-2022 Intel Corporation. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +static struct cpuinfo_x86 boot_cpu_data; +static struct vcpuid_entry vcpuid_entries[MAX_VM_VCPUID_ENTRIES]; +static u32_t g_entry_nr = 0, g_vcpuid_level, g_vcpuid_xlevel; +void memcpy_erms(void *d, const void *s, size_t slen) +{ + asm volatile ("rep; movsb" + : "=&D"(d), "=&S"(s) + : "c"(slen), "0" (d), "1" (s) + : "memory"); +} + +static uint64_t get_address_mask(uint8_t limit) +{ + return ((1UL << limit) - 1UL) & PAGE_MASK; +} + +/* + * @brief Copies at most slen bytes from src address to dest address, up to dmax. + * + * INPUTS + * + * @param[in] d pointer to Destination address + * @param[in] dmax maximum length of dest + * @param[in] s pointer to Source address + * @param[in] slen maximum number of bytes of src to copy + * + * @return 0 for success and -1 for runtime-constraint violation. + */ +int32_t memcpy_s(void *d, size_t dmax, const void *s, size_t slen) +{ + int32_t ret = -1; + + if ((d != NULL) && (s != NULL) && (dmax >= slen) && ((d > (s + slen)) || (s > (d + dmax)))) { + if (slen != 0U) { + memcpy_erms(d, s, slen); + } + ret = 0; + } else { + (void)memset(d, 0U, dmax); + } + + return ret; +} + +uint32_t get_tsc_khz(void) +{ + //3100.000 MHz + return 3100000; +} + +struct cpuinfo_x86 *get_pcpu_info(void) +{ + return &boot_cpu_data; +} + +/** + * initialization of virtual CPUID leaf + */ +static void init_vcpuid_entry(uint32_t leaf, uint32_t subleaf, + uint32_t flags, struct vcpuid_entry *entry) +{ + struct cpuinfo_x86 *cpu_info; + + entry->leaf = leaf; + entry->subleaf = subleaf; + entry->flags = flags; + + switch (leaf) { + + case 0x06U: + cpuid_subleaf(leaf, subleaf, &entry->eax, &entry->ebx, &entry->ecx, &entry->edx); + entry->eax &= ~(CPUID_EAX_DTHERM | CPUID_EAX_HWP | CPUID_EAX_HWP_N | CPUID_EAX_HWP_AW | CPUID_EAX_HWP_EPP | CPUID_EAX_HWP_PLR); + entry->ecx &= ~CPUID_ECX_HCFC; + break; + + case 0x07U: + if (subleaf == 0U) { + cpuid_subleaf(leaf, subleaf, &entry->eax, &entry->ebx, &entry->ecx, &entry->edx); + + entry->ebx &= ~(CPUID_EBX_PQM | CPUID_EBX_PQE); + + /* mask LA57 */ + entry->ecx &= ~CPUID_ECX_LA57; + + /* mask CPUID_EDX_IBRS_IBPB */ + entry->edx &= ~CPUID_EDX_IBRS_IBPB; + + /* mask SGX and SGX_LC */ + entry->ebx &= ~CPUID_EBX_SGX; + entry->ecx &= ~CPUID_ECX_SGX_LC; + + /* mask MPX */ + entry->ebx &= ~CPUID_EBX_MPX; + + /* mask Intel Processor Trace, since 14h is disabled */ + entry->ebx &= ~CPUID_EBX_PROC_TRC; + + /* mask CET shadow stack and indirect branch tracking */ + entry->ecx &= ~CPUID_ECX_CET_SS; + entry->edx &= ~CPUID_EDX_CET_IBT; + + // entry->ebx &= ~CPUID_EBX_FSGSBASE; + + entry->ebx &= ~CPUID_EBX_SMEP; + + entry->ebx &= ~CPUID_EBX_SMAP; + + entry->ecx &= ~CPUID_ECX_UMIP; + + entry->ecx &= ~CPUID_ECX_PKE; + + entry->ecx &= ~CPUID_ECX_LA57; + + entry->ecx &= ~CPUID_ECX_PKS; + } else { + entry->eax = 0U; + entry->ebx = 0U; + entry->ecx = 0U; + entry->edx = 0U; + } + break; + + case 0x16U: + cpu_info = get_pcpu_info(); + if (cpu_info->cpuid_level >= 0x16U) { + /* + * call the cpuid when 0x16 is supported, + * but nested vmx will not return correct values, + * thus use the second way here. If you are using + * the real hardware, can test if this will work. + */ + // cpuid_subleaf(leaf, subleaf, &entry->eax, &entry->ebx, &entry->ecx, &entry->edx); + + /* Use the tsc to derive the emulated 0x16U cpuid. */ + entry->eax = (uint32_t) (get_tsc_khz() / 1000U); + entry->ebx = entry->eax; + /* Bus frequency: hard coded to 100M */ + entry->ecx = 100U; + entry->edx = 0U; + + } else { + /* Use the tsc to derive the emulated 0x16U cpuid. */ + entry->eax = (uint32_t) (get_tsc_khz() / 1000U); + entry->ebx = entry->eax; + /* Bus frequency: hard coded to 100M */ + entry->ecx = 100U; + entry->edx = 0U; + } + break; + + /* + * Leaf 0x40000000 + * This leaf returns the CPUID leaf range supported by the + * hypervisor and the hypervisor vendor signature. + * + * EAX: The maximum input value for CPUID supported by the + * hypervisor. + * EBX, ECX, EDX: Hypervisor vendor ID signature. + */ + case 0x40000000U: + { + static const char sig[12] = "ACRNACRNACRN"; + const uint32_t *sigptr = (const uint32_t *)sig; + + entry->eax = 0x40000010U; + entry->ebx = sigptr[0]; + entry->ecx = sigptr[1]; + entry->edx = sigptr[2]; + break; + } + + /* + * Leaf 0x40000001 - ACRN extended information. + * This leaf returns the extended information of ACRN hypervisor. + * + * EAX: Guest capability flags + * EBX, ECX, EDX: RESERVED (reserved fields are set to zero). + */ + case 0x40000001U: + entry->eax = 0U; + entry->ebx = 0U; + entry->ecx = 0U; + entry->edx = 0U; + break; + + /* + * Leaf 0x40000010 - Timing Information. + * This leaf returns the current TSC frequency and + * current Bus frequency in kHz. + * + * EAX: (Virtual) TSC frequency in kHz. + * TSC frequency is calculated from PIT in ACRN + * EBX, ECX, EDX: RESERVED (reserved fields are set to zero). + */ + case 0x40000010U: + entry->eax = get_tsc_khz(); + entry->ebx = 0U; + entry->ecx = 0U; + entry->edx = 0U; + break; + + default: + cpuid_subleaf(leaf, subleaf, &entry->eax, &entry->ebx, &entry->ecx, &entry->edx); + break; + } +} + +static inline int32_t set_vcpuid_entry(struct vcpuid_entry vcpuid_entries[], + const struct vcpuid_entry *entry) +{ + struct vcpuid_entry *tmp; + size_t entry_size = sizeof(struct vcpuid_entry); + int32_t ret; + + if (g_entry_nr == MAX_VM_VCPUID_ENTRIES) { + printc("%s, vcpuid entry over MAX_VM_VCPUID_ENTRIES(%u)\n", __func__, MAX_VM_VCPUID_ENTRIES); + ret = -ENOMEM; + } else { + tmp = &vcpuid_entries[g_entry_nr]; + g_entry_nr++; + (void)memcpy_s(tmp, entry_size, entry, entry_size); + ret = 0; + } + return ret; +} + +static inline bool is_percpu_related(uint32_t leaf) +{ + return ((leaf == 0x1U) || (leaf == 0xbU) || (leaf == 0xdU) || (leaf == 0x19U) || (leaf == 0x80000001U) || (leaf == 0x2U) || (leaf == 0x1aU)); +} + +static int32_t set_vcpuid_extended_function(void) +{ + uint32_t i, limit; + struct vcpuid_entry entry; + int32_t result; + + init_vcpuid_entry(0x40000000U, 0U, 0U, &entry); + result = set_vcpuid_entry(vcpuid_entries, &entry); + if (result == 0) { + init_vcpuid_entry(0x40000001U, 0U, 0U, &entry); + + result = set_vcpuid_entry(vcpuid_entries, &entry); + } + + if (result == 0) { + init_vcpuid_entry(0x40000010U, 0U, 0U, &entry); + result = set_vcpuid_entry(vcpuid_entries, &entry); + } + + if (result == 0) { + init_vcpuid_entry(0x80000000U, 0U, 0U, &entry); + result = set_vcpuid_entry(vcpuid_entries, &entry); + } + + if (result == 0) { + limit = entry.eax; + g_vcpuid_xlevel = limit; + for (i = 0x80000002U; i <= limit; i++) { + init_vcpuid_entry(i, 0U, 0U, &entry); + result = set_vcpuid_entry(vcpuid_entries, &entry); + if (result != 0) { + break; + } + } + } + + return result; +} + +void init_pcpu_capabilities(void) +{ + uint32_t eax, unused; + uint32_t family_id, model_id, displayfamily, displaymodel; + + cpuid_subleaf(CPUID_VENDORSTRING, 0x0U, + &boot_cpu_data.cpuid_level, + &unused, &unused, &unused); + + cpuid_subleaf(CPUID_FEATURES, 0x0U, &eax, &unused, + &boot_cpu_data.cpuid_leaves[FEAT_1_ECX], + &boot_cpu_data.cpuid_leaves[FEAT_1_EDX]); + + /* SDM Vol.2A 3-211 states the algorithm to calculate DisplayFamily and DisplayModel */ + family_id = (eax >> 8U) & 0xfU; + displayfamily = family_id; + if (family_id == 0xFU) { + displayfamily += ((eax >> 20U) & 0xffU); + } + boot_cpu_data.displayfamily = (uint8_t)displayfamily; + + model_id = (eax >> 4U) & 0xfU; + displaymodel = model_id; + if ((family_id == 0x06U) || (family_id == 0xFU)) { + displaymodel += ((eax >> 16U) & 0xfU) << 4U; + } + boot_cpu_data.displaymodel = (uint8_t)displaymodel; + + + cpuid_subleaf(CPUID_EXTEND_FEATURE, 0x0U, &unused, + &boot_cpu_data.cpuid_leaves[FEAT_7_0_EBX], + &boot_cpu_data.cpuid_leaves[FEAT_7_0_ECX], + &boot_cpu_data.cpuid_leaves[FEAT_7_0_EDX]); + + cpuid_subleaf(CPUID_EXTEND_FEATURE, 0x2U, &unused, &unused, &unused, + &boot_cpu_data.cpuid_leaves[FEAT_7_2_EDX]); + + cpuid_subleaf(CPUID_MAX_EXTENDED_FUNCTION, 0x0U, + &boot_cpu_data.extended_cpuid_level, + &unused, &unused, &unused); + + if (boot_cpu_data.extended_cpuid_level >= CPUID_EXTEND_FUNCTION_1) { + cpuid_subleaf(CPUID_EXTEND_FUNCTION_1, 0x0U, &unused, &unused, + &boot_cpu_data.cpuid_leaves[FEAT_8000_0001_ECX], + &boot_cpu_data.cpuid_leaves[FEAT_8000_0001_EDX]); + } + + if (boot_cpu_data.extended_cpuid_level >= CPUID_EXTEND_INVA_TSC) { + cpuid_subleaf(CPUID_EXTEND_INVA_TSC, 0x0U, &eax, &unused, &unused, + &boot_cpu_data.cpuid_leaves[FEAT_8000_0007_EDX]); + } + + if (boot_cpu_data.extended_cpuid_level >= CPUID_EXTEND_ADDRESS_SIZE) { + cpuid_subleaf(CPUID_EXTEND_ADDRESS_SIZE, 0x0U, &eax, + &boot_cpu_data.cpuid_leaves[FEAT_8000_0008_EBX], + &unused, &unused); + + /* EAX bits 07-00: #Physical Address Bits + * bits 15-08: #Linear Address Bits + */ + boot_cpu_data.virt_bits = (uint8_t)((eax >> 8U) & 0xffU); + boot_cpu_data.phys_bits = (uint8_t)(eax & 0xffU); + boot_cpu_data.physical_address_mask = + get_address_mask(boot_cpu_data.phys_bits); + } + + // detect_pcpu_cap(); +} + +int32_t +set_vcpuid_entries(void) +{ + int32_t result; + struct vcpuid_entry entry; + uint32_t limit; + uint32_t i, j; + struct cpuinfo_x86 *cpu_info = get_pcpu_info(); + + init_vcpuid_entry(0U, 0U, 0U, &entry); + + if (cpu_info->cpuid_level < 0x16U) { + /* The cpuid with zero leaf returns the max level. Emulate that the 0x16U is supported */ + entry.eax = 0x16U; + } + result = set_vcpuid_entry(vcpuid_entries, &entry); + if (result == 0) { + limit = entry.eax; + g_vcpuid_level = limit; + + for (i = 1U; i <= limit; i++) { + if (is_percpu_related(i)) { + continue; + } + + switch (i) { + case 0x04U: + for (j = 0U; ; j++) { + init_vcpuid_entry(i, j, CPUID_CHECK_SUBLEAF, &entry); + if (entry.eax == 0U) { + break; + } + + result = set_vcpuid_entry(vcpuid_entries, &entry); + if (result != 0) { + /* wants to break out of switch */ + break; + } + } + break; + /* MONITOR/MWAIT */ + case 0x05U: + break; + case 0x07U: + init_vcpuid_entry(i, 0U, CPUID_CHECK_SUBLEAF, &entry); + if (entry.eax != 0U) { + printc("vcpuid: only support subleaf 0 for cpu leaf 07h\n"); + entry.eax = 0U; + } + /* mask CPUID_EDX_IBRS_IBPB */ + entry.edx &= ~CPUID_EDX_IBRS_IBPB; + + entry.ecx &= ~CPUID_ECX_WAITPKG; + + result = set_vcpuid_entry(vcpuid_entries, &entry); + break; + case 0x12U: + break; + /* These features are disabled */ + /* PMU is not supported except for core partition VM, like RTVM */ + case 0x0aU: + break; + + /* Intel RDT */ + case 0x0fU: + break; + /* Intel RDT */ + case 0x10U: + break; + + /* Intel Processor Trace */ + case 0x14U: + /* PCONFIG */ + case 0x1bU: + /* V2 Extended Topology Enumeration Leaf */ + case 0x1fU: + break; + default: + init_vcpuid_entry(i, 0U, 0U, &entry); + result = set_vcpuid_entry(vcpuid_entries, &entry); + break; + } + + /* WARNING: do nothing between break out of switch and before this check */ + if (result != 0) { + /* break out of for */ + break; + } + } + + if (result == 0) { + result = set_vcpuid_extended_function(); + } + } + + return result; +} + +static inline const struct vcpuid_entry *local_find_vcpuid_entry(uint32_t leaf, uint32_t subleaf) +{ + uint32_t i = 0U, nr, half; + const struct vcpuid_entry *found_entry = NULL; + + nr = g_entry_nr; + half = nr >> 1U; + if (vcpuid_entries[half].leaf < leaf) { + i = half; + } + + for (; i < nr; i++) { + const struct vcpuid_entry *tmp = (const struct vcpuid_entry *)(&vcpuid_entries[i]); + + if (tmp->leaf < leaf) { + continue; + } else if (tmp->leaf == leaf) { + if (((tmp->flags & CPUID_CHECK_SUBLEAF) != 0U) && (tmp->subleaf != subleaf)) { + continue; + } + found_entry = tmp; + break; + } else { + /* tmp->leaf > leaf */ + break; + } + } + + return found_entry; +} + +static inline const struct vcpuid_entry *find_vcpuid_entry(uint32_t leaf_arg, uint32_t subleaf) +{ + const struct vcpuid_entry *entry; + uint32_t leaf = leaf_arg; + + entry = local_find_vcpuid_entry(leaf, subleaf); + if (entry == NULL) { + uint32_t limit; + + if ((leaf & 0x80000000U) != 0U) { + limit = g_vcpuid_xlevel; + } else { + limit = g_vcpuid_level; + } + + if (leaf > limit) { + /* Intel documentation states that invalid EAX input + * will return the same information as EAX=cpuid_level + * (Intel SDM Vol. 2A - Instruction Set Reference - + * CPUID) + */ + leaf = g_vcpuid_level; + entry = local_find_vcpuid_entry(leaf, subleaf); + } + + } + + return entry; +} + +static void guest_cpuid_01h(struct vmrt_vm_vcpu *vcpu, uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx) +{ + uint32_t apicid = 1; + + cpuid_subleaf(0x1U, 0x0U, eax, ebx, ecx, edx); + /* Patching initial APIC ID */ + *ebx &= ~APIC_ID_MASK; + *ebx |= (apicid << APIC_ID_SHIFT); + + *edx &= ~CPUID_EDX_MTRR; + + /* mask Safer Mode Extension */ + *ecx &= ~CPUID_ECX_SMX; + + *ecx &= ~CPUID_ECX_EST; + + /* mask SDBG for silicon debug */ + *ecx &= ~CPUID_ECX_SDBG; + + /* mask VMX to guest OS */ + *ecx &= ~CPUID_ECX_VMX; + + /* set Hypervisor Present Bit */ + *ecx |= CPUID_ECX_HV; + + /* Warning: should we support pcid in VM? Let's begin with not setting it first */ + *ecx &= ~CPUID_ECX_PCID; + + /* + * Hide MONITOR/MWAIT. + */ + // *ecx &= ~CPUID_ECX_MONITOR; + + /* Warning: should we support CPUID_ECX_OSXSAVE in VM? Let's begin with not setting it first */ + *ecx &= ~CPUID_ECX_OSXSAVE; + if ((*ecx & CPUID_ECX_XSAVE) != 0U) { + uint64_t cr4; + /*read guest CR4*/ + cr4 = vcpu->shared_region->cr4; + if ((cr4 & CR4_OSXSAVE) != 0UL) { + *ecx |= CPUID_ECX_OSXSAVE; + } + } + + /* disable thermal ctrl*/ + *edx &= ~CPUID_EDX_TM1; + + *edx &= ~CPUID_EDX_VME; + + *edx &= ~CPUID_EDX_DE; + + *edx &= ~CPUID_EDX_PSE; + + /* Warning: it seems that PAE, PGE, FXSR should be supported */ + // *edx &= ~CPUID_EDX_PAE; + + // *edx &= ~CPUID_EDX_PGE; + + // *edx &= ~CPUID_EDX_FXSR; + + /* Don't support complex apic */ + *ecx &= ~CPUID_ECX_x2APIC; + + /* DS/PEBS is not supported except for core partition VM, like RTVM */ + /* mask Debug Store feature */ + *ecx &= ~(CPUID_ECX_DTES64 | CPUID_ECX_DS_CPL); + + /* mask PDCM: Perfmon and Debug Capability */ + *ecx &= ~CPUID_ECX_PDCM; + + /* mask Debug Store feature */ + *edx &= ~CPUID_EDX_DTES; +} + +static void guest_cpuid_0bh(uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx) +{ + /* Forward host cpu topology to the guest, guest will know the native platform information such as host cpu topology here */ + cpuid_subleaf(0x0BU, *ecx, eax, ebx, ecx, edx); + + /* Patching X2APIC */ + *edx = 1; +} + +static void guest_cpuid_0dh(uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx) +{ + uint32_t subleaf = *ecx; + + cpuid_subleaf(0x0dU, subleaf, eax, ebx, ecx, edx); + switch (subleaf) { + case 0U: + /* SDM Vol.1 17-2, On processors that do not support Intel MPX, + * CPUID.(EAX=0DH,ECX=0):EAX[3] and + * CPUID.(EAX=0DH,ECX=0):EAX[4] will both be 0 */ + *eax &= ~(CPUID_EAX_XCR0_BNDREGS | CPUID_EAX_XCR0_BNDCSR); + break; + case 1U: + *ecx &= ~(CPUID_ECX_CET_U_STATE | CPUID_ECX_CET_S_STATE); + break; + case 11U: + case 12U: + *eax = 0U; + *ebx = 0U; + *ecx = 0U; + *edx = 0U; + break; + default: + /* No emulation for other leaves */ + break; + } +} + +static void guest_cpuid_19h(uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx) +{ + *eax = 0U; + *ebx = 0U; + *ecx = 0U; + *edx = 0U; +} + +static void guest_cpuid_80000001h(const struct vmrt_vm_vcpu *vcpu, + uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx) +{ + const struct vcpuid_entry *entry_check = find_vcpuid_entry(0x80000000U, 0); + uint64_t guest_ia32_misc_enable = 0x800001; + uint32_t leaf = 0x80000001U; + + if ((entry_check != NULL) && (entry_check->eax >= leaf)) { + cpuid_subleaf(leaf, 0x0U, eax, ebx, ecx, edx); + /* SDM Vol4 2.1, XD Bit Disable of MSR_IA32_MISC_ENABLE + * When set to 1, the Execute Disable Bit feature (XD Bit) is disabled and the XD Bit + * extended feature flag will be clear (CPUID.80000001H: EDX[20]=0) + */ + if ((guest_ia32_misc_enable & MSR_IA32_MISC_ENABLE_XD_DISABLE) != 0UL) { + *edx = *edx & ~CPUID_EDX_XD_BIT_AVIL; + } + } else { + *eax = 0U; + *ebx = 0U; + *ecx = 0U; + *edx = 0U; + } +} + +static void guest_limit_cpuid(const struct vmrt_vm_vcpu *vcpu, uint32_t leaf, + uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx) +{ + uint64_t guest_ia32_misc_enable = 0x800001; + + if ((guest_ia32_misc_enable & MSR_IA32_MISC_ENABLE_LIMIT_CPUID) != 0UL) { + /* limit the leaf number to 2 */ + if (leaf == 0U) { + *eax = 2U; + } else if (leaf > 2U) { + *eax = 0U; + *ebx = 0U; + *ecx = 0U; + *edx = 0U; + } else { + /* In this case, leaf is 1U, return the cpuid value get above */ + } + } +} + +void guest_cpuid(struct vmrt_vm_vcpu *vcpu, uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx) +{ + uint32_t leaf = *eax; + uint32_t subleaf = *ecx; + + /* vm related */ + if (!is_percpu_related(leaf)) { + const struct vcpuid_entry *entry = find_vcpuid_entry(leaf, subleaf); + + if (entry != NULL) { + *eax = entry->eax; + *ebx = entry->ebx; + *ecx = entry->ecx; + *edx = entry->edx; + } else { + *eax = 0U; + *ebx = 0U; + *ecx = 0U; + *edx = 0U; + } + } else { + /* percpu related */ + switch (leaf) { + case 0x01U: + guest_cpuid_01h(vcpu, eax, ebx, ecx, edx); + break; + + case 0x0bU: + guest_cpuid_0bh(eax, ebx, ecx, edx); + break; + + case 0x0dU: + guest_cpuid_0dh(eax, ebx, ecx, edx); + break; + + case 0x19U: + guest_cpuid_19h(eax, ebx, ecx, edx); + break; + + case 0x80000001U: + guest_cpuid_80000001h(vcpu, eax, ebx, ecx, edx); + break; + + default: + /* + * In this switch statement, leaf 0x01/0x0b/0x0d/0x19/0x80000001 + * shall be handled specifically. All the other cases + * just return physical value. + */ + cpuid_subleaf(leaf, *ecx, eax, ebx, ecx, edx); + break; + } + } + + guest_limit_cpuid(vcpu, leaf, eax, ebx, ecx, edx); +} + +void +cpuid_handler(struct vmrt_vm_vcpu *vcpu) +{ + uint64_t rax, rbx, rcx, rdx; + volatile struct vm_vcpu_shared_region *regs = vcpu->shared_region; + int test = 0; + + rax = regs->ax; + rbx = regs->bx; + rcx = regs->cx; + rdx = regs->dx; + + guest_cpuid(vcpu, (uint32_t *)&rax, (uint32_t *)&rbx, (uint32_t *)&rcx, (uint32_t *)&rdx); + + regs->ax = rax; + regs->bx = rbx; + regs->cx = rcx; + regs->dx = rdx; + + GOTO_NEXT_INST(regs); + + return; +} + +static void __attribute__((constructor)) +init(void) +{ + init_pcpu_capabilities(); + set_vcpuid_entries(); +} diff --git a/src/components/implementation/simple_vmm/multi_vmm/vcpuid.h b/src/components/implementation/simple_vmm/multi_vmm/vcpuid.h new file mode 100644 index 0000000000..9124eedb0e --- /dev/null +++ b/src/components/implementation/simple_vmm/multi_vmm/vcpuid.h @@ -0,0 +1,35 @@ +/* + * Copyright (C) 2018-2022 Intel Corporation. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef VCPUID_H_ +#define VCPUID_H_ +#include + +#define CPUID_CHECK_SUBLEAF (1U << 0U) +#define MAX_VM_VCPUID_ENTRIES 64U + +/* Guest capability flags reported by CPUID */ +#define GUEST_CAPS_PRIVILEGE_VM (1U << 0U) + +struct vcpuid_entry { + uint32_t eax; + uint32_t ebx; + uint32_t ecx; + uint32_t edx; + uint32_t leaf; + uint32_t subleaf; + uint32_t flags; + uint32_t padding; +}; + +#define FEATURE_WORDS 16U + +int32_t set_vcpuid_entries(void); +void guest_cpuid(struct vmrt_vm_vcpu *vcpu, + uint32_t *eax, uint32_t *ebx, + uint32_t *ecx, uint32_t *edx); + +#endif /* VCPUID_H_ */ diff --git a/src/components/implementation/simple_vmm/multi_vmm/vio.c b/src/components/implementation/simple_vmm/multi_vmm/vio.c new file mode 100644 index 0000000000..b63253b7b1 --- /dev/null +++ b/src/components/implementation/simple_vmm/multi_vmm/vio.c @@ -0,0 +1,106 @@ +#include +#include "devices/serial/serial.h" +#include "devices/vpci/vpci.h" +#include "devices/vpic/vpic.h" +#include "devices/vrtc/vrtc.h" +#include "devices/vps2/vps2.h" +#include "devices/vpci/virtio_net_io.h" + +void +io_handler(struct vmrt_vm_vcpu *vcpu) +{ + volatile struct vm_vcpu_shared_region *regs = vcpu->shared_region; + u64_t qualification = regs->qualification; + + u16_t port_id = (qualification >> 16) & 0XFFFF; + u8_t access_sz = qualification & 7; + u8_t access_dir = (qualification >> 3) & 1; + + assert(!((qualification >> 4) & 1)); + assert(!((qualification >> 5) & 1)); + + switch (access_sz) + { + case 0: + access_sz = IO_BYTE; + break; + case 1: + access_sz = IO_WORD; + break; + case 3: + access_sz = IO_LONG; + break; + default: + VM_PANIC(vcpu); + + } + if (port_id == 0x3ff || port_id == 0x2f9 || port_id == 0x2fc || port_id == 0x2fb || port_id == 0x2fa || port_id == 0x2ff || port_id == 0x2f8 || port_id == 0x3e9 || port_id == 0x3ec || port_id == 0x3eb || port_id == 0x3ea || port_id == 0x3ef || port_id == 0x3e8 + || port_id == 0x2e9 || port_id == 0x2ec || port_id == 0x2eb || port_id == 0x2ee) { + /* TODO: fix these io ports emulcation */ + goto done; + } + if (port_id <= SERIAL_PORT_MAX && port_id >= SERIAL_PORT_MIN) { + serial_handler(port_id, access_dir, access_sz, vcpu); + goto done; + } + + /* Fast path for virtio-net processing */ + switch (port_id) + { + case VIRTIO_NET_DEV_FEATURES: + case VIRTIO_NET_GUEST_FEATURES: + case VIRTIO_NET_QUEUE_ADDR: + case VIRTIO_NET_QUEUE_SIZE: + case VIRTIO_NET_QUEUE_SELECT: + case VIRTIO_NET_QUEUE_NOTIFY: + case VIRTIO_NET_DEV_STATUS: + case VIRTIO_NET_ISR: + case VIRTIO_NET_MAC: + case VIRTIO_NET_MAC1: + case VIRTIO_NET_MAC2: + case VIRTIO_NET_MAC3: + case VIRTIO_NET_MAC4: + case VIRTIO_NET_MAC5: + case VIRTIO_NET_STATUS: + case VIRTIO_NET_STATUS_H: + virtio_net_handler(port_id, access_dir, access_sz, vcpu); + goto done; + default: + break; + } + + switch (port_id) + { + case CMOS_CMD_PORT: + case CMOS_DATA_PORT: + vrtc_handler(port_id, access_dir, access_sz, vcpu); + goto done; + case PIC_MASTER_CMD_PORT: + case PIC_MASTER_DATA_PORT: + case PIC_SLAVE_CMD_PORT: + case PIC_SLAVE_DATA_PORT: + case PIC_ELCR1: + case PIC_ELCR2: + vpic_handler(port_id, access_dir, access_sz, vcpu); + goto done; + case PS2_CONTROL_PORT_A: + case PS2_CONTROL_PORT_B: + ps2_handler(port_id, access_dir, access_sz, vcpu); + goto done; + case VPCI_CONFIG_ADDRESS: + case VPCI_CONFIG_DATA0: + case VPCI_CONFIG_DATA1: + case VPCI_CONFIG_DATA2: + case VPCI_CONFIG_DATA3: + case VPCI_MECHANISM_CONTROL_REG: + vpci_handler(port_id, access_dir, access_sz, vcpu); + goto done; + } + + printc("port id:%x, sz:%d, dir:%d\n", port_id, access_sz, access_dir); + VM_PANIC(vcpu); +done: + GOTO_NEXT_INST(regs); + + return; +} \ No newline at end of file diff --git a/src/components/implementation/simple_vmm/multi_vmm/vioapic.c b/src/components/implementation/simple_vmm/multi_vmm/vioapic.c new file mode 100644 index 0000000000..1dfcdbdc43 --- /dev/null +++ b/src/components/implementation/simple_vmm/multi_vmm/vioapic.c @@ -0,0 +1,564 @@ +/*- + * Copyright (c) 2013 Tycho Nightingale + * Copyright (c) 2013 Neel Natu + * Copyright (c) 2017-2022 Intel Corporation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#define pr_prefix "vioapic: " + +#include +#include +#include +#include +#include +#include +#include +#include + + +#define RTBL_RO_BITS ((uint32_t)0x00004000U | (uint32_t)0x00001000U) /*Remote IRR and Delivery Status bits*/ + +#define DBG_LEVEL_VIOAPIC 6U +#define ACRN_IOAPIC_VERSION 0x11U + +#define MASK_ALL_INTERRUPTS 0x0001000000010000UL + +static inline struct acrn_vioapics *vm_ioapics(const struct vmrt_vm_comp *vm) +{ + return (struct acrn_vioapics *)(vm->ioapic); +} + +/** + * @pre pin < vioapic->chipinfo.nr_pins + */ +static void +vioapic_generate_intr(struct acrn_single_vioapic *vioapic, uint32_t pin) +{ + uint32_t vector, dest, delmode; + union ioapic_rte rte; + bool level, phys; + + rte = vioapic->rtbl[pin]; + + if (rte.bits.intr_mask == IOAPIC_RTE_MASK_SET) { + printc("ioapic pin%hhu: masked\n", pin); + } else { + phys = (rte.bits.dest_mode == IOAPIC_RTE_DESTMODE_PHY); + delmode = rte.bits.delivery_mode; + level = (rte.bits.trigger_mode == IOAPIC_RTE_TRGRMODE_LEVEL); + + /* For level trigger irq, avoid send intr if + * previous one hasn't received EOI + */ + if (!level || (vioapic->rtbl[pin].bits.remote_irr == 0UL)) { + if (level) { + vioapic->rtbl[pin].bits.remote_irr = IOAPIC_RTE_REM_IRR; + } + vector = rte.bits.vector; + dest = rte.bits.dest_field; + vlapic_receive_intr(vioapic->vm, level, dest, phys, delmode, vector, false); + } + } +} + +/** + * @pre pin < vioapic->chipinfo.nr_pins + */ +static void +vioapic_set_pinstate(struct acrn_single_vioapic *vioapic, uint32_t pin, uint32_t level) +{ + uint32_t old_lvl; + union ioapic_rte rte; + + if (pin < vioapic->chipinfo.nr_pins) { + rte = vioapic->rtbl[pin]; + old_lvl = (uint32_t)bitmap_test((uint16_t)(pin & 0x3FU), &vioapic->pin_state[pin >> 6U]); + if (level == 0U) { + /* clear pin_state and deliver interrupt according to polarity */ + bitmap_clear_nolock((uint16_t)(pin & 0x3FU), &vioapic->pin_state[pin >> 6U]); + if ((rte.bits.intr_polarity == IOAPIC_RTE_INTPOL_ALO) + && (old_lvl != level)) { + vioapic_generate_intr(vioapic, pin); + } + } else { + /* set pin_state and deliver intrrupt according to polarity */ + bitmap_set_nolock((uint16_t)(pin & 0x3FU), &vioapic->pin_state[pin >> 6U]); + if ((rte.bits.intr_polarity == IOAPIC_RTE_INTPOL_AHI) + && (old_lvl != level)) { + vioapic_generate_intr(vioapic, pin); + } + } + } +} + + +struct acrn_single_vioapic * +vgsi_to_vioapic_and_vpin(const struct vmrt_vm_comp *vm, uint32_t vgsi, uint32_t *vpin) +{ + struct acrn_single_vioapic *vioapic; + uint8_t vioapic_index = 0U; + + if (vpin != NULL) { + *vpin = vgsi; + } + + vioapic = (struct acrn_single_vioapic *)&(vm_ioapics(vm)->vioapic_array[vioapic_index]); + + return vioapic; +} + +/** + * @brief Set vIOAPIC IRQ line status. + * + * Similar with vioapic_set_irqline_lock(),but would not make sure + * operation be done with ioapic lock. + * + * @param[in] vm Pointer to target VM + * @param[in] vgsi Target GSI number + * @param[in] operation Action options: GSI_SET_HIGH/GSI_SET_LOW/ + * GSI_RAISING_PULSE/GSI_FALLING_PULSE + * + * @pre vgsi < get_vm_gsicount(vm) + * @pre vm != NULL + * @return None + */ +void +vioapic_set_irqline_nolock(const struct vmrt_vm_comp *vm, uint32_t vgsi, uint32_t operation) +{ + struct acrn_single_vioapic *vioapic; + uint32_t pin; + + vioapic = vgsi_to_vioapic_and_vpin(vm, vgsi, &pin); + + switch (operation) { + case GSI_SET_HIGH: + vioapic_set_pinstate(vioapic, pin, 1U); + break; + case GSI_SET_LOW: + vioapic_set_pinstate(vioapic, pin, 0U); + break; + case GSI_RAISING_PULSE: + vioapic_set_pinstate(vioapic, pin, 1U); + vioapic_set_pinstate(vioapic, pin, 0U); + break; + case GSI_FALLING_PULSE: + vioapic_set_pinstate(vioapic, pin, 0U); + vioapic_set_pinstate(vioapic, pin, 1U); + break; + default: + /* + * The function caller could guarantee the pre condition. + */ + break; + } +} + +/** + * @brief Set vIOAPIC IRQ line status. + * + * @param[in] vm Pointer to target VM + * @param[in] vgsi Target GSI number + * @param[in] operation Action options: GSI_SET_HIGH/GSI_SET_LOW/ + * GSI_RAISING_PULSE/GSI_FALLING_PULSE + * + * @pre vgsi < get_vm_gsicount(vm) + * @pre vm != NULL + * + * @return None + */ +void +vioapic_set_irqline_lock(const struct vmrt_vm_comp *vm, uint32_t vgsi, uint32_t operation) +{ + uint64_t rflags; + + vioapic_set_irqline_nolock(vm, vgsi, operation); +} + +static uint32_t +vioapic_indirect_read(struct acrn_single_vioapic *vioapic, uint32_t addr) +{ + uint32_t regnum, ret = 0U; + uint32_t pin, pincount = vioapic->chipinfo.nr_pins; + + regnum = addr & 0xffU; + switch (regnum) { + case IOAPIC_ID: + ret = (uint32_t)vioapic->chipinfo.id << IOAPIC_ID_SHIFT; + break; + case IOAPIC_VER: + ret = ((pincount - 1U) << MAX_RTE_SHIFT) | ACRN_IOAPIC_VERSION; + break; + case IOAPIC_ARB: + ret = (uint32_t)vioapic->chipinfo.id << IOAPIC_ID_SHIFT; + break; + default: + /* + * In this switch statement, regnum shall either be IOAPIC_ID or + * IOAPIC_VER or IOAPIC_ARB. + * All the other cases will be handled properly later after this + * switch statement. + */ + break; + } + + /* redirection table entries */ + if ((regnum >= IOAPIC_REDTBL) && + (regnum < (IOAPIC_REDTBL + (pincount * 2U)))) { + uint32_t addr_offset = regnum - IOAPIC_REDTBL; + uint32_t rte_offset = addr_offset >> 1U; + pin = rte_offset; + if ((addr_offset & 0x1U) != 0U) { + ret = vioapic->rtbl[pin].u.hi_32; + } else { + ret = vioapic->rtbl[pin].u.lo_32; + } + } + + return ret; +} + +static inline bool vioapic_need_intr(const struct acrn_single_vioapic *vioapic, uint16_t pin) +{ + uint32_t lvl; + union ioapic_rte rte; + bool ret = false; + + if ((uint32_t)pin < vioapic->chipinfo.nr_pins) { + rte = vioapic->rtbl[pin]; + lvl = (uint32_t)bitmap_test(pin & 0x3FU, &vioapic->pin_state[pin >> 6U]); + ret = !!(((rte.bits.intr_polarity == IOAPIC_RTE_INTPOL_ALO) && (lvl == 0U)) || + ((rte.bits.intr_polarity == IOAPIC_RTE_INTPOL_AHI) && (lvl != 0U))); + } + + return ret; +} + +/* + * Due to the race between vcpus and vioapic->lock could be accessed from softirq, ensure to do + * spinlock_irqsave_obtain(&(vioapic->lock), &rflags) & spinlock_irqrestore_release(&(vioapic->lock), rflags) + * by caller. + */ +static void vioapic_indirect_write(struct acrn_single_vioapic *vioapic, uint32_t addr, uint32_t data) +{ + union ioapic_rte last, new, changed; + uint32_t regnum; + uint32_t pin, pincount = vioapic->chipinfo.nr_pins; + + regnum = addr & 0xffUL; + switch (regnum) { + case IOAPIC_ID: + vioapic->chipinfo.id = (uint8_t)((data & IOAPIC_ID_MASK) >> IOAPIC_ID_SHIFT); + break; + case IOAPIC_VER: + case IOAPIC_ARB: + /* readonly */ + break; + default: + /* + * In this switch statement, regnum shall either be IOAPIC_ID or + * IOAPIC_VER or IOAPIC_ARB. + * All the other cases will be handled properly later after this + * switch statement. + */ + break; + } + + /* redirection table entries */ + if ((regnum >= IOAPIC_REDTBL) && (regnum < (IOAPIC_REDTBL + (pincount * 2U)))) { + bool wire_mode_valid = true; + uint32_t addr_offset = regnum - IOAPIC_REDTBL; + uint32_t rte_offset = addr_offset >> 1U; + pin = rte_offset; + + last = vioapic->rtbl[pin]; + new = last; + if ((addr_offset & 1U) != 0U) { + new.u.hi_32 = data; + } else { + new.u.lo_32 &= RTBL_RO_BITS; + new.u.lo_32 |= (data & ~RTBL_RO_BITS); + } + + /* In some special scenarios, the LAPIC somehow hasn't send + * EOI to IOAPIC which cause the Remote IRR bit can't be clear. + * To clear it, some OSes will use EOI Register to clear it for + * 0x20 version IOAPIC, otherwise use switch Trigger Mode to + * Edge Sensitive to clear it. + */ + if (new.bits.trigger_mode == IOAPIC_RTE_TRGRMODE_EDGE) { + new.bits.remote_irr = 0U; + } + + changed.full = last.full ^ new.full; + /* pin0 from vpic mask/unmask */ + if ((pin == 0U) && (changed.bits.intr_mask != 0UL)) { + /* mask -> umask */ + if (last.bits.intr_mask == IOAPIC_RTE_MASK_SET) { + if ((vioapic->vm->wire_mode == VPIC_WIRE_NULL) || + (vioapic->vm->wire_mode == VPIC_WIRE_INTR)) { + vioapic->vm->wire_mode = VPIC_WIRE_IOAPIC; + printc("vpic wire mode -> IOAPIC\n"); + } else { + printc("WARNING: invalid vpic wire mode change\n"); + wire_mode_valid = false; + } + /* unmask -> mask */ + } else { + if (vioapic->vm->wire_mode == VPIC_WIRE_IOAPIC) { + vioapic->vm->wire_mode = VPIC_WIRE_INTR; + printc("vpic wire mode -> INTR\n"); + } + } + } + + if (wire_mode_valid) { + vioapic->rtbl[pin] = new; + + /* remap for ptdev */ + if ((new.bits.intr_mask == IOAPIC_RTE_MASK_CLR) || (last.bits.intr_mask == IOAPIC_RTE_MASK_CLR)) { + /* TODO: set pin remap*/ + } + + /* + * Generate an interrupt if the following conditions are met: + * - pin is not masked + * - previous interrupt has been EOIed + * - pin level is asserted + */ + if ((vioapic->rtbl[pin].bits.intr_mask == IOAPIC_RTE_MASK_CLR) && + (vioapic->rtbl[pin].bits.remote_irr == 0UL) && + vioapic_need_intr(vioapic, (uint16_t)pin)) { + vioapic_generate_intr(vioapic, pin); + } + } + } +} + +static void +vioapic_mmio_rw(struct acrn_single_vioapic *vioapic, uint64_t gpa, + uint32_t *data, bool do_read) +{ + uint32_t offset; + uint64_t rflags; + + offset = (uint32_t)(gpa - vioapic->chipinfo.addr); + + /* The IOAPIC specification allows 32-bit wide accesses to the + * IOAPIC_REGSEL (offset 0) and IOAPIC_WINDOW (offset 16) registers. + */ + switch (offset) { + case IOAPIC_REGSEL: + if (do_read) { + *data = vioapic->ioregsel; + } else { + vioapic->ioregsel = *data & 0xFFU; + } + break; + case IOAPIC_WINDOW: + if (do_read) { + *data = vioapic_indirect_read(vioapic, + vioapic->ioregsel); + } else { + vioapic_indirect_write(vioapic, + vioapic->ioregsel, *data); + } + break; + default: + assert(0); + if (do_read) { + *data = 0xFFFFFFFFU; + } + break; + } +} + +/* + * @pre vm != NULL + */ +static void +vioapic_process_eoi(struct acrn_single_vioapic *vioapic, uint32_t vector) +{ + uint32_t pin, pincount = vioapic->chipinfo.nr_pins; + union ioapic_rte rte; + uint64_t rflags; + + if ((vector < VECTOR_DYNAMIC_START) || (vector > NR_MAX_VECTOR)) { + printc("vioapic_process_eoi: invalid vector %u", vector); + } + + printc("ioapic processing eoi for vector %u\n", vector); + + /* notify device to ack if assigned pin */ + for (pin = 0U; pin < pincount; pin++) { + rte = vioapic->rtbl[pin]; + if ((rte.bits.vector != vector) || + (rte.bits.remote_irr == 0U)) { + continue; + } + } + + /* + * XXX keep track of the pins associated with this vector instead + * of iterating on every single pin each time. + */ + for (pin = 0U; pin < pincount; pin++) { + rte = vioapic->rtbl[pin]; + if ((rte.bits.vector != vector) || + (rte.bits.remote_irr == 0U)) { + continue; + } + + vioapic->rtbl[pin].bits.remote_irr = 0U; + if (vioapic_need_intr(vioapic, (uint16_t)pin)) { + printc("ioapic pin%hhu: asserted at eoi\n", pin); + vioapic_generate_intr(vioapic, pin); + } + } +} + +void vioapic_broadcast_eoi(const struct vmrt_vm_comp *vm, uint32_t vector) +{ + struct acrn_single_vioapic *vioapic; + uint8_t vioapic_index; + + /* + * For platforms with multiple IO-APICs, EOI message from LAPIC is + * broadcast to all IO-APICs. Emulating the same behavior here. + */ + + for (vioapic_index = 0U; vioapic_index < vm_ioapics(vm)->ioapic_num; vioapic_index++) { + vioapic = &(vm_ioapics(vm)->vioapic_array[vioapic_index]); + vioapic_process_eoi(vioapic, vector); + } +} + +static void reset_one_vioapic(struct acrn_single_vioapic *vioapic) +{ + uint32_t pin, pincount; + + /* Initialize all redirection entries to mask all interrupts */ + pincount = vioapic->chipinfo.nr_pins; + for (pin = 0U; pin < pincount; pin++) { + vioapic->rtbl[pin].full = MASK_ALL_INTERRUPTS; + } + vioapic->chipinfo.id = 0U; + vioapic->ioregsel = 0U; +} + +void reset_vioapics(const struct vmrt_vm_comp *vm) +{ + struct acrn_vioapics *vioapics = vm_ioapics(vm); + uint8_t vioapic_index; + + for (vioapic_index = 0U; vioapic_index < vioapics->ioapic_num; vioapic_index++) { + reset_one_vioapic(&vioapics->vioapic_array[vioapic_index]); + } +} + +void +vioapic_init(struct vmrt_vm_comp *vm) +{ + static struct ioapic_info virt_ioapic_info = { + .nr_pins = VIOAPIC_RTE_NUM, + .addr = VIOAPIC_BASE + }; + + struct ioapic_info *vioapic_info; + uint8_t vioapic_index; + struct acrn_single_vioapic *vioapic = NULL; + struct acrn_vioapics *vioapics = vm_ioapics(vm); + + /* only set one io apic */ + vioapics->ioapic_num = 1U; + vioapic_info = &virt_ioapic_info; + + for (vioapic_index = 0U; vioapic_index < vioapics->ioapic_num; vioapic_index++) { + vioapic = &vioapics->vioapic_array[vioapic_index]; + vioapic->chipinfo = vioapic_info[vioapic_index]; + + vioapic->vm = vm; + reset_one_vioapic(vioapic); + } + + /* + * Maximum number of GSI is computed as GSI base of the IOAPIC i.e. enumerated last in ACPI MADT + * plus the number of interrupt pins of that IOAPIC. + */ + if (vioapic != NULL) { + vioapics->nr_gsi = vioapic->chipinfo.gsi_base + vioapic->chipinfo.nr_pins; + } +} + +uint32_t +get_vm_gsicount(const struct vmrt_vm_comp *vm) +{ + struct acrn_vioapics *vioapics = vm_ioapics(vm); + return vioapics->nr_gsi; +} + +/* + * @pre handler_private_data != NULL + */ +int32_t vioapic_mmio_access_handler(struct vmrt_vm_vcpu *vcpu) +{ + struct acrn_mmio_request *mmio = vcpu->mmio_request; + struct acrn_single_vioapic *vioapic = &vm_ioapics(vcpu->vm)->vioapic_array[0]; + uint64_t gpa = mmio->address; + int32_t ret = 0; + + /* Note all RW to IOAPIC are 32-Bit in size */ + if (mmio->size == 4UL) { + uint32_t data = (uint32_t)mmio->value; + + if (mmio->direction == ACRN_IOREQ_DIR_READ) { + vioapic_mmio_rw(vioapic, gpa, &data, true); + mmio->value = (uint64_t)data; + } else if (mmio->direction == ACRN_IOREQ_DIR_WRITE) { + vioapic_mmio_rw(vioapic, gpa, &data, false); + } else { + ret = -EINVAL; + } + } else { + printc("All RW to IOAPIC must be 32-bits in size\n"); + assert(0); + } + + return ret; +} + +/** + * @pre vm->arch_vm.vioapics != NULL + * @pre vgsi < get_vm_gsicount(vm) + * @pre rte != NULL + */ +void vioapic_get_rte(const struct vmrt_vm_comp *vm, uint32_t vgsi, union ioapic_rte *rte) +{ + struct acrn_single_vioapic *vioapic; + uint32_t pin; + vioapic = vgsi_to_vioapic_and_vpin(vm, vgsi, &pin); + + *rte = vioapic->rtbl[pin]; +} diff --git a/src/components/implementation/simple_vmm/multi_vmm/vioapic.h b/src/components/implementation/simple_vmm/multi_vmm/vioapic.h new file mode 100644 index 0000000000..73794a091e --- /dev/null +++ b/src/components/implementation/simple_vmm/multi_vmm/vioapic.h @@ -0,0 +1,128 @@ +/*- + * Copyright (c) 2013 Tycho Nightingale + * Copyright (c) 2013 Neel Natu + * Copyright (c) 2017-2022 Intel Corporation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef VIOAPIC_H +#define VIOAPIC_H + +/** + * @file vioapic.h + * + * @brief public APIs for virtual I/O APIC + */ + +#include +#include +#include + +#define VIOAPIC_BASE 0xFEC00000UL +#define VIOAPIC_SIZE 4096UL +#define MAX_IOAPIC_NUM 1 + +#define REDIR_ENTRIES_HW 120U /* Service VM align with native ioapic */ +#define STATE_BITMAP_SIZE INT_DIV_ROUNDUP(REDIR_ENTRIES_HW, 64U) + +#define IOAPIC_RTE_LOW_INTVEC ((uint32_t)IOAPIC_RTE_INTVEC) + +/* + * id field is used to emulate the IOAPIC_ID register of vIOAPIC + */ + +struct acrn_single_vioapic { + // spinlock_t lock; + struct vmrt_vm_comp *vm; + struct ioapic_info chipinfo; + uint32_t ioregsel; + union ioapic_rte rtbl[REDIR_ENTRIES_HW]; + /* pin_state status bitmap: 1 - high, 0 - low */ + uint64_t pin_state[STATE_BITMAP_SIZE]; +}; + +/* + * ioapic_num represents the number of IO-APICs emulated for the VM. + * nr_gsi represents the maximum number of GSI emulated for the VM. + */ +struct acrn_vioapics { + uint8_t ioapic_num; + uint32_t nr_gsi; + struct acrn_single_vioapic vioapic_array[MAX_IOAPIC_NUM]; +}; + +void dump_vioapic(struct vmrt_vm_comp *vm); +void vioapic_init(struct vmrt_vm_comp *vm); +void reset_vioapics(const struct vmrt_vm_comp *vm); + + +/** + * @brief virtual I/O APIC + * + * @addtogroup acrn_vioapic ACRN vIOAPIC + * @{ + */ + +/** + * @brief Set vIOAPIC IRQ line status. + * + * @param[in] vm Pointer to target VM + * @param[in] vgsi GSI for the virtual interrupt + * @param[in] operation Action options: GSI_SET_HIGH/GSI_SET_LOW/ + * GSI_RAISING_PULSE/GSI_FALLING_PULSE + * + * @pre irqline < vioapic_pincount(vm) + * + * @return None + */ +void vioapic_set_irqline_lock(const struct vmrt_vm_comp *vm, uint32_t vgsi, uint32_t operation); + +/** + * @brief Set vIOAPIC IRQ line status. + * + * Similar with vioapic_set_irqline_lock(),but would not make sure + * operation be done with ioapic lock. + * + * @param[in] vm Pointer to target VM + * @param[in] vgsi GSI for the virtual interrupt + * @param[in] operation Action options: GSI_SET_HIGH/GSI_SET_LOW/ + * GSI_RAISING_PULSE/GSI_FALLING_PULSE + * + * @pre irqline < vioapic_pincount(vm) + * @return None + */ +void vioapic_set_irqline_nolock(const struct vmrt_vm_comp *vm, uint32_t vgsi, uint32_t operation); + +uint32_t get_vm_gsicount(const struct vmrt_vm_comp *vm); +void vioapic_broadcast_eoi(const struct vmrt_vm_comp *vm, uint32_t vector); +void vioapic_get_rte(const struct vmrt_vm_comp *vm, uint32_t vgsi, union ioapic_rte *rte); +int32_t vioapic_mmio_access_handler(struct vmrt_vm_vcpu *vcpu); +struct acrn_single_vioapic *vgsi_to_vioapic_and_vpin(const struct vmrt_vm_comp *vm, uint32_t vgsi, uint32_t *vpin); + +/** + * @} + */ +/* End of acrn_vioapic */ +#endif /* VIOAPIC_H */ diff --git a/src/components/implementation/simple_vmm/multi_vmm/vlapic.c b/src/components/implementation/simple_vmm/multi_vmm/vlapic.c new file mode 100644 index 0000000000..155eed10e3 --- /dev/null +++ b/src/components/implementation/simple_vmm/multi_vmm/vlapic.c @@ -0,0 +1,1554 @@ +/*- + * Copyright (c) 2011 NetApp, Inc. + * Copyright (c) 2017-2022 Intel Corporation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#define pr_prefix "vlapic: " + +#include +#include +#include +#include +#include +#include +#include "vpic.h" +#include "bits.h" +#include "atomic.h" + +#include + +#pragma GCC diagnostic ignored "-Wunused-but-set-variable" +#define VLAPIC_VERBOS 0 + +#define VLAPIC_VERSION (16U) +#define APICBASE_BSP 0x00000100UL +#define APICBASE_X2APIC 0x00000400UL +#define APICBASE_XAPIC 0x00000800UL +#define APICBASE_LAPIC_MODE (APICBASE_XAPIC | APICBASE_X2APIC) +#define APICBASE_ENABLED 0x00000800UL +#define LOGICAL_ID_MASK 0xFU +#define CLUSTER_ID_MASK 0xFFFF0U + +#define DBG_LEVEL_VLAPIC 6U + +int g_vlapi_enabled = 0; + +static inline struct vmrt_vm_vcpu *vlapic2vcpu(const struct acrn_vlapic *vlapic) +{ + return vlapic->vcpu; +} +static inline struct acrn_vlapic *vcpu_vlapic(struct vmrt_vm_vcpu *vcpu) +{ + return vcpu->vlapic; +} +static inline bool is_lapic_pt_configured(void) +{ + return false; +} + +static inline void vlapic_dump_irr(__unused const struct acrn_vlapic *vlapic, __unused const char *msg) {} +static inline void vlapic_dump_isr(__unused const struct acrn_vlapic *vlapic, __unused const char *msg) {} + +const struct acrn_apicv_ops *apicv_ops; + +static bool apicv_set_intr_ready(struct acrn_vlapic *vlapic, uint32_t vector); + +static void apicv_trigger_pi_anv(uint16_t dest_pcpu_id, uint32_t anv); + +static void vlapic_x2apic_self_ipi_handler(struct acrn_vlapic *vlapic); + +/* + * Post an interrupt to the vcpu running on 'hostcpu'. This will use a + * hardware assist if available (e.g. Posted Interrupt) or fall back to + * sending an 'ipinum' to interrupt the 'hostcpu'. + */ +static void vlapic_set_error(struct acrn_vlapic *vlapic, uint32_t mask); + +void vlapic_timer_expired(struct vmrt_vm_vcpu *vcpu); +static struct pi_desc *get_pi_desc(struct vmrt_vm_vcpu *vcpu); + +static inline bool vlapic_enabled(const struct acrn_vlapic *vlapic) +{ + const struct lapic_regs *lapic = vlapic->apic_page; + + return (((vlapic->msr_apicbase & APICBASE_ENABLED) != 0UL) && + ((lapic->svr.v & APIC_SVR_ENABLE) != 0U)); +} + +static inline void vlapic_build_x2apic_id(struct acrn_vlapic *vlapic) +{ + struct lapic_regs *lapic; + uint32_t logical_id, cluster_id; + + lapic = vlapic->apic_page; + lapic->id.v = vlapic->vapic_id; + logical_id = lapic->id.v & LOGICAL_ID_MASK; + cluster_id = (lapic->id.v & CLUSTER_ID_MASK) >> 4U; + lapic->ldr.v = (cluster_id << 16U) | (1U << logical_id); +} + +static inline uint32_t vlapic_find_isrv(const struct acrn_vlapic *vlapic) +{ + const struct lapic_regs *lapic = vlapic->apic_page; + uint32_t i, val, bitpos, isrv = 0U; + const struct lapic_reg *isrptr; + + isrptr = &lapic->isr[0]; + + /* i ranges effectively from 7 to 1 */ + for (i = 7U; i > 0U; i--) { + val = isrptr[i].v; + if (val != 0U) { + bitpos = (uint32_t)fls32(val); + isrv = (i << 5U) | bitpos; + break; + } + } + + return isrv; +} + +static void +vlapic_write_dfr(struct acrn_vlapic *vlapic) +{ + struct lapic_regs *lapic; + + lapic = vlapic->apic_page; + lapic->dfr.v &= APIC_DFR_MODEL_MASK; + lapic->dfr.v |= APIC_DFR_RESERVED; + + if ((lapic->dfr.v & APIC_DFR_MODEL_MASK) == APIC_DFR_MODEL_FLAT) { + printc("vlapic DFR in Flat Model\n"); + } else if ((lapic->dfr.v & APIC_DFR_MODEL_MASK) + == APIC_DFR_MODEL_CLUSTER) { + printc("vlapic DFR in Cluster Model\n"); + } else { + assert(0); + } +} + +static void +vlapic_write_ldr(struct acrn_vlapic *vlapic) +{ + struct lapic_regs *lapic; + + lapic = vlapic->apic_page; + lapic->ldr.v &= ~APIC_LDR_RESERVED; +} + +static inline uint32_t +vlapic_timer_divisor_shift(uint32_t dcr) +{ + uint32_t val; + + val = ((dcr & 0x3U) | ((dcr & 0x8U) >> 1U)); + return ((val + 1U) & 0x7U); +} + +__unused static inline bool +vlapic_lvtt_oneshot(const struct acrn_vlapic *vlapic) +{ + return (((vlapic->apic_page->lvt[APIC_LVT_TIMER].v) & APIC_LVTT_TM) + == APIC_LVTT_TM_ONE_SHOT); +} + +static inline bool +vlapic_lvtt_period(const struct acrn_vlapic *vlapic) +{ + return (((vlapic->apic_page->lvt[APIC_LVT_TIMER].v) & APIC_LVTT_TM) + == APIC_LVTT_TM_PERIODIC); +} + +static inline bool +vlapic_lvtt_tsc_deadline(const struct acrn_vlapic *vlapic) +{ + return (((vlapic->apic_page->lvt[APIC_LVT_TIMER].v) & APIC_LVTT_TM) + == APIC_LVTT_TM_TSCDLT); +} + +static inline bool +vlapic_lvtt_masked(const struct acrn_vlapic *vlapic) +{ + return (((vlapic->apic_page->lvt[APIC_LVT_TIMER].v) & APIC_LVTT_M) != 0U); +} + +static bool +set_expiration(struct acrn_vlapic *vlapic) +{ + struct vlapic_timer *vtimer; + uint32_t tmicr, divisor_shift; + bool ret; + + vtimer = &vlapic->vtimer; + tmicr = vtimer->tmicr; + divisor_shift = vtimer->divisor_shift; + + if ((tmicr == 0U) || (divisor_shift > 8U)) { + ret = false; + } else { + uint64_t delta = (uint64_t)tmicr << divisor_shift; + assert(0); + + ret = true; + } + return ret; +} + +static void vlapic_update_lvtt(struct acrn_vlapic *vlapic, + uint32_t val) +{ + uint32_t timer_mode = val & APIC_LVTT_TM; + struct vlapic_timer *vtimer = &vlapic->vtimer; + + if (vtimer->mode != timer_mode) { + struct hv_timer *timer = &vtimer->timer; + + /* + * A write to the LVT Timer Register that changes + * the timer mode disarms the local APIC timer. + */ + /* TODO: reset timer */ + vtimer->mode = timer_mode; + } +} + +static uint32_t vlapic_get_ccr(const struct acrn_vlapic *vlapic) +{ + uint32_t remain_count = 0U; + const struct vlapic_timer *vtimer = &vlapic->vtimer; + + if ((vtimer->tmicr != 0U) && (!vlapic_lvtt_tsc_deadline(vlapic))) { + uint64_t remains; + assert(0); + } + + return remain_count; +} + +static void vlapic_write_dcr(struct acrn_vlapic *vlapic) +{ + uint32_t divisor_shift; + struct vlapic_timer *vtimer; + struct lapic_regs *lapic = vlapic->apic_page; + + vtimer = &vlapic->vtimer; + divisor_shift = vlapic_timer_divisor_shift(lapic->dcr_timer.v); + + vtimer->divisor_shift = divisor_shift; +} + +static void vlapic_write_icrtmr(struct acrn_vlapic *vlapic) +{ + struct lapic_regs *lapic; + struct vlapic_timer *vtimer; + + if (!vlapic_lvtt_tsc_deadline(vlapic)) { + lapic = vlapic->apic_page; + vtimer = &vlapic->vtimer; + vtimer->tmicr = lapic->icr_timer.v; + } +} + +static void +vlapic_write_esr(struct acrn_vlapic *vlapic) +{ + struct lapic_regs *lapic; + + lapic = vlapic->apic_page; + lapic->esr.v = vlapic->esr_pending; + vlapic->esr_pending = 0U; +} + +static void +vlapic_set_tmr(struct acrn_vlapic *vlapic, uint32_t vector, bool level) +{ + struct lapic_reg *tmrptr = &(vlapic->apic_page->tmr[0]); + if (level) { + if (!bitmap32_test_and_set_lock((uint16_t)(vector & 0x1fU), &tmrptr[(vector & 0xffU) >> 5U].v)) { + assert(0); + } + } else { + if (bitmap32_test_and_clear_lock((uint16_t)(vector & 0x1fU), &tmrptr[(vector & 0xffU) >> 5U].v)) { + assert(0); + } + } +} + +static void apicv_basic_accept_intr(struct acrn_vlapic *vlapic, uint32_t vector, bool level) +{ + struct lapic_regs *lapic; + struct lapic_reg *irrptr; + uint32_t idx; + + lapic = vlapic->apic_page; + idx = vector >> 5U; + irrptr = &lapic->irr[0]; + + /* If the interrupt is set, don't try to do it again */ + if (!bitmap32_test_and_set_lock((uint16_t)(vector & 0x1fU), &irrptr[idx].v)) { + /* update TMR if interrupt trigger mode has changed */ + vlapic_set_tmr(vlapic, vector, level); + assert(0); + } +} + +static void apicv_advanced_accept_intr(struct acrn_vlapic *vlapic, uint32_t vector, bool level) +{ + /* update TMR if interrupt trigger mode has changed */ + vlapic_set_tmr(vlapic, vector, level); + + if (apicv_set_intr_ready(vlapic, vector)) { + /* + * Send interrupt to vCPU via posted interrupt way: + * 1. If target vCPU is in root mode(isn't running), + * record this request as ACRN_REQUEST_EVENT,then + * will pick up the interrupt from PIR and inject + * it to vCPU in next vmentry. + * 2. If target vCPU is in non-root mode(running), + * send PI notification to vCPU and hardware will + * sync PIR to vIRR automatically. + */ + + /* TODO: handle cross-core virtual interrupt notification */ + } +} + +/* + * @pre vector >= 16 + */ +static void vlapic_accept_intr(struct acrn_vlapic *vlapic, uint32_t vector, bool level) +{ + struct lapic_regs *lapic; + assert(vector <= 255); + + lapic = vlapic->apic_page; + if ((lapic->svr.v & APIC_SVR_ENABLE) == 0U) { + printc("vlapic is software disabled, ignoring interrupt %u", vector); + assert(0); + } else { + apicv_advanced_accept_intr(vlapic, vector, level); + } +} + +/** + * @brief Send notification vector to target pCPU. + * + * If APICv Posted-Interrupt is enabled and target pCPU is in non-root mode, + * pCPU will sync pending virtual interrupts from PIR to vIRR automatically, + * without VM exit. + * If pCPU in root-mode, virtual interrupt will be injected in next VM entry. + * + * @param[in] dest_pcpu_id Target CPU ID. + * @param[in] anv Activation Notification Vectors (ANV) + * + * @return None + */ +static void apicv_trigger_pi_anv(uint16_t dest_pcpu_id, uint32_t anv) +{ + /* TODO: support pi in the future */ + assert(0); +} + +/** + * @pre offset value shall be one of the folllowing values: + * APIC_OFFSET_CMCI_LVT + * APIC_OFFSET_TIMER_LVT + * APIC_OFFSET_THERM_LVT + * APIC_OFFSET_PERF_LVT + * APIC_OFFSET_LINT0_LVT + * APIC_OFFSET_LINT1_LVT + * APIC_OFFSET_ERROR_LVT + */ +static inline uint32_t +lvt_off_to_idx(uint32_t offset) +{ + uint32_t index; + + switch (offset) { + case APIC_OFFSET_CMCI_LVT: + index = APIC_LVT_CMCI; + break; + case APIC_OFFSET_TIMER_LVT: + index = APIC_LVT_TIMER; + break; + case APIC_OFFSET_THERM_LVT: + index = APIC_LVT_THERMAL; + break; + case APIC_OFFSET_PERF_LVT: + index = APIC_LVT_PMC; + break; + case APIC_OFFSET_LINT0_LVT: + index = APIC_LVT_LINT0; + break; + case APIC_OFFSET_LINT1_LVT: + index = APIC_LVT_LINT1; + break; + case APIC_OFFSET_ERROR_LVT: + default: + /* + * The function caller could guarantee the pre condition. + * So, all of the possible 'offset' other than + * APIC_OFFSET_ERROR_LVT has been handled in prior cases. + */ + index = APIC_LVT_ERROR; + break; + } + + return index; +} + +/** + * @pre offset value shall be one of the folllowing values: + * APIC_OFFSET_CMCI_LVT + * APIC_OFFSET_TIMER_LVT + * APIC_OFFSET_THERM_LVT + * APIC_OFFSET_PERF_LVT + * APIC_OFFSET_LINT0_LVT + * APIC_OFFSET_LINT1_LVT + * APIC_OFFSET_ERROR_LVT + */ +static inline uint32_t * +vlapic_get_lvtptr(struct acrn_vlapic *vlapic, uint32_t offset) +{ + struct lapic_regs *lapic = vlapic->apic_page; + uint32_t i; + uint32_t *lvt_ptr; + + switch (offset) { + case APIC_OFFSET_CMCI_LVT: + lvt_ptr = &lapic->lvt_cmci.v; + break; + default: + /* + * The function caller could guarantee the pre condition. + * All the possible 'offset' other than APIC_OFFSET_CMCI_LVT + * could be handled here. + */ + i = lvt_off_to_idx(offset); + lvt_ptr = &(lapic->lvt[i].v); + break; + } + return lvt_ptr; +} + +static inline uint32_t +vlapic_get_lvt(const struct acrn_vlapic *vlapic, uint32_t offset) +{ + uint32_t idx; + + idx = lvt_off_to_idx(offset); + return vlapic->lvt_last[idx]; +} + +static void +vlapic_write_lvt(struct acrn_vlapic *vlapic, uint32_t offset) +{ + uint32_t *lvtptr, mask, val, idx; + struct lapic_regs *lapic; + bool error = false; + + lapic = vlapic->apic_page; + lvtptr = vlapic_get_lvtptr(vlapic, offset); + val = *lvtptr; + + if ((lapic->svr.v & APIC_SVR_ENABLE) == 0U) { + val |= APIC_LVT_M; + } + mask = APIC_LVT_M | APIC_LVT_DS | APIC_LVT_VECTOR; + switch (offset) { + case APIC_OFFSET_TIMER_LVT: + mask |= APIC_LVTT_TM; + break; + case APIC_OFFSET_ERROR_LVT: + break; + case APIC_OFFSET_LINT0_LVT: + case APIC_OFFSET_LINT1_LVT: + mask |= APIC_LVT_TM | APIC_LVT_RIRR | APIC_LVT_IIPP; + /* FALLTHROUGH */ + default: + mask |= APIC_LVT_DM; + break; + } + val &= mask; + + /* vlapic mask/unmask LINT0 for ExtINT? */ + if ((offset == APIC_OFFSET_LINT0_LVT) && + ((val & APIC_LVT_DM) == APIC_LVT_DM_EXTINT)) { + uint32_t last = vlapic_get_lvt(vlapic, offset); + struct vmrt_vm_comp *vm = vlapic2vcpu(vlapic)->vm; + + /* mask -> unmask: may from every vlapic in the vm */ + if (((last & APIC_LVT_M) != 0U) && ((val & APIC_LVT_M) == 0U)) { + if ((vm->wire_mode == VPIC_WIRE_INTR) || + (vm->wire_mode == VPIC_WIRE_NULL)) { + vm->wire_mode = VPIC_WIRE_LAPIC; + printc("vpic wire mode -> LAPIC\n"); + } else { + printc("WARNING:invalid vpic wire mode change\n"); + assert(0); + } + /* unmask -> mask: only from the vlapic LINT0-ExtINT enabled */ + } else if (((last & APIC_LVT_M) == 0U) && ((val & APIC_LVT_M) != 0U)) { + if (vm->wire_mode == VPIC_WIRE_LAPIC) { + vm->wire_mode = VPIC_WIRE_NULL; + printc("vpic wire mode -> NULL\n"); + } + } else { + /* APIC_LVT_M unchanged. No action required. */ + } + } else if (offset == APIC_OFFSET_TIMER_LVT) { + vlapic_update_lvtt(vlapic, val); + } else { + /* No action required. */ + } + + if (!error) { + *lvtptr = val; + idx = lvt_off_to_idx(offset); + vlapic->lvt_last[idx] = val; + } +} + +static void +vlapic_mask_lvts(struct acrn_vlapic *vlapic) +{ + struct lapic_regs *lapic = vlapic->apic_page; + + lapic->lvt_cmci.v |= APIC_LVT_M; + vlapic_write_lvt(vlapic, APIC_OFFSET_CMCI_LVT); + + lapic->lvt[APIC_LVT_TIMER].v |= APIC_LVT_M; + vlapic_write_lvt(vlapic, APIC_OFFSET_TIMER_LVT); + + lapic->lvt[APIC_LVT_THERMAL].v |= APIC_LVT_M; + vlapic_write_lvt(vlapic, APIC_OFFSET_THERM_LVT); + + lapic->lvt[APIC_LVT_PMC].v |= APIC_LVT_M; + vlapic_write_lvt(vlapic, APIC_OFFSET_PERF_LVT); + + lapic->lvt[APIC_LVT_LINT0].v |= APIC_LVT_M; + vlapic_write_lvt(vlapic, APIC_OFFSET_LINT0_LVT); + + lapic->lvt[APIC_LVT_LINT1].v |= APIC_LVT_M; + vlapic_write_lvt(vlapic, APIC_OFFSET_LINT1_LVT); + + lapic->lvt[APIC_LVT_ERROR].v |= APIC_LVT_M; + vlapic_write_lvt(vlapic, APIC_OFFSET_ERROR_LVT); +} + +/* + * Algorithm adopted from section "Interrupt, Task and Processor Priority" + * in Intel Architecture Manual Vol 3a. + */ +static void +vlapic_update_ppr(struct acrn_vlapic *vlapic) +{ + uint32_t isrv, tpr, ppr; + + isrv = vlapic->isrv; + tpr = vlapic->apic_page->tpr.v; + + if (prio(tpr) >= prio(isrv)) { + ppr = tpr; + } else { + ppr = isrv & 0xf0U; + } + + vlapic->apic_page->ppr.v = ppr; +} + +static void +vlapic_process_eoi(struct acrn_vlapic *vlapic) +{ + struct lapic_regs *lapic = vlapic->apic_page; + struct lapic_reg *isrptr, *tmrptr; + uint32_t i, vector, bitpos; + + isrptr = &lapic->isr[0]; + tmrptr = &lapic->tmr[0]; + + if (vlapic->isrv != 0U) { + vector = vlapic->isrv; + i = (vector >> 5U); + bitpos = (vector & 0x1fU); + bitmap32_clear_nolock((uint16_t)bitpos, &isrptr[i].v); + + vlapic_dump_isr(vlapic, "vlapic_process_eoi"); + + vlapic->isrv = vlapic_find_isrv(vlapic); + vlapic_update_ppr(vlapic); + } +} + +static void +vlapic_set_error(struct acrn_vlapic *vlapic, uint32_t mask) +{ + uint32_t lvt, vec; + + vlapic->esr_pending |= mask; + if (vlapic->esr_firing == 0) { + vlapic->esr_firing = 1; + + /* The error LVT always uses the fixed delivery mode. */ + lvt = vlapic_get_lvt(vlapic, APIC_OFFSET_ERROR_LVT); + if ((lvt & APIC_LVT_M) == 0U) { + vec = lvt & APIC_LVT_VECTOR; + if (vec >= 16U) { + vlapic_accept_intr(vlapic, vec, LAPIC_TRIG_EDGE); + } + } + vlapic->esr_firing = 0; + } +} + +static void vlapic_write_icrlo(struct acrn_vlapic *vlapic) +{ + uint16_t vcpu_id; + bool phys = false, is_broadcast = false; + uint64_t dmask; + uint32_t icr_low, icr_high, dest; + uint32_t vec, mode, shorthand; + struct lapic_regs *lapic; + struct vmrt_vm_vcpu *target_vcpu; + + lapic = vlapic->apic_page; + lapic->icr_lo.v &= ~APIC_DELSTAT_PEND; + + icr_low = lapic->icr_lo.v; + icr_high = lapic->icr_hi.v; + if (is_x2apic_enabled(vlapic)) { + dest = icr_high; + is_broadcast = (dest == 0xffffffffU); + } else { + dest = icr_high >> APIC_ID_SHIFT; + is_broadcast = (dest == 0xffU); + } + vec = icr_low & APIC_VECTOR_MASK; + mode = icr_low & APIC_DELMODE_MASK; + phys = ((icr_low & APIC_DESTMODE_LOG) == 0UL); + shorthand = icr_low & APIC_DEST_MASK; + + if ((mode == APIC_DELMODE_FIXED) && (vec < 16U)) { + vlapic_set_error(vlapic, APIC_ESR_SEND_ILLEGAL_VECTOR); + printc("Ignoring invalid IPI %u", vec); + assert(0); + } else if (((shorthand == APIC_DEST_SELF) || (shorthand == APIC_DEST_ALLISELF)) + && ((mode == APIC_DELMODE_NMI) || (mode == APIC_DELMODE_INIT) + || (mode == APIC_DELMODE_STARTUP))) { + printc("unsupported ICR command, ignore it\n"); + } else { + struct vmrt_vm_vcpu *vcpu = vlapic2vcpu(vlapic); + + printc( + "icrlo 0x%08x icrhi 0x%08x triggered ipi %u", + icr_low, icr_high, vec); + + assert(0); + } +} + +static inline uint32_t vlapic_find_highest_irr(const struct acrn_vlapic *vlapic) +{ + const struct lapic_regs *lapic = vlapic->apic_page; + uint32_t i, val, bitpos, vec = 0U; + const struct lapic_reg *irrptr; + + irrptr = &lapic->irr[0]; + + /* i ranges effectively from 7 to 1 */ + for (i = 7U; i > 0U; i--) { + val = irrptr[i].v; + if (val != 0U) { + bitpos = (uint32_t)fls32(val); + vec = (i * 32U) + bitpos; + break; + } + } + + return vec; +} + +/** + * @brief Find a deliverable virtual interrupts for vLAPIC in irr. + * + * @param[in] vlapic Pointer to target vLAPIC data structure + * @param[inout] vecptr Pointer to vector buffer and will be filled + * with eligible vector if any. + * + * @retval false There is no deliverable pending vector. + * @retval true There is deliverable vector. + * + * @remark The vector does not automatically transition to the ISR as a + * result of calling this function. + * This function is only for case that APICv/VID is NOT supported. + */ +static bool vlapic_find_deliverable_intr(const struct acrn_vlapic *vlapic, uint32_t *vecptr) +{ + const struct lapic_regs *lapic = vlapic->apic_page; + uint32_t vec; + bool ret = false; + + vec = vlapic_find_highest_irr(vlapic); + if (prio(vec) > prio(lapic->ppr.v)) { + ret = true; + if (vecptr != NULL) { + *vecptr = vec; + } + } + + return ret; +} + +/** + * @brief Get a deliverable virtual interrupt from irr to isr. + * + * Transition 'vector' from IRR to ISR. This function is called with the + * vector returned by 'vlapic_find_deliverable_intr()' when the guest is able to + * accept this interrupt (i.e. RFLAGS.IF = 1 and no conditions exist that + * block interrupt delivery). + * + * @param[in] vlapic Pointer to target vLAPIC data structure + * @param[in] vector Target virtual interrupt vector + * + * @return None + * + * @pre vlapic != NULL + */ +static void vlapic_get_deliverable_intr(struct acrn_vlapic *vlapic, uint32_t vector) +{ + struct lapic_regs *lapic = vlapic->apic_page; + struct lapic_reg *irrptr, *isrptr; + uint32_t idx; + + /* + * clear the ready bit for vector being accepted in irr + * and set the vector as in service in isr. + */ + idx = vector >> 5U; + + irrptr = &lapic->irr[0]; + bitmap32_clear_lock((uint16_t)(vector & 0x1fU), &irrptr[idx].v); + + vlapic_dump_irr(vlapic, "vlapic_get_deliverable_intr"); + + isrptr = &lapic->isr[0]; + bitmap32_set_nolock((uint16_t)(vector & 0x1fU), &isrptr[idx].v); + vlapic_dump_isr(vlapic, "vlapic_get_deliverable_intr"); + + vlapic->isrv = vector; + + /* + * Update the PPR + */ + vlapic_update_ppr(vlapic); +} + +static void +vlapic_write_svr(struct acrn_vlapic *vlapic) +{ + struct lapic_regs *lapic; + uint32_t old, new, changed; + + lapic = vlapic->apic_page; + + new = lapic->svr.v; + old = vlapic->svr_last; + vlapic->svr_last = new; + + changed = old ^ new; + + if ((changed & APIC_SVR_ENABLE) != 0U) { + if ((new & APIC_SVR_ENABLE) == 0U) { + struct vmrt_vm_comp *vm = vlapic2vcpu(vlapic)->vm; + /* + * The apic is now disabled so stop the apic timer + * and mask all the LVT entries. + */ + printc("vlapic is software-disabled\n"); + + vlapic_mask_lvts(vlapic); + /* the only one enabled LINT0-ExtINT vlapic disabled */ + if (vm->wire_mode == VPIC_WIRE_NULL) { + vm->wire_mode = VPIC_WIRE_INTR; + printc("vpic wire mode -> INTR\n"); + } + } else { + /* + * The apic is now enabled so restart the apic timer + * if it is configured in periodic mode. + */ + printc("vlapic is software-enabled\n"); + g_vlapi_enabled = 1; + if (vlapic_lvtt_period(vlapic)) { + /* TODO: set timer logic */ + assert(0); + } + } + } +} + +static int32_t vlapic_read(struct acrn_vlapic *vlapic, uint32_t offset_arg, uint64_t *data) +{ + int32_t ret = 0; + struct lapic_regs *lapic = vlapic->apic_page; + uint32_t i; + uint32_t offset = offset_arg; + *data = 0UL; + + if (offset > sizeof(*lapic)) { + ret = -EACCES; + } else { + + offset &= ~0x3UL; + switch (offset) { + case APIC_OFFSET_ID: + *data = lapic->id.v; + break; + case APIC_OFFSET_VER: + *data = lapic->version.v; + break; + case APIC_OFFSET_PPR: + *data = lapic->ppr.v; + break; + case APIC_OFFSET_EOI: + *data = lapic->eoi.v; + break; + case APIC_OFFSET_LDR: + *data = lapic->ldr.v; + break; + case APIC_OFFSET_DFR: + *data = lapic->dfr.v; + break; + case APIC_OFFSET_SVR: + *data = lapic->svr.v; + break; + case APIC_OFFSET_ISR0: + case APIC_OFFSET_ISR1: + case APIC_OFFSET_ISR2: + case APIC_OFFSET_ISR3: + case APIC_OFFSET_ISR4: + case APIC_OFFSET_ISR5: + case APIC_OFFSET_ISR6: + case APIC_OFFSET_ISR7: + i = (offset - APIC_OFFSET_ISR0) >> 4U; + *data = lapic->isr[i].v; + break; + case APIC_OFFSET_TMR0: + case APIC_OFFSET_TMR1: + case APIC_OFFSET_TMR2: + case APIC_OFFSET_TMR3: + case APIC_OFFSET_TMR4: + case APIC_OFFSET_TMR5: + case APIC_OFFSET_TMR6: + case APIC_OFFSET_TMR7: + i = (offset - APIC_OFFSET_TMR0) >> 4U; + *data = lapic->tmr[i].v; + break; + case APIC_OFFSET_IRR0: + case APIC_OFFSET_IRR1: + case APIC_OFFSET_IRR2: + case APIC_OFFSET_IRR3: + case APIC_OFFSET_IRR4: + case APIC_OFFSET_IRR5: + case APIC_OFFSET_IRR6: + case APIC_OFFSET_IRR7: + i = (offset - APIC_OFFSET_IRR0) >> 4U; + *data = lapic->irr[i].v; + break; + case APIC_OFFSET_ESR: + *data = lapic->esr.v; + break; + case APIC_OFFSET_ICR_LOW: + *data = lapic->icr_lo.v; + if (is_x2apic_enabled(vlapic)) { + *data |= ((uint64_t)lapic->icr_hi.v) << 32U; + } + break; + case APIC_OFFSET_ICR_HI: + *data = lapic->icr_hi.v; + break; + case APIC_OFFSET_CMCI_LVT: + case APIC_OFFSET_TIMER_LVT: + case APIC_OFFSET_THERM_LVT: + case APIC_OFFSET_PERF_LVT: + case APIC_OFFSET_LINT0_LVT: + case APIC_OFFSET_LINT1_LVT: + case APIC_OFFSET_ERROR_LVT: + *data = vlapic_get_lvt(vlapic, offset); +#ifdef INVARIANTS + reg = vlapic_get_lvtptr(vlapic, offset); + assert(*data == *reg, "inconsistent lvt value at offset %#x: %#lx/%#x", offset, *data, *reg); +#endif + break; + case APIC_OFFSET_TIMER_ICR: + /* if TSCDEADLINE mode always return 0*/ + if (vlapic_lvtt_tsc_deadline(vlapic)) { + *data = 0UL; + } else { + *data = lapic->icr_timer.v; + } + break; + case APIC_OFFSET_TIMER_CCR: + *data = vlapic_get_ccr(vlapic); + break; + case APIC_OFFSET_TIMER_DCR: + *data = lapic->dcr_timer.v; + break; + default: + ret = -EACCES; + break; + } + } + + return ret; +} + + + +/* + * @pre vcpu != NULL + * @pre vector <= 255U + */ +void +vlapic_set_intr(struct vmrt_vm_vcpu *vcpu, uint32_t vector, bool level) +{ + struct acrn_vlapic *vlapic; + + vlapic = vcpu_vlapic(vcpu); + if (vector < 16U) { + vlapic_set_error(vlapic, APIC_ESR_RECEIVE_ILLEGAL_VECTOR); + assert(0); + } else { + vlapic_accept_intr(vlapic, vector, level); + } +} + +void vlapic_timer_expired(struct vmrt_vm_vcpu *vcpu) +{ + struct acrn_vlapic *vlapic; + struct lapic_regs *lapic; + + vlapic = vcpu_vlapic(vcpu); + lapic = vlapic->apic_page; + + /* inject vcpu timer interrupt if not masked */ + if (!vlapic_lvtt_masked(vlapic)) { + vlapic_set_intr(vcpu, lapic->lvt[APIC_LVT_TIMER].v & APIC_LVTT_VECTOR, LAPIC_TRIG_EDGE); + } +} + +/* + * @pre vm != NULL + */ +bool is_x2apic_enabled(const struct acrn_vlapic *vlapic) +{ + bool ret = false; + + return ret; +} + +bool is_xapic_enabled(const struct acrn_vlapic *vlapic) +{ + bool ret = true; + + return ret; +} + + +static bool apicv_basic_x2apic_read_msr_may_valid(uint32_t offset) +{ + return (offset != APIC_OFFSET_DFR) && (offset != APIC_OFFSET_ICR_HI); +} + +static bool apicv_advanced_x2apic_read_msr_may_valid(uint32_t offset) +{ + return (offset == APIC_OFFSET_TIMER_CCR); +} + +static bool apicv_basic_x2apic_write_msr_may_valid(uint32_t offset) +{ + return (offset != APIC_OFFSET_DFR) && (offset != APIC_OFFSET_ICR_HI); +} + +static bool apicv_advanced_x2apic_write_msr_may_valid(uint32_t offset) +{ + return (offset != APIC_OFFSET_DFR) && (offset != APIC_OFFSET_ICR_HI) && + (offset != APIC_OFFSET_EOI) && (offset != APIC_OFFSET_SELF_IPI); +} + + +/** + * APIC-v functions + * @pre get_pi_desc(vlapic2vcpu(vlapic)) != NULL + */ +static bool +apicv_set_intr_ready(struct acrn_vlapic *vlapic, uint32_t vector) +{ + struct pi_desc *pid; + uint32_t idx; + bool notify = false; + + pid = get_pi_desc(vlapic2vcpu(vlapic)); + idx = vector >> 6U; + if (!bitmap_test_and_set_lock((uint16_t)(vector & 0x3fU), &pid->pir[idx])) { + notify = !bitmap_test_and_set_lock(POSTED_INTR_ON, &pid->control.value); + } + return notify; +} + + +static void apicv_basic_inject_intr(struct acrn_vlapic *vlapic, + bool guest_irq_enabled, bool injected) +{ + uint32_t vector = 0U; + + if (guest_irq_enabled && (!injected)) { + vlapic_update_ppr(vlapic); + if (vlapic_find_deliverable_intr(vlapic, &vector)) { + assert(0); + vlapic_get_deliverable_intr(vlapic, vector); + } + } + + vlapic_update_tpr_threshold(vlapic); +} + +/* + * @brief Send a Posted Interrupt to itself. + * + * Interrupts are disabled on pCPU at this point of time. + * Upon the next VMEnter the self-IPI is serviced by the logical processor. + * Since the IPI vector is Posted Interrupt vector, logical processor syncs + * PIR to vIRR and updates RVI. + * + * @pre get_pi_desc(vlapic->vcpu) != NULL + */ +static inline struct pi_desc *get_pi_desc(struct vmrt_vm_vcpu *vcpu) +{ + return (struct pi_desc *)&(vcpu->shared_region->pi_desc); +} + +static void apicv_advanced_inject_intr(struct acrn_vlapic *vlapic, + __unused bool guest_irq_enabled, __unused bool injected) +{ + struct vmrt_vm_vcpu *vcpu = vlapic2vcpu(vlapic); + struct pi_desc *pid = get_pi_desc(vcpu); + + if (bitmap_test(POSTED_INTR_ON, &(pid->control.value))) { + vcpu->shared_region->inject_evt = 1; + } +} + +void vlapic_inject_intr(struct vmrt_vm_vcpu *vcpu) +{ + struct acrn_vlapic *vlapic = vcpu_vlapic(vcpu); + apicv_advanced_inject_intr(vlapic, 0, 0); +} + +static bool apicv_basic_has_pending_delivery_intr(struct vmrt_vm_vcpu *vcpu) +{ + uint32_t vector; + struct acrn_vlapic *vlapic = vcpu_vlapic(vcpu); + + vlapic_update_ppr(vlapic); + + /* check and raise request if we have a deliverable irq in LAPIC IRR */ + if (vlapic_find_deliverable_intr(vlapic, &vector)) { + /* we have pending IRR */ + assert(0); + } + + return vcpu->pending_req != 0UL; +} + +static bool apicv_advanced_has_pending_delivery_intr(__unused struct vmrt_vm_vcpu *vcpu) +{ + return false; +} + +bool vlapic_has_pending_delivery_intr(struct vmrt_vm_vcpu *vcpu) +{ + struct acrn_vlapic *vlapic = vcpu_vlapic(vcpu); + return vlapic->ops->has_pending_delivery_intr(vcpu); +} + +uint32_t vlapic_get_next_pending_intr(struct vmrt_vm_vcpu *vcpu) +{ + struct acrn_vlapic *vlapic = vcpu_vlapic(vcpu); + uint32_t vector; + + vector = vlapic_find_highest_irr(vlapic); + + return vector; +} + +static bool apicv_basic_has_pending_intr(struct vmrt_vm_vcpu *vcpu) +{ + return vlapic_get_next_pending_intr(vcpu) != 0UL; +} + +static bool apicv_advanced_has_pending_intr(struct vmrt_vm_vcpu *vcpu) +{ + return apicv_basic_has_pending_intr(vcpu); +} + +bool vlapic_clear_pending_intr(struct vmrt_vm_vcpu *vcpu, uint32_t vector) +{ + struct acrn_vlapic *vlapic = vcpu_vlapic(vcpu); + struct lapic_reg *irrptr = &(vlapic->apic_page->irr[0]); + uint32_t idx = vector >> 5U; + return bitmap32_test_and_clear_lock((uint16_t)(vector & 0x1fU), &irrptr[idx].v); +} + +bool vlapic_has_pending_intr(struct vmrt_vm_vcpu *vcpu) +{ + struct acrn_vlapic *vlapic = vcpu_vlapic(vcpu); + return vlapic->ops->has_pending_intr(vcpu); +} + +static bool apicv_basic_apic_read_access_may_valid(__unused uint32_t offset) +{ + return true; +} + +static bool apicv_advanced_apic_read_access_may_valid(uint32_t offset) +{ + return ((offset == APIC_OFFSET_CMCI_LVT) || (offset == APIC_OFFSET_TIMER_CCR)); +} + +static bool apicv_basic_apic_write_access_may_valid(uint32_t offset) +{ + return (offset != APIC_OFFSET_SELF_IPI); +} + +static bool apicv_advanced_apic_write_access_may_valid(uint32_t offset) +{ + return (offset == APIC_OFFSET_CMCI_LVT); +} + +int32_t veoi_vmexit_handler(struct vmrt_vm_vcpu *vcpu) +{ + struct acrn_vlapic *vlapic = NULL; + + uint32_t vector; + struct lapic_regs *lapic; + struct lapic_reg *tmrptr; + uint32_t idx; + + /* TODO: fix veoi if necessary */ + assert(0); + + return 0; +} + +static void vlapic_x2apic_self_ipi_handler(struct acrn_vlapic *vlapic) +{ + /* TODO: fix x2apic virtualization if necessary */ + struct lapic_regs *lapic; + uint32_t vector; + + lapic = vlapic->apic_page; + vector = lapic->self_ipi.v & APIC_VECTOR_MASK; + assert(0); +} + + +/* + * TPR threshold (32 bits). Bits 3:0 of this field determine the threshold + * below which bits 7:4 of VTPR (see Section 29.1.1) cannot fall. + */ +void vlapic_update_tpr_threshold(const struct acrn_vlapic *vlapic) +{ + /* TODO: fix trp virtualization if necessary */ + uint32_t irr, tpr, threshold; + assert(0); +} + +int32_t tpr_below_threshold_vmexit_handler(struct vmrt_vm_vcpu *vcpu) +{ + /* TODO: fix trp virtualization if necessary */ + assert(0); + + return 0; +} + +static const struct acrn_apicv_ops apicv_basic_ops = { + .accept_intr = apicv_basic_accept_intr, + .inject_intr = apicv_basic_inject_intr, + .has_pending_delivery_intr = apicv_basic_has_pending_delivery_intr, + .has_pending_intr = apicv_basic_has_pending_intr, + .apic_read_access_may_valid = apicv_basic_apic_read_access_may_valid, + .apic_write_access_may_valid = apicv_basic_apic_write_access_may_valid, + .x2apic_read_msr_may_valid = apicv_basic_x2apic_read_msr_may_valid, + .x2apic_write_msr_may_valid = apicv_basic_x2apic_write_msr_may_valid, +}; + +static const struct acrn_apicv_ops apicv_advanced_ops = { + .accept_intr = apicv_advanced_accept_intr, + .inject_intr = apicv_advanced_inject_intr, + .has_pending_delivery_intr = apicv_advanced_has_pending_delivery_intr, + .has_pending_intr = apicv_advanced_has_pending_intr, + .apic_read_access_may_valid = apicv_advanced_apic_read_access_may_valid, + .apic_write_access_may_valid = apicv_advanced_apic_write_access_may_valid, + .x2apic_read_msr_may_valid = apicv_advanced_x2apic_read_msr_may_valid, + .x2apic_write_msr_may_valid = apicv_advanced_x2apic_write_msr_may_valid, +}; + +/* + * set apicv ops for apicv basic mode or apicv advenced mode. + */ +void vlapic_set_apicv_ops(void) +{ + if (is_apicv_advanced_feature_supported()) { + apicv_ops = &apicv_advanced_ops; + } else { + apicv_ops = &apicv_basic_ops; + } +} + +static uint16_t vm_apicid2vcpu_id(struct vmrt_vm_comp *vm, uint32_t lapicid) +{ + uint16_t i; + struct vmrt_vm_vcpu *vcpu = NULL; + uint16_t cpu_id = INVALID_CPU_ID; + + for (int i = 0; i < vm->num_vcpu; i++) { + vcpu = &vm->vcpus[i]; + if (vcpu_vlapic(vcpu)->vapic_id == lapicid) { + cpu_id = vcpu->cpuid; + break; + } + } + + if (cpu_id == INVALID_CPU_ID) { + printc("%s: bad lapicid %u", __func__, lapicid); + assert(0); + } + + return cpu_id; + +} + +static inline void set_dest_mask_phys(struct vmrt_vm_comp *vm, uint64_t *dmask, uint32_t dest) +{ + uint16_t vcpu_id; + + vcpu_id = vm_apicid2vcpu_id(vm, dest); + if (vcpu_id < vm->num_vcpu) { + bitmap_set_nolock(vcpu_id, dmask); + } +} + +/* + * This function tells if a vlapic belongs to the destination. + * If yes, return true, else reture false. + * + * @pre vlapic != NULL + */ +static inline bool is_dest_field_matched(const struct acrn_vlapic *vlapic, uint32_t dest) +{ + uint32_t logical_id, cluster_id, dest_logical_id, dest_cluster_id; + uint32_t ldr = vlapic->apic_page->ldr.v; + bool ret = false; + + if (is_x2apic_enabled(vlapic)) { + logical_id = ldr & 0xFFFFU; + cluster_id = (ldr >> 16U) & 0xFFFFU; + dest_logical_id = dest & 0xFFFFU; + dest_cluster_id = (dest >> 16U) & 0xFFFFU; + if ((cluster_id == dest_cluster_id) && ((logical_id & dest_logical_id) != 0U)) { + ret = true; + } + } else { + uint32_t dfr = vlapic->apic_page->dfr.v; + if ((dfr & APIC_DFR_MODEL_MASK) == APIC_DFR_MODEL_FLAT) { + /* + * In the "Flat Model" the MDA is interpreted as an 8-bit wide + * bitmask. This model is available in the xAPIC mode only. + */ + logical_id = ldr >> 24U; + dest_logical_id = dest & 0xffU; + if ((logical_id & dest_logical_id) != 0U) { + ret = true; + } + } else if ((dfr & APIC_DFR_MODEL_MASK) == APIC_DFR_MODEL_CLUSTER) { + /* + * In the "Cluster Model" the MDA is used to identify a + * specific cluster and a set of APICs in that cluster. + */ + logical_id = (ldr >> 24U) & 0xfU; + cluster_id = ldr >> 28U; + dest_logical_id = dest & 0xfU; + dest_cluster_id = (dest >> 4U) & 0xfU; + if ((cluster_id == dest_cluster_id) && ((logical_id & dest_logical_id) != 0U)) { + ret = true; + } + } else { + /* Guest has configured a bad logical model for this vcpu. */ + printc("vlapic has bad logical model %x", dfr); + assert(0); + } + } + + return ret; +} + +/* + * This function populates 'dmask' with the set of vcpus that match the + * addressing specified by the (dest, phys, lowprio) tuple. + */ +uint64_t +vlapic_calc_dest_noshort(struct vmrt_vm_comp *vm, bool is_broadcast, + uint32_t dest, bool phys, bool lowprio) +{ + uint64_t dmask = 0UL; + struct acrn_vlapic *vlapic, *lowprio_dest = NULL; + struct vmrt_vm_vcpu *vcpu; + uint16_t vcpu_id; + + if (is_broadcast) { + /* Broadcast in both logical and physical modes. */ + printc("Broadcast is not supported now\n"); + assert(0); + } else if (phys) { + /* Physical mode: "dest" is local APIC ID. */ + printc("vlapic phy dst mode to find cpu\n"); + set_dest_mask_phys(vm, &dmask, dest); + } else { + /* + * Logical mode: "dest" is message destination addr + * to be compared with the logical APIC ID in LDR. + */ + for (int i = 0; i < vm->num_vcpu; i++) { + vcpu = &vm->vcpus[i]; + vcpu_id = i; + vlapic = vcpu_vlapic(vcpu); + if (!is_dest_field_matched(vlapic, dest)) { + continue; + } + + if (lowprio) { + /* + * for lowprio delivery mode, the lowest-priority one + * among all "dest" matched processors accepts the intr. + */ + if (lowprio_dest == NULL) { + lowprio_dest = vlapic; + } else if (lowprio_dest->apic_page->ppr.v > vlapic->apic_page->ppr.v) { + lowprio_dest = vlapic; + } else { + /* No other state currently, do nothing */ + } + } else { + bitmap_set_nolock(vcpu_id, &dmask); + } + } + + if (lowprio && (lowprio_dest != NULL)) { + bitmap_set_nolock(vlapic2vcpu(lowprio_dest)->cpuid, &dmask); + } + } + + return dmask; +} + +void +vlapic_receive_intr(struct vmrt_vm_comp *vm, bool level, uint32_t dest, bool phys, + uint32_t delmode, uint32_t vec, bool rh) +{ + bool lowprio; + uint16_t vcpu_id; + uint64_t dmask; + struct vmrt_vm_vcpu *target_vcpu; + + if ((delmode != IOAPIC_RTE_DELMODE_FIXED) && + (delmode != IOAPIC_RTE_DELMODE_LOPRI) && + (delmode != IOAPIC_RTE_DELMODE_EXINT)) { + printc("vlapic intr invalid delmode %#x", delmode); + assert(0); + } else { + lowprio = (delmode == IOAPIC_RTE_DELMODE_LOPRI) || rh; + + /* + * We don't provide any virtual interrupt redirection hardware so + * all interrupts originating from the ioapic or MSI specify the + * 'dest' in the legacy xAPIC format. + */ + dmask = vlapic_calc_dest_noshort(vm, false, dest, phys, lowprio); + + for (vcpu_id = 0U; vcpu_id < vm->num_vcpu; vcpu_id++) { + struct acrn_vlapic *vlapic; + if ((dmask & (1UL << vcpu_id)) != 0UL) { + target_vcpu = vmrt_get_vcpu(vm, vcpu_id); + + /* only make request when vlapic enabled */ + vlapic = vcpu_vlapic(target_vcpu); + if (vlapic_enabled(vlapic)) { + if (delmode == IOAPIC_RTE_DELMODE_EXINT) { + assert(0); + } else { + vlapic_set_intr(target_vcpu, vec, level); + } + } else {assert(0);} + } + } + } +} + +void +vlapic_reset(struct acrn_vlapic *vlapic) +{ + struct lapic_regs *lapic; + + vlapic->msr_apicbase = DEFAULT_APIC_BASE; + + if (vlapic2vcpu(vlapic)->cpuid == BSP_CPU_ID) { + vlapic->msr_apicbase |= APICBASE_BSP; + } + vlapic->vapic_id = vlapic2vcpu(vlapic)->cpuid; + + /* Upon reset, vlapic is set to xAPIC mode. */ + vlapic->msr_apicbase |= APICBASE_XAPIC; + + lapic = vlapic->apic_page; + (void)memset((void *)lapic, 0U, sizeof(struct lapic_regs)); + + lapic->id.v = vlapic->vapic_id; + if (!is_x2apic_enabled(vlapic)) { + lapic->id.v <<= APIC_ID_SHIFT; + } + + lapic->version.v = VLAPIC_VERSION; + lapic->version.v |= (VLAPIC_MAXLVT_INDEX << MAXLVTSHIFT); + lapic->dfr.v = 0xffffffffU; + lapic->svr.v = APIC_SVR_VECTOR; + vlapic_mask_lvts(vlapic); + + lapic->icr_timer.v = 0U; + lapic->dcr_timer.v = 0U; + vlapic_write_dcr(vlapic); + + vlapic->svr_last = lapic->svr.v; + + vlapic->isrv = 0U; +} + + +int32_t apic_write_vmexit_handler(struct vmrt_vm_vcpu *vcpu) +{ + uint64_t qual; + int32_t err = 0; + uint32_t offset; + struct acrn_vlapic *vlapic = NULL; + + qual = vcpu->shared_region->qualification; + offset = (uint32_t)(qual & 0xFFFUL); + + vlapic = vcpu->vlapic; + + switch (offset) { + case APIC_OFFSET_ID: + /* Force APIC ID as read only */ + break; + case APIC_OFFSET_LDR: + vlapic_write_ldr(vlapic); + break; + case APIC_OFFSET_DFR: + vlapic_write_dfr(vlapic); + break; + case APIC_OFFSET_SVR: + vlapic_write_svr(vlapic); + break; + case APIC_OFFSET_ESR: + vlapic_write_esr(vlapic); + break; + case APIC_OFFSET_ICR_LOW: + vlapic_write_icrlo(vlapic); + break; + case APIC_OFFSET_CMCI_LVT: + case APIC_OFFSET_TIMER_LVT: + case APIC_OFFSET_THERM_LVT: + case APIC_OFFSET_PERF_LVT: + case APIC_OFFSET_LINT0_LVT: + case APIC_OFFSET_LINT1_LVT: + case APIC_OFFSET_ERROR_LVT: + vlapic_write_lvt(vlapic, offset); + break; + case APIC_OFFSET_TIMER_ICR: + vlapic_write_icrtmr(vlapic); + break; + case APIC_OFFSET_TIMER_DCR: + vlapic_write_dcr(vlapic); + break; + case APIC_OFFSET_SELF_IPI: + if (is_x2apic_enabled(vlapic)) { + /* Don't support x2apic */ + assert(0); + break; + } + /* falls through */ + default: + err = -EACCES; + printc("Unhandled APIC-Write, offset:0x%x", offset); + VM_PANIC(vcpu); + break; + } + + return err; +} + +void +lapic_write_handler(struct vmrt_vm_vcpu *vcpu) +{ + apic_write_vmexit_handler(vcpu); +} + +void +lapic_intr_inject(struct vmrt_vm_vcpu *vcpu, u8_t vector, int autoeoi) +{ + struct vm_vcpu_shared_region *shared_region = vcpu->shared_region; + struct acrn_vlapic *vlapic = vcpu_vlapic(vcpu); + struct lapic_regs *lapic = vlapic->apic_page; + u8_t offset = vector / 32; + u8_t bit = vector % 32; + + u8_t svi = (u8_t)(shared_region->interrupt_status >> 8); + u8_t rvi = (u8_t)shared_region->interrupt_status; + + if (svi == vector && autoeoi) { + /* TODO: svi should be the second highest priority bit in isr */ + svi = 0; + lapic->isr[offset].v &= ~(1U << bit); + } + if (rvi < vector) { + rvi = vector; + } + + /* Accept the interrupt */ + lapic->irr[offset].v |= (1U << bit); + + shared_region->interrupt_status = svi << 8 | rvi; +} diff --git a/src/components/implementation/simple_vmm/multi_vmm/vlapic.h b/src/components/implementation/simple_vmm/multi_vmm/vlapic.h new file mode 100644 index 0000000000..d4e8645661 --- /dev/null +++ b/src/components/implementation/simple_vmm/multi_vmm/vlapic.h @@ -0,0 +1,260 @@ +/*- + * Copyright (c) 2011 NetApp, Inc. + * Copyright (c) 2017-2022 Intel Corporation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef VLAPIC_H +#define VLAPIC_H + +#include +#include + +/** + * @file vlapic.h + * + * @brief public APIs for virtual LAPIC + */ + + +#define VLAPIC_MAXLVT_INDEX APIC_LVT_CMCI + +struct hv_timer { + // struct list_head node; /**< link all timers */ + int mode; /**< timer mode: one-shot or periodic */ + uint64_t timeout; /**< tsc deadline to interrupt */ + uint64_t period_in_cycle; /**< period of the periodic timer in CPU ticks */ + // timer_handle_t func; /**< callback if time reached */ + void *priv_data; /**< func private data */ +}; + +struct vlapic_timer { + struct hv_timer timer; + uint32_t mode; + uint32_t tmicr; + uint32_t divisor_shift; +}; + +struct acrn_vlapic { + /* + * Please keep 'apic_page' as the first field in + * current structure, as below alignment restrictions are mandatory + * to support APICv features: + * - 'apic_page' MUST be 4KB aligned. + * IRR, TMR and PIR could be accessed by other vCPUs when deliver + * an interrupt to vLAPIC. + */ + struct lapic_regs *apic_page; + + struct vmrt_vm_vcpu *vcpu; + + uint32_t vapic_id; + uint32_t esr_pending; + int32_t esr_firing; + + struct vlapic_timer vtimer; + + /* + * isrv: vector number for the highest priority bit that is set in the ISR + */ + uint32_t isrv; + + uint64_t msr_apicbase; + + const struct acrn_apicv_ops *ops; + + /* + * Copies of some registers in the virtual APIC page. We do this for + * a couple of different reasons: + * - to be able to detect what changed (e.g. svr_last) + * - to maintain a coherent snapshot of the register (e.g. lvt_last) + */ + uint32_t svr_last; + uint32_t lvt_last[VLAPIC_MAXLVT_INDEX + 1]; +} __attribute__((aligned(PAGE_SIZE_4K))); + + +struct vmrt_vm_vcpu; +struct acrn_apicv_ops { + void (*accept_intr)(struct acrn_vlapic *vlapic, uint32_t vector, bool level); + void (*inject_intr)(struct acrn_vlapic *vlapic, bool guest_irq_enabled, bool injected); + bool (*has_pending_delivery_intr)(struct vmrt_vm_vcpu *vcpu); + bool (*has_pending_intr)(struct vmrt_vm_vcpu *vcpu); + bool (*apic_read_access_may_valid)(uint32_t offset); + bool (*apic_write_access_may_valid)(uint32_t offset); + bool (*x2apic_read_msr_may_valid)(uint32_t offset); + bool (*x2apic_write_msr_may_valid)(uint32_t offset); +}; + +enum reset_mode; +extern const struct acrn_apicv_ops *apicv_ops; +void vlapic_set_apicv_ops(void); + +/** + * @brief virtual LAPIC + * + * @addtogroup acrn_vlapic ACRN vLAPIC + * @{ + */ + +void vlapic_inject_intr(struct vmrt_vm_vcpu *vcpu); +bool vlapic_has_pending_delivery_intr(struct vmrt_vm_vcpu *vcpu); +bool vlapic_has_pending_intr(struct vmrt_vm_vcpu *vcpu); + +/** + * Returns the highest priority pending vector on vLAPIC, or + * 0 if there is no pending vector. + */ +uint32_t vlapic_get_next_pending_intr(struct vmrt_vm_vcpu *vcpu); + +/** + * Clears a pending vector from vIRR. Returns true if + * the bit was previously present, false otherwise. + */ +bool vlapic_clear_pending_intr(struct vmrt_vm_vcpu *vcpu, uint32_t vector); + +uint64_t vlapic_get_tsc_deadline_msr(const struct acrn_vlapic *vlapic); +void vlapic_set_tsc_deadline_msr(struct acrn_vlapic *vlapic, uint64_t val_arg); +uint64_t vlapic_get_apicbase(const struct acrn_vlapic *vlapic); +int32_t vlapic_set_apicbase(struct acrn_vlapic *vlapic, uint64_t new); +int32_t vlapic_x2apic_read(struct vmrt_vm_vcpu *vcpu, uint32_t msr, uint64_t *val); +int32_t vlapic_x2apic_write(struct vmrt_vm_vcpu *vcpu, uint32_t msr, uint64_t val); + +/* + * Signals to the LAPIC that an interrupt at 'vector' needs to be generated + * to the 'cpu', the state is recorded in IRR. + * @pre vcpu != NULL + * @pre vector <= 255U + */ +void vlapic_set_intr(struct vmrt_vm_vcpu *vcpu, uint32_t vector, bool level); + +#define LAPIC_TRIG_LEVEL true +#define LAPIC_TRIG_EDGE false + +static inline uint32_t prio(uint32_t x) +{ + return (x >> 4U); +} + +/** + * @brief Triggers LAPIC local interrupt(LVT). + * + * @param[in] vm Pointer to VM data structure + * @param[in] vcpu_id_arg ID of vCPU, BROADCAST_CPU_ID means triggering + * interrupt to all vCPUs. + * @param[in] lvt_index The index which LVT would to be fired. + * + * @retval 0 on success. + * @retval -EINVAL on error that vcpu_id_arg or vector of the LVT is invalid. + * + * @pre vm != NULL + */ +int32_t vlapic_set_local_intr(struct vmrt_vm_comp *vm, uint16_t vcpu_id_arg, uint32_t lvt_index); + +/** + * @brief Inject MSI to target VM. + * + * @param[in] vm Pointer to VM data structure + * @param[in] addr MSI address. + * @param[in] data MSI data. + * + * @retval 0 on success. + * @retval -1 on error that addr is invalid. + * + * @pre vm != NULL + */ +int32_t vlapic_inject_msi(struct vmrt_vm_comp *vm, uint64_t addr, uint64_t data); + + +void vlapic_receive_intr(struct vmrt_vm_comp *vm, bool level, uint32_t dest, + bool phys, uint32_t delmode, uint32_t vec, bool rh); + +/** + * @pre vlapic != NULL + */ +static inline uint32_t vlapic_get_apicid(const struct acrn_vlapic *vlapic) +{ + return vlapic->vapic_id; +} + +void vlapic_create(struct vmrt_vm_vcpu *vcpu, uint16_t pcpu_id); +/* + * @pre vcpu != NULL + */ +void vlapic_free(struct vmrt_vm_vcpu *vcpu); + +void vlapic_reset(struct acrn_vlapic *vlapic); +void vlapic_restore(struct acrn_vlapic *vlapic, const struct lapic_regs *regs); +uint64_t vlapic_apicv_get_apic_access_addr(void); +uint64_t vlapic_apicv_get_apic_page_addr(struct acrn_vlapic *vlapic); +int32_t apic_access_vmexit_handler(struct vmrt_vm_vcpu *vcpu); +int32_t apic_write_vmexit_handler(struct vmrt_vm_vcpu *vcpu); +int32_t veoi_vmexit_handler(struct vmrt_vm_vcpu *vcpu); +void vlapic_update_tpr_threshold(const struct acrn_vlapic *vlapic); +int32_t tpr_below_threshold_vmexit_handler(struct vmrt_vm_vcpu *vcpu); +uint64_t vlapic_calc_dest_noshort(struct vmrt_vm_comp *vm, bool is_broadcast, + uint32_t dest, bool phys, bool lowprio); +bool is_x2apic_enabled(const struct acrn_vlapic *vlapic); +bool is_xapic_enabled(const struct acrn_vlapic *vlapic); + +static inline bool is_apicv_advanced_feature_supported(void) +{ + return false; +} +#define POSTED_INTR_ON 0U +/* Posted Interrupt Descriptor (PID) in VT-d spec */ +struct pi_desc { + /* Posted Interrupt Requests, one bit per requested vector */ + uint64_t pir[4]; + + union { + struct { + /* Outstanding Notification */ + uint16_t on:1; + + /* Suppress Notification, of non-urgent interrupts */ + uint16_t sn:1; + + uint16_t rsvd_1:14; + + /* Notification Vector */ + uint8_t nv; + + uint8_t rsvd_2; + + /* Notification destination, a physical LAPIC ID */ + uint32_t ndst; + } bits; + + uint64_t value; + } control; + + uint32_t rsvd[6]; +} __attribute__((aligned(64)));; +/** + * @} + */ +/* End of acrn_vlapic */ +#endif /* VLAPIC_H */ diff --git a/src/components/implementation/simple_vmm/multi_vmm/vlapic_priv.h b/src/components/implementation/simple_vmm/multi_vmm/vlapic_priv.h new file mode 100644 index 0000000000..6c66f6c84e --- /dev/null +++ b/src/components/implementation/simple_vmm/multi_vmm/vlapic_priv.h @@ -0,0 +1,84 @@ +/*- + * Copyright (c) 2013 Neel Natu + * Copyright (c) 2017-2022 Intel Corporation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef VLAPIC_PRIV_H +#define VLAPIC_PRIV_H + +/* + * APIC Register: Offset Description + */ +#define APIC_OFFSET_ID 0x20U /* Local APIC ID */ +#define APIC_OFFSET_VER 0x30U /* Local APIC Version */ +#define APIC_OFFSET_TPR 0x80U /* Task Priority Register */ +#define APIC_OFFSET_APR 0x90U /* Arbitration Priority */ +#define APIC_OFFSET_PPR 0xA0U /* Processor Priority Register */ +#define APIC_OFFSET_EOI 0xB0U /* EOI Register */ +#define APIC_OFFSET_RRR 0xC0U /* Remote read */ +#define APIC_OFFSET_LDR 0xD0U /* Logical Destination */ +#define APIC_OFFSET_DFR 0xE0U /* Destination Format Register */ +#define APIC_OFFSET_SVR 0xF0U /* Spurious Vector Register */ +#define APIC_OFFSET_ISR0 0x100U /* In Service Register */ +#define APIC_OFFSET_ISR1 0x110U +#define APIC_OFFSET_ISR2 0x120U +#define APIC_OFFSET_ISR3 0x130U +#define APIC_OFFSET_ISR4 0x140U +#define APIC_OFFSET_ISR5 0x150U +#define APIC_OFFSET_ISR6 0x160U +#define APIC_OFFSET_ISR7 0x170U +#define APIC_OFFSET_TMR0 0x180U /* Trigger Mode Register */ +#define APIC_OFFSET_TMR1 0x190U +#define APIC_OFFSET_TMR2 0x1A0U +#define APIC_OFFSET_TMR3 0x1B0U +#define APIC_OFFSET_TMR4 0x1C0U +#define APIC_OFFSET_TMR5 0x1D0U +#define APIC_OFFSET_TMR6 0x1E0U +#define APIC_OFFSET_TMR7 0x1F0U +#define APIC_OFFSET_IRR0 0x200U /* Interrupt Request Register */ +#define APIC_OFFSET_IRR1 0x210U +#define APIC_OFFSET_IRR2 0x220U +#define APIC_OFFSET_IRR3 0x230U +#define APIC_OFFSET_IRR4 0x240U +#define APIC_OFFSET_IRR5 0x250U +#define APIC_OFFSET_IRR6 0x260U +#define APIC_OFFSET_IRR7 0x270U +#define APIC_OFFSET_ESR 0x280U /* Error Status Register */ +#define APIC_OFFSET_CMCI_LVT 0x2F0U /* Local Vector Table (CMCI) */ +#define APIC_OFFSET_ICR_LOW 0x300U /* Interrupt Command Register */ +#define APIC_OFFSET_ICR_HI 0x310U +#define APIC_OFFSET_TIMER_LVT 0x320U /* Local Vector Table (Timer) */ +#define APIC_OFFSET_THERM_LVT 0x330U /* Local Vector Table (Thermal) */ +#define APIC_OFFSET_PERF_LVT 0x340U /* Local Vector Table (PMC) */ +#define APIC_OFFSET_LINT0_LVT 0x350U /* Local Vector Table (LINT0) */ +#define APIC_OFFSET_LINT1_LVT 0x360U /* Local Vector Table (LINT1) */ +#define APIC_OFFSET_ERROR_LVT 0x370U /* Local Vector Table (ERROR) */ +#define APIC_OFFSET_TIMER_ICR 0x380U /* Timer's Initial Count */ +#define APIC_OFFSET_TIMER_CCR 0x390U /* Timer's Current Count */ +#define APIC_OFFSET_TIMER_DCR 0x3E0U /* Timer's Divide Configuration */ +#define APIC_OFFSET_SELF_IPI 0x3F0U /* Self IPI Register */ + +#endif /* VLAPIC_PRIV_H */ diff --git a/src/components/implementation/simple_vmm/multi_vmm/vmmio.c b/src/components/implementation/simple_vmm/multi_vmm/vmmio.c new file mode 100644 index 0000000000..1efb26ee1b --- /dev/null +++ b/src/components/implementation/simple_vmm/multi_vmm/vmmio.c @@ -0,0 +1,53 @@ +#include +#include +#include +#include + +void +ept_violation_handler(struct vmrt_vm_vcpu *vcpu) +{ + volatile struct vm_vcpu_shared_region *regs = vcpu->shared_region; + u64_t qualification = regs->qualification; + u64_t gpa; + struct acrn_mmio_request *mmio_req = vcpu->mmio_request; + + gpa = regs->gpa; + + /* Specify if read or write operation */ + if ((qualification & 0x2UL) != 0UL) { + /* Write operation */ + mmio_req->direction = ACRN_IOREQ_DIR_WRITE; + mmio_req->value = 0UL; + } else { + /* Read operation */ + mmio_req->direction = ACRN_IOREQ_DIR_READ; + } + + mmio_req->address = gpa; + + if (gpa >= IOAPIC_BASE_ADDR && gpa < IOAPIC_BASE_ADDR + PAGE_SIZE_4K) { + int ret = decode_instruction(vcpu); + + if (ret > 0) { + mmio_req->size = (uint64_t)ret; + } else { + VM_PANIC(vcpu); + } + + if (mmio_req->direction == ACRN_IOREQ_DIR_WRITE) { + if (emulate_instruction(vcpu) != 0) { + VM_PANIC(vcpu); + } + } + + vioapic_mmio_access_handler(vcpu); + + if (mmio_req->direction == ACRN_IOREQ_DIR_READ) { + /* Emulate instruction and update vcpu register set */ + (void)emulate_instruction(vcpu); + } + GOTO_NEXT_INST(regs); + } else { + VM_PANIC(vcpu); + } +} diff --git a/src/components/implementation/simple_vmm/multi_vmm/vmsr.c b/src/components/implementation/simple_vmm/multi_vmm/vmsr.c new file mode 100644 index 0000000000..1f45f13692 --- /dev/null +++ b/src/components/implementation/simple_vmm/multi_vmm/vmsr.c @@ -0,0 +1,249 @@ +#include +#include + +void +rdmsr_handler(struct vmrt_vm_vcpu *vcpu) +{ + volatile struct vm_vcpu_shared_region *regs = vcpu->shared_region; + + switch (regs->cx) { + case MSR_IA32_EFER: + { + u64_t guest_efer = regs->efer; + regs->ax = (u32_t)guest_efer; + regs->dx = (u32_t)(guest_efer >> 32); + goto done; + } + case MSR_IA32_MISC_ENABLE: + { + /* Note: read only MSR, and its value can be fixed for all cores */ + u64_t misc = 0x800001; + regs->ax = (u32_t)misc; + regs->dx = (u32_t)(misc >> 32); + goto done; + } + case MSR_IA32_BIOS_SIGN_ID: + { + /* Note: microcode is pre-set in the kernel */ + u64_t v = regs->microcode_version; + regs->ax = (u32_t)v; + regs->dx = (u32_t)(v >> 32); + goto done; + } + case MSR_IA32_TSC_ADJUST: + { + /* TODO: need to handle tsc adjustment in VM */ + u32_t ax, dx; + regs->ax = 0; + regs->dx = 0; + goto done; + } + + /* MTRRs can be ingored in Linux and Linux knows it is a virtual environment */ + case MSR_IA32_MTRR_CAP: + case MSR_IA32_MTRR_DEF_TYPE: + case MSR_IA32_MTRR_PHYSBASE_0: + case MSR_IA32_MTRR_PHYSMASK_0: + case MSR_IA32_MTRR_PHYSBASE_1: + case MSR_IA32_MTRR_PHYSMASK_1: + case MSR_IA32_MTRR_PHYSBASE_2: + case MSR_IA32_MTRR_PHYSMASK_2: + case MSR_IA32_MTRR_PHYSBASE_3: + case MSR_IA32_MTRR_PHYSMASK_3: + case MSR_IA32_MTRR_PHYSBASE_4: + case MSR_IA32_MTRR_PHYSMASK_4: + case MSR_IA32_MTRR_PHYSBASE_5: + case MSR_IA32_MTRR_PHYSMASK_5: + case MSR_IA32_MTRR_PHYSBASE_6: + case MSR_IA32_MTRR_PHYSMASK_6: + case MSR_IA32_MTRR_PHYSBASE_7: + case MSR_IA32_MTRR_PHYSMASK_7: + case MSR_IA32_MTRR_PHYSBASE_8: + case MSR_IA32_MTRR_PHYSMASK_8: + case MSR_IA32_MTRR_PHYSBASE_9: + case MSR_IA32_MTRR_PHYSMASK_9: + case MSR_IA32_MTRR_FIX64K_00000: + case MSR_IA32_MTRR_FIX16K_80000: + case MSR_IA32_MTRR_FIX16K_A0000: + case MSR_IA32_MTRR_FIX4K_C0000: + case MSR_IA32_MTRR_FIX4K_C8000: + case MSR_IA32_MTRR_FIX4K_D0000: + case MSR_IA32_MTRR_FIX4K_D8000: + case MSR_IA32_MTRR_FIX4K_E0000: + case MSR_IA32_MTRR_FIX4K_E8000: + case MSR_IA32_MTRR_FIX4K_F0000: + case MSR_IA32_MTRR_FIX4K_F8000: + case MSR_IA32_PAT: + { + regs->ax = 0; + regs->dx = 0; + goto done; + } + case MSR_PPERF: + { + /* FIXME: should inject #GP to guest, thus guest knows this MSR is not present */ + regs->ax = 0; + regs->dx = 0; + goto done; + } + case MSR_SMI_COUNT: + { + /* FIXME: should inject #GP to guest, thus guest knows this MSR is not present */ + regs->ax = 0; + regs->dx = 0; + goto done; + } + case MSR_IA32_APIC_BASE: + { + /* TODO: for non-BSP, the BSP flag should be cleared */ + /* 0x900 : enable xapic and this is BSP */ + regs->ax = 0XFEE00000 | 0x900; + regs->dx = 0; + goto done; + } + case MSR_IA32_FEATURE_CONTROL: + { + /* Lock the feature control in VM */ + regs->ax = 1; + regs->dx = 0; + goto done; + } + case MSR_MISC_FEATURE_ENABLES: + { + /* This MSR can be reserved to 0 */ + regs->ax = 0; + regs->dx = 0; + goto done; + } + case MSR_PLATFORM_INFO: + { + /* Contains power management stuff and can be ignored */ + regs->ax = 0; + regs->dx = 0; + goto done; + } + case MSR_IA32_SPEC_CTRL: + { + /* This MSR has a value of 0 after reset, thus just keep it ad default, don't modify */ + regs->ax = 0; + regs->dx = 0; + goto done; + } + default: + VM_PANIC(vcpu); + } +done: + GOTO_NEXT_INST(regs); + return; +} + +void +wrmsr_handler(struct vmrt_vm_vcpu *vcpu) +{ + volatile struct vm_vcpu_shared_region *regs = vcpu->shared_region; + + switch (regs->cx) { + case MSR_IA32_EFER: + { + u64_t guest_efer; + guest_efer = regs->ax & 0XFFFFFFFF; + guest_efer |= ((regs->dx & 0XFFFFFFFF) << 32); + regs->efer = guest_efer; + + goto done; + } + case MSR_IA32_BIOS_SIGN_ID: + { + /* Microcode has been retrived in the kernel, thus don't need to process here */ + goto done; + } + case MSR_IA32_XSS: + { + u64_t guest_xss; + guest_xss = regs->ax & 0XFFFFFFFF; + guest_xss |= ((regs->dx & 0XFFFFFFFF) << 32); + if ((guest_xss & ~(MSR_IA32_XSS_PT | MSR_IA32_XSS_HDC)) != 0UL) { + /* Assuming other features are not supported */ + VM_PANIC(vcpu); + } else { + /* TODO: only enable the xss pt and hdx, but currently just ignore them */ + } + goto done; + } + case MSR_IA32_MTRR_CAP: + case MSR_IA32_MTRR_DEF_TYPE: + case MSR_IA32_MTRR_PHYSBASE_0: + case MSR_IA32_MTRR_PHYSMASK_0: + case MSR_IA32_MTRR_PHYSBASE_1: + case MSR_IA32_MTRR_PHYSMASK_1: + case MSR_IA32_MTRR_PHYSBASE_2: + case MSR_IA32_MTRR_PHYSMASK_2: + case MSR_IA32_MTRR_PHYSBASE_3: + case MSR_IA32_MTRR_PHYSMASK_3: + case MSR_IA32_MTRR_PHYSBASE_4: + case MSR_IA32_MTRR_PHYSMASK_4: + case MSR_IA32_MTRR_PHYSBASE_5: + case MSR_IA32_MTRR_PHYSMASK_5: + case MSR_IA32_MTRR_PHYSBASE_6: + case MSR_IA32_MTRR_PHYSMASK_6: + case MSR_IA32_MTRR_PHYSBASE_7: + case MSR_IA32_MTRR_PHYSMASK_7: + case MSR_IA32_MTRR_PHYSBASE_8: + case MSR_IA32_MTRR_PHYSMASK_8: + case MSR_IA32_MTRR_PHYSBASE_9: + case MSR_IA32_MTRR_PHYSMASK_9: + case MSR_IA32_MTRR_FIX64K_00000: + case MSR_IA32_MTRR_FIX16K_80000: + case MSR_IA32_MTRR_FIX16K_A0000: + case MSR_IA32_MTRR_FIX4K_C0000: + case MSR_IA32_MTRR_FIX4K_C8000: + case MSR_IA32_MTRR_FIX4K_D0000: + case MSR_IA32_MTRR_FIX4K_D8000: + case MSR_IA32_MTRR_FIX4K_E0000: + case MSR_IA32_MTRR_FIX4K_E8000: + case MSR_IA32_MTRR_FIX4K_F0000: + case MSR_IA32_MTRR_FIX4K_F8000: + case MSR_IA32_PAT: + { + /* MTRRs can be ingored in Linux and Linux knows it is a virtual environment */ + goto done; + } + case MSR_IA32_TSC_DEADLINE: { + u64_t tsc_future, curr_tsc; + rdtscll(curr_tsc); + tsc_future = regs->ax & 0xffffffff; + tsc_future |= ((regs->dx & 0xffffffff) << 32); + vcpu->next_timer = tsc_future; + + goto done; + } + case MSR_MISC_FEATURE_ENABLES: + { + /* Write to this MSR will be all 0 since we ignored this, doesn't matter */ + goto done; + } + case MSR_IA32_SYSENTER_CS: + case MSR_IA32_SYSENTER_ESP: + case MSR_IA32_SYSENTER_EIP: + { + /* 64-bit system doesn't require these MSRs, its fine to ignore them */ + goto done; + } + case MSR_IA32_SPEC_CTRL: + { + /* This MSR has a value of 0 after reset, thus just keep it ad default, don't modify */ + goto done; + } + case MSR_IA32_APIC_BASE: + { + VM_PANIC(vcpu); + goto done; + } + default: + VM_PANIC(vcpu);; + } + +done: + GOTO_NEXT_INST(regs); + return; +} diff --git a/src/components/implementation/simple_vmm/multi_vmm/vpic.h b/src/components/implementation/simple_vmm/multi_vmm/vpic.h new file mode 100644 index 0000000000..b9cab609cb --- /dev/null +++ b/src/components/implementation/simple_vmm/multi_vmm/vpic.h @@ -0,0 +1,191 @@ +/*- + * Copyright (c) 2014 Tycho Nightingale + * Copyright (c) 2017-2022 Intel Corporation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef VPIC_H +#define VPIC_H + +#include +/** + * @file vpic.h + * + * @brief public APIs for virtual PIC + */ + + +#define ICU_IMR_OFFSET 1U + +/* Initialization control word 1. Written to even address. */ +#define ICW1_IC4 0x01U /* ICW4 present */ +#define ICW1_SNGL 0x02U /* 1 = single, 0 = cascaded */ +#define ICW1_ADI 0x04U /* 1 = 4, 0 = 8 byte vectors */ +#define ICW1_LTIM 0x08U /* 1 = level trigger, 0 = edge */ +#define ICW1_RESET 0x10U /* must be 1 */ +/* 0x20 - 0x80 - in 8080/8085 mode only */ + +/* Initialization control word 2. Written to the odd address. */ +/* No definitions, it is the base vector of the IDT for 8086 mode */ + +/* Initialization control word 3. Written to the odd address. */ +/* For a primary PIC, bitfield indicating a secondary PIC on given input */ +/* For a secondary PIC, lower 3 bits are the PIC's ID binary id on primary PIC */ + +/* Initialization control word 4. Written to the odd address. */ +#define ICW4_8086 0x01U /* 1 = 8086, 0 = 8080 */ +#define ICW4_AEOI 0x02U /* 1 = Auto EOI */ +#define ICW4_MS 0x04U /* 1 = buffered primary PIC, 0 = secondary PIC*/ +#define ICW4_BUF 0x08U /* 1 = enable buffer mode */ +#define ICW4_SFNM 0x10U /* 1 = special fully nested mode */ + +/* Operation control words. Written after initialization. */ + +/* Operation control word type 1 */ +/* + * No definitions. Written to the odd address. Bitmask for interrupts. + * 1 = disabled. + */ + +/* Operation control word type 2. Bit 3 (0x08) must be zero. Even address. */ +#define OCW2_L0 0x01U /* Level */ +#define OCW2_L1 0x02U +#define OCW2_L2 0x04U +/* 0x08 must be 0 to select OCW2 vs OCW3 */ +/* 0x10 must be 0 to select OCW2 vs ICW1 */ +#define OCW2_EOI 0x20U /* 1 = EOI */ +#define OCW2_SL 0x40U /* EOI mode */ +#define OCW2_R 0x80U /* EOI mode */ + +/* Operation control word type 3. Bit 3 (0x08) must be set. Even address. */ +#define OCW3_RIS 0x01U /* 1 = read IS, 0 = read IR */ +#define OCW3_RR 0x02U /* register read */ +#define OCW3_P 0x04U /* poll mode command */ +/* 0x08 must be 1 to select OCW3 vs OCW2 */ +#define OCW3_SEL 0x08U /* must be 1 */ +/* 0x10 must be 0 to select OCW3 vs ICW1 */ +#define OCW3_SMM 0x20U /* special mode mask */ +#define OCW3_ESMM 0x40U /* enable SMM */ + +#define IO_ELCR1 0x4d0U +#define IO_ELCR2 0x4d1U + +#define NR_VPIC_PINS_PER_CHIP 8U +#define NR_VPIC_PINS_TOTAL 16U + +enum vpic_wire_mode { + VPIC_WIRE_INTR = 0, + VPIC_WIRE_LAPIC, + VPIC_WIRE_IOAPIC, + VPIC_WIRE_NULL +}; + +enum vpic_trigger { + EDGE_TRIGGER, + LEVEL_TRIGGER +}; + +struct i8259_reg_state { + bool ready; + uint8_t icw_num; + uint8_t rd_cmd_reg; + + bool aeoi; + bool poll; + bool rotate; + bool sfn; /* special fully-nested mode */ + + uint32_t irq_base; + uint8_t request; /* Interrupt Request Register (IIR) */ + uint8_t service; /* Interrupt Service (ISR) */ + uint8_t mask; /* Interrupt Mask Register (IMR) */ + uint8_t smm; /* special mask mode */ + + uint8_t pin_state[8]; /* pin state for level */ + uint32_t lowprio; /* lowest priority irq */ + + bool intr_raised; + uint8_t elc; +}; + +struct acrn_vpic { + // spinlock_t lock; + struct i8259_reg_state i8259[2]; +}; + +struct acrn_vm; +void vpic_init(struct acrn_vm *vm); + +/** + * @brief virtual PIC + * + * @addtogroup acrn_vpic ACRN vPIC + * @{ + */ + +/** + * @brief Set vPIC IRQ line status. + * + * @param[in] vpic Pointer to target VM's vpic table + * @param[in] vgsi GSI for the virtual interrupt + * @param[in] operation action options:GSI_SET_HIGH/GSI_SET_LOW/ + * GSI_RAISING_PULSE/GSI_FALLING_PULSE + * + * @return None + */ +void vpic_set_irqline(struct acrn_vpic *vpic, uint32_t vgsi, uint32_t operation); + +/** + * @brief Get pending virtual interrupts for vPIC. + * + * @param[in] vpic Pointer to target VM's vpic table + * @param[inout] vecptr Pointer to vector buffer and will be filled + * with eligible vector if any. + * + * @return None + */ +void vpic_pending_intr(struct acrn_vpic *vpic, uint32_t *vecptr); + +/** + * @brief Accept virtual interrupt for vPIC. + * + * @param[in] vpic Pointer to target VM's vpic table + * @param[in] vector Target virtual interrupt vector + * + * @return None + * + * @pre vm != NULL + */ +void vpic_intr_accepted(struct acrn_vpic *vpic, uint32_t vector); +void vpic_get_irqline_trigger_mode(const struct acrn_vpic *vpic, uint32_t vgsi, enum vpic_trigger *trigger); +uint32_t vpic_pincount(void); +struct acrn_vpic *vm_pic(const struct acrn_vm *vm); + +/** + * @} + */ +/* End of acrn_vpic */ + +#endif /* VPIC_H */ From e3cec5a102fb7bdcfa0bb65d5be8a939e0cf7fc5 Mon Sep 17 00:00:00 2001 From: betahxy Date: Tue, 26 Mar 2024 00:29:01 -0400 Subject: [PATCH 10/60] Integration Testing --- composition_scripts/vmm_ndpi_nf.toml | 48 + .../sched/pfprr_quantum_static/init.c | 4 +- .../implementation/simple_nf/ndpi/Makefile | 19 + .../simple_nf/ndpi/MurmurHash3.h | 10 + .../simple_nf/ndpi/activision.c | 112 + .../implementation/simple_nf/ndpi/afp.c | 100 + .../simple_nf/ndpi/ahocorasick.c | 1285 + .../simple_nf/ndpi/ahocorasick.h | 284 + .../implementation/simple_nf/ndpi/ajp.c | 132 + .../implementation/simple_nf/ndpi/alicloud.c | 82 + .../simple_nf/ndpi/amazon_video.c | 78 + .../implementation/simple_nf/ndpi/among_us.c | 57 + .../implementation/simple_nf/ndpi/amqp.c | 85 + .../simple_nf/ndpi/apple_push.c | 108 + .../simple_nf/ndpi/armagetron.c | 109 + .../implementation/simple_nf/ndpi/avast.c | 66 + .../simple_nf/ndpi/avast_securedns.c | 67 + .../implementation/simple_nf/ndpi/bgp.c | 67 + .../simple_nf/ndpi/bittorrent.c | 576 + .../implementation/simple_nf/ndpi/bjnp.c | 57 + .../implementation/simple_nf/ndpi/bpf.h | 934 + .../implementation/simple_nf/ndpi/btlib.c | 472 + .../implementation/simple_nf/ndpi/btlib.h | 181 + .../implementation/simple_nf/ndpi/capwap.c | 144 + .../implementation/simple_nf/ndpi/cassandra.c | 152 + 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152 + .../implementation/simple_nf/ndpi/drda.c | 102 + .../implementation/simple_nf/ndpi/dropbox.c | 93 + .../implementation/simple_nf/ndpi/eaq.c | 92 + .../implementation/simple_nf/ndpi/edonkey.c | 222 + .../simple_nf/ndpi/elastic_search.c | 85 + .../simple_nf/ndpi/ethernet_ip.c | 71 + .../implementation/simple_nf/ndpi/fastcgi.c | 257 + .../implementation/simple_nf/ndpi/fix.c | 74 + .../simple_nf/ndpi/ftp_control.c | 693 + .../implementation/simple_nf/ndpi/ftp_data.c | 268 + .../simple_nf/ndpi/gcrypt/aes.c | 508 + .../simple_nf/ndpi/gcrypt/aes.h | 271 + .../simple_nf/ndpi/gcrypt/aesni.c | 523 + .../simple_nf/ndpi/gcrypt/aesni.h | 130 + .../simple_nf/ndpi/gcrypt/cipher.c | 591 + .../simple_nf/ndpi/gcrypt/cipher.h | 934 + .../simple_nf/ndpi/gcrypt/cipher_wrap.c | 234 + .../simple_nf/ndpi/gcrypt/cipher_wrap.h | 92 + .../simple_nf/ndpi/gcrypt/common.h | 368 + .../simple_nf/ndpi/gcrypt/digest.c | 321 + .../simple_nf/ndpi/gcrypt/digest.h | 26 + .../simple_nf/ndpi/gcrypt/error.h | 201 + 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.../inc_generated/ndpi_amazon_aws_match.c | 7056 +++ .../ndpi/inc_generated/ndpi_asn_alibaba.c | 72 + .../ndpi/inc_generated/ndpi_asn_apple.c | 37 + .../ndpi/inc_generated/ndpi_asn_avast.c | 63 + .../ndpi/inc_generated/ndpi_asn_bloomberg.c | 70 + .../ndpi/inc_generated/ndpi_asn_citrix.c | 90 + .../ndpi/inc_generated/ndpi_asn_discord.c | 94 + .../ndpi/inc_generated/ndpi_asn_dropbox.c | 34 + .../ndpi/inc_generated/ndpi_asn_edgecast.c | 200 + .../ndpi/inc_generated/ndpi_asn_facebook.c | 78 + .../ndpi/inc_generated/ndpi_asn_github.c | 30 + .../ndpi/inc_generated/ndpi_asn_goto.c | 90 + .../inc_generated/ndpi_asn_hotspotshield.c | 27 + .../ndpi/inc_generated/ndpi_asn_line.c | 40 + .../ndpi/inc_generated/ndpi_asn_netflix.c | 41 + .../ndpi/inc_generated/ndpi_asn_opendns.c | 147 + .../ndpi/inc_generated/ndpi_asn_riotgames.c | 43 + .../ndpi/inc_generated/ndpi_asn_starcraft.c | 61 + .../ndpi/inc_generated/ndpi_asn_steam.c | 48 + .../ndpi/inc_generated/ndpi_asn_teamviewer.c | 34 + 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.../implementation/simple_nf/ndpi/syslog.c | 116 + .../implementation/simple_nf/ndpi/tailscale.c | 59 + .../implementation/simple_nf/ndpi/tcp_udp.c | 77 + .../implementation/simple_nf/ndpi/teamspeak.c | 110 + .../simple_nf/ndpi/teamviewer.c | 117 + .../implementation/simple_nf/ndpi/telegram.c | 117 + .../implementation/simple_nf/ndpi/telnet.c | 228 + .../implementation/simple_nf/ndpi/teredo.c | 58 + .../implementation/simple_nf/ndpi/tftp.c | 170 + .../implementation/simple_nf/ndpi/threema.c | 102 + .../implementation/simple_nf/ndpi/tinc.c | 154 + .../simple_nf/ndpi/tivoconnect.c | 147 + .../implementation/simple_nf/ndpi/tls.c | 2669 + .../implementation/simple_nf/ndpi/tocaboca.c | 90 + .../simple_nf/ndpi/tplink_shp.c | 95 + .../implementation/simple_nf/ndpi/tuya_lp.c | 94 + .../implementation/simple_nf/ndpi/tvuplayer.c | 160 + .../implementation/simple_nf/ndpi/ubntac2.c | 94 + .../implementation/simple_nf/ndpi/ultrasurf.c | 72 + .../implementation/simple_nf/ndpi/usenet.c | 108 + .../implementation/simple_nf/ndpi/uthash.h | 1138 + .../implementation/simple_nf/ndpi/vhua.c | 74 + .../implementation/simple_nf/ndpi/viber.c | 100 + .../implementation/simple_nf/ndpi/vmware.c | 56 + .../implementation/simple_nf/ndpi/vnc.c | 73 + .../implementation/simple_nf/ndpi/vxlan.c | 79 + .../implementation/simple_nf/ndpi/warcraft3.c | 106 + .../implementation/simple_nf/ndpi/websocket.c | 120 + .../implementation/simple_nf/ndpi/whatsapp.c | 134 + .../implementation/simple_nf/ndpi/whoisdas.c | 65 + .../implementation/simple_nf/ndpi/wireguard.c | 176 + .../simple_nf/ndpi/world_of_kung_fu.c | 65 + .../simple_nf/ndpi/world_of_warcraft.c | 209 + .../implementation/simple_nf/ndpi/wsd.c | 64 + .../implementation/simple_nf/ndpi/xbox.c | 115 + .../implementation/simple_nf/ndpi/xdmcp.c | 77 + .../implementation/simple_nf/ndpi/xiaomi.c | 121 + .../implementation/simple_nf/ndpi/z3950.c | 132 + .../implementation/simple_nf/ndpi/zabbix.c | 63 + .../implementation/simple_nf/ndpi/zattoo.c | 231 + .../implementation/simple_nf/ndpi/zeromq.c | 104 + src/components/lib/posix_cap/posix_cap.c | 3 +- 291 files changed, 147737 insertions(+), 3 deletions(-) create mode 100644 composition_scripts/vmm_ndpi_nf.toml create mode 100644 src/components/implementation/simple_nf/ndpi/Makefile create mode 100644 src/components/implementation/simple_nf/ndpi/MurmurHash3.h create mode 100644 src/components/implementation/simple_nf/ndpi/activision.c create mode 100644 src/components/implementation/simple_nf/ndpi/afp.c create mode 100644 src/components/implementation/simple_nf/ndpi/ahocorasick.c create mode 100644 src/components/implementation/simple_nf/ndpi/ahocorasick.h create mode 100644 src/components/implementation/simple_nf/ndpi/ajp.c create mode 100644 src/components/implementation/simple_nf/ndpi/alicloud.c create mode 100644 src/components/implementation/simple_nf/ndpi/amazon_video.c create mode 100644 src/components/implementation/simple_nf/ndpi/among_us.c create mode 100644 src/components/implementation/simple_nf/ndpi/amqp.c create mode 100644 src/components/implementation/simple_nf/ndpi/apple_push.c create mode 100644 src/components/implementation/simple_nf/ndpi/armagetron.c create mode 100644 src/components/implementation/simple_nf/ndpi/avast.c create mode 100644 src/components/implementation/simple_nf/ndpi/avast_securedns.c create mode 100644 src/components/implementation/simple_nf/ndpi/bgp.c create mode 100644 src/components/implementation/simple_nf/ndpi/bittorrent.c create mode 100644 src/components/implementation/simple_nf/ndpi/bjnp.c create mode 100644 src/components/implementation/simple_nf/ndpi/bpf.h create mode 100644 src/components/implementation/simple_nf/ndpi/btlib.c create mode 100644 src/components/implementation/simple_nf/ndpi/btlib.h create mode 100644 src/components/implementation/simple_nf/ndpi/capwap.c create mode 100644 src/components/implementation/simple_nf/ndpi/cassandra.c create mode 100644 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create mode 100644 src/components/implementation/simple_nf/ndpi/diameter.c create mode 100644 src/components/implementation/simple_nf/ndpi/discord.c create mode 100644 src/components/implementation/simple_nf/ndpi/dnp3.c create mode 100644 src/components/implementation/simple_nf/ndpi/dns.c create mode 100644 src/components/implementation/simple_nf/ndpi/dnscrypt.c create mode 100644 src/components/implementation/simple_nf/ndpi/dofus.c create mode 100644 src/components/implementation/simple_nf/ndpi/drda.c create mode 100644 src/components/implementation/simple_nf/ndpi/dropbox.c create mode 100644 src/components/implementation/simple_nf/ndpi/eaq.c create mode 100644 src/components/implementation/simple_nf/ndpi/edonkey.c create mode 100644 src/components/implementation/simple_nf/ndpi/elastic_search.c create mode 100644 src/components/implementation/simple_nf/ndpi/ethernet_ip.c create mode 100644 src/components/implementation/simple_nf/ndpi/fastcgi.c create mode 100644 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src/components/implementation/simple_nf/ndpi/ookla.c create mode 100644 src/components/implementation/simple_nf/ndpi/openvpn.c create mode 100644 src/components/implementation/simple_nf/ndpi/oracle.c create mode 100644 src/components/implementation/simple_nf/ndpi/postgres.c create mode 100644 src/components/implementation/simple_nf/ndpi/ppstream.c create mode 100644 src/components/implementation/simple_nf/ndpi/pptp.c create mode 100644 src/components/implementation/simple_nf/ndpi/qq.c create mode 100644 src/components/implementation/simple_nf/ndpi/quic.c create mode 100644 src/components/implementation/simple_nf/ndpi/radius.c create mode 100644 src/components/implementation/simple_nf/ndpi/raknet.c create mode 100644 src/components/implementation/simple_nf/ndpi/rce_injection.h create mode 100644 src/components/implementation/simple_nf/ndpi/rdp.c create mode 100644 src/components/implementation/simple_nf/ndpi/redis_net.c create mode 100644 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src/components/implementation/simple_nf/ndpi/starcraft.c create mode 100644 src/components/implementation/simple_nf/ndpi/steam.c create mode 100644 src/components/implementation/simple_nf/ndpi/stun.c create mode 100644 src/components/implementation/simple_nf/ndpi/syncthing.c create mode 100644 src/components/implementation/simple_nf/ndpi/syslog.c create mode 100644 src/components/implementation/simple_nf/ndpi/tailscale.c create mode 100644 src/components/implementation/simple_nf/ndpi/tcp_udp.c create mode 100644 src/components/implementation/simple_nf/ndpi/teamspeak.c create mode 100644 src/components/implementation/simple_nf/ndpi/teamviewer.c create mode 100644 src/components/implementation/simple_nf/ndpi/telegram.c create mode 100644 src/components/implementation/simple_nf/ndpi/telnet.c create mode 100644 src/components/implementation/simple_nf/ndpi/teredo.c create mode 100644 src/components/implementation/simple_nf/ndpi/tftp.c create mode 100644 src/components/implementation/simple_nf/ndpi/threema.c create mode 100644 src/components/implementation/simple_nf/ndpi/tinc.c create mode 100644 src/components/implementation/simple_nf/ndpi/tivoconnect.c create mode 100644 src/components/implementation/simple_nf/ndpi/tls.c create mode 100644 src/components/implementation/simple_nf/ndpi/tocaboca.c create mode 100644 src/components/implementation/simple_nf/ndpi/tplink_shp.c create mode 100644 src/components/implementation/simple_nf/ndpi/tuya_lp.c create mode 100644 src/components/implementation/simple_nf/ndpi/tvuplayer.c create mode 100644 src/components/implementation/simple_nf/ndpi/ubntac2.c create mode 100644 src/components/implementation/simple_nf/ndpi/ultrasurf.c create mode 100644 src/components/implementation/simple_nf/ndpi/usenet.c create mode 100644 src/components/implementation/simple_nf/ndpi/uthash.h create mode 100644 src/components/implementation/simple_nf/ndpi/vhua.c create mode 100644 src/components/implementation/simple_nf/ndpi/viber.c create mode 100644 src/components/implementation/simple_nf/ndpi/vmware.c create mode 100644 src/components/implementation/simple_nf/ndpi/vnc.c create mode 100644 src/components/implementation/simple_nf/ndpi/vxlan.c create mode 100644 src/components/implementation/simple_nf/ndpi/warcraft3.c create mode 100644 src/components/implementation/simple_nf/ndpi/websocket.c create mode 100644 src/components/implementation/simple_nf/ndpi/whatsapp.c create mode 100644 src/components/implementation/simple_nf/ndpi/whoisdas.c create mode 100644 src/components/implementation/simple_nf/ndpi/wireguard.c create mode 100644 src/components/implementation/simple_nf/ndpi/world_of_kung_fu.c create mode 100644 src/components/implementation/simple_nf/ndpi/world_of_warcraft.c create mode 100644 src/components/implementation/simple_nf/ndpi/wsd.c create mode 100644 src/components/implementation/simple_nf/ndpi/xbox.c create mode 100644 src/components/implementation/simple_nf/ndpi/xdmcp.c create mode 100644 src/components/implementation/simple_nf/ndpi/xiaomi.c create mode 100644 src/components/implementation/simple_nf/ndpi/z3950.c create mode 100644 src/components/implementation/simple_nf/ndpi/zabbix.c create mode 100644 src/components/implementation/simple_nf/ndpi/zattoo.c create mode 100644 src/components/implementation/simple_nf/ndpi/zeromq.c diff --git a/composition_scripts/vmm_ndpi_nf.toml b/composition_scripts/vmm_ndpi_nf.toml new file mode 100644 index 0000000000..3439f1065b --- /dev/null +++ b/composition_scripts/vmm_ndpi_nf.toml @@ -0,0 +1,48 @@ +[system] +description = "Simple VMM" + +[[components]] +name = "booter" +img = "no_interface.llbooter" +implements = [{interface = "init"}, {interface = "addr"}] +deps = [{srv = "kernel", interface = "init", variant = "kernel"}] +constructor = "kernel" + +[[components]] +name = "capmgr" +img = "capmgr.simple" +deps = [{srv = "booter", interface = "init"}, {srv = "booter", interface = "addr"}] +implements = [{interface = "capmgr"}, {interface = "init"}, {interface = "memmgr"}, {interface = "capmgr_create"}, {interface = "contigmem"}] +constructor = "booter" +baseaddr = "0x1000000" + +[[components]] +name = "sched" +img = "sched.pfprr_quantum_static" +deps = [{srv = "capmgr", interface = "init"}, {srv = "capmgr", interface = "capmgr"}, {srv = "capmgr", interface = "memmgr"}] +implements = [{interface = "sched"}, {interface = "syncipc"}, {interface = "init"}] +constructor = "booter" +baseaddr = "0x1600000" + +[[components]] +name = "nicmgr" +img = "nicmgr.dpdk" +deps = [{srv = "sched", interface = "sched"}, {srv = "sched", interface = "init"}, {srv = "capmgr", interface = "capmgr_create"}, {srv = "capmgr", interface = "memmgr"}, {srv = "capmgr", interface = "contigmem"}] +implements = [{interface = "nic"}] +constructor = "booter" +baseaddr = "0x6000000" + +[[components]] +name = "vmm" +img = "simple_vmm.noop_nf" +deps = [{srv = "sched", interface = "sched"}, {srv = "sched", interface = "init"},{srv = "capmgr", interface = "capmgr"}, {srv = "capmgr", interface = "memmgr"}, {srv = "capmgr", interface = "contigmem"}, {srv = "nicmgr", interface = "nic"}] +implements = [{interface = "netio"}] +constructor = "booter" +baseaddr = "0x2000000" + +[[components]] +name = "nf_ndpi" +img = "simple_nf.ndpi" +deps = [{srv = "sched", interface = "sched"}, {srv = "sched", interface = "init"},{srv = "capmgr", interface = "capmgr_create"}, {srv = "capmgr", interface = "memmgr"}, {srv = "capmgr", interface = "contigmem"}, {srv = "nicmgr", interface = "nic"}, {srv = "vmm", interface = "netio"}] +constructor = "booter" +baseaddr = "0x9000000" diff --git a/src/components/implementation/sched/pfprr_quantum_static/init.c b/src/components/implementation/sched/pfprr_quantum_static/init.c index 21b9bd9c36..9c1988de3b 100644 --- a/src/components/implementation/sched/pfprr_quantum_static/init.c +++ b/src/components/implementation/sched/pfprr_quantum_static/init.c @@ -245,7 +245,7 @@ slm_comp_init_loop(void) n = &initialization_state[client]; init_schedule_current++; - if (cos_coreid() == 0) printc("\tScheduler %ld: initializing component %ld with thread %ld.\n", cos_compid(), client, t->tid); + // if (cos_coreid() == 0) printc("\tScheduler %ld: initializing component %ld with thread %ld.\n", cos_compid(), client, t->tid); /* * This waits till init_done effective runs before * moving on. We need to be highest-priority, so that @@ -260,7 +260,7 @@ slm_comp_init_loop(void) while (ps_load(&n->initialization_thds[cos_coreid()]) == NULL) ; } - if (cos_coreid() == 0) printc("Scheduler %ld, initialization completed.\n", cos_compid()); + // if (cos_coreid() == 0) printc("Scheduler %ld, initialization completed.\n", cos_compid()); /* * We want to *atomically* awaken all of the threads that will diff --git a/src/components/implementation/simple_nf/ndpi/Makefile b/src/components/implementation/simple_nf/ndpi/Makefile new file mode 100644 index 0000000000..0363b16d1b --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/Makefile @@ -0,0 +1,19 @@ +# Required variables used to drive the compilation process. It is OK +# for many of these to be empty. +# +# The set of interfaces that this component exports for use by other +# components. This is a list of the interface names. +INTERFACE_EXPORTS = +# The interfaces this component is dependent on for compilation (this +# is a list of directory names in interface/) +INTERFACE_DEPENDENCIES = memmgr contigmem netshmem sched nic netio +# The library dependencies this component is reliant on for +# compilation/linking (this is a list of directory names in lib/) +LIBRARY_DEPENDENCIES = component shm_bm netdefs posix_cap +# Note: Both the interface and library dependencies should be +# *minimal*. That is to say that removing a dependency should cause +# the build to fail. The build system does not validate this +# minimality; that's on you! + +COMP_FLAGS= -DNDPI_LIB_COMPILATION +include Makefile.subsubdir diff --git a/src/components/implementation/simple_nf/ndpi/MurmurHash3.h b/src/components/implementation/simple_nf/ndpi/MurmurHash3.h new file mode 100644 index 0000000000..b5ffa6400c --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/MurmurHash3.h @@ -0,0 +1,10 @@ +#ifndef _MURMURHASH3_H_ +#define _MURMURHASH3_H_ + +#include +#include +#include + +uint32_t MurmurHash3_x86_32(const void * key, uint32_t len, uint32_t seed); + +#endif diff --git a/src/components/implementation/simple_nf/ndpi/activision.c b/src/components/implementation/simple_nf/ndpi/activision.c new file mode 100644 index 0000000000..22acd4694c --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/activision.c @@ -0,0 +1,112 @@ +/* + * activision.c + * + * Copyright (C) 2022-23 - ntop.org + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_ACTIVISION + +#include "ndpi_api.h" + +static void ndpi_int_activision_add_connection(struct ndpi_detection_module_struct * const ndpi_struct, + struct ndpi_flow_struct * const flow) +{ + NDPI_LOG_INFO(ndpi_struct, "found activision\n"); + ndpi_set_detected_protocol(ndpi_struct, flow, + NDPI_PROTOCOL_ACTIVISION, + NDPI_PROTOCOL_UNKNOWN, + NDPI_CONFIDENCE_DPI); +} + +static void ndpi_search_activision(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) +{ + struct ndpi_packet_struct const * const packet = &ndpi_struct->packet; + + NDPI_LOG_DBG(ndpi_struct, "search activision\n"); + + if (packet->payload_packet_len < 18) + { + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + return; + } + + if (flow->packet_direction_counter[packet->packet_direction] == 1) + { + if (packet->packet_direction == 0) + { + if (ntohs(get_u_int16_t(packet->payload, 0)) != 0x0c02) + { + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + return; + } + } else { + if (ntohs(get_u_int16_t(packet->payload, 0)) != 0x0d02) + { + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + return; + } + } + + if (packet->payload_packet_len < 29) + { + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + return; + } + + if (ntohs(get_u_int16_t(packet->payload, 17)) == 0xc0a8 && + ntohl(get_u_int32_t(packet->payload, 19)) == 0x0015020c) + { + ndpi_int_activision_add_connection(ndpi_struct, flow); + return; + } + } else if (packet->packet_direction == 0) { + if (packet->payload[0] != 0x29) + { + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + return; + } + } else if (packet->packet_direction == 1) { + if (packet->payload[0] != 0x28) + { + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + return; + } + } + + if (flow->packet_counter > 4) + { + ndpi_int_activision_add_connection(ndpi_struct, flow); + } +} + +void init_activision_dissector(struct ndpi_detection_module_struct *ndpi_struct, + u_int32_t *id) +{ + ndpi_set_bitmask_protocol_detection("Activision", ndpi_struct, *id, + NDPI_PROTOCOL_ACTIVISION, + ndpi_search_activision, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_UDP_WITH_PAYLOAD, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK + ); + + *id += 1; +} diff --git a/src/components/implementation/simple_nf/ndpi/afp.c b/src/components/implementation/simple_nf/ndpi/afp.c new file mode 100644 index 0000000000..b55c4d4c70 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/afp.c @@ -0,0 +1,100 @@ +/* + * afp.c + * + * Copyright (C) 2009-11 by ipoque GmbH + * Copyright (C) 2011-22 - ntop.org + * + * This file is part of nDPI, an open source deep packet inspection + * library based on the OpenDPI and PACE technology by ipoque GmbH + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + * + */ + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_AFP + +#include "ndpi_api.h" + +struct afpHeader { + u_int8_t flags, command; + u_int16_t requestId; + u_int32_t dataOffset, length, reserved; +}; + +static void ndpi_int_afp_add_connection(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) +{ + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_AFP, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); +} + + +static void ndpi_search_afp(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) +{ + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + + NDPI_LOG_DBG(ndpi_struct, "search AFP\n"); + + if (packet->payload_packet_len >= sizeof(struct afpHeader)) { + struct afpHeader *h = (struct afpHeader*)packet->payload; + + if(packet->payload_packet_len > 128) { + /* + When we transfer a large data chunk, unless we have observed + the initial connection, we need to discard these packets + as they are not an indication that this flow is not AFP + */ + return; + } + + /* + * this will detect the OpenSession command of the Data Stream Interface (DSI) protocol + * which is exclusively used by the Apple Filing Protocol (AFP) on TCP/IP networks + */ + if (packet->payload_packet_len >= 22 && get_u_int16_t(packet->payload, 0) == htons(0x0004) && + get_u_int16_t(packet->payload, 2) == htons(0x0001) && get_u_int32_t(packet->payload, 4) == 0 && + get_u_int32_t(packet->payload, 8) == htonl(packet->payload_packet_len - 16) && + get_u_int32_t(packet->payload, 12) == 0 && get_u_int16_t(packet->payload, 16) == htons(0x0104)) { + + NDPI_LOG_INFO(ndpi_struct, "found AFP: DSI OpenSession\n"); + ndpi_int_afp_add_connection(ndpi_struct, flow); + return; + } + + if((h->flags <= 1) + && ((h->command >= 1) && (h->command <= 8)) + && (h->reserved == 0) + && (packet->payload_packet_len >= (sizeof(struct afpHeader)+ntohl(h->length)))) { + NDPI_LOG_INFO(ndpi_struct, "found AFP: DSI\n"); + ndpi_int_afp_add_connection(ndpi_struct, flow); + return; + } + } + + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); +} + + +void init_afp_dissector(struct ndpi_detection_module_struct *ndpi_struct, u_int32_t *id) +{ + ndpi_set_bitmask_protocol_detection("AFP", ndpi_struct, *id, + NDPI_PROTOCOL_AFP, + ndpi_search_afp, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_TCP_WITH_PAYLOAD_WITHOUT_RETRANSMISSION, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK); + *id += 1; +} + diff --git a/src/components/implementation/simple_nf/ndpi/ahocorasick.c b/src/components/implementation/simple_nf/ndpi/ahocorasick.c new file mode 100644 index 0000000000..cade82bab4 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/ahocorasick.c @@ -0,0 +1,1285 @@ +/* + * ahocorasick.c: implementation of ahocorasick library's functions + * This file is part of multifast. + * + Copyright 2010-2012 Kamiar Kanani + Copyright 2012-21 ntop.org (Incremental improvements) + + multifast is free software: you can redistribute it and/or modify + it under the terms of the GNU Lesser General Public License as published by + the Free Software Foundation, either version 3 of the License, or + (at your option) any later version. + + multifast is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public License + along with multifast. If not, see . +*/ + +#ifndef __KERNEL__ +#include +#include +#include +#include +#if !defined(WIN32) && !defined(_MSC_VER) +#include +#else +#define __SIZEOF_LONG__ 4 +#endif +#include +#include +#else +#include +#include +#include +typedef __kernel_size_t size_t; +#include +#include +#endif + +#include "ndpi_api.h" +#include "ahocorasick.h" + +/* TODO: For different depth of node, number of outgoing edges differs + considerably, It is efficient to use different chunk size for + different depths */ + +/* Private function prototype */ +static int node_edge_compare (struct edge * e, int a, int b); +static int node_has_matchstr (AC_NODE_t * thiz, AC_PATTERN_t * newstr); + +static AC_NODE_t * node_create (void); +static AC_NODE_t * node_create_next (AC_NODE_t * thiz, AC_ALPHABET_t alpha); +static int node_register_matchstr (AC_NODE_t * thiz, AC_PATTERN_t * str, int is_existing); +static int node_register_outgoing (AC_NODE_t * thiz, AC_NODE_t * next, AC_ALPHABET_t alpha); +static AC_NODE_t * node_find_next (AC_NODE_t * thiz, AC_ALPHABET_t alpha); +static AC_NODE_t * node_findbs_next (AC_NODE_t * thiz, uint8_t alpha); +static AC_NODE_t * node_findbs_next_ac (AC_NODE_t * thiz, uint8_t alpha,int icase); +static void node_release (AC_NODE_t * thiz, int free_pattern); +static void node_release_pattern (AC_NODE_t * thiz); +static int node_range_edges (AC_AUTOMATA_t *thiz, AC_NODE_t * node); +static inline void node_sort_edges (AC_NODE_t * thiz); + +#ifndef __KERNEL__ +struct aho_dump_info { + size_t memcnt,node_oc,node_8c,node_xc,node_xr; + int buf_pos,ip; + char *bufstr; + size_t bufstr_len; + FILE *file; +}; + +static void dump_node_header(AC_NODE_t * n, struct aho_dump_info *); +static int ac_automata_global_debug = 0; +#endif + +/* Private function prototype */ +static int ac_automata_union_matchstrs (AC_NODE_t * node); +static void ac_automata_set_failure + (AC_AUTOMATA_t * thiz, AC_NODE_t * node, AC_NODE_t * next, int idx, void *); +static void ac_automata_traverse_setfailure + (AC_AUTOMATA_t * thiz); + +static inline AC_ALPHABET_t *edge_get_alpha(struct edge *e) { + return (AC_ALPHABET_t *)(&e->next[e->max]); +} +static inline size_t edge_data_size(int num) { + return sizeof(void *)*num + ((num + sizeof(void *) - 1) & ~(sizeof(void *)-1)); +} + +#ifdef __KERNEL__ +static inline void *acho_calloc(size_t nmemb, size_t size) { + return kcalloc(nmemb, size, GFP_ATOMIC); +} +static inline void *acho_malloc(size_t size) { + return kmalloc(size, GFP_ATOMIC); +} +static inline void acho_free(void *old) { + return kfree(old); +} +#else + +#define acho_calloc(a,b) ndpi_calloc(a,b) +#define acho_malloc(a) ndpi_malloc(a) +#define acho_free(a) ndpi_free(a) +#endif + +static void acho_sort(struct edge *e, size_t num, + int (*cmp_func)(struct edge *e, int a, int b), + void (*swap_func)(struct edge *e, int a, int b)); + +/* tolower() from glibc */ +static uint8_t aho_lc[256] = { + 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, + 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, + 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, + 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, + 64, 'a', 'b', 'c', 'd', 'e', 'f', 'g', 'h', 'i', 'j', 'k', 'l', 'm', 'n', 'o', +'p', 'q', 'r', 's', 't', 'u', 'v', 'w', 'x', 'y', 'z', 91, 92, 93, 94, 95, + 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, +112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, +128, 129, 130, 131, 132, 133, 134, 135, 136, 137, 138, 139, 140, 141, 142, 143, +144, 145, 146, 147, 148, 149, 150, 151, 152, 153, 154, 155, 156, 157, 158, 159, +160, 161, 162, 163, 164, 165, 166, 167, 168, 169, 170, 171, 172, 173, 174, 175, +176, 177, 178, 179, 180, 181, 182, 183, 184, 185, 186, 187, 188, 189, 190, 191, +192, 193, 194, 195, 196, 197, 198, 199, 200, 201, 202, 203, 204, 205, 206, 207, +208, 209, 210, 211, 212, 213, 214, 215, 216, 217, 218, 219, 220, 221, 222, 223, +224, 225, 226, 227, 228, 229, 230, 231, 232, 233, 234, 235, 236, 237, 238, 239, +240, 241, 242, 243, 244, 245, 246, 247, 248, 249, 250, 251, 252, 253, 254, 255 +}; + +/* toupper() from glibc */ +static uint8_t aho_xc[256] = { + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, + 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 0, 0, 0, 0, 0, + 0, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, + 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 +}; + +/****************************************************************************** + * FUNCTION: ac_automata_init + * Initialize automata; allocate memories and set initial values + * PARAMS: + * MATCH_CALLBACK mc: call-back function + * the call-back function will be used to reach the caller on match occurrence + ******************************************************************************/ +AC_AUTOMATA_t * ac_automata_init (MATCH_CALLBACK_f mc) +{ + AC_AUTOMATA_t * thiz; +// if(!mc) return NULL; + thiz = (AC_AUTOMATA_t *)acho_calloc(1,sizeof(AC_AUTOMATA_t)); + if(!thiz) return NULL; + thiz->root = node_create (); + if(!thiz->root) { + acho_free(thiz); + return NULL; + } + thiz->root->id = 1; + thiz->root->root = 1; + thiz->total_patterns = 0; + thiz->automata_open = 1; + thiz->match_handler = mc; + thiz->to_lc = 0; + thiz->no_root_range = 0; + thiz->add_to_range = REALLOC_CHUNK_OUTGOING*2; + return thiz; +} +/****************************************************************************** + * FUNCTION: ac_automata_casecmp + * Case-insensitive comparison mode + * PARAMS: + * AC_AUTOMATA_t * thiz: the pointer to the automata + * lc: 1 for case-insensitive comparison mode + * RETUERN VALUE: AC_ERROR_t + * the return value indicates the success or failure of changes + ******************************************************************************/ +AC_ERROR_t ac_automata_feature (AC_AUTOMATA_t * thiz, unsigned int feature) +{ + if(!thiz) return ACERR_ERROR; + if(thiz->all_nodes_num || thiz->total_patterns) return ACERR_ERROR; + thiz->to_lc = (feature & AC_FEATURE_LC) != 0; + thiz->no_root_range = (feature & AC_FEATURE_NO_ROOT_RANGE) != 0; + return ACERR_SUCCESS; +} + +AC_ERROR_t ac_automata_name (AC_AUTOMATA_t * thiz, char *name, int debug) +{ + if(!thiz) return ACERR_ERROR; + strncpy(thiz->name,name,sizeof(thiz->name)-1); + thiz->debug = debug != 0; + return ACERR_SUCCESS; +} + +#ifndef __KERNEL__ +void ac_automata_enable_debug (int debug) { + ac_automata_global_debug = debug != 0; +} +#endif + +/****************************************************************************** + * FUNCTION: ac_automata_add + * Adds pattern to the automata. + * PARAMS: + * AC_AUTOMATA_t * thiz: the pointer to the automata + * AC_PATTERN_t * patt: the pointer to added pattern + * RETUERN VALUE: AC_ERROR_t + * the return value indicates the success or failure of adding action + ******************************************************************************/ +AC_ERROR_t ac_automata_add (AC_AUTOMATA_t * thiz, AC_PATTERN_t * patt) +{ + unsigned int i; + AC_NODE_t * n; + AC_NODE_t * next; + AC_ALPHABET_t alpha; + + if(!thiz || !patt || !patt->astring) + return ACERR_ERROR; + + n = thiz->root; + + if(!thiz->automata_open) + return ACERR_AUTOMATA_CLOSED; + + if (!patt->length) + return ACERR_ZERO_PATTERN; + + if (patt->length > AC_PATTRN_MAX_LENGTH) + return ACERR_LONG_PATTERN; + + for (i=0; ilength; i++) { + alpha = patt->astring[i]; + if(thiz->to_lc) + alpha = (AC_ALPHABET_t)aho_lc[(uint8_t)alpha]; + + if((next = node_find_next(n, alpha)) != 0) { + n = next; + continue; + } + if(!(next = node_create_next(n, alpha))) + return ACERR_ERROR; + next->id = ++thiz->id; + thiz->all_nodes_num++; + n = next; + } + if(thiz->max_str_len < patt->length) + thiz->max_str_len = patt->length; + + if(n->final && n->matched_patterns) { + patt->rep.number = n->matched_patterns->patterns[0].rep.number; + return ACERR_DUPLICATE_PATTERN; + } + + if(node_register_matchstr(n, patt, 0)) + return ACERR_ERROR; + + thiz->total_patterns++; + + return ACERR_SUCCESS; +} + +AC_ERROR_t ac_automata_walk(AC_AUTOMATA_t * thiz, + NODE_CALLBACK_f node_cb, ALPHA_CALLBACK_f alpha_cb, void *data) +{ + unsigned int ip; + AC_NODE_t *next, *n; + struct ac_path * path = thiz->ac_path; + AC_ERROR_t r; + + ip = 1; + path[1].n = thiz->root; + path[1].idx = 0; + + while(ip) { + unsigned int i,last; + n = path[ip].n; + i = path[ip].idx; + last = !n->outgoing || (n->one && i > 0) || (!n->one && i >= n->outgoing->degree); + if(node_cb && (!i || last)) { + r = node_cb(thiz, n, i, data); + if(r != ACERR_SUCCESS) return r; + } + if(last) { + ip--; continue; + } + next = NULL; + if(n->one) { + next = (AC_NODE_t *)n->outgoing; + } else { + while(i < n->outgoing->degree) { + next = n->outgoing->next[i]; + if(next) break; + i++; + } + } + if(!next) { + if(!n->range || i >= n->outgoing->degree) { + r = node_cb ? node_cb(thiz, n, i, data):ACERR_SUCCESS; + if(r != ACERR_SUCCESS) return r; + } + ip--; continue; + } + + if(n->depth < AC_PATTRN_MAX_LENGTH) { + path[n->depth].l = n->one ? n->one_alpha: + edge_get_alpha(n->outgoing)[i]; + if(alpha_cb) + alpha_cb(thiz, n, next, i, data); + } + + path[ip].idx = i+1; + if(ip >= AC_PATTRN_MAX_LENGTH) + continue; + + ip++; + + path[ip].n = next; + path[ip].idx = 0; + + } + return ACERR_SUCCESS; +} + + +static AC_ERROR_t ac_finalize_node(AC_AUTOMATA_t * thiz,AC_NODE_t * n, int idx, void *data) { + if(!n->ff) { + n->id = ++(thiz->id); + n->ff = 1; + if(ac_automata_union_matchstrs (n)) + return ACERR_ERROR; + if(n->use) { + if(!n->one) { + if(node_range_edges (thiz,n)) { + node_sort_edges (n); + thiz->n_range++; + } else + thiz->n_find++; + } else + thiz->n_oc++; + } + } + if(!n->a_ptr && n->outgoing && !n->one) { + n->a_ptr = (unsigned char *)edge_get_alpha(n->outgoing); + } + return ACERR_SUCCESS; +} + + +/****************************************************************************** + * FUNCTION: ac_automata_finalize + * Locate the failure node for all nodes and collect all matched pattern for + * every node. it also sorts outgoing edges of node, so binary search could be + * performed on them. after calling this function the automate literally will + * be finalized and you can not add new patterns to the automate. + * PARAMS: + * AC_AUTOMATA_t * thiz: the pointer to the automata + ******************************************************************************/ + +AC_ERROR_t ac_automata_finalize (AC_AUTOMATA_t * thiz) { + + AC_ERROR_t r = ACERR_SUCCESS; + if(!thiz || !thiz->automata_open) return r; + + ac_automata_traverse_setfailure (thiz); + thiz->id=0; + thiz->n_oc = 0; + thiz->n_range = 0; + thiz->n_find = 0; + r = ac_automata_walk(thiz,ac_finalize_node,NULL,NULL); + if(r == ACERR_SUCCESS) + thiz->automata_open = 0; + return r; +} + +int ac_automata_exact_match(AC_PATTERNS_t *mp,int pos, AC_TEXT_t *txt) { + AC_PATTERN_t *patterns = mp->patterns; + AC_PATTERN_t **matched = txt->match.matched; + unsigned int i; + int match_map = 0; + for(i=0; i < mp->num && i < ((sizeof(int)*8)-1); i++,patterns++) { + do { + if(patterns->rep.from_start && patterns->rep.at_end) { + if(pos == txt->length && patterns->length == pos) + matched[0] = patterns, match_map |= 1 << i; + break; + } + if(patterns->rep.from_start) { + if(patterns->length == pos) + matched[1] = patterns, match_map |= 1 << i; + break; + } + if(patterns->rep.at_end) { + if(pos == txt->length) + matched[2] = patterns, match_map |= 1 << i; + break; + } + matched[3] = patterns, match_map |= 1 << i; + } while(0); + } + return match_map; +} + +/****************************************************************************** + * FUNCTION: ac_automata_search + * Search in the input text using the given automata. on match event it will + * call the call-back function. and the call-back function in turn after doing + * its job, will return an integer value to ac_automata_search(). 0 value means + * continue search, and non-0 value means stop search and return to the caller. + * PARAMS: + * AC_AUTOMATA_t * thiz: the pointer to the automata + * AC_TEXT_t * txt: the input text that must be searched + * void * param: this parameter will be send to call-back function. it is + * useful for sending parameter to call-back function from caller function. + * RETURN VALUE: + * -1: failed call; automata is not finalized + * 0: success; continue searching; call-back sent me a 0 value + * 1: success; stop searching; call-back sent me a non-0 value + ******************************************************************************/ +int ac_automata_search (AC_AUTOMATA_t * thiz, + AC_TEXT_t * txt, AC_REP_t * param) +{ + unsigned long position; + int icase = 0,i,debug=0; + AC_MATCH_t *match; + AC_NODE_t *curr; + AC_NODE_t *next; + AC_ALPHABET_t *apos; + + if(!thiz || !txt) return -1; + + thiz->stats.n_search++; + + if(thiz->automata_open) + /* you must call ac_automata_locate_failure() first */ + return -1; + position = 0; + curr = thiz->root; + apos = txt->astring; +#ifndef __KERNEL__ + if(thiz->debug && ac_automata_global_debug) debug = 1; + if(debug) { + txt->option = debug; /* for callback */ + printf("aho %s: search %.*s\n", thiz->name[0] ? thiz->name:"unknown", txt->length, apos); + } +#endif + match = &txt->match; + memset((char*)match,0,sizeof(*match)); + + /* The 'txt->ignore_case' option is checked + * separately otherwise clang will detect + * uninitialized memory usage much later. */ + if(txt->option & AC_FEATURE_LC) icase = 1; + /* This is the main search loop. + * it must be keep as lightweight as possible. */ + while (position < txt->length) { + uint8_t alpha = (uint8_t)apos[position]; + if(thiz->to_lc) alpha = aho_lc[alpha]; + if(!(next = node_findbs_next_ac(curr, (uint8_t)alpha, icase))) { + if(curr->failure_node) /* we are not in the root node */ + curr = curr->failure_node; + else + position++; + } else { + curr = next; + position++; + if(curr->final && curr->matched_patterns) { + /* select best match */ + match->match_map = ac_automata_exact_match(curr->matched_patterns,position,txt); + if(match->match_map) { + match->match_counter++; /* we have a matching */ +#ifndef __KERNEL__ + if(debug) { + int i; + AC_PATTERN_t *patterns = curr->matched_patterns->patterns; + for(i=0; i < curr->matched_patterns->num; i++) { + if(!(match->match_map & (1 << i))) continue; + printf(" match%d: %c%.*s%c [%u]\n",i+1, + patterns[i].rep.from_start ? '^':' ', + patterns[i].length,patterns[i].astring, + patterns[i].rep.at_end ? '$':' ', + patterns[i].rep.number); + } + } +#endif + if(thiz->match_handler) { + /* We check 'next' to find out if we came here after a alphabet + * transition or due to a fail. in second case we should not report + * matching because it was reported in previous node */ + match->position = position; + match->match_num = curr->matched_patterns->num; + match->patterns = curr->matched_patterns->patterns; + if (thiz->match_handler(match, txt, param)) { + thiz->stats.n_found++; + return 1; + } + } + } /* match->match_map */ + } + } + } + if(thiz->match_handler) { + if(match->match_counter > 0) + thiz->stats.n_found++; + return match->match_counter > 0 ? 1:0; + } + + for(i = 0; i < 4; i++) + if(txt->match.matched[i]) { + *param = (txt->match.matched[i])->rep; +#ifndef __KERNEL__ + if(debug) { + AC_PATTERN_t *pattern = txt->match.matched[i]; + printf("best match: %c%.*s%c [%u]\n", + pattern->rep.from_start ? '^':' ', + pattern->length,pattern->astring, + pattern->rep.at_end ? '$':' ', + pattern->rep.number); + } +#endif + thiz->stats.n_found++; + return 1; + } + return 0; +} + +/****************************************************************************** + * FUNCTION: ac_automata_release + * Release all allocated memories to the automata + * PARAMS: + * AC_AUTOMATA_t * thiz: the pointer to the automata + * free_pattern: + * 0 - free all struct w/o free pattern + * 1 - free all struct and pattern + * 2 - clean struct w/o free pattern + ******************************************************************************/ + +static AC_ERROR_t ac_automata_release_node(AC_AUTOMATA_t * thiz, + AC_NODE_t *n, int idx, void *data) { + + if(!n->outgoing || idx) { + if(n->outgoing) { + if(n->one) thiz->n_oc--; + else if(n->range) thiz->n_range--; + else thiz->n_find--; + } + node_release(n,data != NULL); + } + + return ACERR_SUCCESS; +} +void ac_automata_release (AC_AUTOMATA_t * thiz, uint8_t free_pattern) { + + if(!thiz) + return; + + ac_automata_walk(thiz,ac_automata_release_node,NULL,free_pattern ? (void *)1:NULL); + + if(free_pattern <= 1) { + node_release(thiz->root,free_pattern | 0x4); + thiz->root = NULL; + acho_free(thiz); + } else { + AC_NODE_t *n; + thiz->all_nodes_num = 0; + thiz->total_patterns = 0; + thiz->max_str_len = 0; + thiz->automata_open = 1; + + n = thiz->root; + n->failure_node = NULL; + n->id = 0; + n->final = 0; + n->depth = 0; + if(n->outgoing) { + acho_free(n->outgoing); + n->outgoing = NULL; + } + if(n->matched_patterns) { + acho_free(n->matched_patterns); + n->matched_patterns=NULL; + } + n->use = 0; + n->one = 0; + } +} + +#ifndef __KERNEL__ + +static void dump_node_header(AC_NODE_t * n, struct aho_dump_info *ai) { + char *c; + int i; + fprintf(ai->file,"%04d: ",n->id); + if(n->failure_node) fprintf(ai->file," failure %04d:",n->failure_node->id); + fprintf(ai->file," d:%d %c",n->depth, n->use ? '+':'-'); + ai->memcnt += sizeof(*n); + if(n->matched_patterns) { + ai->memcnt += sizeof(n->matched_patterns) + + n->matched_patterns->max*sizeof(n->matched_patterns->patterns[0]); + } + if(!n->use) { fprintf(ai->file,"\n"); return; } + if(n->one) { + (ai->node_oc)++; + fprintf(ai->file," '%c' next->%d\n",n->one_alpha, + n->outgoing ? ((AC_NODE_t *)n->outgoing)->id : -1); + return; + } + if(!n->outgoing) { + fprintf(ai->file," BUG! !outgoing\n"); + return; + } + fprintf(ai->file,"%s\n",n->range ? " RANGE":""); + c = (char *)edge_get_alpha(n->outgoing); + if(n->outgoing->degree <= 8) + (ai->node_8c)++; + else + (ai->node_xc)++; + if(n->range) + (ai->node_xr)++; + for(i=0; i < n->outgoing->degree; i++) { + fprintf(ai->file," %d: \"%c\" -> %d\n",i,c[i], + n->outgoing->next[i] ? n->outgoing->next[i]->id:-1); + } + ai->memcnt += sizeof(n->outgoing) + edge_data_size(n->outgoing->max); +} + +static AC_ERROR_t dump_node_common(AC_AUTOMATA_t * thiz, + AC_NODE_t * n, int idx, void *data) { + struct aho_dump_info *ai = (struct aho_dump_info *)data; + char *rstr = ai->bufstr; + + if(idx) return ACERR_SUCCESS; + dump_node_header(n,ai); + if (n->matched_patterns && n->matched_patterns->num && n->final) { + char lbuf[512]; + int nl = 0,j,ret; + + nl = ndpi_snprintf(lbuf,sizeof(lbuf),"'%.100s' N:%d{",rstr,n->matched_patterns->num); + for (j=0; jmatched_patterns->num; j++) { + AC_PATTERN_t *sid = &n->matched_patterns->patterns[j]; + if(j) { + ret = ndpi_snprintf(&lbuf[nl],sizeof(lbuf)-nl-1,", "); + if (ret < 0 || (unsigned int)ret >= sizeof(lbuf)-nl-1) + break; + nl += (unsigned int)ret; + } + ret = ndpi_snprintf(&lbuf[nl],sizeof(lbuf)-nl-1,"%d %c%.100s%c", + sid->rep.number & 0x3fff, + sid->rep.number & 0x8000 ? '^':' ', + sid->astring, + sid->rep.number & 0x4000 ? '$':' '); + if (ret < 0 || (unsigned int)ret >= sizeof(lbuf)-nl-1) + break; + nl += (unsigned int)ret; + } + fprintf(ai->file,"%s}\n",lbuf); + } + return ACERR_SUCCESS; +} +static void dump_node_str(AC_AUTOMATA_t * thiz, AC_NODE_t * node, + AC_NODE_t * next, int idx, void *data) { + struct aho_dump_info *ai = (struct aho_dump_info *)data; + ai->bufstr[node->depth] = thiz->ac_path[node->depth].l; + ai->bufstr[node->depth+1] = 0; +} + +/****************************************************************************** + * FUNCTION: ac_automata_dump + * Prints the automata to output in human readable form. it is useful for + * debugging purpose. + * PARAMS: + * AC_AUTOMATA_t * thiz: the pointer to the automata + * rstr: char[] buffer + * rstr_size: size of rstr buffser + * char repcast: 'n': print AC_REP_t as number, 's': print AC_REP_t as string + ******************************************************************************/ + +void ac_automata_dump(AC_AUTOMATA_t * thiz, FILE *file) { + struct aho_dump_info ai; + + if(!thiz) return; + + memset((char *)&ai,0,sizeof(ai)); + ai.file = file ? file : stdout; + fprintf(ai.file,"---DUMP- all nodes %u - max strlen %u -%s---\n", + (unsigned int)thiz->all_nodes_num, + (unsigned int)thiz->max_str_len, + thiz->automata_open ? "open":"ready"); + + ai.bufstr = acho_malloc(AC_PATTRN_MAX_LENGTH+1); + ai.bufstr_len = AC_PATTRN_MAX_LENGTH; + if(!ai.bufstr) return; + ai.bufstr[0] = '\0'; + + ac_automata_walk(thiz,dump_node_common,dump_node_str,(void *)&ai); +#ifdef WIN32 + fprintf(ai.file,"---\n mem size %lu avg node size %d, node one char %d, <=8c %d, >8c %d, range %d\n---DUMP-END-\n", + (long unsigned int)ai.memcnt,(int)ai.memcnt/(thiz->all_nodes_num+1),(int)ai.node_oc,(int)ai.node_8c,(int)ai.node_xc,(int)ai.node_xr); +#else + fprintf(ai.file,"---\n mem size %zu avg node size %d, node one char %d, <=8c %d, >8c %d, range %d\n---DUMP-END-\n", + ai.memcnt,(int)ai.memcnt/(thiz->all_nodes_num+1),(int)ai.node_oc,(int)ai.node_8c,(int)ai.node_xc,(int)ai.node_xr); +#endif + acho_free(ai.bufstr); +} +#endif + +/****************************************************************************** + * FUNCTION: ac_automata_union_matchstrs + * Collect accepted patterns of the node. the accepted patterns consist of the + * node's own accepted pattern plus accepted patterns of its failure node. + ******************************************************************************/ +static int ac_automata_union_matchstrs (AC_NODE_t * node) +{ + unsigned int i; + AC_NODE_t * m; + + for (m = node; m; m = m->failure_node) { + if(!m->matched_patterns) continue; + + for (i=0; i < m->matched_patterns->num; i++) + if(node_register_matchstr(node, &(m->matched_patterns->patterns[i]), 1)) + return 1; + + if (m->final) + node->final = 1; + } + return 0; +} + +/****************************************************************************** + * FUNCTION: ac_automata_set_failure + * find failure node for the given node. + ******************************************************************************/ +static void ac_automata_set_failure +(AC_AUTOMATA_t * thiz, AC_NODE_t * node, AC_NODE_t * next, int idx, void *data) +{ + unsigned int i, j; + AC_NODE_t * m; + struct ac_path * path = thiz->ac_path; + + for (i=1; i < next->depth; i++) { + m = thiz->root; + for (j=i; j < next->depth && m; j++) { + m = node_find_next (m, path[j].l); + } + if (m) { + next->failure_node = m; + break; + } + } + if (!next->failure_node) + next->failure_node = thiz->root; +} + +/****************************************************************************** + * FUNCTION: ac_automata_traverse_setfailure + * Traverse all automata nodes using DFS (Depth First Search), meanwhile it set + * the failure node for every node it passes through. this function must be + * called after adding last pattern to automata. i.e. after calling this you + * can not add further pattern to automata. + ******************************************************************************/ +static inline void ac_automata_traverse_setfailure (AC_AUTOMATA_t * thiz) +{ + ac_automata_walk(thiz,NULL,ac_automata_set_failure,NULL); +} + +/****************************************************************************** + * FUNCTION: node_create + * Create the node + ******************************************************************************/ +static inline AC_NODE_t * node_create(void) +{ + return (AC_NODE_t *) acho_calloc (1,sizeof(AC_NODE_t)); +} + + +static void node_release_pattern(AC_NODE_t * thiz) +{ + int i; + AC_PATTERN_t * str; + + if(!thiz->matched_patterns) return; + str = thiz->matched_patterns->patterns; + + for (i=0; i < thiz->matched_patterns->num; str++,i++) + { + if(!str->is_existing && str->astring) { + acho_free(str->astring); + str->astring = NULL; + } + } +} + + +/****************************************************************************** + * FUNCTION: node_release + * Release node + ******************************************************************************/ +static void node_release(AC_NODE_t * thiz, int free_pattern) +{ + if(thiz->root && (free_pattern & 0x4) == 0) return; + + if(free_pattern & 1) node_release_pattern(thiz); + + if(thiz->matched_patterns) { + acho_free(thiz->matched_patterns); + thiz->matched_patterns = NULL; + } + if(!thiz->one && thiz->outgoing) { + acho_free(thiz->outgoing); + } + thiz->outgoing = NULL; + acho_free(thiz); +} + +/* Nonzero if X is not aligned on a "long" boundary. */ +#undef UNALIGNED /* Windows defined it but differently from what Aho expects */ +#define UNALIGNED(X) ((intptr_t)X & (__SIZEOF_LONG__ - 1)) + +#define LBLOCKSIZE __SIZEOF_LONG__ + +#if __SIZEOF_LONG__ == 4 +#define DETECTNULL(X) (((X) - 0x01010101UL) & ~(X) & 0x80808080UL) +#define DUPC 0x01010101UL + +static inline size_t bsf(uint32_t bits) +{ +#ifdef __GNUC__ + return __builtin_ctz(bits); +#else + size_t i=0; + if(!bits) return i; + if((bits & 0xffff) == 0) { i+=16; bits >>=16; } + if((bits & 0xff) == 0) i+=8; + return i; +#endif +} + +#else +#define DETECTNULL(X) (((X) - 0x0101010101010101ULL) & ~(X) & 0x8080808080808080ULL) +#define DUPC 0x0101010101010101UL + +static inline size_t bsf(uint64_t bits) +{ +#ifdef __GNUC__ + return __builtin_ctzll(bits); +#else + size_t i=0; + if(!bits) return i; + if((bits & 0xffffffff) == 0) { i+=32; bits >>=32; } + if((bits & 0xffff) == 0) { i+=16; bits >>=16; } + if((bits & 0xff) == 0) i+=8; + return i; +#endif +} +#endif + +static inline unsigned char * +xmemchr(unsigned char *s, unsigned char c,int n) +{ + while(n > 0) { + if (n >= LBLOCKSIZE && !UNALIGNED (s)) { + unsigned long int mask = c * DUPC; + + while (n >= LBLOCKSIZE) { +#if __SIZEOF_LONG__ == 4 + unsigned long int nc = DETECTNULL(le32toh(*(unsigned long int *)s) ^ mask); +#else + unsigned long int nc = DETECTNULL(le64toh(*(unsigned long int *)s) ^ mask); +#endif + if(nc) + return s + (bsf(nc) >> 3); + s += LBLOCKSIZE; + n -= LBLOCKSIZE; + } + if(!n) return NULL; + } + if (*s == c) return s; + s++; + n--; + } + return NULL; +} + + +/****************************************************************************** + * FUNCTION: node_find_next + * Find out the next node for a given Alpha to move. this function is used in + * the pre-processing stage in which edge array is not sorted. so it uses + * linear search. + ******************************************************************************/ +static AC_NODE_t * node_find_next(AC_NODE_t * thiz, AC_ALPHABET_t alpha) +{ + unsigned char *alphas, *fc; + + if(thiz->one) return alpha == thiz->one_alpha ? (AC_NODE_t *)thiz->outgoing:NULL; + if(!thiz->outgoing) return NULL; + + alphas = (unsigned char *)edge_get_alpha(thiz->outgoing); + fc = xmemchr(alphas,(unsigned char)alpha,thiz->outgoing->degree); + return fc ? thiz->outgoing->next[fc-alphas] : NULL; +} + + +/****************************************************************************** + * FUNCTION: node_findbs_next + * Find out the next node for a given Alpha. this function is used after the + * pre-processing stage in which we sort edges. so it uses Binary Search. + ******************************************************************************/ + +static inline AC_NODE_t *node_findbs_next (AC_NODE_t * thiz, uint8_t alpha) +{ + + if(thiz->one) + return alpha == thiz->one_alpha ? (AC_NODE_t *)thiz->outgoing:NULL; + + if(!(thiz->outgoing->cmap[(uint8_t)alpha >> 5] & (1u << (alpha & 0x1f)))) + return NULL; + + if(thiz->range) + return thiz->outgoing->next[alpha - (uint8_t)thiz->one_alpha]; + + return thiz->outgoing->next[ + xmemchr(thiz->a_ptr,alpha,thiz->outgoing->degree) - thiz->a_ptr]; +} + +static AC_NODE_t *node_findbs_next_ac (AC_NODE_t * thiz, uint8_t alpha,int icase) { + AC_NODE_t *next; + uint8_t alpha_c; + + if(!thiz->outgoing) return NULL; + + next = node_findbs_next(thiz,alpha); + if(next || !icase) return next; + + alpha_c = aho_xc[alpha]; + if(!alpha_c) return NULL; + return node_findbs_next(thiz, alpha ^ alpha_c); +} + +/****************************************************************************** + * FUNCTION: node_has_matchstr + * Determine if a final node contains a pattern in its accepted pattern list + * or not. return values: 1 = it has, 0 = it hasn't + ******************************************************************************/ +static int node_has_matchstr (AC_NODE_t * thiz, AC_PATTERN_t * newstr) +{ + int i; + + if(!thiz->matched_patterns) return 0; + + for (i=0; i < thiz->matched_patterns->num; i++) + { + AC_PATTERN_t *str = &(thiz->matched_patterns->patterns[i]); + + if (str->length != newstr->length) + continue; + + if(!memcmp(str->astring,newstr->astring,str->length)) + return 1; + } + + return 0; +} + +/****************************************************************************** + * FUNCTION: node_create_next + * Create the next node for the given alpha. + ******************************************************************************/ +static AC_NODE_t * node_create_next (AC_NODE_t * thiz, AC_ALPHABET_t alpha) +{ + AC_NODE_t * next; + next = node_find_next (thiz, alpha); + if (next) + /* The edge already exists */ + return NULL; + /* Otherwise register new edge */ + next = node_create (); + if(next) { + if(node_register_outgoing(thiz, next, alpha)) { + node_release(next,0); + return NULL; + } + next->depth = thiz->depth+1; + } + + return next; +} + +static inline size_t mp_data_size(int n) { + return sizeof(AC_PATTERNS_t) + n*sizeof(AC_PATTERN_t); +} + +static AC_PATTERNS_t * node_resize_mp(AC_PATTERNS_t *m) { +AC_PATTERNS_t *new_m; + + if(!m) { + m = acho_calloc(1,mp_data_size(REALLOC_CHUNK_MATCHSTR)); + if(!m) return m; + m->max = REALLOC_CHUNK_MATCHSTR; + return m; + } + new_m = acho_malloc(mp_data_size(m->max+REALLOC_CHUNK_MATCHSTR)); + if(!new_m) return new_m; + memcpy((char *)new_m,(char *)m,mp_data_size(m->max)); + new_m->max += REALLOC_CHUNK_MATCHSTR; + acho_free(m); + return new_m; +} + +/****************************************************************************** + * FUNCTION: node_register_matchstr + * Adds the pattern to the list of accepted pattern. + ******************************************************************************/ +static int node_register_matchstr (AC_NODE_t * thiz, AC_PATTERN_t * str,int is_existing) +{ + AC_PATTERN_t *l; + + if(!is_existing) + thiz->final = 1; + /* Check if the new pattern already exists in the node list */ + if (thiz->matched_patterns && node_has_matchstr(thiz, str)) + return 0; + + if(!thiz->matched_patterns) { + thiz->matched_patterns = node_resize_mp(thiz->matched_patterns); + if(!thiz->matched_patterns) + return 1; + } + + /* Manage memory */ + if (thiz->matched_patterns->num >= thiz->matched_patterns->max) { + AC_PATTERNS_t *new_mp = node_resize_mp(thiz->matched_patterns); + if(!new_mp) return 1; + thiz->matched_patterns = new_mp; + } + l = &thiz->matched_patterns->patterns[thiz->matched_patterns->num]; + l->astring = str->astring; + l->length = str->length; + l->is_existing = is_existing; + l->rep = str->rep; + thiz->matched_patterns->num++; + return 0; +} + +static struct edge *node_resize_outgoing(struct edge * e,size_t added) { +struct edge *new_e; +int ds; + + if(!added) added = REALLOC_CHUNK_OUTGOING; + if(!e) { + e = acho_calloc(1,sizeof(struct edge) + edge_data_size(REALLOC_CHUNK_OUTGOING)); + if(!e) return e; + e->max = REALLOC_CHUNK_OUTGOING; + return e; + } + ds = edge_data_size(e->max + added); + new_e = acho_calloc(1,sizeof(struct edge) + ds); + if(!new_e) return new_e; + memcpy(new_e,e,sizeof(struct edge) + sizeof(AC_NODE_t *)*e->max); + new_e->max += added; + + if(e->degree) + memcpy(edge_get_alpha(new_e),edge_get_alpha(e),e->degree); + + acho_free(e); + return new_e; +} + +/****************************************************************************** + * FUNCTION: node_register_outgoing + * Establish an edge between two nodes + ******************************************************************************/ +static int node_register_outgoing +(AC_NODE_t * thiz, AC_NODE_t * next, AC_ALPHABET_t alpha) +{ + struct edge *o; + if(!thiz->use) { + thiz->use = 1; + thiz->one = 1; + thiz->one_alpha = alpha; + thiz->outgoing = (struct edge *)next; + return 0; + } + if(thiz->one) { + o = node_resize_outgoing(NULL,0); + if(!o) return 1; + o->next[0] = (AC_NODE_t *)thiz->outgoing; + *edge_get_alpha(o) = thiz->one_alpha; + o->degree = 1; + thiz->one = 0; + thiz->one_alpha = 0; + thiz->outgoing = o; + } else + o = thiz->outgoing; + + if(!o) return 1; + + if(o->degree >= o->max) + { + struct edge *new_o = node_resize_outgoing(thiz->outgoing,0); + if(!new_o) return 1; + + thiz->outgoing = new_o; + o = new_o; + } + edge_get_alpha(o)[o->degree] = alpha; + o->next[o->degree] = next; + o->degree++; + return 0; +} + +/****************************************************************************** + * FUNCTION: node_edge_compare + * Comparison function for qsort. see man qsort. + ******************************************************************************/ +static int node_edge_compare (struct edge * e, int a, int b) { + unsigned char *c = (unsigned char *)edge_get_alpha(e); + return c[a] >= c[b] ? 1:0; +} + +static void node_edge_swap (struct edge * e, int a, int b) +{ +AC_ALPHABET_t *c,tc; +AC_NODE_t *tn; + c = edge_get_alpha(e); + tc = c[a]; c[a] = c[b]; c[b] = tc; + tn = e->next[a]; e->next[a] = e->next[b]; e->next[b] = tn; +} + +/****************************************************************************** + * FUNCTION: acho_2range + * Adds missing characters in the range low - high + ******************************************************************************/ +static void acho_2range(AC_NODE_t * thiz,uint8_t low, uint8_t high) { + struct edge *e; + int i; + uint8_t *c = (uint8_t *)edge_get_alpha(thiz->outgoing); + + thiz->range = 1; + thiz->one_alpha = (AC_ALPHABET_t)low; + e = thiz->outgoing; + for (i=0; low <= high && i < e->max; i++,low++) { + if(e->cmap[(low >> 5) & 0x7] & (1u << (low & 0x1f))) continue; + c[e->degree] = low; + e->next[e->degree] = NULL; + e->degree++; + } +} + +/****************************************************************************** + * FUNCTION: node_range_edges + * Converts to a range if possible. + ******************************************************************************/ +static int node_range_edges (AC_AUTOMATA_t *thiz, AC_NODE_t * node) +{ + struct edge *e = node->outgoing; + uint8_t *c = (uint8_t *)edge_get_alpha(node->outgoing); + uint8_t low = 0xff,high = 0; + int i; + + memset((char *)&e->cmap,0,sizeof(e->cmap)); + for(i = 0; i < e->degree; i++) { + uint8_t cc = c[i]; + if(cc < low) low = cc; + if(cc > high) high = cc; + e->cmap[(cc >> 5) & 0x7] |= 1u << (cc & 0x1f); + } + if(high - low + 1 == e->degree) { + node->range = 1; + node->one_alpha = (AC_ALPHABET_t)low; + return 1; + } + if(high - low + 1 < e->max) { + acho_2range(node,low,high); + return 1; + } + + i = (high - low)/8; + if (i < thiz->add_to_range) i = thiz->add_to_range; + i += REALLOC_CHUNK_OUTGOING-1; + i -= i % REALLOC_CHUNK_OUTGOING; + + if(high - low + 1 < e->max + i || (node->root && !thiz->no_root_range)) { + int added = (high - low + 1) - e->max; + struct edge *new_o = node_resize_outgoing(node->outgoing,added); + if(new_o) { + node->outgoing = new_o; + acho_2range(node,low,high); + return 1; + } + return 0; + } + + return 0; +} +/****************************************************************************** + * FUNCTION: node_sort_edges + * sorts edges alphabets. + ******************************************************************************/ +static inline void node_sort_edges (AC_NODE_t * thiz) +{ + + acho_sort (thiz->outgoing, thiz->outgoing->degree, + node_edge_compare, node_edge_swap); +} + +/** + * sort - sort an array of elements + * @base: pointer to data to sort + * @num: number of elements + * @size: size of each element + * @cmp_func: pointer to comparison function + * @swap_func: pointer to swap function or NULL + * + * This function does a heapsort on the given array. You may provide a + * swap_func function optimized to your element type. + * + * Sorting time is O(n log n) both on average and worst-case. While + * qsort is about 20% faster on average, it suffers from exploitable + * O(n*n) worst-case behavior and extra memory requirements that make + * it less suitable for kernel use. + */ + + void acho_sort(struct edge *e, size_t num, + int (*cmp_func)(struct edge *e, int a, int b), + void (*swap_func)(struct edge *e, int a, int b)) +{ + /* pre-scale counters for performance */ + int i = (num/2 - 1) , n = num, c, r; + + if (!swap_func) return; + if (!cmp_func) return; + + /* heapify */ + for ( ; i >= 0; i -= 1) { + for (r = i; r * 2 + 1 < n; r = c) { + c = r * 2 + 1; + if (c < n - 1 && cmp_func(e, c, c + 1) == 0) + c += 1; + if (cmp_func(e, r, c) != 0) + break; + swap_func(e, r, c); + } + } + + /* sort */ + for (i = n - 1; i > 0; i -= 1) { + swap_func(e,0,i); + for (r = 0; r * 2 + 1 < i; r = c) { + c = r * 2 + 1; + if (c < i - 1 && cmp_func(e, c, c + 1) == 0) + c += 1; + if (cmp_func(e, r, c) != 0) + break; + swap_func(e, r, c); + } + } +} + +void ac_automata_get_stats(AC_AUTOMATA_t * thiz, struct ac_stats *stats) +{ + if (thiz) { + stats->n_search = thiz->stats.n_search; + stats->n_found = thiz->stats.n_found; + } else { + stats->n_search = 0; + stats->n_found = 0; + } +} + +/* vim: set ts=4 sw=4 et : */ + diff --git a/src/components/implementation/simple_nf/ndpi/ahocorasick.h b/src/components/implementation/simple_nf/ndpi/ahocorasick.h new file mode 100644 index 0000000000..37d13b0f07 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/ahocorasick.h @@ -0,0 +1,284 @@ +/* + * ahocorasick.h: Includes all types of ahocorasick library + * This file is part of multifast. + * + Copyright 2010-2012 Kamiar Kanani + + multifast is free software: you can redistribute it and/or modify + it under the terms of the GNU Lesser General Public License as published by + the Free Software Foundation, either version 3 of the License, or + (at your option) any later version. + + multifast is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public License + along with multifast. If not, see . +*/ + +#ifdef __cplusplus +extern "C" { +#endif + +#ifndef _AC_TYPES_H_ +#define _AC_TYPES_H_ + +#define AC_AHOCORASICK_NEW +#define AC_PATTRN_MAX_LENGTH 256 + +/* reallocation step for AC_NODE_t.matched_patterns */ +#define REALLOC_CHUNK_MATCHSTR 8 + +/* reallocation step for AC_NODE_t.outgoing array */ +/* Must be a multiple of __SIZEOF_LONG__ ! */ +#define REALLOC_CHUNK_OUTGOING 8 + +/* AC_ALPHABET_t: + * defines the alphabet type. + * Actually defining AC_ALPHABET_t as a char will work, but sometimes we deal + * with streams of other (bigger) types e.g. integers, specific enum, objects. + * Although they consists of string of bytes (chars), but using their specific + * types for AC_ALPHABET_t will lead to a better performance. so instead of + * dealing with strings of chars, we assume dealing with strings of + * AC_ALPHABET_t and leave it optional for other developers to define their + * own alphabets. + **/ +typedef char AC_ALPHABET_t; + +/* AC_REP_t: + * Provides a more readable representative for a pattern. + * because patterns themselves are not always suitable for displaying + * (e.g. for hex patterns), we offer this type to improve intelligibility + * of output. furthermore, sometimes it is useful, for example while + * retrieving patterns from a database, to maintain their identifiers in the + * automata for further reference. we provisioned two possible types as a + * union for this purpose. you can add your desired type in it. + **/ +typedef struct { + uint32_t number; /* Often used to store procotolId */ + uint64_t number64; + uint16_t breed, category; + uint16_t level, /* Domain level for comparison */ + from_start:1, /* match from start of string */ + at_end:1, /* match at end of string */ + dot:1; /* is domain name */ +} AC_REP_t; + +/* AC_PATTERN_t: + * This is the pattern type that must be fed into AC automata. + * the 'astring' field is not null-terminated, due to it can contain zero + * value bytes. the 'length' field determines the number of AC_ALPHABET_t it + * carries. the 'representative' field is described in AC_REP_t. despite + * 'astring', 'representative' can have duplicate values for different given + * AC_PATTERN_t. it is an optional field and you can just fill it with 0. + * CAUTION: + * Not always the 'astring' points to the correct position in memory. + * it is the responsibility of your program to maintain a permanent allocation + * for astring field of the added pattern to automata. + **/ + +typedef struct +{ + AC_ALPHABET_t * astring; /* String of alphabets */ + uint16_t length, /* Length of pattern */ + is_existing; /* not union_matchstr */ + AC_REP_t rep; /* Representative string (optional) */ +} AC_PATTERN_t; + +typedef struct { + unsigned short num; /* Number of matched patterns at this node */ + unsigned short max; /* Max capacity of allocated memory for matched_patterns */ + AC_PATTERN_t patterns[]; +} AC_PATTERNS_t; + + +/* AC_MATCH_t: + * Provides the structure for reporting a match event. + * a match event occurs when the automata reaches a final node. any final + * node can match one or more pattern at a position in a text. the + * 'patterns' field holds these matched patterns. obviously these + * matched patterns have same end-position in the text. there is a relationship + * between matched patterns: the shorter one is a factor (tail) of the longer + * one. the 'position' maintains the end position of matched patterns. the + * start position of patterns could be found by knowing their 'length' in + * AC_PATTERN_t. e.g. suppose "recent" and "cent" are matched at + * position 40 in the text, then the start position of them are 34 and 36 + * respectively. finally the field 'match_num' maintains the number of + * matched patterns. + **/ + +typedef struct +{ + AC_PATTERN_t *matched[4], /* for ac_automata_exact_match() */ + *last; /* for callback */ + AC_PATTERN_t *patterns; /* Array of matched pattern */ + unsigned int match_map; /* Matched patterns (bitmap) */ + unsigned int position; /* The end position of matching pattern(s) in the text */ + unsigned short int match_num; /* Number of matched patterns */ + unsigned short int match_counter; /* Counter of found matches */ +} AC_MATCH_t; + +/* AC_TEXT_t: + * The input text type that is fed to ac_automata_search() to be searched. + * it is similar to AC_PATTERN_t. actually we could use AC_PATTERN_t as input + * text, but for the purpose of being more readable, we defined this new type. + **/ +typedef struct +{ + AC_MATCH_t match; + AC_ALPHABET_t * astring; /* String of alphabets */ + unsigned short int length, /* Length of string */ + option; /* AC_FEATURE_LC | AC_FEATURE_DEBUG */ +} AC_TEXT_t; + + +/* AC_ERROR_t: + * Error that may occur while adding a pattern to the automata. + * it is returned by ac_automata_add(). + **/ +typedef enum + { + ACERR_SUCCESS = 0, /* No error occurred */ + ACERR_DUPLICATE_PATTERN, /* Duplicate patterns */ + ACERR_LONG_PATTERN, /* Pattern length is longer than AC_PATTRN_MAX_LENGTH */ + ACERR_ZERO_PATTERN, /* Empty pattern (zero length) */ + ACERR_AUTOMATA_CLOSED, /* Automata is closed. after calling + ac_automata_finalize() you can not add new patterns to the automata. */ + ACERR_ERROR, /* common error */ + } AC_ERROR_t; + +/* MATCH_CALLBACK_t: + * This is the call-back function type that must be given to automata at + * initialization to report match occurrence to the caller. + * at a match event, the automata will reach you using this function and sends + * you a pointer to AC_MATCH_t. using that pointer you can handle + * matches. you can send parameters to the call-back function when you call + * ac_automata_search(). at call-back, the automata will sent you those + * parameters as the second parameter (void *) of MATCH_CALLBACK_t. inside + * the call-back function you can cast it to whatever you want. + * If you return 0 from MATCH_CALLBACK_t function to the automata, it will + * continue searching, otherwise it will return from ac_automata_search() + * to your calling function. + **/ +typedef int (*MATCH_CALLBACK_f)(AC_MATCH_t *, AC_TEXT_t *, AC_REP_t *); + +/* AC_PATTRN_MAX_LENGTH: + * Maximum acceptable pattern length in AC_PATTERN_t.length + **/ + +/* Forward Declaration */ +struct edge; + +/* + * automata node + * 4 pointers + 8 bytes : 40/24 bytes for 64/32 bit + */ +typedef struct ac_node +{ + int id; /* Node ID : set after finalize(), only for ac_automata_dump */ + AC_ALPHABET_t one_alpha; + unsigned char one:1, /* one_char: yes/no */ + range:1, /* range symbols start from one_alpha */ + root:1, /* is root node */ + final:1, /* 0: no ; 1: yes, it is a final node */ + use:1, /* use: yes/no */ + ff:1; /* finalized node */ + unsigned short depth; /* depth: distance between this node and the root */ + + AC_PATTERNS_t *matched_patterns; /* Array of matched patterns */ + struct edge *outgoing; /* Array of outgoing edges */ + + struct ac_node *failure_node; /* The failure node of this node */ + unsigned char *a_ptr; +} AC_NODE_t; + +struct edge { + unsigned short degree; /* Number of outgoing edges */ + unsigned short max; /* Max capacity of allocated memory for outgoing */ + uint32_t cmap[8]; /* 256 bit */ + AC_NODE_t *next[]; + /* + * first N elements used for 'next' pointers + + * M elements used for symbols storage + * M = (max + sizeof(void*)-1) & ( ~(sizeof(void*)-1)) + * + * if sizeof(void*)==8 + * for max = 8 we must alloc next[9]; + * for max = 16 we must alloc next[18]; + * + */ +}; + +struct ac_path { + AC_NODE_t * n; + unsigned short int idx,l; +}; + +struct ac_stats { + uint64_t n_search; + uint64_t n_found; +}; + +typedef struct +{ + /* The root of the Aho-Corasick trie */ + AC_NODE_t * root; + MATCH_CALLBACK_f match_handler; + unsigned int all_nodes_num; /* Number of all nodes in the automata */ + + /* this flag indicates that if automata is finalized by + * ac_automata_finalize() or not. 1 means finalized and 0 + * means not finalized (is open). after finalizing automata you can not + * add pattern to automata anymore. */ + unsigned short automata_open, + to_lc:1, no_root_range:1,debug:1; /* lowercase match */ + + /* Statistic Variables */ + unsigned long total_patterns; /* Total patterns in the automata */ + + unsigned long max_str_len; /* largest pattern length. Update by ac_automata_finalize() */ + + struct ac_path ac_path[AC_PATTRN_MAX_LENGTH+4]; /* for ac_automata_walk */ + int id; /* node id */ + int add_to_range; /* for convert to range */ + int n_oc,n_range,n_find; /* statistics */ + char name[32]; /* if debug != 0 */ + struct ac_stats stats; +} AC_AUTOMATA_t; + +typedef AC_ERROR_t (*NODE_CALLBACK_f)(AC_AUTOMATA_t *, AC_NODE_t *,int idx, void *); + +typedef void (*ALPHA_CALLBACK_f)(AC_AUTOMATA_t *, AC_NODE_t *,AC_NODE_t *,int ,void *); + +#define AC_FEATURE_DEBUG 1 +#define AC_FEATURE_LC 2 +#define AC_FEATURE_NO_ROOT_RANGE 4 + +AC_AUTOMATA_t * ac_automata_init (MATCH_CALLBACK_f mc); +AC_ERROR_t ac_automata_feature (AC_AUTOMATA_t * thiz, unsigned int feature); +AC_ERROR_t ac_automata_name (AC_AUTOMATA_t * thiz, char *name, int debug); +AC_ERROR_t ac_automata_add (AC_AUTOMATA_t * thiz, AC_PATTERN_t * str); +AC_ERROR_t ac_automata_finalize (AC_AUTOMATA_t * thiz); +AC_ERROR_t ac_automata_walk (AC_AUTOMATA_t * thiz, NODE_CALLBACK_f node_cb, + ALPHA_CALLBACK_f alpha_cb, void *); + +int ac_automata_search (AC_AUTOMATA_t * thiz, + AC_TEXT_t * str, + AC_REP_t * param); +int ac_automata_exact_match(AC_PATTERNS_t *mp,int pos, AC_TEXT_t *); +void ac_automata_clean (AC_AUTOMATA_t * thiz); +void ac_automata_release (AC_AUTOMATA_t * thiz, uint8_t free_pattern); +#ifndef __KERNEL__ +/* Global debug control. */ +void ac_automata_enable_debug (int debug); +/* See man open_memstream() for get result as string */ +void ac_automata_dump (AC_AUTOMATA_t * thiz, FILE *); +#endif +void ac_automata_get_stats(AC_AUTOMATA_t * thiz, struct ac_stats *stats); +#endif + +#ifdef __cplusplus +} +#endif diff --git a/src/components/implementation/simple_nf/ndpi/ajp.c b/src/components/implementation/simple_nf/ndpi/ajp.c new file mode 100644 index 0000000000..c25b958033 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/ajp.c @@ -0,0 +1,132 @@ +/* + * ajp.c + * + * Copyright (C) 2018 by Leonn Paiva + * + * This file is part of nDPI, an open source deep packet inspection + * library based on the OpenDPI and PACE technology by ipoque GmbH + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + */ + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_AJP + +#include "ndpi_api.h" + +enum ajp_direction { + AJP_SERVER_TO_CONTAINER = 0x1234, + AJP_CONTAINER_TO_SERVER = 0x4142 +}; + +enum ajp_packet_type { + AJP_UNKNOWN = 0, + + /* packet types */ + AJP_FORWARD_REQUEST = 2, + AJP_SEND_BODY_CHUNK = 3, + AJP_SEND_HEADERS = 4, + AJP_END_RESPONSE = 5, + AJP_GET_BODY_CHUNK = 6, + AJP_SHUTDOWN = 7, + AJP_PING = 8, + AJP_CPONG = 9, + AJP_CPING = 10, + AJP_BODY = 11 +}; + +PACK_ON +struct ajp_header { + uint16_t magic; + uint16_t len; + uint8_t code; +} PACK_OFF; + +static void set_ajp_detected(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) { + + if(flow->detected_protocol_stack[0] == NDPI_PROTOCOL_UNKNOWN) { + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_AJP, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); + } +} + + +/*************************************************************************************************/ + +static void ndpi_check_ajp(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) { + struct ajp_header ajp_hdr; + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + + if (packet->payload_packet_len < sizeof(ajp_hdr)) { + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + return; + } + + memcpy(&ajp_hdr, packet->payload, sizeof(struct ajp_header)); + + ajp_hdr.magic = ntohs(ajp_hdr.magic); + ajp_hdr.len = ntohs(ajp_hdr.len); + + if (ajp_hdr.len > 0 && ajp_hdr.magic == AJP_SERVER_TO_CONTAINER) { + if (ajp_hdr.code == AJP_FORWARD_REQUEST || ajp_hdr.code == AJP_SHUTDOWN + || ajp_hdr.code == AJP_PING || ajp_hdr.code == AJP_CPING) { + + set_ajp_detected(ndpi_struct, flow); + + } else { + NDPI_LOG_DBG(ndpi_struct, "Invalid AJP request type"); + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + } + } else if (ajp_hdr.len > 0 && ajp_hdr.magic == AJP_CONTAINER_TO_SERVER) { + if (ajp_hdr.code == AJP_SEND_BODY_CHUNK || ajp_hdr.code == AJP_SEND_HEADERS + || ajp_hdr.code == AJP_END_RESPONSE || ajp_hdr.code == AJP_GET_BODY_CHUNK + || ajp_hdr.code == AJP_CPONG) { + + set_ajp_detected(ndpi_struct, flow); + + } else { + NDPI_LOG_DBG(ndpi_struct, "Invalid AJP response type"); + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + } + } else { + NDPI_LOG_DBG(ndpi_struct,"Invalid AJP packet\n"); + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + } +} + +static void ndpi_search_ajp(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) +{ + NDPI_LOG_DBG(ndpi_struct, "search AJP\n"); + ndpi_check_ajp(ndpi_struct, flow); + + return; +} + +/* ********************************* */ + + +void init_ajp_dissector(struct ndpi_detection_module_struct *ndpi_struct, + u_int32_t *id) +{ + ndpi_set_bitmask_protocol_detection("AJP", ndpi_struct, + *id, NDPI_PROTOCOL_AJP, ndpi_search_ajp, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_TCP_WITH_PAYLOAD_WITHOUT_RETRANSMISSION, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK); + + *id += 1; +} diff --git a/src/components/implementation/simple_nf/ndpi/alicloud.c b/src/components/implementation/simple_nf/ndpi/alicloud.c new file mode 100644 index 0000000000..3966e75879 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/alicloud.c @@ -0,0 +1,82 @@ +/* + * alicloud.c + * + * Copyright (C) 2022-23 - ntop.org + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_ALICLOUD + +#include "ndpi_api.h" + +static void ndpi_int_alicloud_add_connection(struct ndpi_detection_module_struct * const ndpi_struct, + struct ndpi_flow_struct * const flow) +{ + NDPI_LOG_INFO(ndpi_struct, "found alicloud\n"); + + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_ALICLOUD, NDPI_PROTOCOL_UNKNOWN, + NDPI_CONFIDENCE_DPI); +} + +static void ndpi_search_alicloud(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) +{ + struct ndpi_packet_struct const * const packet = &ndpi_struct->packet; + + NDPI_LOG_DBG(ndpi_struct, "search alicloud\n"); + + if (packet->payload_packet_len < 8) + { + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + return; + } + + if (ntohl(get_u_int32_t(packet->payload, 0)) == 0xcefabeba) + { + u_int32_t pdu_len = ntohl(get_u_int32_t(packet->payload, 4)); + + if (packet->payload_packet_len == 8 && pdu_len > 0) + { + ndpi_int_alicloud_add_connection(ndpi_struct, flow); + return; + } else if (pdu_len == (u_int32_t)packet->payload_packet_len - 8) { + ndpi_int_alicloud_add_connection(ndpi_struct, flow); + return; + } + } + + if (flow->packet_counter > 3) + { + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + } +} + +void init_alicloud_dissector(struct ndpi_detection_module_struct *ndpi_struct, + u_int32_t *id) +{ + ndpi_set_bitmask_protocol_detection("AliCloud", ndpi_struct, *id, + NDPI_PROTOCOL_ALICLOUD, + ndpi_search_alicloud, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_TCP_WITH_PAYLOAD_WITHOUT_RETRANSMISSION, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK + ); + + *id += 1; +} diff --git a/src/components/implementation/simple_nf/ndpi/amazon_video.c b/src/components/implementation/simple_nf/ndpi/amazon_video.c new file mode 100644 index 0000000000..49e1cf2efa --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/amazon_video.c @@ -0,0 +1,78 @@ +/* + * amazon_video.c + * + * Copyright (C) 2018-22 - ntop.org + * + * This file is part of nDPI, an open source deep packet inspection + * library based on the OpenDPI and PACE technology by ipoque GmbH + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_AMAZON_VIDEO + +#include "ndpi_api.h" + +static void ndpi_check_amazon_video(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) { + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + + NDPI_LOG_DBG(ndpi_struct, "search Amazon Prime\n"); + + if(packet->payload_packet_len > 4) { + if((packet->tcp != NULL) && + (packet->payload[0] == 0xFE && + packet->payload[1] == 0xED && + packet->payload[2] == 0xFA && + packet->payload[3] == 0xCE)) { + NDPI_LOG_INFO(ndpi_struct, "found Amazon Video on TCP\n"); + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_AMAZON_VIDEO, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); + return; + } else if((packet->udp != NULL) && + (packet->payload[0] == 0xDE && + packet->payload[1] == 0xAD && + packet->payload[2] == 0xBE && + packet->payload[3] == 0xEF)) { + NDPI_LOG_INFO(ndpi_struct, "found Amazon Video on UDP\n"); + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_AMAZON_VIDEO, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); + return; + } + } + + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); +} + +static void ndpi_search_amazon_video(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) { + NDPI_LOG_DBG(ndpi_struct, "search amazon_video\n"); + + /* skip marked packets */ + if(flow->detected_protocol_stack[0] != NDPI_PROTOCOL_AMAZON_VIDEO) + ndpi_check_amazon_video(ndpi_struct, flow); +} + + +void init_amazon_video_dissector(struct ndpi_detection_module_struct *ndpi_struct, + u_int32_t *id) { + ndpi_set_bitmask_protocol_detection("AMAZON_VIDEO", ndpi_struct, *id, + NDPI_PROTOCOL_AMAZON_VIDEO, + ndpi_search_amazon_video, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_TCP_OR_UDP_WITH_PAYLOAD_WITHOUT_RETRANSMISSION, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK); + *id += 1; +} diff --git a/src/components/implementation/simple_nf/ndpi/among_us.c b/src/components/implementation/simple_nf/ndpi/among_us.c new file mode 100644 index 0000000000..f1e143e813 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/among_us.c @@ -0,0 +1,57 @@ +/* + * among_us.c + * + * Copyright (C) 2020 - ntop.org + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_AMONG_US + +#include "ndpi_api.h" + +static void ndpi_int_among_us_add_connection(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) +{ + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_AMONG_US, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); +} + +static void ndpi_search_among_us(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) +{ + struct ndpi_packet_struct * const packet = &ndpi_struct->packet; + + /* handshake packet */ + if (packet->payload_packet_len > 9 && + ntohl(*(u_int32_t*)&packet->payload[0]) == 0x08000100 && + ntohl(*(u_int32_t*)&packet->payload[4]) == 0x80d90203) + { + ndpi_int_among_us_add_connection(ndpi_struct, flow); + } else { + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + } +} + +void init_among_us_dissector(struct ndpi_detection_module_struct *ndpi_struct, u_int32_t *id) +{ + ndpi_set_bitmask_protocol_detection( + "AmongUs", ndpi_struct, *id, + NDPI_PROTOCOL_AMONG_US, ndpi_search_among_us, NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_UDP_WITH_PAYLOAD, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, ADD_TO_DETECTION_BITMASK); + *id += 1; +} + diff --git a/src/components/implementation/simple_nf/ndpi/amqp.c b/src/components/implementation/simple_nf/ndpi/amqp.c new file mode 100644 index 0000000000..42afb122a8 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/amqp.c @@ -0,0 +1,85 @@ +/* + * amqp.c + * + * Copyright (C) 2011-22 - ntop.org + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_AMQP + +#include "ndpi_api.h" + + +PACK_ON +struct amqp_header { + u_int8_t ptype; + u_int16_t channel; + u_int32_t length; + u_int16_t class_id, method; +} PACK_OFF; + +static void ndpi_int_amqp_add_connection(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow/* , */ + /* ndpi_protocol_type_t protocol_type */) { + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_AMQP, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); +} + +static void ndpi_search_amqp(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) { + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + + NDPI_LOG_DBG(ndpi_struct, "search amqp\n"); + + if (packet->tcp != NULL) { + if(packet->payload_packet_len > sizeof(struct amqp_header)) { + struct amqp_header *h = (struct amqp_header*)packet->payload; + + if(h->ptype <= 3) { + u_int32_t length = htonl(h->length); + + if(((length+8) >= packet->payload_packet_len) + && (length < 32768) /* Upper bound */) { + u_int16_t class_id = htons(h->class_id); + + if((class_id >= 10) /* Connection */ + && (class_id <= 110) /* Tunnel */) { + u_int16_t method = htons(h->method); + + if(method <= 120 /* Method basic NACK */) { + NDPI_LOG_INFO(ndpi_struct, "found amqp over tcp\n"); + ndpi_int_amqp_add_connection(ndpi_struct, flow); + return; + } + } + } + } + } + } +} + + +void init_amqp_dissector(struct ndpi_detection_module_struct *ndpi_struct, u_int32_t *id) { + ndpi_set_bitmask_protocol_detection("AMQP", ndpi_struct, *id, + NDPI_PROTOCOL_AMQP, + ndpi_search_amqp, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_TCP_WITH_PAYLOAD_WITHOUT_RETRANSMISSION, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK); + + *id += 1; +} + diff --git a/src/components/implementation/simple_nf/ndpi/apple_push.c b/src/components/implementation/simple_nf/ndpi/apple_push.c new file mode 100644 index 0000000000..7f19162514 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/apple_push.c @@ -0,0 +1,108 @@ +/* + * apple_push.c + * + * Copyright (C) 2018 by ntop.org + * + * This file is part of nDPI, an open source deep packet inspection + * library based on the OpenDPI and PACE technology by ipoque GmbH + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_APPLE_PUSH + +#include "ndpi_api.h" + +static int is_apple_push_addr(const struct ndpi_packet_struct *packet) +{ + if(packet->iph) { + /* 17.0.0.0/8 */ + if(((ntohl(packet->iph->saddr) & 0xFF000000 /* 255.0.0.0 */) == 0x11000000) || + ((ntohl(packet->iph->daddr) & 0xFF000000 /* 255.0.0.0 */) == 0x11000000)) + return 1; + } else if(packet->iphv6) { + /* 2620:149:a44::/48 */ + if(((packet->iphv6->ip6_src.u6_addr.u6_addr32[0] == ntohl(0x26200149)) && + ((packet->iphv6->ip6_src.u6_addr.u6_addr32[1] & htonl (0xffff0000)) == ntohl(0x0a440000))) || + ((packet->iphv6->ip6_dst.u6_addr.u6_addr32[0] == ntohl(0x26200149)) && + ((packet->iphv6->ip6_dst.u6_addr.u6_addr32[1] & htonl (0xffff0000)) == ntohl(0x0a440000)))) + return 1; + /* 2403:300:a42::/48 */ + if(((packet->iphv6->ip6_src.u6_addr.u6_addr32[0] == ntohl(0x24030300)) && + ((packet->iphv6->ip6_src.u6_addr.u6_addr32[1] & htonl (0xffff0000)) == ntohl(0x0a420000))) || + ((packet->iphv6->ip6_dst.u6_addr.u6_addr32[0] == ntohl(0x24030300)) && + ((packet->iphv6->ip6_dst.u6_addr.u6_addr32[1] & htonl (0xffff0000)) == ntohl(0x0a420000)))) + return 1; + /* 2403:300:a51::/48 */ + if(((packet->iphv6->ip6_src.u6_addr.u6_addr32[0] == ntohl(0x24030300)) && + ((packet->iphv6->ip6_src.u6_addr.u6_addr32[1] & htonl (0xffff0000)) == ntohl(0x0a510000))) || + ((packet->iphv6->ip6_dst.u6_addr.u6_addr32[0] == ntohl(0x24030300)) && + ((packet->iphv6->ip6_dst.u6_addr.u6_addr32[1] & htonl (0xffff0000)) == ntohl(0x0a510000)))) + return 1; + /* 2a01:b740:a42::/48 */ + if(((packet->iphv6->ip6_src.u6_addr.u6_addr32[0] == ntohl(0x2a0ab740)) && + ((packet->iphv6->ip6_src.u6_addr.u6_addr32[1] & htonl (0xffff0000)) == ntohl(0x0a420000))) || + ((packet->iphv6->ip6_dst.u6_addr.u6_addr32[0] == ntohl(0x2a0ab740)) && + ((packet->iphv6->ip6_dst.u6_addr.u6_addr32[1] & htonl (0xffff0000)) == ntohl(0x0a420000)))) + return 1; + + } + return 0; +} + + +static void ndpi_check_apple_push(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) { + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + + /* https://support.apple.com/en-us/HT203609 */ + if(is_apple_push_addr(packet)) { + u_int16_t apple_push_port = ntohs(5223); + u_int16_t notification_apn_port = ntohs(2197); + + if((packet->tcp->source == apple_push_port) || (packet->tcp->dest == apple_push_port) || + (packet->tcp->source == notification_apn_port) || (packet->tcp->dest == notification_apn_port)) { + NDPI_LOG_INFO(ndpi_struct, "found apple_push\n"); + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_APPLE_PUSH, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); + return; + } + } + + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); +} + +static void ndpi_search_apple_push(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) +{ + NDPI_LOG_DBG(ndpi_struct, "search apple_push\n"); + + /* skip marked packets */ + if(flow->detected_protocol_stack[0] != NDPI_PROTOCOL_APPLE_PUSH) + ndpi_check_apple_push(ndpi_struct, flow); +} + + +void init_apple_push_dissector(struct ndpi_detection_module_struct *ndpi_struct, u_int32_t *id) +{ + ndpi_set_bitmask_protocol_detection("APPLE_PUSH", ndpi_struct, *id, + NDPI_PROTOCOL_APPLE_PUSH, + ndpi_search_apple_push, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_TCP_WITH_PAYLOAD_WITHOUT_RETRANSMISSION, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK); + *id += 1; +} + diff --git a/src/components/implementation/simple_nf/ndpi/armagetron.c b/src/components/implementation/simple_nf/ndpi/armagetron.c new file mode 100644 index 0000000000..b021862bc4 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/armagetron.c @@ -0,0 +1,109 @@ +/* + * armagetron.c + * + * Copyright (C) 2009-11 - ipoque GmbH + * Copyright (C) 2011-22 - ntop.org + * + * This file is part of nDPI, an open source deep packet inspection + * library based on the OpenDPI and PACE technology by ipoque GmbH + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_ARMAGETRON + +#include "ndpi_api.h" + + +static void ndpi_int_armagetron_add_connection(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) +{ + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_ARMAGETRON, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); +} + +static void ndpi_search_armagetron_udp(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) +{ + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + + NDPI_LOG_DBG(ndpi_struct, "search armagetron\n"); + + if (packet->payload_packet_len > 10) { + /* login request */ + if (get_u_int32_t(packet->payload, 0) == htonl(0x000b0000)) { + const u_int16_t dataLength = ntohs(get_u_int16_t(packet->payload, 4)); + if (dataLength == 0 || dataLength * 2 + 8 != packet->payload_packet_len) + goto exclude; + if (get_u_int16_t(packet->payload, 6) == htons(0x0008) + && get_u_int16_t(packet->payload, packet->payload_packet_len - 2) == 0) { + NDPI_LOG_INFO(ndpi_struct, "found armagetron\n"); + ndpi_int_armagetron_add_connection(ndpi_struct, flow); + return; + } + } + /* sync_msg */ + if (packet->payload_packet_len == 16 && get_u_int16_t(packet->payload, 0) == htons(0x001c) + && get_u_int16_t(packet->payload, 2) != 0) { + const u_int16_t dataLength = ntohs(get_u_int16_t(packet->payload, 4)); + if (dataLength != 4) + goto exclude; + if (get_u_int32_t(packet->payload, 6) == htonl(0x00000500) && get_u_int32_t(packet->payload, 6 + 4) == htonl(0x00010000) + && get_u_int16_t(packet->payload, packet->payload_packet_len - 2) == 0) { + NDPI_LOG_INFO(ndpi_struct, "found armagetron\n"); + ndpi_int_armagetron_add_connection(ndpi_struct, flow); + return; + } + } + + /* net_sync combination */ + if (packet->payload_packet_len > 50 && get_u_int16_t(packet->payload, 0) == htons(0x0018) + && get_u_int16_t(packet->payload, 2) != 0) { + u_int16_t val; + const u_int16_t dataLength = ntohs(get_u_int16_t(packet->payload, 4)); + if (dataLength == 0 || dataLength * 2 + 8 > packet->payload_packet_len) + goto exclude; + val = get_u_int16_t(packet->payload, 6 + 2); + if (val == get_u_int16_t(packet->payload, 6 + 6)) { + val = ntohs(get_u_int16_t(packet->payload, 6 + 8)); + if ((6 + 10 + val + 4) < packet->payload_packet_len + && (get_u_int32_t(packet->payload, 6 + 10 + val) == htonl(0x00010000) + || get_u_int32_t(packet->payload, 6 + 10 + val) == htonl(0x00000001)) + && get_u_int16_t(packet->payload, packet->payload_packet_len - 2) == 0) { + NDPI_LOG_INFO(ndpi_struct, "found armagetron\n"); + ndpi_int_armagetron_add_connection(ndpi_struct, flow); + return; + } + } + } + } + + exclude: + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); +} + + + +void init_armagetron_dissector(struct ndpi_detection_module_struct *ndpi_struct, u_int32_t *id) +{ + ndpi_set_bitmask_protocol_detection("Armagetron", ndpi_struct, *id, + NDPI_PROTOCOL_ARMAGETRON, + ndpi_search_armagetron_udp, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_UDP_WITH_PAYLOAD, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK); + + *id += 1; +} diff --git a/src/components/implementation/simple_nf/ndpi/avast.c b/src/components/implementation/simple_nf/ndpi/avast.c new file mode 100644 index 0000000000..e133f8cf22 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/avast.c @@ -0,0 +1,66 @@ +/* + * avast.c + * + * Copyright (C) 2012-22 - ntop.org + * + * This module is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This module is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License. + * If not, see . + * + */ + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_AVAST + +#include +#include "ndpi_api.h" + +static void ndpi_int_avast_add_connection(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) +{ + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_AVAST, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); +} + +static void ndpi_search_avast(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) +{ + struct ndpi_packet_struct * packet = &ndpi_struct->packet; + + if (packet->payload_packet_len < 6) + { + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + return; + } + + if (strncmp((char *)&packet->payload[0], "NOSA", NDPI_STATICSTRING_LEN("NOSA")) == 0 && + ntohs(*(uint16_t *)&packet->payload[4]) == packet->payload_packet_len) + { + ndpi_int_avast_add_connection(ndpi_struct, flow); + return; + } + + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); +} + +void init_avast_dissector(struct ndpi_detection_module_struct *ndpi_struct, u_int32_t *id) +{ + ndpi_set_bitmask_protocol_detection("AVAST", + ndpi_struct, *id, + NDPI_PROTOCOL_AVAST, + ndpi_search_avast, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_TCP_WITH_PAYLOAD_WITHOUT_RETRANSMISSION, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK); + + *id += 1; +} diff --git a/src/components/implementation/simple_nf/ndpi/avast_securedns.c b/src/components/implementation/simple_nf/ndpi/avast_securedns.c new file mode 100644 index 0000000000..5eb9a430f3 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/avast_securedns.c @@ -0,0 +1,67 @@ +/* + * avast_securedns.c + * + * Copyright (C) 2012-22 - ntop.org + * + * This module is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This module is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License. + * If not, see . + * + */ + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_AVAST_SECUREDNS + +#include +#include "ndpi_api.h" + +static void ndpi_int_avast_securedns_add_connection(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) +{ + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_AVAST_SECUREDNS, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); +} + +static void ndpi_search_avast_securedns(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) +{ + struct ndpi_packet_struct * packet = &ndpi_struct->packet; + + if (packet->payload_packet_len < 34 || + ntohl(get_u_int32_t(packet->payload, 11)) != 0x00013209 || + flow->packet_counter > 1) + { + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + return; + } + + if (strncasecmp((char *)&packet->payload[15], "securedns", NDPI_STATICSTRING_LEN("securedns")) == 0) + { + ndpi_int_avast_securedns_add_connection(ndpi_struct, flow); + return; + } + + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); +} + +void init_avast_securedns_dissector(struct ndpi_detection_module_struct *ndpi_struct, u_int32_t *id) +{ + ndpi_set_bitmask_protocol_detection("AVAST SecureDNS", + ndpi_struct, *id, + NDPI_PROTOCOL_AVAST_SECUREDNS, + ndpi_search_avast_securedns, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_UDP_WITH_PAYLOAD, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK); + + *id += 1; +} diff --git a/src/components/implementation/simple_nf/ndpi/bgp.c b/src/components/implementation/simple_nf/ndpi/bgp.c new file mode 100644 index 0000000000..dbc8e5fcc8 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/bgp.c @@ -0,0 +1,67 @@ +/* + * bgp.c + * + * Copyright (C) 2016-22 - ntop.org + * + * This file is part of nDPI, an open source deep packet inspection + * library based on the OpenDPI and PACE technology by ipoque GmbH + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_BGP + +#include "ndpi_api.h" + + +/* this detection also works asymmetrically */ +static void ndpi_search_bgp(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) +{ + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + u_int16_t bgp_port = htons(179); + + NDPI_LOG_DBG(ndpi_struct, "search BGP\n"); + + if(packet->tcp) { + if(packet->payload_packet_len > 18 + && packet->payload[18] < 5 + && ((packet->tcp->dest == bgp_port) || (packet->tcp->source == bgp_port)) + && (get_u_int64_t(packet->payload, 0) == 0xffffffffffffffffULL) + && (get_u_int64_t(packet->payload, 8) == 0xffffffffffffffffULL) + && (ntohs(get_u_int16_t(packet->payload, 16)) <= packet->payload_packet_len)) { + + NDPI_LOG_INFO(ndpi_struct, "found BGP\n"); + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_BGP, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); + return; + } + } + + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); +} + + +void init_bgp_dissector(struct ndpi_detection_module_struct *ndpi_struct, u_int32_t *id) +{ + ndpi_set_bitmask_protocol_detection("BGP", ndpi_struct, *id, + NDPI_PROTOCOL_BGP, + ndpi_search_bgp, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_TCP_WITH_PAYLOAD_WITHOUT_RETRANSMISSION, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK); + *id += 1; +} + diff --git a/src/components/implementation/simple_nf/ndpi/bittorrent.c b/src/components/implementation/simple_nf/ndpi/bittorrent.c new file mode 100644 index 0000000000..40268cb901 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/bittorrent.c @@ -0,0 +1,576 @@ +/* + * bittorrent.c + * + * Copyright (C) 2009-11 - ipoque GmbH + * Copyright (C) 2011-22 - ntop.org + * + * This file is part of nDPI, an open source deep packet inspection + * library based on the OpenDPI and PACE technology by ipoque GmbH + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_BITTORRENT + +#include "ndpi_api.h" + +#define BITTORRENT_PROTO_STRING "BitTorrent protocol" + +// #define BITTORRENT_CACHE_DEBUG 1 + +struct ndpi_utp_hdr { + u_int8_t h_version:4, h_type:4, next_extension; + u_int16_t connection_id; + u_int32_t ts_usec, tdiff_usec, window_size; + u_int16_t sequence_nr, ack_nr; +}; + +/* Forward declaration */ +static void ndpi_search_bittorrent(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow); +static void ndpi_search_bittorrent_hash(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow, int bt_offset); + +/* *********************************************** */ + +static int search_bittorrent_again(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) { + ndpi_search_bittorrent(ndpi_struct, flow); + ndpi_search_bittorrent_hash(ndpi_struct, flow, -1); + + /* Possibly more processing */ + return flow->extra_packets_func != NULL; +} + +/* *********************************************** */ + +static u_int8_t is_utpv1_pkt(const u_int8_t *payload, u_int payload_len) { + struct ndpi_utp_hdr *h = (struct ndpi_utp_hdr*)payload; + + if(payload_len < sizeof(struct ndpi_utp_hdr)) return(0); + if(h->h_version != 1) return(0); + if(h->h_type > 4) return(0); + if(h->next_extension > 2) return(0); + if(ntohl(h->window_size) > 65565) return(0); + + if((h->window_size == 0) && (payload_len != sizeof(struct ndpi_utp_hdr))) + return(0); + + return(1); +} + +/* *********************************************** */ + +static void ndpi_search_bittorrent_hash(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow, int bt_offset) { + const char *bt_hash = NULL; /* 20 bytes long */ + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + + if(bt_offset == -1) { + const char *bt_magic = ndpi_strnstr((const char *)packet->payload, + BITTORRENT_PROTO_STRING, packet->payload_packet_len); + + if(bt_magic) { + if(bt_magic == (const char*)&packet->payload[1]) + bt_hash = (const char*)&packet->payload[28]; + else + bt_hash = &bt_magic[19]; + } + } else + bt_hash = (const char*)&packet->payload[28]; + + if(bt_hash && (packet->payload_packet_len >= (20 + (bt_hash-(const char*)packet->payload)))) + memcpy(flow->protos.bittorrent.hash, bt_hash, 20); +} + +/* *********************************************** */ + +static void ndpi_add_connection_as_bittorrent(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow, + int bt_offset, int check_hash, + ndpi_confidence_t confidence) { + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + + if(check_hash) + ndpi_search_bittorrent_hash(ndpi_struct, flow, bt_offset); + + ndpi_set_detected_protocol_keeping_master(ndpi_struct, flow, NDPI_PROTOCOL_BITTORRENT, + confidence); + + if(flow->protos.bittorrent.hash[0] == '\0') { + /* Don't use just 1 as in TCP DNS more packets could be returned (e.g. ACK). */ + flow->max_extra_packets_to_check = 3; + flow->extra_packets_func = search_bittorrent_again; + } + + if(ndpi_struct->bittorrent_cache && packet->iph) { + u_int32_t key1, key2, i; + + key1 = ndpi_ip_port_hash_funct(flow->c_address.v4, flow->c_port), key2 = ndpi_ip_port_hash_funct(flow->s_address.v4, flow->s_port); + + ndpi_lru_add_to_cache(ndpi_struct->bittorrent_cache, key1, NDPI_PROTOCOL_BITTORRENT, ndpi_get_current_time(flow)); + ndpi_lru_add_to_cache(ndpi_struct->bittorrent_cache, key2, NDPI_PROTOCOL_BITTORRENT, ndpi_get_current_time(flow)); + + /* Now add hosts as twins */ + ndpi_lru_add_to_cache(ndpi_struct->bittorrent_cache, + flow->c_address.v4 + flow->s_address.v4, + NDPI_PROTOCOL_BITTORRENT, + ndpi_get_current_time(flow)); + + /* Also add +2 ports of the sender in order to catch additional sockets open by the same client */ + for(i=0; i<2; i++) { + key1 = ndpi_ip_port_hash_funct(flow->c_address.v4, htons(ntohs(flow->c_port)+1+i)); + + ndpi_lru_add_to_cache(ndpi_struct->bittorrent_cache, key1, NDPI_PROTOCOL_BITTORRENT, ndpi_get_current_time(flow)); + } + +#ifdef BITTORRENT_CACHE_DEBUG + printf("[BitTorrent] [%s] *** ADDED ports %u / %u [%u][%u]\n", flow->l4_proto == IPPROTO_TCP ? "TCP" : "UDP", ntohs(flow->c_port), ntohs(flow->s_port), key1, key2); +#endif + } +} + +/* ************************************* */ + +static u_int8_t ndpi_int_search_bittorrent_tcp_zero(struct ndpi_detection_module_struct + *ndpi_struct, struct ndpi_flow_struct *flow) +{ + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + u_int16_t a = 0; + + if(packet->payload_packet_len == 1 && packet->payload[0] == 0x13) { + return 0; + } + + if(flow->packet_counter == 2 && packet->payload_packet_len > 20) { + if(memcmp(&packet->payload[0], BITTORRENT_PROTO_STRING, 19) == 0) { + NDPI_LOG_INFO(ndpi_struct, "found BT: plain\n"); + ndpi_add_connection_as_bittorrent(ndpi_struct, flow, 19, 1, NDPI_CONFIDENCE_DPI); + return 1; + } + } + + if(packet->payload_packet_len > 20) { + /* test for match 0x13+BITTORRENT_PROTO_STRING */ + if(packet->payload[0] == 0x13) { + if(memcmp(&packet->payload[1], BITTORRENT_PROTO_STRING, 19) == 0) { + NDPI_LOG_INFO(ndpi_struct, "found BT: plain\n"); + ndpi_add_connection_as_bittorrent(ndpi_struct, flow, 20, 1, NDPI_CONFIDENCE_DPI); + return 1; + } + } + } + + if(packet->payload_packet_len > 23 && memcmp(packet->payload, "GET /webseed?info_hash=", 23) == 0) { + NDPI_LOG_INFO(ndpi_struct, "found BT: plain webseed\n"); + ndpi_add_connection_as_bittorrent(ndpi_struct, flow, -1, 1, NDPI_CONFIDENCE_DPI); + return 1; + } + /* seen Azureus as server for webseed, possibly other servers existing, to implement */ + /* is Server: hypertracker Bittorrent? */ + /* no asymmetric detection possible for answer of pattern "GET /data?fid=". */ + if(packet->payload_packet_len > 60 + && memcmp(packet->payload, "GET /data?fid=", 14) == 0 && memcmp(&packet->payload[54], "&size=", 6) == 0) { + NDPI_LOG_INFO(ndpi_struct, "found BT: plain Bitcomet persistent seed\n"); + ndpi_add_connection_as_bittorrent(ndpi_struct, flow, -1, 1, NDPI_CONFIDENCE_DPI); + return 1; + } + + + if(packet->payload_packet_len > 90 && (memcmp(packet->payload, "GET ", 4) == 0 + || memcmp(packet->payload, "POST ", 5) == 0)) { + const u_int8_t *ptr = &packet->payload[4]; + u_int16_t len = packet->payload_packet_len - 4; + + /* parse complete get packet here into line structure elements */ + ndpi_parse_packet_line_info(ndpi_struct, flow); + /* answer to this pattern is HTTP....Server: hypertracker */ + if(packet->user_agent_line.ptr != NULL + && ((packet->user_agent_line.len > 8 && memcmp(packet->user_agent_line.ptr, "Azureus ", 8) == 0) + || (packet->user_agent_line.len >= 10 && memcmp(packet->user_agent_line.ptr, "BitTorrent", 10) == 0) + || (packet->user_agent_line.len >= 11 && memcmp(packet->user_agent_line.ptr, "BTWebClient", 11) == 0))) { + NDPI_LOG_INFO(ndpi_struct, "found BT: Azureus /Bittorrent user agent\n"); + ndpi_add_connection_as_bittorrent(ndpi_struct, flow, -1, 1, NDPI_CONFIDENCE_DPI); + return 1; + } + + if(packet->user_agent_line.ptr != NULL + && (packet->user_agent_line.len >= 9 && memcmp(packet->user_agent_line.ptr, "Shareaza ", 9) == 0) + && (packet->parsed_lines > 8 && packet->line[8].ptr != 0 + && packet->line[8].len >= 9 && memcmp(packet->line[8].ptr, "X-Queue: ", 9) == 0)) { + NDPI_LOG_INFO(ndpi_struct, "found BT: Shareaza detected\n"); + ndpi_add_connection_as_bittorrent(ndpi_struct, flow, -1, 1, NDPI_CONFIDENCE_DPI); + return 1; + } + + /* this is a self built client, not possible to catch asymmetrically */ + if((packet->parsed_lines == 10 || (packet->parsed_lines == 11 && packet->line[10].len == 0)) + && packet->user_agent_line.ptr != NULL + && packet->user_agent_line.len > 12 + && memcmp(packet->user_agent_line.ptr, "Mozilla/4.0 ", + 12) == 0 + && packet->host_line.ptr != NULL + && packet->host_line.len >= 7 + && packet->line[2].ptr != NULL + && packet->line[2].len > 14 + && memcmp(packet->line[2].ptr, "Keep-Alive: 300", 15) == 0 + && packet->line[3].ptr != NULL + && packet->line[3].len > 21 + && memcmp(packet->line[3].ptr, "Connection: Keep-alive", 22) == 0 + && packet->line[4].ptr != NULL + && packet->line[4].len > 10 + && (memcmp(packet->line[4].ptr, "Accpet: */*", 11) == 0 + || memcmp(packet->line[4].ptr, "Accept: */*", 11) == 0) + + && packet->line[5].ptr != NULL + && packet->line[5].len > 12 + && memcmp(packet->line[5].ptr, "Range: bytes=", 13) == 0 + && packet->line[7].ptr != NULL + && packet->line[7].len > 15 + && memcmp(packet->line[7].ptr, "Pragma: no-cache", 16) == 0 + && packet->line[8].ptr != NULL + && packet->line[8].len > 22 && memcmp(packet->line[8].ptr, "Cache-Control: no-cache", 23) == 0) { + + NDPI_LOG_INFO(ndpi_struct, "found BT: Bitcomet LTS\n"); + ndpi_add_connection_as_bittorrent(ndpi_struct, flow, -1, 1, NDPI_CONFIDENCE_DPI); + return 1; + } + + /* FlashGet pattern */ + if(packet->parsed_lines == 8 + && packet->user_agent_line.ptr != NULL + && packet->user_agent_line.len > (sizeof("Mozilla/4.0 (compatible; MSIE 6.0;") - 1) + && memcmp(packet->user_agent_line.ptr, "Mozilla/4.0 (compatible; MSIE 6.0;", + sizeof("Mozilla/4.0 (compatible; MSIE 6.0;") - 1) == 0 + && packet->host_line.ptr != NULL + && packet->host_line.len >= 7 + && packet->line[2].ptr != NULL + && packet->line[2].len == 11 + && memcmp(packet->line[2].ptr, "Accept: */*", 11) == 0 + && packet->line[3].ptr != NULL && packet->line[3].len >= (sizeof("Referer: ") - 1) + && memcmp(packet->line[3].ptr, "Referer: ", sizeof("Referer: ") - 1) == 0 + && packet->line[5].ptr != NULL + && packet->line[5].len > 13 + && memcmp(packet->line[5].ptr, "Range: bytes=", 13) == 0 + && packet->line[6].ptr != NULL + && packet->line[6].len > 21 && memcmp(packet->line[6].ptr, "Connection: Keep-Alive", 22) == 0) { + + NDPI_LOG_INFO(ndpi_struct, "found BT: FlashGet\n"); + ndpi_add_connection_as_bittorrent(ndpi_struct, flow, -1, 1, NDPI_CONFIDENCE_DPI); + return 1; + } + + if(packet->parsed_lines == 7 + && packet->user_agent_line.ptr != NULL + && packet->user_agent_line.len > (sizeof("Mozilla/4.0 (compatible; MSIE 6.0;") - 1) + && memcmp(packet->user_agent_line.ptr, "Mozilla/4.0 (compatible; MSIE 6.0;", + sizeof("Mozilla/4.0 (compatible; MSIE 6.0;") - 1) == 0 + && packet->host_line.ptr != NULL + && packet->host_line.len >= 7 + && packet->line[2].ptr != NULL + && packet->line[2].len == 11 + && memcmp(packet->line[2].ptr, "Accept: */*", 11) == 0 + && packet->line[3].ptr != NULL && packet->line[3].len >= (sizeof("Referer: ") - 1) + && memcmp(packet->line[3].ptr, "Referer: ", sizeof("Referer: ") - 1) == 0 + && packet->line[5].ptr != NULL + && packet->line[5].len > 21 && memcmp(packet->line[5].ptr, "Connection: Keep-Alive", 22) == 0) { + + NDPI_LOG_INFO(ndpi_struct, "found BT: FlashGet\n"); + ndpi_add_connection_as_bittorrent(ndpi_struct, flow, -1, 1, NDPI_CONFIDENCE_DPI); + return 1; + } + + /* answer to this pattern is not possible to implement asymmetrically */ + while (1) { + if(len < 50 || ptr[0] == 0x0d) { + goto ndpi_end_bt_tracker_check; + } + if(memcmp(ptr, "info_hash=", 10) == 0) { + break; + } + len--; + ptr++; + } + + NDPI_LOG_DBG2(ndpi_struct, " BT stat: tracker info hash found\n"); + + /* len is > 50, so save operation here */ + len -= 10; + ptr += 10; + + /* parse bt hash */ + for (a = 0; a < 20; a++) { + if(len < 3) { + goto ndpi_end_bt_tracker_check; + } + if(*ptr == '%') { + u_int8_t x1 = 0xFF; + u_int8_t x2 = 0xFF; + + + if(ptr[1] >= '0' && ptr[1] <= '9') { + x1 = ptr[1] - '0'; + } + if(ptr[1] >= 'a' && ptr[1] <= 'f') { + x1 = 10 + ptr[1] - 'a'; + } + if(ptr[1] >= 'A' && ptr[1] <= 'F') { + x1 = 10 + ptr[1] - 'A'; + } + + if(ptr[2] >= '0' && ptr[2] <= '9') { + x2 = ptr[2] - '0'; + } + if(ptr[2] >= 'a' && ptr[2] <= 'f') { + x2 = 10 + ptr[2] - 'a'; + } + if(ptr[2] >= 'A' && ptr[2] <= 'F') { + x2 = 10 + ptr[2] - 'A'; + } + + if(x1 == 0xFF || x2 == 0xFF) { + goto ndpi_end_bt_tracker_check; + } + ptr += 3; + len -= 3; + } else if(*ptr >= 32 && *ptr < 127) { + ptr++; + len--; + } else { + goto ndpi_end_bt_tracker_check; + } + } + + NDPI_LOG_INFO(ndpi_struct, "found BT: tracker info hash parsed\n"); + ndpi_add_connection_as_bittorrent(ndpi_struct, flow, -1, 1, NDPI_CONFIDENCE_DPI); + return 1; + } + + ndpi_end_bt_tracker_check: + + if(packet->payload_packet_len == 80) { + /* Warez 80 Bytes Packet + * +----------------+---------------+-----------------+-----------------+ + * |20 BytesPattern | 32 Bytes Value| 12 BytesPattern | 16 Bytes Data | + * +----------------+---------------+-----------------+-----------------+ + * 20 BytesPattern : 4c 00 00 00 ff ff ff ff 57 00 00 00 00 00 00 00 20 00 00 00 + * 12 BytesPattern : 28 23 00 00 01 00 00 00 10 00 00 00 + * */ + static const char pattern_20_bytes[20] = { 0x4c, 0x00, 0x00, 0x00, 0xff, + 0xff, 0xff, 0xff, 0x57, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00 + }; + static const char pattern_12_bytes[12] = { 0x28, 0x23, 0x00, 0x00, 0x01, + 0x00, 0x00, 0x00, 0x10, 0x00, + 0x00, 0x00 + }; + + /* did not see this pattern anywhere */ + if((memcmp(&packet->payload[0], pattern_20_bytes, 20) == 0) + && (memcmp(&packet->payload[52], pattern_12_bytes, 12) == 0)) { + NDPI_LOG_INFO(ndpi_struct, "found BT: Warez - Plain\n"); + ndpi_add_connection_as_bittorrent(ndpi_struct, flow, -1, 1, NDPI_CONFIDENCE_DPI); + return 1; + } + } + + else if(packet->payload_packet_len > 50) { + if(memcmp(packet->payload, "GET", 3) == 0) { + + ndpi_parse_packet_line_info(ndpi_struct, flow); + /* haven't fount this pattern anywhere */ + if(packet->host_line.ptr != NULL + && packet->host_line.len >= 9 && memcmp(packet->host_line.ptr, "ip2p.com:", 9) == 0) { + NDPI_LOG_INFO(ndpi_struct, "found BT: Warez - Plain Host: ip2p.com: pattern\n"); + ndpi_add_connection_as_bittorrent(ndpi_struct, flow, -1, 1, NDPI_CONFIDENCE_DPI); + return 1; + } + } + } + return 0; +} + +/* ************************************* */ + +/* Search for BitTorrent commands */ +static void ndpi_int_search_bittorrent_tcp(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) +{ + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + + if(packet->payload_packet_len == 0) { + return; + } + + ndpi_int_search_bittorrent_tcp_zero(ndpi_struct, flow); +} + +/* ************************************* */ + +static u_int8_t is_port(u_int16_t a, u_int16_t b, u_int16_t what) { + return(((what == a) || (what == b)) ? 1 : 0); +} + +/* ************************************* */ + +static void ndpi_skip_bittorrent(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow, + struct ndpi_packet_struct *packet) { + if(packet->iph && ndpi_search_into_bittorrent_cache(ndpi_struct, flow, flow->c_address.v4, flow->c_port, flow->s_address.v4, flow->s_port)) + ndpi_add_connection_as_bittorrent(ndpi_struct, flow, -1, 0, NDPI_CONFIDENCE_DPI_CACHE); + else + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); +} + +/* ************************************* */ + +static void ndpi_search_bittorrent(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) { + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + char *bt_proto = NULL; + + NDPI_LOG_DBG(ndpi_struct, "Search bittorrent\n"); + + /* This is broadcast */ + if(packet->iph) { + if((packet->iph->saddr == 0xFFFFFFFF) || (packet->iph->daddr == 0xFFFFFFFF)) + goto exclude_bt; + + if(packet->udp) { + u_int16_t sport = ntohs(packet->udp->source), dport = ntohs(packet->udp->dest); + + if(is_port(sport, dport, 3544) /* teredo */ + || is_port(sport, dport, 5246) || is_port(sport, dport, 5247) /* CAPWAP */) { + exclude_bt: + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + return; + } + } + } + + if(flow->detected_protocol_stack[0] != NDPI_PROTOCOL_BITTORRENT) { + if(packet->tcp != NULL) { + ndpi_int_search_bittorrent_tcp(ndpi_struct, flow); + } else if(packet->udp != NULL) { + /* UDP */ + const char *bt_search = "BT-SEARCH * HTTP/1.1\r\n"; + const char *bt_search1 = "d1:ad2:id20:"; + + if((ntohs(packet->udp->source) < 1024) + || (ntohs(packet->udp->dest) < 1024) /* High ports only */) { + ndpi_skip_bittorrent(ndpi_struct, flow, packet); + return; + } + + /* + Check for uTP http://www.bittorrent.org/beps/bep_0029.html + + wireshark/epan/dissectors/packet-bt-utp.c + */ + + if( + (packet->payload_packet_len > 22 && strncmp((const char*)packet->payload, bt_search, strlen(bt_search)) == 0) || + (packet->payload_packet_len > 12 && strncmp((const char*)packet->payload, bt_search1, strlen(bt_search1)) == 0) + ) { + ndpi_add_connection_as_bittorrent(ndpi_struct, flow, -1, 1, NDPI_CONFIDENCE_DPI); + return; + } else if(packet->payload_packet_len >= 20) { + /* Check if this is protocol v0 */ + u_int8_t v0_extension = packet->payload[17]; + u_int8_t v0_flags = packet->payload[18]; + + if(is_utpv1_pkt(packet->payload, packet->payload_packet_len)) { + bt_proto = ndpi_strnstr((const char *)&packet->payload[20], BITTORRENT_PROTO_STRING, packet->payload_packet_len-20); + goto bittorrent_found; + } else if((packet->payload[0]== 0x60) + && (packet->payload[1]== 0x0) + && (packet->payload[2]== 0x0) + && (packet->payload[3]== 0x0) + && (packet->payload[4]== 0x0)) { + /* Heuristic */ + bt_proto = ndpi_strnstr((const char *)&packet->payload[20], BITTORRENT_PROTO_STRING, packet->payload_packet_len-20); + goto bittorrent_found; + /* CSGO/DOTA conflict */ + } else if((v0_flags < 6 /* ST_NUM_STATES */) && (v0_extension < 3 /* EXT_NUM_EXT */)) { + u_int32_t ts = ntohl(*((u_int32_t*)&(packet->payload[4]))); + u_int32_t now; + + now = (u_int32_t)(packet->current_time_ms / 1000); + + if((ts < (now+86400)) && (ts > (now-86400))) { + bt_proto = ndpi_strnstr((const char *)&packet->payload[20], BITTORRENT_PROTO_STRING, packet->payload_packet_len-20); + goto bittorrent_found; + } + } else if(ndpi_strnstr((const char *)&packet->payload[20], BITTORRENT_PROTO_STRING, packet->payload_packet_len-20) + ) { + goto bittorrent_found; + } + + } + + flow->bittorrent_stage++; + + if(flow->bittorrent_stage < 5) { + /* We have detected bittorrent but we need to wait until we get a hash */ + + if(packet->payload_packet_len > 19 /* min size */) { + if(ndpi_strnstr((const char *)packet->payload, ":target20:", packet->payload_packet_len) + || ndpi_strnstr((const char *)packet->payload, ":find_node1:", packet->payload_packet_len) + || ndpi_strnstr((const char *)packet->payload, "d1:ad2:id20:", packet->payload_packet_len) + || ndpi_strnstr((const char *)packet->payload, ":info_hash20:", packet->payload_packet_len) + || ndpi_strnstr((const char *)packet->payload, ":filter64", packet->payload_packet_len) + || ndpi_strnstr((const char *)packet->payload, "d1:rd2:id20:", packet->payload_packet_len) + || (bt_proto = ndpi_strnstr((const char *)packet->payload, BITTORRENT_PROTO_STRING, packet->payload_packet_len)) + ) { + bittorrent_found: + if(bt_proto != NULL && ((u_int8_t *)&bt_proto[27] - packet->payload + + sizeof(flow->protos.bittorrent.hash)) < packet->payload_packet_len) { + memcpy(flow->protos.bittorrent.hash, &bt_proto[27], sizeof(flow->protos.bittorrent.hash)); + flow->extra_packets_func = NULL; /* Nothing else to do */ + } + + NDPI_LOG_INFO(ndpi_struct, "found BT: plain\n"); + ndpi_add_connection_as_bittorrent(ndpi_struct, flow, -1, 0, NDPI_CONFIDENCE_DPI); + return; + } + } + + return; + } + + ndpi_skip_bittorrent(ndpi_struct, flow, packet); + } + } + + if(flow->packet_counter > 8) { + ndpi_skip_bittorrent(ndpi_struct, flow, packet); + } +} + +/* ************************************* */ + +void init_bittorrent_dissector(struct ndpi_detection_module_struct *ndpi_struct, + u_int32_t *id) +{ + ndpi_set_bitmask_protocol_detection("BitTorrent", ndpi_struct, *id, + NDPI_PROTOCOL_BITTORRENT, + ndpi_search_bittorrent, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_TCP_OR_UDP_WITH_PAYLOAD_WITHOUT_RETRANSMISSION, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK); + *id += 1; +} diff --git a/src/components/implementation/simple_nf/ndpi/bjnp.c b/src/components/implementation/simple_nf/ndpi/bjnp.c new file mode 100644 index 0000000000..66cd2fdd60 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/bjnp.c @@ -0,0 +1,57 @@ +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_BJNP + +#include "ndpi_api.h" + +static void ndpi_int_bjnp_add_connection(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow, + u_int8_t due_to_correlation) { + ndpi_set_detected_protocol(ndpi_struct, flow, + NDPI_PROTOCOL_BJNP, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); +} + + +static void ndpi_check_bjnp(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) +{ + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + u_int32_t payload_len = packet->payload_packet_len; + + if(packet->udp != NULL) { + if(payload_len > 4) { + if((memcmp((const char *)packet->payload, "BJNP", 4) == 0) + || (memcmp((const char *)packet->payload, "BNJB", 4) == 0) + || (memcmp((const char *)packet->payload, "BJNB", 4) == 0) + || (memcmp((const char *)packet->payload, "MFNP", 4) == 0) + ) { + NDPI_LOG_INFO(ndpi_struct, "found bjnp\n"); + ndpi_int_bjnp_add_connection(ndpi_struct, flow, 0); + return; + } + } + } + + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); +} + +static void ndpi_search_bjnp(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) +{ + NDPI_LOG_DBG(ndpi_struct, "search bjnp\n"); + + /* skip marked packets */ + if (flow->detected_protocol_stack[0] != NDPI_PROTOCOL_BJNP) { + ndpi_check_bjnp(ndpi_struct, flow); + } +} + + +void init_bjnp_dissector(struct ndpi_detection_module_struct *ndpi_struct, u_int32_t *id) +{ + ndpi_set_bitmask_protocol_detection("BJNP", ndpi_struct, *id, + NDPI_PROTOCOL_BJNP, + ndpi_search_bjnp, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_UDP_WITH_PAYLOAD, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK); + *id += 1; +} diff --git a/src/components/implementation/simple_nf/ndpi/bpf.h b/src/components/implementation/simple_nf/ndpi/bpf.h new file mode 100644 index 0000000000..9f4ca33e35 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/bpf.h @@ -0,0 +1,934 @@ +/*- + * Copyright (c) 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997 + * The Regents of the University of California. All rights reserved. + * + * This code is derived from the Stanford/CMU enet packet filter, + * (net/enet.c) distributed as part of 4.3BSD, and code contributed + * to Berkeley by Steven McCanne and Van Jacobson both of Lawrence + * Berkeley Laboratory. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the University of + * California, Berkeley and its contributors. + * 4. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * @(#)bpf.h 7.1 (Berkeley) 5/7/91 + * + * @(#) $Header: /tcpdump/master/libpcap/pcap/bpf.h,v 1.19.2.8 2008-09-22 20:16:01 guy Exp $ (LBL) + */ + +/* + * This is libpcap's cut-down version of bpf.h; it includes only + * the stuff needed for the code generator and the userland BPF + * interpreter, and the libpcap APIs for setting filters, etc.. + * + * "pcap-bpf.c" will include the native OS version, as it deals with + * the OS's BPF implementation. + * + * XXX - should this all just be moved to "pcap.h"? + */ + +#ifndef BPF_MAJOR_VERSION + +#ifdef __cplusplus +extern "C" { +#endif + +/* BSD style release date */ +#define BPF_RELEASE 199606 + +#ifdef MSDOS /* must be 32-bit */ +typedef long bpf_int32; +typedef unsigned long bpf_u_int32; +#else +typedef int bpf_int32; +typedef u_int bpf_u_int32; +#endif + +/* + * Alignment macros. BPF_WORDALIGN rounds up to the next + * even multiple of BPF_ALIGNMENT. + */ +#ifndef __NetBSD__ +#define BPF_ALIGNMENT sizeof(bpf_int32) +#else +#define BPF_ALIGNMENT sizeof(long) +#endif +#define BPF_WORDALIGN(x) (((x)+(BPF_ALIGNMENT-1))&~(BPF_ALIGNMENT-1)) + +#define BPF_MAXBUFSIZE 0x8000 +#define BPF_MINBUFSIZE 32 + +/* + * Structure for "pcap_compile()", "pcap_setfilter()", etc.. + */ +struct bpf_program { + u_int bf_len; + struct bpf_insn *bf_insns; +}; + +/* + * Struct return by BIOCVERSION. This represents the version number of + * the filter language described by the instruction encodings below. + * bpf understands a program iff kernel_major == filter_major && + * kernel_minor >= filter_minor, that is, if the value returned by the + * running kernel has the same major number and a minor number equal + * equal to or less than the filter being downloaded. Otherwise, the + * results are undefined, meaning an error may be returned or packets + * may be accepted haphazardly. + * It has nothing to do with the source code version. + */ +struct bpf_version { + u_short bv_major; + u_short bv_minor; +}; +/* Current version number of filter architecture. */ +#define BPF_MAJOR_VERSION 1 +#define BPF_MINOR_VERSION 1 + +/* + * Data-link level type codes. + * + * Do *NOT* add new values to this list without asking + * "tcpdump-workers@lists.tcpdump.org" for a value. Otherwise, you run + * the risk of using a value that's already being used for some other + * purpose, and of having tools that read libpcap-format captures not + * being able to handle captures with your new DLT_ value, with no hope + * that they will ever be changed to do so (as that would destroy their + * ability to read captures using that value for that other purpose). + */ + +/* + * These are the types that are the same on all platforms, and that + * have been defined by for ages. + */ +#define DLT_NULL 0 /* BSD loopback encapsulation */ +#define DLT_EN10MB 1 /* Ethernet (10Mb) */ +#define DLT_EN3MB 2 /* Experimental Ethernet (3Mb) */ +#define DLT_AX25 3 /* Amateur Radio AX.25 */ +#define DLT_PRONET 4 /* Proteon ProNET Token Ring */ +#define DLT_CHAOS 5 /* Chaos */ +#define DLT_IEEE802 6 /* 802.5 Token Ring */ +#define DLT_ARCNET 7 /* ARCNET, with BSD-style header */ +#define DLT_SLIP 8 /* Serial Line IP */ +#define DLT_PPP 9 /* Point-to-point Protocol */ +#define DLT_FDDI 10 /* FDDI */ + +/* + * These are types that are different on some platforms, and that + * have been defined by for ages. We use #ifdefs to + * detect the BSDs that define them differently from the traditional + * libpcap + * + * XXX - DLT_ATM_RFC1483 is 13 in BSD/OS, and DLT_RAW is 14 in BSD/OS, + * but I don't know what the right #define is for BSD/OS. + */ +#define DLT_ATM_RFC1483 11 /* LLC-encapsulated ATM */ + +#ifdef __OpenBSD__ +#define DLT_RAW 14 /* raw IP */ +#else +#define DLT_RAW 12 /* raw IP */ +#endif + +/* + * Given that the only OS that currently generates BSD/OS SLIP or PPP + * is, well, BSD/OS, arguably everybody should have chosen its values + * for DLT_SLIP_BSDOS and DLT_PPP_BSDOS, which are 15 and 16, but they + * didn't. So it goes. + */ +#if defined(__NetBSD__) || defined(__FreeBSD__) +#ifndef DLT_SLIP_BSDOS +#define DLT_SLIP_BSDOS 13 /* BSD/OS Serial Line IP */ +#define DLT_PPP_BSDOS 14 /* BSD/OS Point-to-point Protocol */ +#endif +#else +#define DLT_SLIP_BSDOS 15 /* BSD/OS Serial Line IP */ +#define DLT_PPP_BSDOS 16 /* BSD/OS Point-to-point Protocol */ +#endif + +/* + * 17 is used for DLT_OLD_PFLOG in OpenBSD; + * OBSOLETE: DLT_PFLOG is 117 in OpenBSD now as well. See below. + * 18 is used for DLT_PFSYNC in OpenBSD; don't use it for anything else. + */ + +#define DLT_ATM_CLIP 19 /* Linux Classical-IP over ATM */ + +/* + * Apparently Redback uses this for its SmartEdge 400/800. I hope + * nobody else decided to use it, too. + */ +#define DLT_REDBACK_SMARTEDGE 32 + +/* + * These values are defined by NetBSD; other platforms should refrain from + * using them for other purposes, so that NetBSD savefiles with link + * types of 50 or 51 can be read as this type on all platforms. + */ +#define DLT_PPP_SERIAL 50 /* PPP over serial with HDLC encapsulation */ +#define DLT_PPP_ETHER 51 /* PPP over Ethernet */ + +/* + * The Axent Raptor firewall - now the Symantec Enterprise Firewall - uses + * a link-layer type of 99 for the tcpdump it supplies. The link-layer + * header has 6 bytes of unknown data, something that appears to be an + * Ethernet type, and 36 bytes that appear to be 0 in at least one capture + * I've seen. + */ +#define DLT_SYMANTEC_FIREWALL 99 + +/* + * Values between 100 and 103 are used in capture file headers as + * link-layer types corresponding to DLT_ types that differ + * between platforms; don't use those values for new DLT_ new types. + */ + +/* + * This value was defined by libpcap 0.5; platforms that have defined + * it with a different value should define it here with that value - + * a link type of 104 in a save file will be mapped to DLT_C_HDLC, + * whatever value that happens to be, so programs will correctly + * handle files with that link type regardless of the value of + * DLT_C_HDLC. + * + * The name DLT_C_HDLC was used by BSD/OS; we use that name for source + * compatibility with programs written for BSD/OS. + * + * libpcap 0.5 defined it as DLT_CHDLC; we define DLT_CHDLC as well, + * for source compatibility with programs written for libpcap 0.5. + */ +#define DLT_C_HDLC 104 /* Cisco HDLC */ +#define DLT_CHDLC DLT_C_HDLC + +#define DLT_IEEE802_11 105 /* IEEE 802.11 wireless */ + +/* + * 106 is reserved for Linux Classical IP over ATM; it's like DLT_RAW, + * except when it isn't. (I.e., sometimes it's just raw IP, and + * sometimes it isn't.) We currently handle it as DLT_LINUX_SLL, + * so that we don't have to worry about the link-layer header.) + */ + +/* + * Frame Relay; BSD/OS has a DLT_FR with a value of 11, but that collides + * with other values. + * DLT_FR and DLT_FRELAY packets start with the Q.922 Frame Relay header + * (DLCI, etc.). + */ +#define DLT_FRELAY 107 + +/* + * OpenBSD DLT_LOOP, for loopback devices; it's like DLT_NULL, except + * that the AF_ type in the link-layer header is in network byte order. + * + * DLT_LOOP is 12 in OpenBSD, but that's DLT_RAW in other OSes, so + * we don't use 12 for it in OSes other than OpenBSD. + */ +#ifdef __OpenBSD__ +#define DLT_LOOP 12 +#else +#define DLT_LOOP 108 +#endif + +/* + * Encapsulated packets for IPsec; DLT_ENC is 13 in OpenBSD, but that's + * DLT_SLIP_BSDOS in NetBSD, so we don't use 13 for it in OSes other + * than OpenBSD. + */ +#ifdef __OpenBSD__ +#define DLT_ENC 13 +#else +#define DLT_ENC 109 +#endif + +/* + * Values between 110 and 112 are reserved for use in capture file headers + * as link-layer types corresponding to DLT_ types that might differ + * between platforms; don't use those values for new DLT_ types + * other than the corresponding DLT_ types. + */ + +/* + * This is for Linux cooked sockets. + */ +#define DLT_LINUX_SLL 113 + +/* + * Apple LocalTalk hardware. + */ +#define DLT_LTALK 114 + +/* + * Acorn Econet. + */ +#define DLT_ECONET 115 + +/* + * Reserved for use with OpenBSD ipfilter. + */ +#define DLT_IPFILTER 116 + +/* + * OpenBSD DLT_PFLOG; DLT_PFLOG is 17 in OpenBSD, but that's DLT_LANE8023 + * in SuSE 6.3, so we can't use 17 for it in capture-file headers. + * + * XXX: is there a conflict with DLT_PFSYNC 18 as well? + */ +#ifdef __OpenBSD__ +#define DLT_OLD_PFLOG 17 +#define DLT_PFSYNC 18 +#endif +#define DLT_PFLOG 117 + +/* + * Registered for Cisco-internal use. + */ +#define DLT_CISCO_IOS 118 + +/* + * For 802.11 cards using the Prism II chips, with a link-layer + * header including Prism monitor mode information plus an 802.11 + * header. + */ +#define DLT_PRISM_HEADER 119 + +/* + * Reserved for Aironet 802.11 cards, with an Aironet link-layer header + * (see Doug Ambrisko's FreeBSD patches). + */ +#define DLT_AIRONET_HEADER 120 + +/* + * Reserved for Siemens HiPath HDLC. + */ +#define DLT_HHDLC 121 + +/* + * This is for RFC 2625 IP-over-Fibre Channel. + * + * This is not for use with raw Fibre Channel, where the link-layer + * header starts with a Fibre Channel frame header; it's for IP-over-FC, + * where the link-layer header starts with an RFC 2625 Network_Header + * field. + */ +#define DLT_IP_OVER_FC 122 + +/* + * This is for Full Frontal ATM on Solaris with SunATM, with a + * pseudo-header followed by an AALn PDU. + * + * There may be other forms of Full Frontal ATM on other OSes, + * with different pseudo-headers. + * + * If ATM software returns a pseudo-header with VPI/VCI information + * (and, ideally, packet type information, e.g. signalling, ILMI, + * LANE, LLC-multiplexed traffic, etc.), it should not use + * DLT_ATM_RFC1483, but should get a new DLT_ value, so tcpdump + * and the like don't have to infer the presence or absence of a + * pseudo-header and the form of the pseudo-header. + */ +#define DLT_SUNATM 123 /* Solaris+SunATM */ + +/* + * Reserved as per request from Kent Dahlgren + * for private use. + */ +#define DLT_RIO 124 /* RapidIO */ +#define DLT_PCI_EXP 125 /* PCI Express */ +#define DLT_AURORA 126 /* Xilinx Aurora link layer */ + +/* + * Header for 802.11 plus a number of bits of link-layer information + * including radio information, used by some recent BSD drivers as + * well as the madwifi Atheros driver for Linux. + */ +#define DLT_IEEE802_11_RADIO 127 /* 802.11 plus radiotap radio header */ + +/* + * Reserved for the TZSP encapsulation, as per request from + * Chris Waters + * TZSP is a generic encapsulation for any other link type, + * which includes a means to include meta-information + * with the packet, e.g. signal strength and channel + * for 802.11 packets. + */ +#define DLT_TZSP 128 /* Tazmen Sniffer Protocol */ + +/* + * BSD's ARCNET headers have the source host, destination host, + * and type at the beginning of the packet; that's what's handed + * up to userland via BPF. + * + * Linux's ARCNET headers, however, have a 2-byte offset field + * between the host IDs and the type; that's what's handed up + * to userland via PF_PACKET sockets. + * + * We therefore have to have separate DLT_ values for them. + */ +#define DLT_ARCNET_LINUX 129 /* ARCNET */ + +/* + * Juniper-private data link types, as per request from + * Hannes Gredler . The DLT_s are used + * for passing on chassis-internal metainformation such as + * QOS profiles, etc.. + */ +#define DLT_JUNIPER_MLPPP 130 +#define DLT_JUNIPER_MLFR 131 +#define DLT_JUNIPER_ES 132 +#define DLT_JUNIPER_GGSN 133 +#define DLT_JUNIPER_MFR 134 +#define DLT_JUNIPER_ATM2 135 +#define DLT_JUNIPER_SERVICES 136 +#define DLT_JUNIPER_ATM1 137 + +/* + * Apple IP-over-IEEE 1394, as per a request from Dieter Siegmund + * . The header that's presented is an Ethernet-like + * header: + * + * #define FIREWIRE_EUI64_LEN 8 + * struct firewire_header { + * u_char firewire_dhost[FIREWIRE_EUI64_LEN]; + * u_char firewire_shost[FIREWIRE_EUI64_LEN]; + * u_short firewire_type; + * }; + * + * with "firewire_type" being an Ethernet type value, rather than, + * for example, raw GASP frames being handed up. + */ +#define DLT_APPLE_IP_OVER_IEEE1394 138 + +/* + * Various SS7 encapsulations, as per a request from Jeff Morriss + * and subsequent discussions. + */ +#define DLT_MTP2_WITH_PHDR 139 /* pseudo-header with various info, followed by MTP2 */ +#define DLT_MTP2 140 /* MTP2, without pseudo-header */ +#define DLT_MTP3 141 /* MTP3, without pseudo-header or MTP2 */ +#define DLT_SCCP 142 /* SCCP, without pseudo-header or MTP2 or MTP3 */ + +/* + * DOCSIS MAC frames. + */ +#define DLT_DOCSIS 143 + +/* + * Linux-IrDA packets. Protocol defined at http://www.irda.org. + * Those packets include IrLAP headers and above (IrLMP...), but + * don't include Phy framing (SOF/EOF/CRC & byte stuffing), because Phy + * framing can be handled by the hardware and depend on the bitrate. + * This is exactly the format you would get capturing on a Linux-IrDA + * interface (irdaX), but not on a raw serial port. + * Note the capture is done in "Linux-cooked" mode, so each packet include + * a fake packet header (struct sll_header). This is because IrDA packet + * decoding is dependant on the direction of the packet (incomming or + * outgoing). + * When/if other platform implement IrDA capture, we may revisit the + * issue and define a real DLT_IRDA... + * Jean II + */ +#define DLT_LINUX_IRDA 144 + +/* + * Reserved for IBM SP switch and IBM Next Federation switch. + */ +#define DLT_IBM_SP 145 +#define DLT_IBM_SN 146 + +/* + * Reserved for private use. If you have some link-layer header type + * that you want to use within your organization, with the capture files + * using that link-layer header type not ever be sent outside your + * organization, you can use these values. + * + * No libpcap release will use these for any purpose, nor will any + * tcpdump release use them, either. + * + * Do *NOT* use these in capture files that you expect anybody not using + * your private versions of capture-file-reading tools to read; in + * particular, do *NOT* use them in products, otherwise you may find that + * people won't be able to use tcpdump, or snort, or Ethereal, or... to + * read capture files from your firewall/intrusion detection/traffic + * monitoring/etc. appliance, or whatever product uses that DLT_ value, + * and you may also find that the developers of those applications will + * not accept patches to let them read those files. + * + * Also, do not use them if somebody might send you a capture using them + * for *their* private type and tools using them for *your* private type + * would have to read them. + * + * Instead, ask "tcpdump-workers@lists.tcpdump.org" for a new DLT_ value, + * as per the comment above, and use the type you're given. + */ +#define DLT_USER0 147 +#define DLT_USER1 148 +#define DLT_USER2 149 +#define DLT_USER3 150 +#define DLT_USER4 151 +#define DLT_USER5 152 +#define DLT_USER6 153 +#define DLT_USER7 154 +#define DLT_USER8 155 +#define DLT_USER9 156 +#define DLT_USER10 157 +#define DLT_USER11 158 +#define DLT_USER12 159 +#define DLT_USER13 160 +#define DLT_USER14 161 +#define DLT_USER15 162 + +/* + * For future use with 802.11 captures - defined by AbsoluteValue + * Systems to store a number of bits of link-layer information + * including radio information: + * + * http://www.shaftnet.org/~pizza/software/capturefrm.txt + * + * but it might be used by some non-AVS drivers now or in the + * future. + */ +#define DLT_IEEE802_11_RADIO_AVS 163 /* 802.11 plus AVS radio header */ + +/* + * Juniper-private data link type, as per request from + * Hannes Gredler . The DLT_s are used + * for passing on chassis-internal metainformation such as + * QOS profiles, etc.. + */ +#define DLT_JUNIPER_MONITOR 164 + +/* + * Reserved for BACnet MS/TP. + */ +#define DLT_BACNET_MS_TP 165 + +/* + * Another PPP variant as per request from Karsten Keil . + * + * This is used in some OSes to allow a kernel socket filter to distinguish + * between incoming and outgoing packets, on a socket intended to + * supply pppd with outgoing packets so it can do dial-on-demand and + * hangup-on-lack-of-demand; incoming packets are filtered out so they + * don't cause pppd to hold the connection up (you don't want random + * input packets such as port scans, packets from old lost connections, + * etc. to force the connection to stay up). + * + * The first byte of the PPP header (0xff03) is modified to accomodate + * the direction - 0x00 = IN, 0x01 = OUT. + */ +#define DLT_PPP_PPPD 166 + +/* + * Names for backwards compatibility with older versions of some PPP + * software; new software should use DLT_PPP_PPPD. + */ +#define DLT_PPP_WITH_DIRECTION DLT_PPP_PPPD +#define DLT_LINUX_PPP_WITHDIRECTION DLT_PPP_PPPD + +/* + * Juniper-private data link type, as per request from + * Hannes Gredler . The DLT_s are used + * for passing on chassis-internal metainformation such as + * QOS profiles, cookies, etc.. + */ +#define DLT_JUNIPER_PPPOE 167 +#define DLT_JUNIPER_PPPOE_ATM 168 + +#define DLT_GPRS_LLC 169 /* GPRS LLC */ +#define DLT_GPF_T 170 /* GPF-T (ITU-T G.7041/Y.1303) */ +#define DLT_GPF_F 171 /* GPF-F (ITU-T G.7041/Y.1303) */ + +/* + * Requested by Oolan Zimmer for use in Gcom's T1/E1 line + * monitoring equipment. + */ +#define DLT_GCOM_T1E1 172 +#define DLT_GCOM_SERIAL 173 + +/* + * Juniper-private data link type, as per request from + * Hannes Gredler . The DLT_ is used + * for internal communication to Physical Interface Cards (PIC) + */ +#define DLT_JUNIPER_PIC_PEER 174 + +/* + * Link types requested by Gregor Maier of Endace + * Measurement Systems. They add an ERF header (see + * http://www.endace.com/support/EndaceRecordFormat.pdf) in front of + * the link-layer header. + */ +#define DLT_ERF_ETH 175 /* Ethernet */ +#define DLT_ERF_POS 176 /* Packet-over-SONET */ + +/* + * Requested by Daniele Orlandi for raw LAPD + * for vISDN (http://www.orlandi.com/visdn/). Its link-layer header + * includes additional information before the LAPD header, so it's + * not necessarily a generic LAPD header. + */ +#define DLT_LINUX_LAPD 177 + +/* + * Juniper-private data link type, as per request from + * Hannes Gredler . + * The DLT_ are used for prepending meta-information + * like interface index, interface name + * before standard Ethernet, PPP, Frelay & C-HDLC Frames + */ +#define DLT_JUNIPER_ETHER 178 +#define DLT_JUNIPER_PPP 179 +#define DLT_JUNIPER_FRELAY 180 +#define DLT_JUNIPER_CHDLC 181 + +/* + * Multi Link Frame Relay (FRF.16) + */ +#define DLT_MFR 182 + +/* + * Juniper-private data link type, as per request from + * Hannes Gredler . + * The DLT_ is used for internal communication with a + * voice Adapter Card (PIC) + */ +#define DLT_JUNIPER_VP 183 + +/* + * Arinc 429 frames. + * DLT_ requested by Gianluca Varenni . + * Every frame contains a 32bit A429 label. + * More documentation on Arinc 429 can be found at + * http://www.condoreng.com/support/downloads/tutorials/ARINCTutorial.pdf + */ +#define DLT_A429 184 + +/* + * Arinc 653 Interpartition Communication messages. + * DLT_ requested by Gianluca Varenni . + * Please refer to the A653-1 standard for more information. + */ +#define DLT_A653_ICM 185 + +/* + * USB packets, beginning with a USB setup header; requested by + * Paolo Abeni . + */ +#define DLT_USB 186 + +/* + * Bluetooth HCI UART transport layer (part H:4); requested by + * Paolo Abeni. + */ +#define DLT_BLUETOOTH_HCI_H4 187 + +/* + * IEEE 802.16 MAC Common Part Sublayer; requested by Maria Cruz + * . + */ +#define DLT_IEEE802_16_MAC_CPS 188 + +/* + * USB packets, beginning with a Linux USB header; requested by + * Paolo Abeni . + */ +#define DLT_USB_LINUX 189 + +/* + * Controller Area Network (CAN) v. 2.0B packets. + * DLT_ requested by Gianluca Varenni . + * Used to dump CAN packets coming from a CAN Vector board. + * More documentation on the CAN v2.0B frames can be found at + * http://www.can-cia.org/downloads/?269 + */ +#define DLT_CAN20B 190 + +/* + * IEEE 802.15.4, with address fields padded, as is done by Linux + * drivers; requested by Juergen Schimmer. + */ +#define DLT_IEEE802_15_4_LINUX 191 + +/* + * Per Packet Information encapsulated packets. + * DLT_ requested by Gianluca Varenni . + */ +#define DLT_PPI 192 + +/* + * Header for 802.16 MAC Common Part Sublayer plus a radiotap radio header; + * requested by Charles Clancy. + */ +#define DLT_IEEE802_16_MAC_CPS_RADIO 193 + +/* + * Juniper-private data link type, as per request from + * Hannes Gredler . + * The DLT_ is used for internal communication with a + * integrated service module (ISM). + */ +#define DLT_JUNIPER_ISM 194 + +/* + * IEEE 802.15.4, exactly as it appears in the spec (no padding, no + * nothing); requested by Mikko Saarnivala . + */ +#define DLT_IEEE802_15_4 195 + +/* + * Various link-layer types, with a pseudo-header, for SITA + * (http://www.sita.aero/); requested by Fulko Hew (fulko.hew@gmail.com). + */ +#define DLT_SITA 196 + +/* + * Various link-layer types, with a pseudo-header, for Endace DAG cards; + * encapsulates Endace ERF records. Requested by Stephen Donnelly + * . + */ +#define DLT_ERF 197 + +/* + * Special header prepended to Ethernet packets when capturing from a + * u10 Networks board. Requested by Phil Mulholland + * . + */ +#define DLT_RAIF1 198 + +/* + * IPMB packet for IPMI, beginning with the I2C slave address, followed + * by the netFn and LUN, etc.. Requested by Chanthy Toeung + * . + */ +#define DLT_IPMB 199 + +/* + * Juniper-private data link type, as per request from + * Hannes Gredler . + * The DLT_ is used for capturing data on a secure tunnel interface. + */ +#define DLT_JUNIPER_ST 200 + +/* + * Bluetooth HCI UART transport layer (part H:4), with pseudo-header + * that includes direction information; requested by Paolo Abeni. + */ +#define DLT_BLUETOOTH_HCI_H4_WITH_PHDR 201 + +/* + * AX.25 packet with a 1-byte KISS header; see + * + * http://www.ax25.net/kiss.htm + * + * as per Richard Stearn . + */ +#define DLT_AX25_KISS 202 + +/* + * LAPD packets from an ISDN channel, starting with the address field, + * with no pseudo-header. + * Requested by Varuna De Silva . + */ +#define DLT_LAPD 203 + +/* + * Variants of various link-layer headers, with a one-byte direction + * pseudo-header prepended - zero means "received by this host", + * non-zero (any non-zero value) means "sent by this host" - as per + * Will Barker . + */ +#define DLT_PPP_WITH_DIR 204 /* PPP - don't confuse with DLT_PPP_WITH_DIRECTION */ +#define DLT_C_HDLC_WITH_DIR 205 /* Cisco HDLC */ +#define DLT_FRELAY_WITH_DIR 206 /* Frame Relay */ +#define DLT_LAPB_WITH_DIR 207 /* LAPB */ + +/* + * 208 is reserved for an as-yet-unspecified proprietary link-layer + * type, as requested by Will Barker. + */ + +/* + * IPMB with a Linux-specific pseudo-header; as requested by Alexey Neyman + * . + */ +#define DLT_IPMB_LINUX 209 + +/* + * FlexRay automotive bus - http://www.flexray.com/ - as requested + * by Hannes Kaelber . + */ +#define DLT_FLEXRAY 210 + +/* + * Media Oriented Systems Transport (MOST) bus for multimedia + * transport - http://www.mostcooperation.com/ - as requested + * by Hannes Kaelber . + */ +#define DLT_MOST 211 + +/* + * Local Interconnect Network (LIN) bus for vehicle networks - + * http://www.lin-subbus.org/ - as requested by Hannes Kaelber + * . + */ +#define DLT_LIN 212 + +/* + * X2E-private data link type used for serial line capture, + * as requested by Hannes Kaelber . + */ +#define DLT_X2E_SERIAL 213 + +/* + * X2E-private data link type used for the Xoraya data logger + * family, as requested by Hannes Kaelber . + */ +#define DLT_X2E_XORAYA 214 + +/* + * IEEE 802.15.4, exactly as it appears in the spec (no padding, no + * nothing), but with the PHY-level data for non-ASK PHYs (4 octets + * of 0 as preamble, one octet of SFD, one octet of frame length+ + * reserved bit, and then the MAC-layer data, starting with the + * frame control field). + * + * Requested by Max Filippov . + */ +#define DLT_IEEE802_15_4_NONASK_PHY 215 + + +/* + * DLT and savefile link type values are split into a class and + * a member of that class. A class value of 0 indicates a regular + * DLT_/LINKTYPE_ value. + */ +#define DLT_CLASS(x) ((x) & 0x03ff0000) + +/* + * NetBSD-specific generic "raw" link type. The class value indicates + * that this is the generic raw type, and the lower 16 bits are the + * address family we're dealing with. Those values are NetBSD-specific; + * do not assume that they correspond to AF_ values for your operating + * system. + */ +#define DLT_CLASS_NETBSD_RAWAF 0x02240000 +#define DLT_NETBSD_RAWAF(af) (DLT_CLASS_NETBSD_RAWAF | (af)) +#define DLT_NETBSD_RAWAF_AF(x) ((x) & 0x0000ffff) +#define DLT_IS_NETBSD_RAWAF(x) (DLT_CLASS(x) == DLT_CLASS_NETBSD_RAWAF) + + +/* + * The instruction encodings. + */ +/* instruction classes */ +#define BPF_CLASS(code) ((code) & 0x07) +#define BPF_LD 0x00 +#define BPF_LDX 0x01 +#define BPF_ST 0x02 +#define BPF_STX 0x03 +#define BPF_ALU 0x04 +#define BPF_JMP 0x05 +#define BPF_RET 0x06 +#define BPF_MISC 0x07 + +/* ld/ldx fields */ +#define BPF_SIZE(code) ((code) & 0x18) +#define BPF_W 0x00 +#define BPF_H 0x08 +#define BPF_B 0x10 +#define BPF_MODE(code) ((code) & 0xe0) +#define BPF_IMM 0x00 +#define BPF_ABS 0x20 +#define BPF_IND 0x40 +#define BPF_MEM 0x60 +#define BPF_LEN 0x80 +#define BPF_MSH 0xa0 + +/* alu/jmp fields */ +#define BPF_OP(code) ((code) & 0xf0) +#define BPF_ADD 0x00 +#define BPF_SUB 0x10 +#define BPF_MUL 0x20 +#define BPF_DIV 0x30 +#define BPF_OR 0x40 +#define BPF_AND 0x50 +#define BPF_LSH 0x60 +#define BPF_RSH 0x70 +#define BPF_NEG 0x80 +#define BPF_JA 0x00 +#define BPF_JEQ 0x10 +#define BPF_JGT 0x20 +#define BPF_JGE 0x30 +#define BPF_JSET 0x40 +#define BPF_SRC(code) ((code) & 0x08) +#define BPF_K 0x00 +#define BPF_X 0x08 + +/* ret - BPF_K and BPF_X also apply */ +#define BPF_RVAL(code) ((code) & 0x18) +#define BPF_A 0x10 + +/* misc */ +#define BPF_MISCOP(code) ((code) & 0xf8) +#define BPF_TAX 0x00 +#define BPF_TXA 0x80 + +/* + * The instruction data structure. + */ +struct bpf_insn { + u_short code; + u_char jt; + u_char jf; + bpf_u_int32 k; +}; + +/* + * Macros for insn array initializers. + */ +#define BPF_STMT(code, k) { (u_short)(code), 0, 0, k } +#define BPF_JUMP(code, k, jt, jf) { (u_short)(code), jt, jf, k } + +#if __STDC__ || defined(__cplusplus) +extern int bpf_validate(const struct bpf_insn *, int); +extern u_int bpf_filter(const struct bpf_insn *, const u_char *, u_int, u_int); +#else +extern int bpf_validate(); +extern u_int bpf_filter(); +#endif + +/* + * Number of scratch memory words (for BPF_LD|BPF_MEM and BPF_ST). + */ +#define BPF_MEMWORDS 16 + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/src/components/implementation/simple_nf/ndpi/btlib.c b/src/components/implementation/simple_nf/ndpi/btlib.c new file mode 100644 index 0000000000..7223167e83 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/btlib.c @@ -0,0 +1,472 @@ +/* + * btlib.c + * + * Copyright (C) 2011-22 - ntop.org + * Contributed by Vitaly Lavrov + * + * This file is part of nDPI, an open source deep packet inspection + * library based on the OpenDPI and PACE technology by ipoque GmbH + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +#include "ndpi_api.h" +#if 0 +#ifndef NDPI_NO_STD_INC +#include +#include +#include +#include +#include +#include + +/* +typedef unsigned char u_int8_t; +typedef unsigned short int u_int16_t; +typedef unsigned long long int u_int64_t; +*/ + +#include +#include +#ifndef WIN32 +#include +#endif +#endif +#endif + +#include "btlib.h" + +int bt_parse_debug = 0; + +#if 0 +void dump_bt_proto_struct(struct bt_parse_protocol *p) { + char b20h[128]; + int i; + + if(p->y_e && p->e_msg) { + printf("Error %s/%u\n", p->e_msg, p->e_len); + } + if(p->y_q) { + printf("Query "); + if(p->q_ping) printf("ping\n"); + if(p->q_g_peers) printf("get_peers\n"); + if(p->q_f_node) printf("find_node\n"); + if(p->q_a_peer) printf("announce_peer\n"); + } + if(p->y_r) + printf("Reply\n"); + + if(p->t) printf("\tt\t%llx\n",p->t); + if(p->v) printf("\tv\t%llx\n",p->v); + if(p->ip) printf("\tIP\t%s\n",print_ip_p(b20h,p->ip,0)); + + if(p->a.port) printf("\tport\t%d\n",htons(p->a.port)); + if(p->a.id) printf("\tID\t%s\n",print20b(b20h,p->a.id)); + if(p->a.target) printf("\ttarget\t%s\n",print20b(b20h,p->a.target)); + if(p->a.token) printf("\ttoken\t%s\n",printXb(b20h,p->a.token,p->a.t_len)); + if(p->a.info_hash) printf("\ti_hash\t%s\n",print20b(b20h,p->a.info_hash)); + if(p->a.name && p->a.name_len) printf("\tname\t%.*s\n",p->a.name_len,p->a.name); + + if(p->r.ip) printf("\tip\t%s\n",print_ip_p(b20h,p->r.ip,1)); + if(p->r.port) printf("\tport\t%d\n",htons(p->r.port)); + if(p->r.id) printf("\tID\t%s\n",print20b(b20h,p->r.id)); + if(p->r.token) printf("\ttoken\t%s\n",printXb(b20h,p->r.token,p->r.t_len)); + if(p->r.name && p->r.name_len) printf("\tname\t%.*s\n",p->r.name_len,p->r.name); + if(p->r.values && p->r.nv) { + struct bt_ipv4p2 *n = (struct bt_ipv4p2 *)p->r.values; + for(i=0;i < p->r.nv; i++,n++) { + printf("\tvalues\t%s\n", print_ip_p(b20h,&n->d,0)); + } + } + if(p->r.values6 && p->r.nv6) { + struct bt_ipv6p2 *n = (struct bt_ipv6p2 *)p->r.values6; + for(i=0;i < p->r.nv6; i++,n++) { + printf("\tvalues6\t%s\n", print_ip6_p(b20h,&n->d,0)); + } + } + if(p->r.nodes && p->r.nn) { + for(i=0;i < p->r.nn; i++) { + printf("\tnodes\t%s\n",print_id_ip_p(b20h,p->r.nodes+i)); + } + } + if(p->r.nodes6 && p->r.nn6) { + for(i=0;i < p->r.nn6; i++) { + printf("\tnodes6\t%s\n",print_id_ip6_p(b20h,p->r.nodes6+i)); + } + } + + if(p->peers && p->n_peers) { + for(i=0;i < p->n_peers; i++) { + printf("\tpeers\t%s\n",print_ip_p(b20h,p->peers+i,0)); + } + } + + if(p->interval) printf("\tinterval\t%d\n",p->interval); + if(p->min_interval) printf("\tmin interval\t%d\n",p->min_interval); +} +#endif + +#ifdef BTLIB_DEBUG +static void _print_safe_str(char *msg,char *k,const u_int8_t *s,size_t l) { + static const char *th="0123456789abcdef?"; + char *buf = (char*)ndpi_malloc((size_t)(l*3+2)); + + int sl = l; + if(buf) { + char *b = buf; + for(;l > 0; s++,l--) { + if(*s < ' ' || *s >= 127) { + *b++ = '%'; + *b++ = th[(*s >> 4)&0xf]; + *b++ = th[(*s)&0xf]; + } else *b++ = *s; + } + *b = 0; + + printf("%s %s %s len %d\n",msg,k,buf ? buf:"",sl); + + ndpi_free(buf); + } +} + +static void print_safe_str(char *msg,bt_parse_data_cb_t *cbd) { + _print_safe_str(msg,cbd->buf,cbd->v.s.s,cbd->v.s.l); +} +#define DEBUG_TRACE(cmd) { if(bt_parse_debug) cmd; } + +#else +#define DEBUG_TRACE(cmd) ; +#endif + + +#define STREQ(a,b) !strcmp(a,b) + + +void cb_data(bt_parse_data_cb_t *cbd,int *ret) { + struct bt_parse_protocol *p = &(cbd->p); + const u_int8_t *s; + const char *ss; + + if(cbd->t == 0) return; + + if(cbd->t == 1) { + DEBUG_TRACE(printf("%s %lld\n",cbd->buf, (long long)cbd->v.i)); + + if(STREQ(cbd->buf,"a.port")) { + p->a.port = (u_int16_t)(cbd->v.i & 0xffff); + return; + } + if( + STREQ(cbd->buf,"a.implied_port") || + STREQ(cbd->buf,"a.noseed") || + STREQ(cbd->buf,"a.scrape") || + STREQ(cbd->buf,"a.seed") || + STREQ(cbd->buf,"a.vote") + ) { + return; + } + if(STREQ(cbd->buf,"r.port") || STREQ(cbd->buf,"r.p")) { + p->r.port = (u_int16_t)(cbd->v.i & 0xffff); + return; + } + if(STREQ(cbd->buf,"interval")) { + p->interval = (u_int16_t)(cbd->v.i & 0x7fffffff); + p->h_int = 1; + return; + } + if(STREQ(cbd->buf,"min interval")) { + p->min_interval = (u_int16_t)(cbd->v.i & 0x7fffffff); + p->h_mint = 1; + return; + } + DEBUG_TRACE(printf("UNKNOWN %s %lld\n",cbd->buf, (long long)cbd->v.i)); + return; + } + if(cbd->t != 2) { + DEBUG_TRACE(printf("BUG! t=%d %s\n",cbd->t,cbd->buf)); + return; + } + DEBUG_TRACE(print_safe_str("",cbd)); + + s = cbd->v.s.s; + ss = (char *)s; + + if(STREQ(cbd->buf,"a.id")) { + p->a.id = s; + return; + } + if(STREQ(cbd->buf,"a.info_hash")) { + p->a.info_hash = s; + return; + } + if(STREQ(cbd->buf,"a.target")) { + p->a.target = s; + return; + } + if(STREQ(cbd->buf,"a.token")) { + p->a.token = s; + p->a.t_len = cbd->v.s.l; + return; + } + if(STREQ(cbd->buf,"a.name")) { + p->a.name = s; + p->a.name_len = cbd->v.s.l; + return; + } + if(STREQ(cbd->buf,"a.want")) { + return; + } + + if(STREQ(cbd->buf,"r.id")) { + p->r.id = s; + return; + } + if(STREQ(cbd->buf,"r.ip")) { + if(cbd->v.s.l != 4) { + DEBUG_TRACE(printf("BUG! r.ip with port\n")); + return; + } + p->r.ip = (struct bt_ipv4p *)s; + return; + } + if(STREQ(cbd->buf,"r.token")) { + p->r.token = s; + p->r.t_len = cbd->v.s.l; + return; + } + if(STREQ(cbd->buf,"r.values")) { + if(cbd->v.s.l == 18) { + if(!p->r.values6) { + p->r.values6 = s; + p->r.nv6 = 1; + } else { + if(s != p->r.values6+(p->r.nv6*21)) { + // DEBUG_TRACE(printf("BUG! r.values6 not in list! %08x %08x \n", p->r.values+(p->r.nv6*21),s)); + return; + } + p->r.nv6++; + } + return; + } + if(cbd->v.s.l == 6) { + if(!p->r.values) { + p->r.values = s; + p->r.nv = 1; + } else { + if(s != p->r.values+(p->r.nv*8)) { + // DEBUG_TRACE(printf("BUG! r.values not in list! %u \n",s-p->r.values+(p->r.nv*8))); + return; + } + p->r.nv++; + } + return; + } + return; + } + + if(STREQ(cbd->buf,"r.name") || STREQ(cbd->buf,"r.n")) { + p->r.name = s; + p->r.name_len = cbd->v.s.l; + return; + } + if(STREQ(cbd->buf,"r.nodes")) { + if(cbd->v.s.l % 26) { + // DEBUG_TRACE(printf("BUG! r.nodes length %d not %% 26\n",cbd->v.s.l)); + return; + } + p->r.nodes = (struct bt_nodes_data *)s; + p->r.nn = cbd->v.s.l / 26; + return; + } + if(STREQ(cbd->buf,"r.nodes6")) { + if(cbd->v.s.l % 38) { + // DEBUG_TRACE(printf("BUG! r.nodes length %d not %% 38\n",cbd->v.s.l)); + return; + } + p->r.nodes6 = (struct bt_nodes6_data *)s; + p->r.nn6 = cbd->v.s.l / 38; + return; + } + + if(cbd->buf[0] == 'y' && !cbd->buf[1]) { + if(cbd->v.s.l != 1) return; + if(*ss == 'q') { p->y_q = 1; return; } + if(*ss == 'r') { p->y_r = 1; return; } + if(*ss == 'e') { p->y_e = 1; return; } + return; + } + if(cbd->buf[0] == 'q' && !cbd->buf[1]) { + if(!strncmp(ss,"announce_peer",13)) { + p->q_a_peer = 1; + return; + } + if(!strncmp(ss,"find_node",9)) { + p->q_f_node = 1; + return; + } + if(!strncmp(ss,"get_peers",9)) { + p->q_g_peers = 1; + return; + } + if(!strncmp(ss,"ping",4)) { + p->q_ping = 1; + return; + } + if(!strncmp(ss,"vote",4)) { + return; + } + } + if(STREQ(cbd->buf,"ip")) { + if(cbd->v.s.l != 6) { + // DEBUG_TRACE(printf("BUG! r.ip w/o port\n")); + } + p->ip = (struct bt_ipv4p *)s; + p->h_ip = 1; + return; + } + if(STREQ(cbd->buf,"peers")) { + if(cbd->v.s.l % 6) return; + p->peers = (struct bt_ipv4p *)s; + p->n_peers = cbd->v.s.l / 6; + return; + } + if((*cbd->buf == 't' || *cbd->buf == 'v') && !cbd->buf[1]) { + u_int64_t d = *(u_int64_t*)s; + switch(cbd->v.s.l) { + case 2: + d &= 0xffffllu; d = htons(d); break; + case 4: + d &= 0xffffffffllu; d = htonl(d); break; + case 6: + d &= 0xffffffffffffllu; d = (htonl(d & 0xffffffff) << 16) | + (htons(d >> 32) & 0xffff); + break; + case 8: d = ((u_int64_t)htonl(d & 0xffffffff) << 32) | + htonl(d >> 32); + break; + default: d = 0; + } + if(*cbd->buf == 'v') cbd->p.v = d; + else cbd->p.t = d; + return; + } + + if(cbd->buf[0] == 'e') { + p->e_msg = s; + p->e_len = cbd->v.s.l; + return; + } + // DEBUG_TRACE(print_safe_str("UNKNOWN",cbd)); +} + + +const u_int8_t *bt_decode(const u_int8_t *b, size_t *l, int *ret, bt_parse_data_cb_t *cbd) { + + unsigned int n=0,neg=0; + int64_t d = 0; + u_int8_t c; + + if(!l || *l == 0) return NULL; + if(cbd->level > BDEC_MAXDEPT) goto bad_data; + c = *b++; (*l)--; + if(c == 'i') { // integer + while(*l) { + c = *b++; (*l)--; + n++; + if(c == '-') { + if(n != 1) goto bad_data; + n--; + neg=1; + continue; + } + if(c >= '0' && c <= '9') { + if(c == '0' && n > 1 && !d && *b != 'e') goto bad_data; + d *= 10; + d += c-'0'; + continue; + } + if(c != 'e') goto bad_data; + break; + } + if(neg) d=-d; + cbd->t = 1; + cbd->v.i = neg ? -d:d; + return b; + } + if(c >= '1' && c <= '9') { //string + d=c-'0'; + while(*l) { + c = *b++; (*l)--; + n++; + if(c >= '0' && c <= '9') { + if(c == '0' && n > 1 && d == 0) goto bad_data; + d *= 10; + d += c-'0'; + continue; + } + if(c != ':') goto bad_data; + break; + } + if((size_t)d > *l) goto bad_data; + cbd->t = 2; + cbd->v.s.s = b; + cbd->v.s.l = d; + b += d; + *l -= d; + return b; + } + if(c == 'l') { + cbd->level++; + do { + b = bt_decode(b,l,ret,cbd); + if(*ret < 0 || *l == 0) goto bad_data; + cb_data(cbd,ret); + if(*ret < 0) goto bad_data; + cbd->t = 0; + } while (*b != 'e' && *l != 0); + b++; (*l)--; + cbd->level--; + return b; + } + if(c == 'd') { + cbd->level++; + do { + char *ls = cbd->buf + strlen(cbd->buf); + int l1 = ls != cbd->buf ? 1:0; + if(!(*b >= '1' && *b <= '9')) goto bad_data; + b = bt_decode(b,l,ret,cbd); + if(*ret < 0 || *l == 0) goto bad_data; + if(ls+cbd->v.s.l+l1 < &cbd->buf[sizeof(cbd->buf)-1]) { + if(l1) ls[0]='.'; + strncpy(ls+l1,(char *)cbd->v.s.s,cbd->v.s.l); + ls[cbd->v.s.l+l1]=0; + } + b = bt_decode(b,l,ret,cbd); + if(*ret < 0 || *l == 0) goto bad_data; + cb_data(cbd,ret); + if(*ret < 0) goto bad_data; + cbd->t = 0; + *ls = 0; + } while (*b != 'e' && l != 0); + + b++; (*l)--; + cbd->level--; + return b; + } + + bad_data: + *ret=-1; + return b; +} diff --git a/src/components/implementation/simple_nf/ndpi/btlib.h b/src/components/implementation/simple_nf/ndpi/btlib.h new file mode 100644 index 0000000000..cc8b52b65c --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/btlib.h @@ -0,0 +1,181 @@ +/* + * btlib.h + * + * Copyright (C) 2011-15 - ntop.org + * Contributed by Vitaly Lavrov + * + * This file is part of nDPI, an open source deep packet inspection + * library based on the OpenDPI and PACE technology by ipoque GmbH + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +#define BDEC_MAXDEPT 8 + +#ifdef WIN32 +#include "ndpi_win32.h" +#endif + +typedef struct b_elem_s { + const u_int8_t *s; + size_t l; +} b_elem_s_t; + +#ifdef WIN32 +// enable 1 byte packing on Windows +#include +#endif + +struct +#ifndef WIN32 + __attribute__((__packed__)) +#endif + bt_nodes_data { + u_int8_t id[20]; + u_int32_t ip; + u_int16_t port; +}; + +struct +#ifndef WIN32 + __attribute__((__packed__)) +#endif + bt_ipv4p { + u_int32_t ip; + u_int16_t port; +}; + +struct +#ifndef WIN32 + __attribute__((__packed__)) +#endif + bt_ipv4p2 { + struct bt_ipv4p d; + u_int8_t pad[2]; +}; + +struct +#ifndef WIN32 + __attribute__((__packed__)) +#endif + bt_nodes6_data { + u_int8_t id[20]; + u_int32_t ip[4]; + u_int16_t port; +}; + +struct +#ifndef WIN32 + __attribute__((__packed__)) +#endif + bt_ipv6p { + u_int32_t ip[4]; + u_int16_t port; +}; + +struct +#ifndef WIN32 + __attribute__((__packed__)) +#endif + bt_ipv6p2 { + struct bt_ipv6p d; + u_int8_t pad[3]; +}; + +#ifdef WIN32 +// disable 1 byte packing +#include +#endif + +/* + + a.id S r.id S + a.info_hash S r.ip ipv4 + a.name S r.nodes x(id,ipv4,port) + -a.noseed 0|1 r.n S name of file + a.port N r.p port + -a.scrape 0|1 r.token S + -a.seed 0|1 r.values x(ipv4,port) + a.target S + a.token S -a.vote N + -a.want n4|n6 + + q announce_peer q find_node + q get_peers q ping + -q vote + + ip ipv4+port interval N + min interval N peers x(ipv4,port) + t 2/4/8b v 4/6b + + e S y e y r y q + + */ + +struct bt_parse_protocol { + u_int16_t y_e:1, y_r:1, y_q:1, + q_a_peer:1,q_f_node:1, + q_g_peers:1,q_ping:1, + h_int:1,h_mint:1,h_ip:1; + struct { + const u_int8_t *id, // 20 + *info_hash, // 20 + *target, // 20 + *token, // 20|8 + *name; // varlen + u_int16_t name_len; + u_int16_t port; + u_int16_t t_len; + } a; + struct { + const u_int8_t *id, // 20 + *token, // 20|8 + *values, // (6+2)*x + *values6, // (18_3)*x + *name; // varlen + struct bt_ipv4p *ip; + struct bt_nodes_data *nodes; + struct bt_nodes6_data *nodes6; + u_int16_t name_len; + u_int16_t nn; // nodes num + u_int16_t nv; // values num + u_int16_t nn6; // nodes6 num + u_int16_t nv6; // values6 num + u_int16_t port; + u_int16_t t_len; + } r; + int interval,min_interval; + struct bt_ipv4p *peers; + int n_peers; + struct bt_ipv4p *ip; + const u_int8_t *e_msg; + u_int16_t e_len; + u_int64_t t,v; +}; + +typedef struct bt_parse_data_cb { + struct bt_parse_protocol p; + char buf[64]; + int level; + int t; + union { + int64_t i; + b_elem_s_t s; + } v; +} bt_parse_data_cb_t; + +extern int bt_parse_debug; +void dump_bt_proto_struct(struct bt_parse_protocol *p); +const u_int8_t *bt_decode(const u_int8_t *b, size_t *l, int *ret, bt_parse_data_cb_t *cbd); diff --git a/src/components/implementation/simple_nf/ndpi/capwap.c b/src/components/implementation/simple_nf/ndpi/capwap.c new file mode 100644 index 0000000000..11a3949213 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/capwap.c @@ -0,0 +1,144 @@ +/* + * capwap.c + * + * Copyright (C) 2019 - ntop.org + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_CAPWAP + +#include "ndpi_api.h" + +#define NDPI_CAPWAP_CONTROL_PORT 5246 +#define NDPI_CAPWAP_DATA_PORT 5247 + + +static void ndpi_int_capwap_add_connection(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) { + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_CAPWAP, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); +} + +static int is_capwap_multicast(const struct ndpi_packet_struct *packet) +{ + /* RFC 5115 Sec 3.3 + "The WTP MUST send the Discovery Request + message to either the limited broadcast IP address (255.255.255.255), + the well-known CAPWAP multicast address (224.0.1.140), or to the + unicast IP address of the AC. For IPv6 networks, since broadcast + does not exist, the use of "All ACs multicast address" (FF0X:0:0:0:0: + 0:0:18C) is used instead. + */ + if(packet->iph) { + if((packet->iph->daddr == 0xFFFFFFFF) || + (ntohl(packet->iph->daddr) == 0XE000018C)) + return 1; + } else if(packet->iphv6) { + if(((ntohl(packet->iphv6->ip6_dst.u6_addr.u6_addr32[0] & 0xFFF0FFFF) == 0xFF000000)) && + (packet->iphv6->ip6_dst.u6_addr.u6_addr32[1] == 0) && + (packet->iphv6->ip6_dst.u6_addr.u6_addr32[2] == 0) && + (ntohl(packet->iphv6->ip6_dst.u6_addr.u6_addr32[3] == 0x0000018C))) + return 1; + } + return 0; +} + +/* ************************************************** */ + +static void ndpi_search_setup_capwap(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) { + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + u_int16_t sport, dport; + + sport = ntohs(packet->udp->source), dport = ntohs(packet->udp->dest); + + if((dport == NDPI_CAPWAP_CONTROL_PORT) + && (is_capwap_multicast(packet)) + && (packet->payload_packet_len >= 16) + && (packet->payload[0] == 0x0) + && (packet->payload[8] == 6 /* Mac len */) + ) + goto capwap_found; + + if(((sport == NDPI_CAPWAP_CONTROL_PORT) || (dport == NDPI_CAPWAP_CONTROL_PORT)) + && ((packet->payload[0] == 0x0) || (packet->payload[0] == 0x1)) + ) { + u_int16_t msg_len, offset, to_add; + + if(packet->payload[0] == 0x0) + offset = 13, to_add = 13; + else + offset = 15, to_add = 17; + + if (packet->payload_packet_len >= offset + sizeof(u_int16_t)) { + msg_len = ntohs(*(u_int16_t*)&packet->payload[offset]); + + if((msg_len+to_add) == packet->payload_packet_len) + goto capwap_found; + } + } + + if( + (((dport == NDPI_CAPWAP_DATA_PORT) && (!is_capwap_multicast(packet))) || (sport == NDPI_CAPWAP_DATA_PORT)) + && (packet->payload_packet_len >= 16) + && (packet->payload[0] == 0x0) + ) { + u_int8_t is_80211_data = (packet->payload[9] & 0x0C) >> 2; + + + if((sport == NDPI_CAPWAP_DATA_PORT) && (is_80211_data == 2 /* IEEE 802.11 Data */)) + goto capwap_found; + else if(dport == NDPI_CAPWAP_DATA_PORT) { + u_int16_t msg_len = ntohs(*(u_int16_t*)&packet->payload[13]); + + if((packet->payload[8] == 1 /* Mac len */) + || (packet->payload[8] == 6 /* Mac len */) + || (packet->payload[8] == 4 /* Wireless len */) + || ((msg_len+15) == packet->payload_packet_len)) + goto capwap_found; + } + } + + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + return; + + capwap_found: + ndpi_int_capwap_add_connection(ndpi_struct, flow); +} + +static void ndpi_search_capwap(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) +{ + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + + if(packet->udp && (flow->detected_protocol_stack[0] == NDPI_PROTOCOL_UNKNOWN)) + ndpi_search_setup_capwap(ndpi_struct, flow); +} + + +void init_capwap_dissector(struct ndpi_detection_module_struct *ndpi_struct, + u_int32_t *id) +{ + ndpi_set_bitmask_protocol_detection("CAPWAP", ndpi_struct, *id, + NDPI_PROTOCOL_CAPWAP, + ndpi_search_capwap, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_UDP_WITH_PAYLOAD, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK); + + *id += 1; +} diff --git a/src/components/implementation/simple_nf/ndpi/cassandra.c b/src/components/implementation/simple_nf/ndpi/cassandra.c new file mode 100644 index 0000000000..25180ac311 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/cassandra.c @@ -0,0 +1,152 @@ +/* + * cassandra.c + * + * Copyright (C) 2021 by Lucas Santos + * + * This file is part of nDPI, an open source deep packet inspection + * library based on the OpenDPI and PACE technology by ipoque GmbH + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + */ + +#include +#include "ndpi_protocol_ids.h" +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_CASSANDRA +#include "ndpi_api.h" + +#define CASSANDRA_HEADER_LEN 9 +#define CASSANDRA_MAX_BODY_SIZE 268435456 //256MB (256 * 1024^2) + +enum cassandra_version +{ + CASSANDRA_V1_REQUEST = 0x01, + CASSANDRA_V1_RESPONSE = 0x81, + CASSANDRA_V2_REQUEST = 0x02, + CASSANDRA_V2_RESPONSE = 0x82, + CASSANDRA_V3_REQUEST = 0x03, + CASSANDRA_V3_RESPONSE = 0x83, + CASSANDRA_V4_REQUEST = 0x04, + CASSANDRA_V4_RESPONSE = 0x84 +}; + +enum cassandra_opcode +{ + CASSANDRA_ERROR = 0x00, + CASSANDRA_STARTUP = 0x01, + CASSANDRA_READY = 0x02, + CASSANDRA_AUTHENTICATE = 0x03, + CASSANDRA_OPTIONS = 0x05, + CASSANDRA_SUPPORTED = 0x06, + CASSANDRA_QUERY = 0x07, + CASSANDRA_RESULT = 0x08, + CASSANDRA_PREPARE = 0x09, + CASSANDRA_EXECUTE = 0x0A, + CASSANDRA_REGISTER = 0x0B, + CASSANDRA_EVENT = 0x0C, + CASSANDRA_BATCH = 0x0D, + CASSANDRA_AUTH_CHALLENGE = 0x0E, + CASSANDRA_AUTH_RESPONSE = 0x0F, + CASSANDRA_AUTH_SUCCESS = 0x10 +}; + +static bool ndpi_check_valid_cassandra_version(uint8_t version) +{ + switch(version) { + case CASSANDRA_V1_REQUEST: + case CASSANDRA_V1_RESPONSE: + case CASSANDRA_V2_REQUEST: + case CASSANDRA_V2_RESPONSE: + case CASSANDRA_V3_REQUEST: + case CASSANDRA_V3_RESPONSE: + case CASSANDRA_V4_REQUEST: + case CASSANDRA_V4_RESPONSE: + return true; + } + return false; +} + +static bool ndpi_check_valid_cassandra_opcode(uint8_t opcode) +{ + switch (opcode) { + case CASSANDRA_ERROR: + case CASSANDRA_STARTUP: + case CASSANDRA_READY: + case CASSANDRA_AUTHENTICATE: + case CASSANDRA_OPTIONS: + case CASSANDRA_SUPPORTED: + case CASSANDRA_QUERY: + case CASSANDRA_RESULT: + case CASSANDRA_PREPARE: + case CASSANDRA_EXECUTE: + case CASSANDRA_REGISTER: + case CASSANDRA_EVENT: + case CASSANDRA_BATCH: + case CASSANDRA_AUTH_CHALLENGE: + case CASSANDRA_AUTH_RESPONSE: + case CASSANDRA_AUTH_SUCCESS: + return true; + } + return false; +} + +static bool ndpi_check_valid_cassandra_flags(uint8_t flags) +{ + return (flags & 0xF0) == 0; +} + +static void ndpi_search_cassandra(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) +{ + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + + NDPI_LOG_DBG(ndpi_struct, "search Cassandra\n"); + + if (packet->tcp) { + if (packet->payload_packet_len >= CASSANDRA_HEADER_LEN && + ndpi_check_valid_cassandra_version(get_u_int8_t(packet->payload, 0)) && + ndpi_check_valid_cassandra_flags(get_u_int8_t(packet->payload, 1)) && + ndpi_check_valid_cassandra_opcode(get_u_int8_t(packet->payload, 4)) && + ntohl(get_u_int32_t(packet->payload, 5)) <= CASSANDRA_MAX_BODY_SIZE && + ntohl(get_u_int32_t(packet->payload, 5)) >= (uint32_t) (packet->payload_packet_len - CASSANDRA_HEADER_LEN) && + flow->l4.tcp.h323_valid_packets == 0 /* To avoid clashing with H323 */ && + flow->socks4_stage == 0 /* To avoid clashing with SOCKS */) { + if (flow->packet_counter > 3) + { + NDPI_LOG_INFO(ndpi_struct, "found Cassandra\n"); + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_CASSANDRA, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); + } + return; + } + } + + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); +} + +/* ********************************* */ + + +void init_cassandra_dissector(struct ndpi_detection_module_struct *ndpi_struct, + u_int32_t *id) { + + ndpi_set_bitmask_protocol_detection("Cassandra", + ndpi_struct, + *id, + NDPI_PROTOCOL_CASSANDRA, + ndpi_search_cassandra, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_TCP_WITH_PAYLOAD_WITHOUT_RETRANSMISSION, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK); + + *id += 1; +} diff --git a/src/components/implementation/simple_nf/ndpi/checkmk.c b/src/components/implementation/simple_nf/ndpi/checkmk.c new file mode 100644 index 0000000000..c0b8574306 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/checkmk.c @@ -0,0 +1,82 @@ +/* + * checkmk.c + * + * Copyright (C) 2011-22 - ntop.org + * + * This file is part of nDPI, an open source deep packet inspection + * library based on the OpenDPI and PACE technology by ipoque GmbH + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + * + */ +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_CHECKMK + +#include "ndpi_api.h" + + +static void ndpi_int_checkmk_add_connection(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) +{ + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_CHECKMK, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); +} + + +static void ndpi_search_checkmk(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) +{ + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + + if (packet->payload_packet_len >= 15) { + + if(packet->payload_packet_len > 128) { + /* + When we transfer a large data chunk, unless we have observed + the initial connection, we need to discard these packets + as they are not an indication that this flow is not AFP + */ + return; + } + + /* + * this will detect the OpenSession command of the Data Stream Interface (DSI) protocol + * which is exclusively used by the Apple Filing Protocol (AFP) on TCP/IP networks + */ + if (packet->payload_packet_len >= 15 && packet->payload_packet_len < 100 + && memcmp(packet->payload, "<<>>", 14) == 0) { + + NDPI_LOG(NDPI_PROTOCOL_CHECKMK, ndpi_struct, NDPI_LOG_DEBUG, "Check_MK: Flow detected.\n"); + ndpi_int_checkmk_add_connection(ndpi_struct, flow); + return; + } + } + + NDPI_LOG(NDPI_PROTOCOL_CHECKMK, ndpi_struct, NDPI_LOG_DEBUG, "Check_MK excluded.\n"); + NDPI_ADD_PROTOCOL_TO_BITMASK(flow->excluded_protocol_bitmask, NDPI_PROTOCOL_CHECKMK); +} + + +void init_checkmk_dissector(struct ndpi_detection_module_struct *ndpi_struct, + u_int32_t *id) +{ + ndpi_set_bitmask_protocol_detection("CHECKMK", ndpi_struct, *id, + NDPI_PROTOCOL_CHECKMK, + ndpi_search_checkmk, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_TCP_WITH_PAYLOAD_WITHOUT_RETRANSMISSION, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK); + *id += 1; +} diff --git a/src/components/implementation/simple_nf/ndpi/ciscovpn.c b/src/components/implementation/simple_nf/ndpi/ciscovpn.c new file mode 100644 index 0000000000..d3a63579d6 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/ciscovpn.c @@ -0,0 +1,82 @@ +/* + * ciscovpn.c + * + * Copyright (C) 2013-22 - ntop.org + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + * Dissector developed by Remy Mudingay + * + */ + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_CISCOVPN + +#include "ndpi_api.h" + +/* ****************************************************************** */ + +static void ndpi_int_ciscovpn_add_connection(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) +{ + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_CISCOVPN, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); +} + +/* ****************************************************************** */ + +static void ndpi_search_ciscovpn(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) +{ + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + u_int16_t udport = 0, usport = 0; + + NDPI_LOG_DBG(ndpi_struct, "search CISCOVPN\n"); + + if(packet->udp != NULL) { + usport = ntohs(packet->udp->source), udport = ntohs(packet->udp->dest); + NDPI_LOG_DBG2(ndpi_struct, "calculated CISCOVPN over udp ports\n"); + } + + if( + ( + (usport == 10000 && udport == 10000) + && + (packet->payload_packet_len >= 4) && + (packet->payload[0] == 0xfe && + packet->payload[1] == 0x57 && + packet->payload[2] == 0x7e && + packet->payload[3] == 0x2b) + ) + ) + { + /* This is a good query fe577e2b */ + NDPI_LOG_INFO(ndpi_struct, "found CISCOVPN\n"); + ndpi_int_ciscovpn_add_connection(ndpi_struct, flow); + return; + } + + if(flow->num_processed_pkts > 5) + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); +} + + +void init_ciscovpn_dissector(struct ndpi_detection_module_struct *ndpi_struct, u_int32_t *id) +{ + ndpi_set_bitmask_protocol_detection("CiscoVPN", ndpi_struct, *id, + NDPI_PROTOCOL_CISCOVPN, + ndpi_search_ciscovpn, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_TCP_OR_UDP_WITH_PAYLOAD_WITHOUT_RETRANSMISSION, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK); + *id += 1; +} diff --git a/src/components/implementation/simple_nf/ndpi/citrix.c b/src/components/implementation/simple_nf/ndpi/citrix.c new file mode 100644 index 0000000000..ccb3af0d7f --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/citrix.c @@ -0,0 +1,79 @@ +/* + * citrix.c + * + * Copyright (C) 2012-22 - ntop.org + * + * This file is part of nDPI, an open source deep packet inspection + * library based on the OpenDPI and PACE technology by ipoque GmbH + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_CITRIX + +#include "ndpi_api.h" + + +/* ************************************ */ + +static void ndpi_check_citrix(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) +{ + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + u_int32_t payload_len = packet->payload_packet_len; + + if(payload_len == 6) { + char citrix_header[] = { 0x7F, 0x7F, 0x49, 0x43, 0x41, 0x00 }; + + if(memcmp(packet->payload, citrix_header, sizeof(citrix_header)) == 0) { + NDPI_LOG_INFO(ndpi_struct, "found citrix\n"); + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_CITRIX, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); + return; + } + } else if(payload_len > 22) { + char citrix_header[] = { 0x1a, 0x43, 0x47, 0x50, 0x2f, 0x30, 0x31 }; + + if((memcmp(packet->payload, citrix_header, sizeof(citrix_header)) == 0) + || (ndpi_strnstr((const char *)packet->payload, "Citrix.TcpProxyService", payload_len) != NULL)) { + NDPI_LOG_INFO(ndpi_struct, "found citrix\n"); + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_CITRIX, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); + return; + } + } + + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); +} + +static void ndpi_search_citrix(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) +{ + NDPI_LOG_DBG(ndpi_struct, "search citrix\n"); + + /* skip marked packets */ + if(flow->detected_protocol_stack[0] != NDPI_PROTOCOL_CITRIX) + ndpi_check_citrix(ndpi_struct, flow); +} + + +void init_citrix_dissector(struct ndpi_detection_module_struct *ndpi_struct, u_int32_t *id) +{ + ndpi_set_bitmask_protocol_detection("Citrix", ndpi_struct, *id, + NDPI_PROTOCOL_CITRIX, + ndpi_search_citrix, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_TCP_WITH_PAYLOAD_WITHOUT_RETRANSMISSION, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK); + *id += 1; +} diff --git a/src/components/implementation/simple_nf/ndpi/coap.c b/src/components/implementation/simple_nf/ndpi/coap.c new file mode 100644 index 0000000000..6d0f68d469 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/coap.c @@ -0,0 +1,159 @@ +/* + * coap.c + * + * Copyright (C) 2016 Sorin Zamfir + * + * This file is part of nDPI, an open source deep packet inspection + * library based on the OpenDPI and PACE technology by ipoque GmbH + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_COAP + +#include "ndpi_api.h" + + +#define CON 0 +#define NO_CON 1 +#define ACK 2 +#define RST 3 + +struct ndpi_coap_hdr +{ +#if defined(__BIG_ENDIAN__) + u_int8_t version:2, type:2, tkl:4; +#elif defined(__LITTLE_ENDIAN__) + u_int8_t tkl:4, type:2, version:2; +#endif + u_int8_t code; + u_int16_t message_id; //if needed, remember to convert in host number +}; + + +/** + VALUE OF -CODE- FIELD + + [0] = "Empty", + [1] = "GET", + [2] = "POST", + [3] = "PUT", + [4] = "DELETE", + [65] = "2.01 Created", + [66] = "2.02 Deleted", + [67] = "2.03 Valid", + [68] = "2.04 Changed", + [69] = "2.05 Content", + [128] = "4.00 Bad Request", + [129] = "4.01 Unauthorized", + [130] = "4.02 Bad Option", + [131] = "4.03 Forbidden", + [132] = "4.04 Not Found", + [133] = "4.05 Method Not Allowed", + [134] = "4.06 Not Acceptable", + [140] = "4.12 Precondition Failed", + [141] = "4.13 Request Entity Too Large", + [143] = "4.15 Unsupported Content-Format", + [160] = "5.00 Internal Server Error", + [161] = "5.01 Not Implemented", + [162] = "5.02 Bad Gateway", + [163] = "5.03 Service Unavailable", + [164] = "5.04 Gateway Timeout", + [165] = "5.05 Proxying Not Supported" +**/ + + +/** + * Entry point when protocol is identified. + */ +static void ndpi_int_coap_add_connection (struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) +{ + ndpi_set_detected_protocol(ndpi_struct,flow,NDPI_PROTOCOL_COAP,NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); +} + +/** + * Check if the default port is acceptable + * + * UDP Port 5683 (mandatory) + * UDP Ports 61616-61631 compressed 6lowPAN + */ +static int isCoAPport(u_int16_t port) { + if((port == 5683) + || ((port >= 61616) && (port <= 61631))) + return(1); + else + return(0); +} + +/** + * Dissector function that searches CoAP headers + */ +static void ndpi_search_coap(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) +{ + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + struct ndpi_coap_hdr * h = (struct ndpi_coap_hdr*) packet->payload; + + // search for udp packet + if(packet->udp != NULL) { + u_int16_t s_port = ntohs(packet->udp->source); + u_int16_t d_port = ntohs(packet->udp->dest); + + if((!isCoAPport(s_port) && !isCoAPport(d_port)) + || (packet->payload_packet_len < 4) ) { // header too short + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + return; + } + + NDPI_LOG_DBG2(ndpi_struct, "calculating coap over udp\n"); + + // check values in header + if(h->version == 1) { + if(h->type == CON || h->type == NO_CON || h->type == ACK || h->type == RST ) { + if(h->tkl < 8) { + if((/* h->code >= 0 && */ h->code <= 5) || (h->code >= 65 && h->code <= 69) || + (h->code >= 128 && h->code <= 134) || (h->code >= 140 && h->code <= 143) || + (h->code >= 160 && h->code <= 165)) { + + NDPI_LOG_INFO(ndpi_struct, "found Coap\n"); + ndpi_int_coap_add_connection(ndpi_struct,flow); + return; + } + } + } + } + } + + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + return; +} + +/** + * Entry point for the ndpi library + */ +void init_coap_dissector (struct ndpi_detection_module_struct *ndpi_struct, + u_int32_t *id) +{ + ndpi_set_bitmask_protocol_detection ("COAP", ndpi_struct, *id, + NDPI_PROTOCOL_COAP, + ndpi_search_coap, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_UDP_WITH_PAYLOAD, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, ADD_TO_DETECTION_BITMASK); + *id +=1; +} + diff --git a/src/components/implementation/simple_nf/ndpi/collectd.c b/src/components/implementation/simple_nf/ndpi/collectd.c new file mode 100644 index 0000000000..990ff61082 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/collectd.c @@ -0,0 +1,209 @@ +/* + * collectd.c + * + * Copyright (C) 2022-23 - ntop.org + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_COLLECTD + +#include "ndpi_api.h" + +#define COLLECTD_MIN_BLOCKS_REQUIRED 3 +#define COLLECTD_MAX_BLOCKS_TO_DISSECT 5 + +#define COLLECTD_ENCR_AES256_MIN_BLOCK_SIZE 6 +#define COLLECTD_ENCR_AES256_IV_SIZE 16 + +enum collectd_type { + COLLECTD_TYPE_HOST = 0x0000, + COLLECTD_TYPE_TIME = 0x0001, + COLLECTD_TYPE_TIME_HR = 0x0008, + COLLECTD_TYPE_PLUGIN = 0x0002, + COLLECTD_TYPE_PLUGIN_INSTANCE = 0x0003, + COLLECTD_TYPE_TYPE = 0x0004, + COLLECTD_TYPE_TYPE_INSTANCE = 0x0005, + COLLECTD_TYPE_VALUES = 0x0006, + COLLECTD_TYPE_INTERVAL = 0x0007, + COLLECTD_TYPE_INTERVAL_HR = 0x0009, + COLLECTD_TYPE_MESSAGE = 0x0100, + COLLECTD_TYPE_SEVERITY = 0x0101, + COLLECTD_TYPE_SIGN_SHA256 = 0x0200, + COLELCTD_TYPE_ENCR_AES256 = 0x0210, +}; + +static u_int16_t const collectd_types[] = { + COLLECTD_TYPE_HOST, COLLECTD_TYPE_TIME, COLLECTD_TYPE_TIME_HR, COLLECTD_TYPE_PLUGIN, + COLLECTD_TYPE_PLUGIN_INSTANCE, COLLECTD_TYPE_TYPE, COLLECTD_TYPE_TYPE_INSTANCE, + COLLECTD_TYPE_VALUES, COLLECTD_TYPE_INTERVAL, COLLECTD_TYPE_INTERVAL_HR, + COLLECTD_TYPE_MESSAGE, COLLECTD_TYPE_SEVERITY, COLLECTD_TYPE_SIGN_SHA256, + COLELCTD_TYPE_ENCR_AES256 +}; +static const size_t collectd_types_length = NDPI_ARRAY_LENGTH(collectd_types); + +static void ndpi_int_collectd_add_connection(struct ndpi_detection_module_struct * const ndpi_struct, + struct ndpi_flow_struct * const flow) +{ + NDPI_LOG_INFO(ndpi_struct, "found collectd\n"); + ndpi_set_detected_protocol(ndpi_struct, flow, + NDPI_PROTOCOL_COLLECTD, + NDPI_PROTOCOL_UNKNOWN, + NDPI_CONFIDENCE_DPI); +} + +static u_int16_t npdi_int_collectd_block_size(struct ndpi_packet_struct const * const packet, + u_int16_t const block_offset) +{ + if (block_offset + 4 > packet->payload_packet_len) + { + return 0; + } + + u_int16_t next_block = ntohs(get_u_int16_t(packet->payload, block_offset + 2)); + if (block_offset + next_block > packet->payload_packet_len || + (u_int16_t)(block_offset + next_block) <= block_offset /* possible overflow or next_block is zero */) + { + return 0; + } + + return next_block; +} + +static int ndpi_int_collectd_check_type(u_int16_t block_type) +{ + size_t i; + + for (i = 0; i < collectd_types_length; ++i) + { + if (block_type == collectd_types[i]) + { + return 0; + } + } + + return 1; +} + +static int ndpi_int_collectd_dissect_hostname(struct ndpi_flow_struct * const flow, + struct ndpi_packet_struct const * const packet, + u_int16_t block_offset, u_int16_t block_length) +{ + return (ndpi_hostname_sni_set(flow, &packet->payload[4], block_length) == NULL); +} + +static int ndpi_int_collectd_dissect_username(struct ndpi_flow_struct * const flow, + struct ndpi_packet_struct const * const packet, + u_int16_t block_offset) +{ + u_int16_t username_length = ntohs(get_u_int16_t(packet->payload, 4)); + + if(username_length > packet->payload_packet_len - + COLLECTD_ENCR_AES256_MIN_BLOCK_SIZE - + COLLECTD_ENCR_AES256_IV_SIZE) + { + return 1; + } + + size_t sz_len = ndpi_min(sizeof(flow->protos.collectd.client_username) - 1, username_length); + memcpy(flow->protos.collectd.client_username, &packet->payload[6], sz_len); + flow->protos.collectd.client_username[sz_len] = '\0'; + + return 0; +} + +static void ndpi_search_collectd(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) +{ + struct ndpi_packet_struct const * const packet = &ndpi_struct->packet; + u_int16_t num_blocks; + u_int16_t block_offset = 0, block_type, block_length; + u_int16_t hostname_offset, hostname_length = 0; + + NDPI_LOG_DBG(ndpi_struct, "search collectd\n"); + + for (num_blocks = 0; num_blocks < COLLECTD_MAX_BLOCKS_TO_DISSECT; + ++num_blocks, block_offset += block_length) + { + block_length = npdi_int_collectd_block_size(packet, block_offset); + if (block_length == 0) + { + break; + } + + block_type = ntohs(get_u_int16_t(packet->payload, block_offset)); + if (ndpi_int_collectd_check_type(block_type) != 0) + { + break; + } else { + if (block_type == COLLECTD_TYPE_HOST) + { + /* + * Dissect the hostname later, when we are sure that it is + * the collectd protocol. + */ + hostname_offset = block_offset; + hostname_length = block_length; + } else if (block_type == COLELCTD_TYPE_ENCR_AES256) { + /* + * The encrypted data block is a special case. + * It is the only dissectable block as everything else in it + * is encrypted. + */ + if (block_length != packet->payload_packet_len || + block_length < COLLECTD_ENCR_AES256_MIN_BLOCK_SIZE || + ndpi_int_collectd_dissect_username(flow, packet, block_offset) != 0) + { + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + } else { + ndpi_int_collectd_add_connection(ndpi_struct, flow); + } + return; + } + } + } + + if (num_blocks < COLLECTD_MIN_BLOCKS_REQUIRED) + { + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + return; + } + + if (hostname_length > 0 && + ndpi_int_collectd_dissect_hostname(flow, packet, hostname_offset, + hostname_length) != 0) + { + ndpi_set_risk(ndpi_struct, flow, NDPI_MALFORMED_PACKET, "Invalid collectd Header"); + } + + ndpi_int_collectd_add_connection(ndpi_struct, flow); +} + +void init_collectd_dissector(struct ndpi_detection_module_struct *ndpi_struct, + u_int32_t *id) +{ + ndpi_set_bitmask_protocol_detection("collectd", ndpi_struct, *id, + NDPI_PROTOCOL_COLLECTD, + ndpi_search_collectd, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_UDP_WITH_PAYLOAD, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK + ); + + *id += 1; +} diff --git a/src/components/implementation/simple_nf/ndpi/corba.c b/src/components/implementation/simple_nf/ndpi/corba.c new file mode 100644 index 0000000000..b8c453accf --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/corba.c @@ -0,0 +1,58 @@ +/* + * corba.c + * + * Copyright (C) 2013 Remy Mudingay + * + * This module is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This module is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License. + * If not, see . + * + */ + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_CORBA + +#include "ndpi_api.h" + +static void ndpi_int_corba_add_connection(struct ndpi_detection_module_struct + *ndpi_struct, struct ndpi_flow_struct *flow) +{ + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_CORBA, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); +} +static void ndpi_search_corba(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) +{ + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + + NDPI_LOG_DBG(ndpi_struct, "search for CORBA\n"); + if(packet->tcp != NULL) { + NDPI_LOG_DBG2(ndpi_struct, "calculating CORBA over tcp\n"); + /* Corba General Inter-ORB Protocol -> GIOP */ + if(packet->payload_packet_len >= 24 && + memcmp(packet->payload, "GIOP", 4) == 0) { + NDPI_LOG_INFO(ndpi_struct, "found corba\n"); + ndpi_int_corba_add_connection(ndpi_struct, flow); + } + } +} + + +void init_corba_dissector(struct ndpi_detection_module_struct *ndpi_struct, u_int32_t *id) +{ + ndpi_set_bitmask_protocol_detection("Corba", ndpi_struct, *id, + NDPI_PROTOCOL_CORBA, + ndpi_search_corba, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_TCP_WITH_PAYLOAD_WITHOUT_RETRANSMISSION, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK); + *id += 1; +} diff --git a/src/components/implementation/simple_nf/ndpi/cpha.c b/src/components/implementation/simple_nf/ndpi/cpha.c new file mode 100644 index 0000000000..97bad4262b --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/cpha.c @@ -0,0 +1,63 @@ +/* + * qq.c + * + * Copyright (C) 2011-22 - ntop.org + * + * This file is part of nDPI, an open source deep packet inspection + * library based on the OpenDPI and PACE technology by ipoque GmbH + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +#include "ndpi_protocol_ids.h" + +/* CPHA - CheckPoint High Availability Protocol */ + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_CPHA + +#include "ndpi_api.h" + + +static void ndpi_search_cpha(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) { + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + const u_int16_t cpha_port = htons(8116); + + NDPI_LOG_DBG(ndpi_struct, "search CPHA\n"); + + if((packet->payload_packet_len > 20) + && (packet->payload[0] == 0x1a) + && (packet->payload[1] == 0x90) + && packet->udp + && packet->iph + && (packet->udp->source == cpha_port) + && (packet->udp->dest == cpha_port) + && packet->iph->saddr == 0 /* 0.0.0.0 */ + ) { + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_CPHA, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); + } else + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); +} + + +void init_cpha_dissector(struct ndpi_detection_module_struct *ndpi_struct, u_int32_t *id) { + ndpi_set_bitmask_protocol_detection("CPHA", ndpi_struct, *id, + NDPI_PROTOCOL_CPHA, + ndpi_search_cpha, + NDPI_SELECTION_BITMASK_PROTOCOL_UDP_WITH_PAYLOAD, /* TODO: ipv6 support? */ + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK); + + *id += 1; +} diff --git a/src/components/implementation/simple_nf/ndpi/cpuid.h b/src/components/implementation/simple_nf/ndpi/cpuid.h new file mode 100644 index 0000000000..aebc17c682 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/cpuid.h @@ -0,0 +1,340 @@ +/* + * Copyright (C) 2007-2021 Free Software Foundation, Inc. + * + * This file is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 3, or (at your option) any + * later version. + * + * This file is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * Under Section 7 of GPL version 3, you are granted additional + * permissions described in the GCC Runtime Library Exception, version + * 3.1, as published by the Free Software Foundation. + * + * You should have received a copy of the GNU General Public License and + * a copy of the GCC Runtime Library Exception along with this program; + * see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + * . + */ + +#ifndef _CPUID_H_INCLUDED +#define _CPUID_H_INCLUDED + +/* %eax */ +#define bit_AVXVNNI (1 << 4) +#define bit_AVX512BF16 (1 << 5) +#define bit_HRESET (1 << 22) + +/* %ecx */ +#define bit_SSE3 (1 << 0) +#define bit_PCLMUL (1 << 1) +#define bit_LZCNT (1 << 5) +#define bit_SSSE3 (1 << 9) +#define bit_FMA (1 << 12) +#define bit_CMPXCHG16B (1 << 13) +#define bit_SSE4_1 (1 << 19) +#define bit_SSE4_2 (1 << 20) +#define bit_MOVBE (1 << 22) +#define bit_POPCNT (1 << 23) +#define bit_AES (1 << 25) +#define bit_XSAVE (1 << 26) +#define bit_OSXSAVE (1 << 27) +#define bit_AVX (1 << 28) +#define bit_F16C (1 << 29) +#define bit_RDRND (1 << 30) + +/* %edx */ +#define bit_CMPXCHG8B (1 << 8) +#define bit_CMOV (1 << 15) +#define bit_MMX (1 << 23) +#define bit_FXSAVE (1 << 24) +#define bit_SSE (1 << 25) +#define bit_SSE2 (1 << 26) + +/* Extended Features (%eax == 0x80000001) */ +/* %ecx */ +#define bit_LAHF_LM (1 << 0) +#define bit_ABM (1 << 5) +#define bit_SSE4a (1 << 6) +#define bit_PRFCHW (1 << 8) +#define bit_XOP (1 << 11) +#define bit_LWP (1 << 15) +#define bit_FMA4 (1 << 16) +#define bit_TBM (1 << 21) +#define bit_MWAITX (1 << 29) + +/* %edx */ +#define bit_MMXEXT (1 << 22) +#define bit_LM (1 << 29) +#define bit_3DNOWP (1 << 30) +#define bit_3DNOW (1u << 31) + +/* %ebx */ +#define bit_CLZERO (1 << 0) +#define bit_WBNOINVD (1 << 9) + +/* Extended Features (%eax == 7) */ +/* %ebx */ +#define bit_FSGSBASE (1 << 0) +#define bit_SGX (1 << 2) +#define bit_BMI (1 << 3) +#define bit_HLE (1 << 4) +#define bit_AVX2 (1 << 5) +#define bit_BMI2 (1 << 8) +#define bit_RTM (1 << 11) +#define bit_MPX (1 << 14) +#define bit_AVX512F (1 << 16) +#define bit_AVX512DQ (1 << 17) +#define bit_RDSEED (1 << 18) +#define bit_ADX (1 << 19) +#define bit_AVX512IFMA (1 << 21) +#define bit_CLFLUSHOPT (1 << 23) +#define bit_CLWB (1 << 24) +#define bit_AVX512PF (1 << 26) +#define bit_AVX512ER (1 << 27) +#define bit_AVX512CD (1 << 28) +#define bit_SHA (1 << 29) +#define bit_AVX512BW (1 << 30) +#define bit_AVX512VL (1u << 31) + +/* %ecx */ +#define bit_PREFETCHWT1 (1 << 0) +#define bit_AVX512VBMI (1 << 1) +#define bit_PKU (1 << 3) +#define bit_OSPKE (1 << 4) +#define bit_WAITPKG (1 << 5) +#define bit_AVX512VBMI2 (1 << 6) +#define bit_SHSTK (1 << 7) +#define bit_GFNI (1 << 8) +#define bit_VAES (1 << 9) +#define bit_AVX512VNNI (1 << 11) +#define bit_VPCLMULQDQ (1 << 10) +#define bit_AVX512BITALG (1 << 12) +#define bit_AVX512VPOPCNTDQ (1 << 14) +#define bit_RDPID (1 << 22) +#define bit_MOVDIRI (1 << 27) +#define bit_MOVDIR64B (1 << 28) +#define bit_ENQCMD (1 << 29) +#define bit_CLDEMOTE (1 << 25) +#define bit_KL (1 << 23) + +/* %edx */ +#define bit_AVX5124VNNIW (1 << 2) +#define bit_AVX5124FMAPS (1 << 3) +#define bit_AVX512VP2INTERSECT (1 << 8) +#define bit_IBT (1 << 20) +#define bit_UINTR (1 << 5) +#define bit_PCONFIG (1 << 18) +#define bit_SERIALIZE (1 << 14) +#define bit_TSXLDTRK (1 << 16) +#define bit_AMX_BF16 (1 << 22) +#define bit_AMX_TILE (1 << 24) +#define bit_AMX_INT8 (1 << 25) + +/* XFEATURE_ENABLED_MASK register bits (%eax == 0xd, %ecx == 0) */ +#define bit_BNDREGS (1 << 3) +#define bit_BNDCSR (1 << 4) + +/* Extended State Enumeration Sub-leaf (%eax == 0xd, %ecx == 1) */ +#define bit_XSAVEOPT (1 << 0) +#define bit_XSAVEC (1 << 1) +#define bit_XSAVES (1 << 3) + +/* PT sub leaf (%eax == 0x14, %ecx == 0) */ +/* %ebx */ +#define bit_PTWRITE (1 << 4) + +/* Keylocker leaf (%eax == 0x19) */ +/* %ebx */ +#define bit_AESKLE ( 1<<0 ) +#define bit_WIDEKL ( 1<<2 ) + + +/* Signatures for different CPU implementations as returned in uses + of cpuid with level 0. */ +#define signature_AMD_ebx 0x68747541 +#define signature_AMD_ecx 0x444d4163 +#define signature_AMD_edx 0x69746e65 + +#define signature_CENTAUR_ebx 0x746e6543 +#define signature_CENTAUR_ecx 0x736c7561 +#define signature_CENTAUR_edx 0x48727561 + +#define signature_CYRIX_ebx 0x69727943 +#define signature_CYRIX_ecx 0x64616574 +#define signature_CYRIX_edx 0x736e4978 + +#define signature_INTEL_ebx 0x756e6547 +#define signature_INTEL_ecx 0x6c65746e +#define signature_INTEL_edx 0x49656e69 + +#define signature_TM1_ebx 0x6e617254 +#define signature_TM1_ecx 0x55504361 +#define signature_TM1_edx 0x74656d73 + +#define signature_TM2_ebx 0x756e6547 +#define signature_TM2_ecx 0x3638784d +#define signature_TM2_edx 0x54656e69 + +#define signature_NSC_ebx 0x646f6547 +#define signature_NSC_ecx 0x43534e20 +#define signature_NSC_edx 0x79622065 + +#define signature_NEXGEN_ebx 0x4778654e +#define signature_NEXGEN_ecx 0x6e657669 +#define signature_NEXGEN_edx 0x72446e65 + +#define signature_RISE_ebx 0x65736952 +#define signature_RISE_ecx 0x65736952 +#define signature_RISE_edx 0x65736952 + +#define signature_SIS_ebx 0x20536953 +#define signature_SIS_ecx 0x20536953 +#define signature_SIS_edx 0x20536953 + +#define signature_UMC_ebx 0x20434d55 +#define signature_UMC_ecx 0x20434d55 +#define signature_UMC_edx 0x20434d55 + +#define signature_VIA_ebx 0x20414956 +#define signature_VIA_ecx 0x20414956 +#define signature_VIA_edx 0x20414956 + +#define signature_VORTEX_ebx 0x74726f56 +#define signature_VORTEX_ecx 0x436f5320 +#define signature_VORTEX_edx 0x36387865 + +#ifndef __x86_64__ +/* At least one cpu (Winchip 2) does not set %ebx and %ecx + for cpuid leaf 1. Forcibly zero the two registers before + calling cpuid as a precaution. */ +#define __cpuid(level, a, b, c, d) \ + do { \ + if (__builtin_constant_p (level) && (level) != 1) \ + __asm__ __volatile__ ("cpuid\n\t" \ + : "=a" (a), "=b" (b), "=c" (c), "=d" (d) \ + : "0" (level)); \ + else \ + __asm__ __volatile__ ("cpuid\n\t" \ + : "=a" (a), "=b" (b), "=c" (c), "=d" (d) \ + : "0" (level), "1" (0), "2" (0)); \ + } while (0) +#else +#define __cpuid(level, a, b, c, d) \ + __asm__ __volatile__ ("cpuid\n\t" \ + : "=a" (a), "=b" (b), "=c" (c), "=d" (d) \ + : "0" (level)) +#endif + +#define __cpuid_count(level, count, a, b, c, d) \ + __asm__ __volatile__ ("cpuid\n\t" \ + : "=a" (a), "=b" (b), "=c" (c), "=d" (d) \ + : "0" (level), "2" (count)) + + +/* Return highest supported input value for cpuid instruction. ext can + be either 0x0 or 0x80000000 to return highest supported value for + basic or extended cpuid information. Function returns 0 if cpuid + is not supported or whatever cpuid returns in eax register. If sig + pointer is non-null, then first four bytes of the signature + (as found in ebx register) are returned in location pointed by sig. */ + +static __inline unsigned int +__get_cpuid_max (unsigned int __ext, unsigned int *__sig) +{ + unsigned int __eax, __ebx, __ecx, __edx; + +#ifndef __x86_64__ + /* See if we can use cpuid. On AMD64 we always can. */ +#if __GNUC__ >= 3 + __asm__ ("pushf{l|d}\n\t" + "pushf{l|d}\n\t" + "pop{l}\t%0\n\t" + "mov{l}\t{%0, %1|%1, %0}\n\t" + "xor{l}\t{%2, %0|%0, %2}\n\t" + "push{l}\t%0\n\t" + "popf{l|d}\n\t" + "pushf{l|d}\n\t" + "pop{l}\t%0\n\t" + "popf{l|d}\n\t" + : "=&r" (__eax), "=&r" (__ebx) + : "i" (0x00200000)); +#else +/* Host GCCs older than 3.0 weren't supporting Intel asm syntax + nor alternatives in i386 code. */ + __asm__ ("pushfl\n\t" + "pushfl\n\t" + "popl\t%0\n\t" + "movl\t%0, %1\n\t" + "xorl\t%2, %0\n\t" + "pushl\t%0\n\t" + "popfl\n\t" + "pushfl\n\t" + "popl\t%0\n\t" + "popfl\n\t" + : "=&r" (__eax), "=&r" (__ebx) + : "i" (0x00200000)); +#endif + + if (!((__eax ^ __ebx) & 0x00200000)) + return 0; +#endif + + /* Host supports cpuid. Return highest supported cpuid input value. */ + __cpuid (__ext, __eax, __ebx, __ecx, __edx); + + if (__sig) + *__sig = __ebx; + + return __eax; +} + +/* Return cpuid data for requested cpuid leaf, as found in returned + eax, ebx, ecx and edx registers. The function checks if cpuid is + supported and returns 1 for valid cpuid information or 0 for + unsupported cpuid leaf. All pointers are required to be non-null. */ + +static __inline int +__get_cpuid (unsigned int __leaf, + unsigned int *__eax, unsigned int *__ebx, + unsigned int *__ecx, unsigned int *__edx) +{ + unsigned int __ext = __leaf & 0x80000000; + unsigned int __maxlevel = __get_cpuid_max (__ext, 0); + + if (__maxlevel == 0 || __maxlevel < __leaf) + return 0; + + __cpuid (__leaf, *__eax, *__ebx, *__ecx, *__edx); + return 1; +} + +/* Same as above, but sub-leaf can be specified. */ + +static __inline int +__get_cpuid_count (unsigned int __leaf, unsigned int __subleaf, + unsigned int *__eax, unsigned int *__ebx, + unsigned int *__ecx, unsigned int *__edx) +{ + unsigned int __ext = __leaf & 0x80000000; + unsigned int __maxlevel = __get_cpuid_max (__ext, 0); + + if (__maxlevel == 0 || __maxlevel < __leaf) + return 0; + + __cpuid_count (__leaf, __subleaf, *__eax, *__ebx, *__ecx, *__edx); + return 1; +} + +static __inline void +__cpuidex (int __cpuid_info[4], int __leaf, int __subleaf) +{ + __cpuid_count (__leaf, __subleaf, __cpuid_info[0], __cpuid_info[1], + __cpuid_info[2], __cpuid_info[3]); +} + +#endif /* _CPUID_H_INCLUDED */ diff --git a/src/components/implementation/simple_nf/ndpi/crossfire.c b/src/components/implementation/simple_nf/ndpi/crossfire.c new file mode 100644 index 0000000000..28cb3e5ca7 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/crossfire.c @@ -0,0 +1,88 @@ +/* + * crossfire.c + * + * Copyright (C) 2012-22 - ntop.org + * + * This file is part of nDPI, an open source deep packet inspection + * library based on the OpenDPI and PACE technology by ipoque GmbH + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_CROSSFIRE + +#include "ndpi_api.h" + + +static void ndpi_int_crossfire_add_connection(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow/* , ndpi_protocol_type_t protocol_type */) +{ + + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_CROSSFIRE, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); +} + +static void ndpi_search_crossfire_tcp_udp(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) +{ + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + + NDPI_LOG_DBG(ndpi_struct, "search crossfire\n"); + + if (packet->udp != 0) { + if (packet->payload_packet_len == 25 + && get_u_int32_t(packet->payload, 0) == ntohl(0xc7d91999) + && get_u_int16_t(packet->payload, 4) == ntohs(0x0200) + && get_u_int16_t(packet->payload, 22) == ntohs(0x7d00)) { + NDPI_LOG_INFO(ndpi_struct, "found Crossfire: udp packet\n"); + ndpi_int_crossfire_add_connection(ndpi_struct, flow); + return; + } + + } else if (packet->tcp != 0) { + + if (packet->payload_packet_len > 4 && memcmp(packet->payload, "GET /", 5) == 0) { + ndpi_parse_packet_line_info(ndpi_struct, flow); + if (packet->parsed_lines == 8 + && (packet->line[0].ptr != NULL && packet->line[0].len >= 30 + && (memcmp(&packet->payload[5], "notice/login_big", 16) == 0 + || memcmp(&packet->payload[5], "notice/login_small", 18) == 0)) + && memcmp(&packet->payload[packet->line[0].len - 19], "/index.asp HTTP/1.", 18) == 0 + && (packet->host_line.ptr != NULL && packet->host_line.len >= 13 + && (memcmp(packet->host_line.ptr, "crossfire", 9) == 0 + || memcmp(packet->host_line.ptr, "www.crossfire", 13) == 0)) + ) { + NDPI_LOG_DBG(ndpi_struct, "found Crossfire: HTTP request\n"); + ndpi_int_crossfire_add_connection(ndpi_struct, flow); + return; + } + } + + } + + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); +} + + +void init_crossfire_dissector(struct ndpi_detection_module_struct *ndpi_struct, u_int32_t *id) +{ + ndpi_set_bitmask_protocol_detection("Crossfire", ndpi_struct, *id, + NDPI_PROTOCOL_CROSSFIRE, + ndpi_search_crossfire_tcp_udp, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_TCP_OR_UDP_WITH_PAYLOAD_WITHOUT_RETRANSMISSION, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK); + *id += 1; +} diff --git a/src/components/implementation/simple_nf/ndpi/crynet.c b/src/components/implementation/simple_nf/ndpi/crynet.c new file mode 100644 index 0000000000..3d410c8070 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/crynet.c @@ -0,0 +1,81 @@ +/* + * crynet.c + * + * Copyright (C) 2022-23 - ntop.org + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_CRYNET + +#include "ndpi_api.h" + +static void ndpi_int_crynet_add_connection(struct ndpi_detection_module_struct * const ndpi_struct, + struct ndpi_flow_struct * const flow) +{ + NDPI_LOG_INFO(ndpi_struct, "found crynetwork\n"); + ndpi_set_detected_protocol(ndpi_struct, flow, + NDPI_PROTOCOL_CRYNET, + NDPI_PROTOCOL_UNKNOWN, + NDPI_CONFIDENCE_DPI); +} + +static void ndpi_search_crynet(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) +{ + struct ndpi_packet_struct const * const packet = &ndpi_struct->packet; + + NDPI_LOG_DBG(ndpi_struct, "search crynetwork\n"); + + if (packet->payload_packet_len < 26) + { + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + return; + } + + if (packet->payload_packet_len != packet->payload[0] + 10) + { + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + return; + } + + if (ntohs(get_u_int16_t(packet->payload, 3)) != 0x08ed || + packet->payload[16] != 0x01 || + packet->payload[20] != 0x07 || + ntohs(get_u_int16_t(packet->payload, 24)) != 0x0307) + { + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + return; + } + + ndpi_int_crynet_add_connection(ndpi_struct, flow); +} + +void init_crynet_dissector(struct ndpi_detection_module_struct *ndpi_struct, + u_int32_t *id) +{ + ndpi_set_bitmask_protocol_detection("CryNetwork", ndpi_struct, *id, + NDPI_PROTOCOL_CRYNET, + ndpi_search_crynet, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_UDP_WITH_PAYLOAD, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK + ); + + *id += 1; +} diff --git a/src/components/implementation/simple_nf/ndpi/csgo.c b/src/components/implementation/simple_nf/ndpi/csgo.c new file mode 100644 index 0000000000..a7d0cd130d --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/csgo.c @@ -0,0 +1,143 @@ +/* + * csgo.c + * + * Copyright (C) 2016-2017 Vitaly Lavrov + * + * This file is part of nDPI, an open source deep packet inspection + * library based on the OpenDPI and PACE technology by ipoque GmbH + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_CSGO + +#include "ndpi_api.h" + +static void ndpi_search_csgo(struct ndpi_detection_module_struct* ndpi_struct, struct ndpi_flow_struct* flow) { + struct ndpi_packet_struct* packet = &ndpi_struct->packet; + + if(packet->udp != NULL) { + if(packet->payload_packet_len < sizeof(uint32_t)) { + NDPI_LOG_DBG2(ndpi_struct, "Short csgo packet\n"); + return; + } + + uint32_t w = htonl(get_u_int32_t(packet->payload, 0)); + NDPI_LOG_DBG2(ndpi_struct, "CSGO: word %08x\n", w); + + if(!flow->l4.udp.csgo_state && packet->payload_packet_len == 23 && w == 0xfffffffful) { + if(!memcmp(packet->payload + 5, "connect0x", 9)) { + flow->l4.udp.csgo_state++; + memcpy(flow->l4.udp.csgo_strid, packet->payload + 5, 18); + NDPI_LOG_DBG2(ndpi_struct, "Found csgo connect0x\n"); + return; + } + } + + if(flow->l4.udp.csgo_state == 1 && packet->payload_packet_len >= 42 && w == 0xfffffffful) { + if(!memcmp(packet->payload + 24, flow->l4.udp.csgo_strid, 18)) { + flow->l4.udp.csgo_state++; + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_CSGO, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); + NDPI_LOG_INFO( ndpi_struct, "found csgo connect0x reply\n"); + return; + } + } + + if(packet->payload_packet_len == 8 && ( w == 0x3a180000 || w == 0x39180000) ) { + NDPI_LOG_INFO( ndpi_struct, "found csgo udp 8b\n"); + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_CSGO, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); + return; + } + + if(packet->payload_packet_len >= 36 && w == 0x56533031ul) { + NDPI_LOG_INFO( ndpi_struct, "found csgo udp\n"); + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_CSGO, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); + return; + } + + if(packet->payload_packet_len >= 36 && w == 0x01007364) { + uint32_t w2 = htonl(get_u_int32_t(packet->payload, 4)); + if(w2 == 0x70696e67) { + NDPI_LOG_INFO( ndpi_struct, "found csgo udp ping\n"); + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_CSGO, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); + return; + } + } + + if(packet->payload_packet_len > 6 && + flow->l4.udp.csgo_s2 < 3 && (w & 0xffff0000ul) == 0x0d1d0000) { + uint32_t w2 = get_u_int32_t(packet->payload, 2); + if(packet->payload_packet_len == 13) { + if(!flow->l4.udp.csgo_s2) { + flow->l4.udp.csgo_id2 = w2; + flow->l4.udp.csgo_s2 = 1; + NDPI_LOG_DBG2( ndpi_struct, "Found csgo udp 0d1d step1\n"); + return; + } + + if(flow->l4.udp.csgo_s2 == 1 && flow->l4.udp.csgo_id2 == w2) { + NDPI_LOG_DBG2( ndpi_struct, "Found csgo udp 0d1d step1 DUP\n"); + return; + } + flow->l4.udp.csgo_s2 = 3; + return; + } + + if(packet->payload_packet_len == 15) { + if(flow->l4.udp.csgo_s2 == 1 && flow->l4.udp.csgo_id2 == w2) { + NDPI_LOG_INFO( ndpi_struct, "found csgo udp 0d1d\n"); + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_CSGO, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); + return; + } + } + flow->l4.udp.csgo_s2 = 3; + } + + if(packet->payload_packet_len >= 140 && (w == 0x02124c6c || w == 0x02125c6c) && + !memcmp(&packet->payload[3], "lta\000mob\000tpc\000bhj\000bxd\000tae\000urg\000gkh\000", 32)) { + NDPI_LOG_INFO( ndpi_struct, "found csgo dictionary udp\n"); + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_CSGO, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); + return; + } + + if(packet->payload_packet_len >= 33 && packet->iph && packet->iph->daddr == 0xffffffff && + !memcmp(&packet->payload[17], "LanSearch", 9)) { + NDPI_LOG_INFO( ndpi_struct, "found csgo LanSearch udp\n"); + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_CSGO, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); + return; + } + + if(w == 0) { + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + return; + } + } + + if(flow->packet_counter > 5) + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); +} + +void init_csgo_dissector(struct ndpi_detection_module_struct *ndpi_struct, u_int32_t *id) +{ + ndpi_set_bitmask_protocol_detection("CSGO", ndpi_struct, *id, + NDPI_PROTOCOL_CSGO, + ndpi_search_csgo, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_UDP_WITH_PAYLOAD, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK); + + *id += 1; +} diff --git a/src/components/implementation/simple_nf/ndpi/dcerpc.c b/src/components/implementation/simple_nf/ndpi/dcerpc.c new file mode 100644 index 0000000000..688123ce51 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/dcerpc.c @@ -0,0 +1,105 @@ +/* + * dcerpc.c + * + * Copyright (C) 2011-18 by ntop.org + * + * This file is part of nDPI, an open source deep packet inspection + * library based on the OpenDPI and PACE technology by ipoque GmbH + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_RPC + +#include "ndpi_api.h" +#include + +static void ndpi_int_dcerpc_add_connection(struct ndpi_detection_module_struct + *ndpi_struct, struct ndpi_flow_struct *flow) +{ + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_RPC, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); +} + +static bool is_connection_oriented_dcerpc(struct ndpi_packet_struct *packet, struct ndpi_flow_struct *flow) +{ + if((packet->tcp != NULL) + && (packet->payload_packet_len >= 64) + && (packet->payload[0] == 0x05) /* version 5 */ + && (packet->payload[2] < 16) /* Packet type */ + && (((packet->payload[9]<<8) | packet->payload[8]) == packet->payload_packet_len) /* Packet Length */ + ) { + return true; + } + return false; +} + +static bool is_connectionless_dcerpc(struct ndpi_packet_struct *packet, struct ndpi_flow_struct *flow) +{ + u_int16_t fragment_len; + + if (packet->udp == NULL) + return false; + if (packet->payload_packet_len < 80) + return false; + if (packet->payload[0] != 0x04) /* type must be equal to 4 */ + return false; + if (packet->payload[1] > 10) /* must be <= CANCEL ACK or it's not connectionless DCE/RPC */ + return false; + if (packet->payload[3] & 0xFC) /* flags2: bit 3:8 are reserved for future use and must be set to 0 */ + return false; + if (packet->payload[4] & 0xEE) /* neither big endian nor little endian */ + return false; + if (packet->payload[5] > 3) /* invalid floating point type */ + return false; + + if(packet->payload[4] == 0x10) + fragment_len = (packet->payload[75] << 8) + packet->payload[74]; /* Big endian */ + else + fragment_len = (packet->payload[74] << 8) + packet->payload[75]; /* Little endian */ + + if(packet->payload_packet_len != (fragment_len+76 /* offset */ + 4 /* rest of the packet */)) + return false; /* Too short or too long, bot RPC */ + + return true; +} + +static void ndpi_search_dcerpc(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) +{ + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + + NDPI_LOG_DBG(ndpi_struct, "search DCERPC\n"); + if (is_connection_oriented_dcerpc(packet, flow) || is_connectionless_dcerpc(packet, flow)) { + NDPI_LOG_INFO(ndpi_struct, "found DCERPC\n"); + ndpi_int_dcerpc_add_connection(ndpi_struct, flow); + return; + } + + if(packet->payload_packet_len>1) + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); +} + + +void init_dcerpc_dissector(struct ndpi_detection_module_struct *ndpi_struct, u_int32_t *id) +{ + ndpi_set_bitmask_protocol_detection("RPC", ndpi_struct, *id, + NDPI_PROTOCOL_RPC, + ndpi_search_dcerpc, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_TCP_OR_UDP_WITH_PAYLOAD_WITHOUT_RETRANSMISSION, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK); + *id += 1; +} diff --git a/src/components/implementation/simple_nf/ndpi/dhcp.c b/src/components/implementation/simple_nf/ndpi/dhcp.c new file mode 100644 index 0000000000..12f8c57461 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/dhcp.c @@ -0,0 +1,202 @@ +/* + * dhcp.c + * + * Copyright (C) 2016-22 - ntop.org + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_DHCP + +#include "ndpi_api.h" + +/* freeradius/src/lib/dhcp.c */ +#define DHCP_CHADDR_LEN 6 +#define DHCP_SNAME_LEN 64 +#define DHCP_FILE_LEN 128 +#define DHCP_VEND_LEN 308 +#define DHCP_OPTION_MAGIC_NUMBER 0x63825363 +#define DHCP_MAGIC_LEN 4 + +PACK_ON +struct dhcp_packet { + uint8_t msgType; + uint8_t htype; + uint8_t hlen; + uint8_t hops; + uint32_t xid;/* 4 */ + uint16_t secs;/* 8 */ + uint16_t flags; + uint32_t ciaddr;/* 12 */ + uint32_t yiaddr;/* 16 */ + uint32_t siaddr;/* 20 */ + uint32_t giaddr;/* 24 */ + uint8_t chaddr[DHCP_CHADDR_LEN]; /* 28 */ + uint8_t pad[10]; /* 34 */ + uint8_t sname[DHCP_SNAME_LEN]; /* 44 */ + uint8_t file[DHCP_FILE_LEN]; /* 108 */ + uint8_t magic[DHCP_MAGIC_LEN]; /* 236 */ + uint8_t options[DHCP_VEND_LEN]; +} PACK_OFF; + + +static void ndpi_int_dhcp_add_connection(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) { + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_DHCP, + NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); +} + +static int is_dhcp_magic(uint8_t *magic) { + if((magic[0] == 0x63) + && (magic[1] == 0x82) + && (magic[2] == 0x53) + && (magic[3] == 0x63)) + return(1); + else + return(0); +} + +static void ndpi_search_dhcp_udp(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) { + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + u_int8_t msg_type = 0; + + NDPI_LOG_DBG(ndpi_struct, "search DHCP\n"); + + /* this detection also works for asymmetric dhcp traffic */ + + /* check standard DHCP 0.0.0.0:68 -> 255.255.255.255:67 */ + if(packet->udp) { + struct dhcp_packet *dhcp = (struct dhcp_packet*)packet->payload; + + if((packet->payload_packet_len >= 244 /* 244 is the offset of options[0] in struct dhcp_packet */) + && (packet->udp->source == htons(67) || packet->udp->source == htons(68)) + && (packet->udp->dest == htons(67) || packet->udp->dest == htons(68)) + && is_dhcp_magic(dhcp->magic)) { + u_int i = 0, foundValidMsgType = 0; + + u_int dhcp_options_size = ndpi_min(DHCP_VEND_LEN /* maximum size of options in struct dhcp_packet */, + packet->payload_packet_len - 240); + + + /* Parse options in two steps (since we need first the message type and + it seems there is no specific order in the options list) */ + + /* First iteration: search for the message type */ + while(i + 1 /* for the len */ < dhcp_options_size) { + u_int8_t id = dhcp->options[i]; + + if(id == 0xFF) + break; + else { + /* Prevent malformed packets to cause out-of-bounds accesses */ + u_int8_t len = ndpi_min(dhcp->options[i+1] /* len as found in the packet */, + dhcp_options_size - (i+2) /* 1 for the type and 1 for the value */); + if(len == 0) + break; + + if(id == 53 /* DHCP Message Type */) { + msg_type = dhcp->options[i+2]; + + if(msg_type <= 8) { + foundValidMsgType = 1; + break; + } + } + + i += len + 2; + } + } + + if(!foundValidMsgType) { +#ifdef DHCP_DEBUG + NDPI_LOG_DBG2(ndpi_struct, "[DHCP] Invalid message type %d. Not dhcp\n", msg_type); +#endif + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + return; + } + + /* Ok, we have a valid DHCP packet -> we can write to flow->protos.dhcp */ + NDPI_LOG_INFO(ndpi_struct, "found DHCP\n"); + ndpi_int_dhcp_add_connection(ndpi_struct, flow); + + /* Second iteration: parse the interesting options */ + while(i + 1 /* for the len */ < dhcp_options_size) { + u_int8_t id = dhcp->options[i]; + + if(id == 0xFF) + break; + else { + /* Prevent malformed packets to cause out-of-bounds accesses */ + u_int8_t len = ndpi_min(dhcp->options[i+1] /* len as found in the packet */, + dhcp_options_size - (i+2) /* 1 for the type and 1 for the value */); + + if(len == 0) + break; + +#ifdef DHCP_DEBUG + NDPI_LOG_DBG2(ndpi_struct, "[DHCP] Id=%d [len=%d]\n", id, len); +#endif + + if(id == 55 /* Parameter Request List / Fingerprint */) { + u_int idx, offset = 0; + + for(idx = 0; idx < len && offset < sizeof(flow->protos.dhcp.fingerprint) - 2; idx++) { + int rc = ndpi_snprintf((char*)&flow->protos.dhcp.fingerprint[offset], + sizeof(flow->protos.dhcp.fingerprint) - offset, + "%s%u", (idx > 0) ? "," : "", + (unsigned int)dhcp->options[i+2+idx] & 0xFF); + + if(rc < 0) break; else offset += rc; + } + + flow->protos.dhcp.fingerprint[sizeof(flow->protos.dhcp.fingerprint) - 1] = '\0'; + } else if(id == 60 /* Class Identifier */) { + char *name = (char*)&dhcp->options[i+2]; + int j = 0; + + j = ndpi_min(len, sizeof(flow->protos.dhcp.class_ident)-1); + strncpy((char*)flow->protos.dhcp.class_ident, name, j); + flow->protos.dhcp.class_ident[j] = '\0'; + } else if(id == 12 /* Host Name */) { + u_int8_t *name = &dhcp->options[i+2]; + +#ifdef DHCP_DEBUG + NDPI_LOG_DBG2(ndpi_struct, "[DHCP] '%.*s'\n",name,len); + // while(j < len) { printf( "%c", name[j]); j++; }; printf("\n"); +#endif + ndpi_hostname_sni_set(flow, name, len); + } + + i += len + 2; + } + } + } + } +} + + +void init_dhcp_dissector(struct ndpi_detection_module_struct *ndpi_struct, + u_int32_t *id) { + ndpi_set_bitmask_protocol_detection("DHCP", ndpi_struct, *id, + NDPI_PROTOCOL_DHCP, + ndpi_search_dhcp_udp, + NDPI_SELECTION_BITMASK_PROTOCOL_UDP_WITH_PAYLOAD, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK); + *id += 1; +} diff --git a/src/components/implementation/simple_nf/ndpi/dhcpv6.c b/src/components/implementation/simple_nf/ndpi/dhcpv6.c new file mode 100644 index 0000000000..9d1e1f1a8a --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/dhcpv6.c @@ -0,0 +1,68 @@ +/* + * dhcpv6.c + * + * Copyright (C) 2009-11 - ipoque GmbH + * Copyright (C) 2011-22 - ntop.org + * + * This file is part of nDPI, an open source deep packet inspection + * library based on the OpenDPI and PACE technology by ipoque GmbH + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_DHCPV6 + +#include "ndpi_api.h" + + +static void ndpi_int_dhcpv6_add_connection(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) +{ + + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_DHCPV6, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); +} + +static void ndpi_search_dhcpv6_udp(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) +{ + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + + NDPI_LOG_DBG(ndpi_struct, "search DHCPv6\n"); + + if (packet->payload_packet_len >= 4 && + (packet->udp->source == htons(546) || packet->udp->source == htons(547)) && + (packet->udp->dest == htons(546) || packet->udp->dest == htons(547)) && + packet->payload[0] >= 1 && packet->payload[0] <= 13) { + + NDPI_LOG_INFO(ndpi_struct, "found DHCPv6\n"); + ndpi_int_dhcpv6_add_connection(ndpi_struct, flow); + return; + } + + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); +} + + +void init_dhcpv6_dissector(struct ndpi_detection_module_struct *ndpi_struct, u_int32_t *id) +{ + ndpi_set_bitmask_protocol_detection("DHCPV6", ndpi_struct, *id, + NDPI_PROTOCOL_DHCPV6, + ndpi_search_dhcpv6_udp, + NDPI_SELECTION_BITMASK_PROTOCOL_V6_UDP_WITH_PAYLOAD, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK); + *id += 1; +} diff --git a/src/components/implementation/simple_nf/ndpi/diameter.c b/src/components/implementation/simple_nf/ndpi/diameter.c new file mode 100644 index 0000000000..2ed9748649 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/diameter.c @@ -0,0 +1,116 @@ +/* + * diameter.c + * + * Copyright (C) 2018 - ntop.org + * + * This file is part of nDPI, an open source deep packet inspection + * library based on the OpenDPI and PACE technology by ipoque GmbH + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + * Based on code of: + * Michele Campus - + */ +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_DIAMETER + +#include "ndpi_api.h" + + +// Header Flags possibile values +#define DIAMETER_REQUEST 0X80 +#define DIAMETER_PROXYABLE 0X40 +#define DIAMETER_ERROR 0X20 +#define DIAMETER_RETRASM 0X10 + +typedef enum { + AC = 271, + AS = 274, + CC = 272, + CE = 257, + DW = 280, + DP = 282, + RA = 258, + ST = 275 +} com_type_t; + +#define DIAM_HEADER_LEN 20 + +// DIAMETER header +struct diameter_header_t +{ + u_int8_t version; + u_int8_t length[3]; + u_int8_t flags; + u_int8_t com_code[3]; + u_int32_t app_id; + u_int32_t hop_id; + u_int32_t end_id; +}; + + +// Check packet +static int is_diameter(struct ndpi_packet_struct *packet) +{ + struct diameter_header_t *diameter = (struct diameter_header_t *)packet->payload; + + if(packet->payload_packet_len >= sizeof(struct diameter_header_t) && + diameter->version == 0x01 && + (diameter->flags == DIAMETER_REQUEST || + diameter->flags == DIAMETER_PROXYABLE || + diameter->flags == DIAMETER_ERROR || + diameter->flags == DIAMETER_RETRASM)) { + + u_int16_t com_code = diameter->com_code[2] + (diameter->com_code[1] << 8) + (diameter->com_code[0] << 8); + + if(com_code == AC || com_code == AS || + com_code == CC || com_code == CE || + com_code == DW || com_code == DP || + com_code == RA || com_code == ST) + return 0; + } + + return -1; +} + + +static void ndpi_search_diameter(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) +{ + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + + if(packet->tcp) { + int ret = is_diameter(packet); + if(ret == 0) { + NDPI_LOG_INFO(ndpi_struct, "found Diameter\n"); + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_DIAMETER, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); + return; + } + } + + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); +} + + +void init_diameter_dissector(struct ndpi_detection_module_struct *ndpi_struct, u_int32_t *id) +{ + ndpi_set_bitmask_protocol_detection("Diameter", ndpi_struct, *id, + NDPI_PROTOCOL_DIAMETER, ndpi_search_diameter, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_TCP_WITH_PAYLOAD_WITHOUT_RETRANSMISSION, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, ADD_TO_DETECTION_BITMASK); + + *id += 1; +} + diff --git a/src/components/implementation/simple_nf/ndpi/discord.c b/src/components/implementation/simple_nf/ndpi/discord.c new file mode 100644 index 0000000000..e3e59a7e46 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/discord.c @@ -0,0 +1,89 @@ +/* + * discord.c + * + * Copyright (C) 2022-23 - ntop.org + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_DISCORD + +#include "ndpi_api.h" + +static void ndpi_int_discord_add_connection(struct ndpi_detection_module_struct * const ndpi_struct, + struct ndpi_flow_struct * const flow) +{ + NDPI_LOG_INFO(ndpi_struct, "found discord\n"); + ndpi_set_detected_protocol(ndpi_struct, flow, + NDPI_PROTOCOL_DISCORD, + NDPI_PROTOCOL_UNKNOWN, + NDPI_CONFIDENCE_DPI); +} + +static void ndpi_search_discord(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) +{ + struct ndpi_packet_struct const * const packet = &ndpi_struct->packet; + + NDPI_LOG_DBG(ndpi_struct, "search discord\n"); + + if (packet->payload_packet_len == 8 && + ntohl(get_u_int32_t(packet->payload, 0)) == 0x1337cafe) + { + ndpi_int_discord_add_connection(ndpi_struct, flow); + return; + } + + if (packet->payload_packet_len == 74) + { + if (flow->packet_counter == 1 && + ntohl(get_u_int32_t(packet->payload, 0)) == 0x00010046) + { + /* Wait for the next packet, hopefully beeing able to dissect the client IP. */ + return; + } + + if (flow->packet_counter == 2 && + ntohl(get_u_int32_t(packet->payload, 0)) == 0x00020046) + { + /* Dissect client IP. */ + size_t len = sizeof(flow->protos.discord.client_ip) - 1; + strncpy(flow->protos.discord.client_ip, (char const *)&packet->payload[8], len); + flow->protos.discord.client_ip[len] = '\0'; + ndpi_int_discord_add_connection(ndpi_struct, flow); + return; + } + } + + if (flow->packet_counter >= 5) + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); +} + +void init_discord_dissector(struct ndpi_detection_module_struct *ndpi_struct, + u_int32_t *id) +{ + ndpi_set_bitmask_protocol_detection("Discord", ndpi_struct, *id, + NDPI_PROTOCOL_DISCORD, + ndpi_search_discord, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_UDP_WITH_PAYLOAD, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK + ); + + *id += 1; +} diff --git a/src/components/implementation/simple_nf/ndpi/dnp3.c b/src/components/implementation/simple_nf/ndpi/dnp3.c new file mode 100644 index 0000000000..9361d8bfd0 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/dnp3.c @@ -0,0 +1,67 @@ +/* + * dnp3.c + * + * Copyright (C) 2011-22 - ntop.org + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + * Created by Cesar HM + * + */ + +#include "ndpi_protocol_ids.h" +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_DNP3 +#include "ndpi_api.h" + +/* + https://www.ixiacom.com/company/blog/scada-distributed-network-protocol-dnp3 +*/ + +/* ******************************************************** */ + +static void ndpi_search_dnp3_tcp(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) { + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + + NDPI_LOG_DBG(ndpi_struct, "search DNP3\n"); + + if(packet->tcp) { + /* The payload of DNP3 is 10 bytes long. + * Header bytes: 0x0564 + */ + if ((packet->payload_packet_len >= 10) + && (packet->payload[0] == 0x05) + && (packet->payload[1] == 0x64)) { + NDPI_LOG_INFO(ndpi_struct, "found DNP3\n"); + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_DNP3, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); + return; + } + } + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + +} + +/* ******************************************************** */ + +void init_dnp3_dissector(struct ndpi_detection_module_struct *ndpi_struct, + u_int32_t *id) { + + ndpi_set_bitmask_protocol_detection("DNP3", ndpi_struct, *id, + NDPI_PROTOCOL_DNP3, + ndpi_search_dnp3_tcp, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_TCP_WITH_PAYLOAD_WITHOUT_RETRANSMISSION, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK); + *id += 1; +} diff --git a/src/components/implementation/simple_nf/ndpi/dns.c b/src/components/implementation/simple_nf/ndpi/dns.c new file mode 100644 index 0000000000..d99e94e8be --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/dns.c @@ -0,0 +1,838 @@ +/* + * dns.c + * + * Copyright (C) 2012-22 - ntop.org + * + * This file is part of nDPI, an open source deep packet inspection + * library based on the OpenDPI and PACE technology by ipoque GmbH + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_DNS + +#include "ndpi_api.h" + +#define FLAGS_MASK 0x8000 + +/* #define DNS_DEBUG 1 */ + +#define DNS_PORT 53 +#define LLMNR_PORT 5355 +#define MDNS_PORT 5353 + +#define PKT_LEN_ALERT 512 + +/* ndpi_main.c */ +extern u_int8_t ndpi_iph_is_valid_and_not_fragmented(const struct ndpi_iphdr *iph, const u_int16_t ipsize); + +static void ndpi_search_dns(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow); + +/* *********************************************** */ + +static void ndpi_check_dns_type(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow, + u_int16_t dns_type) { + /* https://en.wikipedia.org/wiki/List_of_DNS_record_types */ + + switch(dns_type) { + /* Obsolete record types */ + case 3: + case 4: + case 254: + case 7: + case 8: + case 9: + case 14: + case 253: + case 11: + /* case 33: */ /* SRV */ + case 10: + case 38: + case 30: + case 25: + case 24: + case 13: + case 17: + case 19: + case 20: + case 21: + case 22: + case 23: + case 26: + case 31: + case 32: + case 34: + case 42: + case 40: + case 27: + case 100: + case 101: + case 102: + case 103: + case 99: + case 56: + case 57: + case 58: + case 104: + case 105: + case 106: + case 107: + case 259: + ndpi_set_risk(ndpi_struct, flow, NDPI_DNS_SUSPICIOUS_TRAFFIC, "Obsolete DNS record type"); + break; + } +} + +/* *********************************************** */ + +static u_int16_t checkPort(u_int16_t port) { + switch(port) { + case DNS_PORT: + return(NDPI_PROTOCOL_DNS); + case LLMNR_PORT: + return(NDPI_PROTOCOL_LLMNR); + case MDNS_PORT: + return(NDPI_PROTOCOL_MDNS); + } + + return(0); +} + +/* *********************************************** */ + +static int isMDNSMulticastAddress(struct ndpi_packet_struct * const packet) +{ + return (packet->iph && ntohl(packet->iph->daddr) == 0xE00000FB /* multicast: 224.0.0.251 */) || + (packet->iphv6 && ntohl(packet->iphv6->ip6_dst.u6_addr.u6_addr32[0]) == 0xFF020000 && + ntohl(packet->iphv6->ip6_dst.u6_addr.u6_addr32[1]) == 0x00000000 && + ntohl(packet->iphv6->ip6_dst.u6_addr.u6_addr32[2]) == 0x00000000 && + ntohl(packet->iphv6->ip6_dst.u6_addr.u6_addr32[3]) == 0x000000FB /* multicast: FF02::FB */); +} + +static int isLLMNRMulticastAddress(struct ndpi_packet_struct *const packet) +{ + return (packet->iph && ntohl(packet->iph->daddr) == 0xE00000FC /* multicast: 224.0.0.252 */) || + (packet->iphv6 && ntohl(packet->iphv6->ip6_dst.u6_addr.u6_addr32[0]) == 0xFF020000 && + ntohl(packet->iphv6->ip6_dst.u6_addr.u6_addr32[1]) == 0x00000000 && + ntohl(packet->iphv6->ip6_dst.u6_addr.u6_addr32[2]) == 0x00000000 && + ntohl(packet->iphv6->ip6_dst.u6_addr.u6_addr32[3]) == 0x00010003 /* multicast: FF02::1:3 */); +} + +/* *********************************************** */ + +static u_int16_t checkDNSSubprotocol(u_int16_t sport, u_int16_t dport) { + u_int16_t rc = checkPort(sport); + + if(rc == 0) + return(checkPort(dport)); + else + return(rc); +} + +/* *********************************************** */ + +static u_int16_t get16(u_int *i, const u_int8_t *payload) { + u_int16_t v = *(u_int16_t*)&payload[*i]; + + (*i) += 2; + + return(ntohs(v)); +} + +/* *********************************************** */ + +static u_int getNameLength(u_int i, const u_int8_t *payload, u_int payloadLen) { + if(i >= payloadLen) + return(0); + else if(payload[i] == 0x00) + return(1); + else if(payload[i] == 0xC0) + return(2); + else { + u_int8_t len = payload[i]; + u_int8_t off = len + 1; + + if(off == 0) /* Bad packet */ + return(0); + else + return(off + getNameLength(i+off, payload, payloadLen)); + } +} +/* + allowed chars for dns names A-Z 0-9 _ - + Perl script for generation map: + my @M; + for(my $ch=0; $ch < 256; $ch++) { + $M[$ch >> 5] |= 1 << ($ch & 0x1f) if chr($ch) =~ /[a-z0-9_-]/i; + } + print join(',', map { sprintf "0x%08x",$_ } @M),"\n"; +*/ + +static uint32_t dns_validchar[8] = { + 0x00000000,0x03ff2000,0x87fffffe,0x07fffffe,0,0,0,0 +}; + +/* *********************************************** */ + +static char* dns_error_code2string(u_int16_t error_code, char *buf, u_int buf_len) { + switch(error_code) { + case 0: return((char*)"NOERROR"); + case 1: return((char*)"FORMERR"); + case 2: return((char*)"SERVFAIL"); + case 3: return((char*)"NXDOMAIN"); + case 4: return((char*)"NOTIMP"); + case 5: return((char*)"REFUSED"); + case 6: return((char*)"YXDOMAIN"); + case 7: return((char*)"XRRSET"); + case 8: return((char*)"NOTAUTH"); + case 9: return((char*)"NOTZONE"); + + default: + snprintf(buf, buf_len, "%u", error_code); + return(buf); + } +} + +/* *********************************************** */ + +static u_int8_t ndpi_grab_dns_name(struct ndpi_packet_struct *packet, + u_int *off /* payload offset */, + char *_hostname, u_int max_len, + u_int *_hostname_len) { + u_int8_t hostname_is_valid = 1; + u_int j = 0; + + max_len--; + + while((j < max_len) + && ((*off) < packet->payload_packet_len) + && (packet->payload[(*off)] != '\0')) { + u_int8_t c, cl = packet->payload[(*off)++]; + + if(((cl & 0xc0) != 0) || // we not support compressed names in query + ((*off) + cl >= packet->payload_packet_len)) { + j = 0; + break; + } + + if(j && (j < max_len)) _hostname[j++] = '.'; + + while((j < max_len) && (cl != 0)) { + u_int32_t shift; + + c = packet->payload[(*off)++]; + shift = ((u_int32_t) 1) << (c & 0x1f); + + if((dns_validchar[c >> 5] & shift)) { + _hostname[j++] = tolower(c); + } else { + if (isprint(c) == 0) { + hostname_is_valid = 0; + _hostname[j++] = '?'; + } else { + _hostname[j++] = '_'; + } + } + + cl--; + } + } + + _hostname[j] = '\0', *_hostname_len = j; + + return(hostname_is_valid); +} + +/* *********************************************** */ + +static int search_valid_dns(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow, + struct ndpi_dns_packet_header *dns_header, + u_int payload_offset, u_int8_t *is_query) { + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + u_int x = payload_offset; + + memcpy(dns_header, (struct ndpi_dns_packet_header*)&packet->payload[x], + sizeof(struct ndpi_dns_packet_header)); + + dns_header->tr_id = ntohs(dns_header->tr_id); + dns_header->flags = ntohs(dns_header->flags); + dns_header->num_queries = ntohs(dns_header->num_queries); + dns_header->num_answers = ntohs(dns_header->num_answers); + dns_header->authority_rrs = ntohs(dns_header->authority_rrs); + dns_header->additional_rrs = ntohs(dns_header->additional_rrs); + + x += sizeof(struct ndpi_dns_packet_header); + + /* 0x0000 QUERY */ + if((dns_header->flags & FLAGS_MASK) == 0x0000) + *is_query = 1; + /* 0x8000 RESPONSE */ + else + *is_query = 0; + + if(*is_query) { + /* DNS Request */ + if((dns_header->num_queries <= NDPI_MAX_DNS_REQUESTS) + // && (dns_header->num_answers == 0) + && (((dns_header->flags & 0x2800) == 0x2800 /* Dynamic DNS Update */) + || ((dns_header->flags & 0xFCF0) == 0x00) /* Standard Query */ + || ((dns_header->flags & 0xFCFF) == 0x0800) /* Inverse query */ + || ((dns_header->num_answers == 0) && (dns_header->authority_rrs == 0)))) { + /* This is a good query */ + while(x+2 < packet->payload_packet_len) { + if(packet->payload[x] == '\0') { + x++; + flow->protos.dns.query_type = get16(&x, packet->payload); +#ifdef DNS_DEBUG + NDPI_LOG_DBG2(ndpi_struct, "query_type=%2d\n", flow->protos.dns.query_type); + printf("[DNS] [request] query_type=%d\n", flow->protos.dns.query_type); +#endif + break; + } else + x++; + } + } else { + ndpi_set_risk(ndpi_struct, flow, NDPI_MALFORMED_PACKET, "Invalid DNS Header"); + return(1 /* invalid */); + } + } else { + /* DNS Reply */ + + if(flow->protos.dns.query_type == 0) { + /* In case we missed the query packet... */ + + while(x+2 < packet->payload_packet_len) { + if(packet->payload[x] == '\0') { + x++; + flow->protos.dns.query_type = get16(&x, packet->payload); +#ifdef DNS_DEBUG + NDPI_LOG_DBG2(ndpi_struct, "query_type=%2d\n", flow->protos.dns.query_type); + printf("[DNS] [request] query_type=%d\n", flow->protos.dns.query_type); +#endif + break; + } else + x++; + } + } + + flow->protos.dns.reply_code = dns_header->flags & 0x0F; + + if(flow->protos.dns.reply_code != 0) { + char str[32], buf[16]; + + snprintf(str, sizeof(str), "DNS Error Code %s", + dns_error_code2string(flow->protos.dns.reply_code, buf, sizeof(buf))); + ndpi_set_risk(ndpi_struct, flow, NDPI_ERROR_CODE_DETECTED, str); + } else { + if(ndpi_isset_risk(ndpi_struct, flow, NDPI_SUSPICIOUS_DGA_DOMAIN)) { + ndpi_set_risk(ndpi_struct, flow, NDPI_RISKY_DOMAIN, "DGA Name Query with no Error Code"); + } + } + + if((dns_header->num_queries > 0) && (dns_header->num_queries <= NDPI_MAX_DNS_REQUESTS) /* Don't assume that num_queries must be zero */ + && ((((dns_header->num_answers > 0) && (dns_header->num_answers <= NDPI_MAX_DNS_REQUESTS)) + || ((dns_header->authority_rrs > 0) && (dns_header->authority_rrs <= NDPI_MAX_DNS_REQUESTS)) + || ((dns_header->additional_rrs > 0) && (dns_header->additional_rrs <= NDPI_MAX_DNS_REQUESTS)))) + ) { + /* This is a good reply: we dissect it both for request and response */ + + if(dns_header->num_queries > 0) { +#ifdef DNS_DEBUG + u_int16_t rsp_type; +#endif + u_int16_t num; + + for(num = 0; num < dns_header->num_queries; num++) { + u_int16_t data_len; + + if((x+6) >= packet->payload_packet_len) { + break; + } + + if((data_len = getNameLength(x, packet->payload, + packet->payload_packet_len)) == 0) { + break; + } else + x += data_len; + + if((x+8) >= packet->payload_packet_len) { + break; + } + + /* To avoid warning: variable ‘rsp_type’ set but not used [-Wunused-but-set-variable] */ +#ifdef DNS_DEBUG + rsp_type = get16(&x, packet->payload); +#else + get16(&x, packet->payload); +#endif + +#ifdef DNS_DEBUG + printf("[DNS] [response (query)] response_type=%d\n", rsp_type); +#endif + + /* here x points to the response "class" field */ + x += 2; /* Skip class */ + } + } + + if(dns_header->num_answers > 0) { + u_int16_t rsp_type; + u_int32_t rsp_ttl; + u_int16_t num; + u_int8_t found = 0; + + for(num = 0; num < dns_header->num_answers; num++) { + u_int16_t data_len; + + if((x+6) >= packet->payload_packet_len) { + break; + } + + if((data_len = getNameLength(x, packet->payload, + packet->payload_packet_len)) == 0) { + break; + } else + x += data_len; + + if((x+8) >= packet->payload_packet_len) { + break; + } + + rsp_type = get16(&x, packet->payload); + rsp_ttl = ntohl(*((u_int32_t*)&packet->payload[x+2])); + + if(rsp_ttl == 0) + ndpi_set_risk(ndpi_struct, flow, NDPI_MINOR_ISSUES, "DNS Record with zero TTL"); + +#ifdef DNS_DEBUG + printf("[DNS] TTL = %u\n", rsp_ttl); + printf("[DNS] [response] response_type=%d\n", rsp_type); +#endif + + if(found == 0) { + ndpi_check_dns_type(ndpi_struct, flow, rsp_type); + flow->protos.dns.rsp_type = rsp_type; + } + + /* x points to the response "class" field */ + if((x+12) <= packet->payload_packet_len) { + x += 6; + data_len = get16(&x, packet->payload); + + if((x + data_len) <= packet->payload_packet_len) { +#ifdef DNS_DEBUG + printf("[DNS] [rsp_type: %u][data_len: %u]\n", rsp_type, data_len); +#endif + + if(rsp_type == 0x05 /* CNAME */) { + ; + } else if(rsp_type == 0x0C /* PTR */) { + u_int16_t ptr_len = (packet->payload[x-2] << 8) + packet->payload[x-1]; + + if((x + ptr_len) <= packet->payload_packet_len) { + if(found == 0) { + u_int len; + + ndpi_grab_dns_name(packet, &x, + flow->protos.dns.ptr_domain_name, + sizeof(flow->protos.dns.ptr_domain_name), &len); + found = 1; + } + } + } else if((((rsp_type == 0x1) && (data_len == 4)) /* A */ + || ((rsp_type == 0x1c) && (data_len == 16)) /* AAAA */ + )) { + if(found == 0) { + memcpy(&flow->protos.dns.rsp_addr, packet->payload + x, data_len); + found = 1; + } + } + + x += data_len; + } + } + + if(found && (dns_header->additional_rrs == 0)) { + /* + In case we have RR we need to iterate + all the answers and not just consider the + first one as we need to properly move 'x' + to the right offset + */ + break; + } + } + } + + if(dns_header->additional_rrs > 0) { + /* + Dissect the rest of the packet only if there are + additional_rrs as we need to check fo EDNS(0) + + In this case we need to go through the whole packet + as we need to update the 'x' offset + */ + if(dns_header->authority_rrs > 0) { +#ifdef DNS_DEBUG + u_int16_t rsp_type; +#endif + u_int16_t num; + + for(num = 0; num < dns_header->authority_rrs; num++) { + u_int16_t data_len; + + if((x+6) >= packet->payload_packet_len) { + break; + } + + if((data_len = getNameLength(x, packet->payload, + packet->payload_packet_len)) == 0) { + break; + } else + x += data_len; + + if((x+8) >= packet->payload_packet_len) { + break; + } + + /* To avoid warning: variable ‘rsp_type’ set but not used [-Wunused-but-set-variable] */ +#ifdef DNS_DEBUG + rsp_type = get16(&x, packet->payload); +#else + get16(&x, packet->payload); +#endif + +#ifdef DNS_DEBUG + printf("[DNS] [RRS response] response_type=%d\n", rsp_type); +#endif + + /* here x points to the response "class" field */ + if((x+12) <= packet->payload_packet_len) { + x += 6; + data_len = get16(&x, packet->payload); + + if((x + data_len) <= packet->payload_packet_len) + x += data_len; + } + } + } + + if(dns_header->additional_rrs > 0) { + u_int16_t rsp_type; + u_int16_t num; + + for(num = 0; num < dns_header->additional_rrs; num++) { + u_int16_t data_len; + + if((x+6) > packet->payload_packet_len) { + break; + } + + if((data_len = getNameLength(x, packet->payload, packet->payload_packet_len)) == 0) { + break; + } else + x += data_len; + + if((x+10) > packet->payload_packet_len) { + break; + } + + rsp_type = get16(&x, packet->payload); + +#ifdef DNS_DEBUG + printf("[DNS] [RR response] response_type=%d\n", rsp_type); +#endif + + if(rsp_type == 41 /* OPT */) { + /* https://en.wikipedia.org/wiki/Extension_Mechanisms_for_DNS */ + flow->protos.dns.edns0_udp_payload_size = ntohs(*((u_int16_t*)&packet->payload[x])); /* EDNS(0) */ + +#ifdef DNS_DEBUG + printf("[DNS] [response] edns0_udp_payload_size: %u\n", flow->protos.dns.edns0_udp_payload_size); +#endif + x += 6; + } else { + x += 6; + } + + if((data_len = getNameLength(x, packet->payload, packet->payload_packet_len)) == 0) { + break; + } else + x += data_len; + } + } + + if((flow->detected_protocol_stack[0] == NDPI_PROTOCOL_DNS) + || (flow->detected_protocol_stack[1] == NDPI_PROTOCOL_DNS)) { + /* Request already set the protocol */ + // flow->extra_packets_func = NULL; /* Removed so the caller can keep dissecting DNS flows */ + } else { + /* We missed the request */ + u_int16_t s_port = packet->udp ? ntohs(packet->udp->source) : ntohs(packet->tcp->source); + + ndpi_set_detected_protocol(ndpi_struct, flow, checkPort(s_port), NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); + } + } + } + } + + /* Valid */ + return(0); +} + +/* *********************************************** */ + +static int search_dns_again(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) { + /* possibly dissect the DNS reply */ + ndpi_search_dns(ndpi_struct, flow); + + if(flow->protos.dns.num_answers != 0) + return(0); + + /* Possibly more processing */ + return(1); +} + +/* *********************************************** */ + +static void ndpi_search_dns(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) { + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + int payload_offset; + u_int8_t is_query; + u_int16_t s_port = 0, d_port = 0; + + NDPI_LOG_DBG(ndpi_struct, "search DNS\n"); + + if(packet->udp != NULL) { + s_port = ntohs(packet->udp->source); + d_port = ntohs(packet->udp->dest); + payload_offset = 0; + + /* For MDNS/LLMNR: If the packet is not a response, dest addr needs to be multicast. */ + if ((d_port == MDNS_PORT && isMDNSMulticastAddress(packet) == 0) || + (d_port == LLMNR_PORT && isLLMNRMulticastAddress(packet) == 0)) + { + if (packet->payload_packet_len > 5 && + ntohs(get_u_int16_t(packet->payload, 2)) != 0 && + ntohs(get_u_int16_t(packet->payload, 4)) != 0) + { + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + return; + } + } + } else if(packet->tcp != NULL) /* pkt size > 512 bytes */ { + s_port = ntohs(packet->tcp->source); + d_port = ntohs(packet->tcp->dest); + payload_offset = 2; + } + + if(((s_port == DNS_PORT) || (d_port == DNS_PORT) + || (s_port == MDNS_PORT) || (d_port == MDNS_PORT) + || (d_port == LLMNR_PORT)) + && (packet->payload_packet_len > sizeof(struct ndpi_dns_packet_header)+payload_offset)) { + struct ndpi_dns_packet_header dns_header; + u_int len, off; + int invalid = search_valid_dns(ndpi_struct, flow, &dns_header, payload_offset, &is_query); + ndpi_protocol ret; + u_int num_queries, idx; + char _hostname[256]; + + ret.master_protocol = NDPI_PROTOCOL_UNKNOWN; + ret.app_protocol = (d_port == LLMNR_PORT) ? NDPI_PROTOCOL_LLMNR : ((d_port == MDNS_PORT) ? NDPI_PROTOCOL_MDNS : NDPI_PROTOCOL_DNS); + + if(invalid) { + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + return; + } + + /* extract host name server */ + off = sizeof(struct ndpi_dns_packet_header) + payload_offset; + + /* Before continuing let's dissect the following queries to see if they are valid */ + for(idx=off, num_queries=0; (num_queries < dns_header.num_queries) && (idx < packet->payload_packet_len);) { + u_int32_t i, tot_len = 0; + + for(i=idx; ipayload_packet_len;) { + u_int8_t is_ptr = 0, name_len = packet->payload[i]; /* Lenght of the individual name blocks aaa.bbb.com */ + + if(name_len == 0) { + tot_len++; /* \0 */ + /* End of query */ + break; + } else if((name_len & 0xC0) == 0xC0) + is_ptr = 1, name_len = 0; /* Pointer */ + +#ifdef DNS_DEBUG + if((!is_ptr) && (name_len > 0)) { + printf("[DNS] [name_len: %u][", name_len); + + { + int idx; + + for(idx=0; idxpayload[i+1+idx]); + + printf("]\n"); + } + } +#endif + + i += name_len+1, tot_len += name_len+1; + if(is_ptr) break; + } /* for */ + +#ifdef DNS_DEBUG + printf("[DNS] [tot_len: %u]\n\n", tot_len+4 /* type + class */); +#endif + + if(((i+4 /* Skip query type and class */) > packet->payload_packet_len) + || ((packet->payload[i+1] == 0x0) && (packet->payload[i+2] == 0x0)) /* Query type cannot be 0 */ + || (tot_len > 253) + ) { + /* Invalid */ +#ifdef DNS_DEBUG + printf("[DNS] Invalid query len [%u >= %u]\n", i+4, packet->payload_packet_len); +#endif + ndpi_set_risk(ndpi_struct, flow, NDPI_MALFORMED_PACKET, "Invalid DNS Query Lenght"); + break; + } else { + idx = i+5, num_queries++; + } + } /* for */ + + u_int8_t hostname_is_valid = ndpi_grab_dns_name(packet, &off, _hostname, sizeof(_hostname), &len); + + ndpi_hostname_sni_set(flow, (const u_int8_t *)_hostname, len); + + if (hostname_is_valid == 0) + ndpi_set_risk(ndpi_struct, flow, NDPI_INVALID_CHARACTERS, NULL); + + if(len > 0) { + ndpi_protocol_match_result ret_match; + + ret.app_protocol = ndpi_match_host_subprotocol(ndpi_struct, flow, + flow->host_server_name, + strlen(flow->host_server_name), + &ret_match, + NDPI_PROTOCOL_DNS); + + /* Category is always NDPI_PROTOCOL_CATEGORY_NETWORK, regardless of the subprotocol */ + flow->category = NDPI_PROTOCOL_CATEGORY_NETWORK; + + if(ret.app_protocol == NDPI_PROTOCOL_UNKNOWN) + ret.master_protocol = checkDNSSubprotocol(s_port, d_port); + else + ret.master_protocol = NDPI_PROTOCOL_DNS; + + ndpi_check_dga_name(ndpi_struct, flow, flow->host_server_name, 1, 0); + } + + /* Report if this is a DNS query or reply */ + flow->protos.dns.is_query = is_query; + + if(is_query) { + /* In this case we say that the protocol has been detected just to let apps carry on with their activities */ + ndpi_set_detected_protocol(ndpi_struct, flow, ret.app_protocol, ret.master_protocol, NDPI_CONFIDENCE_DPI); + + /* We have never triggered extra-dissection for LLMNR. Keep the old behaviour */ + if(ret.master_protocol != NDPI_PROTOCOL_LLMNR) { + /* Don't use just 1 as in TCP DNS more packets could be returned (e.g. ACK). */ + flow->max_extra_packets_to_check = 5; + flow->extra_packets_func = search_dns_again; + } + return; /* The response will set the verdict */ + } + + flow->protos.dns.num_queries = (u_int8_t)dns_header.num_queries, + flow->protos.dns.num_answers = (u_int8_t) (dns_header.num_answers + dns_header.authority_rrs + dns_header.additional_rrs); + +#ifdef DNS_DEBUG + NDPI_LOG_DBG2(ndpi_struct, "[num_queries=%d][num_answers=%d][reply_code=%u][rsp_type=%u][host_server_name=%s]\n", + flow->protos.dns.num_queries, flow->protos.dns.num_answers, + flow->protos.dns.reply_code, flow->protos.dns.rsp_type, flow->host_server_name + ); +#endif + + if(flow->detected_protocol_stack[0] == NDPI_PROTOCOL_UNKNOWN) { + /** + Do not set the protocol with DNS if ndpi_match_host_subprotocol() has + matched a subprotocol + **/ + NDPI_LOG_INFO(ndpi_struct, "found DNS\n"); + ndpi_set_detected_protocol(ndpi_struct, flow, ret.app_protocol, ret.master_protocol, NDPI_CONFIDENCE_DPI); + } else { + if((flow->detected_protocol_stack[0] == NDPI_PROTOCOL_DNS) + || (flow->detected_protocol_stack[1] == NDPI_PROTOCOL_DNS)) + ; + else + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + } + } + + if(flow->packet_counter > 3) + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + + if((flow->detected_protocol_stack[0] == NDPI_PROTOCOL_DNS) + || (flow->detected_protocol_stack[1] == NDPI_PROTOCOL_DNS)) { + /* TODO: add support to RFC6891 to avoid some false positives */ + if((packet->udp != NULL) + && (packet->payload_packet_len > PKT_LEN_ALERT) + && (packet->payload_packet_len > flow->protos.dns.edns0_udp_payload_size) + ) { + char str[48]; + + snprintf(str, sizeof(str), "%u Bytes DNS Packet", packet->payload_packet_len); + ndpi_set_risk(ndpi_struct, flow, NDPI_DNS_LARGE_PACKET, str); + } + + if(packet->iph != NULL) { + /* IPv4 */ + u_int8_t flags = ((u_int8_t*)packet->iph)[6]; + + /* 0: fragmented; 1: not fragmented */ + if((flags & 0x20) + || (ndpi_iph_is_valid_and_not_fragmented(packet->iph, packet->l3_packet_len) == 0)) { + ndpi_set_risk(ndpi_struct, flow, NDPI_DNS_FRAGMENTED, NULL); + } + } else if(packet->iphv6 != NULL) { + /* IPv6 */ + const struct ndpi_ip6_hdrctl *ip6_hdr = &packet->iphv6->ip6_hdr; + + if(ip6_hdr->ip6_un1_nxt == 0x2C /* Next Header: Fragment Header for IPv6 (44) */) { + ndpi_set_risk(ndpi_struct, flow, NDPI_DNS_FRAGMENTED, NULL); + } + } + } +} + +/* *********************************************** */ + +void init_dns_dissector(struct ndpi_detection_module_struct *ndpi_struct, + u_int32_t *id) { + ndpi_set_bitmask_protocol_detection("DNS", ndpi_struct, *id, + NDPI_PROTOCOL_DNS, + ndpi_search_dns, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_TCP_OR_UDP_WITH_PAYLOAD_WITHOUT_RETRANSMISSION, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK); + + *id += 1; + +} diff --git a/src/components/implementation/simple_nf/ndpi/dnscrypt.c b/src/components/implementation/simple_nf/ndpi/dnscrypt.c new file mode 100644 index 0000000000..69b827f3d6 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/dnscrypt.c @@ -0,0 +1,77 @@ +/* + * dnscrypt.c + * + * Copyright (C) 2020 - ntop.org + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_DNSCRYPT + +#include "ndpi_api.h" + +static void ndpi_int_dnscrypt_add_connection(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) +{ + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_DNSCRYPT, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); +} + +static void ndpi_search_dnscrypt(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) +{ + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + static char const * const dnscrypt_initial = "2\rdnscrypt"; + + NDPI_LOG_DBG(ndpi_struct, "search dnscrypt\n"); + + /* dnscrypt protocol version 1: check magic */ + if (packet->payload_packet_len >= 64 && + strncmp((char*)packet->payload, "r6fnvWj8", strlen("r6fnvWj8")) == 0) + { + ndpi_int_dnscrypt_add_connection(ndpi_struct, flow); + return; + } + /* dnscrypt protocol version 1 and 2: resolver ping */ + if (packet->payload_packet_len > 13 + strlen(dnscrypt_initial) && + strncasecmp((char*)packet->payload + 13, dnscrypt_initial, strlen(dnscrypt_initial)) == 0) + { + ndpi_int_dnscrypt_add_connection(ndpi_struct, flow); + return; + } + + if ((flow->packet_direction_counter[packet->packet_direction] >= 1 && + flow->packet_direction_counter[1 - packet->packet_direction] >= 1) || + flow->packet_counter >= 10) + { + /* + * Wait for at least one packet per direction, but not more then 10 packets. + * Required as we need to wait for the server response which contains the ASCII pattern below. + */ + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + return; + } +} + +void init_dnscrypt_dissector(struct ndpi_detection_module_struct *ndpi_struct, u_int32_t *id) +{ + ndpi_set_bitmask_protocol_detection( + "DNScrypt", ndpi_struct, *id, + NDPI_PROTOCOL_DNSCRYPT, ndpi_search_dnscrypt, NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_TCP_OR_UDP_WITH_PAYLOAD_WITHOUT_RETRANSMISSION, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, ADD_TO_DETECTION_BITMASK); + *id += 1; +} + diff --git a/src/components/implementation/simple_nf/ndpi/dofus.c b/src/components/implementation/simple_nf/ndpi/dofus.c new file mode 100644 index 0000000000..5357fc96fd --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/dofus.c @@ -0,0 +1,152 @@ +/* + * dofus.c + * + * Copyright (C) 2009-11 - ipoque GmbH + * Copyright (C) 2011-22 - ntop.org + * + * This file is part of nDPI, an open source deep packet inspection + * library based on the OpenDPI and PACE technology by ipoque GmbH + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_DOFUS + +#include "ndpi_api.h" + +static void ndpi_dofus_add_connection(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) +{ + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_DOFUS, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); + NDPI_LOG_INFO(ndpi_struct, "found dofus\n"); +} + +static void ndpi_search_dofus(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) +{ + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + + NDPI_LOG_DBG(ndpi_struct, "search dofus\n"); + + /* Dofus v 1.x.x */ + if (packet->payload_packet_len == 13 && get_u_int16_t(packet->payload, 1) == ntohs(0x0508) + && get_u_int16_t(packet->payload, 5) == ntohs(0x04a0) + && get_u_int16_t(packet->payload, packet->payload_packet_len - 2) == ntohs(0x0194)) { + ndpi_dofus_add_connection(ndpi_struct, flow); + return; + } + if (flow->l4.tcp.dofus_stage == 0) { + if (packet->payload_packet_len == 3 && memcmp(packet->payload, "HG", 2) == 0 + && packet->payload[packet->payload_packet_len - 1] == 0) + goto maybe_dofus; + + if (packet->payload_packet_len == 12 && memcmp(packet->payload, "Af", 2) == 0 + && packet->payload[packet->payload_packet_len - 1] == 0) + goto maybe_dofus; + + if (packet->payload_packet_len == 35 && memcmp(packet->payload, "HC", 2) == 0 + && packet->payload[packet->payload_packet_len - 1] == 0) + goto maybe_dofus; + + if (packet->payload_packet_len > 2 && packet->payload[0] == 'A' + && (packet->payload[1] == 'x' || packet->payload[1] == 'X') + && packet->payload[packet->payload_packet_len - 1] == 0) + goto maybe_dofus; + + if (packet->payload_packet_len > 2 && memcmp(packet->payload, "Ad", 2) + && packet->payload[packet->payload_packet_len - 1] == 0) + goto maybe_dofus; + + } + if (flow->l4.tcp.dofus_stage == 1) { + if (packet->payload_packet_len == 11 && memcmp(packet->payload, "AT", 2) == 0 + && packet->payload[10] == 0x00) { + ndpi_dofus_add_connection(ndpi_struct, flow); + return; + } + if (packet->payload_packet_len == 5 + && packet->payload[0] == 'A' && packet->payload[4] == 0x00 + && (packet->payload[1] == 'T' || packet->payload[1] == 'k')) { + ndpi_dofus_add_connection(ndpi_struct, flow); + return; + } + } + /* end Dofus 1.x.x */ + + + /* Dofus 2.0 */ + if ((packet->payload_packet_len == 11 || packet->payload_packet_len == 13 || packet->payload_packet_len == 49) + && get_u_int32_t(packet->payload, 0) == ntohl(0x00050800) + && get_u_int16_t(packet->payload, 4) == ntohs(0x0005) + && get_u_int16_t(packet->payload, 8) == ntohs(0x0005) + && packet->payload[10] == 0x18) { + if (packet->payload_packet_len == 13 + && get_u_int16_t(packet->payload, packet->payload_packet_len - 2) != ntohs(0x0194)) { + goto exclude; + } + if (packet->payload_packet_len == 49 && ntohs(get_u_int16_t(packet->payload, 15)) + 17 != packet->payload_packet_len) { + goto exclude; + } + ndpi_dofus_add_connection(ndpi_struct, flow); + return; + } + if (packet->payload_packet_len >= 41 && get_u_int16_t(packet->payload, 0) == ntohs(0x01b9) && packet->payload[2] == 0x26) { + u_int16_t len, len2; + len = ntohs(get_u_int16_t(packet->payload, 3)); + if ((len + 5 + 2) > packet->payload_packet_len) + goto exclude; + len2 = ntohs(get_u_int16_t(packet->payload, 5 + len)); + if (5 + len + 2 + len2 == packet->payload_packet_len) { + ndpi_dofus_add_connection(ndpi_struct, flow); + return; + } + } + if (packet->payload_packet_len == 56 + && memcmp(packet->payload, "\x00\x11\x35\x02\x03\x00\x93\x96\x01\x00", 10) == 0) { + u_int16_t len, len2; + len = ntohs(get_u_int16_t(packet->payload, 10)); + if ((len + 12 + 2) > packet->payload_packet_len) + goto exclude; + len2 = ntohs(get_u_int16_t(packet->payload, 12 + len)); + if ((12 + len + 2 + len2 + 1) > packet->payload_packet_len) + goto exclude; + if (12 + len + 2 + len2 + 1 == packet->payload_packet_len && packet->payload[12 + len + 2 + len2] == 0x01) { + ndpi_dofus_add_connection(ndpi_struct, flow); + return; + } + } +exclude: + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + return; + +maybe_dofus: + flow->l4.tcp.dofus_stage = 1; + NDPI_LOG_DBG2(ndpi_struct, "maybe dofus\n"); + return; + +} + +void init_dofus_dissector(struct ndpi_detection_module_struct *ndpi_struct, u_int32_t *id) +{ + ndpi_set_bitmask_protocol_detection("Dofus", ndpi_struct, *id, + NDPI_PROTOCOL_DOFUS, + ndpi_search_dofus, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_TCP_WITH_PAYLOAD_WITHOUT_RETRANSMISSION, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK); + + *id += 1; +} + diff --git a/src/components/implementation/simple_nf/ndpi/drda.c b/src/components/implementation/simple_nf/ndpi/drda.c new file mode 100644 index 0000000000..dd39afdc6b --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/drda.c @@ -0,0 +1,102 @@ +/* + * drda.c + * + * Copyright (C) 2012-22 - ntop.org + * + * This module is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This module is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License. + * If not, see . + * + */ +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_DRDA + +#include "ndpi_api.h" + +struct ndpi_drda_hdr { + u_int16_t length; + u_int8_t magic; + u_int8_t format; + u_int16_t correlID; + u_int16_t length2; + u_int16_t code_pnt; +}; + + +static void ndpi_search_drda(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) +{ + struct ndpi_packet_struct * packet = &ndpi_struct->packet; + u_int16_t payload_len = packet->payload_packet_len; + u_int count = 0; // prevent integer overflow + + NDPI_LOG_DBG(ndpi_struct, "search DRDA\n"); + + if(packet->tcp != NULL) { + + /* check port */ + if(payload_len >= sizeof(struct ndpi_drda_hdr)) { + + struct ndpi_drda_hdr * drda = (struct ndpi_drda_hdr *) packet->payload; + + u_int16_t len = ntohs(drda->length); + + /* check first header */ + if(len != ntohs(drda->length2) + 6 || + drda->magic != 0xd0) + goto no_drda; + + /* check if there are more drda headers */ + if(payload_len > len) { + + count = len; + + while(count + sizeof(struct ndpi_drda_hdr) < payload_len) + { + /* update info */ + drda = (struct ndpi_drda_hdr *)(packet->payload + count); + len = ntohs(drda->length); + + if(len != ntohs(drda->length2) + 6 || + drda->magic != 0xd0) + goto no_drda; + + count += len; + } + if(count != payload_len) goto no_drda; + } + NDPI_LOG_INFO(ndpi_struct, "found DRDA\n"); + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_DRDA, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); + return; + } + } + + no_drda: + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); +} + + +/* ***************************************************************** */ + + +void init_drda_dissector(struct ndpi_detection_module_struct *ndpi_struct, u_int32_t *id) +{ + ndpi_set_bitmask_protocol_detection("DRDA", ndpi_struct, *id, + NDPI_PROTOCOL_DRDA, + ndpi_search_drda, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_TCP_WITH_PAYLOAD_WITHOUT_RETRANSMISSION, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK); + + *id += 1; +} diff --git a/src/components/implementation/simple_nf/ndpi/dropbox.c b/src/components/implementation/simple_nf/ndpi/dropbox.c new file mode 100644 index 0000000000..af4bc819cd --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/dropbox.c @@ -0,0 +1,93 @@ +/* + * dropbox.c + * + * Copyright (C) 2012-18 by ntop.org + * + * This file is part of nDPI, an open source deep packet inspection + * library based on the OpenDPI and PACE technology by ipoque GmbH + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_DROPBOX + +#include "ndpi_api.h" + + +#define DB_LSP_PORT 17500 + +static void ndpi_int_dropbox_add_connection(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow, + u_int8_t due_to_correlation) { + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_DROPBOX, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); +} + + +static void ndpi_check_dropbox(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) +{ + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + // const u_int8_t *packet_payload = packet->payload; + u_int32_t payload_len = packet->payload_packet_len; + + if(packet->udp != NULL) { + u_int16_t dropbox_port = htons(DB_LSP_PORT); + + if(packet->udp->dest == dropbox_port) { + if(packet->udp->source == dropbox_port) { + if(payload_len > 10) { + if(ndpi_strnstr((const char *)packet->payload, "\"host_int\"", payload_len) != NULL) { + NDPI_LOG_INFO(ndpi_struct, "found dropbox\n"); + ndpi_int_dropbox_add_connection(ndpi_struct, flow, 0); + return; + } + } + } else { + if(payload_len > 10) { + if(ndpi_strnstr((const char *)packet->payload, "Bus17Cmd", payload_len) != NULL) { + NDPI_LOG_INFO(ndpi_struct, "found dropbox\n"); + ndpi_int_dropbox_add_connection(ndpi_struct, flow, 0); + return; + } + } + } + } + } + + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); +} + +static void ndpi_search_dropbox(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) +{ + NDPI_LOG_DBG(ndpi_struct, "search dropbox\n"); + + /* skip marked packets */ + if (flow->detected_protocol_stack[0] != NDPI_PROTOCOL_DROPBOX) { + ndpi_check_dropbox(ndpi_struct, flow); + } +} + + +void init_dropbox_dissector(struct ndpi_detection_module_struct *ndpi_struct, u_int32_t *id) +{ + ndpi_set_bitmask_protocol_detection("DROPBOX", ndpi_struct, *id, + NDPI_PROTOCOL_DROPBOX, + ndpi_search_dropbox, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_UDP_WITH_PAYLOAD, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK); + *id += 1; +} diff --git a/src/components/implementation/simple_nf/ndpi/eaq.c b/src/components/implementation/simple_nf/ndpi/eaq.c new file mode 100644 index 0000000000..d01cae9d3d --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/eaq.c @@ -0,0 +1,92 @@ +/* + * eaq.c + * + * Copyright (C) 2015-22 - ntop.org + * + * This module is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This module is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License. + * If not, see . + * + */ + + +/* + EAQ: Entitade Aferidora da Qualidade de Banda Larga + + http://www.brasilbandalarga.com.br + */ + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_EAQ + +#include "ndpi_api.h" + +#define EAQ_DEFAULT_PORT 6000 +#define EAQ_DEFAULT_SIZE 16 + +static void ndpi_int_eaq_add_connection(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) { + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_EAQ, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); +} + + +static void ndpi_search_eaq(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) { + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + u_int16_t sport = ntohs(packet->udp->source), dport = ntohs(packet->udp->dest); + + NDPI_LOG_DBG(ndpi_struct, "search eaq\n"); + + do { + if( (packet->payload_packet_len != EAQ_DEFAULT_SIZE) || + ((sport != EAQ_DEFAULT_PORT) && (dport != EAQ_DEFAULT_PORT)) ) + break; + + if(packet->udp != NULL) { + u_int32_t seq = (packet->payload[0] * 1000) + (packet->payload[1] * 100) + (packet->payload[2] * 10) + packet->payload[3]; + + if(flow->l4.udp.eaq_pkt_id == 0) + flow->l4.udp.eaq_sequence = seq; + else { + if( (flow->l4.udp.eaq_sequence != seq) && + ((flow->l4.udp.eaq_sequence+1) != seq)) + break; + else + flow->l4.udp.eaq_sequence = seq; + } + + if(++flow->l4.udp.eaq_pkt_id == 4) { + /* We have collected enough packets so we assume it's EAQ */ + NDPI_LOG_INFO(ndpi_struct, "found eaq\n"); + ndpi_int_eaq_add_connection(ndpi_struct, flow); + return; + } else + return; + } + } while(0); + + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + +} + + +void init_eaq_dissector(struct ndpi_detection_module_struct *ndpi_struct, u_int32_t *id) +{ + ndpi_set_bitmask_protocol_detection("EAQ", ndpi_struct, *id, + NDPI_PROTOCOL_EAQ, + ndpi_search_eaq, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_UDP_WITH_PAYLOAD, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK); + + *id += 1; +} diff --git a/src/components/implementation/simple_nf/ndpi/edonkey.c b/src/components/implementation/simple_nf/ndpi/edonkey.c new file mode 100644 index 0000000000..be1fae412b --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/edonkey.c @@ -0,0 +1,222 @@ +/* + * edonkey.c + * + * Copyright (C) 2014 Tomasz Bujlow + * + * The signature is based on the Libprotoident library. + * + * This file is part of nDPI, an open source deep packet inspection + * library based on the OpenDPI and PACE technology by ipoque GmbH + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_EDONKEY + +#include "ndpi_api.h" + + +static void ndpi_int_edonkey_add_connection(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) { + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_EDONKEY, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); +} + +static int ndpi_edonkey_payload_check(const u_int8_t *data, u_int32_t len) { + if((len >= 4) && (data[0] == 0xe3) && (data[2] == 0x00) && (data[3] == 0x00)) + return 1; + + if((len >= 4) && (data[0] == 0xc5) && (data[2] == 0x00) && (data[3] == 0x00)) + return 1; + + if((len >= 2) && (data[0] == 0xe5) && (data[1] == 0x43)) + return 1; + + if((len >= 4) && (data[0] == 0xe5) && (data[1] == 0x08) && (data[2] == 0x78) && (data[3] == 0xda)) + return 1; + + if((len >= 4) && (data[0] == 0xe5) && (data[1] == 0x28) && (data[2] == 0x78) && (data[3] == 0xda)) + return 1; + + if((len >= 2) && (data[0] == 0xc5) && (data[1] == 0x90)) + return 1; + + if((len >= 2) && (data[0] == 0xc5) && (data[1] == 0x91)) + return 1; + + if((len == 2) && (data[0] == 0xc5) && (data[1] == 0x92)) + return 1; + + if((len == 2) && (data[0] == 0xc5) && (data[1] == 0x93)) + return 1; + + if((len >= 38 && len <= 70) && (data[0] == 0xc5) && (data[1] == 0x94)) + return 1; + + if((len >= 2) && (data[0] == 0xe3) && (data[1] == 0x9a)) + return 1; + + if((len >= 2) && (data[0] == 0xe3) && (data[1] == 0x9b)) + return 1; + + if((len == 6) && (data[0] == 0xe3) && (data[1] == 0x96)) + return 1; + + if((len <= 34 && ((len - 2) % 4 == 0)) && (data[0] == 0xe3) && (data[1] == 0x97)) + return 1; + + if((len >= 2) && (data[0] == 0xe3) && (data[1] == 0x92)) + return 1; + + if((len >= 2) && (data[0] == 0xe3) && (data[1] == 0x94)) + return 1; + + if((len >= 2) && (data[0] == 0xe3) && (data[1] == 0x98)) + return 1; + + if((len >= 2) && (data[0] == 0xe3) && (data[1] == 0x99)) + return 1; + + if((len == 6) && (data[0] == 0xe3) && (data[1] == 0xa2)) + return 1; + + if((len >= 2) && (data[0] == 0xe3) && (data[1] == 0xa3)) + return 1; + + if((len == 27) && (data[0] == 0xe4) && (data[1] == 0x00)) + return 1; + + if((len == 529) && (data[0] == 0xe4) && (data[1] == 0x08)) + return 1; + + if((len == 18) && (data[0] == 0xe4) && (data[1] == 0x01) && (data[2] == 0x00) && (data[3] == 0x00)) + return 1; + + if((len == 523) && (data[0] == 0xe4) && (data[1] == 0x09)) + return 1; + + if((len == 35) && (data[0] == 0xe4) && (data[1] == 0x21)) + return 1; + + if((len == 19) && (data[0] == 0xe4) && (data[1] == 0x4b)) + return 1; + + if((len >= 2) && (data[0] == 0xe4) && (data[1] == 0x11)) + return 1; + + if((len == 22 || len == 38 || len == 28) && (data[0] == 0xe4) && (data[1] == 0x19)) + return 1; + + if((len == 35) && (data[0] == 0xe4) && (data[1] == 0x20)) + return 1; + + if((len == 27) && (data[0] == 0xe4) && (data[1] == 0x18)) + return 1; + + if((len == 27) && (data[0] == 0xe4) && (data[1] == 0x10)) + return 1; + + if((len == 6) && (data[0] == 0xe4) && (data[1] == 0x58)) + return 1; + + if((len == 4) && (data[0] == 0xe4) && (data[1] == 0x50)) + return 1; + + if((len == 36) && (data[0] == 0xe4) && (data[1] == 0x52)) + return 1; + + if((len == 48) && (data[0] == 0xe4) && (data[1] == 0x40)) + return 1; + + if((len == 225) && (data[0] == 0xe4) && (data[1] == 0x43)) + return 1; + + if((len == 19) && (data[0] == 0xe4) && (data[1] == 0x48)) + return 1; + + if((len == 119 || len == 69 || len == 294) && (data[0] == 0xe4) && (data[1] == 0x29)) + return 1; + + if((len == 119 || len == 69 || len == 294 || len == 44 || len == 269) && (data[0] == 0xe4) && (data[1] == 0x28)) + return 1; + + return 0; +} + +static void ndpi_check_edonkey(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) { + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + u_int32_t payload_len = packet->payload_packet_len; + + /* Break after 20 packets. */ + if(flow->packet_counter > 20) { + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + return; + } + + /* Check if we so far detected the protocol in the request or not. */ + if(flow->edonkey_stage == 0) { + NDPI_LOG_DBG2(ndpi_struct, "EDONKEY stage 0: \n"); + + if(ndpi_edonkey_payload_check(packet->payload, payload_len)) { + NDPI_LOG_DBG2(ndpi_struct, "Possible EDONKEY request detected, we will look further for the response\n"); + + /* Encode the direction of the packet in the stage, so we will know when we need to look for the response packet. */ + flow->edonkey_stage = packet->packet_direction + 1; + } else + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + } else { + NDPI_LOG_DBG2(ndpi_struct, "EDONKEY stage %u: \n", flow->edonkey_stage); + + /* At first check, if this is for sure a response packet (in another direction. If not, do nothing now and return. */ + if((flow->edonkey_stage - packet->packet_direction) == 1) { + return; + } + + /* This is a packet in another direction. Check if we find the proper response. */ + if(ndpi_edonkey_payload_check(packet->payload, payload_len)) { + NDPI_LOG_INFO(ndpi_struct, "found EDONKEY\n"); + ndpi_int_edonkey_add_connection(ndpi_struct, flow); + } else { + NDPI_LOG_DBG2(ndpi_struct, "The reply did not seem to belong to EDONKEY, resetting the stage to 0\n"); + flow->edonkey_stage = 0; + } + } + + if(flow->packet_counter > 5) + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); +} + +static void ndpi_search_edonkey(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) { + NDPI_LOG_DBG(ndpi_struct, "search EDONKEY\n"); + + /* skip marked packets */ + if(flow->detected_protocol_stack[0] != NDPI_PROTOCOL_EDONKEY) { + ndpi_check_edonkey(ndpi_struct, flow); + } +} + + +void init_edonkey_dissector(struct ndpi_detection_module_struct *ndpi_struct, u_int32_t *id) +{ + ndpi_set_bitmask_protocol_detection("eDonkey", ndpi_struct, *id, + NDPI_PROTOCOL_EDONKEY, + ndpi_search_edonkey, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_TCP_OR_UDP_WITH_PAYLOAD_WITHOUT_RETRANSMISSION, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK); + + *id += 1; +} + diff --git a/src/components/implementation/simple_nf/ndpi/elastic_search.c b/src/components/implementation/simple_nf/ndpi/elastic_search.c new file mode 100644 index 0000000000..f29b3fb4b6 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/elastic_search.c @@ -0,0 +1,85 @@ +/* + * elasticsearch.c + * + * Copyright (C) 2022-23 - ntop.org + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_ELASTICSEARCH + +#include "ndpi_api.h" + +static void ndpi_int_elasticsearch_add_connection(struct ndpi_detection_module_struct * const ndpi_struct, + struct ndpi_flow_struct * const flow) +{ + NDPI_LOG_INFO(ndpi_struct, "found elasticsearch\n"); + + ndpi_set_detected_protocol(ndpi_struct, flow, + NDPI_PROTOCOL_ELASTICSEARCH, + NDPI_PROTOCOL_UNKNOWN, + NDPI_CONFIDENCE_DPI); +} + +/* ***************************************************** */ + +static void ndpi_search_elasticsearch(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) +{ + struct ndpi_packet_struct const * const packet = &ndpi_struct->packet; + u_int32_t message_length; + + NDPI_LOG_DBG(ndpi_struct, "search elasticsearch\n"); + + if (packet->payload_packet_len < 6) + { + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + return; + } + + if (ntohs(get_u_int16_t(packet->payload, 0)) != 0x4553 /* "ES" */) + { + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + return; + } + + message_length = ntohl(get_u_int32_t(packet->payload, 2)); + if (packet->payload_packet_len < message_length + 6) + { + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + return; + } + + ndpi_int_elasticsearch_add_connection(ndpi_struct, flow); +} + +/* ***************************************************** */ + +void init_elasticsearch_dissector(struct ndpi_detection_module_struct *ndpi_struct, + u_int32_t *id) +{ + ndpi_set_bitmask_protocol_detection("Elasticsearch", ndpi_struct, *id, + NDPI_PROTOCOL_ELASTICSEARCH, + ndpi_search_elasticsearch, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_TCP_WITH_PAYLOAD_WITHOUT_RETRANSMISSION, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK + ); + + *id += 1; +} diff --git a/src/components/implementation/simple_nf/ndpi/ethernet_ip.c b/src/components/implementation/simple_nf/ndpi/ethernet_ip.c new file mode 100644 index 0000000000..45ca056986 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/ethernet_ip.c @@ -0,0 +1,71 @@ +/* + * zmq.c + * + * Copyright (C) 2016-22 - ntop.org + * + * nDPI is free software: you can zmqtribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_ETHERNET_IP + +#include "ndpi_api.h" + +static void ndpi_int_ethernet_ip_add_connection(struct ndpi_detection_module_struct + *ndpi_struct, struct ndpi_flow_struct *flow) { + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_ETHERNET_IP, + NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); +} + + +static void ndpi_search_ethernet_ip(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) { + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + + NDPI_LOG_DBG(ndpi_struct, "search for ETHERNET_IP\n"); + + if(packet->tcp != NULL) { + NDPI_LOG_DBG2(ndpi_struct, "calculating ETHERNET_IP over tcp\n"); + + if(packet->payload_packet_len >= 24) { + u_int16_t eth_ip_port = ntohs(44818); + + if((packet->tcp->source == eth_ip_port) || (packet->tcp->dest == eth_ip_port)) { + u_int16_t len = le16toh(*((u_int16_t *)&packet->payload[2])); /* Little endian */ + + if((len+24) == packet->payload_packet_len) { + NDPI_LOG_INFO(ndpi_struct, "found ethernet_ip\n"); + ndpi_int_ethernet_ip_add_connection(ndpi_struct, flow); + return; + } + } + } + } + + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); /* No luck this time */ +} + + +void init_ethernet_ip_dissector(struct ndpi_detection_module_struct *ndpi_struct, + u_int32_t *id) { + ndpi_set_bitmask_protocol_detection("EthernetIP", ndpi_struct, *id, + NDPI_PROTOCOL_ETHERNET_IP, + ndpi_search_ethernet_ip, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_TCP_WITH_PAYLOAD_WITHOUT_RETRANSMISSION, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK); + *id += 1; +} diff --git a/src/components/implementation/simple_nf/ndpi/fastcgi.c b/src/components/implementation/simple_nf/ndpi/fastcgi.c new file mode 100644 index 0000000000..f5b4eb0b11 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/fastcgi.c @@ -0,0 +1,257 @@ +/* + * fastcgi.c + * + * Copyright (C) 2022-23 - ntop.org + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_FASTCGI + +#include "ndpi_api.h" + +/* Reference: http://www.mit.edu/~yandros/doc/specs/fcgi-spec.html */ + +PACK_ON +struct FCGI_Header { + u_int8_t version; + u_int8_t type; + u_int16_t requestId; + u_int16_t contentLength; + u_int8_t paddingLength; + u_int8_t reserved; +} PACK_OFF; + +enum FCGI_Type { + FCGI_MIN = 1, + + FCGI_BEGIN_REQUEST = 1, + FCGI_ABORT_REQUEST = 2, + FCGI_END_REQUEST = 3, + FCGI_PARAMS = 4, + FCGI_STDIN = 5, + FCGI_STDOUT = 6, + FCGI_STDERR = 7, + FCGI_DATA = 8, + FCGI_GET_VALUES = 9, + FCGI_GET_VALUES_RESULT = 10, + FCGI_UNKNOWN_TYPE = 11, + + FCGI_MAX = 11 +}; + +PACK_ON +struct FCGI_Params { + u_int8_t key_length; + u_int8_t value_length; +} PACK_OFF; + +struct fcgi_one_line_mapping { + char const * const key; + struct ndpi_int_one_line_struct * const value; +}; + +static int ndpi_search_fastcgi_extra(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow); + +static void ndpi_int_fastcgi_add_connection(struct ndpi_detection_module_struct * const ndpi_struct, + struct ndpi_flow_struct * const flow, + ndpi_protocol_match_result * const match) +{ + NDPI_LOG_INFO(ndpi_struct, "found fastcgi\n"); + ndpi_set_detected_protocol(ndpi_struct, flow, + NDPI_PROTOCOL_FASTCGI, + (match != NULL ? match->protocol_id : NDPI_PROTOCOL_UNKNOWN), + NDPI_CONFIDENCE_DPI); + + if (flow->extra_packets_func == NULL) + { + flow->max_extra_packets_to_check = 5; + flow->extra_packets_func = ndpi_search_fastcgi_extra; + } +} + +static int fcgi_parse_params(struct ndpi_flow_struct * const flow, + struct ndpi_packet_struct * const packet) +{ + size_t i, j; + struct fcgi_one_line_mapping mappings[] = { + { "SCRIPT_URL", &packet->http_url_name }, + { "HTTP_HOST", &packet->host_line }, + { "HTTP_ACCEPT", &packet->accept_line }, + { "HTTP_USER_AGENT", &packet->user_agent_line }, + { "HTTP_ACCEPT_ENCODING", &packet->http_transfer_encoding }, + { "SERVER_SOFTWARE", &packet->server_line }, + { "REQUEST_METHOD", &packet->http_method } + }; + + i = sizeof(struct FCGI_Header); + while (i + sizeof(struct FCGI_Params) < packet->payload_packet_len) + { + struct FCGI_Params const * const params = (struct FCGI_Params const *)&packet->payload[i]; + + i += sizeof(*params); + if (i + params->key_length + params->value_length > packet->payload_packet_len) + { + return 1; + } + + for (j = 0; j < NDPI_ARRAY_LENGTH(mappings); ++j) + { + if (strlen(mappings[j].key) == params->key_length && + strncmp((char const *)&packet->payload[i], mappings[j].key, params->key_length) == 0) + { + mappings[j].value->ptr = &packet->payload[i + params->key_length]; + mappings[j].value->len = params->value_length; + if (packet->parsed_lines < NDPI_MAX_PARSE_LINES_PER_PACKET) + { + packet->line[packet->parsed_lines].ptr = &packet->payload[i + params->key_length]; + packet->line[packet->parsed_lines].len = params->value_length; + packet->parsed_lines++; + } + break; + } + } + + i += params->key_length + params->value_length; + }; + + if (i != packet->payload_packet_len) + { + return 1; + } + + flow->http.method = ndpi_http_str2method((const char*)packet->http_method.ptr, + (u_int16_t)packet->http_method.len); + ndpi_hostname_sni_set(flow, packet->host_line.ptr, packet->host_line.len); + ndpi_user_agent_set(flow, packet->user_agent_line.ptr, packet->user_agent_line.len); + + if (flow->http.url == NULL && packet->http_url_name.len > 0) + { + flow->http.url = ndpi_malloc(packet->http_url_name.len + 1); + if (flow->http.url != NULL) + { + strncpy(flow->http.url, (char const *)packet->http_url_name.ptr, packet->http_url_name.len); + flow->http.url[packet->http_url_name.len] = '\0'; + } + } + + return 0; +} + +static void ndpi_search_fastcgi(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) +{ + struct ndpi_packet_struct * const packet = &ndpi_struct->packet; + struct FCGI_Header const * fcgi_hdr; + enum FCGI_Type fcgi_type; + u_int16_t content_len; + ndpi_protocol_match_result ret_match; + + NDPI_LOG_DBG(ndpi_struct, "search fastcgi\n"); + + if (packet->payload_packet_len < sizeof(struct FCGI_Header)) + { + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + return; + } + + fcgi_hdr = (struct FCGI_Header const *)&packet->payload[0]; + + if (fcgi_hdr->version != 0x01) + { + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + return; + } + + fcgi_type = (enum FCGI_Type)fcgi_hdr->type; + if (fcgi_type < FCGI_MIN || fcgi_type > FCGI_MAX) + { + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + return; + } + + content_len = ntohs(fcgi_hdr->contentLength); + if (packet->payload_packet_len != sizeof(*fcgi_hdr) + content_len + fcgi_hdr->paddingLength) + { + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + return; + } + + if (fcgi_type == FCGI_PARAMS) + { + if (content_len == 0) + { + flow->max_extra_packets_to_check = 0; + flow->extra_packets_func = NULL; + return; + } + + if (fcgi_parse_params(flow, packet) != 0) + { + ndpi_set_risk(ndpi_struct, flow, NDPI_MALFORMED_PACKET, "Invalid FastCGI PARAMS header"); + ndpi_int_fastcgi_add_connection(ndpi_struct, flow, NULL); + } else { + ndpi_match_host_subprotocol(ndpi_struct, flow, + flow->host_server_name, + strlen(flow->host_server_name), + &ret_match, NDPI_PROTOCOL_FASTCGI); + ndpi_check_dga_name(ndpi_struct, flow, + flow->host_server_name, 1, 0); + if(ndpi_is_valid_hostname(flow->host_server_name, + strlen(flow->host_server_name)) == 0) { + char str[128]; + + snprintf(str, sizeof(str), "Invalid host %s", flow->host_server_name); + ndpi_set_risk(ndpi_struct, flow, NDPI_INVALID_CHARACTERS, str); + + /* This looks like an attack */ + ndpi_set_risk(ndpi_struct, flow, NDPI_POSSIBLE_EXPLOIT, NULL); + } + ndpi_int_fastcgi_add_connection(ndpi_struct, flow, &ret_match); + } + return; + } + + if (flow->packet_counter > 2) + { + ndpi_int_fastcgi_add_connection(ndpi_struct, flow, NULL); + } +} + +static int ndpi_search_fastcgi_extra(struct ndpi_detection_module_struct * ndpi_struct, + struct ndpi_flow_struct * flow) +{ + ndpi_search_fastcgi(ndpi_struct, flow); + + return flow->extra_packets_func != NULL; +} + +void init_fastcgi_dissector(struct ndpi_detection_module_struct *ndpi_struct, + u_int32_t *id) +{ + ndpi_set_bitmask_protocol_detection("FastCGI", ndpi_struct, *id, + NDPI_PROTOCOL_FASTCGI, + ndpi_search_fastcgi, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_TCP_WITH_PAYLOAD_WITHOUT_RETRANSMISSION, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK + ); + + *id += 1; +} diff --git a/src/components/implementation/simple_nf/ndpi/fix.c b/src/components/implementation/simple_nf/ndpi/fix.c new file mode 100644 index 0000000000..0d0e71331a --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/fix.c @@ -0,0 +1,74 @@ +/* + * fix.c + * + * Copyright (C) 2017-22 - ntop.org + * + * This file is part of nDPI, an open source deep packet inspection + * library based on the OpenDPI and PACE technology by ipoque GmbH + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_FIX + +#include "ndpi_api.h" + + +static void ndpi_search_fix(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) +{ + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + + NDPI_LOG_DBG(ndpi_struct, "search FIX\n"); + if(packet->tcp && packet->payload_packet_len > 5) { + // 8= + if(packet->payload[0] == 0x38 && packet->payload[1] == 0x3d) { + // FIX + if(packet->payload[2] == 0x46 && + packet->payload[3] == 0x49 && + packet->payload[4] == 0x58) { + + NDPI_LOG_INFO(ndpi_struct, "found FIX\n"); + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_FIX, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); + return; + } + // 0. 9= + if(packet->payload[2] == 0x4f && + packet->payload[3] == 0x01 && + packet->payload[4] == 0x39 && + packet->payload[5] == 0x3d) { + + NDPI_LOG_INFO(ndpi_struct, "found FIX\n"); + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_FIX, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); + return; + } + } + } + + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); +} + + +void init_fix_dissector(struct ndpi_detection_module_struct *ndpi_struct, u_int32_t *id) +{ + ndpi_set_bitmask_protocol_detection("FIX", ndpi_struct, *id, + NDPI_PROTOCOL_FIX, + ndpi_search_fix, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_TCP_WITH_PAYLOAD_WITHOUT_RETRANSMISSION, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK); + *id += 1; +} diff --git a/src/components/implementation/simple_nf/ndpi/ftp_control.c b/src/components/implementation/simple_nf/ndpi/ftp_control.c new file mode 100644 index 0000000000..944c0aecba --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/ftp_control.c @@ -0,0 +1,693 @@ +/* + * ftp_control.c + * + * Copyright (C) 2016-22 - ntop.org + * + * This file is part of nDPI, an open source deep packet inspection + * library based on the OpenDPI and PACE technology by ipoque GmbH + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_FTP_CONTROL + +#include "ndpi_api.h" + +// #define FTP_DEBUG + +extern void switch_extra_dissection_to_tls(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow); + +/* *************************************************************** */ + +static void ndpi_int_ftp_control_add_connection(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) { + + flow->host_server_name[0] = '\0'; /* Remove any data set by other dissectors (eg. SMTP) */ + ndpi_set_detected_protocol(ndpi_struct, flow, + NDPI_PROTOCOL_FTP_CONTROL, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); +} + +/* *************************************************************** */ + +static int ndpi_ftp_control_check_request(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow, + const u_int8_t *payload, + size_t payload_len) { +#ifdef FTP_DEBUG + printf("%s() [%.*s]\n", __FUNCTION__, (int)payload_len, payload); +#endif + + if(ndpi_match_strprefix(payload, payload_len, "USER")) { + char buf[64]; + + ndpi_user_pwd_payload_copy((u_int8_t*)flow->l4.tcp.ftp_imap_pop_smtp.username, + sizeof(flow->l4.tcp.ftp_imap_pop_smtp.username), 5, + payload, payload_len); + + snprintf(buf, sizeof(buf), "Found FTP username (%s)", + flow->l4.tcp.ftp_imap_pop_smtp.username); + ndpi_set_risk(ndpi_struct, flow, NDPI_CLEAR_TEXT_CREDENTIALS, buf); + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "PASS")) { + ndpi_user_pwd_payload_copy((u_int8_t*)flow->l4.tcp.ftp_imap_pop_smtp.password, + sizeof(flow->l4.tcp.ftp_imap_pop_smtp.password), 5, + payload, payload_len); + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "AUTH") || + ndpi_match_strprefix(payload, payload_len, "auth")) { + flow->l4.tcp.ftp_imap_pop_smtp.auth_found = 1; + return 1; + } + /* ***************************************************** */ + + if(ndpi_match_strprefix(payload, payload_len, "ABOR")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "ACCT")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "ADAT")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "ALLO")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "APPE")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "CCC")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "CDUP")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "CONF")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "CWD")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "DELE")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "ENC")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "EPRT")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "EPSV")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "FEAT")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "HELP")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "LANG")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "LIST")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "LPRT")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "LPSV")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "MDTM")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "MIC")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "MKD")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "MLSD")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "MLST")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "MODE")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "NLST")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "NOOP")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "OPTS")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "PASV")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "PBSZ")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "PORT")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "PROT")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "PWD")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "QUIT")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "REIN")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "REST")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "RETR")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "RMD")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "RNFR")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "RNTO")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "SITE")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "SIZE")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "SMNT")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "STAT")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "STOR")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "STOU")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "STRU")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "SYST")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "TYPE")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "XCUP")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "XMKD")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "XPWD")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "XRCP")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "XRMD")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "XRSQ")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "XSEM")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "XSEN")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "HOST")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "abor")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "acct")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "adat")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "allo")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "appe")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "ccc")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "cdup")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "conf")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "cwd")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "dele")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "enc")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "eprt")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "epsv")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "feat")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "help")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "lang")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "list")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "lprt")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "lpsv")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "mdtm")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "mic")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "mkd")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "mlsd")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "mlst")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "mode")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "nlst")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "noop")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "opts")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "pass")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "pasv")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "pbsz")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "port")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "prot")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "pwd")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "quit")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "rein")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "rest")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "retr")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "rmd")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "rnfr")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "rnto")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "site")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "size")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "smnt")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "stat")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "stor")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "stou")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "stru")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "syst")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "type")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "user")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "xcup")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "xmkd")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "xpwd")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "xrcp")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "xrmd")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "xrsq")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "xsem")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "xsen")) { + return 1; + } + + if(ndpi_match_strprefix(payload, payload_len, "host")) { + return 1; + } + + return 0; +} + +/* *************************************************************** */ + +static int ndpi_ftp_control_check_response(struct ndpi_flow_struct *flow, + const u_int8_t *payload, + size_t payload_len) { +#ifdef FTP_DEBUG + printf("%s() [%.*s]\n", __FUNCTION__, (int)payload_len, payload); +#endif + + switch(payload[0]) { + case '1': + case '2': + case '3': + case '6': + if(flow->l4.tcp.ftp_imap_pop_smtp.auth_found == 1) + flow->l4.tcp.ftp_imap_pop_smtp.auth_tls = 1; + return(1); + + case '4': + case '5': + flow->l4.tcp.ftp_imap_pop_smtp.auth_failed = 1; + flow->l4.tcp.ftp_imap_pop_smtp.auth_done = 1; + return(1); + } + + return 0; +} + +/* *************************************************************** */ + +static void ndpi_check_ftp_control(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) { + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + u_int32_t payload_len = packet->payload_packet_len; + + /* Check connection over TCP */ + if(packet->tcp) { + u_int16_t twentyfive = htons(25); + + /* Exclude SMTP, which uses similar commands. */ + if(packet->tcp->dest == twentyfive || packet->tcp->source == twentyfive) { + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + return; + } + + /* Break after 8 packets. */ + if(flow->packet_counter > 8) { + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + return; + } + + /* Check if we so far detected the protocol in the request or not. */ + if(flow->ftp_control_stage == 0) { + NDPI_LOG_DBG2(ndpi_struct, "FTP_CONTROL stage 0: \n"); + + if((payload_len > 0) && ndpi_ftp_control_check_request(ndpi_struct, + flow, packet->payload, payload_len)) { + NDPI_LOG_DBG2(ndpi_struct, + "Possible FTP_CONTROL request detected, we will look further for the response..\n"); + + /* + Encode the direction of the packet in the stage, so we will know when we need + to look for the response packet. + */ + flow->ftp_control_stage = packet->packet_direction + 1; + } + } else { + NDPI_LOG_DBG2(ndpi_struct, "FTP_CONTROL stage %u: \n", flow->ftp_control_stage); + + /* + At first check, if this is for sure a response packet (in another direction. + If not, do nothing now and return. + */ + if((flow->ftp_control_stage - packet->packet_direction) == 1) { + return; + } + + /* This is a packet in another direction. Check if we find the proper response. */ + if((payload_len > 0) && ndpi_ftp_control_check_response(flow, packet->payload, payload_len)) { + NDPI_LOG_INFO(ndpi_struct, "found FTP_CONTROL\n"); + +#ifdef FTP_DEBUG + printf("%s() [user: %s][pwd: %s]\n", __FUNCTION__, + flow->l4.tcp.ftp_imap_pop_smtp.username, flow->l4.tcp.ftp_imap_pop_smtp.password); +#endif + + if(flow->l4.tcp.ftp_imap_pop_smtp.password[0] == '\0' && + flow->l4.tcp.ftp_imap_pop_smtp.auth_done == 0 && + flow->l4.tcp.ftp_imap_pop_smtp.auth_tls == 0) { + flow->ftp_control_stage = 0; + } else if (flow->l4.tcp.ftp_imap_pop_smtp.auth_tls == 1 && + ndpi_struct->opportunistic_tls_ftp_enabled) { + flow->host_server_name[0] = '\0'; /* Remove any data set by other dissectors (eg. SMTP) */ + /* Switch classification to FTPS */ + ndpi_set_detected_protocol(ndpi_struct, flow, + NDPI_PROTOCOL_FTPS, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); + NDPI_LOG_DBG(ndpi_struct, "Switching to [%d/%d]\n", + flow->detected_protocol_stack[0], flow->detected_protocol_stack[1]); + /* We are done (in FTP dissector): delegating TLS... */ + switch_extra_dissection_to_tls(ndpi_struct, flow); + } else { + ndpi_int_ftp_control_add_connection(ndpi_struct, flow); + } + } else { + NDPI_LOG_DBG2(ndpi_struct, "The reply did not seem to belong to FTP_CONTROL, " + "resetting the stage to 0\n"); + flow->ftp_control_stage = 0; + } + } + } +} + +/* *************************************************************** */ + +static void ndpi_search_ftp_control(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) { + NDPI_LOG_DBG(ndpi_struct, "search FTP_CONTROL\n"); + + /* skip marked packets */ + if(flow->detected_protocol_stack[0] != NDPI_PROTOCOL_FTP_CONTROL) { + ndpi_check_ftp_control(ndpi_struct, flow); + } +} + +/* *************************************************************** */ + +void init_ftp_control_dissector(struct ndpi_detection_module_struct *ndpi_struct, + u_int32_t *id) { + ndpi_set_bitmask_protocol_detection("FTP_CONTROL", ndpi_struct, *id, + NDPI_PROTOCOL_FTP_CONTROL, + ndpi_search_ftp_control, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_TCP_WITH_PAYLOAD_WITHOUT_RETRANSMISSION, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK); + + *id += 1; +} diff --git a/src/components/implementation/simple_nf/ndpi/ftp_data.c b/src/components/implementation/simple_nf/ndpi/ftp_data.c new file mode 100644 index 0000000000..ef924c5fa1 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/ftp_data.c @@ -0,0 +1,268 @@ +/* + * ftp_data.c + * + * Copyright (C) 2016-22 - ntop.org + * + * The signature is based on the Libprotoident library. + * + * This file is part of nDPI, an open source deep packet inspection + * library based on the OpenDPI and PACE technology by ipoque GmbH + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_FTP_DATA + +#include "ndpi_api.h" + +static void ndpi_int_ftp_data_add_connection(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) { + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_FTP_DATA, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); +} + +static int ndpi_match_ftp_data_port(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) { + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + + /* Check connection over TCP */ + if(packet->tcp) { + if(packet->tcp->dest == htons(20) || packet->tcp->source == htons(20)) { + return 1; + } + } + return 0; +} + +static int ndpi_match_ftp_data_directory(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) { + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + u_int32_t payload_len = packet->payload_packet_len; + + if(payload_len > 10) { + int i; + + if(!((packet->payload[0] == '-') || (packet->payload[0] == 'd'))) + return(0); + + for(i=0; i<9; i += 3) + if(((packet->payload[1+i] == '-') || (packet->payload[1+i] == 'r')) + && ((packet->payload[2+i] == '-') || (packet->payload[2+i] == 'w')) + && ((packet->payload[3+i] == '-') || (packet->payload[3+i] == 'x'))) { + ; + } else + return 0; + + return 1; + } + + return 0; +} + +static int ndpi_match_file_header(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) { + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + u_int32_t payload_len = packet->payload_packet_len; + + /* A FTP packet is pretty long so 256 is a bit conservative but it should be OK */ + if(packet->payload_packet_len < 256) + return 0; + + /* RIFF is a meta-format for storing AVI and WAV files */ + if(ndpi_match_strprefix(packet->payload, payload_len, "RIFF")) + return 1; + + /* MZ is a .exe file */ + if((packet->payload[0] == 'M') && (packet->payload[1] == 'Z') && (packet->payload[3] == 0x00)) + return 1; + + /* Ogg files */ + if(ndpi_match_strprefix(packet->payload, payload_len, "OggS")) + return 1; + + /* ZIP files */ + if((packet->payload[0] == 'P') && (packet->payload[1] == 'K') && (packet->payload[2] == 0x03) && (packet->payload[3] == 0x04)) + return 1; + + /* MPEG files */ + if((packet->payload[0] == 0x00) && (packet->payload[1] == 0x00) && (packet->payload[2] == 0x01) && (packet->payload[3] == 0xba)) + return 1; + + /* RAR files */ + if(ndpi_match_strprefix(packet->payload, payload_len, "Rar!")) + return 1; + + /* EBML */ + if((packet->payload[0] == 0x1a) && (packet->payload[1] == 0x45) && (packet->payload[2] == 0xdf) && (packet->payload[3] == 0xa3)) + return 1; + + /* JPG */ + if((packet->payload[0] == 0xff) && (packet->payload[1] ==0xd8)) + return 1; + + /* GIF */ + if(ndpi_match_strprefix(packet->payload, payload_len, "GIF8")) + return 1; + + /* PHP scripts */ + if((packet->payload[0] == 0x3c) && (packet->payload[1] == 0x3f) && (packet->payload[2] == 0x70) && (packet->payload[3] == 0x68)) + return 1; + + /* Unix scripts */ + if((packet->payload[0] == 0x23) && (packet->payload[1] == 0x21) && (packet->payload[2] == 0x2f) && (packet->payload[3] == 0x62)) + return 1; + + /* PDFs */ + if(ndpi_match_strprefix(packet->payload, payload_len, "%PDF")) + return 1; + + /* PNG */ + if((packet->payload[0] == 0x89) && (packet->payload[1] == 'P') && (packet->payload[2] == 'N') && (packet->payload[3] == 'G')) + return 1; + + /* HTML */ + if(ndpi_match_strprefix(packet->payload, payload_len, "payload[0] == 0x0a) && (packet->payload[1] == '<') && (packet->payload[2] == '!') && (packet->payload[3] == 'D')) + return 1; + + /* 7zip */ + if((packet->payload[0] == 0x37) && (packet->payload[1] == 0x7a) && (packet->payload[2] == 0xbc) && (packet->payload[3] == 0xaf)) + return 1; + + /* gzip */ + if((packet->payload[0] == 0x1f) && (packet->payload[1] == 0x8b) && (packet->payload[2] == 0x08)) + return 1; + + /* XML */ + if(ndpi_match_strprefix(packet->payload, payload_len, "payload, payload_len, "fLaC")) + return 1; + + /* MP3 */ + if((packet->payload[0] == 'I') && (packet->payload[1] == 'D') && (packet->payload[2] == '3') && (packet->payload[3] == 0x03)) + return 1; + if(ndpi_match_strprefix(packet->payload, payload_len, "\xff\xfb\x90\xc0")) + return 1; + + /* RPM */ + if((packet->payload[0] == 0xed) && (packet->payload[1] == 0xab) && (packet->payload[2] == 0xee) && (packet->payload[3] == 0xdb)) + return 1; + + /* Wz Patch */ + if(ndpi_match_strprefix(packet->payload, payload_len, "WzPa")) + return 1; + + /* Flash Video */ + if((packet->payload[0] == 'F') && (packet->payload[1] == 'L') && (packet->payload[2] == 'V') && (packet->payload[3] == 0x01)) + return 1; + + /* .BKF (Microsoft Tape Format) */ + if(ndpi_match_strprefix(packet->payload, payload_len, "TAPE")) + return 1; + + /* MS Office Doc file - this is unpleasantly geeky */ + if((packet->payload[0] == 0xd0) && (packet->payload[1] == 0xcf) && (packet->payload[2] == 0x11) && (packet->payload[3] == 0xe0)) + return 1; + + /* ASP */ + if((packet->payload[0] == 0x3c) && (packet->payload[1] == 0x25) && (packet->payload[2] == 0x40) && (packet->payload[3] == 0x20)) + return 1; + + /* WMS file */ + if((packet->payload[0] == 0x3c) && (packet->payload[1] == 0x21) && (packet->payload[2] == 0x2d) && (packet->payload[3] == 0x2d)) + return 1; + + /* ar archive, typically .deb files */ + if(ndpi_match_strprefix(packet->payload, payload_len, "!payload, payload_len, "payload, "jabber", packet->payload_packet_len) == NULL)) + return 1; + + if(ndpi_match_strprefix(packet->payload, payload_len, "payload, payload_len, "SPFI")) + return 1; + + /* ABIF - Applied Biosystems */ + if(ndpi_match_strprefix(packet->payload, payload_len, "ABIF")) + return 1; + + /* bzip2 - other digits are also possible instead of 9 */ + if((packet->payload[0] == 'B') && (packet->payload[1] == 'Z') && (packet->payload[2] == 'h') && (packet->payload[3] == '9')) + return 1; + + /* Some other types of files */ + + if((packet->payload[0] == '<') && (packet->payload[1] == 'c') && (packet->payload[2] == 'f')) + return 1; + if((packet->payload[0] == '<') && (packet->payload[1] == 'C') && (packet->payload[2] == 'F')) + return 1; + if(ndpi_match_strprefix(packet->payload, payload_len, ".tem")) + return 1; + if(ndpi_match_strprefix(packet->payload, payload_len, ".ite")) + return 1; + if(ndpi_match_strprefix(packet->payload, payload_len, ".lef")) + return 1; + + return 0; +} + +static void ndpi_check_ftp_data(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) { + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + + /* + Make sure we see the beginning of the connection as otherwise we might have + false positive results + */ + if(ndpi_seen_flow_beginning(flow)) { + if((packet->payload_packet_len > 0) + && (ndpi_match_file_header(ndpi_struct, flow) + || ndpi_match_ftp_data_directory(ndpi_struct, flow) + || ndpi_match_ftp_data_port(ndpi_struct, flow) + ) + ) { + NDPI_LOG_INFO(ndpi_struct, "found FTP_DATA request\n"); + ndpi_int_ftp_data_add_connection(ndpi_struct, flow); + return; + } + } + + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); +} + +static void ndpi_search_ftp_data(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) { + + NDPI_LOG_DBG(ndpi_struct, "search FTP_DATA\n"); + ndpi_check_ftp_data(ndpi_struct, flow); +} + + +void init_ftp_data_dissector(struct ndpi_detection_module_struct *ndpi_struct, u_int32_t *id) +{ + ndpi_set_bitmask_protocol_detection("FTP_DATA", ndpi_struct, *id, + NDPI_PROTOCOL_FTP_DATA, + ndpi_search_ftp_data, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_TCP_WITH_PAYLOAD_WITHOUT_RETRANSMISSION, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK); + + *id += 1; +} diff --git a/src/components/implementation/simple_nf/ndpi/gcrypt/aes.c b/src/components/implementation/simple_nf/ndpi/gcrypt/aes.c new file mode 100644 index 0000000000..61dc2137ac --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/gcrypt/aes.c @@ -0,0 +1,508 @@ +/* + * FIPS-197 compliant AES implementation + * + * Copyright The Mbed TLS Contributors + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +/* + * The AES block cipher was designed by Vincent Rijmen and Joan Daemen. + * + * http://csrc.nist.gov/encryption/aes/rijndael/Rijndael.pdf + * http://csrc.nist.gov/publications/fips/fips197/fips-197.pdf + */ + + +/* Parameter validation macros based on platform_util.h */ +#define AES_VALIDATE_RET( cond ) \ + MBEDTLS_INTERNAL_VALIDATE_RET( cond, MBEDTLS_ERR_AES_BAD_INPUT_DATA ) +#define AES_VALIDATE( cond ) MBEDTLS_INTERNAL_VALIDATE( cond ) + +/* + * Forward S-box & tables + */ +static unsigned char FSb[256]; +static uint32_t FT0[256]; +static uint32_t FT1[256]; +static uint32_t FT2[256]; +static uint32_t FT3[256]; + +/* + * Reverse S-box & tables + */ +static unsigned char RSb[256]; +static uint32_t RT0[256]; +static uint32_t RT1[256]; +static uint32_t RT2[256]; +static uint32_t RT3[256]; + +/* + * Round constants + */ +static uint32_t RCON[10]; + +/* + * Tables generation code + */ +#define XTIME(x) ( ( (x) << 1 ) ^ ( ( (x) & 0x80 ) ? 0x1B : 0x00 ) ) +#define MUL(x,y) ( ( (x) && (y) ) ? pow[(log[(x)]+log[(y)]) % 255] : 0 ) + +static int aes_init_done = 0; +int aes_aesni_has_support = 0; + +static void aes_gen_tables( void ) +{ + int i, x, y, z; + int pow[256]; + int log[256]; + +#if defined(MBEDTLS_AESNI_C) && defined(MBEDTLS_HAVE_X86_64) + if( mbedtls_aesni_has_support( MBEDTLS_AESNI_AES ) ) + aes_aesni_has_support = 1; +#endif + + /* + * compute pow and log tables over GF(2^8) + */ + for( i = 0, x = 1; i < 256; i++ ) + { + pow[i] = x; + log[x] = i; + x = MBEDTLS_BYTE_0( x ^ XTIME( x ) ); + } + + /* + * calculate the round constants + */ + for( i = 0, x = 1; i < 10; i++ ) + { + RCON[i] = (uint32_t) x; + x = MBEDTLS_BYTE_0( XTIME( x ) ); + } + + /* + * generate the forward and reverse S-boxes + */ + FSb[0x00] = 0x63; + RSb[0x63] = 0x00; + + for( i = 1; i < 256; i++ ) + { + x = pow[255 - log[i]]; + + y = x; y = MBEDTLS_BYTE_0( ( y << 1 ) | ( y >> 7 ) ); + x ^= y; y = MBEDTLS_BYTE_0( ( y << 1 ) | ( y >> 7 ) ); + x ^= y; y = MBEDTLS_BYTE_0( ( y << 1 ) | ( y >> 7 ) ); + x ^= y; y = MBEDTLS_BYTE_0( ( y << 1 ) | ( y >> 7 ) ); + x ^= y ^ 0x63; + + FSb[i] = (unsigned char) x; + RSb[x] = (unsigned char) i; + } + + /* + * generate the forward and reverse tables + */ + for( i = 0; i < 256; i++ ) + { + x = FSb[i]; + y = MBEDTLS_BYTE_0( XTIME( x ) ); + z = MBEDTLS_BYTE_0( y ^ x ); + + FT0[i] = ( (uint32_t) y ) ^ + ( (uint32_t) x << 8 ) ^ + ( (uint32_t) x << 16 ) ^ + ( (uint32_t) z << 24 ); + + FT1[i] = ROTL8( FT0[i] ); + FT2[i] = ROTL8( FT1[i] ); + FT3[i] = ROTL8( FT2[i] ); + + x = RSb[i]; + + RT0[i] = ( (uint32_t) MUL( 0x0E, x ) ) ^ + ( (uint32_t) MUL( 0x09, x ) << 8 ) ^ + ( (uint32_t) MUL( 0x0D, x ) << 16 ) ^ + ( (uint32_t) MUL( 0x0B, x ) << 24 ); + + RT1[i] = ROTL8( RT0[i] ); + RT2[i] = ROTL8( RT1[i] ); + RT3[i] = ROTL8( RT2[i] ); + } +} + +#define AES_RT0(idx) RT0[idx] +#define AES_RT1(idx) RT1[idx] +#define AES_RT2(idx) RT2[idx] +#define AES_RT3(idx) RT3[idx] + +#define AES_FT0(idx) FT0[idx] +#define AES_FT1(idx) FT1[idx] +#define AES_FT2(idx) FT2[idx] +#define AES_FT3(idx) FT3[idx] + +void mbedtls_aes_init( mbedtls_aes_context *ctx ) +{ + AES_VALIDATE( ctx != NULL ); + + memset( ctx, 0, sizeof( mbedtls_aes_context ) ); +} + +void mbedtls_aes_free( mbedtls_aes_context *ctx ) +{ + if( ctx == NULL ) + return; + + // mbedtls_platform_zeroize( ctx, sizeof( mbedtls_aes_context ) ); +} + + +/* + * AES key schedule (encryption) + */ +int mbedtls_aes_setkey_enc( mbedtls_aes_context *ctx, const unsigned char *key, + unsigned int keybits ) +{ + unsigned int i; + uint32_t *RK; + + AES_VALIDATE_RET( ctx != NULL ); + AES_VALIDATE_RET( key != NULL ); + + switch( keybits ) + { + case 128: ctx->nr = 10; break; + case 192: ctx->nr = 12; break; + case 256: ctx->nr = 14; break; + default : return( MBEDTLS_ERR_AES_INVALID_KEY_LENGTH ); + } + + if( aes_init_done == 0 ) + { + aes_gen_tables(); + aes_init_done = 1; + } + + ctx->rk = RK = ctx->buf; + +#if defined(MBEDTLS_AESNI_C) && defined(MBEDTLS_HAVE_X86_64) + if( aes_aesni_has_support ) + return( mbedtls_aesni_setkey_enc( (unsigned char *) ctx->rk, key, keybits ) ); +#endif + + for( i = 0; i < ( keybits >> 5 ); i++ ) + { + RK[i] = MBEDTLS_GET_UINT32_LE( key, i << 2 ); + } + + switch( ctx->nr ) + { + case 10: + + for( i = 0; i < 10; i++, RK += 4 ) + { + RK[4] = RK[0] ^ RCON[i] ^ + ( (uint32_t) FSb[ MBEDTLS_BYTE_1( RK[3] ) ] ) ^ + ( (uint32_t) FSb[ MBEDTLS_BYTE_2( RK[3] ) ] << 8 ) ^ + ( (uint32_t) FSb[ MBEDTLS_BYTE_3( RK[3] ) ] << 16 ) ^ + ( (uint32_t) FSb[ MBEDTLS_BYTE_0( RK[3] ) ] << 24 ); + + RK[5] = RK[1] ^ RK[4]; + RK[6] = RK[2] ^ RK[5]; + RK[7] = RK[3] ^ RK[6]; + } + break; + + case 12: + + for( i = 0; i < 8; i++, RK += 6 ) + { + RK[6] = RK[0] ^ RCON[i] ^ + ( (uint32_t) FSb[ MBEDTLS_BYTE_1( RK[5] ) ] ) ^ + ( (uint32_t) FSb[ MBEDTLS_BYTE_2( RK[5] ) ] << 8 ) ^ + ( (uint32_t) FSb[ MBEDTLS_BYTE_3( RK[5] ) ] << 16 ) ^ + ( (uint32_t) FSb[ MBEDTLS_BYTE_0( RK[5] ) ] << 24 ); + + RK[7] = RK[1] ^ RK[6]; + RK[8] = RK[2] ^ RK[7]; + RK[9] = RK[3] ^ RK[8]; + RK[10] = RK[4] ^ RK[9]; + RK[11] = RK[5] ^ RK[10]; + } + break; + + case 14: + + for( i = 0; i < 7; i++, RK += 8 ) + { + RK[8] = RK[0] ^ RCON[i] ^ + ( (uint32_t) FSb[ MBEDTLS_BYTE_1( RK[7] ) ] ) ^ + ( (uint32_t) FSb[ MBEDTLS_BYTE_2( RK[7] ) ] << 8 ) ^ + ( (uint32_t) FSb[ MBEDTLS_BYTE_3( RK[7] ) ] << 16 ) ^ + ( (uint32_t) FSb[ MBEDTLS_BYTE_0( RK[7] ) ] << 24 ); + + RK[9] = RK[1] ^ RK[8]; + RK[10] = RK[2] ^ RK[9]; + RK[11] = RK[3] ^ RK[10]; + + RK[12] = RK[4] ^ + ( (uint32_t) FSb[ MBEDTLS_BYTE_0( RK[11] ) ] ) ^ + ( (uint32_t) FSb[ MBEDTLS_BYTE_1( RK[11] ) ] << 8 ) ^ + ( (uint32_t) FSb[ MBEDTLS_BYTE_2( RK[11] ) ] << 16 ) ^ + ( (uint32_t) FSb[ MBEDTLS_BYTE_3( RK[11] ) ] << 24 ); + + RK[13] = RK[5] ^ RK[12]; + RK[14] = RK[6] ^ RK[13]; + RK[15] = RK[7] ^ RK[14]; + } + break; + } + + return( 0 ); +} + +/* + * AES key schedule (decryption) + */ +int mbedtls_aes_setkey_dec( mbedtls_aes_context *ctx, const unsigned char *key, + unsigned int keybits ) +{ + int i, j, ret; + mbedtls_aes_context cty; + uint32_t *RK; + uint32_t *SK; + + AES_VALIDATE_RET( ctx != NULL ); + AES_VALIDATE_RET( key != NULL ); + + mbedtls_aes_init( &cty ); + + ctx->rk = RK = ctx->buf; + + /* Also checks keybits */ + if( ( ret = mbedtls_aes_setkey_enc( &cty, key, keybits ) ) != 0 ) + goto exit; + + ctx->nr = cty.nr; + +#if defined(MBEDTLS_AESNI_C) && defined(MBEDTLS_HAVE_X86_64) + if( aes_aesni_has_support ) { + mbedtls_aesni_inverse_key( (unsigned char *) ctx->rk, + (const unsigned char *) cty.rk, ctx->nr ); + goto exit; + } +#endif + + SK = cty.rk + cty.nr * 4; + + *RK++ = *SK++; + *RK++ = *SK++; + *RK++ = *SK++; + *RK++ = *SK++; + + for( i = ctx->nr - 1, SK -= 8; i > 0; i--, SK -= 8 ) + { + for( j = 0; j < 4; j++, SK++ ) + { + *RK++ = AES_RT0( FSb[ MBEDTLS_BYTE_0( *SK ) ] ) ^ + AES_RT1( FSb[ MBEDTLS_BYTE_1( *SK ) ] ) ^ + AES_RT2( FSb[ MBEDTLS_BYTE_2( *SK ) ] ) ^ + AES_RT3( FSb[ MBEDTLS_BYTE_3( *SK ) ] ); + } + } + + *RK++ = *SK++; + *RK++ = *SK++; + *RK++ = *SK++; + *RK++ = *SK++; + +exit: + mbedtls_aes_free( &cty ); + + return( ret ); +} + +#define AES_FROUND(X0, X1, X2, X3, Y0, Y1, Y2, Y3) \ + { uint32_t T; \ + X0 = *RK++; X1 = *RK++; X2 = *RK++; X3 = *RK++; \ + T=Y0; \ + X0 ^= FT0[ ( T ) & 0xFF ]; T >>= 8; \ + X3 ^= FT1[ ( T ) & 0xFF ]; T >>= 8; \ + X2 ^= FT2[ ( T ) & 0xFF ]; T >>= 8; \ + X1 ^= FT3[ ( T ) & 0xFF ]; \ + T=Y1; \ + X1 ^= FT0[ ( T ) & 0xFF ]; T >>= 8; \ + X0 ^= FT1[ ( T ) & 0xFF ]; T >>= 8; \ + X3 ^= FT2[ ( T ) & 0xFF ]; T >>= 8; \ + X2 ^= FT3[ ( T ) & 0xFF ]; \ + T=Y2; \ + X2 ^= FT0[ ( T ) & 0xFF ]; T >>= 8; \ + X1 ^= FT1[ ( T ) & 0xFF ]; T >>= 8; \ + X0 ^= FT2[ ( T ) & 0xFF ]; T >>= 8; \ + X3 ^= FT3[ ( T ) & 0xFF ]; \ + T=Y3; \ + X3 ^= FT0[ ( T ) & 0xFF ]; T >>= 8; \ + X2 ^= FT1[ ( T ) & 0xFF ]; T >>= 8; \ + X1 ^= FT2[ ( T ) & 0xFF ]; T >>= 8; \ + X0 ^= FT3[ ( T ) & 0xFF ]; \ + } + +#define AES_RROUND(X0,X1,X2,X3,Y0,Y1,Y2,Y3) \ +{ uint32_t T; \ + X0 = *RK++; X1 = *RK++; X2 = *RK++; X3 = *RK++; \ + T=Y0; \ + X0 ^= RT0[ ( T ) & 0xFF ]; T >>= 8; \ + X1 ^= RT1[ ( T ) & 0xFF ]; T >>= 8; \ + X2 ^= RT2[ ( T ) & 0xFF ]; T >>= 8; \ + X3 ^= RT3[ ( T ) & 0xFF ]; \ + T=Y1; \ + X1 ^= RT0[ ( T ) & 0xFF ]; T >>= 8; \ + X2 ^= RT1[ ( T ) & 0xFF ]; T >>= 8; \ + X3 ^= RT2[ ( T ) & 0xFF ]; T >>= 8; \ + X0 ^= RT3[ ( T ) & 0xFF ]; \ + T=Y2; \ + X2 ^= RT0[ ( T ) & 0xFF ]; T >>= 8; \ + X3 ^= RT1[ ( T ) & 0xFF ]; T >>= 8; \ + X0 ^= RT2[ ( T ) & 0xFF ]; T >>= 8; \ + X2 ^= RT3[ ( T ) & 0xFF ]; \ + T=Y3; \ + X3 ^= RT0[ ( T ) & 0xFF ]; T >>= 8; \ + X0 ^= RT1[ ( T ) & 0xFF ]; T >>= 8; \ + X1 ^= RT2[ ( T ) & 0xFF ]; T >>= 8; \ + X2 ^= RT3[ ( T ) & 0xFF ]; \ +} + +/* + * AES-ECB block encryption + */ +int mbedtls_internal_aes_encrypt( mbedtls_aes_context *ctx, + const unsigned char input[16], + unsigned char output[16] ) +{ + int i; + uint32_t T0,*RK = ctx->rk; + struct + { + uint32_t X[4]; + uint32_t Y[4]; + } t; + + t.X[0] = MBEDTLS_GET_UINT32_LE( input, 0 ); t.X[0] ^= *RK++; + t.X[1] = MBEDTLS_GET_UINT32_LE( input, 4 ); t.X[1] ^= *RK++; + t.X[2] = MBEDTLS_GET_UINT32_LE( input, 8 ); t.X[2] ^= *RK++; + t.X[3] = MBEDTLS_GET_UINT32_LE( input, 12 ); t.X[3] ^= *RK++; + + for( i = ( ctx->nr >> 1 ) - 1; i > 0; i-- ) + { + AES_FROUND( t.Y[0], t.Y[1], t.Y[2], t.Y[3], t.X[0], t.X[1], t.X[2], t.X[3] ); + AES_FROUND( t.X[0], t.X[1], t.X[2], t.X[3], t.Y[0], t.Y[1], t.Y[2], t.Y[3] ); + } + + AES_FROUND( t.Y[0], t.Y[1], t.Y[2], t.Y[3], t.X[0], t.X[1], t.X[2], t.X[3] ); +#define AES_XROUND(X,Y0,Y1,Y2,Y3) \ + T0 = FSb[ ( Y3 >> 24 ) & 0xFF ]; T0 <<= 8; \ + T0 |= FSb[ ( Y2 >> 16 ) & 0xFF ]; T0 <<= 8; \ + T0 |= FSb[ ( Y1 >> 8 ) & 0xFF ]; T0 <<= 8;\ + T0 |= FSb[ ( Y0 ) & 0xFF ]; \ + X = *RK++ ^ T0 + + AES_XROUND(t.X[0],t.Y[0],t.Y[1],t.Y[2],t.Y[3]); + AES_XROUND(t.X[1],t.Y[1],t.Y[2],t.Y[3],t.Y[0]); + AES_XROUND(t.X[2],t.Y[2],t.Y[3],t.Y[0],t.Y[1]); + AES_XROUND(t.X[3],t.Y[3],t.Y[0],t.Y[1],t.Y[2]); +#undef AES_XROUND + + MBEDTLS_PUT_UINT32_LE( t.X[0], output, 0 ); + MBEDTLS_PUT_UINT32_LE( t.X[1], output, 4 ); + MBEDTLS_PUT_UINT32_LE( t.X[2], output, 8 ); + MBEDTLS_PUT_UINT32_LE( t.X[3], output, 12 ); + + return( 0 ); +} + +/* + * AES-ECB block decryption + */ +int mbedtls_internal_aes_decrypt( mbedtls_aes_context *ctx, + const unsigned char input[16], + unsigned char output[16] ) +{ + int i; + uint32_t T0,*RK = ctx->rk; + struct + { + uint32_t X[4]; + uint32_t Y[4]; + } t; + + t.X[0] = MBEDTLS_GET_UINT32_LE( input, 0 ); t.X[0] ^= *RK++; + t.X[1] = MBEDTLS_GET_UINT32_LE( input, 4 ); t.X[1] ^= *RK++; + t.X[2] = MBEDTLS_GET_UINT32_LE( input, 8 ); t.X[2] ^= *RK++; + t.X[3] = MBEDTLS_GET_UINT32_LE( input, 12 ); t.X[3] ^= *RK++; + + for( i = ( ctx->nr >> 1 ) - 1; i > 0; i-- ) + { + AES_RROUND( t.Y[0], t.Y[1], t.Y[2], t.Y[3], t.X[0], t.X[1], t.X[2], t.X[3] ); + AES_RROUND( t.X[0], t.X[1], t.X[2], t.X[3], t.Y[0], t.Y[1], t.Y[2], t.Y[3] ); + } + + AES_RROUND( t.Y[0], t.Y[1], t.Y[2], t.Y[3], t.X[0], t.X[1], t.X[2], t.X[3] ); +#define AES_XROUNDD(X,Y0,Y1,Y2,Y3) \ + T0 = RSb[ ( Y3 >> 24 ) & 0xFF ]; T0 <<= 8; \ + T0 |= RSb[ ( Y2 >> 16 ) & 0xFF ]; T0 <<= 8; \ + T0 |= RSb[ ( Y1 >> 8 ) & 0xFF ]; T0 <<= 8;\ + T0 |= RSb[ ( Y0 ) & 0xFF ]; \ + X = *RK++ ^ T0 + + AES_XROUNDD(t.X[0],t.Y[0],t.Y[3],t.Y[2],t.Y[1]); + AES_XROUNDD(t.X[1],t.Y[1],t.Y[0],t.Y[3],t.Y[2]); + AES_XROUNDD(t.X[2],t.Y[2],t.Y[1],t.Y[0],t.Y[3]); + AES_XROUNDD(t.X[3],t.Y[3],t.Y[2],t.Y[1],t.Y[0]); + +#undef AES_XROUNDD + + MBEDTLS_PUT_UINT32_LE( t.X[0], output, 0 ); + MBEDTLS_PUT_UINT32_LE( t.X[1], output, 4 ); + MBEDTLS_PUT_UINT32_LE( t.X[2], output, 8 ); + MBEDTLS_PUT_UINT32_LE( t.X[3], output, 12 ); + + return( 0 ); +} + +/* + * AES-ECB block encryption/decryption + */ +int mbedtls_aes_crypt_ecb( mbedtls_aes_context *ctx, + int mode, + const unsigned char input[16], + unsigned char output[16] ) +{ + AES_VALIDATE_RET( ctx != NULL ); + AES_VALIDATE_RET( input != NULL ); + AES_VALIDATE_RET( output != NULL ); + AES_VALIDATE_RET( mode == MBEDTLS_AES_ENCRYPT || + mode == MBEDTLS_AES_DECRYPT ); + +#if defined(MBEDTLS_AESNI_C) && defined(MBEDTLS_HAVE_X86_64) + if( aes_aesni_has_support ) + return( mbedtls_aesni_crypt_ecb( ctx, mode, input, output ) ); +#endif + + + if( mode == MBEDTLS_AES_ENCRYPT ) + return( mbedtls_internal_aes_encrypt( ctx, input, output ) ); + else + return( mbedtls_internal_aes_decrypt( ctx, input, output ) ); +} + diff --git a/src/components/implementation/simple_nf/ndpi/gcrypt/aes.h b/src/components/implementation/simple_nf/ndpi/gcrypt/aes.h new file mode 100644 index 0000000000..edfee5a7be --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/gcrypt/aes.h @@ -0,0 +1,271 @@ +/** + * \file aes.h + * + * \brief This file contains AES definitions and functions. + * + * The Advanced Encryption Standard (AES) specifies a FIPS-approved + * cryptographic algorithm that can be used to protect electronic + * data. + * + * The AES algorithm is a symmetric block cipher that can + * encrypt and decrypt information. For more information, see + * FIPS Publication 197: Advanced Encryption Standard and + * ISO/IEC 18033-2:2006: Information technology -- Security + * techniques -- Encryption algorithms -- Part 2: Asymmetric + * ciphers. + * + * The AES-XTS block mode is standardized by NIST SP 800-38E + * + * and described in detail by IEEE P1619 + * . + */ + +/* + * Copyright The Mbed TLS Contributors + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef MBEDTLS_AES_H +#define MBEDTLS_AES_H + + + +/* padlock.c and aesni.c rely on these values! */ +#define MBEDTLS_AES_ENCRYPT 1 /**< AES encryption. */ +#define MBEDTLS_AES_DECRYPT 0 /**< AES decryption. */ + +/* Error codes in range 0x0020-0x0022 */ +/** Invalid key length. */ +#define MBEDTLS_ERR_AES_INVALID_KEY_LENGTH -0x0020 +/** Invalid data input length. */ +#define MBEDTLS_ERR_AES_INVALID_INPUT_LENGTH -0x0022 + +/* Error codes in range 0x0021-0x0025 */ +/** Invalid input data. */ +#define MBEDTLS_ERR_AES_BAD_INPUT_DATA -0x0021 + +#if ( defined(__ARMCC_VERSION) || defined(_MSC_VER) ) && \ + !defined(inline) && !defined(__cplusplus) +#define inline __inline +#endif + +#ifdef __cplusplus +extern "C" { +#endif + +// Regular implementation +// + +/** + * \brief The AES context-type definition. + */ +typedef struct mbedtls_aes_context +{ + int nr; /*!< The number of rounds. */ + uint32_t *rk; /*!< AES round keys. */ + uint32_t buf[68]; /*!< Unaligned data buffer. This buffer can + hold 32 extra Bytes, which can be used for + one of the following purposes: +
  • Alignment if VIA padlock is + used.
    • +
  • Simplifying key expansion in the 256-bit + case by generating an extra round key. +
*/ +} +mbedtls_aes_context; + + + +/** + * \brief This function initializes the specified AES context. + * + * It must be the first API called before using + * the context. + * + * \param ctx The AES context to initialize. This must not be \c NULL. + */ +void mbedtls_aes_init( mbedtls_aes_context *ctx ); + +/** + * \brief This function releases and clears the specified AES context. + * + * \param ctx The AES context to clear. + * If this is \c NULL, this function does nothing. + * Otherwise, the context must have been at least initialized. + */ +void mbedtls_aes_free( mbedtls_aes_context *ctx ); + + +/** + * \brief This function sets the encryption key. + * + * \param ctx The AES context to which the key should be bound. + * It must be initialized. + * \param key The encryption key. + * This must be a readable buffer of size \p keybits bits. + * \param keybits The size of data passed in bits. Valid options are: + *
  • 128 bits
    • + *
  • 192 bits
    • + *
  • 256 bits
+ * + * \return \c 0 on success. + * \return #MBEDTLS_ERR_AES_INVALID_KEY_LENGTH on failure. + */ +MBEDTLS_CHECK_RETURN_TYPICAL +int mbedtls_aes_setkey_enc( mbedtls_aes_context *ctx, const unsigned char *key, + unsigned int keybits ); + +/** + * \brief This function sets the decryption key. + * + * \param ctx The AES context to which the key should be bound. + * It must be initialized. + * \param key The decryption key. + * This must be a readable buffer of size \p keybits bits. + * \param keybits The size of data passed. Valid options are: + *
  • 128 bits
    • + *
  • 192 bits
    • + *
  • 256 bits
+ * + * \return \c 0 on success. + * \return #MBEDTLS_ERR_AES_INVALID_KEY_LENGTH on failure. + */ +MBEDTLS_CHECK_RETURN_TYPICAL +int mbedtls_aes_setkey_dec( mbedtls_aes_context *ctx, const unsigned char *key, + unsigned int keybits ); + + +/** + * \brief This function performs an AES single-block encryption or + * decryption operation. + * + * It performs the operation defined in the \p mode parameter + * (encrypt or decrypt), on the input data buffer defined in + * the \p input parameter. + * + * mbedtls_aes_init(), and either mbedtls_aes_setkey_enc() or + * mbedtls_aes_setkey_dec() must be called before the first + * call to this API with the same context. + * + * \param ctx The AES context to use for encryption or decryption. + * It must be initialized and bound to a key. + * \param mode The AES operation: #MBEDTLS_AES_ENCRYPT or + * #MBEDTLS_AES_DECRYPT. + * \param input The buffer holding the input data. + * It must be readable and at least \c 16 Bytes long. + * \param output The buffer where the output data will be written. + * It must be writeable and at least \c 16 Bytes long. + + * \return \c 0 on success. + */ +MBEDTLS_CHECK_RETURN_TYPICAL +int mbedtls_aes_crypt_ecb( mbedtls_aes_context *ctx, + int mode, + const unsigned char input[16], + unsigned char output[16] ); + +#if defined(MBEDTLS_CIPHER_MODE_CBC) +/** + * \brief This function performs an AES-CBC encryption or decryption operation + * on full blocks. + * + * It performs the operation defined in the \p mode + * parameter (encrypt/decrypt), on the input data buffer defined in + * the \p input parameter. + * + * It can be called as many times as needed, until all the input + * data is processed. mbedtls_aes_init(), and either + * mbedtls_aes_setkey_enc() or mbedtls_aes_setkey_dec() must be called + * before the first call to this API with the same context. + * + * \note This function operates on full blocks, that is, the input size + * must be a multiple of the AES block size of \c 16 Bytes. + * + * \note Upon exit, the content of the IV is updated so that you can + * call the same function again on the next + * block(s) of data and get the same result as if it was + * encrypted in one call. This allows a "streaming" usage. + * If you need to retain the contents of the IV, you should + * either save it manually or use the cipher module instead. + * + * + * \param ctx The AES context to use for encryption or decryption. + * It must be initialized and bound to a key. + * \param mode The AES operation: #MBEDTLS_AES_ENCRYPT or + * #MBEDTLS_AES_DECRYPT. + * \param length The length of the input data in Bytes. This must be a + * multiple of the block size (\c 16 Bytes). + * \param iv Initialization vector (updated after use). + * It must be a readable and writeable buffer of \c 16 Bytes. + * \param input The buffer holding the input data. + * It must be readable and of size \p length Bytes. + * \param output The buffer holding the output data. + * It must be writeable and of size \p length Bytes. + * + * \return \c 0 on success. + * \return #MBEDTLS_ERR_AES_INVALID_INPUT_LENGTH + * on failure. + */ +MBEDTLS_CHECK_RETURN_TYPICAL +int mbedtls_aes_crypt_cbc( mbedtls_aes_context *ctx, + int mode, + size_t length, + unsigned char iv[16], + const unsigned char *input, + unsigned char *output ); +#endif /* MBEDTLS_CIPHER_MODE_CBC */ + + + + + +/** + * \brief Internal AES block encryption function. This is only + * exposed to allow overriding it using + * \c MBEDTLS_AES_ENCRYPT_ALT. + * + * \param ctx The AES context to use for encryption. + * \param input The plaintext block. + * \param output The output (ciphertext) block. + * + * \return \c 0 on success. + */ +MBEDTLS_CHECK_RETURN_TYPICAL +int mbedtls_internal_aes_encrypt( mbedtls_aes_context *ctx, + const unsigned char input[16], + unsigned char output[16] ); + +/** + * \brief Internal AES block decryption function. This is only + * exposed to allow overriding it using see + * \c MBEDTLS_AES_DECRYPT_ALT. + * + * \param ctx The AES context to use for decryption. + * \param input The ciphertext block. + * \param output The output (plaintext) block. + * + * \return \c 0 on success. + */ +MBEDTLS_CHECK_RETURN_TYPICAL +int mbedtls_internal_aes_decrypt( mbedtls_aes_context *ctx, + const unsigned char input[16], + unsigned char output[16] ); + + +#ifdef __cplusplus +} +#endif + +#endif /* aes.h */ diff --git a/src/components/implementation/simple_nf/ndpi/gcrypt/aesni.c b/src/components/implementation/simple_nf/ndpi/gcrypt/aesni.c new file mode 100644 index 0000000000..b47fb6ba6e --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/gcrypt/aesni.c @@ -0,0 +1,523 @@ +/* + * AES-NI support functions + * + * Copyright The Mbed TLS Contributors + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +/* + * [AES-WP] http://software.intel.com/en-us/articles/intel-advanced-encryption-standard-aes-instructions-set + * [CLMUL-WP] http://software.intel.com/en-us/articles/intel-carry-less-multiplication-instruction-and-its-usage-for-computing-the-gcm-mode/ + */ + + +#if defined(__has_feature) +#if __has_feature(memory_sanitizer) +/* Using "#pragma message" instead of "#warning" to allow compilation with -Werror. + This pragma directive should be supported from every compilers supporting also memory sanitizer +*/ +#pragma message "MBEDTLS_AESNI_C is known to cause spurious error reports with some memory sanitizers as they do not understand the assembly code." +#endif +#endif + +#ifndef asm +#define asm __asm +#endif + +#if defined(MBEDTLS_HAVE_X86_64) +#if defined(linux) || defined(__linux__) +#include +#endif + +#if defined(WIN32) || defined(WIN64) +#include +#endif + +#if defined(linux) || defined(__linux__) +static u_int8_t cached_has_aesni = 0, has_aesni_checked = 0; +#endif + +/* + * AES-NI support detection routine + */ +int mbedtls_aesni_has_support( unsigned int what ) +{ +#if defined(__has_feature) +# if __has_feature(memory_sanitizer) + return 0; +# endif +#endif + +#if defined(linux) || defined(__linux__) + if(has_aesni_checked == 0) { + /* + NOTE + + This code is necessary as __get_cpuid() is not reliable + Example with Intel(R) Celeron(R) CPU N2930 (that has NO AES-NI) + the code based on __get_cpuid() reports that AES-NI is present + and thus nDPI crashes on such platform. + */ + FILE *fd = fopen("/proc/cpuinfo", "r"); + + if(fd != NULL) { + char *line = NULL; + size_t len = 0; + u_int8_t num_lines = 0; + + while(getline(&line, &len, fd) != -1) { + if(strstr(line, "aes")) { + /* printf("FOUND %s", line); */ + cached_has_aesni = 1; + break; + } + + if(++num_lines > 99) + break; /* We giveup */ + } + + free(line); + fclose(fd); + + has_aesni_checked = 1; + } + } + + return(cached_has_aesni); + +#if 0 + if (__get_cpuid(1, &eax, &ebx, &ecx, &edx) == 0) + { + return 0; + } + + return ( (ecx & what) != 0 ); +#endif +#elif defined(WIN32) || defined(WIN64) + int cpuInfo[4]; + + __cpuid(cpuInfo, 1); + + return ( (cpuInfo[2] & what) != 0 ); +#else + volatile unsigned int c = 0; + + asm( "movl $1, %%eax \n\t" + "cpuid \n\t" + : "=c" (c) + : + : "eax", "ebx", "edx" ); + + return( ( c & what ) != 0 ); +#endif +} + +/* + * Binutils needs to be at least 2.19 to support AES-NI instructions. + * Unfortunately, a lot of users have a lower version now (2014-04). + * Emit bytecode directly in order to support "old" version of gas. + * + * Opcodes from the Intel architecture reference manual, vol. 3. + * We always use registers, so we don't need prefixes for memory operands. + * Operand macros are in gas order (src, dst) as opposed to Intel order + * (dst, src) in order to blend better into the surrounding assembly code. + */ +#define AESDEC ".byte 0x66,0x0F,0x38,0xDE," +#define AESDECLAST ".byte 0x66,0x0F,0x38,0xDF," +#define AESENC ".byte 0x66,0x0F,0x38,0xDC," +#define AESENCLAST ".byte 0x66,0x0F,0x38,0xDD," +#define AESIMC ".byte 0x66,0x0F,0x38,0xDB," +#define AESKEYGENA ".byte 0x66,0x0F,0x3A,0xDF," +#define PCLMULQDQ ".byte 0x66,0x0F,0x3A,0x44," + +#define xmm0_xmm0 "0xC0" +#define xmm0_xmm1 "0xC8" +#define xmm0_xmm2 "0xD0" +#define xmm0_xmm3 "0xD8" +#define xmm0_xmm4 "0xE0" +#define xmm1_xmm0 "0xC1" +#define xmm1_xmm2 "0xD1" + +/* + * AES-NI AES-ECB block en(de)cryption + */ +int mbedtls_aesni_crypt_ecb( mbedtls_aes_context *ctx, + int mode, + const unsigned char input[16], + unsigned char output[16] ) +{ + asm( "movdqu (%3), %%xmm0 \n\t" // load input + "movdqu (%1), %%xmm1 \n\t" // load round key 0 + "pxor %%xmm1, %%xmm0 \n\t" // round 0 + "add $16, %1 \n\t" // point to next round key + "subl $1, %0 \n\t" // normal rounds = nr - 1 + "test %2, %2 \n\t" // mode? + "jz 2f \n\t" // 0 = decrypt + + "1: \n\t" // encryption loop + "movdqu (%1), %%xmm1 \n\t" // load round key + AESENC xmm1_xmm0 "\n\t" // do round + "add $16, %1 \n\t" // point to next round key + "subl $1, %0 \n\t" // loop + "jnz 1b \n\t" + "movdqu (%1), %%xmm1 \n\t" // load round key + AESENCLAST xmm1_xmm0 "\n\t" // last round + "jmp 3f \n\t" + + "2: \n\t" // decryption loop + "movdqu (%1), %%xmm1 \n\t" + AESDEC xmm1_xmm0 "\n\t" // do round + "add $16, %1 \n\t" + "subl $1, %0 \n\t" + "jnz 2b \n\t" + "movdqu (%1), %%xmm1 \n\t" // load round key + AESDECLAST xmm1_xmm0 "\n\t" // last round + + "3: \n\t" + "movdqu %%xmm0, (%4) \n\t" // export output + : + : "r" (ctx->nr), "r" (ctx->rk), "r" (mode), "r" (input), "r" (output) + : "memory", "cc", "xmm0", "xmm1" ); + + + return( 0 ); +} + +/* + * GCM multiplication: c = a times b in GF(2^128) + * Based on [CLMUL-WP] algorithms 1 (with equation 27) and 5. + */ +void mbedtls_aesni_gcm_mult( unsigned char c[16], + const unsigned char a[16], + const unsigned char b[16] ) +{ + unsigned char aa[16], bb[16], cc[16]; + size_t i; + + /* The inputs are in big-endian order, so byte-reverse them */ + for( i = 0; i < 16; i++ ) + { + aa[i] = a[15 - i]; + bb[i] = b[15 - i]; + } + + asm( "movdqu (%0), %%xmm0 \n\t" // a1:a0 + "movdqu (%1), %%xmm1 \n\t" // b1:b0 + + /* + * Caryless multiplication xmm2:xmm1 = xmm0 * xmm1 + * using [CLMUL-WP] algorithm 1 (p. 13). + */ + "movdqa %%xmm1, %%xmm2 \n\t" // copy of b1:b0 + "movdqa %%xmm1, %%xmm3 \n\t" // same + "movdqa %%xmm1, %%xmm4 \n\t" // same + PCLMULQDQ xmm0_xmm1 ",0x00 \n\t" // a0*b0 = c1:c0 + PCLMULQDQ xmm0_xmm2 ",0x11 \n\t" // a1*b1 = d1:d0 + PCLMULQDQ xmm0_xmm3 ",0x10 \n\t" // a0*b1 = e1:e0 + PCLMULQDQ xmm0_xmm4 ",0x01 \n\t" // a1*b0 = f1:f0 + "pxor %%xmm3, %%xmm4 \n\t" // e1+f1:e0+f0 + "movdqa %%xmm4, %%xmm3 \n\t" // same + "psrldq $8, %%xmm4 \n\t" // 0:e1+f1 + "pslldq $8, %%xmm3 \n\t" // e0+f0:0 + "pxor %%xmm4, %%xmm2 \n\t" // d1:d0+e1+f1 + "pxor %%xmm3, %%xmm1 \n\t" // c1+e0+f1:c0 + + /* + * Now shift the result one bit to the left, + * taking advantage of [CLMUL-WP] eq 27 (p. 20) + */ + "movdqa %%xmm1, %%xmm3 \n\t" // r1:r0 + "movdqa %%xmm2, %%xmm4 \n\t" // r3:r2 + "psllq $1, %%xmm1 \n\t" // r1<<1:r0<<1 + "psllq $1, %%xmm2 \n\t" // r3<<1:r2<<1 + "psrlq $63, %%xmm3 \n\t" // r1>>63:r0>>63 + "psrlq $63, %%xmm4 \n\t" // r3>>63:r2>>63 + "movdqa %%xmm3, %%xmm5 \n\t" // r1>>63:r0>>63 + "pslldq $8, %%xmm3 \n\t" // r0>>63:0 + "pslldq $8, %%xmm4 \n\t" // r2>>63:0 + "psrldq $8, %%xmm5 \n\t" // 0:r1>>63 + "por %%xmm3, %%xmm1 \n\t" // r1<<1|r0>>63:r0<<1 + "por %%xmm4, %%xmm2 \n\t" // r3<<1|r2>>62:r2<<1 + "por %%xmm5, %%xmm2 \n\t" // r3<<1|r2>>62:r2<<1|r1>>63 + + /* + * Now reduce modulo the GCM polynomial x^128 + x^7 + x^2 + x + 1 + * using [CLMUL-WP] algorithm 5 (p. 20). + * Currently xmm2:xmm1 holds x3:x2:x1:x0 (already shifted). + */ + /* Step 2 (1) */ + "movdqa %%xmm1, %%xmm3 \n\t" // x1:x0 + "movdqa %%xmm1, %%xmm4 \n\t" // same + "movdqa %%xmm1, %%xmm5 \n\t" // same + "psllq $63, %%xmm3 \n\t" // x1<<63:x0<<63 = stuff:a + "psllq $62, %%xmm4 \n\t" // x1<<62:x0<<62 = stuff:b + "psllq $57, %%xmm5 \n\t" // x1<<57:x0<<57 = stuff:c + + /* Step 2 (2) */ + "pxor %%xmm4, %%xmm3 \n\t" // stuff:a+b + "pxor %%xmm5, %%xmm3 \n\t" // stuff:a+b+c + "pslldq $8, %%xmm3 \n\t" // a+b+c:0 + "pxor %%xmm3, %%xmm1 \n\t" // x1+a+b+c:x0 = d:x0 + + /* Steps 3 and 4 */ + "movdqa %%xmm1,%%xmm0 \n\t" // d:x0 + "movdqa %%xmm1,%%xmm4 \n\t" // same + "movdqa %%xmm1,%%xmm5 \n\t" // same + "psrlq $1, %%xmm0 \n\t" // e1:x0>>1 = e1:e0' + "psrlq $2, %%xmm4 \n\t" // f1:x0>>2 = f1:f0' + "psrlq $7, %%xmm5 \n\t" // g1:x0>>7 = g1:g0' + "pxor %%xmm4, %%xmm0 \n\t" // e1+f1:e0'+f0' + "pxor %%xmm5, %%xmm0 \n\t" // e1+f1+g1:e0'+f0'+g0' + // e0'+f0'+g0' is almost e0+f0+g0, ex\tcept for some missing + // bits carried from d. Now get those\t bits back in. + "movdqa %%xmm1,%%xmm3 \n\t" // d:x0 + "movdqa %%xmm1,%%xmm4 \n\t" // same + "movdqa %%xmm1,%%xmm5 \n\t" // same + "psllq $63, %%xmm3 \n\t" // d<<63:stuff + "psllq $62, %%xmm4 \n\t" // d<<62:stuff + "psllq $57, %%xmm5 \n\t" // d<<57:stuff + "pxor %%xmm4, %%xmm3 \n\t" // d<<63+d<<62:stuff + "pxor %%xmm5, %%xmm3 \n\t" // missing bits of d:stuff + "psrldq $8, %%xmm3 \n\t" // 0:missing bits of d + "pxor %%xmm3, %%xmm0 \n\t" // e1+f1+g1:e0+f0+g0 + "pxor %%xmm1, %%xmm0 \n\t" // h1:h0 + "pxor %%xmm2, %%xmm0 \n\t" // x3+h1:x2+h0 + + "movdqu %%xmm0, (%2) \n\t" // done + : + : "r" (aa), "r" (bb), "r" (cc) + : "memory", "cc", "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5" ); + + /* Now byte-reverse the outputs */ + for( i = 0; i < 16; i++ ) + c[i] = cc[15 - i]; + + return; +} + +/* + * Compute decryption round keys from encryption round keys + */ +void mbedtls_aesni_inverse_key( unsigned char *invkey, + const unsigned char *fwdkey, int nr ) +{ + unsigned char *ik = invkey; + const unsigned char *fk = fwdkey + 16 * nr; + + memcpy( ik, fk, 16 ); + + for( fk -= 16, ik += 16; fk > fwdkey; fk -= 16, ik += 16 ) + asm( "movdqu (%0), %%xmm0 \n\t" + AESIMC xmm0_xmm0 "\n\t" + "movdqu %%xmm0, (%1) \n\t" + : + : "r" (fk), "r" (ik) + : "memory", "xmm0" ); + + memcpy( ik, fk, 16 ); +} + +/* + * Key expansion, 128-bit case + */ +static void aesni_setkey_enc_128( unsigned char *rk, + const unsigned char *key ) +{ + asm( "movdqu (%1), %%xmm0 \n\t" // copy the original key + "movdqu %%xmm0, (%0) \n\t" // as round key 0 + "jmp 2f \n\t" // skip auxiliary routine + + /* + * Finish generating the next round key. + * + * On entry xmm0 is r3:r2:r1:r0 and xmm1 is X:stuff:stuff:stuff + * with X = rot( sub( r3 ) ) ^ RCON. + * + * On exit, xmm0 is r7:r6:r5:r4 + * with r4 = X + r0, r5 = r4 + r1, r6 = r5 + r2, r7 = r6 + r3 + * and those are written to the round key buffer. + */ + "1: \n\t" + "pshufd $0xff, %%xmm1, %%xmm1 \n\t" // X:X:X:X + "pxor %%xmm0, %%xmm1 \n\t" // X+r3:X+r2:X+r1:r4 + "pslldq $4, %%xmm0 \n\t" // r2:r1:r0:0 + "pxor %%xmm0, %%xmm1 \n\t" // X+r3+r2:X+r2+r1:r5:r4 + "pslldq $4, %%xmm0 \n\t" // etc + "pxor %%xmm0, %%xmm1 \n\t" + "pslldq $4, %%xmm0 \n\t" + "pxor %%xmm1, %%xmm0 \n\t" // update xmm0 for next time! + "add $16, %0 \n\t" // point to next round key + "movdqu %%xmm0, (%0) \n\t" // write it + "ret \n\t" + + /* Main "loop" */ + "2: \n\t" + AESKEYGENA xmm0_xmm1 ",0x01 \n\tcall 1b \n\t" + AESKEYGENA xmm0_xmm1 ",0x02 \n\tcall 1b \n\t" + AESKEYGENA xmm0_xmm1 ",0x04 \n\tcall 1b \n\t" + AESKEYGENA xmm0_xmm1 ",0x08 \n\tcall 1b \n\t" + AESKEYGENA xmm0_xmm1 ",0x10 \n\tcall 1b \n\t" + AESKEYGENA xmm0_xmm1 ",0x20 \n\tcall 1b \n\t" + AESKEYGENA xmm0_xmm1 ",0x40 \n\tcall 1b \n\t" + AESKEYGENA xmm0_xmm1 ",0x80 \n\tcall 1b \n\t" + AESKEYGENA xmm0_xmm1 ",0x1B \n\tcall 1b \n\t" + AESKEYGENA xmm0_xmm1 ",0x36 \n\tcall 1b \n\t" + : + : "r" (rk), "r" (key) + : "memory", "cc", "0" ); +} + +/* + * Key expansion, 192-bit case + */ +static void aesni_setkey_enc_192( unsigned char *rk, + const unsigned char *key ) +{ + asm( "movdqu (%1), %%xmm0 \n\t" // copy original round key + "movdqu %%xmm0, (%0) \n\t" + "add $16, %0 \n\t" + "movq 16(%1), %%xmm1 \n\t" + "movq %%xmm1, (%0) \n\t" + "add $8, %0 \n\t" + "jmp 2f \n\t" // skip auxiliary routine + + /* + * Finish generating the next 6 quarter-keys. + * + * On entry xmm0 is r3:r2:r1:r0, xmm1 is stuff:stuff:r5:r4 + * and xmm2 is stuff:stuff:X:stuff with X = rot( sub( r3 ) ) ^ RCON. + * + * On exit, xmm0 is r9:r8:r7:r6 and xmm1 is stuff:stuff:r11:r10 + * and those are written to the round key buffer. + */ + "1: \n\t" + "pshufd $0x55, %%xmm2, %%xmm2 \n\t" // X:X:X:X + "pxor %%xmm0, %%xmm2 \n\t" // X+r3:X+r2:X+r1:r4 + "pslldq $4, %%xmm0 \n\t" // etc + "pxor %%xmm0, %%xmm2 \n\t" + "pslldq $4, %%xmm0 \n\t" + "pxor %%xmm0, %%xmm2 \n\t" + "pslldq $4, %%xmm0 \n\t" + "pxor %%xmm2, %%xmm0 \n\t" // update xmm0 = r9:r8:r7:r6 + "movdqu %%xmm0, (%0) \n\t" + "add $16, %0 \n\t" + "pshufd $0xff, %%xmm0, %%xmm2 \n\t" // r9:r9:r9:r9 + "pxor %%xmm1, %%xmm2 \n\t" // stuff:stuff:r9+r5:r10 + "pslldq $4, %%xmm1 \n\t" // r2:r1:r0:0 + "pxor %%xmm2, %%xmm1 \n\t" // xmm1 = stuff:stuff:r11:r10 + "movq %%xmm1, (%0) \n\t" + "add $8, %0 \n\t" + "ret \n\t" + + "2: \n\t" + AESKEYGENA xmm1_xmm2 ",0x01 \n\tcall 1b \n\t" + AESKEYGENA xmm1_xmm2 ",0x02 \n\tcall 1b \n\t" + AESKEYGENA xmm1_xmm2 ",0x04 \n\tcall 1b \n\t" + AESKEYGENA xmm1_xmm2 ",0x08 \n\tcall 1b \n\t" + AESKEYGENA xmm1_xmm2 ",0x10 \n\tcall 1b \n\t" + AESKEYGENA xmm1_xmm2 ",0x20 \n\tcall 1b \n\t" + AESKEYGENA xmm1_xmm2 ",0x40 \n\tcall 1b \n\t" + AESKEYGENA xmm1_xmm2 ",0x80 \n\tcall 1b \n\t" + + : + : "r" (rk), "r" (key) + : "memory", "cc", "0" ); +} + +/* + * Key expansion, 256-bit case + */ +static void aesni_setkey_enc_256( unsigned char *rk, + const unsigned char *key ) +{ + asm( "movdqu (%1), %%xmm0 \n\t" + "movdqu %%xmm0, (%0) \n\t" + "add $16, %0 \n\t" + "movdqu 16(%1), %%xmm1 \n\t" + "movdqu %%xmm1, (%0) \n\t" + "jmp 2f \n\t" // skip auxiliary routine + + /* + * Finish generating the next two round keys. + * + * On entry xmm0 is r3:r2:r1:r0, xmm1 is r7:r6:r5:r4 and + * xmm2 is X:stuff:stuff:stuff with X = rot( sub( r7 )) ^ RCON + * + * On exit, xmm0 is r11:r10:r9:r8 and xmm1 is r15:r14:r13:r12 + * and those have been written to the output buffer. + */ + "1: \n\t" + "pshufd $0xff, %%xmm2, %%xmm2 \n\t" + "pxor %%xmm0, %%xmm2 \n\t" + "pslldq $4, %%xmm0 \n\t" + "pxor %%xmm0, %%xmm2 \n\t" + "pslldq $4, %%xmm0 \n\t" + "pxor %%xmm0, %%xmm2 \n\t" + "pslldq $4, %%xmm0 \n\t" + "pxor %%xmm2, %%xmm0 \n\t" + "add $16, %0 \n\t" + "movdqu %%xmm0, (%0) \n\t" + + /* Set xmm2 to stuff:Y:stuff:stuff with Y = subword( r11 ) + * and proceed to generate next round key from there */ + AESKEYGENA xmm0_xmm2 ",0x00 \n\t" + "pshufd $0xaa, %%xmm2, %%xmm2 \n\t" + "pxor %%xmm1, %%xmm2 \n\t" + "pslldq $4, %%xmm1 \n\t" + "pxor %%xmm1, %%xmm2 \n\t" + "pslldq $4, %%xmm1 \n\t" + "pxor %%xmm1, %%xmm2 \n\t" + "pslldq $4, %%xmm1 \n\t" + "pxor %%xmm2, %%xmm1 \n\t" + "add $16, %0 \n\t" + "movdqu %%xmm1, (%0) \n\t" + "ret \n\t" + + /* + * Main "loop" - Generating one more key than necessary, + * see definition of mbedtls_aes_context.buf + */ + "2: \n\t" + AESKEYGENA xmm1_xmm2 ",0x01 \n\tcall 1b \n\t" + AESKEYGENA xmm1_xmm2 ",0x02 \n\tcall 1b \n\t" + AESKEYGENA xmm1_xmm2 ",0x04 \n\tcall 1b \n\t" + AESKEYGENA xmm1_xmm2 ",0x08 \n\tcall 1b \n\t" + AESKEYGENA xmm1_xmm2 ",0x10 \n\tcall 1b \n\t" + AESKEYGENA xmm1_xmm2 ",0x20 \n\tcall 1b \n\t" + AESKEYGENA xmm1_xmm2 ",0x40 \n\tcall 1b \n\t" + : + : "r" (rk), "r" (key) + : "memory", "cc", "0" ); +} + +/* + * Key expansion, wrapper + */ +int mbedtls_aesni_setkey_enc( unsigned char *rk, + const unsigned char *key, + size_t bits ) +{ + switch( bits ) + { + case 128: aesni_setkey_enc_128( rk, key ); break; + case 192: aesni_setkey_enc_192( rk, key ); break; + case 256: aesni_setkey_enc_256( rk, key ); break; + default : return( MBEDTLS_ERR_AES_INVALID_KEY_LENGTH ); + } + + return( 0 ); +} + +#endif /* MBEDTLS_HAVE_X86_64 */ diff --git a/src/components/implementation/simple_nf/ndpi/gcrypt/aesni.h b/src/components/implementation/simple_nf/ndpi/gcrypt/aesni.h new file mode 100644 index 0000000000..ca614475d1 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/gcrypt/aesni.h @@ -0,0 +1,130 @@ +/** + * \file aesni.h + * + * \brief AES-NI for hardware AES acceleration on some Intel processors + * + * \warning These functions are only for internal use by other library + * functions; you must not call them directly. + */ +/* + * Copyright The Mbed TLS Contributors + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#ifndef MBEDTLS_AESNI_H +#define MBEDTLS_AESNI_H + + + +#define MBEDTLS_AESNI_AES 0x02000000u +#define MBEDTLS_AESNI_CLMUL 0x00000002u + +#if defined(MBEDTLS_HAVE_ASM) && defined(__GNUC__) && \ + ( defined(__amd64__) || defined(__x86_64__) ) && \ + ! defined(MBEDTLS_HAVE_X86_64) +#define MBEDTLS_HAVE_X86_64 +#endif + +#if defined(MBEDTLS_HAVE_X86_64) + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief Internal function to detect the AES-NI feature in CPUs. + * + * \note This function is only for internal use by other library + * functions; you must not call it directly. + * + * \param what The feature to detect + * (MBEDTLS_AESNI_AES or MBEDTLS_AESNI_CLMUL) + * + * \return 1 if CPU has support for the feature, 0 otherwise + */ +int mbedtls_aesni_has_support( unsigned int what ); + +/** + * \brief Internal AES-NI AES-ECB block encryption and decryption + * + * \note This function is only for internal use by other library + * functions; you must not call it directly. + * + * \param ctx AES context + * \param mode MBEDTLS_AES_ENCRYPT or MBEDTLS_AES_DECRYPT + * \param input 16-byte input block + * \param output 16-byte output block + * + * \return 0 on success (cannot fail) + */ +int mbedtls_aesni_crypt_ecb( mbedtls_aes_context *ctx, + int mode, + const unsigned char input[16], + unsigned char output[16] ); + +/** + * \brief Internal GCM multiplication: c = a * b in GF(2^128) + * + * \note This function is only for internal use by other library + * functions; you must not call it directly. + * + * \param c Result + * \param a First operand + * \param b Second operand + * + * \note Both operands and result are bit strings interpreted as + * elements of GF(2^128) as per the GCM spec. + */ +void mbedtls_aesni_gcm_mult( unsigned char c[16], + const unsigned char a[16], + const unsigned char b[16] ); + +/** + * \brief Internal round key inversion. This function computes + * decryption round keys from the encryption round keys. + * + * \note This function is only for internal use by other library + * functions; you must not call it directly. + * + * \param invkey Round keys for the equivalent inverse cipher + * \param fwdkey Original round keys (for encryption) + * \param nr Number of rounds (that is, number of round keys minus one) + */ +void mbedtls_aesni_inverse_key( unsigned char *invkey, + const unsigned char *fwdkey, + int nr ); + +/** + * \brief Internal key expansion for encryption + * + * \note This function is only for internal use by other library + * functions; you must not call it directly. + * + * \param rk Destination buffer where the round keys are written + * \param key Encryption key + * \param bits Key size in bits (must be 128, 192 or 256) + * + * \return 0 if successful, or MBEDTLS_ERR_AES_INVALID_KEY_LENGTH + */ +int mbedtls_aesni_setkey_enc( unsigned char *rk, + const unsigned char *key, + size_t bits ); + +#ifdef __cplusplus +} +#endif + +#endif /* MBEDTLS_HAVE_X86_64 */ + +#endif /* MBEDTLS_AESNI_H */ diff --git a/src/components/implementation/simple_nf/ndpi/gcrypt/cipher.c b/src/components/implementation/simple_nf/ndpi/gcrypt/cipher.c new file mode 100644 index 0000000000..2231db9f63 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/gcrypt/cipher.c @@ -0,0 +1,591 @@ +/** + * \file cipher.c + * + * \brief Generic cipher wrapper for mbed TLS + * + * \author Adriaan de Jong + * + * Copyright The Mbed TLS Contributors + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + + +#define CIPHER_VALIDATE_RET( cond ) \ + MBEDTLS_INTERNAL_VALIDATE_RET( cond, MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ) +#define CIPHER_VALIDATE( cond ) \ + MBEDTLS_INTERNAL_VALIDATE( cond ) + +static int supported_init = 0; + +const int *mbedtls_cipher_list( void ) +{ + const mbedtls_cipher_definition_t *def; + int *type; + + if( ! supported_init ) + { + def = mbedtls_cipher_definitions; + type = mbedtls_cipher_supported; + + while( def->type != 0 ) + *type++ = (*def++).type; + + *type = 0; + + supported_init = 1; + } + + return( mbedtls_cipher_supported ); +} + +const mbedtls_cipher_info_t *mbedtls_cipher_info_from_type( + const mbedtls_cipher_type_t cipher_type ) +{ + const mbedtls_cipher_definition_t *def; + + for( def = mbedtls_cipher_definitions; def->info != NULL; def++ ) + if( def->type == cipher_type ) + return( def->info ); + + return( NULL ); +} + +const mbedtls_cipher_info_t *mbedtls_cipher_info_from_string( + const char *cipher_name ) +{ + const mbedtls_cipher_definition_t *def; + + if( NULL == cipher_name ) + return( NULL ); + + for( def = mbedtls_cipher_definitions; def->info != NULL; def++ ) + if( ! strcmp( def->info->name, cipher_name ) ) + return( def->info ); + + return( NULL ); +} + +const mbedtls_cipher_info_t *mbedtls_cipher_info_from_values( + const mbedtls_cipher_id_t cipher_id, + int key_bitlen, + const mbedtls_cipher_mode_t mode ) +{ + const mbedtls_cipher_definition_t *def; + + for( def = mbedtls_cipher_definitions; def->info != NULL; def++ ) + if( def->info->base->cipher == cipher_id && + def->info->key_bitlen == (unsigned) key_bitlen && + def->info->mode == mode ) + return( def->info ); + + return( NULL ); +} + +void mbedtls_cipher_init( mbedtls_cipher_context_t *ctx ) +{ + CIPHER_VALIDATE( ctx != NULL ); + memset( ctx, 0, sizeof( mbedtls_cipher_context_t ) ); +} + +int mbedtls_cipher_setkey( mbedtls_cipher_context_t *ctx, + const unsigned char *key, + int key_bitlen, + const mbedtls_operation_t operation ) +{ + CIPHER_VALIDATE_RET( ctx != NULL ); + CIPHER_VALIDATE_RET( key != NULL ); + CIPHER_VALIDATE_RET( operation == MBEDTLS_ENCRYPT || + operation == MBEDTLS_DECRYPT ); + if( ctx->cipher_info == NULL ) + return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + + + if( ( ctx->cipher_info->flags & MBEDTLS_CIPHER_VARIABLE_KEY_LEN ) == 0 && + (int) ctx->cipher_info->key_bitlen != key_bitlen ) + { + return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + } + + ctx->key_bitlen = key_bitlen; + ctx->operation = operation; + + /* + * For OFB, CFB and CTR mode always use the encryption key schedule + */ + if( MBEDTLS_ENCRYPT == operation || + MBEDTLS_MODE_CFB == ctx->cipher_info->mode || + MBEDTLS_MODE_OFB == ctx->cipher_info->mode || + MBEDTLS_MODE_CTR == ctx->cipher_info->mode ) + { + return( ctx->cipher_info->base->setkey_enc_func( ctx->cipher_ctx, key, + ctx->key_bitlen ) ); + } + + if( MBEDTLS_DECRYPT == operation ) + return( ctx->cipher_info->base->setkey_dec_func( ctx->cipher_ctx, key, + ctx->key_bitlen ) ); + + return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); +} + +int mbedtls_cipher_set_iv( mbedtls_cipher_context_t *ctx, + const unsigned char *iv, + size_t iv_len ) +{ + size_t actual_iv_size; + + CIPHER_VALIDATE_RET( ctx != NULL ); + CIPHER_VALIDATE_RET( iv_len == 0 || iv != NULL ); + if( ctx->cipher_info == NULL ) + return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + + /* avoid buffer overflow in ctx->iv */ + if( iv_len > MBEDTLS_MAX_IV_LENGTH ) + return( MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE ); + + if( ( ctx->cipher_info->flags & MBEDTLS_CIPHER_VARIABLE_IV_LEN ) != 0 ) + actual_iv_size = iv_len; + else + { + actual_iv_size = ctx->cipher_info->iv_size; + + /* avoid reading past the end of input buffer */ + if( actual_iv_size > iv_len ) + return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + } + + +#if defined(MBEDTLS_GCM_C) + if( MBEDTLS_MODE_GCM == ctx->cipher_info->mode ) + { + return( mbedtls_gcm_starts( (mbedtls_gcm_context *) ctx->cipher_ctx, + ctx->operation, + iv, iv_len ) ); + } +#endif + + + if ( actual_iv_size != 0 ) + { + memcpy( ctx->iv, iv, actual_iv_size ); + ctx->iv_size = actual_iv_size; + } + + return( 0 ); +} + +int mbedtls_cipher_reset( mbedtls_cipher_context_t *ctx ) +{ + CIPHER_VALIDATE_RET( ctx != NULL ); + if( ctx->cipher_info == NULL ) + return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + + + ctx->unprocessed_len = 0; + + return( 0 ); +} + +#if defined(MBEDTLS_GCM_C) || defined(MBEDTLS_CHACHAPOLY_C) +int mbedtls_cipher_update_ad( mbedtls_cipher_context_t *ctx, + const unsigned char *ad, size_t ad_len ) +{ + CIPHER_VALIDATE_RET( ctx != NULL ); + CIPHER_VALIDATE_RET( ad_len == 0 || ad != NULL ); + if( ctx->cipher_info == NULL ) + return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + + +#if defined(MBEDTLS_GCM_C) + if( MBEDTLS_MODE_GCM == ctx->cipher_info->mode ) + { + return( mbedtls_gcm_update_ad( (mbedtls_gcm_context *) ctx->cipher_ctx, + ad, ad_len ) ); + } +#endif + + + return( 0 ); +} +#endif /* MBEDTLS_GCM_C || MBEDTLS_CHACHAPOLY_C */ + +int mbedtls_cipher_update( mbedtls_cipher_context_t *ctx, const unsigned char *input, + size_t ilen, unsigned char *output, size_t *olen ) +{ + int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; + size_t block_size; + + CIPHER_VALIDATE_RET( ctx != NULL ); + CIPHER_VALIDATE_RET( ilen == 0 || input != NULL ); + CIPHER_VALIDATE_RET( output != NULL ); + CIPHER_VALIDATE_RET( olen != NULL ); + if( ctx->cipher_info == NULL ) + return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + + + *olen = 0; + block_size = mbedtls_cipher_get_block_size( ctx ); + if ( 0 == block_size ) + { + return( MBEDTLS_ERR_CIPHER_INVALID_CONTEXT ); + } + + if( ctx->cipher_info->mode == MBEDTLS_MODE_ECB ) + { + if( ilen != block_size ) + return( MBEDTLS_ERR_CIPHER_FULL_BLOCK_EXPECTED ); + + *olen = ilen; + + if( 0 != ( ret = ctx->cipher_info->base->ecb_func( ctx->cipher_ctx, + ctx->operation, input, output ) ) ) + { + return( ret ); + } + + return( 0 ); + } + +#if defined(MBEDTLS_GCM_C) + if( ctx->cipher_info->mode == MBEDTLS_MODE_GCM ) + { + return( mbedtls_gcm_update( (mbedtls_gcm_context *) ctx->cipher_ctx, + input, ilen, + output, ilen, olen ) ); + } +#endif + + + + if( input == output && + ( ctx->unprocessed_len != 0 || ilen % block_size ) ) + { + return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + } + +#if defined(MBEDTLS_CIPHER_MODE_CBC) + if( ctx->cipher_info->mode == MBEDTLS_MODE_CBC ) + { + size_t copy_len = 0; + + /* + * If there is not enough data for a full block, cache it. + */ + if( ( ctx->operation == MBEDTLS_DECRYPT && NULL != ctx->add_padding && + ilen <= block_size - ctx->unprocessed_len ) || + ( ctx->operation == MBEDTLS_DECRYPT && NULL == ctx->add_padding && + ilen < block_size - ctx->unprocessed_len ) || + ( ctx->operation == MBEDTLS_ENCRYPT && + ilen < block_size - ctx->unprocessed_len ) ) + { + memcpy( &( ctx->unprocessed_data[ctx->unprocessed_len] ), input, + ilen ); + + ctx->unprocessed_len += ilen; + return( 0 ); + } + + /* + * Process cached data first + */ + if( 0 != ctx->unprocessed_len ) + { + copy_len = block_size - ctx->unprocessed_len; + + memcpy( &( ctx->unprocessed_data[ctx->unprocessed_len] ), input, + copy_len ); + + if( 0 != ( ret = ctx->cipher_info->base->cbc_func( ctx->cipher_ctx, + ctx->operation, block_size, ctx->iv, + ctx->unprocessed_data, output ) ) ) + { + return( ret ); + } + + *olen += block_size; + output += block_size; + ctx->unprocessed_len = 0; + + input += copy_len; + ilen -= copy_len; + } + + /* + * Cache final, incomplete block + */ + if( 0 != ilen ) + { + /* Encryption: only cache partial blocks + * Decryption w/ padding: always keep at least one whole block + * Decryption w/o padding: only cache partial blocks + */ + copy_len = ilen % block_size; + if( copy_len == 0 && + ctx->operation == MBEDTLS_DECRYPT && + NULL != ctx->add_padding) + { + copy_len = block_size; + } + + memcpy( ctx->unprocessed_data, &( input[ilen - copy_len] ), + copy_len ); + + ctx->unprocessed_len += copy_len; + ilen -= copy_len; + } + + /* + * Process remaining full blocks + */ + if( ilen ) + { + if( 0 != ( ret = ctx->cipher_info->base->cbc_func( ctx->cipher_ctx, + ctx->operation, ilen, ctx->iv, input, output ) ) ) + { + return( ret ); + } + + *olen += ilen; + } + + return( 0 ); + } +#endif /* MBEDTLS_CIPHER_MODE_CBC */ + + + + + + + return( MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE ); +} + + +int mbedtls_cipher_finish( mbedtls_cipher_context_t *ctx, + unsigned char *output, size_t *olen ) +{ + CIPHER_VALIDATE_RET( ctx != NULL ); + CIPHER_VALIDATE_RET( output != NULL ); + CIPHER_VALIDATE_RET( olen != NULL ); + if( ctx->cipher_info == NULL ) + return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + + + *olen = 0; + + if( MBEDTLS_MODE_CFB == ctx->cipher_info->mode || + MBEDTLS_MODE_OFB == ctx->cipher_info->mode || + MBEDTLS_MODE_CTR == ctx->cipher_info->mode || + MBEDTLS_MODE_GCM == ctx->cipher_info->mode || + MBEDTLS_MODE_CCM_STAR_NO_TAG == ctx->cipher_info->mode || + MBEDTLS_MODE_XTS == ctx->cipher_info->mode || + MBEDTLS_MODE_STREAM == ctx->cipher_info->mode ) + { + return( 0 ); + } + + if ( ( MBEDTLS_CIPHER_CHACHA20 == ctx->cipher_info->type ) || + ( MBEDTLS_CIPHER_CHACHA20_POLY1305 == ctx->cipher_info->type ) ) + { + return( 0 ); + } + + if( MBEDTLS_MODE_ECB == ctx->cipher_info->mode ) + { + if( ctx->unprocessed_len != 0 ) + return( MBEDTLS_ERR_CIPHER_FULL_BLOCK_EXPECTED ); + + return( 0 ); + } + +#if defined(MBEDTLS_CIPHER_MODE_CBC) + if( MBEDTLS_MODE_CBC == ctx->cipher_info->mode ) + { + int ret = 0; + + if( MBEDTLS_ENCRYPT == ctx->operation ) + { + /* check for 'no padding' mode */ + if( NULL == ctx->add_padding ) + { + if( 0 != ctx->unprocessed_len ) + return( MBEDTLS_ERR_CIPHER_FULL_BLOCK_EXPECTED ); + + return( 0 ); + } + + ctx->add_padding( ctx->unprocessed_data, mbedtls_cipher_get_iv_size( ctx ), + ctx->unprocessed_len ); + } + else if( mbedtls_cipher_get_block_size( ctx ) != ctx->unprocessed_len ) + { + /* + * For decrypt operations, expect a full block, + * or an empty block if no padding + */ + if( NULL == ctx->add_padding && 0 == ctx->unprocessed_len ) + return( 0 ); + + return( MBEDTLS_ERR_CIPHER_FULL_BLOCK_EXPECTED ); + } + + /* cipher block */ + if( 0 != ( ret = ctx->cipher_info->base->cbc_func( ctx->cipher_ctx, + ctx->operation, mbedtls_cipher_get_block_size( ctx ), ctx->iv, + ctx->unprocessed_data, output ) ) ) + { + return( ret ); + } + + /* Set output size for decryption */ + if( MBEDTLS_DECRYPT == ctx->operation ) + return( ctx->get_padding( output, mbedtls_cipher_get_block_size( ctx ), + olen ) ); + + /* Set output size for encryption */ + *olen = mbedtls_cipher_get_block_size( ctx ); + return( 0 ); + } +#else + ((void) output); +#endif /* MBEDTLS_CIPHER_MODE_CBC */ + + return( MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE ); +} + + +#if defined(MBEDTLS_GCM_C) || defined(MBEDTLS_CHACHAPOLY_C) +int mbedtls_cipher_write_tag( mbedtls_cipher_context_t *ctx, + unsigned char *tag, size_t tag_len ) +{ + CIPHER_VALIDATE_RET( ctx != NULL ); + CIPHER_VALIDATE_RET( tag_len == 0 || tag != NULL ); + if( ctx->cipher_info == NULL ) + return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + + if( MBEDTLS_ENCRYPT != ctx->operation ) + return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + + +#if defined(MBEDTLS_GCM_C) + if( MBEDTLS_MODE_GCM == ctx->cipher_info->mode ) + { + size_t output_length; + /* The code here doesn't yet support alternative implementations + * that can delay up to a block of output. */ + return( mbedtls_gcm_finish( (mbedtls_gcm_context *) ctx->cipher_ctx, + NULL, 0, &output_length, + tag, tag_len ) ); + } +#endif + + + return( 0 ); +} + +int mbedtls_cipher_check_tag( mbedtls_cipher_context_t *ctx, + const unsigned char *tag, size_t tag_len ) +{ + unsigned char check_tag[16]; + int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; + + CIPHER_VALIDATE_RET( ctx != NULL ); + CIPHER_VALIDATE_RET( tag_len == 0 || tag != NULL ); + if( ctx->cipher_info == NULL ) + return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + + if( MBEDTLS_DECRYPT != ctx->operation ) + { + return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + } + + + /* Status to return on a non-authenticated algorithm. It would make sense + * to return MBEDTLS_ERR_CIPHER_INVALID_CONTEXT or perhaps + * MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA, but at the time I write this our + * unit tests assume 0. */ + ret = 0; + +#if defined(MBEDTLS_GCM_C) + if( MBEDTLS_MODE_GCM == ctx->cipher_info->mode ) + { + size_t output_length; + /* The code here doesn't yet support alternative implementations + * that can delay up to a block of output. */ + + if( tag_len > sizeof( check_tag ) ) + return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + + if( 0 != ( ret = mbedtls_gcm_finish( + (mbedtls_gcm_context *) ctx->cipher_ctx, + NULL, 0, &output_length, + check_tag, tag_len ) ) ) + { + return( ret ); + } + + /* Check the tag in "constant-time" */ + if( mbedtls_ct_memcmp( tag, check_tag, tag_len ) != 0 ) + { + ret = MBEDTLS_ERR_CIPHER_AUTH_FAILED; + goto exit; + } + } +#endif /* MBEDTLS_GCM_C */ + + +exit: + mbedtls_platform_zeroize( check_tag, tag_len ); + return( ret ); +} +#endif /* MBEDTLS_GCM_C || MBEDTLS_CHACHAPOLY_C */ + +/* + * Packet-oriented wrapper for non-AEAD modes + */ +int mbedtls_cipher_crypt( mbedtls_cipher_context_t *ctx, + const unsigned char *iv, size_t iv_len, + const unsigned char *input, size_t ilen, + unsigned char *output, size_t *olen ) +{ + int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; + size_t finish_olen; + + CIPHER_VALIDATE_RET( ctx != NULL ); + CIPHER_VALIDATE_RET( iv_len == 0 || iv != NULL ); + CIPHER_VALIDATE_RET( ilen == 0 || input != NULL ); + CIPHER_VALIDATE_RET( output != NULL ); + CIPHER_VALIDATE_RET( olen != NULL ); + + + if( ( ret = mbedtls_cipher_set_iv( ctx, iv, iv_len ) ) != 0 ) + return( ret ); + + if( ( ret = mbedtls_cipher_reset( ctx ) ) != 0 ) + return( ret ); + + if( ( ret = mbedtls_cipher_update( ctx, input, ilen, + output, olen ) ) != 0 ) + return( ret ); + + if( ( ret = mbedtls_cipher_finish( ctx, output + *olen, + &finish_olen ) ) != 0 ) + return( ret ); + + *olen += finish_olen; + + return( 0 ); +} + diff --git a/src/components/implementation/simple_nf/ndpi/gcrypt/cipher.h b/src/components/implementation/simple_nf/ndpi/gcrypt/cipher.h new file mode 100644 index 0000000000..3d67e5f599 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/gcrypt/cipher.h @@ -0,0 +1,934 @@ +/** + * \file cipher.h + * + * \brief This file contains an abstraction interface for use with the cipher + * primitives provided by the library. It provides a common interface to all of + * the available cipher operations. + * + * \author Adriaan de Jong + */ +/* + * Copyright The Mbed TLS Contributors + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef MBEDTLS_CIPHER_H +#define MBEDTLS_CIPHER_H + + + +#if defined(MBEDTLS_GCM_C) || defined(MBEDTLS_CCM_C) || defined(MBEDTLS_CHACHAPOLY_C) +#define MBEDTLS_CIPHER_MODE_AEAD +#endif + +#if defined(MBEDTLS_CIPHER_MODE_CBC) +#define MBEDTLS_CIPHER_MODE_WITH_PADDING +#endif + +#if defined(MBEDTLS_CIPHER_NULL_CIPHER) || \ + defined(MBEDTLS_CHACHA20_C) +#define MBEDTLS_CIPHER_MODE_STREAM +#endif + +#if ( defined(__ARMCC_VERSION) || defined(_MSC_VER) ) && \ + !defined(inline) && !defined(__cplusplus) +#define inline __inline +#endif + +/** The selected feature is not available. */ +#define MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE -0x6080 +/** Bad input parameters. */ +#define MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA -0x6100 +/** Failed to allocate memory. */ +#define MBEDTLS_ERR_CIPHER_ALLOC_FAILED -0x6180 +/** Input data contains invalid padding and is rejected. */ +#define MBEDTLS_ERR_CIPHER_INVALID_PADDING -0x6200 +/** Decryption of block requires a full block. */ +#define MBEDTLS_ERR_CIPHER_FULL_BLOCK_EXPECTED -0x6280 +/** Authentication failed (for AEAD modes). */ +#define MBEDTLS_ERR_CIPHER_AUTH_FAILED -0x6300 +/** The context is invalid. For example, because it was freed. */ +#define MBEDTLS_ERR_CIPHER_INVALID_CONTEXT -0x6380 + +#define MBEDTLS_CIPHER_VARIABLE_IV_LEN 0x01 /**< Cipher accepts IVs of variable length. */ +#define MBEDTLS_CIPHER_VARIABLE_KEY_LEN 0x02 /**< Cipher accepts keys of variable length. */ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief Supported cipher types. + * + * \warning DES is considered weak cipher and its use + * constitutes a security risk. Arm recommends considering stronger + * ciphers instead. + */ +typedef enum { + MBEDTLS_CIPHER_ID_NONE = 0, /**< Placeholder to mark the end of cipher ID lists. */ + MBEDTLS_CIPHER_ID_NULL, /**< The identity cipher, treated as a stream cipher. */ + MBEDTLS_CIPHER_ID_AES, /**< The AES cipher. */ + MBEDTLS_CIPHER_ID_DES, /**< The DES cipher. */ + MBEDTLS_CIPHER_ID_3DES, /**< The Triple DES cipher. */ + MBEDTLS_CIPHER_ID_CAMELLIA, /**< The Camellia cipher. */ + MBEDTLS_CIPHER_ID_ARIA, /**< The Aria cipher. */ + MBEDTLS_CIPHER_ID_CHACHA20, /**< The ChaCha20 cipher. */ +} mbedtls_cipher_id_t; + +/** + * \brief Supported {cipher type, cipher mode} pairs. + * + * \warning DES is considered weak cipher and its use + * constitutes a security risk. Arm recommends considering stronger + * ciphers instead. + */ +typedef enum { + MBEDTLS_CIPHER_NONE = 0, /**< Placeholder to mark the end of cipher-pair lists. */ + MBEDTLS_CIPHER_NULL, /**< The identity stream cipher. */ + MBEDTLS_CIPHER_AES_128_ECB, /**< AES cipher with 128-bit ECB mode. */ + MBEDTLS_CIPHER_AES_192_ECB, /**< AES cipher with 192-bit ECB mode. */ + MBEDTLS_CIPHER_AES_256_ECB, /**< AES cipher with 256-bit ECB mode. */ + MBEDTLS_CIPHER_AES_128_CBC, /**< AES cipher with 128-bit CBC mode. */ + MBEDTLS_CIPHER_AES_192_CBC, /**< AES cipher with 192-bit CBC mode. */ + MBEDTLS_CIPHER_AES_256_CBC, /**< AES cipher with 256-bit CBC mode. */ + MBEDTLS_CIPHER_AES_128_CFB128, /**< AES cipher with 128-bit CFB128 mode. */ + MBEDTLS_CIPHER_AES_192_CFB128, /**< AES cipher with 192-bit CFB128 mode. */ + MBEDTLS_CIPHER_AES_256_CFB128, /**< AES cipher with 256-bit CFB128 mode. */ + MBEDTLS_CIPHER_AES_128_CTR, /**< AES cipher with 128-bit CTR mode. */ + MBEDTLS_CIPHER_AES_192_CTR, /**< AES cipher with 192-bit CTR mode. */ + MBEDTLS_CIPHER_AES_256_CTR, /**< AES cipher with 256-bit CTR mode. */ + MBEDTLS_CIPHER_AES_128_GCM, /**< AES cipher with 128-bit GCM mode. */ + MBEDTLS_CIPHER_AES_192_GCM, /**< AES cipher with 192-bit GCM mode. */ + MBEDTLS_CIPHER_AES_256_GCM, /**< AES cipher with 256-bit GCM mode. */ + MBEDTLS_CIPHER_CAMELLIA_128_ECB, /**< Camellia cipher with 128-bit ECB mode. */ + MBEDTLS_CIPHER_CAMELLIA_192_ECB, /**< Camellia cipher with 192-bit ECB mode. */ + MBEDTLS_CIPHER_CAMELLIA_256_ECB, /**< Camellia cipher with 256-bit ECB mode. */ + MBEDTLS_CIPHER_CAMELLIA_128_CBC, /**< Camellia cipher with 128-bit CBC mode. */ + MBEDTLS_CIPHER_CAMELLIA_192_CBC, /**< Camellia cipher with 192-bit CBC mode. */ + MBEDTLS_CIPHER_CAMELLIA_256_CBC, /**< Camellia cipher with 256-bit CBC mode. */ + MBEDTLS_CIPHER_CAMELLIA_128_CFB128, /**< Camellia cipher with 128-bit CFB128 mode. */ + MBEDTLS_CIPHER_CAMELLIA_192_CFB128, /**< Camellia cipher with 192-bit CFB128 mode. */ + MBEDTLS_CIPHER_CAMELLIA_256_CFB128, /**< Camellia cipher with 256-bit CFB128 mode. */ + MBEDTLS_CIPHER_CAMELLIA_128_CTR, /**< Camellia cipher with 128-bit CTR mode. */ + MBEDTLS_CIPHER_CAMELLIA_192_CTR, /**< Camellia cipher with 192-bit CTR mode. */ + MBEDTLS_CIPHER_CAMELLIA_256_CTR, /**< Camellia cipher with 256-bit CTR mode. */ + MBEDTLS_CIPHER_CAMELLIA_128_GCM, /**< Camellia cipher with 128-bit GCM mode. */ + MBEDTLS_CIPHER_CAMELLIA_192_GCM, /**< Camellia cipher with 192-bit GCM mode. */ + MBEDTLS_CIPHER_CAMELLIA_256_GCM, /**< Camellia cipher with 256-bit GCM mode. */ + MBEDTLS_CIPHER_DES_ECB, /**< DES cipher with ECB mode. */ + MBEDTLS_CIPHER_DES_CBC, /**< DES cipher with CBC mode. */ + MBEDTLS_CIPHER_DES_EDE_ECB, /**< DES cipher with EDE ECB mode. */ + MBEDTLS_CIPHER_DES_EDE_CBC, /**< DES cipher with EDE CBC mode. */ + MBEDTLS_CIPHER_DES_EDE3_ECB, /**< DES cipher with EDE3 ECB mode. */ + MBEDTLS_CIPHER_DES_EDE3_CBC, /**< DES cipher with EDE3 CBC mode. */ + MBEDTLS_CIPHER_AES_128_CCM, /**< AES cipher with 128-bit CCM mode. */ + MBEDTLS_CIPHER_AES_192_CCM, /**< AES cipher with 192-bit CCM mode. */ + MBEDTLS_CIPHER_AES_256_CCM, /**< AES cipher with 256-bit CCM mode. */ + MBEDTLS_CIPHER_AES_128_CCM_STAR_NO_TAG, /**< AES cipher with 128-bit CCM_STAR_NO_TAG mode. */ + MBEDTLS_CIPHER_AES_192_CCM_STAR_NO_TAG, /**< AES cipher with 192-bit CCM_STAR_NO_TAG mode. */ + MBEDTLS_CIPHER_AES_256_CCM_STAR_NO_TAG, /**< AES cipher with 256-bit CCM_STAR_NO_TAG mode. */ + MBEDTLS_CIPHER_CAMELLIA_128_CCM, /**< Camellia cipher with 128-bit CCM mode. */ + MBEDTLS_CIPHER_CAMELLIA_192_CCM, /**< Camellia cipher with 192-bit CCM mode. */ + MBEDTLS_CIPHER_CAMELLIA_256_CCM, /**< Camellia cipher with 256-bit CCM mode. */ + MBEDTLS_CIPHER_CAMELLIA_128_CCM_STAR_NO_TAG, /**< Camellia cipher with 128-bit CCM_STAR_NO_TAG mode. */ + MBEDTLS_CIPHER_CAMELLIA_192_CCM_STAR_NO_TAG, /**< Camellia cipher with 192-bit CCM_STAR_NO_TAG mode. */ + MBEDTLS_CIPHER_CAMELLIA_256_CCM_STAR_NO_TAG, /**< Camellia cipher with 256-bit CCM_STAR_NO_TAG mode. */ + MBEDTLS_CIPHER_ARIA_128_ECB, /**< Aria cipher with 128-bit key and ECB mode. */ + MBEDTLS_CIPHER_ARIA_192_ECB, /**< Aria cipher with 192-bit key and ECB mode. */ + MBEDTLS_CIPHER_ARIA_256_ECB, /**< Aria cipher with 256-bit key and ECB mode. */ + MBEDTLS_CIPHER_ARIA_128_CBC, /**< Aria cipher with 128-bit key and CBC mode. */ + MBEDTLS_CIPHER_ARIA_192_CBC, /**< Aria cipher with 192-bit key and CBC mode. */ + MBEDTLS_CIPHER_ARIA_256_CBC, /**< Aria cipher with 256-bit key and CBC mode. */ + MBEDTLS_CIPHER_ARIA_128_CFB128, /**< Aria cipher with 128-bit key and CFB-128 mode. */ + MBEDTLS_CIPHER_ARIA_192_CFB128, /**< Aria cipher with 192-bit key and CFB-128 mode. */ + MBEDTLS_CIPHER_ARIA_256_CFB128, /**< Aria cipher with 256-bit key and CFB-128 mode. */ + MBEDTLS_CIPHER_ARIA_128_CTR, /**< Aria cipher with 128-bit key and CTR mode. */ + MBEDTLS_CIPHER_ARIA_192_CTR, /**< Aria cipher with 192-bit key and CTR mode. */ + MBEDTLS_CIPHER_ARIA_256_CTR, /**< Aria cipher with 256-bit key and CTR mode. */ + MBEDTLS_CIPHER_ARIA_128_GCM, /**< Aria cipher with 128-bit key and GCM mode. */ + MBEDTLS_CIPHER_ARIA_192_GCM, /**< Aria cipher with 192-bit key and GCM mode. */ + MBEDTLS_CIPHER_ARIA_256_GCM, /**< Aria cipher with 256-bit key and GCM mode. */ + MBEDTLS_CIPHER_ARIA_128_CCM, /**< Aria cipher with 128-bit key and CCM mode. */ + MBEDTLS_CIPHER_ARIA_192_CCM, /**< Aria cipher with 192-bit key and CCM mode. */ + MBEDTLS_CIPHER_ARIA_256_CCM, /**< Aria cipher with 256-bit key and CCM mode. */ + MBEDTLS_CIPHER_ARIA_128_CCM_STAR_NO_TAG, /**< Aria cipher with 128-bit key and CCM_STAR_NO_TAG mode. */ + MBEDTLS_CIPHER_ARIA_192_CCM_STAR_NO_TAG, /**< Aria cipher with 192-bit key and CCM_STAR_NO_TAG mode. */ + MBEDTLS_CIPHER_ARIA_256_CCM_STAR_NO_TAG, /**< Aria cipher with 256-bit key and CCM_STAR_NO_TAG mode. */ + MBEDTLS_CIPHER_AES_128_OFB, /**< AES 128-bit cipher in OFB mode. */ + MBEDTLS_CIPHER_AES_192_OFB, /**< AES 192-bit cipher in OFB mode. */ + MBEDTLS_CIPHER_AES_256_OFB, /**< AES 256-bit cipher in OFB mode. */ + MBEDTLS_CIPHER_AES_128_XTS, /**< AES 128-bit cipher in XTS block mode. */ + MBEDTLS_CIPHER_AES_256_XTS, /**< AES 256-bit cipher in XTS block mode. */ + MBEDTLS_CIPHER_CHACHA20, /**< ChaCha20 stream cipher. */ + MBEDTLS_CIPHER_CHACHA20_POLY1305, /**< ChaCha20-Poly1305 AEAD cipher. */ + MBEDTLS_CIPHER_AES_128_KW, /**< AES cipher with 128-bit NIST KW mode. */ + MBEDTLS_CIPHER_AES_192_KW, /**< AES cipher with 192-bit NIST KW mode. */ + MBEDTLS_CIPHER_AES_256_KW, /**< AES cipher with 256-bit NIST KW mode. */ + MBEDTLS_CIPHER_AES_128_KWP, /**< AES cipher with 128-bit NIST KWP mode. */ + MBEDTLS_CIPHER_AES_192_KWP, /**< AES cipher with 192-bit NIST KWP mode. */ + MBEDTLS_CIPHER_AES_256_KWP, /**< AES cipher with 256-bit NIST KWP mode. */ +} mbedtls_cipher_type_t; + +/** Supported cipher modes. */ +typedef enum { + MBEDTLS_MODE_NONE = 0, /**< None. */ + MBEDTLS_MODE_ECB, /**< The ECB cipher mode. */ + MBEDTLS_MODE_CBC, /**< The CBC cipher mode. */ + MBEDTLS_MODE_CFB, /**< The CFB cipher mode. */ + MBEDTLS_MODE_OFB, /**< The OFB cipher mode. */ + MBEDTLS_MODE_CTR, /**< The CTR cipher mode. */ + MBEDTLS_MODE_GCM, /**< The GCM cipher mode. */ + MBEDTLS_MODE_STREAM, /**< The stream cipher mode. */ + MBEDTLS_MODE_CCM, /**< The CCM cipher mode. */ + MBEDTLS_MODE_CCM_STAR_NO_TAG, /**< The CCM*-no-tag cipher mode. */ + MBEDTLS_MODE_XTS, /**< The XTS cipher mode. */ + MBEDTLS_MODE_CHACHAPOLY, /**< The ChaCha-Poly cipher mode. */ + MBEDTLS_MODE_KW, /**< The SP800-38F KW mode */ + MBEDTLS_MODE_KWP, /**< The SP800-38F KWP mode */ +} mbedtls_cipher_mode_t; + +/** Supported cipher padding types. */ +typedef enum { + MBEDTLS_PADDING_PKCS7 = 0, /**< PKCS7 padding (default). */ + MBEDTLS_PADDING_ONE_AND_ZEROS, /**< ISO/IEC 7816-4 padding. */ + MBEDTLS_PADDING_ZEROS_AND_LEN, /**< ANSI X.923 padding. */ + MBEDTLS_PADDING_ZEROS, /**< Zero padding (not reversible). */ + MBEDTLS_PADDING_NONE, /**< Never pad (full blocks only). */ +} mbedtls_cipher_padding_t; + +/** Type of operation. */ +typedef enum { + MBEDTLS_OPERATION_NONE = -1, + MBEDTLS_DECRYPT = 0, + MBEDTLS_ENCRYPT, +} mbedtls_operation_t; + +enum { + /** Undefined key length. */ + MBEDTLS_KEY_LENGTH_NONE = 0, + /** Key length, in bits (including parity), for DES keys. */ + MBEDTLS_KEY_LENGTH_DES = 64, + /** Key length in bits, including parity, for DES in two-key EDE. */ + MBEDTLS_KEY_LENGTH_DES_EDE = 128, + /** Key length in bits, including parity, for DES in three-key EDE. */ + MBEDTLS_KEY_LENGTH_DES_EDE3 = 192, +}; + +/** Maximum length of any IV, in Bytes. */ +/* This should ideally be derived automatically from list of ciphers. + * This should be kept in sync with MBEDTLS_SSL_MAX_IV_LENGTH defined + * in library/ssl_misc.h. */ +#define MBEDTLS_MAX_IV_LENGTH 16 + +/** Maximum block size of any cipher, in Bytes. */ +/* This should ideally be derived automatically from list of ciphers. + * This should be kept in sync with MBEDTLS_SSL_MAX_BLOCK_LENGTH defined + * in library/ssl_misc.h. */ +#define MBEDTLS_MAX_BLOCK_LENGTH 16 + +/** Maximum key length, in Bytes. */ +/* This should ideally be derived automatically from list of ciphers. + * For now, only check whether XTS is enabled which uses 64 Byte keys, + * and use 32 Bytes as an upper bound for the maximum key length otherwise. + * This should be kept in sync with MBEDTLS_SSL_MAX_BLOCK_LENGTH defined + * in library/ssl_misc.h, which however deliberately ignores the case of XTS + * since the latter isn't used in SSL/TLS. */ +#define MBEDTLS_MAX_KEY_LENGTH 32 + +/** + * Base cipher information (opaque struct). + */ +typedef struct mbedtls_cipher_base_t mbedtls_cipher_base_t; + +/** + * CMAC context (opaque struct). + */ +typedef struct mbedtls_cmac_context_t mbedtls_cmac_context_t; + +/** + * Cipher information. Allows calling cipher functions + * in a generic way. + * + * \note The library does not support custom cipher info structures, + * only built-in structures returned by the functions + * mbedtls_cipher_info_from_string(), + * mbedtls_cipher_info_from_type(), + * mbedtls_cipher_info_from_values(), + * mbedtls_cipher_info_from_psa(). + */ +typedef struct mbedtls_cipher_info_t +{ + /** Full cipher identifier. For example, + * MBEDTLS_CIPHER_AES_256_CBC. + */ + mbedtls_cipher_type_t type; + + /** The cipher mode. For example, MBEDTLS_MODE_CBC. */ + mbedtls_cipher_mode_t mode; + + /** The cipher key length, in bits. This is the + * default length for variable sized ciphers. + * Includes parity bits for ciphers like DES. + */ + unsigned int key_bitlen; + + /** Name of the cipher. */ + const char * name; + + /** IV or nonce size, in Bytes. + * For ciphers that accept variable IV sizes, + * this is the recommended size. + */ + unsigned int iv_size; + + /** Bitflag comprised of MBEDTLS_CIPHER_VARIABLE_IV_LEN and + * MBEDTLS_CIPHER_VARIABLE_KEY_LEN indicating whether the + * cipher supports variable IV or variable key sizes, respectively. + */ + int flags; + + /** The block size, in Bytes. */ + unsigned int block_size; + + /** Struct for base cipher information and functions. */ + const mbedtls_cipher_base_t *base; + +} mbedtls_cipher_info_t; + +/** + * Generic cipher context. + */ +typedef struct mbedtls_cipher_context_t +{ + /** Information about the associated cipher. */ + const mbedtls_cipher_info_t *cipher_info; + + /** Key length to use. */ + int key_bitlen; + + /** Operation that the key of the context has been + * initialized for. + */ + mbedtls_operation_t operation; + + + /** Buffer for input that has not been processed yet. */ + unsigned char unprocessed_data[MBEDTLS_MAX_BLOCK_LENGTH]; + + /** Number of Bytes that have not been processed yet. */ + size_t unprocessed_len; + + /** Current IV or NONCE_COUNTER for CTR-mode, data unit (or sector) number + * for XTS-mode. */ + unsigned char iv[MBEDTLS_MAX_IV_LENGTH]; + + /** IV size in Bytes, for ciphers with variable-length IVs. */ + size_t iv_size; + + /** The cipher-specific context. */ + void *cipher_ctx; + + + +} mbedtls_cipher_context_t; + +/** + * \brief This function retrieves the list of ciphers supported + * by the generic cipher module. + * + * For any cipher identifier in the returned list, you can + * obtain the corresponding generic cipher information structure + * via mbedtls_cipher_info_from_type(), which can then be used + * to prepare a cipher context via mbedtls_cipher_setup(). + * + * + * \return A statically-allocated array of cipher identifiers + * of type cipher_type_t. The last entry is zero. + */ +const int *mbedtls_cipher_list( void ); + +/** + * \brief This function retrieves the cipher-information + * structure associated with the given cipher name. + * + * \param cipher_name Name of the cipher to search for. This must not be + * \c NULL. + * + * \return The cipher information structure associated with the + * given \p cipher_name. + * \return \c NULL if the associated cipher information is not found. + */ +const mbedtls_cipher_info_t *mbedtls_cipher_info_from_string( const char *cipher_name ); + +/** + * \brief This function retrieves the cipher-information + * structure associated with the given cipher type. + * + * \param cipher_type Type of the cipher to search for. + * + * \return The cipher information structure associated with the + * given \p cipher_type. + * \return \c NULL if the associated cipher information is not found. + */ +const mbedtls_cipher_info_t *mbedtls_cipher_info_from_type( const mbedtls_cipher_type_t cipher_type ); + +/** + * \brief This function retrieves the cipher-information + * structure associated with the given cipher ID, + * key size and mode. + * + * \param cipher_id The ID of the cipher to search for. For example, + * #MBEDTLS_CIPHER_ID_AES. + * \param key_bitlen The length of the key in bits. + * \param mode The cipher mode. For example, #MBEDTLS_MODE_CBC. + * + * \return The cipher information structure associated with the + * given \p cipher_id. + * \return \c NULL if the associated cipher information is not found. + */ +const mbedtls_cipher_info_t *mbedtls_cipher_info_from_values( const mbedtls_cipher_id_t cipher_id, + int key_bitlen, + const mbedtls_cipher_mode_t mode ); + +/** + * \brief Retrieve the identifier for a cipher info structure. + * + * \param[in] info The cipher info structure to query. + * This may be \c NULL. + * + * \return The full cipher identifier (\c MBEDTLS_CIPHER_xxx). + * \return #MBEDTLS_CIPHER_NONE if \p info is \c NULL. + */ +static inline mbedtls_cipher_type_t mbedtls_cipher_info_get_type( + const mbedtls_cipher_info_t *info ) +{ + if( info == NULL ) + return( MBEDTLS_CIPHER_NONE ); + else + return( info->type ); +} + +/** + * \brief Retrieve the operation mode for a cipher info structure. + * + * \param[in] info The cipher info structure to query. + * This may be \c NULL. + * + * \return The cipher mode (\c MBEDTLS_MODE_xxx). + * \return #MBEDTLS_MODE_NONE if \p info is \c NULL. + */ +static inline mbedtls_cipher_mode_t mbedtls_cipher_info_get_mode( + const mbedtls_cipher_info_t *info ) +{ + if( info == NULL ) + return( MBEDTLS_MODE_NONE ); + else + return( info->mode ); +} + +/** + * \brief Retrieve the key size for a cipher info structure. + * + * \param[in] info The cipher info structure to query. + * This may be \c NULL. + * + * \return The key length in bits. + * For variable-sized ciphers, this is the default length. + * For DES, this includes the parity bits. + * \return \c 0 if \p info is \c NULL. + */ +static inline size_t mbedtls_cipher_info_get_key_bitlen( + const mbedtls_cipher_info_t *info ) +{ + if( info == NULL ) + return( 0 ); + else + return( info->key_bitlen ); +} + +/** + * \brief Retrieve the human-readable name for a + * cipher info structure. + * + * \param[in] info The cipher info structure to query. + * This may be \c NULL. + * + * \return The cipher name, which is a human readable string, + * with static storage duration. + * \return \c NULL if \c info is \p NULL. + */ +static inline const char *mbedtls_cipher_info_get_name( + const mbedtls_cipher_info_t *info ) +{ + if( info == NULL ) + return( NULL ); + else + return( info->name ); +} + +/** + * \brief This function returns the size of the IV or nonce + * for the cipher info structure, in bytes. + * + * \param info The cipher info structure. This may be \c NULL. + * + * \return The recommended IV size. + * \return \c 0 for ciphers not using an IV or a nonce. + * \return \c 0 if \p info is \c NULL. + */ +static inline size_t mbedtls_cipher_info_get_iv_size( + const mbedtls_cipher_info_t *info ) +{ + if( info == NULL ) + return( 0 ); + + return( (size_t) info->iv_size ); +} + +/** + * \brief This function returns the block size of the given + * cipher info structure in bytes. + * + * \param info The cipher info structure. This may be \c NULL. + * + * \return The block size of the cipher. + * \return \c 1 if the cipher is a stream cipher. + * \return \c 0 if \p info is \c NULL. + */ +static inline size_t mbedtls_cipher_info_get_block_size( + const mbedtls_cipher_info_t *info ) +{ + if( info == NULL ) + return( 0 ); + + return( (size_t) info->block_size ); +} + +/** + * \brief This function returns a non-zero value if the key length for + * the given cipher is variable. + * + * \param info The cipher info structure. This may be \c NULL. + * + * \return Non-zero if the key length is variable, \c 0 otherwise. + * \return \c 0 if the given pointer is \c NULL. + */ +static inline int mbedtls_cipher_info_has_variable_key_bitlen( + const mbedtls_cipher_info_t *info ) +{ + if( info == NULL ) + return( 0 ); + + return( info->flags & MBEDTLS_CIPHER_VARIABLE_KEY_LEN ); +} + +/** + * \brief This function returns a non-zero value if the IV size for + * the given cipher is variable. + * + * \param info The cipher info structure. This may be \c NULL. + * + * \return Non-zero if the IV size is variable, \c 0 otherwise. + * \return \c 0 if the given pointer is \c NULL. + */ +static inline int mbedtls_cipher_info_has_variable_iv_size( + const mbedtls_cipher_info_t *info ) +{ + if( info == NULL ) + return( 0 ); + + return( info->flags & MBEDTLS_CIPHER_VARIABLE_IV_LEN ); +} + +/** + * \brief This function initializes a \p cipher_context as NONE. + * + * \param ctx The context to be initialized. This must not be \c NULL. + */ +void mbedtls_cipher_init( mbedtls_cipher_context_t *ctx ); + +/** + * \brief This function returns the block size of the given cipher + * in bytes. + * + * \param ctx The context of the cipher. + * + * \return The block size of the underlying cipher. + * \return \c 1 if the cipher is a stream cipher. + * \return \c 0 if \p ctx has not been initialized. + */ +static inline unsigned int mbedtls_cipher_get_block_size( + const mbedtls_cipher_context_t *ctx ) +{ + MBEDTLS_INTERNAL_VALIDATE_RET( ctx != NULL, 0 ); + if( ctx->cipher_info == NULL ) + return 0; + + return ctx->cipher_info->block_size; +} + +/** + * \brief This function returns the mode of operation for + * the cipher. For example, MBEDTLS_MODE_CBC. + * + * \param ctx The context of the cipher. This must be initialized. + * + * \return The mode of operation. + * \return #MBEDTLS_MODE_NONE if \p ctx has not been initialized. + */ +static inline mbedtls_cipher_mode_t mbedtls_cipher_get_cipher_mode( + const mbedtls_cipher_context_t *ctx ) +{ + MBEDTLS_INTERNAL_VALIDATE_RET( ctx != NULL, MBEDTLS_MODE_NONE ); + if( ctx->cipher_info == NULL ) + return MBEDTLS_MODE_NONE; + + return ctx->cipher_info->mode; +} + +/** + * \brief This function returns the size of the IV or nonce + * of the cipher, in Bytes. + * + * \param ctx The context of the cipher. This must be initialized. + * + * \return The recommended IV size if no IV has been set. + * \return \c 0 for ciphers not using an IV or a nonce. + * \return The actual size if an IV has been set. + */ +static inline int mbedtls_cipher_get_iv_size( + const mbedtls_cipher_context_t *ctx ) +{ + MBEDTLS_INTERNAL_VALIDATE_RET( ctx != NULL, 0 ); + if( ctx->cipher_info == NULL ) + return 0; + + if( ctx->iv_size != 0 ) + return (int) ctx->iv_size; + + return (int) ctx->cipher_info->iv_size; +} + +/** + * \brief This function returns the type of the given cipher. + * + * \param ctx The context of the cipher. This must be initialized. + * + * \return The type of the cipher. + * \return #MBEDTLS_CIPHER_NONE if \p ctx has not been initialized. + */ +static inline mbedtls_cipher_type_t mbedtls_cipher_get_type( + const mbedtls_cipher_context_t *ctx ) +{ + MBEDTLS_INTERNAL_VALIDATE_RET( + ctx != NULL, MBEDTLS_CIPHER_NONE ); + if( ctx->cipher_info == NULL ) + return MBEDTLS_CIPHER_NONE; + + return ctx->cipher_info->type; +} + +/** + * \brief This function returns the name of the given cipher + * as a string. + * + * \param ctx The context of the cipher. This must be initialized. + * + * \return The name of the cipher. + * \return NULL if \p ctx has not been not initialized. + */ +static inline const char *mbedtls_cipher_get_name( + const mbedtls_cipher_context_t *ctx ) +{ + MBEDTLS_INTERNAL_VALIDATE_RET( ctx != NULL, 0 ); + if( ctx->cipher_info == NULL ) + return 0; + + return ctx->cipher_info->name; +} + +/** + * \brief This function returns the key length of the cipher. + * + * \param ctx The context of the cipher. This must be initialized. + * + * \return The key length of the cipher in bits. + * \return #MBEDTLS_KEY_LENGTH_NONE if ctx \p has not been + * initialized. + */ +static inline int mbedtls_cipher_get_key_bitlen( + const mbedtls_cipher_context_t *ctx ) +{ + MBEDTLS_INTERNAL_VALIDATE_RET( + ctx != NULL, MBEDTLS_KEY_LENGTH_NONE ); + if( ctx->cipher_info == NULL ) + return MBEDTLS_KEY_LENGTH_NONE; + + return (int) ctx->cipher_info->key_bitlen; +} + +/** + * \brief This function returns the operation of the given cipher. + * + * \param ctx The context of the cipher. This must be initialized. + * + * \return The type of operation: #MBEDTLS_ENCRYPT or #MBEDTLS_DECRYPT. + * \return #MBEDTLS_OPERATION_NONE if \p ctx has not been initialized. + */ +static inline mbedtls_operation_t mbedtls_cipher_get_operation( + const mbedtls_cipher_context_t *ctx ) +{ + MBEDTLS_INTERNAL_VALIDATE_RET( + ctx != NULL, MBEDTLS_OPERATION_NONE ); + if( ctx->cipher_info == NULL ) + return MBEDTLS_OPERATION_NONE; + + return ctx->operation; +} + +/** + * \brief This function sets the key to use with the given context. + * + * \param ctx The generic cipher context. This must be initialized and + * bound to a cipher information structure. + * \param key The key to use. This must be a readable buffer of at + * least \p key_bitlen Bits. + * \param key_bitlen The key length to use, in Bits. + * \param operation The operation that the key will be used for: + * #MBEDTLS_ENCRYPT or #MBEDTLS_DECRYPT. + * + * \return \c 0 on success. + * \return #MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA on + * parameter-verification failure. + * \return A cipher-specific error code on failure. + */ +int mbedtls_cipher_setkey( mbedtls_cipher_context_t *ctx, + const unsigned char *key, + int key_bitlen, + const mbedtls_operation_t operation ); + + +/** + * \brief This function sets the initialization vector (IV) + * or nonce. + * + * \note Some ciphers do not use IVs nor nonce. For these + * ciphers, this function has no effect. + * + * \param ctx The generic cipher context. This must be initialized and + * bound to a cipher information structure. + * \param iv The IV to use, or NONCE_COUNTER for CTR-mode ciphers. This + * must be a readable buffer of at least \p iv_len Bytes. + * \param iv_len The IV length for ciphers with variable-size IV. + * This parameter is discarded by ciphers with fixed-size IV. + * + * \return \c 0 on success. + * \return #MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA on + * parameter-verification failure. + */ +int mbedtls_cipher_set_iv( mbedtls_cipher_context_t *ctx, + const unsigned char *iv, + size_t iv_len ); + +/** + * \brief This function resets the cipher state. + * + * \note With non-AEAD ciphers, the order of calls for each message + * is as follows: + * 1. mbedtls_cipher_set_iv() if the mode uses an IV/nonce. + * 2. mbedtls_cipher_reset() + * 3. mbedtls_cipher_update() one or more times + * 4. mbedtls_cipher_finish() + * . + * This sequence can be repeated to encrypt or decrypt multiple + * messages with the same key. + * + * \note With AEAD ciphers, the order of calls for each message + * is as follows: + * 1. mbedtls_cipher_set_iv() if the mode uses an IV/nonce. + * 2. mbedtls_cipher_reset() + * 3. mbedtls_cipher_update_ad() + * 4. mbedtls_cipher_update() one or more times + * 5. mbedtls_cipher_finish() + * 6. mbedtls_cipher_check_tag() (for decryption) or + * mbedtls_cipher_write_tag() (for encryption). + * . + * This sequence can be repeated to encrypt or decrypt multiple + * messages with the same key. + * + * \param ctx The generic cipher context. This must be bound to a key. + * + * \return \c 0 on success. + * \return #MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA on + * parameter-verification failure. + */ +int mbedtls_cipher_reset( mbedtls_cipher_context_t *ctx ); + +#if defined(MBEDTLS_GCM_C) || defined(MBEDTLS_CHACHAPOLY_C) +/** + * \brief This function adds additional data for AEAD ciphers. + * Currently supported with GCM and ChaCha20+Poly1305. + * + * \param ctx The generic cipher context. This must be initialized. + * \param ad The additional data to use. This must be a readable + * buffer of at least \p ad_len Bytes. + * \param ad_len The length of \p ad in Bytes. + * + * \return \c 0 on success. + * \return A specific error code on failure. + */ +int mbedtls_cipher_update_ad( mbedtls_cipher_context_t *ctx, + const unsigned char *ad, size_t ad_len ); +#endif /* MBEDTLS_GCM_C || MBEDTLS_CHACHAPOLY_C */ + +/** + * \brief The generic cipher update function. It encrypts or + * decrypts using the given cipher context. Writes as + * many block-sized blocks of data as possible to output. + * Any data that cannot be written immediately is either + * added to the next block, or flushed when + * mbedtls_cipher_finish() is called. + * Exception: For MBEDTLS_MODE_ECB, expects a single block + * in size. For example, 16 Bytes for AES. + * + * \param ctx The generic cipher context. This must be initialized and + * bound to a key. + * \param input The buffer holding the input data. This must be a + * readable buffer of at least \p ilen Bytes. + * \param ilen The length of the input data. + * \param output The buffer for the output data. This must be able to + * hold at least `ilen + block_size`. This must not be the + * same buffer as \p input. + * \param olen The length of the output data, to be updated with the + * actual number of Bytes written. This must not be + * \c NULL. + * + * \return \c 0 on success. + * \return #MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA on + * parameter-verification failure. + * \return #MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE on an + * unsupported mode for a cipher. + * \return A cipher-specific error code on failure. + */ +int mbedtls_cipher_update( mbedtls_cipher_context_t *ctx, + const unsigned char *input, + size_t ilen, unsigned char *output, + size_t *olen ); + +/** + * \brief The generic cipher finalization function. If data still + * needs to be flushed from an incomplete block, the data + * contained in it is padded to the size of + * the last block, and written to the \p output buffer. + * + * \param ctx The generic cipher context. This must be initialized and + * bound to a key. + * \param output The buffer to write data to. This needs to be a writable + * buffer of at least \p block_size Bytes. + * \param olen The length of the data written to the \p output buffer. + * This may not be \c NULL. + * + * \return \c 0 on success. + * \return #MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA on + * parameter-verification failure. + * \return #MBEDTLS_ERR_CIPHER_FULL_BLOCK_EXPECTED on decryption + * expecting a full block but not receiving one. + * \return #MBEDTLS_ERR_CIPHER_INVALID_PADDING on invalid padding + * while decrypting. + * \return A cipher-specific error code on failure. + */ +int mbedtls_cipher_finish( mbedtls_cipher_context_t *ctx, + unsigned char *output, size_t *olen ); + +#if defined(MBEDTLS_GCM_C) || defined(MBEDTLS_CHACHAPOLY_C) +/** + * \brief This function writes a tag for AEAD ciphers. + * Currently supported with GCM and ChaCha20+Poly1305. + * This must be called after mbedtls_cipher_finish(). + * + * \param ctx The generic cipher context. This must be initialized, + * bound to a key, and have just completed a cipher + * operation through mbedtls_cipher_finish() the tag for + * which should be written. + * \param tag The buffer to write the tag to. This must be a writable + * buffer of at least \p tag_len Bytes. + * \param tag_len The length of the tag to write. + * + * \return \c 0 on success. + * \return A specific error code on failure. + */ +int mbedtls_cipher_write_tag( mbedtls_cipher_context_t *ctx, + unsigned char *tag, size_t tag_len ); + +/** + * \brief This function checks the tag for AEAD ciphers. + * Currently supported with GCM and ChaCha20+Poly1305. + * This must be called after mbedtls_cipher_finish(). + * + * \param ctx The generic cipher context. This must be initialized. + * \param tag The buffer holding the tag. This must be a readable + * buffer of at least \p tag_len Bytes. + * \param tag_len The length of the tag to check. + * + * \return \c 0 on success. + * \return A specific error code on failure. + */ +int mbedtls_cipher_check_tag( mbedtls_cipher_context_t *ctx, + const unsigned char *tag, size_t tag_len ); +#endif /* MBEDTLS_GCM_C || MBEDTLS_CHACHAPOLY_C */ + +/** + * \brief The generic all-in-one encryption/decryption function, + * for all ciphers except AEAD constructs. + * + * \param ctx The generic cipher context. This must be initialized. + * \param iv The IV to use, or NONCE_COUNTER for CTR-mode ciphers. + * This must be a readable buffer of at least \p iv_len + * Bytes. + * \param iv_len The IV length for ciphers with variable-size IV. + * This parameter is discarded by ciphers with fixed-size + * IV. + * \param input The buffer holding the input data. This must be a + * readable buffer of at least \p ilen Bytes. + * \param ilen The length of the input data in Bytes. + * \param output The buffer for the output data. This must be able to + * hold at least `ilen + block_size`. This must not be the + * same buffer as \p input. + * \param olen The length of the output data, to be updated with the + * actual number of Bytes written. This must not be + * \c NULL. + * + * \note Some ciphers do not use IVs nor nonce. For these + * ciphers, use \p iv = NULL and \p iv_len = 0. + * + * \return \c 0 on success. + * \return #MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA on + * parameter-verification failure. + * \return #MBEDTLS_ERR_CIPHER_FULL_BLOCK_EXPECTED on decryption + * expecting a full block but not receiving one. + * \return #MBEDTLS_ERR_CIPHER_INVALID_PADDING on invalid padding + * while decrypting. + * \return A cipher-specific error code on failure. + */ +int mbedtls_cipher_crypt( mbedtls_cipher_context_t *ctx, + const unsigned char *iv, size_t iv_len, + const unsigned char *input, size_t ilen, + unsigned char *output, size_t *olen ); + +#ifdef __cplusplus +} +#endif + +#endif /* MBEDTLS_CIPHER_H */ diff --git a/src/components/implementation/simple_nf/ndpi/gcrypt/cipher_wrap.c b/src/components/implementation/simple_nf/ndpi/gcrypt/cipher_wrap.c new file mode 100644 index 0000000000..5e3e679aad --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/gcrypt/cipher_wrap.c @@ -0,0 +1,234 @@ +/** + * \file cipher_wrap.c + * + * \brief Generic cipher wrapper for mbed TLS + * + * \author Adriaan de Jong + * + * Copyright The Mbed TLS Contributors + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#if defined(MBEDTLS_AES_C) + +static int aes_crypt_ecb_wrap( void *ctx, mbedtls_operation_t operation, + const unsigned char *input, unsigned char *output ) +{ + return mbedtls_aes_crypt_ecb( (mbedtls_aes_context *) ctx, operation, input, output ); +} + + +static int aes_setkey_dec_wrap( void *ctx, const unsigned char *key, + unsigned int key_bitlen ) +{ + return mbedtls_aes_setkey_dec( (mbedtls_aes_context *) ctx, key, key_bitlen ); +} + +static int aes_setkey_enc_wrap( void *ctx, const unsigned char *key, + unsigned int key_bitlen ) +{ + return mbedtls_aes_setkey_enc( (mbedtls_aes_context *) ctx, key, key_bitlen ); +} + +static void aes_ctx_zero( void *ctx ) +{ + mbedtls_aes_init( (mbedtls_aes_context *) ctx ); +} + +static const mbedtls_cipher_base_t aes_info = { + MBEDTLS_CIPHER_ID_AES, + aes_crypt_ecb_wrap, + aes_setkey_enc_wrap, + aes_setkey_dec_wrap, + NULL, // aes_ctx_alloc + NULL, // aes_ctx_free + aes_ctx_zero +}; + +static const mbedtls_cipher_info_t aes_128_ecb_info = { + MBEDTLS_CIPHER_AES_128_ECB, + MBEDTLS_MODE_ECB, + 128, + "AES-128-ECB", + 0, + 0, + 16, + &aes_info +}; + +static const mbedtls_cipher_info_t aes_192_ecb_info = { + MBEDTLS_CIPHER_AES_192_ECB, + MBEDTLS_MODE_ECB, + 192, + "AES-192-ECB", + 0, + 0, + 16, + &aes_info +}; + +static const mbedtls_cipher_info_t aes_256_ecb_info = { + MBEDTLS_CIPHER_AES_256_ECB, + MBEDTLS_MODE_ECB, + 256, + "AES-256-ECB", + 0, + 0, + 16, + &aes_info +}; + +#if defined(MBEDTLS_GCM_C) +static int gcm_aes_setkey_wrap( void *ctx, const unsigned char *key, + unsigned int key_bitlen ) +{ + return mbedtls_gcm_setkey( (mbedtls_gcm_context *) ctx, MBEDTLS_CIPHER_ID_AES, + key, key_bitlen ); +} + +static const mbedtls_cipher_base_t gcm_aes_info = { + MBEDTLS_CIPHER_ID_AES, + NULL, + gcm_aes_setkey_wrap, + gcm_aes_setkey_wrap, + NULL, // gcm_ctx_alloc + NULL, // gcm_ctx_free + NULL +}; + +static const mbedtls_cipher_info_t aes_128_gcm_info = { + MBEDTLS_CIPHER_AES_128_GCM, + MBEDTLS_MODE_GCM, + 128, + "AES-128-GCM", + 12, + MBEDTLS_CIPHER_VARIABLE_IV_LEN, + 16, + &gcm_aes_info +}; + +static const mbedtls_cipher_info_t aes_192_gcm_info = { + MBEDTLS_CIPHER_AES_192_GCM, + MBEDTLS_MODE_GCM, + 192, + "AES-192-GCM", + 12, + MBEDTLS_CIPHER_VARIABLE_IV_LEN, + 16, + &gcm_aes_info +}; + +static const mbedtls_cipher_info_t aes_256_gcm_info = { + MBEDTLS_CIPHER_AES_256_GCM, + MBEDTLS_MODE_GCM, + 256, + "AES-256-GCM", + 12, + MBEDTLS_CIPHER_VARIABLE_IV_LEN, + 16, + &gcm_aes_info +}; +#endif /* MBEDTLS_GCM_C */ + + +#endif /* MBEDTLS_AES_C */ + + + + + + +#if defined(MBEDTLS_CIPHER_NULL_CIPHER) +static int null_crypt_stream( void *ctx, size_t length, + const unsigned char *input, + unsigned char *output ) +{ + ((void) ctx); + memmove( output, input, length ); + return( 0 ); +} + +static int null_setkey( void *ctx, const unsigned char *key, + unsigned int key_bitlen ) +{ + ((void) ctx); + ((void) key); + ((void) key_bitlen); + + return( 0 ); +} + +static void * null_ctx_alloc( void ) +{ + return( (void *) 1 ); +} + +static void null_ctx_free( void *ctx ) +{ + ((void) ctx); +} + +static const mbedtls_cipher_base_t null_base_info = { + MBEDTLS_CIPHER_ID_NULL, + NULL, + null_setkey, + null_setkey, + null_ctx_alloc, + null_ctx_free +}; + +static const mbedtls_cipher_info_t null_cipher_info = { + MBEDTLS_CIPHER_NULL, + MBEDTLS_MODE_STREAM, + 0, + "NULL", + 0, + 0, + 1, + &null_base_info +}; +#endif /* defined(MBEDTLS_CIPHER_NULL_CIPHER) */ + + +const mbedtls_cipher_definition_t mbedtls_cipher_definitions[] = +{ +#if defined(MBEDTLS_AES_C) + { MBEDTLS_CIPHER_AES_128_ECB, &aes_128_ecb_info }, + { MBEDTLS_CIPHER_AES_192_ECB, &aes_192_ecb_info }, + { MBEDTLS_CIPHER_AES_256_ECB, &aes_256_ecb_info }, +#if defined(MBEDTLS_GCM_C) + { MBEDTLS_CIPHER_AES_128_GCM, &aes_128_gcm_info }, + { MBEDTLS_CIPHER_AES_192_GCM, &aes_192_gcm_info }, + { MBEDTLS_CIPHER_AES_256_GCM, &aes_256_gcm_info }, +#endif +#endif /* MBEDTLS_AES_C */ + + + + + + + +#if defined(MBEDTLS_CIPHER_NULL_CIPHER) + { MBEDTLS_CIPHER_NULL, &null_cipher_info }, +#endif /* MBEDTLS_CIPHER_NULL_CIPHER */ + + { MBEDTLS_CIPHER_NONE, NULL } +}; + +#define NUM_CIPHERS ( sizeof(mbedtls_cipher_definitions) / \ + sizeof(mbedtls_cipher_definitions[0]) ) +int mbedtls_cipher_supported[NUM_CIPHERS]; + diff --git a/src/components/implementation/simple_nf/ndpi/gcrypt/cipher_wrap.h b/src/components/implementation/simple_nf/ndpi/gcrypt/cipher_wrap.h new file mode 100644 index 0000000000..a75d04c91f --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/gcrypt/cipher_wrap.h @@ -0,0 +1,92 @@ +/** + * \file cipher_wrap.h + * + * \brief Cipher wrappers. + * + * \author Adriaan de Jong + */ +/* + * Copyright The Mbed TLS Contributors + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#ifndef MBEDTLS_CIPHER_WRAP_H +#define MBEDTLS_CIPHER_WRAP_H + + + + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * Base cipher information. The non-mode specific functions and values. + */ +struct mbedtls_cipher_base_t +{ + /** Base Cipher type (e.g. MBEDTLS_CIPHER_ID_AES) */ + mbedtls_cipher_id_t cipher; + + /** Encrypt using ECB */ + int (*ecb_func)( void *ctx, mbedtls_operation_t mode, + const unsigned char *input, unsigned char *output ); + +#if defined(MBEDTLS_CIPHER_MODE_CBC) + /** Encrypt using CBC */ + int (*cbc_func)( void *ctx, mbedtls_operation_t mode, size_t length, + unsigned char *iv, const unsigned char *input, + unsigned char *output ); +#endif + + + + + + + /** Set key for encryption purposes */ + int (*setkey_enc_func)( void *ctx, const unsigned char *key, + unsigned int key_bitlen ); + + /** Set key for decryption purposes */ + int (*setkey_dec_func)( void *ctx, const unsigned char *key, + unsigned int key_bitlen); + + /** Allocate a new context */ + void * (*ctx_alloc_func)( void ); + + /** Free the given context */ + void (*ctx_free_func)( void *ctx ); + + /** Zero the given context */ + void (*ctx_zero_func)( void *ctx ); + +}; + +typedef struct +{ + mbedtls_cipher_type_t type; + const mbedtls_cipher_info_t *info; +} mbedtls_cipher_definition_t; + + +extern const mbedtls_cipher_definition_t mbedtls_cipher_definitions[]; + +extern int mbedtls_cipher_supported[]; + +#ifdef __cplusplus +} +#endif + +#endif /* MBEDTLS_CIPHER_WRAP_H */ diff --git a/src/components/implementation/simple_nf/ndpi/gcrypt/common.h b/src/components/implementation/simple_nf/ndpi/gcrypt/common.h new file mode 100644 index 0000000000..ba6a654ab7 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/gcrypt/common.h @@ -0,0 +1,368 @@ +/** + * \file common.h + * + * \brief Utility macros for internal use in the library + */ +/* + * Copyright The Mbed TLS Contributors + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef MBEDTLS_LIBRARY_COMMON_H +#define MBEDTLS_LIBRARY_COMMON_H + +#ifdef _MSC_VER + + #include + #define bswap_64(x) _byteswap_uint64(x) + +#elif defined(__APPLE__) + + // Mac OS X / Darwin features + #include + #define bswap_64(x) OSSwapInt64(x) + +#elif defined(__sun) || defined(sun) + + #include + #define bswap_64(x) BSWAP_64(x) + +#elif defined(__FreeBSD__) + + #include + #define bswap_64(x) bswap64(x) + +#elif defined(__OpenBSD__) + + #include + #define bswap_64(x) swap64(x) + +#elif defined(__NetBSD__) + + #include + #include + #if defined(__BSWAP_RENAME) && !defined(__bswap_32) + #define bswap_64(x) bswap64(x) + #endif +#elif defined(__MINGW32__) || defined(__MINGW64__) + #define bswap_64(x) __builtin_bswap64(x) +#else + #include +#endif + + +/** Helper to define a function as static except when building invasive tests. + * + * If a function is only used inside its own source file and should be + * declared `static` to allow the compiler to optimize for code size, + * but that function has unit tests, define it with + * ``` + * MBEDTLS_STATIC_TESTABLE int mbedtls_foo(...) { ... } + * ``` + * and declare it in a header in the `library/` directory with + * ``` + * #if defined(MBEDTLS_TEST_HOOKS) + * int mbedtls_foo(...); + * #endif + * ``` + */ + +/** Byte Reading Macros + * + * Given a multi-byte integer \p x, MBEDTLS_BYTE_n retrieves the n-th + * byte from x, where byte 0 is the least significant byte. + */ + +#if defined(__LITTLE_ENDIAN__) || defined(_LITTLE_ENDIAN) + +#define MBEDTLS_GET_UINT32_LE(b,i) (*(uint32_t *) (&(b)[(i)])) +#define MBEDTLS_GET_UINT32_BE(b,i) htonl(*(uint32_t *) (&(b)[(i)])) +#define MBEDTLS_PUT_UINT32_LE(n,b,i) *(uint32_t *) (&(b)[(i)]) = (n); +#define MBEDTLS_PUT_UINT64_BE(n,b,i) *(uint64_t *) (&(b)[(i)]) = bswap_64(n); + +#elif defined(__BIG_ENDIAN__) || defined(__BIG_ENDIAN) + +#define MBEDTLS_GET_UINT32_LE(b,i) bswap_32(*(uint32_t *) (&(b)[(i)])) +#define MBEDTLS_GET_UINT32_BE(b,i) (*(uint32_t *) (&(b)[(i)])) +#define MBEDTLS_PUT_UINT32_LE(n,b,i) *(uint32_t *) (&(b)[(i)]) = bswap_32(n); +#define MBEDTLS_PUT_UINT64_BE(n,b,i) *(uint64_t *) (&(b)[(i)]) = (n); + +#else +#warning "__BYTE_ORDER MUST BE DEFINED !" +#endif + + +#define MBEDTLS_BYTE_0( x ) ( (uint8_t) ( ( x ) & 0xff ) ) +#define MBEDTLS_BYTE_1( x ) ( (uint8_t) ( ( ( x ) >> 8 ) & 0xff ) ) +#define MBEDTLS_BYTE_2( x ) ( (uint8_t) ( ( ( x ) >> 16 ) & 0xff ) ) +#define MBEDTLS_BYTE_3( x ) ( (uint8_t) ( ( ( x ) >> 24 ) & 0xff ) ) + +/** + * Get the unsigned 32 bits integer corresponding to four bytes in + * big-endian order (MSB first). + * + * \param data Base address of the memory to get the four bytes from. + * \param offset Offset from \p data of the first and most significant + * byte of the four bytes to build the 32 bits unsigned + * integer from. + */ +#ifndef MBEDTLS_GET_UINT32_BE +#define MBEDTLS_GET_UINT32_BE( data , offset ) \ + ( \ + ( (uint32_t) ( data )[( offset ) ] << 24 ) \ + | ( (uint32_t) ( data )[( offset ) + 1] << 16 ) \ + | ( (uint32_t) ( data )[( offset ) + 2] << 8 ) \ + | ( (uint32_t) ( data )[( offset ) + 3] ) \ + ) +#endif + +/** + * Put in memory a 32 bits unsigned integer in big-endian order. + * + * \param n 32 bits unsigned integer to put in memory. + * \param data Base address of the memory where to put the 32 + * bits unsigned integer in. + * \param offset Offset from \p data where to put the most significant + * byte of the 32 bits unsigned integer \p n. + */ +#ifndef MBEDTLS_PUT_UINT32_BE +#define MBEDTLS_PUT_UINT32_BE( n, data, offset ) \ +{ \ + ( data )[( offset ) ] = MBEDTLS_BYTE_3( n ); \ + ( data )[( offset ) + 1] = MBEDTLS_BYTE_2( n ); \ + ( data )[( offset ) + 2] = MBEDTLS_BYTE_1( n ); \ + ( data )[( offset ) + 3] = MBEDTLS_BYTE_0( n ); \ +} +#endif + +/** + * Get the unsigned 32 bits integer corresponding to four bytes in + * little-endian order (LSB first). + * + * \param data Base address of the memory to get the four bytes from. + * \param offset Offset from \p data of the first and least significant + * byte of the four bytes to build the 32 bits unsigned + * integer from. + */ +#ifndef MBEDTLS_GET_UINT32_LE +#define MBEDTLS_GET_UINT32_LE( data, offset ) \ + ( \ + ( (uint32_t) ( data )[( offset ) ] ) \ + | ( (uint32_t) ( data )[( offset ) + 1] << 8 ) \ + | ( (uint32_t) ( data )[( offset ) + 2] << 16 ) \ + | ( (uint32_t) ( data )[( offset ) + 3] << 24 ) \ + ) +#endif + +/** + * Put in memory a 32 bits unsigned integer in little-endian order. + * + * \param n 32 bits unsigned integer to put in memory. + * \param data Base address of the memory where to put the 32 + * bits unsigned integer in. + * \param offset Offset from \p data where to put the least significant + * byte of the 32 bits unsigned integer \p n. + */ +#ifndef MBEDTLS_PUT_UINT32_LE +#define MBEDTLS_PUT_UINT32_LE( n, data, offset ) \ +{ \ + ( data )[( offset ) ] = MBEDTLS_BYTE_0( n ); \ + ( data )[( offset ) + 1] = MBEDTLS_BYTE_1( n ); \ + ( data )[( offset ) + 2] = MBEDTLS_BYTE_2( n ); \ + ( data )[( offset ) + 3] = MBEDTLS_BYTE_3( n ); \ +} +#endif + +/** + * Get the unsigned 16 bits integer corresponding to two bytes in + * little-endian order (LSB first). + * + * \param data Base address of the memory to get the two bytes from. + * \param offset Offset from \p data of the first and least significant + * byte of the two bytes to build the 16 bits unsigned + * integer from. + */ +#ifndef MBEDTLS_GET_UINT16_LE +#define MBEDTLS_GET_UINT16_LE( data, offset ) \ + ( \ + ( (uint16_t) ( data )[( offset ) ] ) \ + | ( (uint16_t) ( data )[( offset ) + 1] << 8 ) \ + ) +#endif + +/** + * Put in memory a 16 bits unsigned integer in little-endian order. + * + * \param n 16 bits unsigned integer to put in memory. + * \param data Base address of the memory where to put the 16 + * bits unsigned integer in. + * \param offset Offset from \p data where to put the least significant + * byte of the 16 bits unsigned integer \p n. + */ +#ifndef MBEDTLS_PUT_UINT16_LE +#define MBEDTLS_PUT_UINT16_LE( n, data, offset ) \ +{ \ + ( data )[( offset ) ] = MBEDTLS_BYTE_0( n ); \ + ( data )[( offset ) + 1] = MBEDTLS_BYTE_1( n ); \ +} +#endif + +/** + * Get the unsigned 16 bits integer corresponding to two bytes in + * big-endian order (MSB first). + * + * \param data Base address of the memory to get the two bytes from. + * \param offset Offset from \p data of the first and most significant + * byte of the two bytes to build the 16 bits unsigned + * integer from. + */ +#ifndef MBEDTLS_GET_UINT16_BE +#define MBEDTLS_GET_UINT16_BE( data, offset ) \ + ( \ + ( (uint16_t) ( data )[( offset ) ] << 8 ) \ + | ( (uint16_t) ( data )[( offset ) + 1] ) \ + ) +#endif + +/** + * Put in memory a 16 bits unsigned integer in big-endian order. + * + * \param n 16 bits unsigned integer to put in memory. + * \param data Base address of the memory where to put the 16 + * bits unsigned integer in. + * \param offset Offset from \p data where to put the most significant + * byte of the 16 bits unsigned integer \p n. + */ +#ifndef MBEDTLS_PUT_UINT16_BE +#define MBEDTLS_PUT_UINT16_BE( n, data, offset ) \ +{ \ + ( data )[( offset ) ] = MBEDTLS_BYTE_1( n ); \ + ( data )[( offset ) + 1] = MBEDTLS_BYTE_0( n ); \ +} +#endif + +/** + * Get the unsigned 64 bits integer corresponding to eight bytes in + * big-endian order (MSB first). + * + * \param data Base address of the memory to get the eight bytes from. + * \param offset Offset from \p data of the first and most significant + * byte of the eight bytes to build the 64 bits unsigned + * integer from. + */ +#ifndef MBEDTLS_GET_UINT64_BE +#define MBEDTLS_GET_UINT64_BE( data, offset ) \ + ( \ + ( (uint64_t) ( data )[( offset ) ] << 56 ) \ + | ( (uint64_t) ( data )[( offset ) + 1] << 48 ) \ + | ( (uint64_t) ( data )[( offset ) + 2] << 40 ) \ + | ( (uint64_t) ( data )[( offset ) + 3] << 32 ) \ + | ( (uint64_t) ( data )[( offset ) + 4] << 24 ) \ + | ( (uint64_t) ( data )[( offset ) + 5] << 16 ) \ + | ( (uint64_t) ( data )[( offset ) + 6] << 8 ) \ + | ( (uint64_t) ( data )[( offset ) + 7] ) \ + ) +#endif + +/** + * Put in memory a 64 bits unsigned integer in big-endian order. + * + * \param n 64 bits unsigned integer to put in memory. + * \param data Base address of the memory where to put the 64 + * bits unsigned integer in. + * \param offset Offset from \p data where to put the most significant + * byte of the 64 bits unsigned integer \p n. + */ +#ifndef MBEDTLS_PUT_UINT64_BE +#define MBEDTLS_PUT_UINT64_BE( n, data, offset ) \ +{ \ + ( data )[( offset ) ] = MBEDTLS_BYTE_7( n ); \ + ( data )[( offset ) + 1] = MBEDTLS_BYTE_6( n ); \ + ( data )[( offset ) + 2] = MBEDTLS_BYTE_5( n ); \ + ( data )[( offset ) + 3] = MBEDTLS_BYTE_4( n ); \ + ( data )[( offset ) + 4] = MBEDTLS_BYTE_3( n ); \ + ( data )[( offset ) + 5] = MBEDTLS_BYTE_2( n ); \ + ( data )[( offset ) + 6] = MBEDTLS_BYTE_1( n ); \ + ( data )[( offset ) + 7] = MBEDTLS_BYTE_0( n ); \ +} +#endif + +/** + * Get the unsigned 64 bits integer corresponding to eight bytes in + * little-endian order (LSB first). + * + * \param data Base address of the memory to get the eight bytes from. + * \param offset Offset from \p data of the first and least significant + * byte of the eight bytes to build the 64 bits unsigned + * integer from. + */ +#ifndef MBEDTLS_GET_UINT64_LE +#define MBEDTLS_GET_UINT64_LE( data, offset ) \ + ( \ + ( (uint64_t) ( data )[( offset ) + 7] << 56 ) \ + | ( (uint64_t) ( data )[( offset ) + 6] << 48 ) \ + | ( (uint64_t) ( data )[( offset ) + 5] << 40 ) \ + | ( (uint64_t) ( data )[( offset ) + 4] << 32 ) \ + | ( (uint64_t) ( data )[( offset ) + 3] << 24 ) \ + | ( (uint64_t) ( data )[( offset ) + 2] << 16 ) \ + | ( (uint64_t) ( data )[( offset ) + 1] << 8 ) \ + | ( (uint64_t) ( data )[( offset ) ] ) \ + ) +#endif + +/** + * Put in memory a 64 bits unsigned integer in little-endian order. + * + * \param n 64 bits unsigned integer to put in memory. + * \param data Base address of the memory where to put the 64 + * bits unsigned integer in. + * \param offset Offset from \p data where to put the least significant + * byte of the 64 bits unsigned integer \p n. + */ +#ifndef MBEDTLS_PUT_UINT64_LE +#define MBEDTLS_PUT_UINT64_LE( n, data, offset ) \ +{ \ + ( data )[( offset ) ] = MBEDTLS_BYTE_0( n ); \ + ( data )[( offset ) + 1] = MBEDTLS_BYTE_1( n ); \ + ( data )[( offset ) + 2] = MBEDTLS_BYTE_2( n ); \ + ( data )[( offset ) + 3] = MBEDTLS_BYTE_3( n ); \ + ( data )[( offset ) + 4] = MBEDTLS_BYTE_4( n ); \ + ( data )[( offset ) + 5] = MBEDTLS_BYTE_5( n ); \ + ( data )[( offset ) + 6] = MBEDTLS_BYTE_6( n ); \ + ( data )[( offset ) + 7] = MBEDTLS_BYTE_7( n ); \ +} +#endif + +/* Fix MSVC C99 compatible issue + * MSVC support __func__ from visual studio 2015( 1900 ) + * Use MSVC predefine macro to avoid name check fail. + */ +#if (defined(_MSC_VER) && ( _MSC_VER <= 1900 )) +#define /*no-check-names*/ __func__ __FUNCTION__ +#endif + +#define ROTL8(x) ( (uint32_t)( ( x ) << 8 ) + (uint32_t)( ( x ) >> 24 ) ) +#define ROTL16(x) ( (uint32_t)( ( x ) << 16 ) + (uint32_t)( ( x ) >> 16 ) ) +#define ROTL24(x) ( (uint32_t)( ( x ) << 24 ) + (uint32_t)( ( x ) >> 8 ) ) + +#ifndef mbedtls_calloc +#define mbedtls_calloc calloc +#endif +#ifndef mbedtls_free +#define mbedtls_free free +#endif + + +#endif /* MBEDTLS_LIBRARY_COMMON_H */ diff --git a/src/components/implementation/simple_nf/ndpi/gcrypt/digest.c b/src/components/implementation/simple_nf/ndpi/gcrypt/digest.c new file mode 100644 index 0000000000..48e6eea973 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/gcrypt/digest.c @@ -0,0 +1,321 @@ +/* + * hmac-sha256.c + * Copyright (C) 2017 Adrian Perez + * + * Distributed under terms of the MIT license. + */ + +//#include +//#include +//#include +//#include + +//#include "gcrypt/digest.h" + +/* define it for speed optimization */ +#define _SHA256_UNROLL +#define _SHA256_UNROLL2 + +/* + * Crypto/Sha256.c -- SHA-256 Hash + * 2010-06-11 : Igor Pavlov : Public domain + * This code is based on public domain code from Wei Dai's Crypto++ library. + */ + +#define U8V(v) ((uint8_t)(v) & 0xFFU) +#define U16V(v) ((uint16_t)(v) & 0xFFFFU) +#define U32V(v) ((uint32_t)(v) & 0xFFFFFFFFU) +#define U64V(v) ((uint64_t)(v) & 0xFFFFFFFFFFFFFFFFU) + +#define ROTL32(v, n) (U32V((uint32_t)(v) << (n)) | ((uint32_t)(v) >> (32 - (n)))) + +// tests fail if we don't have this cast... +#define ROTL64(v, n) (U64V((uint64_t)(v) << (n)) | ((uint64_t)(v) >> (64 - (n)))) + +#define ROTR32(v, n) ROTL32(v, 32 - (n)) +#define ROTR64(v, n) ROTL64(v, 64 - (n)) + +#ifndef ROTL8 +#define ROTL8(v, n) (U8V((uint8_t)(v) << (n)) | ((uint8_t)(v) >> (8 - (n)))) +#endif +#ifndef ROTL16 +#define ROTL16(v, n) (U16V((uint16_t)(v) << (n)) | ((uint16_t)(v) >> (16 - (n)))) +#endif + +#define ROTR8(v, n) ROTL8(v, 8 - (n)) +#define ROTR16(v, n) ROTL16(v, 16 - (n)) + +#define S0(x) (ROTR32(x, 2) ^ ROTR32(x,13) ^ ROTR32(x, 22)) +#define S1(x) (ROTR32(x, 6) ^ ROTR32(x,11) ^ ROTR32(x, 25)) +#define s0(x) (ROTR32(x, 7) ^ ROTR32(x,18) ^ (x >> 3)) +#define s1(x) (ROTR32(x,17) ^ ROTR32(x,19) ^ (x >> 10)) + +#define blk0(i) (W[i] = data[i]) +#define blk2(i) (W[i&15] += s1(W[(i-2)&15]) + W[(i-7)&15] + s0(W[(i-15)&15])) + +#define Ch(x,y,z) (z^(x&(y^z))) +#define Maj(x,y,z) ((x&y)|(z&(x|y))) + +#define a(i) T[(0-(i))&7] +#define b(i) T[(1-(i))&7] +#define c(i) T[(2-(i))&7] +#define d(i) T[(3-(i))&7] +#define e(i) T[(4-(i))&7] +#define f(i) T[(5-(i))&7] +#define g(i) T[(6-(i))&7] +#define h(i) T[(7-(i))&7] + + +#ifdef _SHA256_UNROLL2 + +#define R(a,b,c,d,e,f,g,h, i) h += S1(e) + Ch(e,f,g) + K[i+j] + (j?blk2(i):blk0(i));\ + d += h; h += S0(a) + Maj(a, b, c) + +#define RX_8(i) \ + R(a,b,c,d,e,f,g,h, i); \ + R(h,a,b,c,d,e,f,g, (i+1)); \ + R(g,h,a,b,c,d,e,f, (i+2)); \ + R(f,g,h,a,b,c,d,e, (i+3)); \ + R(e,f,g,h,a,b,c,d, (i+4)); \ + R(d,e,f,g,h,a,b,c, (i+5)); \ + R(c,d,e,f,g,h,a,b, (i+6)); \ + R(b,c,d,e,f,g,h,a, (i+7)) + +#else + +#define R(i) h(i) += S1(e(i)) + Ch(e(i),f(i),g(i)) + K[i+j] + (j?blk2(i):blk0(i));\ + d(i) += h(i); h(i) += S0(a(i)) + Maj(a(i), b(i), c(i)) + +#ifdef _SHA256_UNROLL + +#define RX_8(i) R(i+0); R(i+1); R(i+2); R(i+3); R(i+4); R(i+5); R(i+6); R(i+7); + +#endif + +#endif + +static const uint32_t K[64] = { + 0x428a2f98, 0x71374491, 0xb5c0fbcf, 0xe9b5dba5, + 0x3956c25b, 0x59f111f1, 0x923f82a4, 0xab1c5ed5, + 0xd807aa98, 0x12835b01, 0x243185be, 0x550c7dc3, + 0x72be5d74, 0x80deb1fe, 0x9bdc06a7, 0xc19bf174, + 0xe49b69c1, 0xefbe4786, 0x0fc19dc6, 0x240ca1cc, + 0x2de92c6f, 0x4a7484aa, 0x5cb0a9dc, 0x76f988da, + 0x983e5152, 0xa831c66d, 0xb00327c8, 0xbf597fc7, + 0xc6e00bf3, 0xd5a79147, 0x06ca6351, 0x14292967, + 0x27b70a85, 0x2e1b2138, 0x4d2c6dfc, 0x53380d13, + 0x650a7354, 0x766a0abb, 0x81c2c92e, 0x92722c85, + 0xa2bfe8a1, 0xa81a664b, 0xc24b8b70, 0xc76c51a3, + 0xd192e819, 0xd6990624, 0xf40e3585, 0x106aa070, + 0x19a4c116, 0x1e376c08, 0x2748774c, 0x34b0bcb5, + 0x391c0cb3, 0x4ed8aa4a, 0x5b9cca4f, 0x682e6ff3, + 0x748f82ee, 0x78a5636f, 0x84c87814, 0x8cc70208, + 0x90befffa, 0xa4506ceb, 0xbef9a3f7, 0xc67178f2 +}; + +static void +sha256_init(sha256_t *p) +{ + p->state[0] = 0x6a09e667; + p->state[1] = 0xbb67ae85; + p->state[2] = 0x3c6ef372; + p->state[3] = 0xa54ff53a; + p->state[4] = 0x510e527f; + p->state[5] = 0x9b05688c; + p->state[6] = 0x1f83d9ab; + p->state[7] = 0x5be0cd19; + p->count = 0; +} + +static void +sha256_transform(uint32_t *state, const uint32_t *data) +{ + uint32_t W[16] = {0}; + unsigned j; + #ifdef _SHA256_UNROLL2 + uint32_t a,b,c,d,e,f,g,h; + a = state[0]; + b = state[1]; + c = state[2]; + d = state[3]; + e = state[4]; + f = state[5]; + g = state[6]; + h = state[7]; + #else + uint32_t T[8]; + for (j = 0; j < 8; j++) + T[j] = state[j]; + #endif + + for (j = 0; j < 64; j += 16) + { + #if defined(_SHA256_UNROLL) || defined(_SHA256_UNROLL2) + RX_8(0); RX_8(8); + #else + unsigned i; + for (i = 0; i < 16; i++) { R(i); } + #endif + } + + #ifdef _SHA256_UNROLL2 + state[0] += a; + state[1] += b; + state[2] += c; + state[3] += d; + state[4] += e; + state[5] += f; + state[6] += g; + state[7] += h; + #else + for (j = 0; j < 8; j++) + state[j] += T[j]; + #endif + + /* Wipe variables */ + /* memset(W, 0, sizeof(W)); */ + /* memset(T, 0, sizeof(T)); */ +} + +#undef S0 +#undef S1 +#undef s0 +#undef s1 + +static void +sha256_write_byte_block(sha256_t *p) +{ + uint32_t data32[16]; + unsigned i; + for (i = 0; i < 16; i++) + data32[i] = + ((uint32_t)(p->buffer[i * 4 ]) << 24) + + ((uint32_t)(p->buffer[i * 4 + 1]) << 16) + + ((uint32_t)(p->buffer[i * 4 + 2]) << 8) + + ((uint32_t)(p->buffer[i * 4 + 3])); + sha256_transform(p->state, data32); +} + +static void +sha256_update(sha256_t *p, const unsigned char *data, size_t size) +{ + uint32_t curBufferPos = (uint32_t)p->count & 0x3F; + while (size > 0) + { + p->buffer[curBufferPos++] = *data++; + p->count++; + size--; + if (curBufferPos == 64) + { + curBufferPos = 0; + sha256_write_byte_block(p); + } + } +} + + +void +sha256_final(sha256_t *p, unsigned char *digest) +{ + uint64_t lenInBits = (p->count << 3); + uint32_t curBufferPos = (uint32_t)p->count & 0x3F; + unsigned i; + p->buffer[curBufferPos++] = 0x80; + while (curBufferPos != (64 - 8)) + { + curBufferPos &= 0x3F; + if (curBufferPos == 0) + sha256_write_byte_block(p); + p->buffer[curBufferPos++] = 0; + } + for (i = 0; i < 8; i++) + { + p->buffer[curBufferPos++] = (unsigned char)(lenInBits >> 56); + lenInBits <<= 8; + } + sha256_write_byte_block(p); + + for (i = 0; i < 8; i++) + { + *digest++ = (unsigned char)(p->state[i] >> 24); + *digest++ = (unsigned char)(p->state[i] >> 16); + *digest++ = (unsigned char)(p->state[i] >> 8); + *digest++ = (unsigned char)(p->state[i]); + } + sha256_init(p); +} + +/* + * HMAC(H, K) == H(K ^ opad, H(K ^ ipad, text)) + * + * H: Hash function (sha256) + * K: Secret key + * B: Block byte length + * L: Byte length of hash function output + * + * https://tools.ietf.org/html/rfc2104 + */ + +#define B 64 +#define L (SHA256_DIGEST_SIZE) +#define K (SHA256_DIGEST_SIZE * 2) + +#define I_PAD 0x36 +#define O_PAD 0x5C + +void +hmac_sha256 (uint8_t out[HMAC_SHA256_DIGEST_SIZE], + const uint8_t *data, size_t data_len, + const uint8_t *key, size_t key_len) +{ + sha256_t ss; + uint8_t kx[B]; + size_t i; + + if(!out) return; + if(!data) return; + if(!key) return; + if(key_len > B) return; + + /* + * (1) append zeros to the end of K to create a B byte string + * (e.g., if K is of length 20 bytes and B=64, then K will be + * appended with 44 zero bytes 0x00) + * (2) XOR (bitwise exclusive-OR) the B byte string computed in step + * (1) with ipad + */ + for (i = 0; i < key_len; i++) kx[i] = I_PAD ^ key[i]; + for (i = key_len; i < B; i++) kx[i] = I_PAD ^ 0; + + /* + * (3) append the stream of data 'text' to the B byte string resulting + * from step (2) + * (4) apply H to the stream generated in step (3) + */ + sha256_init (&ss); + sha256_update (&ss, kx, B); + sha256_update (&ss, data, data_len); + sha256_final (&ss, out); + + /* + * (5) XOR (bitwise exclusive-OR) the B byte string computed in + * step (1) with opad + * + * NOTE: The "kx" variable is reused. + */ + for (i = 0; i < key_len; i++) kx[i] = O_PAD ^ key[i]; + for (i = key_len; i < B; i++) kx[i] = O_PAD ^ 0; + + /* + * (6) append the H result from step (4) to the B byte string + * resulting from step (5) + * (7) apply H to the stream generated in step (6) and output + * the result + */ + sha256_init (&ss); + sha256_update (&ss, kx, B); + sha256_update (&ss, out, SHA256_DIGEST_SIZE); + sha256_final (&ss, out); +} + + diff --git a/src/components/implementation/simple_nf/ndpi/gcrypt/digest.h b/src/components/implementation/simple_nf/ndpi/gcrypt/digest.h new file mode 100644 index 0000000000..a57a901e5e --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/gcrypt/digest.h @@ -0,0 +1,26 @@ +/* + * hmac-sha256.c + * Copyright (C) 2017 Adrian Perez + * + * Distributed under terms of the MIT license. + */ + +#ifndef DIGEST_CRYPT_H +#define DIGEST_CRYPT_H + +#define HMAC_SHA256_DIGEST_SIZE 32 /* Same as SHA-256's output size. */ +#define SHA256_DIGEST_SIZE 32 + +typedef struct sha256_t +{ + uint32_t state[8]; + uint64_t count; + unsigned char buffer[64]; +} sha256_t; + +void +hmac_sha256 (uint8_t out[HMAC_SHA256_DIGEST_SIZE], + const uint8_t *data, size_t data_len, + const uint8_t *key, size_t key_len); + +#endif diff --git a/src/components/implementation/simple_nf/ndpi/gcrypt/error.h b/src/components/implementation/simple_nf/ndpi/gcrypt/error.h new file mode 100644 index 0000000000..3fc9b03d98 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/gcrypt/error.h @@ -0,0 +1,201 @@ +/** + * \file error.h + * + * \brief Error to string translation + */ +/* + * Copyright The Mbed TLS Contributors + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#ifndef MBEDTLS_ERROR_H +#define MBEDTLS_ERROR_H + + + +#if ( defined(__ARMCC_VERSION) || defined(_MSC_VER) ) && \ + !defined(inline) && !defined(__cplusplus) +#define inline __inline +#endif + +/** + * Error code layout. + * + * Currently we try to keep all error codes within the negative space of 16 + * bits signed integers to support all platforms (-0x0001 - -0x7FFF). In + * addition we'd like to give two layers of information on the error if + * possible. + * + * For that purpose the error codes are segmented in the following manner: + * + * 16 bit error code bit-segmentation + * + * 1 bit - Unused (sign bit) + * 3 bits - High level module ID + * 5 bits - Module-dependent error code + * 7 bits - Low level module errors + * + * For historical reasons, low-level error codes are divided in even and odd, + * even codes were assigned first, and -1 is reserved for other errors. + * + * Low-level module errors (0x0002-0x007E, 0x0001-0x007F) + * + * Module Nr Codes assigned + * ERROR 2 0x006E 0x0001 + * MPI 7 0x0002-0x0010 + * GCM 3 0x0012-0x0016 0x0013-0x0013 + * THREADING 3 0x001A-0x001E + * AES 5 0x0020-0x0022 0x0021-0x0025 + * CAMELLIA 3 0x0024-0x0026 0x0027-0x0027 + * BASE64 2 0x002A-0x002C + * OID 1 0x002E-0x002E 0x000B-0x000B + * PADLOCK 1 0x0030-0x0030 + * DES 2 0x0032-0x0032 0x0033-0x0033 + * CTR_DBRG 4 0x0034-0x003A + * ENTROPY 3 0x003C-0x0040 0x003D-0x003F + * NET 13 0x0042-0x0052 0x0043-0x0049 + * ARIA 4 0x0058-0x005E + * ASN1 7 0x0060-0x006C + * CMAC 1 0x007A-0x007A + * PBKDF2 1 0x007C-0x007C + * HMAC_DRBG 4 0x0003-0x0009 + * CCM 3 0x000D-0x0011 + * MD5 1 0x002F-0x002F + * RIPEMD160 1 0x0031-0x0031 + * SHA1 1 0x0035-0x0035 0x0073-0x0073 + * SHA256 1 0x0037-0x0037 0x0074-0x0074 + * SHA512 1 0x0039-0x0039 0x0075-0x0075 + * CHACHA20 3 0x0051-0x0055 + * POLY1305 3 0x0057-0x005B + * CHACHAPOLY 2 0x0054-0x0056 + * PLATFORM 2 0x0070-0x0072 + * + * High-level module nr (3 bits - 0x0...-0x7...) + * Name ID Nr of Errors + * PEM 1 9 + * PKCS#12 1 4 (Started from top) + * X509 2 20 + * PKCS5 2 4 (Started from top) + * DHM 3 11 + * PK 3 15 (Started from top) + * RSA 4 11 + * ECP 4 10 (Started from top) + * MD 5 5 + * HKDF 5 1 (Started from top) + * SSL 5 2 (Started from 0x5F00) + * CIPHER 6 8 (Started from 0x6080) + * SSL 6 22 (Started from top, plus 0x6000) + * SSL 7 20 (Started from 0x7000, gaps at + * 0x7380, 0x7900-0x7980, 0x7A80-0x7E80) + * + * Module dependent error code (5 bits 0x.00.-0x.F8.) + */ + +#ifdef __cplusplus +extern "C" { +#endif + +/** Generic error */ +#define MBEDTLS_ERR_ERROR_GENERIC_ERROR -0x0001 +/** This is a bug in the library */ +#define MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED -0x006E + +/** Hardware accelerator failed */ +#define MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED -0x0070 +/** The requested feature is not supported by the platform */ +#define MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED -0x0072 + +/** + * \brief Combines a high-level and low-level error code together. + * + * Wrapper macro for mbedtls_error_add(). See that function for + * more details. + */ +#define MBEDTLS_ERROR_ADD( high, low ) \ + mbedtls_error_add( high, low, __FILE__, __LINE__ ) + + +/** + * \brief Combines a high-level and low-level error code together. + * + * This function can be called directly however it is usually + * called via the #MBEDTLS_ERROR_ADD macro. + * + * While a value of zero is not a negative error code, it is still an + * error code (that denotes success) and can be combined with both a + * negative error code or another value of zero. + * + * \note When invasive testing is enabled via #MBEDTLS_TEST_HOOKS, also try to + * call \link mbedtls_test_hook_error_add \endlink. + * + * \param high high-level error code. See error.h for more details. + * \param low low-level error code. See error.h for more details. + * \param file file where this error code addition occurred. + * \param line line where this error code addition occurred. + */ +static inline int mbedtls_error_add( int high, int low, + const char *file, int line ) +{ + (void)file; + (void)line; + + return( high + low ); +} + +/** + * \brief Translate a mbed TLS error code into a string representation, + * Result is truncated if necessary and always includes a terminating + * null byte. + * + * \param errnum error code + * \param buffer buffer to place representation in + * \param buflen length of the buffer + */ +void mbedtls_strerror( int errnum, char *buffer, size_t buflen ); + +/** + * \brief Translate the high-level part of an Mbed TLS error code into a string + * representation. + * + * This function returns a const pointer to an un-modifiable string. The caller + * must not try to modify the string. It is intended to be used mostly for + * logging purposes. + * + * \param error_code error code + * + * \return The string representation of the error code, or \c NULL if the error + * code is unknown. + */ +const char * mbedtls_high_level_strerr( int error_code ); + +/** + * \brief Translate the low-level part of an Mbed TLS error code into a string + * representation. + * + * This function returns a const pointer to an un-modifiable string. The caller + * must not try to modify the string. It is intended to be used mostly for + * logging purposes. + * + * \param error_code error code + * + * \return The string representation of the error code, or \c NULL if the error + * code is unknown. + */ +const char * mbedtls_low_level_strerr( int error_code ); + +#ifdef __cplusplus +} +#endif + +#endif /* error.h */ diff --git a/src/components/implementation/simple_nf/ndpi/gcrypt/gcm.c b/src/components/implementation/simple_nf/ndpi/gcrypt/gcm.c new file mode 100644 index 0000000000..e793465f54 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/gcrypt/gcm.c @@ -0,0 +1,671 @@ +/* + * NIST SP800-38D compliant GCM implementation + * + * Copyright The Mbed TLS Contributors + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +/* + * http://csrc.nist.gov/publications/nistpubs/800-38D/SP-800-38D.pdf + * + * See also: + * [MGV] http://csrc.nist.gov/groups/ST/toolkit/BCM/documents/proposedmodes/gcm/gcm-revised-spec.pdf + * + * We use the algorithm described as Shoup's method with 4-bit tables in + * [MGV] 4.1, pp. 12-13, to enhance speed without using too much memory. + */ + + +/* Parameter validation macros */ +#define GCM_VALIDATE_RET( cond ) \ + MBEDTLS_INTERNAL_VALIDATE_RET( cond, MBEDTLS_ERR_GCM_BAD_INPUT ) +#define GCM_VALIDATE( cond ) \ + MBEDTLS_INTERNAL_VALIDATE( cond ) + +#ifdef WIN32 +#define LBLOCKSIZE 4 +#else +#define LBLOCKSIZE __SIZEOF_LONG__ +#endif + +static void xorbytes( unsigned char *dst, const unsigned char *src, int n) { + while(n > LBLOCKSIZE) { + *(unsigned long int *)dst ^= *(const unsigned long int *)src; + dst += LBLOCKSIZE; + src += LBLOCKSIZE; + n -= LBLOCKSIZE; + } + while(n) { + *dst++ ^= *src++; + n--; + } +} + +static void xorbytes3d( unsigned char *output, unsigned char *buf, + const unsigned char *ectr, const unsigned char *input, int n) { + while(n > LBLOCKSIZE) { + *(unsigned long int *)buf ^= *(const unsigned long int *)input; + *(unsigned long int *)output = *(const unsigned long int *)input ^ *(const unsigned long int *)ectr; + buf += LBLOCKSIZE; + output += LBLOCKSIZE; + ectr += LBLOCKSIZE; + input += LBLOCKSIZE; + n -= LBLOCKSIZE; + } + while(n) { + *buf++ ^= *input; + *output++ = *input++ ^ *ectr++; + n--; + } +} + +static void xorbytes3e( unsigned char *output, unsigned char *buf, + const unsigned char *ectr, const unsigned char *input, int n) { + while(n > LBLOCKSIZE) { + unsigned long int t = *(const unsigned long int *)input ^ *(const unsigned long int *)ectr; + *(unsigned long int *)output = t; + *(unsigned long int *)buf ^= t; + buf += LBLOCKSIZE; + output += LBLOCKSIZE; + ectr += LBLOCKSIZE; + input += LBLOCKSIZE; + n -= LBLOCKSIZE; + } + while(n) { + *output++ = *input++ ^ *ectr++; + *buf++ ^= *output++; + n--; + } +} + + + +/* + * Initialize a context + */ +void mbedtls_gcm_init( mbedtls_gcm_context *ctx, void *aes_ctx ) +{ + GCM_VALIDATE( ctx != NULL ); + memset( ctx, 0, sizeof( mbedtls_gcm_context ) ); + ctx->cipher_ctx.cipher_ctx = aes_ctx; +} + +/* + * Precompute small multiples of H, that is set + * HH[i] || HL[i] = H times i, + * where i is seen as a field element as in [MGV], ie high-order bits + * correspond to low powers of P. The result is stored in the same way, that + * is the high-order bit of HH corresponds to P^0 and the low-order bit of HL + * corresponds to P^127. + */ +static int gcm_gen_table( mbedtls_gcm_context *ctx ) +{ + int ret, i, j; + uint64_t hi, lo; + uint64_t vl, vh; + unsigned char h[16]; + size_t olen = 0; + + memset( h, 0, 16 ); + if( ( ret = mbedtls_cipher_update( &ctx->cipher_ctx, h, 16, h, &olen ) ) != 0 ) + return( ret ); + + /* pack h as two 64-bits ints, big-endian */ + hi = MBEDTLS_GET_UINT32_BE( h, 0 ); + lo = MBEDTLS_GET_UINT32_BE( h, 4 ); + vh = (uint64_t) hi << 32 | lo; + + hi = MBEDTLS_GET_UINT32_BE( h, 8 ); + lo = MBEDTLS_GET_UINT32_BE( h, 12 ); + vl = (uint64_t) hi << 32 | lo; + + /* 8 = 1000 corresponds to 1 in GF(2^128) */ + ctx->HL[8] = vl; + ctx->HH[8] = vh; + +#if defined(MBEDTLS_AESNI_C) && defined(MBEDTLS_HAVE_X86_64) + /* With CLMUL support, we need only h, not the rest of the table */ + if( mbedtls_aesni_has_support( MBEDTLS_AESNI_CLMUL ) ) { + aes_aesni_has_support = 1; + return( 0 ); + } +#endif + + /* 0 corresponds to 0 in GF(2^128) */ + ctx->HH[0] = 0; + ctx->HL[0] = 0; + + for( i = 4; i > 0; i >>= 1 ) + { + uint32_t T = ( vl & 1 ) * 0xe1000000U; + vl = ( vh << 63 ) | ( vl >> 1 ); + vh = ( vh >> 1 ) ^ ( (uint64_t) T << 32); + + ctx->HL[i] = vl; + ctx->HH[i] = vh; + } + + for( i = 2; i <= 8; i *= 2 ) + { + uint64_t *HiL = ctx->HL + i, *HiH = ctx->HH + i; + vh = *HiH; + vl = *HiL; + for( j = 1; j < i; j++ ) + { + HiH[j] = vh ^ ctx->HH[j]; + HiL[j] = vl ^ ctx->HL[j]; + } + } + + return( 0 ); +} + +int mbedtls_gcm_setkey( mbedtls_gcm_context *ctx, + mbedtls_cipher_id_t cipher, + const unsigned char *key, + unsigned int keybits ) +{ + int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; + const mbedtls_cipher_info_t *cipher_info; + + GCM_VALIDATE_RET( ctx != NULL ); + GCM_VALIDATE_RET( key != NULL ); + GCM_VALIDATE_RET( keybits == 128 || keybits == 192 || keybits == 256 ); + + cipher_info = mbedtls_cipher_info_from_values( cipher, keybits, + MBEDTLS_MODE_ECB ); + if( cipher_info == NULL ) + return( MBEDTLS_ERR_GCM_BAD_INPUT ); + + if( cipher_info->block_size != 16 ) + return( MBEDTLS_ERR_GCM_BAD_INPUT ); + + if(ctx->cipher_ctx.cipher_ctx == NULL) return MBEDTLS_ERR_GCM_BAD_INPUT; + if(!cipher_info->base->ctx_zero_func) return MBEDTLS_ERR_GCM_BAD_INPUT; + (*cipher_info->base->ctx_zero_func)(ctx->cipher_ctx.cipher_ctx); + ctx->cipher_ctx.cipher_info = cipher_info; + + if( ( ret = mbedtls_cipher_setkey( &ctx->cipher_ctx, key, keybits, + MBEDTLS_ENCRYPT ) ) != 0 ) + { + return( ret ); + } + + if( ( ret = gcm_gen_table( ctx ) ) != 0 ) + return( ret ); + + return( 0 ); +} + +/* + * Shoup's method for multiplication use this table with + * last4[x] = x times P^128 + * where x and last4[x] are seen as elements of GF(2^128) as in [MGV] + */ +static const uint64_t last4[16] = +{ + 0x0000ULL << 48, 0x1c20ULL << 48, 0x3840ULL << 48, 0x2460ULL << 48, + 0x7080ULL << 48, 0x6ca0ULL << 48, 0x48c0ULL << 48, 0x54e0ULL << 48, + 0xe100ULL << 48, 0xfd20ULL << 48, 0xd940ULL << 48, 0xc560ULL << 48, + 0x9180ULL << 48, 0x8da0ULL << 48, 0xa9c0ULL << 48, 0xb5e0ULL << 48 +}; + +/* + * Sets output to x times H using the precomputed tables. + * x and output are seen as elements of GF(2^128) as in [MGV]. + */ +static void gcm_mult( mbedtls_gcm_context *ctx, const unsigned char x[16], + unsigned char output[16] ) +{ + int i = 0; + unsigned char lo, hi, rem; + uint64_t zh, zl; + +#if defined(MBEDTLS_AESNI_C) && defined(MBEDTLS_HAVE_X86_64) + if( aes_aesni_has_support) { + unsigned char h[16]; + + MBEDTLS_PUT_UINT64_BE( ctx->HH[8], h, 0 ); + MBEDTLS_PUT_UINT64_BE( ctx->HL[8], h, 8 ); + + mbedtls_aesni_gcm_mult( output, x, h ); + return; + } +#endif /* MBEDTLS_AESNI_C && MBEDTLS_HAVE_X86_64 */ + + lo = x[15] & 0xf; + + zh = ctx->HH[lo]; + zl = ctx->HL[lo]; + + for( i = 15; i >= 0; i-- ) + { + lo = x[i] & 0xf; + hi = ( x[i] >> 4 ) & 0xf; + + if( i != 15 ) + { + rem = (unsigned char) zl & 0xf; + zl = ( zh << 60 ) | ( zl >> 4 ); + zh = ( zh >> 4 ); + zh ^= (uint64_t) last4[rem]; + zh ^= ctx->HH[lo]; + zl ^= ctx->HL[lo]; + + } + + rem = (unsigned char) zl & 0xf; + zl = ( zh << 60 ) | ( zl >> 4 ); + zh = ( zh >> 4 ); + zh ^= (uint64_t) last4[rem]; + zh ^= ctx->HH[hi]; + zl ^= ctx->HL[hi]; + } + MBEDTLS_PUT_UINT64_BE( zh, output, 0 ); + MBEDTLS_PUT_UINT64_BE( zl, output, 8 ); +} + +int mbedtls_gcm_starts( mbedtls_gcm_context *ctx, + int mode, + const unsigned char *iv, size_t iv_len ) +{ + int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; + unsigned char work_buf[16]; + const unsigned char *p; + size_t use_len, olen = 0; + uint64_t iv_bits; + + GCM_VALIDATE_RET( ctx != NULL ); + GCM_VALIDATE_RET( iv != NULL ); + + /* IV is limited to 2^64 bits, so 2^61 bytes */ + /* IV is not allowed to be zero length */ + if( iv_len == 0) + return( MBEDTLS_ERR_GCM_BAD_INPUT ); +#if __SIZE_WIDTH__ == 64 + if( iv_len >= (1ULL << 32 )) + return( MBEDTLS_ERR_GCM_BAD_INPUT ); +#endif + + memset( ctx->y, 0x00, sizeof(ctx->y) ); + memset( ctx->buf, 0x00, sizeof(ctx->buf) ); + + ctx->mode = mode; + ctx->len = 0; + ctx->add_len = 0; + + if( iv_len == 12 ) + { + memcpy( ctx->y, iv, iv_len ); + ctx->y[15] = 1; + } + else + { + memset( work_buf, 0x00, 16 ); + iv_bits = (uint64_t)iv_len * 8; + MBEDTLS_PUT_UINT64_BE( iv_bits, work_buf, 8 ); + + p = iv; + while( iv_len > 0 ) + { + use_len = ( iv_len < 16 ) ? iv_len : 16; + + xorbytes(ctx->y,p,use_len); + + gcm_mult( ctx, ctx->y, ctx->y ); + + iv_len -= use_len; + p += use_len; + } + + xorbytes(ctx->y,work_buf,16); + + gcm_mult( ctx, ctx->y, ctx->y ); + } + + if( ( ret = mbedtls_cipher_update( &ctx->cipher_ctx, ctx->y, 16, + ctx->base_ectr, &olen ) ) != 0 ) + { + return( ret ); + } + + return( 0 ); +} + +/** + * mbedtls_gcm_context::buf contains the partial state of the computation of + * the authentication tag. + * mbedtls_gcm_context::add_len and mbedtls_gcm_context::len indicate + * different stages of the computation: + * * len == 0 && add_len == 0: initial state + * * len == 0 && add_len % 16 != 0: the first `add_len % 16` bytes have + * a partial block of AD that has been + * xored in but not yet multiplied in. + * * len == 0 && add_len % 16 == 0: the authentication tag is correct if + * the data ends now. + * * len % 16 != 0: the first `len % 16` bytes have + * a partial block of ciphertext that has + * been xored in but not yet multiplied in. + * * len > 0 && len % 16 == 0: the authentication tag is correct if + * the data ends now. + */ +int mbedtls_gcm_update_ad( mbedtls_gcm_context *ctx, + const unsigned char *add, size_t add_len ) +{ + const unsigned char *p; + size_t use_len, offset; + + GCM_VALIDATE_RET( add_len == 0 || add != NULL ); + + /* IV is limited to 2^64 bits, so 2^61 bytes */ + if( (uint64_t) add_len >> 61 != 0 ) + return( MBEDTLS_ERR_GCM_BAD_INPUT ); + + offset = ctx->add_len % 16; + p = add; + + if( offset != 0 ) + { + use_len = 16 - offset; + if( use_len > add_len ) + use_len = add_len; + + xorbytes(ctx->buf,p,use_len); + + if( offset + use_len == 16 ) + gcm_mult( ctx, ctx->buf, ctx->buf ); + + ctx->add_len += use_len; + add_len -= use_len; + p += use_len; + } + + ctx->add_len += add_len; + + while( add_len >= 16 ) + { + xorbytes(ctx->buf,p,16); + + gcm_mult( ctx, ctx->buf, ctx->buf ); + + add_len -= 16; + p += 16; + } + + if( add_len > 0 ) + xorbytes(ctx->buf,p,add_len); + + return( 0 ); +} + +/* Increment the counter. */ +static void gcm_incr( unsigned char y[16] ) +{ + size_t i; + for( i = 16; i > 12; i-- ) + if( ++y[i - 1] != 0 ) + break; +} + +/* Calculate and apply the encryption mask. Process use_len bytes of data, + * starting at position offset in the mask block. */ +static int gcm_mask( mbedtls_gcm_context *ctx, + unsigned char ectr[16], + size_t offset, size_t use_len, + const unsigned char *input, + unsigned char *output ) +{ + size_t olen = 0; + int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; + + if( ( ret = mbedtls_cipher_update( &ctx->cipher_ctx, ctx->y, 16, ectr, + &olen ) ) != 0 ) + { + mbedtls_platform_zeroize( ectr, 16 ); + return( ret ); + } + + if(ctx->mode == MBEDTLS_GCM_DECRYPT ) + xorbytes3d(output,&ctx->buf[offset],&ectr[offset],input,use_len); + else + xorbytes3e(output,&ctx->buf[offset],&ectr[offset],input,use_len); + + return( 0 ); +} + +int mbedtls_gcm_update( mbedtls_gcm_context *ctx, + const unsigned char *input, size_t input_length, + unsigned char *output, size_t output_size, + size_t *output_length ) +{ + int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; + const unsigned char *p = input; + unsigned char *out_p = output; + size_t offset; + unsigned char ectr[16]; + + if( output_size < input_length ) + return( MBEDTLS_ERR_GCM_BUFFER_TOO_SMALL ); + GCM_VALIDATE_RET( output_length != NULL ); + *output_length = input_length; + + /* Exit early if input_length==0 so that we don't do any pointer arithmetic + * on a potentially null pointer. + * Returning early also means that the last partial block of AD remains + * untouched for mbedtls_gcm_finish */ + if( input_length == 0 ) + return( 0 ); + + GCM_VALIDATE_RET( ctx != NULL ); + GCM_VALIDATE_RET( input != NULL ); + GCM_VALIDATE_RET( output != NULL ); + + if( output > input && (size_t) ( output - input ) < input_length ) + return( MBEDTLS_ERR_GCM_BAD_INPUT ); + + /* Total length is restricted to 2^39 - 256 bits, ie 2^36 - 2^5 bytes + * Also check for possible overflow */ + if( ctx->len + input_length < ctx->len || + (uint64_t) ctx->len + input_length > 0xFFFFFFFE0ull ) + { + return( MBEDTLS_ERR_GCM_BAD_INPUT ); + } + + if( ctx->len == 0 && ctx->add_len % 16 != 0 ) + { + gcm_mult( ctx, ctx->buf, ctx->buf ); + } + + offset = ctx->len % 16; + if( offset != 0 ) + { + size_t use_len = 16 - offset; + if( use_len > input_length ) + use_len = input_length; + + if( ( ret = gcm_mask( ctx, ectr, offset, use_len, p, out_p ) ) != 0 ) + return( ret ); + + if( offset + use_len == 16 ) + gcm_mult( ctx, ctx->buf, ctx->buf ); + + ctx->len += use_len; + input_length -= use_len; + p += use_len; + out_p += use_len; + } + + ctx->len += input_length; + + while( input_length >= 16 ) + { + gcm_incr( ctx->y ); + if( ( ret = gcm_mask( ctx, ectr, 0, 16, p, out_p ) ) != 0 ) + return( ret ); + + gcm_mult( ctx, ctx->buf, ctx->buf ); + + input_length -= 16; + p += 16; + out_p += 16; + } + + if( input_length > 0 ) + { + gcm_incr( ctx->y ); + if( ( ret = gcm_mask( ctx, ectr, 0, input_length, p, out_p ) ) != 0 ) + return( ret ); + } + + return( 0 ); +} + +int mbedtls_gcm_finish( mbedtls_gcm_context *ctx, + unsigned char *output, size_t output_size, + size_t *output_length, + unsigned char *tag, size_t tag_len ) +{ + unsigned char work_buf[16]; + uint64_t orig_len; + uint64_t orig_add_len; + + GCM_VALIDATE_RET( ctx != NULL ); + GCM_VALIDATE_RET( tag != NULL ); + + /* We never pass any output in finish(). The output parameter exists only + * for the sake of alternative implementations. */ + (void) output; + (void) output_size; + *output_length = 0; + + orig_len = ctx->len * 8; + orig_add_len = ctx->add_len * 8; + + if( ctx->len == 0 && ctx->add_len % 16 != 0 ) + { + gcm_mult( ctx, ctx->buf, ctx->buf ); + } + + if( tag_len > 16 || tag_len < 4 ) + return( MBEDTLS_ERR_GCM_BAD_INPUT ); + + if( ctx->len % 16 != 0 ) + gcm_mult( ctx, ctx->buf, ctx->buf ); + + memcpy( tag, ctx->base_ectr, tag_len ); + + if( orig_len || orig_add_len ) + { + MBEDTLS_PUT_UINT64_BE( ( orig_add_len ), work_buf, 0 ); + MBEDTLS_PUT_UINT64_BE( ( orig_len ), work_buf, 8 ); + + xorbytes(ctx->buf,work_buf,16); + + gcm_mult( ctx, ctx->buf, ctx->buf ); + + xorbytes(tag,ctx->buf,tag_len); + } + + return( 0 ); +} + +int mbedtls_gcm_crypt_and_tag( mbedtls_gcm_context *ctx, + int mode, + size_t length, + const unsigned char *iv, + size_t iv_len, + const unsigned char *add, + size_t add_len, + const unsigned char *input, + unsigned char *output, + size_t tag_len, + unsigned char *tag ) +{ + int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; + size_t olen; + + GCM_VALIDATE_RET( ctx != NULL ); + GCM_VALIDATE_RET( iv != NULL ); + GCM_VALIDATE_RET( add_len == 0 || add != NULL ); + GCM_VALIDATE_RET( length == 0 || input != NULL ); + GCM_VALIDATE_RET( length == 0 || output != NULL ); + GCM_VALIDATE_RET( tag != NULL ); + + if( ( ret = mbedtls_gcm_starts( ctx, mode, iv, iv_len ) ) != 0 ) + return( ret ); + + if( ( ret = mbedtls_gcm_update_ad( ctx, add, add_len ) ) != 0 ) + return( ret ); + + if( ( ret = mbedtls_gcm_update( ctx, input, length, + output, length, &olen ) ) != 0 ) + return( ret ); + + if( ( ret = mbedtls_gcm_finish( ctx, NULL, 0, &olen, tag, tag_len ) ) != 0 ) + return( ret ); + + return( 0 ); +} + +int mbedtls_gcm_auth_decrypt( mbedtls_gcm_context *ctx, + size_t length, + const unsigned char *iv, + size_t iv_len, + const unsigned char *add, + size_t add_len, + const unsigned char *tag, + size_t tag_len, + const unsigned char *input, + unsigned char *output ) +{ + int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; + unsigned char check_tag[16]; + size_t i; + int diff; + + GCM_VALIDATE_RET( ctx != NULL ); + GCM_VALIDATE_RET( iv != NULL ); + GCM_VALIDATE_RET( add_len == 0 || add != NULL ); + GCM_VALIDATE_RET( tag != NULL ); + GCM_VALIDATE_RET( length == 0 || input != NULL ); + GCM_VALIDATE_RET( length == 0 || output != NULL ); + + if( ( ret = mbedtls_gcm_crypt_and_tag( ctx, MBEDTLS_GCM_DECRYPT, length, + iv, iv_len, add, add_len, + input, output, tag_len, check_tag ) ) != 0 ) + { + return( ret ); + } + + /* Check tag in "constant-time" */ + for( diff = 0, i = 0; i < tag_len; i++ ) + diff |= tag[i] ^ check_tag[i]; + + if( diff != 0 ) + { + mbedtls_platform_zeroize( output, length ); + return( MBEDTLS_ERR_GCM_AUTH_FAILED ); + } + + return( 0 ); +} + +void mbedtls_gcm_free( mbedtls_gcm_context *ctx ) +{ + if( ctx == NULL ) + return; + // mbedtls_cipher_free( &ctx->cipher_ctx ); +} + diff --git a/src/components/implementation/simple_nf/ndpi/gcrypt/gcm.h b/src/components/implementation/simple_nf/ndpi/gcrypt/gcm.h new file mode 100644 index 0000000000..19f07111be --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/gcrypt/gcm.h @@ -0,0 +1,364 @@ +/** + * \file gcm.h + * + * \brief This file contains GCM definitions and functions. + * + * The Galois/Counter Mode (GCM) for 128-bit block ciphers is defined + * in D. McGrew, J. Viega, The Galois/Counter Mode of Operation + * (GCM), Natl. Inst. Stand. Technol. + * + * For more information on GCM, see NIST SP 800-38D: Recommendation for + * Block Cipher Modes of Operation: Galois/Counter Mode (GCM) and GMAC. + * + */ +/* + * Copyright The Mbed TLS Contributors + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef MBEDTLS_GCM_H +#define MBEDTLS_GCM_H + + + + +#define MBEDTLS_GCM_ENCRYPT 1 +#define MBEDTLS_GCM_DECRYPT 0 + +/** Authenticated decryption failed. */ +#define MBEDTLS_ERR_GCM_AUTH_FAILED -0x0012 +/** Bad input parameters to function. */ +#define MBEDTLS_ERR_GCM_BAD_INPUT -0x0014 +/** An output buffer is too small. */ +#define MBEDTLS_ERR_GCM_BUFFER_TOO_SMALL -0x0016 + +#ifdef __cplusplus +extern "C" { +#endif + + +/** + * \brief The GCM context structure. + */ +typedef struct mbedtls_gcm_context +{ + mbedtls_cipher_context_t cipher_ctx; /*!< The cipher context used. */ + uint64_t HL[16]; /*!< Precalculated HTable low. */ + uint64_t HH[16]; /*!< Precalculated HTable high. */ + uint64_t len; /*!< The total length of the encrypted data. */ + uint64_t add_len; /*!< The total length of the additional data. */ + unsigned char base_ectr[16]; /*!< The first ECTR for tag. */ + unsigned char y[16]; /*!< The Y working value. */ + unsigned char buf[16]; /*!< The buf working value. */ + int mode; /*!< The operation to perform: + #MBEDTLS_GCM_ENCRYPT or + #MBEDTLS_GCM_DECRYPT. */ +} +mbedtls_gcm_context; + + +/** + * \brief This function initializes the specified GCM context, + * to make references valid, and prepares the context + * for mbedtls_gcm_setkey() or mbedtls_gcm_free(). + * + * The function does not bind the GCM context to a particular + * cipher, nor set the key. For this purpose, use + * mbedtls_gcm_setkey(). + * + * \param ctx The GCM context to initialize. This must not be \c NULL. + */ +void mbedtls_gcm_init( mbedtls_gcm_context *ctx, void *aes_ctx ); + +/** + * \brief This function associates a GCM context with a + * cipher algorithm and a key. + * + * \param ctx The GCM context. This must be initialized. + * \param cipher The 128-bit block cipher to use. + * \param key The encryption key. This must be a readable buffer of at + * least \p keybits bits. + * \param keybits The key size in bits. Valid options are: + *
  • 128 bits
    • + *
  • 192 bits
    • + *
  • 256 bits
+ * + * \return \c 0 on success. + * \return A cipher-specific error code on failure. + */ +int mbedtls_gcm_setkey( mbedtls_gcm_context *ctx, + mbedtls_cipher_id_t cipher, + const unsigned char *key, + unsigned int keybits ); + +/** + * \brief This function performs GCM encryption or decryption of a buffer. + * + * \note For encryption, the output buffer can be the same as the + * input buffer. For decryption, the output buffer cannot be + * the same as input buffer. If the buffers overlap, the output + * buffer must trail at least 8 Bytes behind the input buffer. + * + * \warning When this function performs a decryption, it outputs the + * authentication tag and does not verify that the data is + * authentic. You should use this function to perform encryption + * only. For decryption, use mbedtls_gcm_auth_decrypt() instead. + * + * \param ctx The GCM context to use for encryption or decryption. This + * must be initialized. + * \param mode The operation to perform: + * - #MBEDTLS_GCM_ENCRYPT to perform authenticated encryption. + * The ciphertext is written to \p output and the + * authentication tag is written to \p tag. + * - #MBEDTLS_GCM_DECRYPT to perform decryption. + * The plaintext is written to \p output and the + * authentication tag is written to \p tag. + * Note that this mode is not recommended, because it does + * not verify the authenticity of the data. For this reason, + * you should use mbedtls_gcm_auth_decrypt() instead of + * calling this function in decryption mode. + * \param length The length of the input data, which is equal to the length + * of the output data. + * \param iv The initialization vector. This must be a readable buffer of + * at least \p iv_len Bytes. + * \param iv_len The length of the IV. + * \param add The buffer holding the additional data. This must be of at + * least that size in Bytes. + * \param add_len The length of the additional data. + * \param input The buffer holding the input data. If \p length is greater + * than zero, this must be a readable buffer of at least that + * size in Bytes. + * \param output The buffer for holding the output data. If \p length is greater + * than zero, this must be a writable buffer of at least that + * size in Bytes. + * \param tag_len The length of the tag to generate. + * \param tag The buffer for holding the tag. This must be a writable + * buffer of at least \p tag_len Bytes. + * + * \return \c 0 if the encryption or decryption was performed + * successfully. Note that in #MBEDTLS_GCM_DECRYPT mode, + * this does not indicate that the data is authentic. + * \return #MBEDTLS_ERR_GCM_BAD_INPUT if the lengths or pointers are + * not valid or a cipher-specific error code if the encryption + * or decryption failed. + */ +int mbedtls_gcm_crypt_and_tag( mbedtls_gcm_context *ctx, + int mode, + size_t length, + const unsigned char *iv, + size_t iv_len, + const unsigned char *add, + size_t add_len, + const unsigned char *input, + unsigned char *output, + size_t tag_len, + unsigned char *tag ); + +/** + * \brief This function performs a GCM authenticated decryption of a + * buffer. + * + * \note For decryption, the output buffer cannot be the same as + * input buffer. If the buffers overlap, the output buffer + * must trail at least 8 Bytes behind the input buffer. + * + * \param ctx The GCM context. This must be initialized. + * \param length The length of the ciphertext to decrypt, which is also + * the length of the decrypted plaintext. + * \param iv The initialization vector. This must be a readable buffer + * of at least \p iv_len Bytes. + * \param iv_len The length of the IV. + * \param add The buffer holding the additional data. This must be of at + * least that size in Bytes. + * \param add_len The length of the additional data. + * \param tag The buffer holding the tag to verify. This must be a + * readable buffer of at least \p tag_len Bytes. + * \param tag_len The length of the tag to verify. + * \param input The buffer holding the ciphertext. If \p length is greater + * than zero, this must be a readable buffer of at least that + * size. + * \param output The buffer for holding the decrypted plaintext. If \p length + * is greater than zero, this must be a writable buffer of at + * least that size. + * + * \return \c 0 if successful and authenticated. + * \return #MBEDTLS_ERR_GCM_AUTH_FAILED if the tag does not match. + * \return #MBEDTLS_ERR_GCM_BAD_INPUT if the lengths or pointers are + * not valid or a cipher-specific error code if the decryption + * failed. + */ +int mbedtls_gcm_auth_decrypt( mbedtls_gcm_context *ctx, + size_t length, + const unsigned char *iv, + size_t iv_len, + const unsigned char *add, + size_t add_len, + const unsigned char *tag, + size_t tag_len, + const unsigned char *input, + unsigned char *output ); + +/** + * \brief This function starts a GCM encryption or decryption + * operation. + * + * \param ctx The GCM context. This must be initialized. + * \param mode The operation to perform: #MBEDTLS_GCM_ENCRYPT or + * #MBEDTLS_GCM_DECRYPT. + * \param iv The initialization vector. This must be a readable buffer of + * at least \p iv_len Bytes. + * \param iv_len The length of the IV. + * + * \return \c 0 on success. + */ +int mbedtls_gcm_starts( mbedtls_gcm_context *ctx, + int mode, + const unsigned char *iv, + size_t iv_len ); + +/** + * \brief This function feeds an input buffer as associated data + * (authenticated but not encrypted data) in a GCM + * encryption or decryption operation. + * + * Call this function after mbedtls_gcm_starts() to pass + * the associated data. If the associated data is empty, + * you do not need to call this function. You may not + * call this function after calling mbedtls_cipher_update(). + * + * \param ctx The GCM context. This must have been started with + * mbedtls_gcm_starts() and must not have yet received + * any input with mbedtls_gcm_update(). + * \param add The buffer holding the additional data, or \c NULL + * if \p add_len is \c 0. + * \param add_len The length of the additional data. If \c 0, + * \p add may be \c NULL. + * + * \return \c 0 on success. + */ +int mbedtls_gcm_update_ad( mbedtls_gcm_context *ctx, + const unsigned char *add, + size_t add_len ); + +/** + * \brief This function feeds an input buffer into an ongoing GCM + * encryption or decryption operation. + * + * You may call this function zero, one or more times + * to pass successive parts of the input: the plaintext to + * encrypt, or the ciphertext (not including the tag) to + * decrypt. After the last part of the input, call + * mbedtls_gcm_finish(). + * + * This function may produce output in one of the following + * ways: + * - Immediate output: the output length is always equal + * to the input length. + * - Buffered output: the output consists of a whole number + * of 16-byte blocks. If the total input length so far + * (not including associated data) is 16 \* *B* + *A* + * with *A* < 16 then the total output length is 16 \* *B*. + * + * In particular: + * - It is always correct to call this function with + * \p output_size >= \p input_length + 15. + * - If \p input_length is a multiple of 16 for all the calls + * to this function during an operation, then it is + * correct to use \p output_size = \p input_length. + * + * \note For decryption, the output buffer cannot be the same as + * input buffer. If the buffers overlap, the output buffer + * must trail at least 8 Bytes behind the input buffer. + * + * \param ctx The GCM context. This must be initialized. + * \param input The buffer holding the input data. If \p input_length + * is greater than zero, this must be a readable buffer + * of at least \p input_length bytes. + * \param input_length The length of the input data in bytes. + * \param output The buffer for the output data. If \p output_size + * is greater than zero, this must be a writable buffer of + * of at least \p output_size bytes. + * \param output_size The size of the output buffer in bytes. + * See the function description regarding the output size. + * \param output_length On success, \p *output_length contains the actual + * length of the output written in \p output. + * On failure, the content of \p *output_length is + * unspecified. + * + * \return \c 0 on success. + * \return #MBEDTLS_ERR_GCM_BAD_INPUT on failure: + * total input length too long, + * unsupported input/output buffer overlap detected, + * or \p output_size too small. + */ +int mbedtls_gcm_update( mbedtls_gcm_context *ctx, + const unsigned char *input, size_t input_length, + unsigned char *output, size_t output_size, + size_t *output_length ); + +/** + * \brief This function finishes the GCM operation and generates + * the authentication tag. + * + * It wraps up the GCM stream, and generates the + * tag. The tag can have a maximum length of 16 Bytes. + * + * \param ctx The GCM context. This must be initialized. + * \param tag The buffer for holding the tag. This must be a writable + * buffer of at least \p tag_len Bytes. + * \param tag_len The length of the tag to generate. This must be at least + * four. + * \param output The buffer for the final output. + * If \p output_size is nonzero, this must be a writable + * buffer of at least \p output_size bytes. + * \param output_size The size of the \p output buffer in bytes. + * This must be large enough for the output that + * mbedtls_gcm_update() has not produced. In particular: + * - If mbedtls_gcm_update() produces immediate output, + * or if the total input size is a multiple of \c 16, + * then mbedtls_gcm_finish() never produces any output, + * so \p output_size can be \c 0. + * - \p output_size never needs to be more than \c 15. + * \param output_length On success, \p *output_length contains the actual + * length of the output written in \p output. + * On failure, the content of \p *output_length is + * unspecified. + * + * \return \c 0 on success. + * \return #MBEDTLS_ERR_GCM_BAD_INPUT on failure: + * invalid value of \p tag_len, + * or \p output_size too small. + */ +int mbedtls_gcm_finish( mbedtls_gcm_context *ctx, + unsigned char *output, size_t output_size, + size_t *output_length, + unsigned char *tag, size_t tag_len ); + +/** + * \brief This function clears a GCM context and the underlying + * cipher sub-context. + * + * \param ctx The GCM context to clear. If this is \c NULL, the call has + * no effect. Otherwise, this must be initialized. + */ +void mbedtls_gcm_free( mbedtls_gcm_context *ctx ); + + +#ifdef __cplusplus +} +#endif + + +#endif /* gcm.h */ diff --git a/src/components/implementation/simple_nf/ndpi/gcrypt_light.c b/src/components/implementation/simple_nf/ndpi/gcrypt_light.c new file mode 100644 index 0000000000..10cb7cd39d --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/gcrypt_light.c @@ -0,0 +1,375 @@ + +#include +#if !defined(WIN32) && !defined(_MSC_VER) +#include +#endif +#include +#include + +#include "ndpi_api.h" + +#if defined(__GNUC__) && \ + ( defined(__amd64__) || defined(__x86_64__) ) && \ + ! defined(MBEDTLS_HAVE_X86_64) +#define MBEDTLS_HAVE_X86_64 +#define MBEDTLS_AESNI_C +#endif + +/****************************/ +#define MBEDTLS_GCM_C +#define MBEDTLS_CIPHER_C +#define MBEDTLS_AES_C +/****************************/ + +#define mbedtls_calloc ndpi_calloc +#define mbedtls_free ndpi_free + +#include "gcrypt_light.h" + +#define MBEDTLS_CHECK_RETURN_TYPICAL +#define MBEDTLS_INTERNAL_VALIDATE_RET( cond, ret ) do { } while( 0 ) +#define MBEDTLS_INTERNAL_VALIDATE( cond ) do { } while( 0 ) + +#define mbedtls_platform_zeroize(a,b) memset(a,0,b) +#define mbedtls_ct_memcmp(s1,s2,n) memcmp(s1,s2,n) + +#include "gcrypt/common.h" +#include "gcrypt/error.h" +#include "gcrypt/aes.h" +#if defined(MBEDTLS_AESNI_C) +#include "gcrypt/aesni.h" +#endif +#include "gcrypt/cipher.h" +#include "gcrypt/gcm.h" +#include "gcrypt/digest.h" +#include "gcrypt/cipher_wrap.h" + + +#include "gcrypt/aes.c" +#if defined(MBEDTLS_AESNI_C) && defined(MBEDTLS_HAVE_X86_64) +#include "gcrypt/aesni.c" +#endif + +#include "gcrypt/gcm.c" + +#include "gcrypt/cipher.c" +#include "gcrypt/cipher_wrap.c" +#include "gcrypt/digest.c" + +#define MBEDTLS_ERR_MD_ALLOC_FAILED 0x50f0 +#define MBEDTLS_ERR_MD_NOT_SUPPORT 0x50f1 +#define MBEDTLS_ERR_MD_REKEY 0x50f2 +#define MBEDTLS_ERR_MD_DATA_TOO_BIG 0x50f3 +#define MBEDTLS_ERR_CIPHER_BAD_KEY 0x50f4 +#define MBEDTLS_ERR_GCM_ALLOC_FAILED 0x50f5 +#define MBEDTLS_ERR_GCM_NOT_SUPPORT 0x50f6 +#define MBEDTLS_ERR_GCM_MISSING_KEY 0x50f7 +#define MBEDTLS_ERR_AES_MISSING_KEY 0x50f8 +#define MBEDTLS_ERR_NOT_SUPPORT 0x50f9 + +const char *gcry_errstr(gcry_error_t err) { + switch(err) { + case MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED: return "Corruption detected"; + case MBEDTLS_ERR_MD_ALLOC_FAILED: return "MD:Alloc failed"; + case MBEDTLS_ERR_MD_NOT_SUPPORT: return "MD:Not supported"; + case MBEDTLS_ERR_MD_REKEY: return "MD:Key already set"; + case MBEDTLS_ERR_MD_DATA_TOO_BIG: return "MD:Data is too long"; + case MBEDTLS_ERR_AES_BAD_INPUT_DATA: return "AES:Bad input data"; + case MBEDTLS_ERR_AES_MISSING_KEY: return "AES:No key"; + case MBEDTLS_ERR_AES_INVALID_KEY_LENGTH: return "AES:Invalid key length"; + case MBEDTLS_ERR_AES_INVALID_INPUT_LENGTH: return "AES:Invalid input length"; + case MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA: return "CIPHER:Bad input data"; + case MBEDTLS_ERR_CIPHER_ALLOC_FAILED: return "CIPHER:Alloc failed"; + case MBEDTLS_ERR_CIPHER_BAD_KEY: return "CIPHER:Wrong key/iv"; + case MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE: return "CIPHER:Feature unavailable"; + case MBEDTLS_ERR_CIPHER_INVALID_CONTEXT: return "CIPHER:Invalid context"; + case MBEDTLS_ERR_CIPHER_FULL_BLOCK_EXPECTED: return "CIPHER:Full block expected"; + case MBEDTLS_ERR_CIPHER_AUTH_FAILED: return "CIPHER:Auth failed"; + case MBEDTLS_ERR_GCM_AUTH_FAILED: return "GCM:Auth failed"; + case MBEDTLS_ERR_GCM_BAD_INPUT: return "GCM:Bad input"; + case MBEDTLS_ERR_GCM_BUFFER_TOO_SMALL: return "GCM:Buffer too small"; + case MBEDTLS_ERR_GCM_ALLOC_FAILED: return "GCM:Alloc failed"; + case MBEDTLS_ERR_GCM_NOT_SUPPORT: return "GCM:Not supported"; + case MBEDTLS_ERR_GCM_MISSING_KEY: return "GCM:No key/siv/auth"; + case MBEDTLS_ERR_NOT_SUPPORT: return "Not supported"; + } + return "Unknown error code"; +} + +char *gpg_strerror_r(gcry_error_t err,char *buf, size_t buflen) { + const char *err_txt = gcry_errstr(err); + strncpy(buf,err_txt,buflen-1); + return buf; +} + +int gcry_control (int ctl,int val) { + if(ctl == GCRYCTL_INITIALIZATION_FINISHED || + (ctl == 1 && val == 0) /* GCRYCTL_INITIALIZATION_FINISHED_P */) + return GPG_ERR_NO_ERROR; + return MBEDTLS_ERR_NOT_SUPPORT; +} + +const char *gcry_check_version(void *unused) { + return "1.8.6internal"; +} + +gcry_error_t gcry_md_open(gcry_md_hd_t *h,int algo,int flags) { + gcry_md_hd_t ctx; + if(!(algo == GCRY_MD_SHA256 && flags == GCRY_MD_FLAG_HMAC)) return MBEDTLS_ERR_MD_NOT_SUPPORT; + ctx = ndpi_calloc(1,sizeof(struct gcry_md_hd)); + if(!ctx) return MBEDTLS_ERR_MD_ALLOC_FAILED; + *h = ctx; + return GPG_ERR_NO_ERROR; +} + +void gcry_md_close(gcry_md_hd_t h) { + if(h) ndpi_free(h); +} + +void gcry_md_reset(gcry_md_hd_t h) { + memset((char *)h, 0, sizeof(*h)); +} + +gcry_error_t gcry_md_setkey(gcry_md_hd_t h,const uint8_t *key,size_t key_len) { + if(h->key_len) return MBEDTLS_ERR_MD_REKEY; + h->key_len = key_len <= sizeof(h->key) ? key_len : sizeof(h->key); + memcpy(h->key,key,h->key_len); + return GPG_ERR_NO_ERROR; +} + +gcry_error_t gcry_md_write(gcry_md_hd_t h,const uint8_t *data,size_t data_len) { + if(h->data_len + data_len > GCRY_MD_BUFF_SIZE) return MBEDTLS_ERR_MD_DATA_TOO_BIG; + memcpy(&h->data_buf[h->data_len],data,data_len); + h->data_len += data_len; + return GPG_ERR_NO_ERROR; +} + +size_t gcry_md_get_algo_dlen(int algo) { + return algo == GCRY_MD_SHA256 ? HMAC_SHA256_DIGEST_SIZE:0; +} + +int gcry_md_get_algo(gcry_md_hd_t h) { + return GCRY_MD_SHA256; +} + +uint8_t *gcry_md_read(gcry_md_hd_t h, int flag) { + hmac_sha256(h->out,h->data_buf,h->data_len,h->key,h->key_len); + return h->out; +} + +/**********************************************************/ + +static int check_valid_algo_mode(gcry_cipher_hd_t h) { + if(!h) return 1; + if(h->algo == GCRY_CIPHER_AES128 && + (h->mode == GCRY_CIPHER_MODE_ECB || h->mode == GCRY_CIPHER_MODE_GCM)) return 0; + return 1; +} + +#define ROUND_SIZE8(a) (((a)+7UL) & ~7UL) + +gcry_error_t gcry_cipher_open (gcry_cipher_hd_t *handle, + int algo, int mode, unsigned int flags) { + +struct gcry_cipher_hd *r = 0; +size_t s_len = ROUND_SIZE8(sizeof(struct gcry_cipher_hd));; + + if(flags || algo != GCRY_CIPHER_AES128 || !( mode == GCRY_CIPHER_MODE_ECB || mode == GCRY_CIPHER_MODE_GCM)) return MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE; + + switch(mode) { + case GCRY_CIPHER_MODE_ECB: + r = ndpi_calloc(1,s_len + sizeof(mbedtls_aes_context)); + if(!r) return MBEDTLS_ERR_CIPHER_ALLOC_FAILED; + r->ctx.ecb = (mbedtls_aes_context *)(r+1); + mbedtls_aes_init(r->ctx.ecb); + break; + case GCRY_CIPHER_MODE_GCM: + { + size_t aes_ctx_size = ROUND_SIZE8(sizeof( mbedtls_aes_context )); + size_t gcm_ctx_size = ROUND_SIZE8(sizeof( mbedtls_gcm_context )); + + r = ndpi_calloc(1,s_len + gcm_ctx_size + aes_ctx_size); + if(!r) return MBEDTLS_ERR_CIPHER_ALLOC_FAILED; + r->ctx.gcm = (mbedtls_gcm_context *)(r+1); + mbedtls_gcm_init(r->ctx.gcm,(void *)(((char *)(r+1)) + gcm_ctx_size)); + } + break; + default: + return MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE; + } + r->algo = algo; + r->mode = mode; + *handle = r; + return GPG_ERR_NO_ERROR; +} + +void gcry_cipher_close (gcry_cipher_hd_t h) { + if(h && !check_valid_algo_mode(h)) { + switch(h->mode) { + case GCRY_CIPHER_MODE_ECB: + mbedtls_aes_free(h->ctx.ecb); + break; + case GCRY_CIPHER_MODE_GCM: + mbedtls_gcm_free(h->ctx.gcm); + break; + } + ndpi_free(h); + } +} + +gcry_error_t gcry_cipher_ctl (gcry_cipher_hd_t h, int cmd, void *data, size_t len) { + return MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE; +} + +gcry_error_t gcry_cipher_reset (gcry_cipher_hd_t h) { + + gcry_error_t err = MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE; + if(check_valid_algo_mode(h)) return err; + h->authlen = 0; h->taglen = 0; h->ivlen = 0; + h->s_auth = 0; h->s_iv = 0; h->s_crypt_ok = 0; + memset((char *)h->iv,0,sizeof(h->iv)); + memset((char *)h->auth,0,sizeof(h->auth)); + memset((char *)h->tag,0,sizeof(h->tag)); + switch(h->mode) { + case GCRY_CIPHER_MODE_ECB: + break; + case GCRY_CIPHER_MODE_GCM: + mbedtls_cipher_reset(&h->ctx.gcm->cipher_ctx); + break; + default: + return err; + } + return 0; +} + + +gcry_error_t gcry_cipher_setkey (gcry_cipher_hd_t h, const void *key, size_t keylen) { + gcry_error_t r = MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA; + if(check_valid_algo_mode(h)) return MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE; + if( h->s_key ) return MBEDTLS_ERR_CIPHER_BAD_KEY; + if( keylen != gcry_cipher_get_algo_keylen(h->algo)) return MBEDTLS_ERR_CIPHER_BAD_KEY; + switch(h->mode) { + case GCRY_CIPHER_MODE_ECB: + r = mbedtls_aes_setkey_enc( h->ctx.ecb, key, keylen*8 ); + break; + case GCRY_CIPHER_MODE_GCM: + r = mbedtls_gcm_setkey( h->ctx.gcm, MBEDTLS_CIPHER_ID_AES, key, keylen*8 ); + break; + } + if(!r) { + h->s_key = 1; + h->keylen = keylen; + } + return r; +} + +gcry_error_t gcry_cipher_setiv (gcry_cipher_hd_t h, const void *iv, size_t ivlen) { + if(check_valid_algo_mode(h)) return MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE; + if(h->s_iv) return MBEDTLS_ERR_CIPHER_BAD_KEY; + switch(h->mode) { + case GCRY_CIPHER_MODE_GCM: + if(ivlen != 12) return MBEDTLS_ERR_CIPHER_BAD_KEY; + h->s_iv = 1; + h->ivlen = ivlen; + memcpy( h->iv, iv, ivlen ); + return 0; + } + return MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE; +} + +gcry_error_t gcry_cipher_authenticate (gcry_cipher_hd_t h, const void *abuf, size_t abuflen) { + if(check_valid_algo_mode(h)) return MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE; + if(h->s_auth) return MBEDTLS_ERR_CIPHER_BAD_KEY; + switch(h->mode) { + case GCRY_CIPHER_MODE_GCM: + if(abuflen > sizeof(h->auth)) return MBEDTLS_ERR_CIPHER_BAD_KEY; + h->s_auth = 1; + h->authlen = abuflen; + memcpy(h->auth,abuf,abuflen); + return 0; + } + return MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE; +} + +gcry_error_t gcry_cipher_checktag (gcry_cipher_hd_t h, const void *intag, size_t taglen) { + if(check_valid_algo_mode(h)) return MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE; + switch(h->mode) { + case GCRY_CIPHER_MODE_GCM: + if(h->s_crypt_ok && h->taglen == taglen) { + size_t i; + int diff; + const uint8_t *ctag = intag; + for( diff = 0, i = 0; i < taglen; i++ ) + diff |= ctag[i] ^ h->tag[i]; + if(!diff) return 0; + } + return MBEDTLS_ERR_GCM_AUTH_FAILED; + } + return MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE; +} + +size_t gcry_cipher_get_algo_keylen (int algo) { + switch(algo) { + case GCRY_CIPHER_AES128: return 16; + default: return 0; + } + return 0; +} + +static gcry_error_t _gcry_cipher_crypt (gcry_cipher_hd_t h, + void *out, size_t outsize, + const void *in, size_t inlen,int encrypt) { + uint8_t *src = NULL; + size_t srclen = 0; + gcry_error_t rv = MBEDTLS_ERR_GCM_BAD_INPUT; + + if(check_valid_algo_mode(h)) return MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE; + if(!inlen && !outsize) return MBEDTLS_ERR_GCM_BAD_INPUT; + if(!in && !inlen) { + src = ndpi_malloc(outsize); + if(!src) return MBEDTLS_ERR_GCM_ALLOC_FAILED; + srclen = outsize; + memcpy(src,out,outsize); + } else { + if(inlen != outsize) return MBEDTLS_ERR_GCM_BAD_INPUT; + } + switch(h->mode) { + case GCRY_CIPHER_MODE_ECB: + if(!encrypt) return MBEDTLS_ERR_GCM_NOT_SUPPORT; + if(!( h->s_key && !h->s_crypt_ok)) return MBEDTLS_ERR_AES_MISSING_KEY; + rv = mbedtls_aes_crypt_ecb(h->ctx.ecb, MBEDTLS_AES_ENCRYPT, + src ? src:in, out); + break; + case GCRY_CIPHER_MODE_GCM: + if(encrypt) return MBEDTLS_ERR_GCM_NOT_SUPPORT; + if(!( h->s_key && h->s_auth && h->s_iv && !h->s_crypt_ok)) return MBEDTLS_ERR_GCM_MISSING_KEY; + h->taglen = 16; + rv = mbedtls_gcm_crypt_and_tag(h->ctx.gcm, + MBEDTLS_GCM_DECRYPT, + src ? srclen:outsize, + h->iv,h->ivlen, + h->auth,h->authlen, + src ? src:in,out, + h->taglen, h->tag); + break; + } + if(!rv) h->s_crypt_ok = 1; + + if(src) ndpi_free(src); + return rv; +} + + +gcry_error_t gcry_cipher_encrypt (gcry_cipher_hd_t h, + void *out, size_t outsize, + const void *in, size_t inlen) { + return _gcry_cipher_crypt(h,out,outsize,in,inlen,1); +} + +gcry_error_t gcry_cipher_decrypt (gcry_cipher_hd_t h, + void *out, size_t outsize, + const void *in, size_t inlen) { + return _gcry_cipher_crypt(h,out,outsize,in,inlen,0); +} + +/* vim: set ts=4 sw=4 et: */ diff --git a/src/components/implementation/simple_nf/ndpi/gcrypt_light.h b/src/components/implementation/simple_nf/ndpi/gcrypt_light.h new file mode 100644 index 0000000000..6d6a115ee6 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/gcrypt_light.h @@ -0,0 +1,87 @@ + +#ifndef GCRY_LIGHT_H +#define GCRY_LIGHT_H + +#define HMAC_SHA256_DIGEST_SIZE 32 /* Same as SHA-256's output size. */ +#define SHA256_DIGEST_SIZE 32 +#define GCRY_MD_BUFF_SIZE 256 + +#define GCRY_CIPHER_AES128 7 +#define GCRY_CIPHER_AES256 8 +#define GCRY_CIPHER_MODE_ECB 1 +#define GCRY_CIPHER_MODE_GCM 8 + +#define GCRY_MD_SHA256 8 +#define GCRY_MD_FLAG_HMAC 2 +#define GPG_ERR_NO_ERROR 0 +#define GPG_ERR_KEY -1 +#define GPG_ERR_ANY -2 +#define GPG_ERR_INV_ARG -3 +#define GCRYCTL_INITIALIZATION_FINISHED_P 1,0 +#define GCRYCTL_INITIALIZATION_FINISHED 2 +#define GCRYCTL_RESET 3 + +#define GCRY_AES_KEY_SIZE 32 +#define GCRY_AES_AUTH_SIZE 256 +#define GCRY_AES_TAG_SIZE 32 +#define GCRY_AES_IV_SIZE 12 + +typedef int gcry_error_t; +typedef gcry_error_t gpg_error_t; + +struct gcry_md_hd { + uint8_t key[64],out[HMAC_SHA256_DIGEST_SIZE]; + uint8_t data_buf[GCRY_MD_BUFF_SIZE]; + uint32_t key_len; + uint32_t data_len; +}; +typedef struct gcry_md_hd * gcry_md_hd_t; + +struct gcry_cipher_hd { + int algo,mode; + size_t keylen,authlen,taglen,ivlen; + uint8_t s_key:1,s_auth:1,s_iv:1,s_crypt_ok:1; + uint8_t auth[GCRY_AES_AUTH_SIZE]; + uint8_t tag[GCRY_AES_TAG_SIZE]; + uint8_t iv[GCRY_AES_IV_SIZE]; + union { + struct mbedtls_aes_context *ecb; + struct mbedtls_gcm_context *gcm; + } ctx; +}; + +typedef struct gcry_cipher_hd * gcry_cipher_hd_t; + +int gcry_control (int, int); +const char *gcry_check_version(void *); +char *gpg_strerror_r(gcry_error_t, char *, size_t); + +gcry_error_t gcry_md_open (gcry_md_hd_t *h, int algo, int flags); +void gcry_md_close (gcry_md_hd_t h); +void gcry_md_reset (gcry_md_hd_t h); + +gcry_error_t gcry_md_setkey (gcry_md_hd_t h, const uint8_t *key, size_t key_len); +gcry_error_t gcry_md_write (gcry_md_hd_t h, const uint8_t *data, size_t data_len); +uint8_t *gcry_md_read (gcry_md_hd_t h, int flag); + +size_t gcry_md_get_algo_dlen (int algo); +int gcry_md_get_algo (gcry_md_hd_t h); + +gcry_error_t gcry_cipher_open (gcry_cipher_hd_t *handle, int algo, int mode, unsigned int flags); +void gcry_cipher_close (gcry_cipher_hd_t h); +gcry_error_t gcry_cipher_ctl (gcry_cipher_hd_t h, int cmd, void *data, size_t len); +gcry_error_t gcry_cipher_reset (gcry_cipher_hd_t h); +gcry_error_t gcry_cipher_setiv (gcry_cipher_hd_t h, const void *iv, size_t ivlen); +gcry_error_t gcry_cipher_setkey (gcry_cipher_hd_t h, const void *key, size_t keylen); +gcry_error_t gcry_cipher_checktag (gcry_cipher_hd_t h, const void *intag, size_t taglen); +gcry_error_t gcry_cipher_authenticate (gcry_cipher_hd_t h, const void *abuf, size_t abuflen); +gcry_error_t gcry_cipher_encrypt (gcry_cipher_hd_t h, void *out, size_t outsize, + const void *in, size_t inlen); +gcry_error_t gcry_cipher_decrypt (gcry_cipher_hd_t h, void *out, size_t outsize, + const void *in, size_t inlen); + +size_t gcry_cipher_get_algo_keylen (int algo); + +#endif /* GCRY_LIGHT_H */ + +/* vim: set ts=4 sw=4 et foldmethod=marker foldmarker={{{{,}}}}: */ diff --git a/src/components/implementation/simple_nf/ndpi/genshin_impact.c b/src/components/implementation/simple_nf/ndpi/genshin_impact.c new file mode 100644 index 0000000000..e837747a4c --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/genshin_impact.c @@ -0,0 +1,86 @@ +/* + * genshin_impact.c + * + * Copyright (C) 2012-22 - ntop.org + * + * This module is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This module is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License. + * If not, see . + * + */ + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_GENSHIN_IMPACT + +#include "ndpi_api.h" + + +static void ndpi_int_genshin_impact_add_connection( + struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) +{ + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_GENSHIN_IMPACT, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); +} + +static void ndpi_search_genshin_impact(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) +{ + struct ndpi_packet_struct * packet = &ndpi_struct->packet; + + NDPI_LOG_DBG(ndpi_struct, "search genshin-impact\n"); + + if (packet->tcp != NULL && packet->payload_packet_len >= 18) + { + u_int32_t pdu_len = ntohl(get_u_int32_t(packet->payload, 1)); + + if (packet->payload[0] == 0x01 && pdu_len == packet->payload_packet_len && + (packet->payload[5] == 0x01 || packet->payload[5] == 0x07) && + ntohs(get_u_int16_t(packet->payload, 16)) == 0x4da6) + { + NDPI_LOG_INFO(ndpi_struct, "found genshin-impact (TCP)\n"); + ndpi_int_genshin_impact_add_connection(ndpi_struct, flow); + return; + } + } + else if (packet->udp != NULL) + { + if (flow->packet_counter == 1 && packet->payload_packet_len >= 20 && + ntohl(get_u_int32_t(packet->payload, 0)) == 0x000000FF && + ntohl(get_u_int32_t(packet->payload, 4)) == 0x00000000 && + ntohl(get_u_int32_t(packet->payload, 12)) == 0x499602D2 && + ntohl(get_u_int32_t(packet->payload, 16)) == 0xFFFFFFFF) + { + NDPI_LOG_INFO(ndpi_struct, "found genshin-impact (UDP)\n"); + ndpi_int_genshin_impact_add_connection(ndpi_struct, flow); + return; + } + } + + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); +} + + +/* ***************************************************************** */ + +void init_genshin_impact_dissector(struct ndpi_detection_module_struct *ndpi_struct, u_int32_t *id) +{ + ndpi_set_bitmask_protocol_detection("GenshinImpact", + ndpi_struct, *id, + NDPI_PROTOCOL_GENSHIN_IMPACT, + ndpi_search_genshin_impact, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_TCP_OR_UDP_WITH_PAYLOAD_WITHOUT_RETRANSMISSION, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK); + + *id += 1; +} diff --git a/src/components/implementation/simple_nf/ndpi/git.c b/src/components/implementation/simple_nf/ndpi/git.c new file mode 100644 index 0000000000..06038febd0 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/git.c @@ -0,0 +1,86 @@ +/* + * git.c + * + * Copyright (C) 2012-22 - ntop.org + * + * This module is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This module is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License. + * If not, see . + * + */ + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_GIT + +#include "ndpi_api.h" + + +#define GIT_PORT 9418 + +static void ndpi_search_git(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) +{ + struct ndpi_packet_struct * packet = &ndpi_struct->packet; + + NDPI_LOG_DBG(ndpi_struct, "search Git\n"); + + if((packet->tcp != NULL) && (packet->payload_packet_len > 4)) { + if((ntohs(packet->tcp->source) == GIT_PORT) + || (ntohs(packet->tcp->dest) == GIT_PORT)) { + const u_int8_t * pp = packet->payload; + u_int16_t payload_len = packet->payload_packet_len; + u_int8_t found_git = 1; + u_int16_t offset = 0; + + while((offset+4) < payload_len) { + char len[5]; + u_int32_t git_pkt_len; + + memcpy(&len, &pp[offset], 4), len[4] = 0; + if(sscanf(len, "%x", &git_pkt_len) != 1) { + found_git = 0; + break; + } + + if((payload_len < git_pkt_len) || (git_pkt_len == 0 /* Bad */)) { + found_git = 0; + break; + } else + offset += git_pkt_len, payload_len -= git_pkt_len; + } + + if(found_git) { + NDPI_LOG_INFO(ndpi_struct, "found Git\n"); + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_GIT, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); + return; + } + } + } + + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); +} + + +/* ***************************************************************** */ + +void init_git_dissector(struct ndpi_detection_module_struct *ndpi_struct, u_int32_t *id) +{ + ndpi_set_bitmask_protocol_detection("Git", ndpi_struct, *id, + NDPI_PROTOCOL_GIT, + ndpi_search_git, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_TCP_WITH_PAYLOAD_WITHOUT_RETRANSMISSION, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK); + + *id += 1; +} diff --git a/src/components/implementation/simple_nf/ndpi/gnutella.c b/src/components/implementation/simple_nf/ndpi/gnutella.c new file mode 100644 index 0000000000..13b8d99c7b --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/gnutella.c @@ -0,0 +1,328 @@ +/* + * gnutella.c + * + * Copyright (C) 2009-11 - ipoque GmbH + * Copyright (C) 2011-22 - ntop.org + * + * This file is part of nDPI, an open source deep packet inspection + * library based on the OpenDPI and PACE technology by ipoque GmbH + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_GNUTELLA + +#include "ndpi_api.h" + + +static void ndpi_int_gnutella_add_connection(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow, + ndpi_confidence_t confidence) +{ + NDPI_LOG_INFO(ndpi_struct, "found GNUTELLA\n"); + ndpi_set_detected_protocol_keeping_master(ndpi_struct, flow, NDPI_PROTOCOL_GNUTELLA, + confidence); +} + +static void ndpi_search_gnutella(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) +{ + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + + u_int16_t c; + + NDPI_LOG_DBG(ndpi_struct, "search GNUTELLA\n"); + + /* skip packets without payload */ + if (packet->payload_packet_len < 2) { + return; + } + if (packet->tcp != NULL) { + /* this case works asymmetrically */ + if (packet->payload_packet_len > 10 && memcmp(packet->payload, "GNUTELLA/", 9) == 0) { + ndpi_int_gnutella_add_connection(ndpi_struct, flow, NDPI_CONFIDENCE_DPI); + return; + } + /* this case works asymmetrically */ + if (packet->payload_packet_len > 17 && memcmp(packet->payload, "GNUTELLA CONNECT/", 17) == 0) { + ndpi_int_gnutella_add_connection(ndpi_struct, flow, NDPI_CONFIDENCE_DPI); + return; + } + + if (packet->payload_packet_len > 50 && ((memcmp(packet->payload, "GET /get/", 9) == 0) + || (memcmp(packet->payload, "GET /uri-res/", 13) == 0) + )) { + ndpi_parse_packet_line_info(ndpi_struct, flow); + for (c = 0; c < packet->parsed_lines; c++) { + if ((packet->line[c].len > 19 && memcmp(packet->line[c].ptr, "User-Agent: Gnutella", 20) == 0) + || (packet->line[c].len > 10 && memcmp(packet->line[c].ptr, "X-Gnutella-", 11) == 0) + || (packet->line[c].len > 7 && memcmp(packet->line[c].ptr, "X-Queue:", 8) == 0) + || (packet->line[c].len > 36 && memcmp(packet->line[c].ptr, + "Content-Type: application/x-gnutella-", 37) == 0)) { + ndpi_int_gnutella_add_connection(ndpi_struct, flow, NDPI_CONFIDENCE_DPI); + return; + } + } + } + if (packet->payload_packet_len > 50 && ((memcmp(packet->payload, "GET / HTTP", 10) == 0))) { + ndpi_parse_packet_line_info(ndpi_struct, flow); + if ((packet->user_agent_line.ptr != NULL && packet->user_agent_line.len > 15 + && memcmp(packet->user_agent_line.ptr, "BearShare Lite ", 15) == 0) + || (packet->accept_line.ptr != NULL && packet->accept_line.len > 24 + && memcmp(packet->accept_line.ptr, "application n/x-gnutella", 24) == 0)) { + ndpi_int_gnutella_add_connection(ndpi_struct, flow, NDPI_CONFIDENCE_DPI); + } + + } + /* haven't found this pattern in any trace. */ + if (packet->payload_packet_len > 50 && ((memcmp(packet->payload, "GET /get/", 9) == 0) + || (memcmp(packet->payload, "GET /uri-res/", 13) == 0))) { + c = 8; + while (c < (packet->payload_packet_len - 9)) { + if (packet->payload[c] == '?') + break; + c++; + } + + if (c < (packet->payload_packet_len - 9) && memcmp(&packet->payload[c], "urn:sha1:", 9) == 0) { + NDPI_LOG_DBG2(ndpi_struct, "detected GET /get/ or GET /uri-res/\n"); + ndpi_int_gnutella_add_connection(ndpi_struct, flow, NDPI_CONFIDENCE_DPI); + } + + } + + /* answer to this packet is HTTP/1.1 ..... Content-Type: application/x-gnutella-packets, + * it is searched in the upper paragraph. */ + if (packet->payload_packet_len > 30 && memcmp(packet->payload, "HEAD /gnutella/push-proxy?", 26) == 0) { + NDPI_LOG_DBG2(ndpi_struct, "detected HEAD /gnutella/push-proxy?\n"); + ndpi_int_gnutella_add_connection(ndpi_struct, flow, NDPI_CONFIDENCE_DPI); + return; + } + /* haven't found any trace with this pattern */ + if (packet->payload_packet_len == 46 + && memcmp(packet->payload, "\x50\x55\x53\x48\x20\x67\x75\x69\x64\x3a", 10) == 0) { + NDPI_LOG_DBG2(ndpi_struct, + "detected \x50\x55\x53\x48\x20\x67\x75\x69\x64\x3a\n"); + ndpi_int_gnutella_add_connection(ndpi_struct, flow, NDPI_CONFIDENCE_DPI); + return; + } + /* haven't found any trace with this pattern */ + if (packet->payload_packet_len > 250 && memcmp(packet->payload, "GET /gnutella/", 14) == 0) + //PATTERN IS :: GET /gnutella/tigertree/v3?urn:tree:tiger/: + { + const u_int16_t end = packet->payload_packet_len - 3; + + c = 13; + while (c < end) { + if ((memcmp(&packet->payload[14], "tigertree/", 10) == 0) + || (end - c > 18 && memcmp(&packet->payload[c], "\r\nUser-Agent: Foxy", 18) == 0) + || (end - c > 44 + && memcmp(&packet->payload[c], + "\r\nAccept: application/tigertree-breadthfirst", + 44) == 0) || (end - c > 10 && memcmp(&packet->payload[c], "\r\nX-Queue:", 10) == 0) + || (end - c > 13 && memcmp(&packet->payload[c], "\r\nX-Features:", 13) == 0)) { + + NDPI_LOG_DBG2(ndpi_struct, "FOXY :: GNUTELLA GET 2 DETECTED\n"); + ndpi_int_gnutella_add_connection(ndpi_struct, flow, NDPI_CONFIDENCE_DPI); + return; + } + + c++; + } + } + /* haven't found any trace with this pattern */ + if (packet->payload_packet_len > 1 && packet->payload[packet->payload_packet_len - 1] == 0x0a + && packet->payload[packet->payload_packet_len - 2] == 0x0a) { + if (packet->payload_packet_len > 3 && memcmp(packet->payload, "GIV", 3) == 0) { + NDPI_LOG_DBG2(ndpi_struct, "MORPHEUS GIV DETECTED\n"); + /* Not Excluding the flow now.. We shall Check the next Packet too for Gnutella Patterns */ + return; + } + } + /* might be super tricky new ssl gnutella transmission, but the certificate is strange... */ + if (packet->payload_packet_len == 46 && get_u_int32_t(packet->payload, 0) == htonl(0x802c0103) && + get_u_int32_t(packet->payload, 4) == htonl(0x01000300) && get_u_int32_t(packet->payload, 8) == htonl(0x00002000) && + get_u_int16_t(packet->payload, 12) == htons(0x0034)) { + NDPI_LOG_DBG2(ndpi_struct, "detected gnutella len == 46\n"); + ndpi_int_gnutella_add_connection(ndpi_struct, flow, NDPI_CONFIDENCE_DPI); + return; + } + if (packet->payload_packet_len == 49 && + memcmp(packet->payload, "\x80\x2f\x01\x03\x01\x00\x06\x00\x00\x00\x20\x00\x00\x34\x00\x00\xff\x4d\x6c", + 19) == 0) { + NDPI_LOG_DBG2(ndpi_struct, "detected gnutella len == 49\n"); + ndpi_int_gnutella_add_connection(ndpi_struct, flow, NDPI_CONFIDENCE_DPI); + return; + } + if (packet->payload_packet_len == 89 && memcmp(&packet->payload[43], "\x20\x4d\x6c", 3) == 0 && + memcmp(packet->payload, "\x16\x03\x01\x00\x54\x01\x00\x00\x50\x03\x01\x4d\x6c", 13) == 0 && + memcmp(&packet->payload[76], "\x00\x02\x00\x34\x01\x00\x00\x05", 8) == 0) { + NDPI_LOG_DBG2(ndpi_struct, + "detected gnutella asymmetrically len == 388.\n"); + ndpi_int_gnutella_add_connection(ndpi_struct, flow, NDPI_CONFIDENCE_DPI); + return; + } else if (packet->payload_packet_len == 82) { + if (get_u_int32_t(packet->payload, 0) == htonl(0x16030100) + && get_u_int32_t(packet->payload, 4) == htonl(0x4d010000) + && get_u_int16_t(packet->payload, 8) == htons(0x4903) + && get_u_int16_t(packet->payload, 76) == htons(0x0002) + && get_u_int32_t(packet->payload, 78) == htonl(0x00340100)) { + NDPI_LOG_DBG2(ndpi_struct, "detected len == 82\n"); + ndpi_int_gnutella_add_connection(ndpi_struct, flow, NDPI_CONFIDENCE_DPI); + return; + } + } + } else if (packet->udp != NULL) { + /* Check for Mojito-DHT encapsulated gnutella (gtk-gnutella). */ + if (packet->payload_packet_len >= 28 && + ntohl(get_u_int32_t(packet->payload, 24)) == 0x47544b47 /* GTKG */) + { + u_int32_t gnutella_payload_len = le32toh(get_u_int32_t(packet->payload, 19)); + + if (gnutella_payload_len == (u_int32_t)packet->payload_packet_len - 23) + { + NDPI_LOG_DBG2(ndpi_struct, "detected mojito-dht/gnutella udp\n"); + ndpi_int_gnutella_add_connection(ndpi_struct, flow, NDPI_CONFIDENCE_DPI); + return; + } + } + + /* observations: + * all the following patterns send out many packets which are the only ones of their flows, + * often on the very beginning of the traces, or flows with many packets in one direction only. + * but then suddenly, one gets an answer as you can see in netpeker-gnutella-rpc.pcap packet 11483. + * Maybe gnutella tries to send out keys? + */ + if (packet->payload_packet_len == 23 && packet->payload[15] == 0x00 + && packet->payload[16] == 0x41 && packet->payload[17] == 0x01 + && packet->payload[18] == 0x00 && packet->payload[19] == 0x00 + && packet->payload[20] == 0x00 && packet->payload[21] == 0x00 && packet->payload[22] == 0x00) { + NDPI_LOG_DBG2(ndpi_struct, "detected gnutella udp, len = 23\n"); + ndpi_int_gnutella_add_connection(ndpi_struct, flow, NDPI_CONFIDENCE_DPI); + + return; + } + if (packet->payload_packet_len == 35 && packet->payload[25] == 0x49 + && packet->payload[26] == 0x50 && packet->payload[27] == 0x40 + && packet->payload[28] == 0x83 && packet->payload[29] == 0x53 + && packet->payload[30] == 0x43 && packet->payload[31] == 0x50 && packet->payload[32] == 0x41) { + NDPI_LOG_DBG2(ndpi_struct, "detected gnutella udp, len = 35\n"); + ndpi_int_gnutella_add_connection(ndpi_struct, flow, NDPI_CONFIDENCE_DPI); + return; + } + if (packet->payload_packet_len == 32 + && (memcmp(&packet->payload[16], "\x31\x01\x00\x09\x00\x00\x00\x4c\x49\x4d\x45", 11) == 0)) { + NDPI_LOG_DBG2(ndpi_struct, "detected gnutella udp, len = 32\n"); + ndpi_int_gnutella_add_connection(ndpi_struct, flow, NDPI_CONFIDENCE_DPI); + return; + } + if (packet->payload_packet_len == 34 && (memcmp(&packet->payload[25], "SCP@", 4) == 0) + && (memcmp(&packet->payload[30], "DNA@", 4) == 0)) { + NDPI_LOG_DBG2(ndpi_struct, "detected gnutella udp, len = 34\n"); + ndpi_int_gnutella_add_connection(ndpi_struct, flow, NDPI_CONFIDENCE_DPI); + return; + } + if ((packet->payload_packet_len == 73 || packet->payload_packet_len == 96) + && memcmp(&packet->payload[32], "urn:sha1:", 9) == 0) { + NDPI_LOG_DBG2(ndpi_struct, "detected gnutella udp, len = 73,96\n"); + ndpi_int_gnutella_add_connection(ndpi_struct, flow, NDPI_CONFIDENCE_DPI); + return; + } + + if (packet->payload_packet_len >= 3 && memcmp(packet->payload, "GND", 3) == 0) { + if ((packet->payload_packet_len == 8 && (memcmp(&packet->payload[6], "\x01\x00", 2) == 0)) + || (packet->payload_packet_len == 11 && (memcmp(&packet->payload[6], "\x01\x01\x08\x50\x49", 5) + == 0)) || (packet->payload_packet_len == 17 + && + (memcmp + (&packet->payload[6], "\x01\x01\x4c\x05\x50", + 5) == 0)) + || (packet->payload_packet_len == 28 + && (memcmp(&packet->payload[6], "\x01\x01\x54\x0f\x51\x4b\x52\x50\x06\x52", 10) == 0)) + || (packet->payload_packet_len == 41 + && (memcmp(&packet->payload[6], "\x01\x01\x5c\x1b\x50\x55\x53\x48\x48\x10", 10) == 0)) + || (packet->payload_packet_len > 200 && packet->payload_packet_len < 300 && packet->payload[3] == 0x03) + || (packet->payload_packet_len > 300 && (packet->payload[3] == 0x01 || packet->payload[3] == 0x03))) { + NDPI_LOG_DBG2(ndpi_struct, "detected gnutella udp, GND\n"); + ndpi_int_gnutella_add_connection(ndpi_struct, flow, NDPI_CONFIDENCE_DPI); + return; + } + } + + if ((packet->payload_packet_len == 32) + && memcmp(&packet->payload[16], "\x31\x01\x00\x09\x00\x00\x00", 7) == 0) { + NDPI_LOG_DBG2(ndpi_struct, "detected gnutella udp, len = 32 ii\n"); + ndpi_int_gnutella_add_connection(ndpi_struct, flow, NDPI_CONFIDENCE_DPI); + return; + } + if ((packet->payload_packet_len == 23) + && memcmp(&packet->payload[16], "\x00\x01\x00\x00\x00\x00\x00", 7) == 0) { + NDPI_LOG_DBG2(ndpi_struct, "detected gnutella udp, len = 23 ii\n"); + ndpi_int_gnutella_add_connection(ndpi_struct, flow, NDPI_CONFIDENCE_DPI); + return; + } + } + //neonet detection follows + + /* haven't found any trace with this pattern */ + if (packet->tcp != NULL && ntohs(packet->tcp->source) >= 1024 && ntohs(packet->tcp->dest) >= 1024) { + if (flow->l4.tcp.gnutella_stage == 0) { + if (flow->packet_counter == 1 + && (packet->payload_packet_len == 11 + || packet->payload_packet_len == 33 || packet->payload_packet_len == 37)) { + flow->l4.tcp.gnutella_msg_id[0] = packet->payload[4]; + flow->l4.tcp.gnutella_msg_id[1] = packet->payload[6]; + flow->l4.tcp.gnutella_msg_id[2] = packet->payload[8]; + flow->l4.tcp.gnutella_stage = 1 + packet->packet_direction; + return; + } + } else if (flow->l4.tcp.gnutella_stage == 1 + packet->packet_direction) { + if (flow->packet_counter == 2 && (packet->payload_packet_len == 33 || packet->payload_packet_len == 22) + && flow->l4.tcp.gnutella_msg_id[0] == packet->payload[0] + && flow->l4.tcp.gnutella_msg_id[1] == packet->payload[2] + && flow->l4.tcp.gnutella_msg_id[2] == packet->payload[4]) { + NDPI_LOG_DBG2(ndpi_struct, "GNUTELLA DETECTED due to message ID match (NEONet protocol)\n"); + ndpi_int_gnutella_add_connection(ndpi_struct, flow, NDPI_CONFIDENCE_DPI); + return; + } + } else if (flow->l4.tcp.gnutella_stage == 2 - packet->packet_direction) { + if (flow->packet_counter == 2 && (packet->payload_packet_len == 10 || packet->payload_packet_len == 75) + && flow->l4.tcp.gnutella_msg_id[0] == packet->payload[0] + && flow->l4.tcp.gnutella_msg_id[1] == packet->payload[2] + && flow->l4.tcp.gnutella_msg_id[2] == packet->payload[4]) { + NDPI_LOG_DBG2(ndpi_struct, "GNUTELLA DETECTED due to message ID match (NEONet protocol)\n"); + ndpi_int_gnutella_add_connection(ndpi_struct, flow, NDPI_CONFIDENCE_DPI); + return; + } + } + } + + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); +} + + +void init_gnutella_dissector(struct ndpi_detection_module_struct *ndpi_struct, u_int32_t *id) +{ + ndpi_set_bitmask_protocol_detection("Gnutella", ndpi_struct, *id, + NDPI_PROTOCOL_GNUTELLA, + ndpi_search_gnutella, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_TCP_OR_UDP_WITH_PAYLOAD_WITHOUT_RETRANSMISSION, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK); + + *id += 1; +} + diff --git a/src/components/implementation/simple_nf/ndpi/gtp.c b/src/components/implementation/simple_nf/ndpi/gtp.c new file mode 100644 index 0000000000..a0c461774f --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/gtp.c @@ -0,0 +1,141 @@ +/* + * gtp.c + * + * Copyright (C) 2011-22 - ntop.org + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_GTP + +#include "ndpi_api.h" + + +/* This code handles: GTP-U (port 2152), GTP-C (v1 and v2; port 2123) and GTP-PRIME + (port 3386). + It should be fine to ignore v0, since it should not be used anymore. + + Message length checks and basic headers are not uniform across these protocols. + + For GTPv2 (GTP-C v2), see TS 29.274 Sec. 5.5.1: + "Octets 3 to 4 represent the Message Length field. This field shall indicate + the length of the message in octets excluding the mandatory part of the GTP-C + header (the first 4 octets). The TEID (if present) and the Sequence Number + shall be included in the length count." + + For GTP-PRIME TS 32.295 Sec. 6.1.1 + "The Length indicates the length of payload (number of octets after the GTP' + header). The Sequence Number of the packet is part of the GTP' header." + + For GTPv1 (GTP-U and GTP-C v1) TS TS 29.060 Sec. 6 + "Length: This field indicates the length in octets of the payload, i.e. the + rest of the packet following the mandatory part of the GTP header (that is + the first 8 octets). The Sequence Number, the N-PDU Number or any Extension + headers shall be considered to be part of the payload, i.e. included in the + length count." + +*/ + +#define HEADER_LEN_GTP_U 8 +#define HEADER_LEN_GTP_C_V1 8 +#define HEADER_LEN_GTP_C_V2 4 +#define HEADER_LEN_GTP_PRIME 6 + + +/* Common header for all GTP types */ +struct gtp_header_generic { + u_int8_t flags, message_type; + u_int16_t message_len; +}; + +static void ndpi_check_gtp(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) +{ + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + u_int32_t payload_len = packet->payload_packet_len; + + if((packet->udp != NULL) && (payload_len > sizeof(struct gtp_header_generic))) { + u_int32_t gtp_u = ntohs(2152); + u_int32_t gtp_c = ntohs(2123); + u_int32_t gtp_prime = ntohs(3386); + + struct gtp_header_generic *gtp = (struct gtp_header_generic *)packet->payload; + u_int8_t version = (gtp->flags & 0xE0) >> 5; + u_int8_t pt = (gtp->flags & 0x10) >> 4; + u_int16_t message_len = ntohs(gtp->message_len); + + if((packet->udp->source == gtp_u) || (packet->udp->dest == gtp_u)) { + if((version == 1) && (pt == 1) && + (payload_len >= HEADER_LEN_GTP_U) && + (message_len <= (payload_len - HEADER_LEN_GTP_U))) { + NDPI_LOG_INFO(ndpi_struct, "found gtp-u\n"); + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_GTP_U, NDPI_PROTOCOL_GTP, NDPI_CONFIDENCE_DPI); + return; + } + } + if((packet->udp->source == gtp_c) || (packet->udp->dest == gtp_c)) { + if(((version == 1) && + (payload_len >= HEADER_LEN_GTP_C_V1) && + (message_len == (payload_len - HEADER_LEN_GTP_C_V1)) && + (message_len >= 4 * (!!(gtp->flags & 0x07))) && + (gtp->message_type > 0 && gtp->message_type <= 129)) || /* Loose check based on TS 29.060 7.1 */ + ((version == 2) && + /* payload_len is always valid, because HEADER_LEN_GTP_C_V2 == sizeof(struct gtp_header_generic) */ + (message_len == (payload_len - HEADER_LEN_GTP_C_V2)))) { + NDPI_LOG_INFO(ndpi_struct, "found gtp-c\n"); + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_GTP_C, NDPI_PROTOCOL_GTP, NDPI_CONFIDENCE_DPI); + return; + } + } + if((packet->udp->source == gtp_prime) || (packet->udp->dest == gtp_prime)) { + if((pt == 0) && + ((gtp->flags & 0x0E) >> 1 == 0x7) && /* Spare bits */ + (payload_len >= HEADER_LEN_GTP_PRIME) && + (message_len <= (payload_len - HEADER_LEN_GTP_PRIME)) && + ((gtp->message_type > 0 && gtp->message_type <= 7) || /* Check based on TS 32.295 6.2.1 */ + gtp->message_type == 240 || gtp->message_type == 241)) { + NDPI_LOG_INFO(ndpi_struct, "found gtp-prime\n"); + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_GTP_PRIME, NDPI_PROTOCOL_GTP, NDPI_CONFIDENCE_DPI); + return; + } + } + } + + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + return; +} + +static void ndpi_search_gtp(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) +{ + NDPI_LOG_DBG(ndpi_struct, "search gtp\n"); + + /* skip marked packets */ + if(flow->detected_protocol_stack[0] != NDPI_PROTOCOL_GTP) + ndpi_check_gtp(ndpi_struct, flow); +} + + +void init_gtp_dissector(struct ndpi_detection_module_struct *ndpi_struct, u_int32_t *id) +{ + ndpi_set_bitmask_protocol_detection("GTP", ndpi_struct, *id, + NDPI_PROTOCOL_GTP, + ndpi_search_gtp, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_UDP_WITH_PAYLOAD, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK); + + *id += 1; +} diff --git a/src/components/implementation/simple_nf/ndpi/guildwars.c b/src/components/implementation/simple_nf/ndpi/guildwars.c new file mode 100644 index 0000000000..86ca00a6d2 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/guildwars.c @@ -0,0 +1,78 @@ +/* + * guildwars.c + * + * Copyright (C) 2009-11 - ipoque GmbH + * Copyright (C) 2011-22 - ntop.org + * + * This file is part of nDPI, an open source deep packet inspection + * library based on the OpenDPI and PACE technology by ipoque GmbH + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_GUILDWARS + +#include "ndpi_api.h" + + +static void ndpi_int_guildwars_add_connection(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) +{ + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_GUILDWARS, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); +} + +static void ndpi_search_guildwars_tcp(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) +{ + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + + NDPI_LOG_DBG(ndpi_struct, "search guildwars\n"); + + if (packet->payload_packet_len == 64 && get_u_int16_t(packet->payload, 1) == ntohs(0x050c) + && memcmp(&packet->payload[50], "@2&P", 4) == 0) { + NDPI_LOG_INFO(ndpi_struct, "found GuildWars version 29.350\n"); + ndpi_int_guildwars_add_connection(ndpi_struct, flow); + return; + } + if (packet->payload_packet_len == 16 && get_u_int16_t(packet->payload, 1) == ntohs(0x040c) + && get_u_int16_t(packet->payload, 4) == ntohs(0xa672) + && packet->payload[8] == 0x01 && packet->payload[12] == 0x04) { + NDPI_LOG_INFO(ndpi_struct, "found GuildWars version 29.350\n"); + ndpi_int_guildwars_add_connection(ndpi_struct, flow); + return; + } + if (packet->payload_packet_len == 21 && get_u_int16_t(packet->payload, 0) == ntohs(0x0100) + && get_u_int32_t(packet->payload, 5) == ntohl(0xf1001000) + && packet->payload[9] == 0x01) { + NDPI_LOG_INFO(ndpi_struct, "found GuildWars version 216.107.245.50\n"); + ndpi_int_guildwars_add_connection(ndpi_struct, flow); + return; + } + + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); +} + + +void init_guildwars_dissector(struct ndpi_detection_module_struct *ndpi_struct, u_int32_t *id) +{ + ndpi_set_bitmask_protocol_detection("Guildwars", ndpi_struct, *id, + NDPI_PROTOCOL_GUILDWARS, + ndpi_search_guildwars_tcp, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_TCP_WITH_PAYLOAD_WITHOUT_RETRANSMISSION, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK); + + *id += 1; +} diff --git a/src/components/implementation/simple_nf/ndpi/h323.c b/src/components/implementation/simple_nf/ndpi/h323.c new file mode 100644 index 0000000000..bb088b2390 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/h323.c @@ -0,0 +1,130 @@ +/* + * h323.c + * + * Copyright (C) 2015-20 ntop.org + * Copyright (C) 2013 Remy Mudingay + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_H323 + +#include "ndpi_api.h" + + +struct tpkt { + u_int8_t version, reserved; + u_int16_t len; +}; + +static void ndpi_search_h323(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) +{ + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + u_int16_t dport = 0, sport = 0; + + NDPI_LOG_DBG(ndpi_struct, "search H323\n"); + + /* + The TPKT protocol is used by ISO 8072 (on port 102) + and H.323. So this check below is to avoid ambiguities + */ + if((packet->tcp != NULL) && (packet->tcp->dest != ntohs(102))) { + NDPI_LOG_DBG2(ndpi_struct, "calculated dport over tcp\n"); + + /* H323 */ + if(packet->payload_packet_len > 5 + && (packet->payload[0] == 0x03) + && (packet->payload[1] == 0x00)) { + struct tpkt *t = (struct tpkt*)packet->payload; + u_int16_t len = ntohs(t->len); + + if(packet->payload_packet_len == len) { + /* + We need to check if this packet is in reality + a RDP (Remote Desktop) packet encapsulated on TPTK + */ + + if(packet->payload[4] == (packet->payload_packet_len - sizeof(struct tpkt) - 1)) { + /* ISO 8073/X.224 */ + if((packet->payload[5] == 0xE0 /* CC Connect Request */) + || (packet->payload[5] == 0xD0 /* CC Connect Confirm */)) { + NDPI_LOG_INFO(ndpi_struct, "found RDP\n"); + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_RDP, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); + return; + } + } + + flow->l4.tcp.h323_valid_packets++; + + if(flow->l4.tcp.h323_valid_packets >= 2) { + NDPI_LOG_INFO(ndpi_struct, "found H323 broadcast\n"); + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_H323, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); + } + } else { + /* This is not H.323 */ + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + return; + } + } + } else if(packet->udp != NULL) { + sport = ntohs(packet->udp->source), dport = ntohs(packet->udp->dest); + NDPI_LOG_DBG2(ndpi_struct, "calculated dport over udp\n"); + + if(packet->payload_packet_len >= 6 && packet->payload[0] == 0x80 && packet->payload[1] == 0x08 && + (packet->payload[2] == 0xe7 || packet->payload[2] == 0x26) && + packet->payload[4] == 0x00 && packet->payload[5] == 0x00) + { + NDPI_LOG_INFO(ndpi_struct, "found H323 broadcast\n"); + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_H323, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); + return; + } + /* H323 */ + if(sport == 1719 || dport == 1719) { + if((packet->payload_packet_len > 5) + && (packet->payload[0] == 0x16) + && (packet->payload[1] == 0x80) + && (packet->payload[4] == 0x06) + && (packet->payload[5] == 0x00)) { + NDPI_LOG_INFO(ndpi_struct, "found H323 broadcast\n"); + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_H323, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); + return; + } else if(packet->payload_packet_len >= 20 && packet->payload_packet_len <= 117) { + NDPI_LOG_INFO(ndpi_struct, "found H323 broadcast\n"); + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_H323, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); + return; + } else { + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + return; + } + } + } + + if(flow->packet_counter > 5) + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); +} + +void init_h323_dissector(struct ndpi_detection_module_struct *ndpi_struct, u_int32_t *id) +{ + ndpi_set_bitmask_protocol_detection("H323", ndpi_struct, *id, + NDPI_PROTOCOL_H323, + ndpi_search_h323, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_TCP_OR_UDP_WITH_PAYLOAD_WITHOUT_RETRANSMISSION, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK); + + *id += 1; +} diff --git a/src/components/implementation/simple_nf/ndpi/halflife2_and_mods.c b/src/components/implementation/simple_nf/ndpi/halflife2_and_mods.c new file mode 100644 index 0000000000..b4c91dd193 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/halflife2_and_mods.c @@ -0,0 +1,77 @@ +/* + * halflife2_and_mods.c + * + * Copyright (C) 2009-11 - ipoque GmbH + * Copyright (C) 2011-22 - ntop.org + * + * This file is part of nDPI, an open source deep packet inspection + * library based on the OpenDPI and PACE technology by ipoque GmbH + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_HALFLIFE2 + +#include "ndpi_api.h" + + +static void ndpi_int_halflife2_add_connection(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) +{ + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_HALFLIFE2, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); +} + +static void ndpi_search_halflife2(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) +{ + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + + NDPI_LOG_DBG(ndpi_struct, "search halflife2\n"); + + if (flow->l4.udp.halflife2_stage == 0) { + if (packet->payload_packet_len >= 20 + && get_u_int32_t(packet->payload, 0) == 0xFFFFFFFF + && get_u_int32_t(packet->payload, packet->payload_packet_len - 4) == htonl(0x30303000)) { + flow->l4.udp.halflife2_stage = 1 + packet->packet_direction; + NDPI_LOG_DBG2(ndpi_struct, + "halflife2 client req detected, waiting for server reply\n"); + return; + } + } else if (flow->l4.udp.halflife2_stage == 2 - packet->packet_direction) { + if (packet->payload_packet_len >= 20 + && get_u_int32_t(packet->payload, 0) == 0xFFFFFFFF + && get_u_int32_t(packet->payload, packet->payload_packet_len - 4) == htonl(0x30303000)) { + ndpi_int_halflife2_add_connection(ndpi_struct, flow); + NDPI_LOG_INFO(ndpi_struct, "found halflife2\n"); + return; + } + } + + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); +} + + +void init_halflife2_dissector(struct ndpi_detection_module_struct *ndpi_struct, u_int32_t *id) +{ + ndpi_set_bitmask_protocol_detection("HalfLife2", ndpi_struct, *id, + NDPI_PROTOCOL_HALFLIFE2, + ndpi_search_halflife2, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_UDP_WITH_PAYLOAD, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK); + + *id += 1; +} diff --git a/src/components/implementation/simple_nf/ndpi/hangout.c b/src/components/implementation/simple_nf/ndpi/hangout.c new file mode 100644 index 0000000000..720b4045c0 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/hangout.c @@ -0,0 +1,107 @@ +/* + * hangout.c + * + * Copyright (C) 2012-22 - ntop.org + * + * This module is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This module is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License. + * If not, see . + * + */ + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_HANGOUT_DUO + +/* #define DEBUG_LRU 1 */ + +#include "ndpi_api.h" + +/* stun.c */ +extern u_int32_t get_stun_lru_key(struct ndpi_flow_struct *flow, u_int8_t rev); + +/* https://support.google.com/a/answer/1279090?hl=en */ +#define HANGOUT_UDP_LOW_PORT 19302 +#define HANGOUT_UDP_HIGH_PORT 19309 +#define HANGOUT_TCP_LOW_PORT 19305 +#define HANGOUT_TCP_HIGH_PORT 19309 + +/* ***************************************************************** */ + +static u_int8_t isHangoutUDPPort(u_int16_t port) { + if((port >= HANGOUT_UDP_LOW_PORT) && (port <= HANGOUT_UDP_HIGH_PORT)) + return(1); + else + return(0); +} + +/* ***************************************************************** */ + +static u_int8_t isHangoutTCPPort(u_int16_t port) { + if((port >= HANGOUT_TCP_LOW_PORT) && (port <= HANGOUT_TCP_HIGH_PORT)) + return(1); + else + return(0); +} + +/* ***************************************************************** */ + +static void ndpi_search_hangout(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) { + struct ndpi_packet_struct * packet = &ndpi_struct->packet; + + NDPI_LOG_DBG(ndpi_struct, "search Hangout\n"); + + if((packet->payload_packet_len > 24) && flow->guessed_protocol_id_by_ip == NDPI_PROTOCOL_GOOGLE) { + int matched_src = 0; + if( + ((packet->udp != NULL) && (matched_src = isHangoutUDPPort(ntohs(packet->udp->source)) + || isHangoutUDPPort(ntohs(packet->udp->dest)))) + || + ((packet->tcp != NULL) && (matched_src = isHangoutTCPPort(ntohs(packet->tcp->source)) + || isHangoutTCPPort(ntohs(packet->tcp->dest))))) { + NDPI_LOG_INFO(ndpi_struct, "found Hangout\n"); + + /* Hangout is over STUN hence the LRU cache is shared */ + + if(ndpi_struct->stun_cache) { + u_int32_t key = get_stun_lru_key(flow, !matched_src); + +#ifdef DEBUG_LRU + printf("[LRU] ADDING %u / %u.%u\n", key, NDPI_PROTOCOL_STUN, NDPI_PROTOCOL_HANGOUT_DUO); +#endif + + ndpi_lru_add_to_cache(ndpi_struct->stun_cache, key, NDPI_PROTOCOL_HANGOUT_DUO, ndpi_get_current_time(flow)); + } + + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_HANGOUT_DUO, + NDPI_PROTOCOL_STUN, NDPI_CONFIDENCE_DPI); + return; + } + } + + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); +} + +/* ***************************************************************** */ + +void init_hangout_dissector(struct ndpi_detection_module_struct *ndpi_struct, u_int32_t *id) { + ndpi_set_bitmask_protocol_detection("GoogleHangout", ndpi_struct, *id, + NDPI_PROTOCOL_HANGOUT_DUO, + ndpi_search_hangout, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_TCP_OR_UDP_WITH_PAYLOAD_WITHOUT_RETRANSMISSION, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK); + + *id += 1; +} + diff --git a/src/components/implementation/simple_nf/ndpi/hll.h b/src/components/implementation/simple_nf/ndpi/hll.h new file mode 100644 index 0000000000..bbb318c7c4 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/hll.h @@ -0,0 +1,31 @@ +/* + Code taken from https://github.com/avz/hll + + Copyright (c) 2015 Artem Zaytsev + Permission is hereby granted, free of charge, to any person obtaining a copy + of this software and associated documentation files (the "Software"), to deal + in the Software without restriction, including without limitation the rights + to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + copies of the Software, and to permit persons to whom the Software is + furnished to do so, subject to the following conditions: + The above copyright notice and this permission notice shall be included + in all copies or substantial portions of the Software. + + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR + OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + OTHER DEALINGS IN THE SOFTWARE. + */ + +#include +#include + +#include "ndpi_typedefs.h" + +extern int hll_init(struct ndpi_hll *hll, u_int8_t bits); +extern void hll_destroy(struct ndpi_hll *hll); +extern int hll_add(struct ndpi_hll *hll, const void *buf, size_t size); +extern double hll_count(const struct ndpi_hll *hll); diff --git a/src/components/implementation/simple_nf/ndpi/hpvirtgrp.c b/src/components/implementation/simple_nf/ndpi/hpvirtgrp.c new file mode 100644 index 0000000000..df2da5faac --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/hpvirtgrp.c @@ -0,0 +1,70 @@ +/* + * hpvirtgrp.c + * + * Copyright (C) 2012-22 - ntop.org + * + * This module is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This module is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License. + * If not, see . + * + */ + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_HPVIRTGRP + +#include "ndpi_api.h" + + +static void ndpi_int_hpvirtgrp_add_connection( + struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) +{ + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_HPVIRTGRP, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); +} + +static void ndpi_search_hpvirtgrp(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) +{ + struct ndpi_packet_struct * packet = &ndpi_struct->packet; + + NDPI_LOG_DBG(ndpi_struct, "search hpvirtgrp\n"); + + if (packet->tcp != NULL) + { + if (flow->packet_counter == 1 && packet->payload_packet_len >= 4 && + packet->payload_packet_len == ntohs(*(u_int16_t*)&packet->payload[1]) && + packet->payload[0] == 0x16 && packet->payload[3] == 0x00) + { + ndpi_int_hpvirtgrp_add_connection(ndpi_struct, flow); + return; + } + } + + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); +} + + +/* ***************************************************************** */ + +void init_hpvirtgrp_dissector(struct ndpi_detection_module_struct *ndpi_struct, u_int32_t *id) +{ + ndpi_set_bitmask_protocol_detection("HP Virtual Machine Group Management", + ndpi_struct, *id, + NDPI_PROTOCOL_HPVIRTGRP, + ndpi_search_hpvirtgrp, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_TCP_WITH_PAYLOAD_WITHOUT_RETRANSMISSION, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK); + + *id += 1; +} diff --git a/src/components/implementation/simple_nf/ndpi/hsrp.c b/src/components/implementation/simple_nf/ndpi/hsrp.c new file mode 100644 index 0000000000..3f177ebfbd --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/hsrp.c @@ -0,0 +1,93 @@ +/* + * ayiya.c + * + * Copyright (C) 2011-22 - ntop.org + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +/* + https://www.cisco.com/c/en/us/support/docs/ip/hot-standby-router-protocol-hsrp/9234-hsrpguidetoc.html +*/ + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_HSRP + +#include "ndpi_api.h" + +#define HSRP_PORT 1985 +#define HSRP_PORT_V6 2029 + +static void ndpi_search_hsrp(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) { + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + u_int16_t port_to_match; + + NDPI_LOG_DBG(ndpi_struct, "search HSRP\n"); + + if(packet->iphv6) { + port_to_match = htons(HSRP_PORT_V6); + + if((packet->udp->source == port_to_match) && (packet->udp->dest == port_to_match) + && (packet->payload[0] <= 0x04) /* Message type */ + && (ntohl(packet->iphv6->ip6_dst.u6_addr.u6_addr32[0]) == 0xFF020000) + && (ntohl(packet->iphv6->ip6_dst.u6_addr.u6_addr32[1]) == 0x00000000) + && (ntohl(packet->iphv6->ip6_dst.u6_addr.u6_addr32[2]) == 0x00000000) + && (ntohl(packet->iphv6->ip6_dst.u6_addr.u6_addr32[3]) == 0x00000066)) { /* multicast: ff02::66 */; + NDPI_LOG_INFO(ndpi_struct, "found HSRP\n"); + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_HSRP, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); + return; + } + } else if(packet->iph) { + port_to_match = htons(HSRP_PORT); + + if((packet->udp->source == port_to_match) && (packet->udp->dest == port_to_match)) { + u_int8_t found = 0; + + if((ntohl(packet->iph->daddr) == 0xE0000002 /* 224.0.0.2 v0 */) + && (packet->payload_packet_len >= 20) + && (packet->payload[0] == 0x0 /* v0 */) + && (packet->payload[7] == 0x0 /* reserved */)) + found = 1; /* v0 */ + else if((packet->payload_packet_len >= 42) + && (packet->payload[2] == 0x02) /* Version 2 */ + && (packet->payload[5] == 0x04) /* IPv4 */ + && (ntohl(packet->iph->daddr) == 0xE0000066 /* 224.0.0.102 v2 */)) + found = 1; + + if(found) { + NDPI_LOG_INFO(ndpi_struct, "found HSRP\n"); + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_HSRP, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); + return; + } + } + } + + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); +} + + +void init_hsrp_dissector(struct ndpi_detection_module_struct *ndpi_struct, + u_int32_t *id) { + ndpi_set_bitmask_protocol_detection("HSRP", ndpi_struct, *id, + NDPI_PROTOCOL_HSRP, + ndpi_search_hsrp, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_UDP_WITH_PAYLOAD, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK); + + *id += 1; +} diff --git a/src/components/implementation/simple_nf/ndpi/http.c b/src/components/implementation/simple_nf/ndpi/http.c new file mode 100644 index 0000000000..b9cc198c1a --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/http.c @@ -0,0 +1,1533 @@ +/* + * http.c + * + * Copyright (C) 2011-22 - ntop.org + * + * This file is part of nDPI, an open source deep packet inspection + * library based on the OpenDPI and PACE technology by ipoque GmbH + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +#include + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_HTTP + +#include "ndpi_api.h" + +static const char* binary_file_mimes_e[] = { "exe", NULL }; +static const char* binary_file_mimes_j[] = { "java-vm", NULL }; +static const char* binary_file_mimes_v[] = { "vnd.ms-cab-compressed", "vnd.microsoft.portable-executable", NULL }; +static const char* binary_file_mimes_x[] = { "x-msdownload", "x-dosexec", NULL }; + +static const char* download_file_mimes_b[] = { "bz", "bz2", NULL }; +static const char* download_file_mimes_o[] = { "octet-stream", NULL }; +static const char* download_file_mimes_x[] = { "x-tar", "x-zip", "x-bzip", NULL }; + +#define ATTACHMENT_LEN 3 +static const char* binary_file_ext[] = { + "exe", + "msi", + "cab", + NULL +}; + +static void ndpi_search_http_tcp(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow); + +/* *********************************************** */ + +static void ndpi_set_binary_application_transfer(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow, + char *msg) { + /* + Check known exceptions + */ + if(ndpi_ends_with((char*)flow->host_server_name, ".windowsupdate.com")) + ; + else + ndpi_set_risk(ndpi_struct, flow, NDPI_BINARY_APPLICATION_TRANSFER, msg); + } + + /* *********************************************** */ + +static void ndpi_analyze_content_signature(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) { + u_int8_t set_risk = 0; + const char *msg = NULL; + + if((flow->initial_binary_bytes_len >= 2) && (flow->initial_binary_bytes[0] == 0x4D) && (flow->initial_binary_bytes[1] == 0x5A)) + set_risk = 1, msg = "Found Windows Exe"; /* Win executable */ + else if((flow->initial_binary_bytes_len >= 4) && (flow->initial_binary_bytes[0] == 0x7F) && (flow->initial_binary_bytes[1] == 'E') + && (flow->initial_binary_bytes[2] == 'L') && (flow->initial_binary_bytes[3] == 'F')) + set_risk = 1, msg = "Found Linux Exe"; /* Linux executable */ + else if((flow->initial_binary_bytes_len >= 4) && (flow->initial_binary_bytes[0] == 0xCF) && (flow->initial_binary_bytes[1] == 0xFA) + && (flow->initial_binary_bytes[2] == 0xED) && (flow->initial_binary_bytes[3] == 0xFE)) + set_risk = 1, msg = "Found Linux Exe"; /* Linux executable */ + else if((flow->initial_binary_bytes_len >= 3) + && (flow->initial_binary_bytes[0] == '#') + && (flow->initial_binary_bytes[1] == '!') + && (flow->initial_binary_bytes[2] == '/')) + set_risk = 1, msg = "Found Unix Script"; /* Unix script (e.g. #!/bin/sh) */ + else if(flow->initial_binary_bytes_len >= 8) { + u_int8_t exec_pattern[] = { 0x64, 0x65, 0x78, 0x0A, 0x30, 0x33, 0x35, 0x00 }; + + if(memcmp(flow->initial_binary_bytes, exec_pattern, 8) == 0) + set_risk = 1, msg = "Found Android Exe"; /* Dalvik Executable (Android) */ + } + + if(set_risk) + ndpi_set_binary_application_transfer(ndpi_struct, flow, (char*)msg); +} + +/* *********************************************** */ + +static int ndpi_search_http_tcp_again(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) { + + ndpi_search_http_tcp(ndpi_struct, flow); + +#ifdef HTTP_DEBUG + printf("=> %s()\n", __FUNCTION__); +#endif + + if((flow->host_server_name[0] != '\0') + && (flow->http.response_status_code != 0) + ) { + /* stop extra processing */ + if(flow->initial_binary_bytes_len) ndpi_analyze_content_signature(ndpi_struct, flow); + + flow->extra_packets_func = NULL; /* We're good now */ + return(0); + } + + /* Possibly more processing */ + return(1); +} + +/* *********************************************** */ + +static int ndpi_http_is_print(char c) { + if(isprint(c) || (c == '\t') || (c == '\r') || (c == '\n')) + return(1); + else + return(0); +} + +/* *********************************************** */ + +static void ndpi_http_check_human_redeable_content(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow, + const u_int8_t *content, u_int16_t content_len) { + if(content_len >= 4) { + NDPI_LOG_DBG(ndpi_struct, " [len: %u] [%02X %02X %02X %02X][%c%c%c%c]", content_len, + content[0], content[1], content[2], content[3], + content[0], content[1], content[2], content[3] + ); + + if(ndpi_http_is_print(content[0]) && ndpi_http_is_print(content[1]) + && ndpi_http_is_print(content[2]) && ndpi_http_is_print(content[3])) { + /* OK */ + } else { + /* Looks bad: last resort check if it's gzipped [1F 8B 08 00] */ + + if((content[0] == 0x1F) + && (content[1] == 0x8B) + && (content[2] == 0x08) + && (content[3] == 0x00)) { + /* Looks like compressed data */ + } else { + char str[32]; + + snprintf(str, sizeof(str), "Susp content %02X%02X%02X%02X", + content[0], content[1], content[2], content[3]); + ndpi_set_risk(ndpi_struct, flow, NDPI_HTTP_SUSPICIOUS_CONTENT, str); + } + } + } +} + +/* *********************************************** */ + +static void ndpi_validate_http_content(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) { + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + const u_int8_t *double_ret = (const u_int8_t *)ndpi_strnstr((const char *)packet->payload, "\r\n\r\n", packet->payload_packet_len); + + NDPI_LOG_DBG(ndpi_struct, "==>>> [len: %u] ", packet->payload_packet_len); + NDPI_LOG_DBG(ndpi_struct, "->> %.*s\n", packet->content_line.len, (const char *)packet->content_line.ptr); + + if(double_ret) { + u_int len; + + len = packet->payload_packet_len - (double_ret - packet->payload); + + if(ndpi_strnstr((const char *)packet->content_line.ptr, "text/", packet->content_line.len) + || ndpi_strnstr((const char *)packet->content_line.ptr, "/json", packet->content_line.len) + || ndpi_strnstr((const char *)packet->content_line.ptr, "x-www-form-urlencoded", packet->content_line.len) + ) { + /* This is supposed to be a human-readeable text file */ + + packet->http_check_content = 1; + + if(len >= 8 /* 4 chars for \r\n\r\n and at least 4 charts for content guess */) { + double_ret += 4; + + ndpi_http_check_human_redeable_content(ndpi_struct, flow, double_ret, len); + } + } + + /* Final checks */ + + if(ndpi_isset_risk(ndpi_struct, flow, NDPI_BINARY_APPLICATION_TRANSFER) + && flow->http.user_agent && flow->http.content_type) { + if(((strncmp((const char *)flow->http.user_agent, "Java/", 5) == 0)) + && + ((strcmp((const char *)flow->http.content_type, "application/java-vm") == 0)) + ) { + /* + Java downloads Java: Log4J: + https://corelight.com/blog/detecting-log4j-exploits-via-zeek-when-java-downloads-java + */ + + ndpi_set_risk(ndpi_struct, flow, NDPI_POSSIBLE_EXPLOIT, "Suspicious Log4J"); + } + } + + NDPI_LOG_DBG(ndpi_struct, "\n"); + } + + if((flow->http.user_agent == NULL) || (flow->http.user_agent[0] == '\0')) + ndpi_set_risk(ndpi_struct, flow, NDPI_HTTP_SUSPICIOUS_USER_AGENT, "Empty or missing User-Agent"); +} + +/* *********************************************** */ + +/* https://www.freeformatter.com/mime-types-list.html */ +static ndpi_protocol_category_t ndpi_http_check_content(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) { + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + + if(packet->content_line.len > 0) { + u_int app_len = sizeof("application"); + + if(packet->content_line.len > app_len) { + const char *app = (const char *)&packet->content_line.ptr[app_len]; + u_int app_len_avail = packet->content_line.len-app_len; + + if(strncasecmp(app, "mpeg", app_len_avail) == 0) { + flow->guessed_category = flow->category = NDPI_PROTOCOL_CATEGORY_STREAMING; + return(flow->category); + } else { + if(app_len_avail > 3) { + const char** cmp_mimes = NULL; + + switch(app[0]) { + case 'b': cmp_mimes = download_file_mimes_b; break; + case 'o': cmp_mimes = download_file_mimes_o; break; + case 'x': cmp_mimes = download_file_mimes_x; break; + } + + if(cmp_mimes != NULL) { + u_int8_t i; + + for(i = 0; cmp_mimes[i] != NULL; i++) { + if(strncasecmp(app, cmp_mimes[i], app_len_avail) == 0) { + flow->guessed_category = flow->category = NDPI_PROTOCOL_CATEGORY_DOWNLOAD_FT; + NDPI_LOG_INFO(ndpi_struct, "found executable HTTP transfer"); + break; + } + } + } + + /* ***************************************** */ + + switch(app[0]) { + case 'e': cmp_mimes = binary_file_mimes_e; break; + case 'j': cmp_mimes = binary_file_mimes_j; break; + case 'v': cmp_mimes = binary_file_mimes_v; break; + case 'x': cmp_mimes = binary_file_mimes_x; break; + } + + if(cmp_mimes != NULL) { + u_int8_t i; + + for(i = 0; cmp_mimes[i] != NULL; i++) { + if(strncasecmp(app, cmp_mimes[i], app_len_avail) == 0) { + char str[64]; + + snprintf(str, sizeof(str), "Found mime exe %s", cmp_mimes[i]); + flow->guessed_category = flow->category = NDPI_PROTOCOL_CATEGORY_DOWNLOAD_FT; + ndpi_set_binary_application_transfer(ndpi_struct, flow, str); + NDPI_LOG_INFO(ndpi_struct, "Found executable HTTP transfer"); + return(flow->category); + } + } + } + } + + ndpi_validate_http_content(ndpi_struct, flow); + } + } + + /* check for attachment */ + if(packet->content_disposition_line.len > 0) { + u_int8_t attachment_len = sizeof("attachment; filename"); + + if(packet->content_disposition_line.len > attachment_len) { + u_int8_t filename_len = packet->content_disposition_line.len - attachment_len; + int i; + + if(filename_len > ATTACHMENT_LEN) { + attachment_len += filename_len-ATTACHMENT_LEN-1; + + if((attachment_len+ATTACHMENT_LEN) <= packet->content_disposition_line.len) { + for(i = 0; binary_file_ext[i] != NULL; i++) { + /* Use memcmp in case content-disposition contains binary data */ + if(memcmp(&packet->content_disposition_line.ptr[attachment_len], + binary_file_ext[i], ATTACHMENT_LEN) == 0) { + char str[64]; + + snprintf(str, sizeof(str), "Found file extn %s", binary_file_ext[i]); + flow->guessed_category = flow->category = NDPI_PROTOCOL_CATEGORY_DOWNLOAD_FT; + ndpi_set_binary_application_transfer(ndpi_struct, flow, str); + NDPI_LOG_INFO(ndpi_struct, "found executable HTTP transfer"); + return(flow->category); + } + } + } + } + } + } + + switch(packet->content_line.ptr[0]) { + case 'a': + if(strncasecmp((const char *)packet->content_line.ptr, "audio", + ndpi_min(packet->content_line.len, 5)) == 0) + flow->guessed_category = flow->category = NDPI_PROTOCOL_CATEGORY_MEDIA; + break; + + case 'v': + if(strncasecmp((const char *)packet->content_line.ptr, "video", + ndpi_min(packet->content_line.len, 5)) == 0) + flow->guessed_category = flow->category = NDPI_PROTOCOL_CATEGORY_MEDIA; + break; + } + } + + return(flow->category); +} + +/* *********************************************** */ + +static void ndpi_int_http_add_connection(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow, + u_int16_t http_protocol, + ndpi_protocol_category_t category) { + u_int16_t master_protocol; + +#ifdef HTTP_DEBUG + printf("=> %s()\n", __FUNCTION__); +#endif + + master_protocol = NDPI_PROTOCOL_HTTP; + if(flow->detected_protocol_stack[1] != NDPI_PROTOCOL_UNKNOWN) + master_protocol = flow->detected_protocol_stack[1]; + else if(flow->detected_protocol_stack[0] == NDPI_PROTOCOL_HTTP_CONNECT || + flow->detected_protocol_stack[0] == NDPI_PROTOCOL_HTTP_PROXY) + master_protocol = flow->detected_protocol_stack[0]; + + /* Update the classification only if we don't already have master + app; + for example don't change the protocols if we have already detected a + sub-protocol via the (content-matched) subprotocols logic (i.e. + MPEGDASH, SOAP, ....) */ + if(flow->detected_protocol_stack[1] == 0) + ndpi_set_detected_protocol(ndpi_struct, flow, http_protocol, + master_protocol, + NDPI_CONFIDENCE_DPI); + + flow->max_extra_packets_to_check = 8; + flow->extra_packets_func = ndpi_search_http_tcp_again; + flow->http_detected = 1; + + switch(flow->detected_protocol_stack[1]) { + case NDPI_PROTOCOL_HTTP_CONNECT: + case NDPI_PROTOCOL_HTTP_PROXY: + if(flow->detected_protocol_stack[0] == NDPI_PROTOCOL_HTTP) { + flow->detected_protocol_stack[0] = flow->detected_protocol_stack[1]; + flow->detected_protocol_stack[1] = NDPI_PROTOCOL_UNKNOWN; + } + break; + } +} + +/* ************************************************************* */ + +static void setHttpUserAgent(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow, char *ua) { + if( !strcmp(ua, "Windows NT 5.0")) ua = "Windows 2000"; + else if(!strcmp(ua, "Windows NT 5.1")) ua = "Windows XP"; + else if(!strcmp(ua, "Windows NT 5.2")) ua = "Windows Server 2003"; + else if(!strcmp(ua, "Windows NT 6.0")) ua = "Windows Vista"; + else if(!strcmp(ua, "Windows NT 6.1")) ua = "Windows 7"; + else if(!strcmp(ua, "Windows NT 6.2")) ua = "Windows 8"; + else if(!strcmp(ua, "Windows NT 6.3")) ua = "Windows 8.1"; + else if(!strcmp(ua, "Windows NT 10.0")) ua = "Windows 10"; + + /* Good reference for future implementations: + * https://github.com/ua-parser/uap-core/blob/master/regexes.yaml */ + + if(flow->http.detected_os == NULL) + flow->http.detected_os = ndpi_strdup(ua); +} + +/* ************************************************************* */ + +static void ndpi_http_parse_subprotocol(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) { + u_int16_t master_protocol; + + if((flow->l4.tcp.http_stage == 0) || (flow->http.url && flow->http_detected)) { + char *double_col = strchr((char*)flow->host_server_name, ':'); + int a, b, c, d; + + if(double_col) double_col[0] = '\0'; + + if(ndpi_struct->packet.iph + && (sscanf(flow->host_server_name, "%d.%d.%d.%d", &a, &b, &c, &d) == 4)) { + /* IPv4 */ + + if(ndpi_struct->packet.iph->daddr != inet_addr(flow->host_server_name)) { + char buf[64], msg[128]; + + snprintf(msg, sizeof(msg), "Expected %s, found %s", + ndpi_intoav4(ntohl(ndpi_struct->packet.iph->daddr), buf, sizeof(buf)), flow->host_server_name); + ndpi_set_risk(ndpi_struct, flow, NDPI_HTTP_SUSPICIOUS_HEADER, msg); + } + } + + master_protocol = NDPI_PROTOCOL_HTTP; + if(flow->detected_protocol_stack[1] != NDPI_PROTOCOL_UNKNOWN) + master_protocol = flow->detected_protocol_stack[1]; + else if(flow->detected_protocol_stack[0] == NDPI_PROTOCOL_HTTP_CONNECT || + flow->detected_protocol_stack[0] == NDPI_PROTOCOL_HTTP_PROXY) + master_protocol = flow->detected_protocol_stack[0]; + + if(ndpi_match_hostname_protocol(ndpi_struct, flow, + master_protocol, + flow->host_server_name, + strlen(flow->host_server_name)) == 0) { + if(flow->http.url && + ((strstr(flow->http.url, ":8080/downloading?n=0.") != NULL) + || (strstr(flow->http.url, ":8080/upload?n=0.") != NULL))) { + /* This looks like Ookla speedtest */ + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_OOKLA, master_protocol, NDPI_CONFIDENCE_DPI); + } + } + + if (flow->http.url != NULL && + strstr(flow->http.url, "micloud.xiaomi.net") != NULL) + { + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_XIAOMI, master_protocol, NDPI_CONFIDENCE_DPI); + } + } +} + +/* ************************************************************* */ + +static void ndpi_check_user_agent(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow, + char const *ua, size_t ua_len) { + char *double_slash; + + if((!ua) || (ua[0] == '\0')) + return; + + if (ua_len > 12) + { + size_t i, upper_case_count = 0; + + for (i = 0; i < ua_len; ++i) + { + /* + * We assume at least one non alpha char. + * e.g. ' ', '-' or ';' ... + */ + if (isalpha(ua[i]) == 0) + { + break; + } + if (isupper(ua[i]) != 0) + { + upper_case_count++; + } + } + + if (i == ua_len) { + float upper_case_ratio = (float)upper_case_count / (float)ua_len; + + if (upper_case_ratio >= 0.2f) { + char str[64]; + + snprintf(str, sizeof(str), "UA %s", ua); + ndpi_set_risk(ndpi_struct, flow, NDPI_HTTP_SUSPICIOUS_USER_AGENT, str); + } + } + } + + if((!strncmp(ua, " 256) /* Too long */ + || (!strncmp(ua, "test", 4)) + || strchr(ua, '{') + || strchr(ua, '}') + ) { + ndpi_set_risk(ndpi_struct, flow, NDPI_HTTP_SUSPICIOUS_USER_AGENT, "Suspicious Log4J"); + } + + /* + Mozilla/5.0 (compatible; YandexBot/3.0; +http://yandex.com/bots) + Amazon-Route53-Health-Check-Service (ref 68784dad-be98-49e4-a63c-9fbbe2816d7c; report http://amzn.to/1vsZADi) + Anonymous Crawler/1.0 (Webcrawler developed with StormCrawler; http://example.com/; webcrawler@example.com) + */ + if((strstr(ua, "+http") != NULL) + || (strstr(ua, " http") != NULL) + || ndpi_strncasestr(ua, "Crawler", ua_len) + || ndpi_strncasestr(ua, "Bot", ua_len) /* bot/robot */ + ) { + char str[64]; + + snprintf(str, sizeof(str), "UA %s", ua); + + ndpi_set_risk(ndpi_struct, flow, NDPI_HTTP_CRAWLER_BOT, str); + } +} + +/* ************************************************************* */ + +int http_process_user_agent(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow, + const u_int8_t *ua_ptr, u_int16_t ua_ptr_len) { + /** + Format examples: + Mozilla/5.0 (iPad; U; CPU OS 3_2 like Mac OS X; en-us) AppleWebKit/531.21.10 (KHTML, like Gecko) .... + Mozilla/5.0 (X11; Ubuntu; Linux x86_64; rv:54.0) Gecko/20100101 Firefox/54.0 + */ + if(ua_ptr_len > 7) { + char ua[256]; + u_int mlen = ndpi_min(ua_ptr_len, sizeof(ua)-1); + + strncpy(ua, (const char *)ua_ptr, mlen); + ua[mlen] = '\0'; + + if(strncmp(ua, "Mozilla", 7) == 0) { + char *parent = strchr(ua, '('); + + if(parent) { + char *token, *end; + + parent++; + end = strchr(parent, ')'); + if(end) end[0] = '\0'; + + token = strsep(&parent, ";"); + if(token) { + if((strcmp(token, "X11") == 0) + || (strcmp(token, "compatible") == 0) + || (strcmp(token, "Linux") == 0) + || (strcmp(token, "Macintosh") == 0) + ) { + token = strsep(&parent, ";"); + if(token && (token[0] == ' ')) token++; /* Skip space */ + + if(token + && ((strcmp(token, "U") == 0) + || (strncmp(token, "MSIE", 4) == 0))) { + token = strsep(&parent, ";"); + if(token && (token[0] == ' ')) token++; /* Skip space */ + + if(token && (strncmp(token, "Update", 6) == 0)) { + token = strsep(&parent, ";"); + + if(token && (token[0] == ' ')) token++; /* Skip space */ + + if(token && (strncmp(token, "AOL", 3) == 0)) { + + token = strsep(&parent, ";"); + if(token && (token[0] == ' ')) token++; /* Skip space */ + } + } + } + } + + if(token) + setHttpUserAgent(ndpi_struct, flow, token); + } + } + } + } + + if(ndpi_user_agent_set(flow, ua_ptr, ua_ptr_len) != NULL) + ndpi_check_user_agent(ndpi_struct, flow, flow->http.user_agent, ua_ptr_len); + else + NDPI_LOG_DBG2(ndpi_struct, "Could not set HTTP user agent\n"); + + NDPI_LOG_DBG2(ndpi_struct, "User Agent Type line found %.*s\n", + ua_ptr_len, ua_ptr); + return 0; +} + +/* ************************************************************* */ + +static void ndpi_check_numeric_ip(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow, + char *ip, u_int ip_len) { + char buf[22], *double_dot; + struct in_addr ip_addr; + + strncpy(buf, ip, ip_len); + buf[ip_len] = '\0'; + + if((double_dot = strchr(buf, ':')) != NULL) + double_dot[0] = '\0'; + + ip_addr.s_addr = inet_addr(buf); + if(strcmp(inet_ntoa(ip_addr), buf) == 0) { + char str[64]; + + snprintf(str, sizeof(str), "Found host %s", buf); + ndpi_set_risk(ndpi_struct, flow, NDPI_HTTP_NUMERIC_IP_HOST, str); + } +} + +/* ************************************************************* */ + +static void ndpi_check_http_url(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow, + char *url) { + if(strstr(url, "") != NULL /* PHP code in the URL */) + ndpi_set_risk(ndpi_struct, flow, NDPI_URL_POSSIBLE_RCE_INJECTION, "PHP code in URL"); + else if(strncmp(url, "/shell?", 7) == 0) + ndpi_set_risk(ndpi_struct, flow, NDPI_URL_POSSIBLE_RCE_INJECTION, "Possible WebShell detected"); + else if(strncmp(url, "/.", 2) == 0) + ndpi_set_risk(ndpi_struct, flow, NDPI_POSSIBLE_EXPLOIT, "URL starting with dot"); +} + +/* ************************************************************* */ + +#define MIN_APACHE_VERSION 2004000 /* 2.4.X [https://endoflife.date/apache] */ +#define MIN_NGINX_VERSION 1022000 /* 1.22.0 [https://endoflife.date/nginx] */ + +static void ndpi_check_http_server(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow, + const char *server, u_int server_len) { + if(server_len > 7) { + u_int off; + + if(strncmp((const char *)server, "ntopng ", 7) == 0) { + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_NTOP, NDPI_PROTOCOL_HTTP, NDPI_CONFIDENCE_DPI); + NDPI_CLR_BIT(flow->risk, NDPI_KNOWN_PROTOCOL_ON_NON_STANDARD_PORT); + } else if((strncasecmp(server, "Apache/", off = 7) == 0) /* X.X.X */ + || (strncasecmp(server, "nginx/", off = 6) == 0) /* X.X.X */) { + u_int i, j, a, b, c; + char buf[16] = { '\0' }; + + for(i=off, j=0; (ipacket; + int ret; + + if(flow->http_detected && (flow->http.response_status_code != 0)) + return; + + if((flow->http.url == NULL) + && (packet->http_url_name.len > 0) + && (packet->host_line.len > 0)) { + int len = packet->http_url_name.len + packet->host_line.len + 1; + + if(isdigit(packet->host_line.ptr[0]) + && (packet->host_line.len < 21)) + ndpi_check_numeric_ip(ndpi_struct, flow, (char*)packet->host_line.ptr, packet->host_line.len); + + flow->http.url = ndpi_malloc(len); + if(flow->http.url) { + u_int offset = 0, host_end = 0; + + if(flow->detected_protocol_stack[0] == NDPI_PROTOCOL_HTTP_CONNECT) { + strncpy(flow->http.url, (char*)packet->http_url_name.ptr, + packet->http_url_name.len); + + flow->http.url[packet->http_url_name.len] = '\0'; + } else { + /* Check if we pass through a proxy (usually there is also the Via: ... header) */ + if(strncmp((char*)packet->http_url_name.ptr, "http://", 7) != 0) { + strncpy(flow->http.url, (char*)packet->host_line.ptr, offset = packet->host_line.len); + host_end = packet->host_line.len; + } + + if((packet->host_line.len == packet->http_url_name.len) + && (strncmp((char*)packet->host_line.ptr, + (char*)packet->http_url_name.ptr, packet->http_url_name.len) == 0)) + ; + else { + strncpy(&flow->http.url[offset], (char*)packet->http_url_name.ptr, + packet->http_url_name.len); + offset += packet->http_url_name.len; + } + + flow->http.url[offset] = '\0'; + } + + ndpi_check_http_url(ndpi_struct, flow, &flow->http.url[host_end]); + } + + flow->http.method = ndpi_http_str2method((const char*)packet->http_method.ptr, + (u_int16_t)packet->http_method.len); + + if((flow->http.method == NDPI_HTTP_METHOD_RPC_IN_DATA) + || (flow->http.method == NDPI_HTTP_METHOD_RPC_OUT_DATA)) { + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_RPC, flow->detected_protocol_stack[0], NDPI_CONFIDENCE_DPI); + check_content_type_and_change_protocol(ndpi_struct, flow); + } + } + + if(packet->server_line.ptr != NULL) + ndpi_check_http_server(ndpi_struct, flow, (const char *)packet->server_line.ptr, packet->server_line.len); + + if(packet->user_agent_line.ptr != NULL && packet->user_agent_line.len != 0) { + ret = http_process_user_agent(ndpi_struct, flow, packet->user_agent_line.ptr, packet->user_agent_line.len); + /* TODO: Is it correct to avoid setting ua, host_name,... if we have a (Netflix) subclassification? */ + if(ret != 0) + return; + } + + /* check for host line */ + if(packet->host_line.ptr != NULL) { + u_int len; + + NDPI_LOG_DBG2(ndpi_struct, "HOST line found %.*s\n", + packet->host_line.len, packet->host_line.ptr); + + /* Copy result for nDPI apps */ + ndpi_hostname_sni_set(flow, packet->host_line.ptr, packet->host_line.len); + + if(strlen(flow->host_server_name) > 0) { + if(ndpi_is_valid_hostname(flow->host_server_name, + strlen(flow->host_server_name)) == 0) { + char str[128]; + + snprintf(str, sizeof(str), "Invalid host %s", flow->host_server_name); + ndpi_set_risk(ndpi_struct, flow, NDPI_INVALID_CHARACTERS, str); + + /* This looks like an attack */ + ndpi_set_risk(ndpi_struct, flow, NDPI_POSSIBLE_EXPLOIT, NULL); + } + } + + if(packet->forwarded_line.ptr) { + if(flow->http.nat_ip == NULL) { + len = packet->forwarded_line.len; + flow->http.nat_ip = ndpi_malloc(len + 1); + if(flow->http.nat_ip != NULL) { + strncpy(flow->http.nat_ip, (char*)packet->forwarded_line.ptr, len); + flow->http.nat_ip[len] = '\0'; + } + } + } + + ndpi_http_parse_subprotocol(ndpi_struct, flow); + + if(strlen(flow->host_server_name) > 0) { + ndpi_check_dga_name(ndpi_struct, flow, flow->host_server_name, 1, 0); + } + + if((flow->detected_protocol_stack[0] == NDPI_PROTOCOL_UNKNOWN) + && (flow->http_detected) + && (packet->http_origin.len > 0)) { + ndpi_protocol_match_result ret_match; + + ndpi_match_host_subprotocol(ndpi_struct, flow, + (char *)packet->http_origin.ptr, + packet->http_origin.len, + &ret_match, + NDPI_PROTOCOL_HTTP); + } + + if(flow->detected_protocol_stack[1] != NDPI_PROTOCOL_UNKNOWN) { + if((flow->detected_protocol_stack[1] != NDPI_PROTOCOL_HTTP) + && (flow->detected_protocol_stack[1] != NDPI_PROTOCOL_HTTP_CONNECT) + && (flow->detected_protocol_stack[1] != NDPI_PROTOCOL_HTTP_PROXY)) { + NDPI_LOG_INFO(ndpi_struct, "found HTTP/%s\n", + ndpi_get_proto_name(ndpi_struct, flow->detected_protocol_stack[0])); + ndpi_int_http_add_connection(ndpi_struct, flow, flow->detected_protocol_stack[0], NDPI_PROTOCOL_CATEGORY_WEB); + return; /* We have identified a sub-protocol so we're done */ + } + } + } + + if(flow->guessed_protocol_id == NDPI_PROTOCOL_UNKNOWN) + flow->guessed_protocol_id = NDPI_PROTOCOL_HTTP; + + /* check for accept line */ + if(packet->accept_line.ptr != NULL) { + NDPI_LOG_DBG2(ndpi_struct, "Accept line found %.*s\n", + packet->accept_line.len, packet->accept_line.ptr); + } + + /* check for authorization line */ + if(packet->authorization_line.ptr != NULL) { + NDPI_LOG_DBG2(ndpi_struct, "Authorization line found %.*s\n", + packet->authorization_line.len, packet->authorization_line.ptr); + + if(ndpi_strncasestr((const char*)packet->authorization_line.ptr, + "Basic", packet->authorization_line.len) + || ndpi_strncasestr((const char*)packet->authorization_line.ptr, + "Digest", packet->authorization_line.len)) { + ndpi_set_risk(ndpi_struct, flow, NDPI_CLEAR_TEXT_CREDENTIALS, + "Found credentials in HTTP Auth Line"); + } + } + + if(packet->content_line.ptr != NULL && packet->content_line.len != 0) { + NDPI_LOG_DBG2(ndpi_struct, "Content Type line found %.*s\n", + packet->content_line.len, packet->content_line.ptr); + + if(flow->http.response_status_code == 0) { + /* Request */ + if((flow->http.request_content_type == NULL) && (packet->content_line.len > 0)) { + int len = packet->content_line.len + 1; + + flow->http.request_content_type = ndpi_malloc(len); + if(flow->http.request_content_type) { + strncpy(flow->http.request_content_type, (char*)packet->content_line.ptr, + packet->content_line.len); + flow->http.request_content_type[packet->content_line.len] = '\0'; + } + } + } else { + /* Response */ + if((flow->http.content_type == NULL) && (packet->content_line.len > 0)) { + int len = packet->content_line.len + 1; + + flow->http.content_type = ndpi_malloc(len); + if(flow->http.content_type) { + strncpy(flow->http.content_type, (char*)packet->content_line.ptr, + packet->content_line.len); + flow->http.content_type[packet->content_line.len] = '\0'; + + flow->guessed_category = flow->category = ndpi_http_check_content(ndpi_struct, flow); + } + } + + if((flow->http.server == NULL) && (packet->server_line.len > 0)) { + int len = packet->server_line.len + 1; + + flow->http.server = ndpi_malloc(len); + if(flow->http.server) { + strncpy(flow->http.server, (char*)packet->server_line.ptr, + packet->server_line.len); + flow->http.server[packet->server_line.len] = '\0'; + } + } + } + + if(flow->http_detected && packet->content_line.ptr && *(char*)packet->content_line.ptr) { + /* Matching on Content-Type. + OCSP: application/ocsp-request, application/ocsp-response + */ + if(packet->content_line.len > 17 && + strncmp((const char *)packet->content_line.ptr, "application/ocsp-", 17) == 0) { + NDPI_LOG_DBG2(ndpi_struct, "Found OCSP\n"); + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_OCSP, NDPI_PROTOCOL_HTTP, NDPI_CONFIDENCE_DPI); + } + } + } + + if(packet->user_agent_line.ptr != NULL && packet->user_agent_line.len != 0 && + flow->http.url) { + /* WindowsUpdate over some kind of CDN */ + if(flow->detected_protocol_stack[1] == NDPI_PROTOCOL_UNKNOWN && + flow->detected_protocol_stack[0] == NDPI_PROTOCOL_HTTP && + (strstr(flow->http.url, "delivery.mp.microsoft.com/") || + strstr(flow->http.url, "download.windowsupdate.com/")) && + ndpi_strnstr((const char *)packet->user_agent_line.ptr, "Microsoft-Delivery-Optimization/", + packet->user_agent_line.len) && + ndpi_isset_risk(ndpi_struct, flow, NDPI_HTTP_NUMERIC_IP_HOST)) { + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_WINDOWS_UPDATE, NDPI_PROTOCOL_HTTP, NDPI_CONFIDENCE_DPI); + } + } + + if(ndpi_get_http_method(ndpi_struct, flow) != NDPI_HTTP_METHOD_UNKNOWN) { + ndpi_int_http_add_connection(ndpi_struct, flow, flow->detected_protocol_stack[0], NDPI_PROTOCOL_CATEGORY_WEB); + } +} + +/* ************************************************************* */ + +static void check_http_payload(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) { + /* Add here your payload code check */ +} + +/* ************************************************************* */ + +#ifdef NDPI_ENABLE_DEBUG_MESSAGES +static uint8_t non_ctrl(uint8_t c) { + return c < 32 ? '.':c; +} +#endif + +/* ************************************************************* */ + +/** + * Functions to check whether the packet begins with a valid http request + * @param ndpi_struct + * @returnvalue 0 if no valid request has been found + * @returnvalue >0 indicates start of filename but not necessarily in packet limit + */ + +#define STATIC_STRING_L(a) {.str=a, .len=sizeof(a)-1 } + +static struct l_string { + const char *str; + size_t len; +} http_methods[] = { + STATIC_STRING_L("GET "), + STATIC_STRING_L("POST "), + STATIC_STRING_L("OPTIONS "), + STATIC_STRING_L("HEAD "), + STATIC_STRING_L("PUT "), + STATIC_STRING_L("PATCH "), + STATIC_STRING_L("DELETE "), + STATIC_STRING_L("CONNECT "), + STATIC_STRING_L("PROPFIND "), + STATIC_STRING_L("REPORT "), + STATIC_STRING_L("RPC_IN_DATA "), STATIC_STRING_L("RPC_OUT_DATA ") +}; +static const char *http_fs = "CDGHOPR"; + +static u_int16_t http_request_url_offset(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) +{ + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + unsigned int i; + + NDPI_LOG_DBG2(ndpi_struct, "====>>>> HTTP: %c%c%c%c [len: %u]\n", + packet->payload_packet_len > 0 ? non_ctrl(packet->payload[0]) : '.', + packet->payload_packet_len > 1 ? non_ctrl(packet->payload[1]) : '.', + packet->payload_packet_len > 2 ? non_ctrl(packet->payload[2]) : '.', + packet->payload_packet_len > 3 ? non_ctrl(packet->payload[3]) : '.', + packet->payload_packet_len); + + /* Check first char */ + if(!packet->payload_packet_len || !strchr(http_fs,packet->payload[0])) + return 0; + + /** + FIRST PAYLOAD PACKET FROM CLIENT + **/ + for(i=0; i < sizeof(http_methods)/sizeof(http_methods[0]); i++) { + if(packet->payload_packet_len >= http_methods[i].len && + strncasecmp((const char*)packet->payload,http_methods[i].str,http_methods[i].len) == 0) { + size_t url_start = http_methods[i].len; + while (url_start < packet->payload_packet_len && + url_start < http_methods[i].len + 2048 && /* We assume 2048 chars as maximum for URLs. */ + packet->payload[url_start] == ' ') { url_start++; } + NDPI_LOG_DBG2(ndpi_struct, "HTTP: %sFOUND\n",http_methods[i].str); + return url_start; + } + } + return 0; +} + +static void http_bitmask_exclude_other(struct ndpi_flow_struct *flow) +{ + NDPI_ADD_PROTOCOL_TO_BITMASK(flow->excluded_protocol_bitmask, NDPI_PROTOCOL_XBOX); +} + +/* *********************************************************************************************** */ + +/* Trick to speed-up detection */ +static const char* suspicious_http_header_keys_A[] = { "Arch", NULL}; +static const char* suspicious_http_header_keys_C[] = { "Cores", NULL}; +static const char* suspicious_http_header_keys_M[] = { "Mem", NULL}; +static const char* suspicious_http_header_keys_O[] = { "Os", "Osname", "Osversion", NULL}; +static const char* suspicious_http_header_keys_R[] = { "Root", NULL}; +static const char* suspicious_http_header_keys_S[] = { "S", NULL}; +static const char* suspicious_http_header_keys_T[] = { "TLS_version", NULL}; +static const char* suspicious_http_header_keys_U[] = { "Uuid", NULL}; +static const char* suspicious_http_header_keys_X[] = { "X-Hire-Me", NULL}; + +static int is_a_suspicious_header(const char* suspicious_headers[], struct ndpi_int_one_line_struct packet_line){ + int i; + unsigned int header_len; + const u_int8_t* header_limit; + + if((header_limit = memchr(packet_line.ptr, ':', packet_line.len))) { + header_len = header_limit - packet_line.ptr; + for(i=0; suspicious_headers[i] != NULL; i++){ + if(!strncasecmp((const char*) packet_line.ptr, + suspicious_headers[i], header_len)) + return 1; + } + } + + return 0; +} + +/* *********************************************************************************************** */ + +static void ndpi_check_http_header(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) { + u_int32_t i; + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + + for(i=0; (i < packet->parsed_lines) + && (packet->line[i].ptr != NULL) + && (packet->line[i].len > 0); i++) { + switch(packet->line[i].ptr[0]){ + case 'A': + if(is_a_suspicious_header(suspicious_http_header_keys_A, packet->line[i])) { + char str[64]; + + snprintf(str, sizeof(str), "Found %.*s", packet->line[i].len, packet->line[i].ptr); + ndpi_set_risk(ndpi_struct, flow, NDPI_HTTP_SUSPICIOUS_HEADER, str); + return; + } + break; + case 'C': + if(is_a_suspicious_header(suspicious_http_header_keys_C, packet->line[i])) { + char str[64]; + + snprintf(str, sizeof(str), "Found %.*s", packet->line[i].len, packet->line[i].ptr); + ndpi_set_risk(ndpi_struct, flow, NDPI_HTTP_SUSPICIOUS_HEADER, str); + return; + } + break; + case 'M': + if(is_a_suspicious_header(suspicious_http_header_keys_M, packet->line[i])) { + char str[64]; + + snprintf(str, sizeof(str), "Found %.*s", packet->line[i].len, packet->line[i].ptr); + ndpi_set_risk(ndpi_struct, flow, NDPI_HTTP_SUSPICIOUS_HEADER, str); + return; + } + break; + case 'O': + if(is_a_suspicious_header(suspicious_http_header_keys_O, packet->line[i])) { + char str[64]; + + snprintf(str, sizeof(str), "Found %.*s", packet->line[i].len, packet->line[i].ptr); + ndpi_set_risk(ndpi_struct, flow, NDPI_HTTP_SUSPICIOUS_HEADER, str); + return; + } + break; + case 'R': + if(is_a_suspicious_header(suspicious_http_header_keys_R, packet->line[i])) { + char str[64]; + + snprintf(str, sizeof(str), "Found %.*s", packet->line[i].len, packet->line[i].ptr); + ndpi_set_risk(ndpi_struct, flow, NDPI_HTTP_SUSPICIOUS_HEADER, str); + return; + } + break; + case 'S': + if(is_a_suspicious_header(suspicious_http_header_keys_S, packet->line[i])) { + char str[64]; + + snprintf(str, sizeof(str), "Found %.*s", packet->line[i].len, packet->line[i].ptr); + ndpi_set_risk(ndpi_struct, flow, NDPI_HTTP_SUSPICIOUS_HEADER, str); + return; + } + break; + case 'T': + if(is_a_suspicious_header(suspicious_http_header_keys_T, packet->line[i])) { + char str[64]; + + snprintf(str, sizeof(str), "Found %.*s", packet->line[i].len, packet->line[i].ptr); + ndpi_set_risk(ndpi_struct, flow, NDPI_HTTP_SUSPICIOUS_HEADER, str); + return; + } + break; + case 'U': + if(is_a_suspicious_header(suspicious_http_header_keys_U, packet->line[i])) { + char str[64]; + + snprintf(str, sizeof(str), "Found %.*s", packet->line[i].len, packet->line[i].ptr); + ndpi_set_risk(ndpi_struct, flow, NDPI_HTTP_SUSPICIOUS_HEADER, str); + return; + } + break; + case 'X': + if(is_a_suspicious_header(suspicious_http_header_keys_X, packet->line[i])) { + char str[64]; + + snprintf(str, sizeof(str), "Found %.*s", packet->line[i].len, packet->line[i].ptr); + ndpi_set_risk(ndpi_struct, flow, NDPI_HTTP_SUSPICIOUS_HEADER, str); + return; + } + + break; + } + } +} + +/*************************************************************************************************/ + +static void ndpi_check_http_tcp(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) { + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + u_int16_t filename_start; /* the filename in the request method line, e.g., "GET filename_start..."*/ + + packet->packet_lines_parsed_complete = 0; + + if(packet->http_check_content && (packet->payload_packet_len > 0)) { + ndpi_http_check_human_redeable_content(ndpi_struct, flow, packet->payload, packet->payload_packet_len); + packet->http_check_content = 0; /* One packet is enough */ + } + + /* Check if we so far detected the protocol in the request or not. */ + if((packet->payload_packet_len > 0) /* Needed in case of extra packet processing */ + && (flow->l4.tcp.http_stage == 0)) { + /* Expected a request */ + flow->http_detected = 0; + + NDPI_LOG_DBG2(ndpi_struct, "HTTP stage %d: \n", flow->l4.tcp.http_stage); + + filename_start = http_request_url_offset(ndpi_struct, flow); + + if(filename_start == 0) { /* not a regular request. In the HTTP first stage, may be a truncated flow or other protocols */ + NDPI_LOG_DBG2(ndpi_struct, "Filename HTTP not found, we look for possible truncate flow..\n"); + + if(packet->payload_packet_len >= 7 && strncasecmp((const char *)packet->payload, "HTTP/1.", 7) == 0) { + NDPI_LOG_INFO(ndpi_struct, "found HTTP response\n"); + + if(packet->payload_packet_len >= 12) { + char buf[4]; + + /* Set server HTTP response code */ + strncpy(buf, (char*)&packet->payload[9], 3); + buf[3] = '\0'; + + flow->http.response_status_code = atoi(buf); + + /* https://en.wikipedia.org/wiki/List_of_HTTP_status_codes */ + if((flow->http.response_status_code < 100) || (flow->http.response_status_code > 509)) + flow->http.response_status_code = 0; /* Out of range */ + else if(flow->http.response_status_code >= 400) { + char ec[48]; + + if(flow->http.url != NULL) { + /* Let's check for Wordpress */ + char *slash = strchr(flow->http.url, '/'); + + if(slash != NULL && + (((flow->http.method == NDPI_HTTP_METHOD_POST) && (strncmp(slash, "/wp-admin/", 10) == 0)) + || ((flow->http.method == NDPI_HTTP_METHOD_GET) && (strncmp(slash, "/wp-content/uploads/", 20) == 0)) + )) { + /* Example of popular exploits https://www.wordfence.com/blog/2022/05/millions-of-attacks-target-tatsu-builder-plugin/ */ + ndpi_set_risk(ndpi_struct, flow, NDPI_POSSIBLE_EXPLOIT, "Possible Wordpress Exploit"); + } + } + + snprintf(ec, sizeof(ec), "HTTP Error Code %u", flow->http.response_status_code); + ndpi_set_risk(ndpi_struct, flow, NDPI_ERROR_CODE_DETECTED, ec); + } + + if(flow->flow_payload) { + char *endl; + + flow->flow_payload[flow->flow_payload_len] = '\0'; + if((endl = strrchr(flow->flow_payload, '\r')) == NULL) + endl = strrchr(flow->flow_payload, '\n'); + + if(endl != NULL) { + endl[0] = '\0'; + flow->flow_payload_len = endl - flow->flow_payload; + } + } + } + + ndpi_parse_packet_line_info(ndpi_struct, flow); + check_content_type_and_change_protocol(ndpi_struct, flow); + ndpi_validate_http_content(ndpi_struct, flow); + ndpi_int_http_add_connection(ndpi_struct, flow, NDPI_PROTOCOL_HTTP, NDPI_PROTOCOL_CATEGORY_WEB); + return; + } + + if((packet->payload_packet_len == 3) && memcmp(packet->payload, "HI\n", 3) == 0) { + /* This looks like Ookla: we don't give up with HTTP yet */ + flow->l4.tcp.http_stage = 1; + return; + } + + if((packet->payload_packet_len == 40) && (flow->l4.tcp.http_stage == 0)) { + /* + -> QR O06L0072-6L91-4O43-857J-K8OO172L6L51 + <- QNUUX 2.5 2017-08-15.1314.4jn12m5 + -> MXFWUXJM 31625365 + */ + + if((packet->payload[2] == ' ') + && (packet->payload[11] == '-') + && (packet->payload[16] == '-') + && (packet->payload[21] == '-') + && (packet->payload[26] == '-') + && (packet->payload[39] == 0x0A) + ) + flow->l4.tcp.http_stage = 1; + return; + } + + if((packet->payload_packet_len == 23) && (memcmp(packet->payload, "", 23) == 0)) { + /* + + + + + + */ + ookla_found: + ndpi_int_http_add_connection(ndpi_struct, flow, NDPI_PROTOCOL_OOKLA, NDPI_PROTOCOL_CATEGORY_WEB); + + if(ndpi_struct->ookla_cache != NULL) { + if(packet->iph != NULL) { + if(packet->tcp->source == htons(8080)) + ndpi_lru_add_to_cache(ndpi_struct->ookla_cache, packet->iph->saddr, 1 /* dummy */, ndpi_get_current_time(flow)); + else + ndpi_lru_add_to_cache(ndpi_struct->ookla_cache, packet->iph->daddr, 1 /* dummy */, ndpi_get_current_time(flow)); + } else if(packet->iphv6 != NULL) { + u_int32_t h; + + if(packet->tcp->source == htons(8080)) + h = ndpi_quick_hash((unsigned char *)&packet->iphv6->ip6_src, sizeof(packet->iphv6->ip6_src)); + else + h = ndpi_quick_hash((unsigned char *)&packet->iphv6->ip6_dst, sizeof(packet->iphv6->ip6_dst)); + + ndpi_lru_add_to_cache(ndpi_struct->ookla_cache, h, 1 /* dummy */, ndpi_get_current_time(flow)); + } + } + + return; + } + + /* try to get some additional request header info even if the packet may not be HTTP */ + ndpi_parse_packet_line_info(ndpi_struct, flow); + if(packet->http_num_headers > 0) { + check_content_type_and_change_protocol(ndpi_struct, flow); + return; + } + + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + http_bitmask_exclude_other(flow); + return; + } else { + /* This check is required as RTSP is pretty similiar to HTTP (prevent false-positives). */ + if (strncasecmp((const char *)packet->payload + filename_start, + "rtsp://", ndpi_min(7, packet->payload_packet_len - filename_start)) == 0) + { + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + return; + } else { + ndpi_int_http_add_connection(ndpi_struct, flow, NDPI_PROTOCOL_HTTP, NDPI_PROTOCOL_CATEGORY_WEB); + } + } + + NDPI_LOG_DBG2(ndpi_struct, + "Filename HTTP found: %d, we look for line info..\n", filename_start); + + ndpi_parse_packet_line_info(ndpi_struct, flow); + ndpi_check_http_header(ndpi_struct, flow); + + if(packet->parsed_lines <= 1) { + NDPI_LOG_DBG2(ndpi_struct, + "Found just one line, we will look further for the next packet...\n"); + + packet->http_method.ptr = packet->line[0].ptr; + packet->http_method.len = filename_start - 1; + + /* Encode the direction of the packet in the stage, so we will know when we need to look for the response packet. */ + flow->l4.tcp.http_stage = packet->packet_direction + 1; // packet_direction 0: stage 1, packet_direction 1: stage 2 + return; + } + + NDPI_LOG_DBG2(ndpi_struct, + "Found more than one line, we look further for the next packet...\n"); + + if(packet->line[0].len >= (9 + filename_start) + && strncasecmp((const char *)&packet->line[0].ptr[packet->line[0].len - 9], " HTTP/1.", 8) == 0) { + /* Request line complete. Ex. "GET / HTTP/1.1" */ + + packet->http_url_name.ptr = &packet->payload[filename_start]; + packet->http_url_name.len = packet->line[0].len - (filename_start + 9); + + packet->http_method.ptr = packet->line[0].ptr; + packet->http_method.len = filename_start - 1; + + // Set the HTTP requested version: 0=HTTP/1.0 and 1=HTTP/1.1 + if(memcmp(&packet->line[0].ptr[packet->line[0].len - 1], "1", 1) == 0) + flow->http.request_version = 1; + else + flow->http.request_version = 0; + + /* Check for Ookla */ + if((packet->referer_line.len > 0) + && ndpi_strnstr((const char *)packet->referer_line.ptr, "www.speedtest.net", packet->referer_line.len)) { + goto ookla_found; + } + + if((packet->http_url_name.len > 7) + && (!strncasecmp((const char*) packet->http_url_name.ptr, "http://", 7))) { + NDPI_LOG_INFO(ndpi_struct, "found HTTP_PROXY\n"); + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_UNKNOWN, NDPI_PROTOCOL_HTTP_PROXY, NDPI_CONFIDENCE_DPI); + check_content_type_and_change_protocol(ndpi_struct, flow); + flow->http_detected = 1; + flow->l4.tcp.http_stage = packet->packet_direction + 1; // packet_direction 0: stage 1, packet_direction 1: stage 2 + return; + } + + if(filename_start == 8 && (strncasecmp((const char *)packet->payload, "CONNECT ", 8) == 0)) { + NDPI_LOG_INFO(ndpi_struct, "found HTTP_CONNECT\n"); + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_UNKNOWN, NDPI_PROTOCOL_HTTP_CONNECT, NDPI_CONFIDENCE_DPI); + check_content_type_and_change_protocol(ndpi_struct, flow); + flow->http_detected = 1; + flow->l4.tcp.http_stage = packet->packet_direction + 1; // packet_direction 0: stage 1, packet_direction 1: stage 2 + return; + } + + NDPI_LOG_DBG2(ndpi_struct, + "HTTP START Found, we will look for sub-protocols (content and host)...\n"); + + if(packet->host_line.ptr != NULL) { + /** + nDPI is pretty scrupulous about HTTP so it waits until the + HTTP response is received just to check that it conforms + with the HTTP specs. However this might be a waste of time as + in 99.99% of the cases is like that. + */ + + /* if(!flow->http_detected) */ { + u_int proto = flow->detected_protocol_stack[1] ? flow->detected_protocol_stack[1] : flow->detected_protocol_stack[0]; + + if(proto == NDPI_PROTOCOL_UNKNOWN) proto = NDPI_PROTOCOL_HTTP; + ndpi_int_http_add_connection(ndpi_struct, flow, proto, NDPI_PROTOCOL_CATEGORY_WEB); + flow->http_detected = 1; + NDPI_LOG_DBG2(ndpi_struct, + "HTTP START Found, we will look further for the response...\n"); + flow->l4.tcp.http_stage = packet->packet_direction + 1; // packet_direction 0: stage 1, packet_direction 1: stage 2 + check_content_type_and_change_protocol(ndpi_struct, flow); + } + return; + } + } + + check_content_type_and_change_protocol(ndpi_struct, flow); + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + http_bitmask_exclude_other(flow); + } else if((flow->l4.tcp.http_stage == 1) || (flow->l4.tcp.http_stage == 2)) { + NDPI_LOG_DBG2(ndpi_struct, "HTTP stage %u: \n", flow->l4.tcp.http_stage); + + if((packet->payload_packet_len == 34) && (flow->l4.tcp.http_stage == 1)) { + if((packet->payload[5] == ' ') && (packet->payload[9] == ' ')) { + goto ookla_found; + } + } + + if((packet->payload_packet_len > 6) && memcmp(packet->payload, "HELLO ", 6) == 0) { + /* This looks like Ookla */ + goto ookla_found; + } else + NDPI_ADD_PROTOCOL_TO_BITMASK(flow->excluded_protocol_bitmask, NDPI_PROTOCOL_OOKLA); + + /** + At first check, if this is for sure a response packet + (in another direction. If not, if HTTP is detected do nothing now and return, + otherwise check the second packet for the HTTP request + */ + if((flow->l4.tcp.http_stage - packet->packet_direction) == 1) { /* Expected a response package */ + + if(flow->http_detected) + return; + + NDPI_LOG_DBG2(ndpi_struct, + " SECOND PAYLOAD TRAFFIC FROM CLIENT, FIRST PACKET MIGHT HAVE BEEN HTTP...UNKNOWN TRAFFIC, HERE FOR HTTP again.. \n"); + + ndpi_parse_packet_line_info(ndpi_struct, flow); + + if(packet->parsed_lines <= 1) { + /* wait some packets in case request is split over more than 2 packets */ + if(flow->packet_counter < 5) { + NDPI_LOG_DBG2(ndpi_struct, "line still not finished, search next packet\n"); + return; + } else { + /* stop parsing here */ + NDPI_LOG_DBG2(ndpi_struct, "exclude HTTP: PACKET DOES NOT HAVE A LINE STRUCTURE\n"); + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + http_bitmask_exclude_other(flow); + return; + } + } + // http://www.slideshare.net/DSPIP/rtsp-analysis-wireshark + if(packet->line[0].len >= 9 + && strncasecmp((const char *)&packet->line[0].ptr[packet->line[0].len - 9], " HTTP/1.", 8) == 0) { + + NDPI_LOG_INFO(ndpi_struct, "found HTTP\n"); + ndpi_int_http_add_connection(ndpi_struct, flow, NDPI_PROTOCOL_HTTP, NDPI_PROTOCOL_CATEGORY_WEB); + check_content_type_and_change_protocol(ndpi_struct, flow); + + NDPI_LOG_DBG2(ndpi_struct, + "HTTP START Found in 2. packet, we will look further for the response....\n"); + flow->http_detected = 1; + } + + return; + } + + /** + This is a packet in another direction. Check if we find the proper response. + We have received a response for a previously identified partial HTTP request + */ + + /* response without headers + * TODO: Shouldn't it be below ndpi_parse_packet_line_info, line ~825 ? + */ + if((packet->parsed_lines == 1) && (packet->packet_direction == 1 /* server -> client */)) { + /* In Apache if you do "GET /\n\n" the response comes without any header */ + NDPI_LOG_INFO(ndpi_struct, "found HTTP. (apache)\n"); + ndpi_int_http_add_connection(ndpi_struct, flow, NDPI_PROTOCOL_HTTP, NDPI_PROTOCOL_CATEGORY_WEB); + check_content_type_and_change_protocol(ndpi_struct, flow); + return; + } + + /* Parse packet line and we look for the subprotocols */ + ndpi_parse_packet_line_info(ndpi_struct, flow); + check_content_type_and_change_protocol(ndpi_struct, flow); + + if(packet->empty_line_position_set != 0 || flow->l4.tcp.http_empty_line_seen == 1) { + NDPI_LOG_DBG2(ndpi_struct, "empty line. check_http_payload\n"); + check_http_payload(ndpi_struct, flow); + } + + flow->l4.tcp.http_stage = 0; + return; + } +} + +/* ********************************* */ + +static void ndpi_search_http_tcp(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) { + /* Break after 20 packets. */ + if(flow->packet_counter > 20) { + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + http_bitmask_exclude_other(flow); + return; + } + + NDPI_LOG_DBG(ndpi_struct, "search HTTP\n"); + ndpi_check_http_tcp(ndpi_struct, flow); +} + +/* ********************************* */ + +ndpi_http_method ndpi_get_http_method(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) { + if(!flow) { + ndpi_set_risk(ndpi_struct, flow, NDPI_MALFORMED_PACKET, (char*)"Unknown HTTP Method"); + return(NDPI_HTTP_METHOD_UNKNOWN); + } else + return(flow->http.method); +} + +/* ********************************* */ + +char* ndpi_get_http_url(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) { + if((!flow) || (!flow->http.url)) + return(""); + else + return(flow->http.url); +} + +/* ********************************* */ + +char* ndpi_get_http_content_type(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) { + if((!flow) || (!flow->http.content_type)) + return(""); + else + return(flow->http.content_type); +} + + +void init_http_dissector(struct ndpi_detection_module_struct *ndpi_struct, u_int32_t *id) { + ndpi_set_bitmask_protocol_detection("HTTP",ndpi_struct, *id, + NDPI_PROTOCOL_HTTP, + ndpi_search_http_tcp, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_TCP_WITH_PAYLOAD_WITHOUT_RETRANSMISSION, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK); + *id += 1; +} diff --git a/src/components/implementation/simple_nf/ndpi/i3d.c b/src/components/implementation/simple_nf/ndpi/i3d.c new file mode 100644 index 0000000000..ba292c3d73 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/i3d.c @@ -0,0 +1,89 @@ +/* + * i3d.c + * + * Copyright (C) 2022-23 - ntop.org + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_I3D + +#include "ndpi_api.h" + +static void ndpi_int_i3d_add_connection(struct ndpi_detection_module_struct * const ndpi_struct, + struct ndpi_flow_struct * const flow) +{ + NDPI_LOG_INFO(ndpi_struct, "found i3D\n"); + ndpi_set_detected_protocol(ndpi_struct, flow, + NDPI_PROTOCOL_UNKNOWN, + NDPI_PROTOCOL_I3D, + NDPI_CONFIDENCE_DPI); +} + +static void ndpi_search_i3d(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) +{ + struct ndpi_packet_struct const * const packet = &ndpi_struct->packet; + + NDPI_LOG_DBG(ndpi_struct, "searching i3D\n"); + + /* + * i3D offers a lot of services. + * The patterns below are mostly used by dedicated game servers. + */ + + if (packet->payload_packet_len < 74) + { + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + return; + } + + if ((ntohl(get_u_int32_t(packet->payload, 0)) == 0x00010046 || + ntohl(get_u_int32_t(packet->payload, 0)) == 0x00020046) && + ntohl(get_u_int32_t(packet->payload, 4)) == 0x0003cfa8) + { + ndpi_int_i3d_add_connection(ndpi_struct, flow); + return; + } + + if ((ntohs(get_u_int16_t(packet->payload, 0)) == 0x9078 || + ntohs(get_u_int16_t(packet->payload, 0)) == 0x9067) && + ntohl(get_u_int32_t(packet->payload, 8)) == 0x0003cfa9 && + ntohl(get_u_int32_t(packet->payload, 12)) == 0xbede0003) + { + ndpi_int_i3d_add_connection(ndpi_struct, flow); + return; + } + + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + return; +} + +void init_i3d_dissector(struct ndpi_detection_module_struct *ndpi_struct, + u_int32_t *id) +{ + ndpi_set_bitmask_protocol_detection("i3D", ndpi_struct, *id, + NDPI_PROTOCOL_I3D, + ndpi_search_i3d, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_UDP_WITH_PAYLOAD, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK + ); + + *id += 1; +} diff --git a/src/components/implementation/simple_nf/ndpi/iax.c b/src/components/implementation/simple_nf/ndpi/iax.c new file mode 100644 index 0000000000..d988fe772f --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/iax.c @@ -0,0 +1,108 @@ +/* + * iax.c + * + * Copyright (C) 2009-11 - ipoque GmbH + * Copyright (C) 2011-22 - ntop.org + * + * This file is part of nDPI, an open source deep packet inspection + * library based on the OpenDPI and PACE technology by ipoque GmbH + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_IAX + +#include "ndpi_api.h" + + +#define NDPI_IAX_MAX_INFORMATION_ELEMENTS 15 + +static void ndpi_int_iax_add_connection(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) +{ + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_IAX, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); +} + +static void ndpi_search_setup_iax(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) +{ + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + u_int8_t i; + u_int16_t packet_len; + + if ( /* 1. iax is udp based, port 4569 */ + (packet->udp->source == htons(4569) || packet->udp->dest == htons(4569)) + /* check for iax new packet */ + && packet->payload_packet_len >= 12 + /* check for dst call id == 0, do not check for highest bit (packet retransmission) */ + // && (ntohs(get_u_int16_t(packet->payload, 2)) & 0x7FFF) == 0 + /* check full IAX packet */ + && (packet->payload[0] & 0x80) != 0 + /* outbound seq == 0 */ + && packet->payload[8] == 0 + /* inbound seq == 0 || 1 */ + && (packet->payload[9] == 0 || packet->payload[9] == 0x01) + /* */ + && packet->payload[10] == 0x06 + /* IAX type: 0-15 */ + && packet->payload[11] <= 15) { + + if (packet->payload_packet_len == 12) { + NDPI_LOG_INFO(ndpi_struct, "found IAX\n"); + ndpi_int_iax_add_connection(ndpi_struct, flow); + return; + } + + packet_len = 12; + for(i = 0; i < NDPI_IAX_MAX_INFORMATION_ELEMENTS; i++) { + if ((packet_len+1) >= packet->payload_packet_len) + break; + + packet_len = packet_len + 2 + packet->payload[packet_len + 1]; + if(packet_len == packet->payload_packet_len) { + NDPI_LOG_INFO(ndpi_struct, "found IAX\n"); + ndpi_int_iax_add_connection(ndpi_struct, flow); + return; + } + } + + } + + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + +} + +static void ndpi_search_iax(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) +{ + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + + if(packet->udp + && (flow->detected_protocol_stack[0] == NDPI_PROTOCOL_UNKNOWN)) + ndpi_search_setup_iax(ndpi_struct, flow); +} + + +void init_iax_dissector(struct ndpi_detection_module_struct *ndpi_struct, u_int32_t *id) +{ + ndpi_set_bitmask_protocol_detection("IAX", ndpi_struct, *id, + NDPI_PROTOCOL_IAX, + ndpi_search_iax, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_UDP_WITH_PAYLOAD, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK); + + *id += 1; +} diff --git a/src/components/implementation/simple_nf/ndpi/icecast.c b/src/components/implementation/simple_nf/ndpi/icecast.c new file mode 100644 index 0000000000..354650233f --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/icecast.c @@ -0,0 +1,100 @@ +/* + * icecast.c + * + * Copyright (C) 2009-11 - ipoque GmbH + * Copyright (C) 2011-22 - ntop.org + * + * This file is part of nDPI, an open source deep packet inspection + * library based on the OpenDPI and PACE technology by ipoque GmbH + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_ICECAST + +#include "ndpi_api.h" + +static void ndpi_int_icecast_add_connection(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) +{ + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_ICECAST, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); +} + +static void ndpi_search_icecast_tcp(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) +{ + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + u_int16_t i; + + NDPI_LOG_DBG(ndpi_struct, "search icecast\n"); + + if((packet->payload_packet_len < 500 && + packet->payload_packet_len >= 7 && memcmp(packet->payload, "SOURCE ", 7) == 0) + || flow->l4.tcp.icecast_stage) { + ndpi_parse_packet_line_info_any(ndpi_struct, flow); + NDPI_LOG_DBG2(ndpi_struct, "Icecast lines=%d\n", packet->parsed_lines); + for (i = 0; i < packet->parsed_lines; i++) { + if(packet->line[i].ptr != NULL && packet->line[i].len > 4 + && memcmp(packet->line[i].ptr, "ice-", 4) == 0) { + NDPI_LOG_INFO(ndpi_struct, "found Icecast\n"); + ndpi_int_icecast_add_connection(ndpi_struct, flow); + return; + } + } + + if(packet->parsed_lines < 1 && !flow->l4.tcp.icecast_stage) { + flow->l4.tcp.icecast_stage = 1; + return; + } + } + + if(ndpi_current_pkt_from_client_to_server(packet, flow) + && (flow->packet_counter < 10)) { + return; + } + + if(ndpi_current_pkt_from_server_to_client(packet, flow)) { + /* server answer, now test Server for Icecast */ + + ndpi_parse_packet_line_info(ndpi_struct, flow); + + if((packet->server_line.ptr != NULL) + && (packet->server_line.len > NDPI_STATICSTRING_LEN("Icecast")) + && memcmp(packet->server_line.ptr, "Icecast", + NDPI_STATICSTRING_LEN("Icecast")) == 0) { + /* TODO maybe store the previous protocol type as subtype? + * e.g. ogg or mpeg + */ + NDPI_LOG_INFO(ndpi_struct, "found Icecast\n"); + ndpi_int_icecast_add_connection(ndpi_struct, flow); + return; + } + } + + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); +} + + +void init_icecast_dissector(struct ndpi_detection_module_struct *ndpi_struct, u_int32_t *id) +{ + ndpi_set_bitmask_protocol_detection("IceCast", ndpi_struct, *id, + NDPI_PROTOCOL_ICECAST, + ndpi_search_icecast_tcp, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_TCP_WITH_PAYLOAD_WITHOUT_RETRANSMISSION, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK); + + *id += 1; +} diff --git a/src/components/implementation/simple_nf/ndpi/iec60870-5-104.c b/src/components/implementation/simple_nf/ndpi/iec60870-5-104.c new file mode 100644 index 0000000000..e03ea18d35 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/iec60870-5-104.c @@ -0,0 +1,83 @@ +/* + * iec60870-5-104.c + * Extension for industrial 104 protocol recognition + * + * Copyright (C) 2019-22 - ntop.org + * + * This file is part of nDPI, an open source deep packet inspection + * library based on the OpenDPI and PACE technology by ipoque GmbH + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_IEC60870 + +#include "ndpi_api.h" + +static void ndpi_search_iec60870_tcp(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) { + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + + /* Check connection over TCP */ + NDPI_LOG_DBG(ndpi_struct, "search IEC60870\n"); + + if(packet->tcp) { + u_int16_t offset = 0, found = 0; + + while(offset + 1 < packet->payload_packet_len) { + /* The start byte of 104 is 0x68 */ + if(packet->payload[offset] == 0x68) { + u_int8_t len = packet->payload[offset+1]; + + if(len == 0) + break; + else { + u_int8_t len = packet->payload[offset+1]; + + if((len + offset + 2) == packet->payload_packet_len) { + found = 1; + break; + } + + offset += len + 2; + } + } else + break; + } + + if(found) { + NDPI_LOG_INFO(ndpi_struct, "Found IEC60870-104\n"); + + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_IEC60870, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); + return; + } + } + + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); +} + + +void init_104_dissector(struct ndpi_detection_module_struct *ndpi_struct, + u_int32_t *id) { + ndpi_set_bitmask_protocol_detection("IEC60870", ndpi_struct, *id, + NDPI_PROTOCOL_IEC60870, + ndpi_search_iec60870_tcp, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_TCP_WITH_PAYLOAD_WITHOUT_RETRANSMISSION, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK); + *id += 1; +} diff --git a/src/components/implementation/simple_nf/ndpi/imo.c b/src/components/implementation/simple_nf/ndpi/imo.c new file mode 100644 index 0000000000..d73d8a6e1d --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/imo.c @@ -0,0 +1,80 @@ +/* + * imo.c + * + * Copyright (C) 2019 - ntop.org + * + * This file is part of nDPI, an open source deep packet inspection + * library based on the OpenDPI and PACE technology by ipoque GmbH + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_IMO + +#include "ndpi_api.h" + +static void ndpi_int_imo_add_connection(struct ndpi_detection_module_struct + *ndpi_struct, struct ndpi_flow_struct *flow) { + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_IMO, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); +} + +static void ndpi_search_imo(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) { + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + + NDPI_LOG_DBG(ndpi_struct, "search IMO\n"); + + if(packet->payload_packet_len == 1) { + /* Two one byte consecutive packets with the same payload */ + if((flow->l4.udp.imo_last_one_byte_pkt == 1) + && (flow->l4.udp.imo_last_byte == packet->payload[0])) + ndpi_int_imo_add_connection(ndpi_struct, flow); + else + flow->l4.udp.imo_last_one_byte_pkt = 1, flow->l4.udp.imo_last_byte = packet->payload[0]; + } else if(((packet->payload_packet_len == 10) + && (packet->payload[0] == 0x09) + && (packet->payload[1] == 0x02)) + || ((packet->payload_packet_len == 11) + && (packet->payload[0] == 0x00) + && (packet->payload[1] == 0x09) + && (packet->payload[2] == 0x03)) + || ((packet->payload_packet_len == 1099) + && (packet->payload[0] == 0x88) + && (packet->payload[1] == 0x49) + && (packet->payload[2] == 0x1a) + && (packet->payload[3] == 0x00))) { + NDPI_LOG_INFO(ndpi_struct, "found IMO\n"); + ndpi_int_imo_add_connection(ndpi_struct, flow); + } else { + if(flow->num_processed_pkts > 5) + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + else + flow->l4.udp.imo_last_one_byte_pkt = 0; + } +} + + +void init_imo_dissector(struct ndpi_detection_module_struct *ndpi_struct, + u_int32_t *id) { + ndpi_set_bitmask_protocol_detection("IMO", ndpi_struct, *id, + NDPI_PROTOCOL_IMO, + ndpi_search_imo, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_UDP_WITH_PAYLOAD, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK); + *id += 1; +} + diff --git a/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_amazon_aws_match.c b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_amazon_aws_match.c new file mode 100644 index 0000000000..2671c93518 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_amazon_aws_match.c @@ -0,0 +1,7056 @@ +/* + * + * This file is generated automatically and part of nDPI + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +/* ****************************************************** */ + +#include "../ndpi_typedefs.h" +#include "../ndpi_protocol_ids.h" + +static ndpi_network ndpi_protocol_amazon_aws_protocol_list[] = { + { 0x03022200 /* 3.2.34.0/26 */, 26, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x03058C00 /* 3.5.140.0/22 */, 22, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0D222540 /* 13.34.37.64/27 */, 27, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0D224140 /* 13.34.65.64/27 */, 27, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0D224200 /* 13.34.66.0/27 */, 27, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0D224EA0 /* 13.34.78.160/27 */, 27, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0FE6DD00 /* 15.230.221.0/24 */, 24, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x23B40000 /* 35.180.0.0/16 */, 16, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x345D99AA /* 52.93.153.170/32 */, 32, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x345DB2EA /* 52.93.178.234/32 */, 32, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x345E4C00 /* 52.94.76.0/22 */, 22, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x345F2400 /* 52.95.36.0/22 */, 22, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x34DBAA00 /* 52.219.170.0/23 */, 23, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x63572000 /* 99.87.32.0/22 */, 22, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x78341660 /* 120.52.22.96/27 */, 27, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x96DE0B56 /* 150.222.11.86/31 */, 31, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x96DE5100 /* 150.222.81.0/24 */, 24, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x96DEEA36 /* 150.222.234.54/31 */, 31, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x03022340 /* 3.2.35.64/26 */, 26, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0D220B20 /* 13.34.11.32/27 */, 27, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0D2218A0 /* 13.34.24.160/27 */, 27, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0D223220 /* 13.34.50.32/27 */, 27, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0D223460 /* 13.34.52.96/27 */, 27, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0D224540 /* 13.34.69.64/27 */, 27, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0FE6273C /* 15.230.39.60/31 */, 31, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x345E9809 /* 52.94.152.9/32 */, 32, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x34DBA800 /* 52.219.168.0/24 */, 24, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x96DE4E00 /* 150.222.78.0/24 */, 24, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x036C0000 /* 3.108.0.0/14 */, 14, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0D222BC0 /* 13.34.43.192/27 */, 27, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0D223400 /* 13.34.52.0/27 */, 27, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0D224020 /* 13.34.64.32/27 */, 27, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0FB5E800 /* 15.181.232.0/21 */, 21, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0FE627D0 /* 15.230.39.208/31 */, 31, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x345D1100 /* 52.93.17.0/24 */, 24, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x345D7FA3 /* 52.93.127.163/32 */, 32, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x345DF0A4 /* 52.93.240.164/31 */, 31, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x345F9600 /* 52.95.150.0/24 */, 24, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x34DB3C00 /* 52.219.60.0/23 */, 23, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x8E04A088 /* 142.4.160.136/29 */, 29, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x96DEE666 /* 150.222.230.102/31 */, 31, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x03020000 /* 3.2.0.0/24 */, 24, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0D222B60 /* 13.34.43.96/27 */, 27, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0D223000 /* 13.34.48.0/27 */, 27, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0D223EA0 /* 13.34.62.160/27 */, 27, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0D224060 /* 13.34.64.96/27 */, 27, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0DF83800 /* 13.248.56.0/22 */, 22, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0DF87500 /* 13.248.117.0/24 */, 24, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0FDD2200 /* 15.221.34.0/24 */, 24, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0FE68900 /* 15.230.137.0/24 */, 24, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x345D7E87 /* 52.93.126.135/32 */, 32, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x345DB2DB /* 52.93.178.219/32 */, 32, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x345DF0BA /* 52.93.240.186/31 */, 31, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x345E1800 /* 52.94.24.0/23 */, 23, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x60005000 /* 96.0.80.0/22 */, 22, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x96DE03BB /* 150.222.3.187/32 */, 32, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x96DEC700 /* 150.222.199.0/25 */, 25, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x96DEFCF8 /* 150.222.252.248/31 */, 31, NDPI_PROTOCOL_AMAZON_AWS }, + { 0xA1BC9A00 /* 161.188.154.0/23 */, 23, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0D224700 /* 13.34.71.0/27 */, 27, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0D225380 /* 13.34.83.128/27 */, 27, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0D225A20 /* 13.34.90.32/27 */, 27, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0FE6272C /* 15.230.39.44/31 */, 31, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x2BF92D00 /* 43.249.45.0/24 */, 24, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x34040000 /* 52.4.0.0/14 */, 14, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x345D5C44 /* 52.93.92.68/31 */, 31, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x345D7F1B /* 52.93.127.27/32 */, 32, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x3490E3C0 /* 52.144.227.192/26 */, 26, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x3490E540 /* 52.144.229.64/26 */, 26, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x36DE5800 /* 54.222.88.0/24 */, 24, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x40FC5100 /* 64.252.81.0/24 */, 24, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x8E04A050 /* 142.4.160.80/29 */, 29, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x03022FC0 /* 3.2.47.192/26 */, 26, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0D2246E0 /* 13.34.70.224/27 */, 27, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0DF84600 /* 13.248.70.0/24 */, 24, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0FE649C0 /* 15.230.73.192/26 */, 26, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x32100000 /* 50.16.0.0/15 */, 15, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x345D7494 /* 52.93.116.148/32 */, 32, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x345D7F85 /* 52.93.127.133/32 */, 32, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x345DC600 /* 52.93.198.0/25 */, 25, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x345FD000 /* 52.95.208.0/22 */, 22, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x345FE000 /* 52.95.224.0/24 */, 24, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x68FF3B68 /* 104.255.59.104/32 */, 32, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x68FF3B72 /* 104.255.59.114/32 */, 32, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x96DE5400 /* 150.222.84.0/24 */, 24, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x96DE81F4 /* 150.222.129.244/31 */, 31, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x96DED052 /* 150.222.208.82/31 */, 31, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x96DEEA32 /* 150.222.234.50/31 */, 31, NDPI_PROTOCOL_AMAZON_AWS }, + { 0xCDFBF900 /* 205.251.249.0/24 */, 24, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0D2207E0 /* 13.34.7.224/27 */, 27, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0D222080 /* 13.34.32.128/27 */, 27, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0D223100 /* 13.34.49.0/27 */, 27, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0D224960 /* 13.34.73.96/27 */, 27, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0FC10300 /* 15.193.3.0/24 */, 24, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0FDCC400 /* 15.220.196.0/22 */, 22, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0FDCD800 /* 15.220.216.0/22 */, 22, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x23477300 /* 35.71.115.0/24 */, 24, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x345D7FA9 /* 52.93.127.169/32 */, 32, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x345D9994 /* 52.93.153.148/32 */, 32, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x345EF400 /* 52.94.244.0/22 */, 22, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x3477D000 /* 52.119.208.0/23 */, 23, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x36F0EC1A /* 54.240.236.26/32 */, 32, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x8E04A0E0 /* 142.4.160.224/29 */, 29, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x96DE03BE /* 150.222.3.190/32 */, 32, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x96DEE400 /* 150.222.228.0/24 */, 24, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0D2222C0 /* 13.34.34.192/27 */, 27, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0FC52200 /* 15.197.34.0/23 */, 23, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0FCD0000 /* 15.205.0.0/16 */, 16, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0FE6270A /* 15.230.39.10/31 */, 31, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0FE6FE02 /* 15.230.254.2/31 */, 31, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x100C0600 /* 16.12.6.0/23 */, 23, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x3452A910 /* 52.82.169.16/28 */, 28, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x345D2238 /* 52.93.34.56/32 */, 32, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x345EC610 /* 52.94.198.16/28 */, 28, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x3490E180 /* 52.144.225.128/26 */, 26, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x40FC4500 /* 64.252.69.0/24 */, 24, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x4783C000 /* 71.131.192.0/18 */, 18, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x96DE7A68 /* 150.222.122.104/31 */, 31, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0D221140 /* 13.34.17.64/27 */, 27, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0DEC0000 /* 13.236.0.0/14 */, 14, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0FB16400 /* 15.177.100.0/24 */, 24, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0FC52400 /* 15.197.36.0/22 */, 22, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0FE69E00 /* 15.230.158.0/23 */, 23, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x100C2000 /* 16.12.32.0/22 */, 22, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x2BCE0000 /* 43.206.0.0/15 */, 15, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x342EDC00 /* 52.46.220.0/22 */, 22, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x345D3280 /* 52.93.50.128/32 */, 32, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x345D328C /* 52.93.50.140/31 */, 31, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x345D3800 /* 52.93.56.0/24 */, 24, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x345DB298 /* 52.93.178.152/32 */, 32, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x345F2900 /* 52.95.41.0/24 */, 24, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x345F6400 /* 52.95.100.0/22 */, 22, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x345FE200 /* 52.95.226.0/24 */, 24, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x34DBCC00 /* 52.219.204.0/22 */, 22, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x634E9800 /* 99.78.152.0/22 */, 22, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x8E04A038 /* 142.4.160.56/29 */, 29, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x8E04A0B8 /* 142.4.160.184/29 */, 29, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x96DE8700 /* 150.222.135.0/24 */, 24, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x96DECA00 /* 150.222.202.0/24 */, 24, NDPI_PROTOCOL_AMAZON_AWS }, + { 0xB0207DF4 /* 176.32.125.244/31 */, 31, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x03040000 /* 3.4.0.0/24 */, 24, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0D2235C0 /* 13.34.53.192/27 */, 27, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0D223C80 /* 13.34.60.128/27 */, 27, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0FB15300 /* 15.177.83.0/24 */, 24, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0FB90000 /* 15.185.0.0/16 */, 16, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0FDCFC00 /* 15.220.252.0/22 */, 22, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0FDD2300 /* 15.221.35.0/24 */, 24, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0FE6271C /* 15.230.39.28/31 */, 31, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0FF81C00 /* 15.248.28.0/22 */, 22, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x345D23D4 /* 52.93.35.212/32 */, 32, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x345D7F76 /* 52.93.127.118/32 */, 32, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x345DB2CD /* 52.93.178.205/32 */, 32, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x345E1A00 /* 52.94.26.0/23 */, 23, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x345E982C /* 52.94.152.44/32 */, 32, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x345FB600 /* 52.95.182.0/23 */, 23, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x36F0EC36 /* 54.240.236.54/32 */, 32, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x36F70000 /* 54.247.0.0/16 */, 16, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x36F80000 /* 54.248.0.0/15 */, 15, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x03022800 /* 3.2.40.0/25 */, 25, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0D2229C0 /* 13.34.41.192/27 */, 27, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0D2253A0 /* 13.34.83.160/27 */, 27, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0DF84800 /* 13.248.72.0/24 */, 24, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0FE627C4 /* 15.230.39.196/31 */, 31, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x0FFB0009 /* 15.251.0.9/32 */, 32, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x1222F800 /* 18.34.248.0/22 */, 22, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x23476300 /* 35.71.99.0/24 */, 24, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x3477FC00 /* 52.119.252.0/22 */, 22, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x34DBD400 /* 52.219.212.0/22 */, 22, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x36940000 /* 54.148.0.0/15 */, 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NDPI_PROTOCOL_AMAZON_AWS }, + { 0x22DF7040 /* 34.223.112.64/27 */, 27, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x22DF0CE0 /* 34.223.12.224/27 */, 27, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x22DF15C0 /* 34.223.21.192/26 */, 26, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x22DF16B0 /* 34.223.22.176/29 */, 29, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x22DF1800 /* 34.223.24.0/22 */, 22, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x22DF25E0 /* 34.223.37.224/27 */, 27, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x22DF2D00 /* 34.223.45.0/25 */, 25, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x22DF2D80 /* 34.223.45.128/25 */, 25, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x22DF2E00 /* 34.223.46.0/25 */, 25, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x22DF2E80 /* 34.223.46.128/25 */, 25, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x22DF2F00 /* 34.223.47.0/27 */, 27, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x22DF2F80 /* 34.223.47.128/25 */, 25, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x22DF3180 /* 34.223.49.128/25 */, 25, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x22DF3300 /* 34.223.51.0/26 */, 26, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x22DF40E0 /* 34.223.64.224/27 */, 27, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x22DF4400 /* 34.223.68.0/22 */, 22, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x22DF4800 /* 34.223.72.0/23 */, 23, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x22DF4A00 /* 34.223.74.0/25 */, 25, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x22DF50C0 /* 34.223.80.192/26 */, 26, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x22DF5C00 /* 34.223.92.0/25 */, 25, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x22DF5FB0 /* 34.223.95.176/28 */, 28, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x22DF6000 /* 34.223.96.0/22 */, 22, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x23A23FC0 /* 35.162.63.192/26 */, 26, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x23A7BF80 /* 35.167.191.128/26 */, 26, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x23502300 /* 35.80.35.0/24 */, 24, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x235024C0 /* 35.80.36.192/28 */, 28, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x235024D0 /* 35.80.36.208/28 */, 28, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x235024E0 /* 35.80.36.224/28 */, 28, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x23505800 /* 35.80.88.0/22 */, 22, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x23505C00 /* 35.80.92.0/22 */, 22, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x235288C0 /* 35.82.136.192/29 */, 29, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x2353F828 /* 35.83.248.40/29 */, 29, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x23542400 /* 35.84.36.0/30 */, 30, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x2356BB80 /* 35.86.187.128/26 */, 26, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x23564200 /* 35.86.66.0/23 */, 23, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x23594800 /* 35.89.72.0/25 */, 25, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x235A67C0 /* 35.90.103.192/26 */, 26, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x235A8400 /* 35.90.132.0/23 */, 23, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x235C7CC0 /* 35.92.124.192/26 */, 26, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x235C1A00 /* 35.92.26.0/24 */, 24, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x235D7C00 /* 35.93.124.0/22 */, 22, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x2CE3B200 /* 44.227.178.0/24 */, 24, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x2CE93600 /* 44.233.54.0/23 */, 23, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x2CEA6A00 /* 44.234.106.0/23 */, 23, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x2CEA6C80 /* 44.234.108.128/25 */, 25, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x2CEA7140 /* 44.234.113.64/26 */, 26, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x2CEA7B80 /* 44.234.123.128/26 */, 26, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x2CEA7B40 /* 44.234.123.64/26 */, 26, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x2CEA1680 /* 44.234.22.128/26 */, 26, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x2CEA1C00 /* 44.234.28.0/22 */, 22, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x2CEA3600 /* 44.234.54.0/23 */, 23, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x2CEA4974 /* 44.234.73.116/30 */, 30, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x2CEA4978 /* 44.234.73.120/30 */, 30, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x2CEA5AFC /* 44.234.90.252/30 */, 30, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x2CF28FB4 /* 44.242.143.180/31 */, 31, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x2CF28FE0 /* 44.242.143.224/30 */, 30, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x2CF28FF2 /* 44.242.143.242/31 */, 31, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x2CF28FF4 /* 44.242.143.244/30 */, 30, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x2CF28FF8 /* 44.242.143.248/31 */, 31, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x2CF28FFA /* 44.242.143.250/31 */, 31, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x2CF28FFC /* 44.242.143.252/30 */, 30, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x2CF2A100 /* 44.242.161.0/30 */, 30, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x2CF2A10A /* 44.242.161.10/31 */, 31, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x2CF2A10C /* 44.242.161.12/30 */, 30, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x2CF2A110 /* 44.242.161.16/31 */, 31, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x2CF2A114 /* 44.242.161.20/30 */, 30, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x2CF2A104 /* 44.242.161.4/31 */, 31, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x2CF2A106 /* 44.242.161.6/31 */, 31, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x2CF2A108 /* 44.242.161.8/31 */, 31, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x2CF2B0C0 /* 44.242.176.192/26 */, 26, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x2CF2B100 /* 44.242.177.0/26 */, 26, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x2CF2B180 /* 44.242.177.128/27 */, 27, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x2CF2B140 /* 44.242.177.64/26 */, 26, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x2CF2B200 /* 44.242.178.0/24 */, 24, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x2CF2B300 /* 44.242.179.0/24 */, 24, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x2CF2B400 /* 44.242.180.0/24 */, 24, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x2CF2B500 /* 44.242.181.0/27 */, 27, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x2CF2B520 /* 44.242.181.32/28 */, 28, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x2CF2B880 /* 44.242.184.128/25 */, 25, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x342B4C58 /* 52.43.76.88/29 */, 29, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x36BEC620 /* 54.190.198.32/28 */, 28, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x36F42E00 /* 54.244.46.0/23 */, 23, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x36F434C0 /* 54.244.52.192/26 */, 26, NDPI_PROTOCOL_AMAZON_AWS }, + { 0x36F5A800 /* 54.245.168.0/26 */, 26, NDPI_PROTOCOL_AMAZON_AWS }, + /* End */ + { 0x0, 0, 0 } +}; diff --git a/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_alibaba.c b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_alibaba.c new file mode 100644 index 0000000000..160a74a7d3 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_alibaba.c @@ -0,0 +1,72 @@ +/* + * + * This file is generated automatically and part of nDPI + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +/* ****************************************************** */ + +#include "../ndpi_typedefs.h" +#include "../ndpi_protocol_ids.h" + +static ndpi_network ndpi_protocol_alibaba_protocol_list[] = { + { 0x08D17A00 /* 8.209.122.0/24 */, 24, NDPI_PROTOCOL_ALIBABA }, + { 0x08D3E400 /* 8.211.228.0/22 */, 22, NDPI_PROTOCOL_ALIBABA }, + { 0x08D42000 /* 8.212.32.0/23 */, 23, NDPI_PROTOCOL_ALIBABA }, + { 0x08D45D00 /* 8.212.93.0/24 */, 24, NDPI_PROTOCOL_ALIBABA }, + { 0x08D46400 /* 8.212.100.0/22 */, 22, NDPI_PROTOCOL_ALIBABA }, + { 0x08D4B800 /* 8.212.184.0/22 */, 22, NDPI_PROTOCOL_ALIBABA }, + { 0x08D6A000 /* 8.214.160.0/22 */, 22, NDPI_PROTOCOL_ALIBABA }, + { 0x08D84C00 /* 8.216.76.0/22 */, 22, NDPI_PROTOCOL_ALIBABA }, + { 0x0E017000 /* 14.1.112.0/22 */, 22, NDPI_PROTOCOL_ALIBABA }, + { 0x2D5D1200 /* 45.93.18.0/23 */, 23, NDPI_PROTOCOL_ALIBABA }, + { 0x2D869200 /* 45.134.146.0/23 */, 23, NDPI_PROTOCOL_ALIBABA }, + { 0x2EC75800 /* 46.199.88.0/24 */, 24, NDPI_PROTOCOL_ALIBABA }, + { 0x2F39C500 /* 47.57.197.0/24 */, 24, NDPI_PROTOCOL_ALIBABA }, + { 0x2F5AAC00 /* 47.90.172.0/22 */, 22, NDPI_PROTOCOL_ALIBABA }, + { 0x2FEB1100 /* 47.235.17.0/24 */, 24, NDPI_PROTOCOL_ALIBABA }, + { 0x2FEB1A00 /* 47.235.26.0/24 */, 24, NDPI_PROTOCOL_ALIBABA }, + { 0x2FF59C00 /* 47.245.156.0/22 */, 22, NDPI_PROTOCOL_ALIBABA }, + { 0x2FF65A00 /* 47.246.90.0/24 */, 24, NDPI_PROTOCOL_ALIBABA }, + { 0x2FF66400 /* 47.246.100.0/24 */, 24, NDPI_PROTOCOL_ALIBABA }, + { 0x2FF68200 /* 47.246.130.0/24 */, 24, NDPI_PROTOCOL_ALIBABA }, + { 0x2FF68600 /* 47.246.134.0/24 */, 24, NDPI_PROTOCOL_ALIBABA }, + { 0x2FF69C00 /* 47.246.156.0/24 */, 24, NDPI_PROTOCOL_ALIBABA }, + { 0x2FF6A300 /* 47.246.163.0/24 */, 24, NDPI_PROTOCOL_ALIBABA }, + { 0x2FFA4000 /* 47.250.64.0/22 */, 22, NDPI_PROTOCOL_ALIBABA }, + { 0x2FFB8000 /* 47.251.128.0/22 */, 22, NDPI_PROTOCOL_ALIBABA }, + { 0x3E3CE000 /* 62.60.224.0/19 */, 19, NDPI_PROTOCOL_ALIBABA }, + { 0x67CE2800 /* 103.206.40.0/22 */, 22, NDPI_PROTOCOL_ALIBABA }, + { 0x80006B00 /* 128.0.107.0/24 */, 24, NDPI_PROTOCOL_ALIBABA }, + { 0x938BFC00 /* 147.139.252.0/22 */, 22, NDPI_PROTOCOL_ALIBABA }, + { 0xAA210000 /* 170.33.0.0/22 */, 22, NDPI_PROTOCOL_ALIBABA }, + { 0xAA210800 /* 170.33.8.0/21 */, 21, NDPI_PROTOCOL_ALIBABA }, + { 0xAA211000 /* 170.33.16.0/20 */, 20, NDPI_PROTOCOL_ALIBABA }, + { 0xAA212000 /* 170.33.32.0/20 */, 20, NDPI_PROTOCOL_ALIBABA }, + { 0xAA214000 /* 170.33.64.0/23 */, 23, NDPI_PROTOCOL_ALIBABA }, + { 0xAA214200 /* 170.33.66.0/24 */, 24, NDPI_PROTOCOL_ALIBABA }, + { 0xAA214400 /* 170.33.68.0/23 */, 23, NDPI_PROTOCOL_ALIBABA }, + { 0xAA214800 /* 170.33.72.0/21 */, 21, NDPI_PROTOCOL_ALIBABA }, + { 0xAA215000 /* 170.33.80.0/21 */, 21, NDPI_PROTOCOL_ALIBABA }, + { 0xAA215800 /* 170.33.88.0/22 */, 22, NDPI_PROTOCOL_ALIBABA }, + { 0xAA215C00 /* 170.33.92.0/23 */, 23, NDPI_PROTOCOL_ALIBABA }, + { 0xAA216000 /* 170.33.96.0/21 */, 21, NDPI_PROTOCOL_ALIBABA }, + { 0xAA216800 /* 170.33.104.0/22 */, 22, NDPI_PROTOCOL_ALIBABA }, + { 0xC60B9000 /* 198.11.144.0/24 */, 24, NDPI_PROTOCOL_ALIBABA }, + { 0xCB6B3000 /* 203.107.48.0/22 */, 22, NDPI_PROTOCOL_ALIBABA }, + /* End */ + { 0x0, 0, 0 } +}; diff --git a/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_apple.c b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_apple.c new file mode 100644 index 0000000000..5b037d712e --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_apple.c @@ -0,0 +1,37 @@ +/* + * + * This file is generated automatically and part of nDPI + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +/* ****************************************************** */ + +#include "../ndpi_typedefs.h" +#include "../ndpi_protocol_ids.h" + +static ndpi_network ndpi_protocol_apple_protocol_list[] = { + { 0x11000000 /* 17.0.0.0/8 */, 8, NDPI_PROTOCOL_APPLE }, + { 0x39660000 /* 57.102.0.0/15 */, 15, NDPI_PROTOCOL_APPLE }, + { 0x39700000 /* 57.112.0.0/12 */, 12, NDPI_PROTOCOL_APPLE }, + { 0x3F5CE000 /* 63.92.224.0/19 */, 19, NDPI_PROTOCOL_APPLE }, + { 0x41C71600 /* 65.199.22.0/23 */, 23, NDPI_PROTOCOL_APPLE }, + { 0x8BB28000 /* 139.178.128.0/18 */, 18, NDPI_PROTOCOL_APPLE }, + { 0x90B20000 /* 144.178.0.0/19 */, 19, NDPI_PROTOCOL_APPLE }, + { 0x90B22000 /* 144.178.32.0/24 */, 24, NDPI_PROTOCOL_APPLE }, + { 0x90B23000 /* 144.178.48.0/20 */, 20, NDPI_PROTOCOL_APPLE }, + /* End */ + { 0x0, 0, 0 } +}; diff --git a/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_avast.c b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_avast.c new file mode 100644 index 0000000000..5db262bb70 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_avast.c @@ -0,0 +1,63 @@ +/* + * + * This file is generated automatically and part of nDPI + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +/* ****************************************************** */ +#include "../ndpi_typedefs.h" +#include "../ndpi_protocol_ids.h" + +static ndpi_network ndpi_protocol_avast_protocol_list[] = { + { 0x052D3800 /* 5.45.56.0/21 */, 21, NDPI_PROTOCOL_AVAST }, + { 0x053E1000 /* 5.62.16.0/22 */, 22, NDPI_PROTOCOL_AVAST }, + { 0x053E1400 /* 5.62.20.0/24 */, 24, NDPI_PROTOCOL_AVAST }, + { 0x053E1900 /* 5.62.25.0/24 */, 24, NDPI_PROTOCOL_AVAST }, + { 0x053E2000 /* 5.62.32.0/24 */, 24, NDPI_PROTOCOL_AVAST }, + { 0x053E2400 /* 5.62.36.0/22 */, 22, NDPI_PROTOCOL_AVAST }, + { 0x053E2800 /* 5.62.40.0/21 */, 21, NDPI_PROTOCOL_AVAST }, + { 0x053E3000 /* 5.62.48.0/23 */, 23, NDPI_PROTOCOL_AVAST }, + { 0x053E3200 /* 5.62.50.0/24 */, 24, NDPI_PROTOCOL_AVAST }, + { 0x053E3400 /* 5.62.52.0/22 */, 22, NDPI_PROTOCOL_AVAST }, + { 0x053E3800 /* 5.62.56.0/21 */, 21, NDPI_PROTOCOL_AVAST }, + { 0x259CBB00 /* 37.156.187.0/24 */, 24, NDPI_PROTOCOL_AVAST }, + { 0x455E4000 /* 69.94.64.0/24 */, 24, NDPI_PROTOCOL_AVAST }, + { 0x455E4300 /* 69.94.67.0/24 */, 24, NDPI_PROTOCOL_AVAST }, + { 0x455E4400 /* 69.94.68.0/23 */, 23, NDPI_PROTOCOL_AVAST }, + { 0x455E4800 /* 69.94.72.0/21 */, 21, NDPI_PROTOCOL_AVAST }, + { 0x4DEA2800 /* 77.234.40.0/22 */, 22, NDPI_PROTOCOL_AVAST }, + { 0x4DEA2C00 /* 77.234.44.0/23 */, 23, NDPI_PROTOCOL_AVAST }, + { 0x4DEA2E00 /* 77.234.46.0/24 */, 24, NDPI_PROTOCOL_AVAST }, + { 0x5BD58F00 /* 91.213.143.0/24 */, 24, NDPI_PROTOCOL_AVAST }, + { 0x5F8E7000 /* 95.142.112.0/24 */, 24, NDPI_PROTOCOL_AVAST }, + { 0x5F8E7300 /* 95.142.115.0/24 */, 24, NDPI_PROTOCOL_AVAST }, + { 0x5F8E7600 /* 95.142.118.0/24 */, 24, NDPI_PROTOCOL_AVAST }, + { 0x5F8E7900 /* 95.142.121.0/24 */, 24, NDPI_PROTOCOL_AVAST }, + { 0x5F8E7C00 /* 95.142.124.0/24 */, 24, NDPI_PROTOCOL_AVAST }, + { 0x5F8E7F00 /* 95.142.127.0/24 */, 24, NDPI_PROTOCOL_AVAST }, + { 0x9FF2E300 /* 159.242.227.0/24 */, 24, NDPI_PROTOCOL_AVAST }, + { 0x9FF2EA00 /* 159.242.234.0/24 */, 24, NDPI_PROTOCOL_AVAST }, + { 0x9FF2EF00 /* 159.242.239.0/24 */, 24, NDPI_PROTOCOL_AVAST }, + { 0xB933E400 /* 185.51.228.0/23 */, 23, NDPI_PROTOCOL_AVAST }, + { 0xB933E600 /* 185.51.230.0/24 */, 24, NDPI_PROTOCOL_AVAST }, + { 0xB936E600 /* 185.54.230.0/24 */, 24, NDPI_PROTOCOL_AVAST }, + { 0xB9A74000 /* 185.167.64.0/24 */, 24, NDPI_PROTOCOL_AVAST }, + { 0xB9BD5C00 /* 185.189.92.0/22 */, 22, NDPI_PROTOCOL_AVAST }, + { 0xC2631C00 /* 194.99.28.0/22 */, 22, NDPI_PROTOCOL_AVAST }, + { 0xC34A4C00 /* 195.74.76.0/24 */, 24, NDPI_PROTOCOL_AVAST }, + /* End */ + { 0x0, 0, 0 } +}; diff --git a/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_bloomberg.c b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_bloomberg.c new file mode 100644 index 0000000000..4bfe3841d2 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_bloomberg.c @@ -0,0 +1,70 @@ +/* + * + * This file is generated automatically and part of nDPI + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +/* ****************************************************** */ +#include "../ndpi_typedefs.h" +#include "../ndpi_protocol_ids.h" + +static ndpi_network ndpi_protocol_bloomberg_protocol_list[] = { + { 0x3F580300 /* 63.88.3.0/24 */, 24, NDPI_PROTOCOL_BLOOMBERG }, + { 0x4173E200 /* 65.115.226.0/24 */, 24, NDPI_PROTOCOL_BLOOMBERG }, + { 0x45BB1000 /* 69.187.16.0/21 */, 21, NDPI_PROTOCOL_BLOOMBERG }, + { 0x45BB1800 /* 69.187.24.0/22 */, 22, NDPI_PROTOCOL_BLOOMBERG }, + { 0x45BB1D00 /* 69.187.29.0/24 */, 24, NDPI_PROTOCOL_BLOOMBERG }, + { 0x45BB1F00 /* 69.187.31.0/24 */, 24, NDPI_PROTOCOL_BLOOMBERG }, + { 0x45BB2000 /* 69.187.32.0/23 */, 23, NDPI_PROTOCOL_BLOOMBERG }, + { 0x45BB4900 /* 69.187.73.0/24 */, 24, NDPI_PROTOCOL_BLOOMBERG }, + { 0x45BF5000 /* 69.191.80.0/21 */, 21, NDPI_PROTOCOL_BLOOMBERG }, + { 0x45BF8800 /* 69.191.136.0/24 */, 24, NDPI_PROTOCOL_BLOOMBERG }, + { 0x45BFB000 /* 69.191.176.0/21 */, 21, NDPI_PROTOCOL_BLOOMBERG }, + { 0x45BFB800 /* 69.191.184.0/24 */, 24, NDPI_PROTOCOL_BLOOMBERG }, + { 0x45BFBA00 /* 69.191.186.0/23 */, 23, NDPI_PROTOCOL_BLOOMBERG }, + { 0x45BFBC00 /* 69.191.188.0/22 */, 22, NDPI_PROTOCOL_BLOOMBERG }, + { 0x45BFC000 /* 69.191.192.0/22 */, 22, NDPI_PROTOCOL_BLOOMBERG }, + { 0x45BFC600 /* 69.191.198.0/23 */, 23, NDPI_PROTOCOL_BLOOMBERG }, + { 0x45BFC800 /* 69.191.200.0/24 */, 24, NDPI_PROTOCOL_BLOOMBERG }, + { 0x45BFCA00 /* 69.191.202.0/23 */, 23, NDPI_PROTOCOL_BLOOMBERG }, + { 0x45BFCC00 /* 69.191.204.0/22 */, 22, NDPI_PROTOCOL_BLOOMBERG }, + { 0x45BFD000 /* 69.191.208.0/22 */, 22, NDPI_PROTOCOL_BLOOMBERG }, + { 0x45BFD400 /* 69.191.212.0/24 */, 24, NDPI_PROTOCOL_BLOOMBERG }, + { 0x45BFD600 /* 69.191.214.0/24 */, 24, NDPI_PROTOCOL_BLOOMBERG }, + { 0x45BFD800 /* 69.191.216.0/24 */, 24, NDPI_PROTOCOL_BLOOMBERG }, + { 0x45BFDA00 /* 69.191.218.0/24 */, 24, NDPI_PROTOCOL_BLOOMBERG }, + { 0x45BFDC00 /* 69.191.220.0/23 */, 23, NDPI_PROTOCOL_BLOOMBERG }, + { 0x45BFE200 /* 69.191.226.0/24 */, 24, NDPI_PROTOCOL_BLOOMBERG }, + { 0x45BFE500 /* 69.191.229.0/24 */, 24, NDPI_PROTOCOL_BLOOMBERG }, + { 0x45BFE600 /* 69.191.230.0/23 */, 23, NDPI_PROTOCOL_BLOOMBERG }, + { 0x45BFE900 /* 69.191.233.0/24 */, 24, NDPI_PROTOCOL_BLOOMBERG }, + { 0x45BFEA00 /* 69.191.234.0/24 */, 24, NDPI_PROTOCOL_BLOOMBERG }, + { 0x45BFED00 /* 69.191.237.0/24 */, 24, NDPI_PROTOCOL_BLOOMBERG }, + { 0x45BFEE00 /* 69.191.238.0/23 */, 23, NDPI_PROTOCOL_BLOOMBERG }, + { 0x45BFF000 /* 69.191.240.0/20 */, 20, NDPI_PROTOCOL_BLOOMBERG }, + { 0x67FBCC00 /* 103.251.204.0/24 */, 24, NDPI_PROTOCOL_BLOOMBERG }, + { 0x67FBCE00 /* 103.251.206.0/23 */, 23, NDPI_PROTOCOL_BLOOMBERG }, + { 0xA02BFA00 /* 160.43.250.0/23 */, 23, NDPI_PROTOCOL_BLOOMBERG }, + { 0xA02BFD00 /* 160.43.253.0/24 */, 24, NDPI_PROTOCOL_BLOOMBERG }, + { 0xB90A7400 /* 185.10.116.0/23 */, 23, NDPI_PROTOCOL_BLOOMBERG }, + { 0xC7ACA900 /* 199.172.169.0/24 */, 24, NDPI_PROTOCOL_BLOOMBERG }, + { 0xCCB3F000 /* 204.179.240.0/24 */, 24, NDPI_PROTOCOL_BLOOMBERG }, + { 0xCDD87000 /* 205.216.112.0/24 */, 24, NDPI_PROTOCOL_BLOOMBERG }, + { 0xCE9C3500 /* 206.156.53.0/24 */, 24, NDPI_PROTOCOL_BLOOMBERG }, + { 0xD0163800 /* 208.22.56.0/23 */, 23, NDPI_PROTOCOL_BLOOMBERG }, + /* End */ + { 0x0, 0, 0 } +}; diff --git a/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_citrix.c b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_citrix.c new file mode 100644 index 0000000000..dacba47233 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_citrix.c @@ -0,0 +1,90 @@ +/* + * + * This file is generated automatically and part of nDPI + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +/* ****************************************************** */ +#include "../ndpi_typedefs.h" +#include "../ndpi_protocol_ids.h" + +static ndpi_network ndpi_protocol_citrix_protocol_list[] = { + { 0x17EFE300 /* 23.239.227.0/24 */, 24, NDPI_PROTOCOL_CITRIX }, + { 0x404A1100 /* 64.74.17.0/24 */, 24, NDPI_PROTOCOL_CITRIX }, + { 0x404A1200 /* 64.74.18.0/23 */, 23, NDPI_PROTOCOL_CITRIX }, + { 0x43D94400 /* 67.217.68.0/24 */, 24, NDPI_PROTOCOL_CITRIX }, + { 0x43D94600 /* 67.217.70.0/23 */, 23, NDPI_PROTOCOL_CITRIX }, + { 0x43D94800 /* 67.217.72.0/24 */, 24, NDPI_PROTOCOL_CITRIX }, + { 0x43D94B00 /* 67.217.75.0/24 */, 24, NDPI_PROTOCOL_CITRIX }, + { 0x43D94C00 /* 67.217.76.0/23 */, 23, NDPI_PROTOCOL_CITRIX }, + { 0x43D94E00 /* 67.217.78.0/24 */, 24, NDPI_PROTOCOL_CITRIX }, + { 0x43D95000 /* 67.217.80.0/23 */, 23, NDPI_PROTOCOL_CITRIX }, + { 0x43D95200 /* 67.217.82.0/24 */, 24, NDPI_PROTOCOL_CITRIX }, + { 0x43D95400 /* 67.217.84.0/24 */, 24, NDPI_PROTOCOL_CITRIX }, + { 0x43D95600 /* 67.217.86.0/24 */, 24, NDPI_PROTOCOL_CITRIX }, + { 0x43D95800 /* 67.217.88.0/24 */, 24, NDPI_PROTOCOL_CITRIX }, + { 0x43D95A00 /* 67.217.90.0/23 */, 23, NDPI_PROTOCOL_CITRIX }, + { 0x43D95C00 /* 67.217.92.0/24 */, 24, NDPI_PROTOCOL_CITRIX }, + { 0x43D95E00 /* 67.217.94.0/23 */, 23, NDPI_PROTOCOL_CITRIX }, + { 0x44400000 /* 68.64.0.0/24 */, 24, NDPI_PROTOCOL_CITRIX }, + { 0x44400800 /* 68.64.8.0/23 */, 23, NDPI_PROTOCOL_CITRIX }, + { 0x44400A00 /* 68.64.10.0/24 */, 24, NDPI_PROTOCOL_CITRIX }, + { 0x44400C00 /* 68.64.12.0/23 */, 23, NDPI_PROTOCOL_CITRIX }, + { 0x44400E00 /* 68.64.14.0/24 */, 24, NDPI_PROTOCOL_CITRIX }, + { 0x44401100 /* 68.64.17.0/24 */, 24, NDPI_PROTOCOL_CITRIX }, + { 0x44401200 /* 68.64.18.0/23 */, 23, NDPI_PROTOCOL_CITRIX }, + { 0x44401400 /* 68.64.20.0/24 */, 24, NDPI_PROTOCOL_CITRIX }, + { 0x44401600 /* 68.64.22.0/23 */, 23, NDPI_PROTOCOL_CITRIX }, + { 0x44401800 /* 68.64.24.0/23 */, 23, NDPI_PROTOCOL_CITRIX }, + { 0x44401B00 /* 68.64.27.0/24 */, 24, NDPI_PROTOCOL_CITRIX }, + { 0x44401C00 /* 68.64.28.0/23 */, 23, NDPI_PROTOCOL_CITRIX }, + { 0x44401E00 /* 68.64.30.0/24 */, 24, NDPI_PROTOCOL_CITRIX }, + { 0x4E6C7400 /* 78.108.116.0/22 */, 22, NDPI_PROTOCOL_CITRIX }, + { 0x4E6C7800 /* 78.108.120.0/23 */, 23, NDPI_PROTOCOL_CITRIX }, + { 0x4E6C7E00 /* 78.108.126.0/23 */, 23, NDPI_PROTOCOL_CITRIX }, + { 0xADC70000 /* 173.199.0.0/21 */, 21, NDPI_PROTOCOL_CITRIX }, + { 0xADC70C00 /* 173.199.12.0/23 */, 23, NDPI_PROTOCOL_CITRIX }, + { 0xADC70F00 /* 173.199.15.0/24 */, 24, NDPI_PROTOCOL_CITRIX }, + { 0xADC71100 /* 173.199.17.0/24 */, 24, NDPI_PROTOCOL_CITRIX }, + { 0xADC71200 /* 173.199.18.0/23 */, 23, NDPI_PROTOCOL_CITRIX }, + { 0xADC71400 /* 173.199.20.0/24 */, 24, NDPI_PROTOCOL_CITRIX }, + { 0xADC71700 /* 173.199.23.0/24 */, 24, NDPI_PROTOCOL_CITRIX }, + { 0xADC71A00 /* 173.199.26.0/23 */, 23, NDPI_PROTOCOL_CITRIX }, + { 0xADC71E00 /* 173.199.30.0/23 */, 23, NDPI_PROTOCOL_CITRIX }, + { 0xADC72000 /* 173.199.32.0/23 */, 23, NDPI_PROTOCOL_CITRIX }, + { 0xADC72B00 /* 173.199.43.0/24 */, 24, NDPI_PROTOCOL_CITRIX }, + { 0xADC72C00 /* 173.199.44.0/22 */, 22, NDPI_PROTOCOL_CITRIX }, + { 0xADC73200 /* 173.199.50.0/23 */, 23, NDPI_PROTOCOL_CITRIX }, + { 0xADC73400 /* 173.199.52.0/22 */, 22, NDPI_PROTOCOL_CITRIX }, + { 0xADC73C00 /* 173.199.60.0/22 */, 22, NDPI_PROTOCOL_CITRIX }, + { 0xBC422B00 /* 188.66.43.0/24 */, 24, NDPI_PROTOCOL_CITRIX }, + { 0xCAAD1900 /* 202.173.25.0/24 */, 24, NDPI_PROTOCOL_CITRIX }, + { 0xCEB76400 /* 206.183.100.0/24 */, 24, NDPI_PROTOCOL_CITRIX }, + { 0xD873D000 /* 216.115.208.0/24 */, 24, NDPI_PROTOCOL_CITRIX }, + { 0xD873D200 /* 216.115.210.0/23 */, 23, NDPI_PROTOCOL_CITRIX }, + { 0xD873D500 /* 216.115.213.0/24 */, 24, NDPI_PROTOCOL_CITRIX }, + { 0xD873D600 /* 216.115.214.0/23 */, 23, NDPI_PROTOCOL_CITRIX }, + { 0xD873D900 /* 216.115.217.0/24 */, 24, NDPI_PROTOCOL_CITRIX }, + { 0xD873DA00 /* 216.115.218.0/24 */, 24, NDPI_PROTOCOL_CITRIX }, + { 0xD873DD00 /* 216.115.221.0/24 */, 24, NDPI_PROTOCOL_CITRIX }, + { 0xD873DE00 /* 216.115.222.0/23 */, 23, NDPI_PROTOCOL_CITRIX }, + { 0xD8DB7200 /* 216.219.114.0/23 */, 23, NDPI_PROTOCOL_CITRIX }, + { 0xD8DB7400 /* 216.219.116.0/24 */, 24, NDPI_PROTOCOL_CITRIX }, + { 0xD8DB7700 /* 216.219.119.0/24 */, 24, NDPI_PROTOCOL_CITRIX }, + { 0xD8DB7800 /* 216.219.120.0/22 */, 22, NDPI_PROTOCOL_CITRIX }, + /* End */ + { 0x0, 0, 0 } +}; diff --git a/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_discord.c b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_discord.c new file mode 100644 index 0000000000..68100fffc7 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_discord.c @@ -0,0 +1,94 @@ +/* + * + * This file is generated automatically and part of nDPI + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +/* ****************************************************** */ +#include "../ndpi_typedefs.h" +#include "../ndpi_protocol_ids.h" + +static ndpi_network ndpi_protocol_discord_protocol_list[] = { + { 0x05C80000 /* 5.200.0.0/19 */, 19, NDPI_PROTOCOL_DISCORD }, + { 0x1FCC8000 /* 31.204.128.0/19 */, 19, NDPI_PROTOCOL_DISCORD }, + { 0x2BEF8800 /* 43.239.136.0/22 */, 22, NDPI_PROTOCOL_DISCORD }, + { 0x2D53C800 /* 45.83.200.0/22 */, 22, NDPI_PROTOCOL_DISCORD }, + { 0x2D7C8400 /* 45.124.132.0/22 */, 22, NDPI_PROTOCOL_DISCORD }, + { 0x4216C400 /* 66.22.196.0/22 */, 22, NDPI_PROTOCOL_DISCORD }, + { 0x4216C800 /* 66.22.200.0/21 */, 21, NDPI_PROTOCOL_DISCORD }, + { 0x4216D000 /* 66.22.208.0/20 */, 20, NDPI_PROTOCOL_DISCORD }, + { 0x4216E000 /* 66.22.224.0/22 */, 22, NDPI_PROTOCOL_DISCORD }, + { 0x4216E600 /* 66.22.230.0/23 */, 23, NDPI_PROTOCOL_DISCORD }, + { 0x4216E800 /* 66.22.232.0/22 */, 22, NDPI_PROTOCOL_DISCORD }, + { 0x4216EC00 /* 66.22.236.0/23 */, 23, NDPI_PROTOCOL_DISCORD }, + { 0x4216EE00 /* 66.22.238.0/24 */, 24, NDPI_PROTOCOL_DISCORD }, + { 0x4216F000 /* 66.22.240.0/21 */, 21, NDPI_PROTOCOL_DISCORD }, + { 0x4216F800 /* 66.22.248.0/24 */, 24, NDPI_PROTOCOL_DISCORD }, + { 0x45A8EA00 /* 69.168.234.0/24 */, 24, NDPI_PROTOCOL_DISCORD }, + { 0x559F7200 /* 85.159.114.0/24 */, 24, NDPI_PROTOCOL_DISCORD }, + { 0x5968A000 /* 89.104.160.0/21 */, 21, NDPI_PROTOCOL_DISCORD }, + { 0x5BC3EA00 /* 91.195.234.0/23 */, 23, NDPI_PROTOCOL_DISCORD }, + { 0x5BC69800 /* 91.198.152.0/24 */, 24, NDPI_PROTOCOL_DISCORD }, + { 0x5BD8CF00 /* 91.216.207.0/24 */, 24, NDPI_PROTOCOL_DISCORD }, + { 0x677DD800 /* 103.125.216.0/24 */, 24, NDPI_PROTOCOL_DISCORD }, + { 0x677DDB00 /* 103.125.219.0/24 */, 24, NDPI_PROTOCOL_DISCORD }, + { 0x679F7A00 /* 103.159.122.0/23 */, 23, NDPI_PROTOCOL_DISCORD }, + { 0x67C2A400 /* 103.194.164.0/22 */, 22, NDPI_PROTOCOL_DISCORD }, + { 0x68995400 /* 104.153.84.0/22 */, 22, NDPI_PROTOCOL_DISCORD }, + { 0x6DC8C000 /* 109.200.192.0/19 */, 19, NDPI_PROTOCOL_DISCORD }, + { 0x8A808800 /* 138.128.136.0/21 */, 21, NDPI_PROTOCOL_DISCORD }, + { 0x92F74C00 /* 146.247.76.0/22 */, 22, NDPI_PROTOCOL_DISCORD }, + { 0xA2F43400 /* 162.244.52.0/22 */, 22, NDPI_PROTOCOL_DISCORD }, + { 0xA2F5CC00 /* 162.245.204.0/22 */, 22, NDPI_PROTOCOL_DISCORD }, + { 0xB2F89B00 /* 178.248.155.0/24 */, 24, NDPI_PROTOCOL_DISCORD }, + { 0xB9298C00 /* 185.41.140.0/22 */, 22, NDPI_PROTOCOL_DISCORD }, + { 0xB9326800 /* 185.50.104.0/22 */, 22, NDPI_PROTOCOL_DISCORD }, + { 0xB9340C00 /* 185.52.12.0/22 */, 22, NDPI_PROTOCOL_DISCORD }, + { 0xB9462F00 /* 185.70.47.0/24 */, 24, NDPI_PROTOCOL_DISCORD }, + { 0xB94DD000 /* 185.77.208.0/22 */, 22, NDPI_PROTOCOL_DISCORD }, + { 0xB9729C00 /* 185.114.156.0/22 */, 22, NDPI_PROTOCOL_DISCORD }, + { 0xB9782300 /* 185.120.35.0/24 */, 24, NDPI_PROTOCOL_DISCORD }, + { 0xB9A23800 /* 185.162.56.0/22 */, 22, NDPI_PROTOCOL_DISCORD }, + { 0xB9ABF000 /* 185.171.240.0/22 */, 22, NDPI_PROTOCOL_DISCORD }, + { 0xB9AC8400 /* 185.172.132.0/22 */, 22, NDPI_PROTOCOL_DISCORD }, + { 0xB9B3C800 /* 185.179.200.0/22 */, 22, NDPI_PROTOCOL_DISCORD }, + { 0xB9B9D400 /* 185.185.212.0/22 */, 22, NDPI_PROTOCOL_DISCORD }, + { 0xB9BDB400 /* 185.189.180.0/22 */, 22, NDPI_PROTOCOL_DISCORD }, + { 0xB9BFF000 /* 185.191.240.0/22 */, 22, NDPI_PROTOCOL_DISCORD }, + { 0xB9C51800 /* 185.197.24.0/22 */, 22, NDPI_PROTOCOL_DISCORD }, + { 0xB9C91100 /* 185.201.17.0/24 */, 24, NDPI_PROTOCOL_DISCORD }, + { 0xB9DAA400 /* 185.218.164.0/23 */, 23, NDPI_PROTOCOL_DISCORD }, + { 0xB9DAA600 /* 185.218.166.0/24 */, 24, NDPI_PROTOCOL_DISCORD }, + { 0xB9E28A00 /* 185.226.138.0/24 */, 24, NDPI_PROTOCOL_DISCORD }, + { 0xB9E52000 /* 185.229.32.0/22 */, 22, NDPI_PROTOCOL_DISCORD }, + { 0xBC7A4000 /* 188.122.64.0/19 */, 19, NDPI_PROTOCOL_DISCORD }, + { 0xC12BDA00 /* 193.43.218.0/23 */, 23, NDPI_PROTOCOL_DISCORD }, + { 0xC12E5000 /* 193.46.80.0/24 */, 24, NDPI_PROTOCOL_DISCORD }, + { 0xC23D3B00 /* 194.61.59.0/24 */, 24, NDPI_PROTOCOL_DISCORD }, + { 0xC71BD400 /* 199.27.212.0/22 */, 22, NDPI_PROTOCOL_DISCORD }, + { 0xCB841800 /* 203.132.24.0/24 */, 24, NDPI_PROTOCOL_DISCORD }, + { 0xD412E600 /* 212.18.230.0/24 */, 24, NDPI_PROTOCOL_DISCORD }, + { 0xD413E000 /* 212.19.224.0/22 */, 22, NDPI_PROTOCOL_DISCORD }, + { 0xD468C800 /* 212.104.200.0/23 */, 23, NDPI_PROTOCOL_DISCORD }, + { 0xD468CA00 /* 212.104.202.0/24 */, 24, NDPI_PROTOCOL_DISCORD }, + { 0xD468CC00 /* 212.104.204.0/23 */, 23, NDPI_PROTOCOL_DISCORD }, + { 0xD5A34000 /* 213.163.64.0/19 */, 19, NDPI_PROTOCOL_DISCORD }, + { 0xD5B3C000 /* 213.179.192.0/19 */, 19, NDPI_PROTOCOL_DISCORD }, + { 0xD5BE1600 /* 213.190.22.0/24 */, 24, NDPI_PROTOCOL_DISCORD }, + { 0xDC9ED800 /* 220.158.216.0/22 */, 22, NDPI_PROTOCOL_DISCORD }, + /* End */ + { 0x0, 0, 0 } +}; diff --git a/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_dropbox.c b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_dropbox.c new file mode 100644 index 0000000000..8b67ff36e5 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_dropbox.c @@ -0,0 +1,34 @@ +/* + * + * This file is generated automatically and part of nDPI + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +/* ****************************************************** */ +#include "../ndpi_typedefs.h" +#include "../ndpi_protocol_ids.h" + +static ndpi_network ndpi_protocol_dropbox_protocol_list[] = { + { 0x2D3A4000 /* 45.58.64.0/20 */, 20, NDPI_PROTOCOL_DROPBOX }, + { 0x40700D00 /* 64.112.13.0/24 */, 24, NDPI_PROTOCOL_DROPBOX }, + { 0x6CA0A000 /* 108.160.160.0/20 */, 20, NDPI_PROTOCOL_DROPBOX }, + { 0xA27D0000 /* 162.125.0.0/16 */, 16, NDPI_PROTOCOL_DROPBOX }, + { 0xB92D0800 /* 185.45.8.0/22 */, 22, NDPI_PROTOCOL_DROPBOX }, + { 0xB969A400 /* 185.105.164.0/24 */, 24, NDPI_PROTOCOL_DROPBOX }, + { 0xC0BDC800 /* 192.189.200.0/23 */, 23, NDPI_PROTOCOL_DROPBOX }, + /* End */ + { 0x0, 0, 0 } +}; diff --git a/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_edgecast.c b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_edgecast.c new file mode 100644 index 0000000000..d87b3b1249 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_edgecast.c @@ -0,0 +1,200 @@ +/* + * + * This file is generated automatically and part of nDPI + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +/* ****************************************************** */ +#include "../ndpi_typedefs.h" +#include "../ndpi_protocol_ids.h" + +static ndpi_network ndpi_protocol_edgecast_protocol_list[] = { + { 0x05684000 /* 5.104.64.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0x05684200 /* 5.104.66.0/23 */, 23, NDPI_PROTOCOL_EDGECAST }, + { 0x05684400 /* 5.104.68.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0x2E164200 /* 46.22.66.0/23 */, 23, NDPI_PROTOCOL_EDGECAST }, + { 0x2E164400 /* 46.22.68.0/22 */, 22, NDPI_PROTOCOL_EDGECAST }, + { 0x2E164800 /* 46.22.72.0/23 */, 23, NDPI_PROTOCOL_EDGECAST }, + { 0x2E164A00 /* 46.22.74.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0x2E164C00 /* 46.22.76.0/23 */, 23, NDPI_PROTOCOL_EDGECAST }, + { 0x31E77E00 /* 49.231.126.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0x400C0000 /* 64.12.0.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0x400C1000 /* 64.12.16.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0x400C2000 /* 64.12.32.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0x400C3000 /* 64.12.48.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0x400C4000 /* 64.12.64.0/22 */, 22, NDPI_PROTOCOL_EDGECAST }, + { 0x400C4400 /* 64.12.68.0/23 */, 23, NDPI_PROTOCOL_EDGECAST }, + { 0x400C4700 /* 64.12.71.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0x400C4800 /* 64.12.72.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0x400C8000 /* 64.12.128.0/21 */, 21, NDPI_PROTOCOL_EDGECAST }, + { 0x400C8800 /* 64.12.136.0/22 */, 22, NDPI_PROTOCOL_EDGECAST }, + { 0x400C8C00 /* 64.12.140.0/23 */, 23, NDPI_PROTOCOL_EDGECAST }, + { 0x400C8F00 /* 64.12.143.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0x400C9000 /* 64.12.144.0/22 */, 22, NDPI_PROTOCOL_EDGECAST }, + { 0x400C9400 /* 64.12.148.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0x400C9600 /* 64.12.150.0/23 */, 23, NDPI_PROTOCOL_EDGECAST }, + { 0x400C9800 /* 64.12.152.0/21 */, 21, NDPI_PROTOCOL_EDGECAST }, + { 0x400CA000 /* 64.12.160.0/23 */, 23, NDPI_PROTOCOL_EDGECAST }, + { 0x400CA200 /* 64.12.162.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0x400CA400 /* 64.12.164.0/23 */, 23, NDPI_PROTOCOL_EDGECAST }, + { 0x400CA600 /* 64.12.166.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0x400CA800 /* 64.12.168.0/21 */, 21, NDPI_PROTOCOL_EDGECAST }, + { 0x400CB000 /* 64.12.176.0/22 */, 22, NDPI_PROTOCOL_EDGECAST }, + { 0x400CB400 /* 64.12.180.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0x400CFF00 /* 64.12.255.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0x44E82000 /* 68.232.32.0/21 */, 21, NDPI_PROTOCOL_EDGECAST }, + { 0x44E82800 /* 68.232.40.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0x44E82A00 /* 68.232.42.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0x44E82C00 /* 68.232.44.0/22 */, 22, NDPI_PROTOCOL_EDGECAST }, + { 0x48155000 /* 72.21.80.0/23 */, 23, NDPI_PROTOCOL_EDGECAST }, + { 0x48155400 /* 72.21.84.0/22 */, 22, NDPI_PROTOCOL_EDGECAST }, + { 0x48155A00 /* 72.21.90.0/23 */, 23, NDPI_PROTOCOL_EDGECAST }, + { 0x48155C00 /* 72.21.92.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0x48155E00 /* 72.21.94.0/23 */, 23, NDPI_PROTOCOL_EDGECAST }, + { 0x5DB8D700 /* 93.184.215.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0x5DB8D800 /* 93.184.216.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0x5DB8DA00 /* 93.184.218.0/23 */, 23, NDPI_PROTOCOL_EDGECAST }, + { 0x5DB8DC00 /* 93.184.220.0/22 */, 22, NDPI_PROTOCOL_EDGECAST }, + { 0x6CA1F000 /* 108.161.240.0/23 */, 23, NDPI_PROTOCOL_EDGECAST }, + { 0x6CA1F500 /* 108.161.245.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0x6CA1F700 /* 108.161.247.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0x6CA1FD00 /* 108.161.253.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0x6CA1FE00 /* 108.161.254.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0x6EA42400 /* 110.164.36.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0x6EE8B000 /* 110.232.176.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0x6EE8B200 /* 110.232.178.0/23 */, 23, NDPI_PROTOCOL_EDGECAST }, + { 0x7512E800 /* 117.18.232.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0x7512ED00 /* 117.18.237.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0x7512EE00 /* 117.18.238.0/23 */, 23, NDPI_PROTOCOL_EDGECAST }, + { 0x772E5500 /* 119.46.85.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0x88E49000 /* 136.228.144.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0x98C30400 /* 152.195.4.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0x98C30600 /* 152.195.6.0/23 */, 23, NDPI_PROTOCOL_EDGECAST }, + { 0x98C30800 /* 152.195.8.0/23 */, 23, NDPI_PROTOCOL_EDGECAST }, + { 0x98C30B00 /* 152.195.11.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0x98C30C00 /* 152.195.12.0/22 */, 22, NDPI_PROTOCOL_EDGECAST }, + { 0x98C31000 /* 152.195.16.0/22 */, 22, NDPI_PROTOCOL_EDGECAST }, + { 0x98C31500 /* 152.195.21.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0x98C31600 /* 152.195.22.0/23 */, 23, NDPI_PROTOCOL_EDGECAST }, + { 0x98C31900 /* 152.195.25.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0x98C31A00 /* 152.195.26.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0x98C31C00 /* 152.195.28.0/23 */, 23, NDPI_PROTOCOL_EDGECAST }, + { 0x98C32000 /* 152.195.32.0/21 */, 21, NDPI_PROTOCOL_EDGECAST }, + { 0x98C33200 /* 152.195.50.0/23 */, 23, NDPI_PROTOCOL_EDGECAST }, + { 0x98C33400 /* 152.195.52.0/22 */, 22, NDPI_PROTOCOL_EDGECAST }, + { 0x98C33800 /* 152.195.56.0/21 */, 21, NDPI_PROTOCOL_EDGECAST }, + { 0x98C34000 /* 152.195.64.0/18 */, 18, NDPI_PROTOCOL_EDGECAST }, + { 0x98C38000 /* 152.195.128.0/21 */, 21, NDPI_PROTOCOL_EDGECAST }, + { 0x98C38800 /* 152.195.136.0/22 */, 22, NDPI_PROTOCOL_EDGECAST }, + { 0x98C38C00 /* 152.195.140.0/23 */, 23, NDPI_PROTOCOL_EDGECAST }, + { 0x98C39000 /* 152.195.144.0/21 */, 21, NDPI_PROTOCOL_EDGECAST }, + { 0x98C39800 /* 152.195.152.0/22 */, 22, NDPI_PROTOCOL_EDGECAST }, + { 0x98C39C00 /* 152.195.156.0/23 */, 23, NDPI_PROTOCOL_EDGECAST }, + { 0x98C3A400 /* 152.195.164.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0x98C3A600 /* 152.195.166.0/23 */, 23, NDPI_PROTOCOL_EDGECAST }, + { 0x98C3B300 /* 152.195.179.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0x98C3B500 /* 152.195.181.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0x98C3B600 /* 152.195.182.0/23 */, 23, NDPI_PROTOCOL_EDGECAST }, + { 0x98C3B800 /* 152.195.184.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0x98C3BA00 /* 152.195.186.0/23 */, 23, NDPI_PROTOCOL_EDGECAST }, + { 0x98C3BC00 /* 152.195.188.0/23 */, 23, NDPI_PROTOCOL_EDGECAST }, + { 0x98C3C400 /* 152.195.196.0/22 */, 22, NDPI_PROTOCOL_EDGECAST }, + { 0x98C3CA00 /* 152.195.202.0/23 */, 23, NDPI_PROTOCOL_EDGECAST }, + { 0x98C3CC00 /* 152.195.204.0/22 */, 22, NDPI_PROTOCOL_EDGECAST }, + { 0x98C3D000 /* 152.195.208.0/21 */, 21, NDPI_PROTOCOL_EDGECAST }, + { 0x98C3DB00 /* 152.195.219.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0x98C3DC00 /* 152.195.220.0/23 */, 23, NDPI_PROTOCOL_EDGECAST }, + { 0x98C3DF00 /* 152.195.223.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0x98C3E000 /* 152.195.224.0/23 */, 23, NDPI_PROTOCOL_EDGECAST }, + { 0x98C3E400 /* 152.195.228.0/22 */, 22, NDPI_PROTOCOL_EDGECAST }, + { 0x98C3E800 /* 152.195.232.0/21 */, 21, NDPI_PROTOCOL_EDGECAST }, + { 0x98C3F000 /* 152.195.240.0/20 */, 20, NDPI_PROTOCOL_EDGECAST }, + { 0x98C70000 /* 152.199.0.0/22 */, 22, NDPI_PROTOCOL_EDGECAST }, + { 0x98C70400 /* 152.199.4.0/23 */, 23, NDPI_PROTOCOL_EDGECAST }, + { 0x98C70600 /* 152.199.6.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0x98C71000 /* 152.199.16.0/21 */, 21, NDPI_PROTOCOL_EDGECAST }, + { 0x98C71800 /* 152.199.24.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0x98C72000 /* 152.199.32.0/21 */, 21, NDPI_PROTOCOL_EDGECAST }, + { 0x98C72800 /* 152.199.40.0/22 */, 22, NDPI_PROTOCOL_EDGECAST }, + { 0x98C72C00 /* 152.199.44.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0x98C73000 /* 152.199.48.0/21 */, 21, NDPI_PROTOCOL_EDGECAST }, + { 0x98C73800 /* 152.199.56.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0x98C75A00 /* 152.199.90.0/23 */, 23, NDPI_PROTOCOL_EDGECAST }, + { 0x98C75D00 /* 152.199.93.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0x98C75E00 /* 152.199.94.0/23 */, 23, NDPI_PROTOCOL_EDGECAST }, + { 0x98C76000 /* 152.199.96.0/19 */, 19, NDPI_PROTOCOL_EDGECAST }, + { 0x98C79B00 /* 152.199.155.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0x98C7BF00 /* 152.199.191.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0xC0100100 /* 192.16.1.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0xC0100200 /* 192.16.2.0/23 */, 23, NDPI_PROTOCOL_EDGECAST }, + { 0xC0100600 /* 192.16.6.0/23 */, 23, NDPI_PROTOCOL_EDGECAST }, + { 0xC0100E00 /* 192.16.14.0/23 */, 23, NDPI_PROTOCOL_EDGECAST }, + { 0xC0101000 /* 192.16.16.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0xC0101200 /* 192.16.18.0/23 */, 23, NDPI_PROTOCOL_EDGECAST }, + { 0xC0101800 /* 192.16.24.0/23 */, 23, NDPI_PROTOCOL_EDGECAST }, + { 0xC0102000 /* 192.16.32.0/22 */, 22, NDPI_PROTOCOL_EDGECAST }, + { 0xC0102400 /* 192.16.36.0/23 */, 23, NDPI_PROTOCOL_EDGECAST }, + { 0xC0102600 /* 192.16.38.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0xC0102A00 /* 192.16.42.0/23 */, 23, NDPI_PROTOCOL_EDGECAST }, + { 0xC0102E00 /* 192.16.46.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0xC0103000 /* 192.16.48.0/21 */, 21, NDPI_PROTOCOL_EDGECAST }, + { 0xC0103A00 /* 192.16.58.0/23 */, 23, NDPI_PROTOCOL_EDGECAST }, + { 0xC0103C00 /* 192.16.60.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0xC0103F00 /* 192.16.63.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0xC01E1800 /* 192.30.24.0/23 */, 23, NDPI_PROTOCOL_EDGECAST }, + { 0xC0E58000 /* 192.229.128.0/21 */, 21, NDPI_PROTOCOL_EDGECAST }, + { 0xC0E58800 /* 192.229.136.0/22 */, 22, NDPI_PROTOCOL_EDGECAST }, + { 0xC0E58C00 /* 192.229.140.0/23 */, 23, NDPI_PROTOCOL_EDGECAST }, + { 0xC0E58E00 /* 192.229.142.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0xC0E59000 /* 192.229.144.0/23 */, 23, NDPI_PROTOCOL_EDGECAST }, + { 0xC0E59500 /* 192.229.149.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0xC0E59600 /* 192.229.150.0/23 */, 23, NDPI_PROTOCOL_EDGECAST }, + { 0xC0E59800 /* 192.229.152.0/22 */, 22, NDPI_PROTOCOL_EDGECAST }, + { 0xC0E59C00 /* 192.229.156.0/23 */, 23, NDPI_PROTOCOL_EDGECAST }, + { 0xC0E5A200 /* 192.229.162.0/23 */, 23, NDPI_PROTOCOL_EDGECAST }, + { 0xC0E5A900 /* 192.229.169.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0xC0E5AA00 /* 192.229.170.0/23 */, 23, NDPI_PROTOCOL_EDGECAST }, + { 0xC0E5AD00 /* 192.229.173.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0xC0E5B200 /* 192.229.178.0/23 */, 23, NDPI_PROTOCOL_EDGECAST }, + { 0xC0E5B600 /* 192.229.182.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0xC0E5BD00 /* 192.229.189.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0xC0E5BE00 /* 192.229.190.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0xC0E5C200 /* 192.229.194.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0xC0E5C600 /* 192.229.198.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0xC0E5CA00 /* 192.229.202.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0xC0E5D000 /* 192.229.208.0/22 */, 22, NDPI_PROTOCOL_EDGECAST }, + { 0xC0E5D500 /* 192.229.213.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0xC0E5DA00 /* 192.229.218.0/23 */, 23, NDPI_PROTOCOL_EDGECAST }, + { 0xC0E5DC00 /* 192.229.220.0/22 */, 22, NDPI_PROTOCOL_EDGECAST }, + { 0xC0E5E000 /* 192.229.224.0/23 */, 23, NDPI_PROTOCOL_EDGECAST }, + { 0xC0E5E300 /* 192.229.227.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0xC0E5E400 /* 192.229.228.0/23 */, 23, NDPI_PROTOCOL_EDGECAST }, + { 0xC0E5E700 /* 192.229.231.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0xC0E5E800 /* 192.229.232.0/23 */, 23, NDPI_PROTOCOL_EDGECAST }, + { 0xC0E5EA00 /* 192.229.234.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0xC0E5EC00 /* 192.229.236.0/22 */, 22, NDPI_PROTOCOL_EDGECAST }, + { 0xC0E5F200 /* 192.229.242.0/23 */, 23, NDPI_PROTOCOL_EDGECAST }, + { 0xC0E5F400 /* 192.229.244.0/22 */, 22, NDPI_PROTOCOL_EDGECAST }, + { 0xC0E5F800 /* 192.229.248.0/21 */, 21, NDPI_PROTOCOL_EDGECAST }, + { 0xC6071000 /* 198.7.16.0/22 */, 22, NDPI_PROTOCOL_EDGECAST }, + { 0xC6071400 /* 198.7.20.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0xC6071600 /* 198.7.22.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0xC6071B00 /* 198.7.27.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0xC6071D00 /* 198.7.29.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0xD5AF5000 /* 213.175.80.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + /* End */ + { 0x0, 0, 0 } +}; diff --git a/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_facebook.c b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_facebook.c new file mode 100644 index 0000000000..fc1eb7708b --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_facebook.c @@ -0,0 +1,78 @@ +/* + * + * This file is generated automatically and part of nDPI + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +/* ****************************************************** */ +#include "../ndpi_typedefs.h" +#include "../ndpi_protocol_ids.h" + +static ndpi_network ndpi_protocol_facebook_protocol_list[] = { + { 0x1F0D1800 /* 31.13.24.0/21 */, 21, NDPI_PROTOCOL_FACEBOOK }, + { 0x1F0D4000 /* 31.13.64.0/18 */, 18, NDPI_PROTOCOL_FACEBOOK }, + { 0x2D402800 /* 45.64.40.0/22 */, 22, NDPI_PROTOCOL_FACEBOOK }, + { 0x42DC9000 /* 66.220.144.0/20 */, 20, NDPI_PROTOCOL_FACEBOOK }, + { 0x453FB000 /* 69.63.176.0/20 */, 20, NDPI_PROTOCOL_FACEBOOK }, + { 0x45ABE000 /* 69.171.224.0/19 */, 19, NDPI_PROTOCOL_FACEBOOK }, + { 0x4A774C00 /* 74.119.76.0/22 */, 22, NDPI_PROTOCOL_FACEBOOK }, + { 0x66846000 /* 102.132.96.0/20 */, 20, NDPI_PROTOCOL_FACEBOOK }, + { 0x66847000 /* 102.132.112.0/21 */, 21, NDPI_PROTOCOL_FACEBOOK }, + { 0x66847800 /* 102.132.120.0/24 */, 24, NDPI_PROTOCOL_FACEBOOK }, + { 0x66847A00 /* 102.132.122.0/24 */, 24, NDPI_PROTOCOL_FACEBOOK }, + { 0x66847C00 /* 102.132.124.0/22 */, 22, NDPI_PROTOCOL_FACEBOOK }, + { 0x66DDBC00 /* 102.221.188.0/23 */, 23, NDPI_PROTOCOL_FACEBOOK }, + { 0x67046000 /* 103.4.96.0/22 */, 22, NDPI_PROTOCOL_FACEBOOK }, + { 0x81860000 /* 129.134.0.0/17 */, 17, NDPI_PROTOCOL_FACEBOOK }, + { 0x81868000 /* 129.134.128.0/24 */, 24, NDPI_PROTOCOL_FACEBOOK }, + { 0x81868200 /* 129.134.130.0/23 */, 23, NDPI_PROTOCOL_FACEBOOK }, + { 0x81868400 /* 129.134.132.0/24 */, 24, NDPI_PROTOCOL_FACEBOOK }, + { 0x81868700 /* 129.134.135.0/24 */, 24, NDPI_PROTOCOL_FACEBOOK }, + { 0x81868800 /* 129.134.136.0/22 */, 22, NDPI_PROTOCOL_FACEBOOK }, + { 0x81868C00 /* 129.134.140.0/24 */, 24, NDPI_PROTOCOL_FACEBOOK }, + { 0x81868F00 /* 129.134.143.0/24 */, 24, NDPI_PROTOCOL_FACEBOOK }, + { 0x81869000 /* 129.134.144.0/24 */, 24, NDPI_PROTOCOL_FACEBOOK }, + { 0x81869300 /* 129.134.147.0/24 */, 24, NDPI_PROTOCOL_FACEBOOK }, + { 0x81869400 /* 129.134.148.0/23 */, 23, NDPI_PROTOCOL_FACEBOOK }, + { 0x81869600 /* 129.134.150.0/24 */, 24, NDPI_PROTOCOL_FACEBOOK }, + { 0x81869A00 /* 129.134.154.0/23 */, 23, NDPI_PROTOCOL_FACEBOOK }, + { 0x81869C00 /* 129.134.156.0/22 */, 22, NDPI_PROTOCOL_FACEBOOK }, + { 0x8186A000 /* 129.134.160.0/24 */, 24, NDPI_PROTOCOL_FACEBOOK }, + { 0x8186A300 /* 129.134.163.0/24 */, 24, NDPI_PROTOCOL_FACEBOOK }, + { 0x8186A400 /* 129.134.164.0/23 */, 23, NDPI_PROTOCOL_FACEBOOK }, + { 0x8186A800 /* 129.134.168.0/21 */, 21, NDPI_PROTOCOL_FACEBOOK }, + { 0x8186B000 /* 129.134.176.0/23 */, 23, NDPI_PROTOCOL_FACEBOOK }, + { 0x9DF00000 /* 157.240.0.0/17 */, 17, NDPI_PROTOCOL_FACEBOOK }, + { 0x9DF09C00 /* 157.240.156.0/23 */, 23, NDPI_PROTOCOL_FACEBOOK }, + { 0x9DF09F00 /* 157.240.159.0/24 */, 24, NDPI_PROTOCOL_FACEBOOK }, + { 0x9DF0AC00 /* 157.240.172.0/24 */, 24, NDPI_PROTOCOL_FACEBOOK }, + { 0x9DF0AE00 /* 157.240.174.0/23 */, 23, NDPI_PROTOCOL_FACEBOOK }, + { 0x9DF0B000 /* 157.240.176.0/23 */, 23, NDPI_PROTOCOL_FACEBOOK }, + { 0x9DF0B300 /* 157.240.179.0/24 */, 24, NDPI_PROTOCOL_FACEBOOK }, + { 0x9DF0B400 /* 157.240.180.0/23 */, 23, NDPI_PROTOCOL_FACEBOOK }, + { 0x9DF0B600 /* 157.240.182.0/24 */, 24, NDPI_PROTOCOL_FACEBOOK }, + { 0x9DF0C000 /* 157.240.192.0/18 */, 18, NDPI_PROTOCOL_FACEBOOK }, + { 0xA3728000 /* 163.114.128.0/20 */, 20, NDPI_PROTOCOL_FACEBOOK }, + { 0xADFC4000 /* 173.252.64.0/18 */, 18, NDPI_PROTOCOL_FACEBOOK }, + { 0xB33CC000 /* 179.60.192.0/22 */, 22, NDPI_PROTOCOL_FACEBOOK }, + { 0xB93CD800 /* 185.60.216.0/22 */, 22, NDPI_PROTOCOL_FACEBOOK }, + { 0xB959DA00 /* 185.89.218.0/23 */, 23, NDPI_PROTOCOL_FACEBOOK }, + { 0xC4314400 /* 196.49.68.0/23 */, 23, NDPI_PROTOCOL_FACEBOOK }, + { 0xC7C94000 /* 199.201.64.0/22 */, 22, NDPI_PROTOCOL_FACEBOOK }, + { 0xCC0F1400 /* 204.15.20.0/22 */, 22, NDPI_PROTOCOL_FACEBOOK }, + /* End */ + { 0x0, 0, 0 } +}; diff --git a/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_github.c b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_github.c new file mode 100644 index 0000000000..90566e5a41 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_github.c @@ -0,0 +1,30 @@ +/* + * + * This file is generated automatically and part of nDPI + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +/* ****************************************************** */ +#include "../ndpi_typedefs.h" +#include "../ndpi_protocol_ids.h" + +static ndpi_network ndpi_protocol_github_protocol_list[] = { + { 0x8C527000 /* 140.82.112.0/20 */, 20, NDPI_PROTOCOL_GITHUB }, + { 0x8F374000 /* 143.55.64.0/20 */, 20, NDPI_PROTOCOL_GITHUB }, + { 0xC01EFC00 /* 192.30.252.0/22 */, 22, NDPI_PROTOCOL_GITHUB }, + /* End */ + { 0x0, 0, 0 } +}; diff --git a/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_goto.c b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_goto.c new file mode 100644 index 0000000000..357e746731 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_goto.c @@ -0,0 +1,90 @@ +/* + * + * This file is generated automatically and part of nDPI + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +/* ****************************************************** */ +#include "../ndpi_typedefs.h" +#include "../ndpi_protocol_ids.h" + +static ndpi_network ndpi_protocol_goto_protocol_list[] = { + { 0x17EFE300 /* 23.239.227.0/24 */, 24, NDPI_PROTOCOL_GOTO }, + { 0x404A1100 /* 64.74.17.0/24 */, 24, NDPI_PROTOCOL_GOTO }, + { 0x404A1200 /* 64.74.18.0/23 */, 23, NDPI_PROTOCOL_GOTO }, + { 0x43D94400 /* 67.217.68.0/24 */, 24, NDPI_PROTOCOL_GOTO }, + { 0x43D94600 /* 67.217.70.0/23 */, 23, NDPI_PROTOCOL_GOTO }, + { 0x43D94800 /* 67.217.72.0/24 */, 24, NDPI_PROTOCOL_GOTO }, + { 0x43D94B00 /* 67.217.75.0/24 */, 24, NDPI_PROTOCOL_GOTO }, + { 0x43D94C00 /* 67.217.76.0/23 */, 23, NDPI_PROTOCOL_GOTO }, + { 0x43D94E00 /* 67.217.78.0/24 */, 24, NDPI_PROTOCOL_GOTO }, + { 0x43D95000 /* 67.217.80.0/23 */, 23, NDPI_PROTOCOL_GOTO }, + { 0x43D95200 /* 67.217.82.0/24 */, 24, NDPI_PROTOCOL_GOTO }, + { 0x43D95400 /* 67.217.84.0/24 */, 24, NDPI_PROTOCOL_GOTO }, + { 0x43D95600 /* 67.217.86.0/24 */, 24, NDPI_PROTOCOL_GOTO }, + { 0x43D95800 /* 67.217.88.0/24 */, 24, NDPI_PROTOCOL_GOTO }, + { 0x43D95A00 /* 67.217.90.0/23 */, 23, NDPI_PROTOCOL_GOTO }, + { 0x43D95C00 /* 67.217.92.0/24 */, 24, NDPI_PROTOCOL_GOTO }, + { 0x43D95E00 /* 67.217.94.0/23 */, 23, NDPI_PROTOCOL_GOTO }, + { 0x44400000 /* 68.64.0.0/24 */, 24, NDPI_PROTOCOL_GOTO }, + { 0x44400800 /* 68.64.8.0/23 */, 23, NDPI_PROTOCOL_GOTO }, + { 0x44400A00 /* 68.64.10.0/24 */, 24, NDPI_PROTOCOL_GOTO }, + { 0x44400C00 /* 68.64.12.0/23 */, 23, NDPI_PROTOCOL_GOTO }, + { 0x44400E00 /* 68.64.14.0/24 */, 24, NDPI_PROTOCOL_GOTO }, + { 0x44401100 /* 68.64.17.0/24 */, 24, NDPI_PROTOCOL_GOTO }, + { 0x44401200 /* 68.64.18.0/23 */, 23, NDPI_PROTOCOL_GOTO }, + { 0x44401400 /* 68.64.20.0/24 */, 24, NDPI_PROTOCOL_GOTO }, + { 0x44401600 /* 68.64.22.0/23 */, 23, NDPI_PROTOCOL_GOTO }, + { 0x44401800 /* 68.64.24.0/23 */, 23, NDPI_PROTOCOL_GOTO }, + { 0x44401B00 /* 68.64.27.0/24 */, 24, NDPI_PROTOCOL_GOTO }, + { 0x44401C00 /* 68.64.28.0/23 */, 23, NDPI_PROTOCOL_GOTO }, + { 0x44401E00 /* 68.64.30.0/24 */, 24, NDPI_PROTOCOL_GOTO }, + { 0x4E6C7400 /* 78.108.116.0/22 */, 22, NDPI_PROTOCOL_GOTO }, + { 0x4E6C7800 /* 78.108.120.0/23 */, 23, NDPI_PROTOCOL_GOTO }, + { 0x4E6C7E00 /* 78.108.126.0/23 */, 23, NDPI_PROTOCOL_GOTO }, + { 0xADC70000 /* 173.199.0.0/21 */, 21, NDPI_PROTOCOL_GOTO }, + { 0xADC70C00 /* 173.199.12.0/23 */, 23, NDPI_PROTOCOL_GOTO }, + { 0xADC70F00 /* 173.199.15.0/24 */, 24, NDPI_PROTOCOL_GOTO }, + { 0xADC71100 /* 173.199.17.0/24 */, 24, NDPI_PROTOCOL_GOTO }, + { 0xADC71200 /* 173.199.18.0/23 */, 23, NDPI_PROTOCOL_GOTO }, + { 0xADC71400 /* 173.199.20.0/24 */, 24, NDPI_PROTOCOL_GOTO }, + { 0xADC71700 /* 173.199.23.0/24 */, 24, NDPI_PROTOCOL_GOTO }, + { 0xADC71A00 /* 173.199.26.0/23 */, 23, NDPI_PROTOCOL_GOTO }, + { 0xADC71E00 /* 173.199.30.0/23 */, 23, NDPI_PROTOCOL_GOTO }, + { 0xADC72000 /* 173.199.32.0/23 */, 23, NDPI_PROTOCOL_GOTO }, + { 0xADC72B00 /* 173.199.43.0/24 */, 24, NDPI_PROTOCOL_GOTO }, + { 0xADC72C00 /* 173.199.44.0/22 */, 22, NDPI_PROTOCOL_GOTO }, + { 0xADC73200 /* 173.199.50.0/23 */, 23, NDPI_PROTOCOL_GOTO }, + { 0xADC73400 /* 173.199.52.0/22 */, 22, NDPI_PROTOCOL_GOTO }, + { 0xADC73C00 /* 173.199.60.0/22 */, 22, NDPI_PROTOCOL_GOTO }, + { 0xBC422B00 /* 188.66.43.0/24 */, 24, NDPI_PROTOCOL_GOTO }, + { 0xCAAD1900 /* 202.173.25.0/24 */, 24, NDPI_PROTOCOL_GOTO }, + { 0xCEB76400 /* 206.183.100.0/24 */, 24, NDPI_PROTOCOL_GOTO }, + { 0xD873D000 /* 216.115.208.0/24 */, 24, NDPI_PROTOCOL_GOTO }, + { 0xD873D200 /* 216.115.210.0/23 */, 23, NDPI_PROTOCOL_GOTO }, + { 0xD873D500 /* 216.115.213.0/24 */, 24, NDPI_PROTOCOL_GOTO }, + { 0xD873D600 /* 216.115.214.0/23 */, 23, NDPI_PROTOCOL_GOTO }, + { 0xD873D900 /* 216.115.217.0/24 */, 24, NDPI_PROTOCOL_GOTO }, + { 0xD873DA00 /* 216.115.218.0/24 */, 24, NDPI_PROTOCOL_GOTO }, + { 0xD873DD00 /* 216.115.221.0/24 */, 24, NDPI_PROTOCOL_GOTO }, + { 0xD873DE00 /* 216.115.222.0/23 */, 23, NDPI_PROTOCOL_GOTO }, + { 0xD8DB7200 /* 216.219.114.0/23 */, 23, NDPI_PROTOCOL_GOTO }, + { 0xD8DB7400 /* 216.219.116.0/24 */, 24, NDPI_PROTOCOL_GOTO }, + { 0xD8DB7700 /* 216.219.119.0/24 */, 24, NDPI_PROTOCOL_GOTO }, + { 0xD8DB7800 /* 216.219.120.0/22 */, 22, NDPI_PROTOCOL_GOTO }, + /* End */ + { 0x0, 0, 0 } +}; diff --git a/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_hotspotshield.c b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_hotspotshield.c new file mode 100644 index 0000000000..d6e08358d2 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_hotspotshield.c @@ -0,0 +1,27 @@ +/* + * + * This file is generated automatically and part of nDPI + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +/* ****************************************************** */ +#include "../ndpi_typedefs.h" +#include "../ndpi_protocol_ids.h" + +static ndpi_network ndpi_protocol_hotspot_shield_protocol_list[] = { + /* End */ + { 0x0, 0, 0 } +}; diff --git a/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_line.c b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_line.c new file mode 100644 index 0000000000..fbb4408bfb --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_line.c @@ -0,0 +1,40 @@ +/* + * + * This file is generated automatically and part of nDPI + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +/* ****************************************************** */ +#include "../ndpi_typedefs.h" +#include "../ndpi_protocol_ids.h" + +static ndpi_network ndpi_protocol_line_protocol_list[] = { + { 0x2BDF0000 /* 43.223.0.0/16 */, 16, NDPI_PROTOCOL_LINE }, + { 0x67021C00 /* 103.2.28.0/24 */, 24, NDPI_PROTOCOL_LINE }, + { 0x67021E00 /* 103.2.30.0/23 */, 23, NDPI_PROTOCOL_LINE }, + { 0x77EBE000 /* 119.235.224.0/24 */, 24, NDPI_PROTOCOL_LINE }, + { 0x77EBE800 /* 119.235.232.0/24 */, 24, NDPI_PROTOCOL_LINE }, + { 0x77EBEB00 /* 119.235.235.0/24 */, 24, NDPI_PROTOCOL_LINE }, + { 0x77EBEC00 /* 119.235.236.0/23 */, 23, NDPI_PROTOCOL_LINE }, + { 0x935C8000 /* 147.92.128.0/17 */, 17, NDPI_PROTOCOL_LINE }, + { 0xCB688000 /* 203.104.128.0/20 */, 20, NDPI_PROTOCOL_LINE }, + { 0xCB689000 /* 203.104.144.0/21 */, 21, NDPI_PROTOCOL_LINE }, + { 0xCB689800 /* 203.104.152.0/22 */, 22, NDPI_PROTOCOL_LINE }, + { 0xCB689C00 /* 203.104.156.0/23 */, 23, NDPI_PROTOCOL_LINE }, + { 0xCB689E00 /* 203.104.158.0/24 */, 24, NDPI_PROTOCOL_LINE }, + /* End */ + { 0x0, 0, 0 } +}; diff --git a/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_netflix.c b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_netflix.c new file mode 100644 index 0000000000..493cdc3382 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_netflix.c @@ -0,0 +1,41 @@ +/* + * + * This file is generated automatically and part of nDPI + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +/* ****************************************************** */ +#include "../ndpi_typedefs.h" +#include "../ndpi_protocol_ids.h" + +static ndpi_network ndpi_protocol_netflix_protocol_list[] = { + { 0x17F60000 /* 23.246.0.0/18 */, 18, NDPI_PROTOCOL_NETFLIX }, + { 0x254DB800 /* 37.77.184.0/21 */, 21, NDPI_PROTOCOL_NETFLIX }, + { 0x2D390000 /* 45.57.0.0/17 */, 17, NDPI_PROTOCOL_NETFLIX }, + { 0x40788000 /* 64.120.128.0/17 */, 17, NDPI_PROTOCOL_NETFLIX }, + { 0x42C58000 /* 66.197.128.0/17 */, 17, NDPI_PROTOCOL_NETFLIX }, + { 0x4535E000 /* 69.53.224.0/19 */, 19, NDPI_PROTOCOL_NETFLIX }, + { 0x6CAF2000 /* 108.175.32.0/20 */, 20, NDPI_PROTOCOL_NETFLIX }, + { 0xB902DC00 /* 185.2.220.0/22 */, 22, NDPI_PROTOCOL_NETFLIX }, + { 0xB909BC00 /* 185.9.188.0/22 */, 22, NDPI_PROTOCOL_NETFLIX }, + { 0xC0AD4000 /* 192.173.64.0/18 */, 18, NDPI_PROTOCOL_NETFLIX }, + { 0xC6266000 /* 198.38.96.0/19 */, 19, NDPI_PROTOCOL_NETFLIX }, + { 0xC62D3000 /* 198.45.48.0/20 */, 20, NDPI_PROTOCOL_NETFLIX }, + { 0xCF2D4800 /* 207.45.72.0/22 */, 22, NDPI_PROTOCOL_NETFLIX }, + { 0xD04B4C00 /* 208.75.76.0/22 */, 22, NDPI_PROTOCOL_NETFLIX }, + /* End */ + { 0x0, 0, 0 } +}; diff --git a/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_opendns.c b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_opendns.c new file mode 100644 index 0000000000..0b1b26a5b5 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_opendns.c @@ -0,0 +1,147 @@ +/* + * + * This file is generated automatically and part of nDPI + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +/* ****************************************************** */ +#include "../ndpi_typedefs.h" +#include "../ndpi_protocol_ids.h" + +static ndpi_network ndpi_protocol_opendns_protocol_list[] = { + { 0x43D74000 /* 67.215.64.0/23 */, 23, NDPI_PROTOCOL_OPENDNS }, + { 0x43D74200 /* 67.215.66.0/24 */, 24, NDPI_PROTOCOL_OPENDNS }, + { 0x43D74500 /* 67.215.69.0/24 */, 24, NDPI_PROTOCOL_OPENDNS }, + { 0x43D74600 /* 67.215.70.0/24 */, 24, NDPI_PROTOCOL_OPENDNS }, + { 0x43D74900 /* 67.215.73.0/24 */, 24, NDPI_PROTOCOL_OPENDNS }, + { 0x43D74B00 /* 67.215.75.0/24 */, 24, NDPI_PROTOCOL_OPENDNS }, + { 0x43D74C00 /* 67.215.76.0/22 */, 22, NDPI_PROTOCOL_OPENDNS }, + { 0x43D75000 /* 67.215.80.0/24 */, 24, NDPI_PROTOCOL_OPENDNS }, + { 0x43D75200 /* 67.215.82.0/23 */, 23, NDPI_PROTOCOL_OPENDNS }, + { 0x43D75400 /* 67.215.84.0/23 */, 23, NDPI_PROTOCOL_OPENDNS }, + { 0x43D75600 /* 67.215.86.0/24 */, 24, NDPI_PROTOCOL_OPENDNS }, + { 0x43D75800 /* 67.215.88.0/24 */, 24, NDPI_PROTOCOL_OPENDNS }, + { 0x43D75A00 /* 67.215.90.0/24 */, 24, NDPI_PROTOCOL_OPENDNS }, + { 0x43D75C00 /* 67.215.92.0/24 */, 24, NDPI_PROTOCOL_OPENDNS }, + { 0x43D75E00 /* 67.215.94.0/24 */, 24, NDPI_PROTOCOL_OPENDNS }, + { 0x92700000 /* 146.112.0.0/21 */, 21, NDPI_PROTOCOL_OPENDNS }, + { 0x92700800 /* 146.112.8.0/23 */, 23, NDPI_PROTOCOL_OPENDNS }, + { 0x92700B00 /* 146.112.11.0/24 */, 24, NDPI_PROTOCOL_OPENDNS }, + { 0x92700C00 /* 146.112.12.0/24 */, 24, NDPI_PROTOCOL_OPENDNS }, + { 0x92700E00 /* 146.112.14.0/23 */, 23, NDPI_PROTOCOL_OPENDNS }, + { 0x92701000 /* 146.112.16.0/23 */, 23, NDPI_PROTOCOL_OPENDNS }, + { 0x92701200 /* 146.112.18.0/24 */, 24, NDPI_PROTOCOL_OPENDNS }, + { 0x92701400 /* 146.112.20.0/22 */, 22, NDPI_PROTOCOL_OPENDNS }, + { 0x92701800 /* 146.112.24.0/23 */, 23, NDPI_PROTOCOL_OPENDNS }, + { 0x92701A00 /* 146.112.26.0/24 */, 24, NDPI_PROTOCOL_OPENDNS }, + { 0x92701C00 /* 146.112.28.0/23 */, 23, NDPI_PROTOCOL_OPENDNS }, + { 0x92701F00 /* 146.112.31.0/24 */, 24, NDPI_PROTOCOL_OPENDNS }, + { 0x92702100 /* 146.112.33.0/24 */, 24, NDPI_PROTOCOL_OPENDNS }, + { 0x92702200 /* 146.112.34.0/23 */, 23, NDPI_PROTOCOL_OPENDNS }, + { 0x92702400 /* 146.112.36.0/23 */, 23, NDPI_PROTOCOL_OPENDNS }, + { 0x92702600 /* 146.112.38.0/24 */, 24, NDPI_PROTOCOL_OPENDNS }, + { 0x92702800 /* 146.112.40.0/21 */, 21, NDPI_PROTOCOL_OPENDNS }, + { 0x92703000 /* 146.112.48.0/20 */, 20, NDPI_PROTOCOL_OPENDNS }, + { 0x92704000 /* 146.112.64.0/22 */, 22, NDPI_PROTOCOL_OPENDNS }, + { 0x92704800 /* 146.112.72.0/23 */, 23, NDPI_PROTOCOL_OPENDNS }, + { 0x92704E00 /* 146.112.78.0/23 */, 23, NDPI_PROTOCOL_OPENDNS }, + { 0x92705100 /* 146.112.81.0/24 */, 24, NDPI_PROTOCOL_OPENDNS }, + { 0x92705200 /* 146.112.82.0/23 */, 23, NDPI_PROTOCOL_OPENDNS }, + { 0x92705400 /* 146.112.84.0/23 */, 23, NDPI_PROTOCOL_OPENDNS }, + { 0x92705600 /* 146.112.86.0/24 */, 24, NDPI_PROTOCOL_OPENDNS }, + { 0x92705C00 /* 146.112.92.0/22 */, 22, NDPI_PROTOCOL_OPENDNS }, + { 0x92706000 /* 146.112.96.0/20 */, 20, NDPI_PROTOCOL_OPENDNS }, + { 0x92707000 /* 146.112.112.0/21 */, 21, NDPI_PROTOCOL_OPENDNS }, + { 0x92707800 /* 146.112.120.0/24 */, 24, NDPI_PROTOCOL_OPENDNS }, + { 0x92708000 /* 146.112.128.0/19 */, 19, NDPI_PROTOCOL_OPENDNS }, + { 0x9270A000 /* 146.112.160.0/20 */, 20, NDPI_PROTOCOL_OPENDNS }, + { 0x9270B000 /* 146.112.176.0/22 */, 22, NDPI_PROTOCOL_OPENDNS }, + { 0x9270B800 /* 146.112.184.0/22 */, 22, NDPI_PROTOCOL_OPENDNS }, + { 0x9270BE00 /* 146.112.190.0/23 */, 23, NDPI_PROTOCOL_OPENDNS }, + { 0x9270C000 /* 146.112.192.0/21 */, 21, NDPI_PROTOCOL_OPENDNS }, + { 0x9270C800 /* 146.112.200.0/23 */, 23, NDPI_PROTOCOL_OPENDNS }, + { 0x9270CB00 /* 146.112.203.0/24 */, 24, NDPI_PROTOCOL_OPENDNS }, + { 0x9270CC00 /* 146.112.204.0/22 */, 22, NDPI_PROTOCOL_OPENDNS }, + { 0x9270D000 /* 146.112.208.0/24 */, 24, NDPI_PROTOCOL_OPENDNS }, + { 0x9270D200 /* 146.112.210.0/23 */, 23, NDPI_PROTOCOL_OPENDNS }, + { 0x9270D400 /* 146.112.212.0/24 */, 24, NDPI_PROTOCOL_OPENDNS }, + { 0x9270D600 /* 146.112.214.0/23 */, 23, NDPI_PROTOCOL_OPENDNS }, + { 0x9270D800 /* 146.112.216.0/23 */, 23, NDPI_PROTOCOL_OPENDNS }, + { 0x9270DB00 /* 146.112.219.0/24 */, 24, NDPI_PROTOCOL_OPENDNS }, + { 0x9270DD00 /* 146.112.221.0/24 */, 24, NDPI_PROTOCOL_OPENDNS }, + { 0x9270DE00 /* 146.112.222.0/23 */, 23, NDPI_PROTOCOL_OPENDNS }, + { 0x9270E000 /* 146.112.224.0/19 */, 19, NDPI_PROTOCOL_OPENDNS }, + { 0x97BA0300 /* 151.186.3.0/24 */, 24, NDPI_PROTOCOL_OPENDNS }, + { 0x97BA0500 /* 151.186.5.0/24 */, 24, NDPI_PROTOCOL_OPENDNS }, + { 0x97BA0600 /* 151.186.6.0/24 */, 24, NDPI_PROTOCOL_OPENDNS }, + { 0x9BBE0000 /* 155.190.0.0/22 */, 22, NDPI_PROTOCOL_OPENDNS }, + { 0x9BBE0800 /* 155.190.8.0/23 */, 23, NDPI_PROTOCOL_OPENDNS }, + { 0x9BBE0F00 /* 155.190.15.0/24 */, 24, NDPI_PROTOCOL_OPENDNS }, + { 0x9BBE1100 /* 155.190.17.0/24 */, 24, NDPI_PROTOCOL_OPENDNS }, + { 0x9BBE1200 /* 155.190.18.0/23 */, 23, NDPI_PROTOCOL_OPENDNS }, + { 0x9BBE1400 /* 155.190.20.0/23 */, 23, NDPI_PROTOCOL_OPENDNS }, + { 0x9BBE1600 /* 155.190.22.0/24 */, 24, NDPI_PROTOCOL_OPENDNS }, + { 0x9BBE1C00 /* 155.190.28.0/23 */, 23, NDPI_PROTOCOL_OPENDNS }, + { 0x9BBE2100 /* 155.190.33.0/24 */, 24, NDPI_PROTOCOL_OPENDNS }, + { 0x9BBE2200 /* 155.190.34.0/23 */, 23, NDPI_PROTOCOL_OPENDNS }, + { 0x9BBE2400 /* 155.190.36.0/22 */, 22, NDPI_PROTOCOL_OPENDNS }, + { 0x9BBE2A00 /* 155.190.42.0/23 */, 23, NDPI_PROTOCOL_OPENDNS }, + { 0x9BBE2C00 /* 155.190.44.0/22 */, 22, NDPI_PROTOCOL_OPENDNS }, + { 0x9BBE3000 /* 155.190.48.0/22 */, 22, NDPI_PROTOCOL_OPENDNS }, + { 0x9BBE3500 /* 155.190.53.0/24 */, 24, NDPI_PROTOCOL_OPENDNS }, + { 0x9BBE3600 /* 155.190.54.0/23 */, 23, NDPI_PROTOCOL_OPENDNS }, + { 0x9BBE4200 /* 155.190.66.0/23 */, 23, NDPI_PROTOCOL_OPENDNS }, + { 0x9BBE4400 /* 155.190.68.0/23 */, 23, NDPI_PROTOCOL_OPENDNS }, + { 0x9BBE4600 /* 155.190.70.0/24 */, 24, NDPI_PROTOCOL_OPENDNS }, + { 0x9BBE5300 /* 155.190.83.0/24 */, 24, NDPI_PROTOCOL_OPENDNS }, + { 0x9BBE5400 /* 155.190.84.0/24 */, 24, NDPI_PROTOCOL_OPENDNS }, + { 0x9BBE5800 /* 155.190.88.0/24 */, 24, NDPI_PROTOCOL_OPENDNS }, + { 0x9BBE7300 /* 155.190.115.0/24 */, 24, NDPI_PROTOCOL_OPENDNS }, + { 0x9BBE7400 /* 155.190.116.0/24 */, 24, NDPI_PROTOCOL_OPENDNS }, + { 0x9BBE8000 /* 155.190.128.0/21 */, 21, NDPI_PROTOCOL_OPENDNS }, + { 0x9BBE8800 /* 155.190.136.0/22 */, 22, NDPI_PROTOCOL_OPENDNS }, + { 0x9BBE8C00 /* 155.190.140.0/24 */, 24, NDPI_PROTOCOL_OPENDNS }, + { 0x9BBEA000 /* 155.190.160.0/24 */, 24, NDPI_PROTOCOL_OPENDNS }, + { 0x9BBEC000 /* 155.190.192.0/22 */, 22, NDPI_PROTOCOL_OPENDNS }, + { 0x9BBEC400 /* 155.190.196.0/23 */, 23, NDPI_PROTOCOL_OPENDNS }, + { 0x9BBEC600 /* 155.190.198.0/24 */, 24, NDPI_PROTOCOL_OPENDNS }, + { 0x9BBEC800 /* 155.190.200.0/23 */, 23, NDPI_PROTOCOL_OPENDNS }, + { 0x9BBECA00 /* 155.190.202.0/24 */, 24, NDPI_PROTOCOL_OPENDNS }, + { 0x9BBECC00 /* 155.190.204.0/22 */, 22, NDPI_PROTOCOL_OPENDNS }, + { 0x9BBED000 /* 155.190.208.0/23 */, 23, NDPI_PROTOCOL_OPENDNS }, + { 0x9BBED300 /* 155.190.211.0/24 */, 24, NDPI_PROTOCOL_OPENDNS }, + { 0x9BBED400 /* 155.190.212.0/22 */, 22, NDPI_PROTOCOL_OPENDNS }, + { 0x9BBEDA00 /* 155.190.218.0/24 */, 24, NDPI_PROTOCOL_OPENDNS }, + { 0x9BBEDD00 /* 155.190.221.0/24 */, 24, NDPI_PROTOCOL_OPENDNS }, + { 0x9BBEDF00 /* 155.190.223.0/24 */, 24, NDPI_PROTOCOL_OPENDNS }, + { 0x9BBEE200 /* 155.190.226.0/23 */, 23, NDPI_PROTOCOL_OPENDNS }, + { 0x9BBEE500 /* 155.190.229.0/24 */, 24, NDPI_PROTOCOL_OPENDNS }, + { 0x9BBEE800 /* 155.190.232.0/24 */, 24, NDPI_PROTOCOL_OPENDNS }, + { 0x9BBEEE00 /* 155.190.238.0/24 */, 24, NDPI_PROTOCOL_OPENDNS }, + { 0x9BBEF800 /* 155.190.248.0/24 */, 24, NDPI_PROTOCOL_OPENDNS }, + { 0x9BBEFA00 /* 155.190.250.0/23 */, 23, NDPI_PROTOCOL_OPENDNS }, + { 0x9BBEFE00 /* 155.190.254.0/24 */, 24, NDPI_PROTOCOL_OPENDNS }, + { 0xB93C5400 /* 185.60.84.0/24 */, 24, NDPI_PROTOCOL_OPENDNS }, + { 0xB93C5600 /* 185.60.86.0/23 */, 23, NDPI_PROTOCOL_OPENDNS }, + { 0xCCC2E800 /* 204.194.232.0/24 */, 24, NDPI_PROTOCOL_OPENDNS }, + { 0xCCC2EA00 /* 204.194.234.0/24 */, 24, NDPI_PROTOCOL_OPENDNS }, + { 0xCCC2ED00 /* 204.194.237.0/24 */, 24, NDPI_PROTOCOL_OPENDNS }, + { 0xCCC2EE00 /* 204.194.238.0/23 */, 23, NDPI_PROTOCOL_OPENDNS }, + { 0xD043D800 /* 208.67.216.0/21 */, 21, NDPI_PROTOCOL_OPENDNS }, + { 0xD0452000 /* 208.69.32.0/21 */, 21, NDPI_PROTOCOL_OPENDNS }, + /* End */ + { 0x0, 0, 0 } +}; diff --git a/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_riotgames.c b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_riotgames.c new file mode 100644 index 0000000000..12c10a6770 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_riotgames.c @@ -0,0 +1,43 @@ +/* + * + * This file is generated automatically and part of nDPI + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +/* ****************************************************** */ +#include "../ndpi_typedefs.h" +#include "../ndpi_protocol_ids.h" + +static ndpi_network ndpi_protocol_riotgames_protocol_list[] = { + { 0x2BE54000 /* 43.229.64.0/22 */, 22, NDPI_PROTOCOL_RIOTGAMES }, + { 0x2D072400 /* 45.7.36.0/23 */, 23, NDPI_PROTOCOL_RIOTGAMES }, + { 0x2D072700 /* 45.7.39.0/24 */, 24, NDPI_PROTOCOL_RIOTGAMES }, + { 0x2DFAD000 /* 45.250.208.0/22 */, 22, NDPI_PROTOCOL_RIOTGAMES }, + { 0x67DB8000 /* 103.219.128.0/24 */, 24, NDPI_PROTOCOL_RIOTGAMES }, + { 0x67F0E000 /* 103.240.224.0/22 */, 22, NDPI_PROTOCOL_RIOTGAMES }, + { 0x68A08000 /* 104.160.128.0/19 */, 19, NDPI_PROTOCOL_RIOTGAMES }, + { 0x8A000C00 /* 138.0.12.0/22 */, 22, NDPI_PROTOCOL_RIOTGAMES }, + { 0x976AF800 /* 151.106.248.0/22 */, 22, NDPI_PROTOCOL_RIOTGAMES }, + { 0x976AFC00 /* 151.106.252.0/24 */, 24, NDPI_PROTOCOL_RIOTGAMES }, + { 0x976AFE00 /* 151.106.254.0/23 */, 23, NDPI_PROTOCOL_RIOTGAMES }, + { 0xA2F94800 /* 162.249.72.0/21 */, 21, NDPI_PROTOCOL_RIOTGAMES }, + { 0xB6A27800 /* 182.162.120.0/21 */, 21, NDPI_PROTOCOL_RIOTGAMES }, + { 0xB9284000 /* 185.40.64.0/22 */, 22, NDPI_PROTOCOL_RIOTGAMES }, + { 0xC040A800 /* 192.64.168.0/21 */, 21, NDPI_PROTOCOL_RIOTGAMES }, + { 0xC0CF0000 /* 192.207.0.0/24 */, 24, NDPI_PROTOCOL_RIOTGAMES }, + /* End */ + { 0x0, 0, 0 } +}; diff --git a/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_starcraft.c b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_starcraft.c new file mode 100644 index 0000000000..50d88f307a --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_starcraft.c @@ -0,0 +1,61 @@ +/* + * + * This file is generated automatically and part of nDPI + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +/* ****************************************************** */ +#include "../ndpi_typedefs.h" +#include "../ndpi_protocol_ids.h" + +static ndpi_network ndpi_protocol_starcraft_protocol_list[] = { + { 0x052AA800 /* 5.42.168.0/21 */, 21, NDPI_PROTOCOL_STARCRAFT }, + { 0x052AB000 /* 5.42.176.0/20 */, 20, NDPI_PROTOCOL_STARCRAFT }, + { 0x18690000 /* 24.105.0.0/19 */, 19, NDPI_PROTOCOL_STARCRAFT }, + { 0x18692000 /* 24.105.32.0/20 */, 20, NDPI_PROTOCOL_STARCRAFT }, + { 0x18693000 /* 24.105.48.0/21 */, 21, NDPI_PROTOCOL_STARCRAFT }, + { 0x18693800 /* 24.105.56.0/22 */, 22, NDPI_PROTOCOL_STARCRAFT }, + { 0x18693D00 /* 24.105.61.0/24 */, 24, NDPI_PROTOCOL_STARCRAFT }, + { 0x18693E00 /* 24.105.62.0/23 */, 23, NDPI_PROTOCOL_STARCRAFT }, + { 0x25F40000 /* 37.244.0.0/19 */, 19, NDPI_PROTOCOL_STARCRAFT }, + { 0x25F42000 /* 37.244.32.0/20 */, 20, NDPI_PROTOCOL_STARCRAFT }, + { 0x25F43000 /* 37.244.48.0/23 */, 23, NDPI_PROTOCOL_STARCRAFT }, + { 0x25F43200 /* 37.244.50.0/24 */, 24, NDPI_PROTOCOL_STARCRAFT }, + { 0x25F43400 /* 37.244.52.0/22 */, 22, NDPI_PROTOCOL_STARCRAFT }, + { 0x25F43800 /* 37.244.56.0/21 */, 21, NDPI_PROTOCOL_STARCRAFT }, + { 0x3B992800 /* 59.153.40.0/23 */, 23, NDPI_PROTOCOL_STARCRAFT }, + { 0x67C62000 /* 103.198.32.0/23 */, 23, NDPI_PROTOCOL_STARCRAFT }, + { 0x6E2DD000 /* 110.45.208.0/24 */, 24, NDPI_PROTOCOL_STARCRAFT }, + { 0x75340600 /* 117.52.6.0/24 */, 24, NDPI_PROTOCOL_STARCRAFT }, + { 0x75341A00 /* 117.52.26.0/23 */, 23, NDPI_PROTOCOL_STARCRAFT }, + { 0x75341C00 /* 117.52.28.0/23 */, 23, NDPI_PROTOCOL_STARCRAFT }, + { 0x75342100 /* 117.52.33.0/24 */, 24, NDPI_PROTOCOL_STARCRAFT }, + { 0x75342200 /* 117.52.34.0/23 */, 23, NDPI_PROTOCOL_STARCRAFT }, + { 0x75342400 /* 117.52.36.0/23 */, 23, NDPI_PROTOCOL_STARCRAFT }, + { 0x79FE8900 /* 121.254.137.0/24 */, 24, NDPI_PROTOCOL_STARCRAFT }, + { 0x79FECE00 /* 121.254.206.0/23 */, 23, NDPI_PROTOCOL_STARCRAFT }, + { 0x79FEDA00 /* 121.254.218.0/24 */, 24, NDPI_PROTOCOL_STARCRAFT }, + { 0x89DD4000 /* 137.221.64.0/19 */, 19, NDPI_PROTOCOL_STARCRAFT }, + { 0x89DD6000 /* 137.221.96.0/20 */, 20, NDPI_PROTOCOL_STARCRAFT }, + { 0x9E73C000 /* 158.115.192.0/20 */, 20, NDPI_PROTOCOL_STARCRAFT }, + { 0x9E73D800 /* 158.115.216.0/21 */, 21, NDPI_PROTOCOL_STARCRAFT }, + { 0xB6A21F00 /* 182.162.31.0/24 */, 24, NDPI_PROTOCOL_STARCRAFT }, + { 0xB93C7000 /* 185.60.112.0/22 */, 22, NDPI_PROTOCOL_STARCRAFT }, + { 0xC64A2000 /* 198.74.32.0/22 */, 22, NDPI_PROTOCOL_STARCRAFT }, + { 0xC64A2400 /* 198.74.36.0/23 */, 23, NDPI_PROTOCOL_STARCRAFT }, + /* End */ + { 0x0, 0, 0 } +}; diff --git a/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_steam.c b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_steam.c new file mode 100644 index 0000000000..152e10b0a5 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_steam.c @@ -0,0 +1,48 @@ +/* + * + * This file is generated automatically and part of nDPI + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +/* ****************************************************** */ +#include "../ndpi_typedefs.h" +#include "../ndpi_protocol_ids.h" + +static ndpi_network ndpi_protocol_steam_protocol_list[] = { + { 0x670A7C00 /* 103.10.124.0/23 */, 23, NDPI_PROTOCOL_STEAM }, + { 0x671C3600 /* 103.28.54.0/24 */, 24, NDPI_PROTOCOL_STEAM }, + { 0x92429800 /* 146.66.152.0/24 */, 24, NDPI_PROTOCOL_STEAM }, + { 0x92429B00 /* 146.66.155.0/24 */, 24, NDPI_PROTOCOL_STEAM }, + { 0x99FE5600 /* 153.254.86.0/24 */, 24, NDPI_PROTOCOL_STEAM }, + { 0x9B85E200 /* 155.133.226.0/23 */, 23, NDPI_PROTOCOL_STEAM }, + { 0x9B85E600 /* 155.133.230.0/24 */, 24, NDPI_PROTOCOL_STEAM }, + { 0x9B85E800 /* 155.133.232.0/23 */, 23, NDPI_PROTOCOL_STEAM }, + { 0x9B85EA00 /* 155.133.234.0/24 */, 24, NDPI_PROTOCOL_STEAM }, + { 0x9B85EC00 /* 155.133.236.0/22 */, 22, NDPI_PROTOCOL_STEAM }, + { 0x9B85F000 /* 155.133.240.0/23 */, 23, NDPI_PROTOCOL_STEAM }, + { 0x9B85F500 /* 155.133.245.0/24 */, 24, NDPI_PROTOCOL_STEAM }, + { 0x9B85F600 /* 155.133.246.0/23 */, 23, NDPI_PROTOCOL_STEAM }, + { 0x9B85F800 /* 155.133.248.0/21 */, 21, NDPI_PROTOCOL_STEAM }, + { 0xA2FEC000 /* 162.254.192.0/21 */, 21, NDPI_PROTOCOL_STEAM }, + { 0xB919B600 /* 185.25.182.0/23 */, 23, NDPI_PROTOCOL_STEAM }, + { 0xBED92100 /* 190.217.33.0/24 */, 24, NDPI_PROTOCOL_STEAM }, + { 0xC0456000 /* 192.69.96.0/22 */, 22, NDPI_PROTOCOL_STEAM }, + { 0xCDC40600 /* 205.196.6.0/24 */, 24, NDPI_PROTOCOL_STEAM }, + { 0xD040C800 /* 208.64.200.0/22 */, 22, NDPI_PROTOCOL_STEAM }, + { 0xD04EA400 /* 208.78.164.0/22 */, 22, NDPI_PROTOCOL_STEAM }, + /* End */ + { 0x0, 0, 0 } +}; diff --git a/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_teamviewer.c b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_teamviewer.c new file mode 100644 index 0000000000..04385902bc --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_teamviewer.c @@ -0,0 +1,34 @@ +/* + * + * This file is generated automatically and part of nDPI + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +/* ****************************************************** */ +#include "../ndpi_typedefs.h" +#include "../ndpi_protocol_ids.h" + +static ndpi_network ndpi_protocol_teamviewer_protocol_list[] = { + { 0x2D936C00 /* 45.147.108.0/22 */, 22, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xB9BC2000 /* 185.188.32.0/23 */, 23, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xB9BC2200 /* 185.188.34.0/24 */, 24, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xB9F51C00 /* 185.245.28.0/22 */, 22, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xC120E100 /* 193.32.225.0/24 */, 24, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xC120E200 /* 193.32.226.0/23 */, 23, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xC13A6400 /* 193.58.100.0/23 */, 23, NDPI_PROTOCOL_TEAMVIEWER }, + /* End */ + { 0x0, 0, 0 } +}; diff --git a/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_telegram.c b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_telegram.c new file mode 100644 index 0000000000..be3b4e6a50 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_telegram.c @@ -0,0 +1,35 @@ +/* + * + * This file is generated automatically and part of nDPI + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +/* ****************************************************** */ +#include "../ndpi_typedefs.h" +#include "../ndpi_protocol_ids.h" + +static ndpi_network ndpi_protocol_telegram_protocol_list[] = { + { 0x5B69C000 /* 91.105.192.0/23 */, 23, NDPI_PROTOCOL_TELEGRAM }, + { 0x5B6C0400 /* 91.108.4.0/22 */, 22, NDPI_PROTOCOL_TELEGRAM }, + { 0x5B6C0800 /* 91.108.8.0/21 */, 21, NDPI_PROTOCOL_TELEGRAM }, + { 0x5B6C1000 /* 91.108.16.0/21 */, 21, NDPI_PROTOCOL_TELEGRAM }, + { 0x5B6C3800 /* 91.108.56.0/22 */, 22, NDPI_PROTOCOL_TELEGRAM }, + { 0x5FA14000 /* 95.161.64.0/20 */, 20, NDPI_PROTOCOL_TELEGRAM }, + { 0x959AA000 /* 149.154.160.0/20 */, 20, NDPI_PROTOCOL_TELEGRAM }, + { 0xB94C9700 /* 185.76.151.0/24 */, 24, NDPI_PROTOCOL_TELEGRAM }, + /* End */ + { 0x0, 0, 0 } +}; diff --git a/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_tencent.c b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_tencent.c new file mode 100644 index 0000000000..c7048dfbb8 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_tencent.c @@ -0,0 +1,210 @@ +/* + * + * This file is generated automatically and part of nDPI + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +/* ****************************************************** */ +#include "../ndpi_typedefs.h" +#include "../ndpi_protocol_ids.h" + +static ndpi_network ndpi_protocol_tencent_protocol_list[] = { + { 0x010C0000 /* 1.12.0.0/14 */, 14, NDPI_PROTOCOL_TENCENT }, + { 0x01740000 /* 1.116.0.0/15 */, 15, NDPI_PROTOCOL_TENCENT }, + { 0x01C9B800 /* 1.201.184.0/22 */, 22, NDPI_PROTOCOL_TENCENT }, + { 0x01C9BC00 /* 1.201.188.0/23 */, 23, NDPI_PROTOCOL_TENCENT }, + { 0x2ABB8000 /* 42.187.128.0/17 */, 17, NDPI_PROTOCOL_TENCENT }, + { 0x2AC00000 /* 42.192.0.0/15 */, 15, NDPI_PROTOCOL_TENCENT }, + { 0x2AC28000 /* 42.194.128.0/17 */, 17, NDPI_PROTOCOL_TENCENT }, + { 0x2B800000 /* 43.128.0.0/15 */, 15, NDPI_PROTOCOL_TENCENT }, + { 0x2B820000 /* 43.130.0.0/16 */, 16, NDPI_PROTOCOL_TENCENT }, + { 0x2B830000 /* 43.131.0.0/17 */, 17, NDPI_PROTOCOL_TENCENT }, + { 0x2B838000 /* 43.131.128.0/19 */, 19, NDPI_PROTOCOL_TENCENT }, + { 0x2B83C000 /* 43.131.192.0/18 */, 18, NDPI_PROTOCOL_TENCENT }, + { 0x2B840000 /* 43.132.0.0/18 */, 18, NDPI_PROTOCOL_TENCENT }, + { 0x2B844400 /* 43.132.68.0/24 */, 24, NDPI_PROTOCOL_TENCENT }, + { 0x2B844600 /* 43.132.70.0/23 */, 23, NDPI_PROTOCOL_TENCENT }, + { 0x2B845400 /* 43.132.84.0/23 */, 23, NDPI_PROTOCOL_TENCENT }, + { 0x2B845E00 /* 43.132.94.0/23 */, 23, NDPI_PROTOCOL_TENCENT }, + { 0x2B846000 /* 43.132.96.0/19 */, 19, NDPI_PROTOCOL_TENCENT }, + { 0x2B848000 /* 43.132.128.0/17 */, 17, NDPI_PROTOCOL_TENCENT }, + { 0x2B850000 /* 43.133.0.0/16 */, 16, NDPI_PROTOCOL_TENCENT }, + { 0x2B860000 /* 43.134.0.0/16 */, 16, NDPI_PROTOCOL_TENCENT }, + { 0x2B870000 /* 43.135.0.0/17 */, 17, NDPI_PROTOCOL_TENCENT }, + { 0x2B878000 /* 43.135.128.0/18 */, 18, NDPI_PROTOCOL_TENCENT }, + { 0x2B87C000 /* 43.135.192.0/19 */, 19, NDPI_PROTOCOL_TENCENT }, + { 0x2B880000 /* 43.136.0.0/13 */, 13, NDPI_PROTOCOL_TENCENT }, + { 0x2B900000 /* 43.144.0.0/15 */, 15, NDPI_PROTOCOL_TENCENT }, + { 0x2B984000 /* 43.152.64.0/19 */, 19, NDPI_PROTOCOL_TENCENT }, + { 0x2B986000 /* 43.152.96.0/20 */, 20, NDPI_PROTOCOL_TENCENT }, + { 0x2B987000 /* 43.152.112.0/22 */, 22, NDPI_PROTOCOL_TENCENT }, + { 0x2B98C000 /* 43.152.192.0/18 */, 18, NDPI_PROTOCOL_TENCENT }, + { 0x2B990000 /* 43.153.0.0/16 */, 16, NDPI_PROTOCOL_TENCENT }, + { 0x2B9A0000 /* 43.154.0.0/15 */, 15, NDPI_PROTOCOL_TENCENT }, + { 0x2B9C0000 /* 43.156.0.0/15 */, 15, NDPI_PROTOCOL_TENCENT }, + { 0x2B9E0000 /* 43.158.0.0/16 */, 16, NDPI_PROTOCOL_TENCENT }, + { 0x2B9F0000 /* 43.159.0.0/18 */, 18, NDPI_PROTOCOL_TENCENT }, + { 0x2B9F8000 /* 43.159.128.0/17 */, 17, NDPI_PROTOCOL_TENCENT }, + { 0x2BA00000 /* 43.160.0.0/15 */, 15, NDPI_PROTOCOL_TENCENT }, + { 0x2BA20000 /* 43.162.0.0/16 */, 16, NDPI_PROTOCOL_TENCENT }, + { 0x2BA3C000 /* 43.163.192.0/18 */, 18, NDPI_PROTOCOL_TENCENT }, + { 0x2BAC0F00 /* 43.172.15.0/24 */, 24, NDPI_PROTOCOL_TENCENT }, + { 0x2BAF1000 /* 43.175.16.0/22 */, 22, NDPI_PROTOCOL_TENCENT }, + { 0x2BF2FC00 /* 43.242.252.0/22 */, 22, NDPI_PROTOCOL_TENCENT }, + { 0x2BF7C400 /* 43.247.196.0/22 */, 22, NDPI_PROTOCOL_TENCENT }, + { 0x2D28C000 /* 45.40.192.0/18 */, 18, NDPI_PROTOCOL_TENCENT }, + { 0x2D714400 /* 45.113.68.0/22 */, 22, NDPI_PROTOCOL_TENCENT }, + { 0x2D927000 /* 45.146.112.0/23 */, 23, NDPI_PROTOCOL_TENCENT }, + { 0x31330000 /* 49.51.0.0/19 */, 19, NDPI_PROTOCOL_TENCENT }, + { 0x31332000 /* 49.51.32.0/20 */, 20, NDPI_PROTOCOL_TENCENT }, + { 0x31333000 /* 49.51.48.0/21 */, 21, NDPI_PROTOCOL_TENCENT }, + { 0x31333E00 /* 49.51.62.0/23 */, 23, NDPI_PROTOCOL_TENCENT }, + { 0x31334000 /* 49.51.64.0/19 */, 19, NDPI_PROTOCOL_TENCENT }, + { 0x31336000 /* 49.51.96.0/21 */, 21, NDPI_PROTOCOL_TENCENT }, + { 0x31336800 /* 49.51.104.0/22 */, 22, NDPI_PROTOCOL_TENCENT }, + { 0x31336C00 /* 49.51.108.0/23 */, 23, NDPI_PROTOCOL_TENCENT }, + { 0x31338000 /* 49.51.128.0/18 */, 18, NDPI_PROTOCOL_TENCENT }, + { 0x3133C000 /* 49.51.192.0/19 */, 19, NDPI_PROTOCOL_TENCENT }, + { 0x3133E000 /* 49.51.224.0/23 */, 23, NDPI_PROTOCOL_TENCENT }, + { 0x3133E400 /* 49.51.228.0/22 */, 22, NDPI_PROTOCOL_TENCENT }, + { 0x3133E800 /* 49.51.232.0/21 */, 21, NDPI_PROTOCOL_TENCENT }, + { 0x3133F000 /* 49.51.240.0/20 */, 20, NDPI_PROTOCOL_TENCENT }, + { 0x31E80000 /* 49.232.0.0/14 */, 14, NDPI_PROTOCOL_TENCENT }, + { 0x3A574000 /* 58.87.64.0/18 */, 18, NDPI_PROTOCOL_TENCENT }, + { 0x3EEA0000 /* 62.234.0.0/16 */, 16, NDPI_PROTOCOL_TENCENT }, + { 0x51440000 /* 81.68.0.0/14 */, 14, NDPI_PROTOCOL_TENCENT }, + { 0x529C0000 /* 82.156.0.0/15 */, 15, NDPI_PROTOCOL_TENCENT }, + { 0x5EBF0000 /* 94.191.0.0/17 */, 17, NDPI_PROTOCOL_TENCENT }, + { 0x65200000 /* 101.32.0.0/16 */, 16, NDPI_PROTOCOL_TENCENT }, + { 0x65210000 /* 101.33.0.0/23 */, 23, NDPI_PROTOCOL_TENCENT }, + { 0x65210400 /* 101.33.4.0/23 */, 23, NDPI_PROTOCOL_TENCENT }, + { 0x65210A00 /* 101.33.10.0/23 */, 23, NDPI_PROTOCOL_TENCENT }, + { 0x65210E00 /* 101.33.14.0/23 */, 23, NDPI_PROTOCOL_TENCENT }, + { 0x65211100 /* 101.33.17.0/24 */, 24, NDPI_PROTOCOL_TENCENT }, + { 0x65211200 /* 101.33.18.0/23 */, 23, NDPI_PROTOCOL_TENCENT }, + { 0x65211400 /* 101.33.20.0/23 */, 23, NDPI_PROTOCOL_TENCENT }, + { 0x65211A00 /* 101.33.26.0/23 */, 23, NDPI_PROTOCOL_TENCENT }, + { 0x65211E00 /* 101.33.30.0/23 */, 23, NDPI_PROTOCOL_TENCENT }, + { 0x65212000 /* 101.33.32.0/19 */, 19, NDPI_PROTOCOL_TENCENT }, + { 0x65214000 /* 101.33.64.0/18 */, 18, NDPI_PROTOCOL_TENCENT }, + { 0x65218000 /* 101.33.128.0/17 */, 17, NDPI_PROTOCOL_TENCENT }, + { 0x65220000 /* 101.34.0.0/15 */, 15, NDPI_PROTOCOL_TENCENT }, + { 0x652A0000 /* 101.42.0.0/15 */, 15, NDPI_PROTOCOL_TENCENT }, + { 0x67071C00 /* 103.7.28.0/22 */, 22, NDPI_PROTOCOL_TENCENT }, + { 0x67267400 /* 103.38.116.0/22 */, 22, NDPI_PROTOCOL_TENCENT }, + { 0x6734D800 /* 103.52.216.0/22 */, 22, NDPI_PROTOCOL_TENCENT }, + { 0x67743200 /* 103.116.50.0/23 */, 23, NDPI_PROTOCOL_TENCENT }, + { 0x67EE1000 /* 103.238.16.0/22 */, 22, NDPI_PROTOCOL_TENCENT }, + { 0x6A340000 /* 106.52.0.0/14 */, 14, NDPI_PROTOCOL_TENCENT }, + { 0x6DF40000 /* 109.244.0.0/16 */, 16, NDPI_PROTOCOL_TENCENT }, + { 0x6E288000 /* 110.40.128.0/17 */, 17, NDPI_PROTOCOL_TENCENT }, + { 0x6E2A8000 /* 110.42.128.0/17 */, 17, NDPI_PROTOCOL_TENCENT }, + { 0x6FE50000 /* 111.229.0.0/16 */, 16, NDPI_PROTOCOL_TENCENT }, + { 0x6FE60000 /* 111.230.0.0/15 */, 15, NDPI_PROTOCOL_TENCENT }, + { 0x72750000 /* 114.117.0.0/16 */, 16, NDPI_PROTOCOL_TENCENT }, + { 0x72840000 /* 114.132.0.0/16 */, 16, NDPI_PROTOCOL_TENCENT }, + { 0x739F0000 /* 115.159.0.0/16 */, 16, NDPI_PROTOCOL_TENCENT }, + { 0x76180000 /* 118.24.0.0/15 */, 15, NDPI_PROTOCOL_TENCENT }, + { 0x76590000 /* 118.89.0.0/16 */, 16, NDPI_PROTOCOL_TENCENT }, + { 0x767E4000 /* 118.126.64.0/18 */, 18, NDPI_PROTOCOL_TENCENT }, + { 0x76C38000 /* 118.195.128.0/17 */, 17, NDPI_PROTOCOL_TENCENT }, + { 0x771BA000 /* 119.27.160.0/19 */, 19, NDPI_PROTOCOL_TENCENT }, + { 0x771C0000 /* 119.28.0.0/15 */, 15, NDPI_PROTOCOL_TENCENT }, + { 0x772D0000 /* 119.45.0.0/16 */, 16, NDPI_PROTOCOL_TENCENT }, + { 0x775B0000 /* 119.91.0.0/16 */, 16, NDPI_PROTOCOL_TENCENT }, + { 0x78350000 /* 120.53.0.0/16 */, 16, NDPI_PROTOCOL_TENCENT }, + { 0x78583800 /* 120.88.56.0/23 */, 23, NDPI_PROTOCOL_TENCENT }, + { 0x78E81400 /* 120.232.20.0/22 */, 22, NDPI_PROTOCOL_TENCENT }, + { 0x78F17F00 /* 120.241.127.0/24 */, 24, NDPI_PROTOCOL_TENCENT }, + { 0x78F18000 /* 120.241.128.0/21 */, 21, NDPI_PROTOCOL_TENCENT }, + { 0x78F18800 /* 120.241.136.0/24 */, 24, NDPI_PROTOCOL_TENCENT }, + { 0x79040000 /* 121.4.0.0/15 */, 15, NDPI_PROTOCOL_TENCENT }, + { 0x79330000 /* 121.51.0.0/16 */, 16, NDPI_PROTOCOL_TENCENT }, + { 0x7A330000 /* 122.51.0.0/16 */, 16, NDPI_PROTOCOL_TENCENT }, + { 0x7A98C000 /* 122.152.192.0/18 */, 18, NDPI_PROTOCOL_TENCENT }, + { 0x7BCE0000 /* 123.206.0.0/15 */, 15, NDPI_PROTOCOL_TENCENT }, + { 0x7C9C0000 /* 124.156.0.0/16 */, 16, NDPI_PROTOCOL_TENCENT }, + { 0x7CDC0000 /* 124.220.0.0/14 */, 14, NDPI_PROTOCOL_TENCENT }, + { 0x806C0000 /* 128.108.0.0/16 */, 16, NDPI_PROTOCOL_TENCENT }, + { 0x811C0000 /* 129.28.0.0/16 */, 16, NDPI_PROTOCOL_TENCENT }, + { 0x81CC0000 /* 129.204.0.0/16 */, 16, NDPI_PROTOCOL_TENCENT }, + { 0x81D30000 /* 129.211.0.0/16 */, 16, NDPI_PROTOCOL_TENCENT }, + { 0x81E20000 /* 129.226.0.0/16 */, 16, NDPI_PROTOCOL_TENCENT }, + { 0x84E80000 /* 132.232.0.0/16 */, 16, NDPI_PROTOCOL_TENCENT }, + { 0x86AF0000 /* 134.175.0.0/16 */, 16, NDPI_PROTOCOL_TENCENT }, + { 0x8B9B0000 /* 139.155.0.0/16 */, 16, NDPI_PROTOCOL_TENCENT }, + { 0x8BBA0000 /* 139.186.0.0/16 */, 16, NDPI_PROTOCOL_TENCENT }, + { 0x8BC70000 /* 139.199.0.0/16 */, 16, NDPI_PROTOCOL_TENCENT }, + { 0x8C8F0000 /* 140.143.0.0/16 */, 16, NDPI_PROTOCOL_TENCENT }, + { 0x9238C000 /* 146.56.192.0/18 */, 18, NDPI_PROTOCOL_TENCENT }, + { 0x94460000 /* 148.70.0.0/16 */, 16, NDPI_PROTOCOL_TENCENT }, + { 0x966D0000 /* 150.109.0.0/16 */, 16, NDPI_PROTOCOL_TENCENT }, + { 0x969E0000 /* 150.158.0.0/16 */, 16, NDPI_PROTOCOL_TENCENT }, + { 0x98880000 /* 152.136.0.0/16 */, 16, NDPI_PROTOCOL_TENCENT }, + { 0x9A088000 /* 154.8.128.0/17 */, 17, NDPI_PROTOCOL_TENCENT }, + { 0x9CF05800 /* 156.240.88.0/22 */, 22, NDPI_PROTOCOL_TENCENT }, + { 0x9E4F0100 /* 158.79.1.0/24 */, 24, NDPI_PROTOCOL_TENCENT }, + { 0x9F4B0000 /* 159.75.0.0/16 */, 16, NDPI_PROTOCOL_TENCENT }, + { 0xA20E0000 /* 162.14.0.0/16 */, 16, NDPI_PROTOCOL_TENCENT }, + { 0xA23E0000 /* 162.62.0.0/17 */, 17, NDPI_PROTOCOL_TENCENT }, + { 0xA23E8000 /* 162.62.128.0/18 */, 18, NDPI_PROTOCOL_TENCENT }, + { 0xA23EC000 /* 162.62.192.0/19 */, 19, NDPI_PROTOCOL_TENCENT }, + { 0xA23EE000 /* 162.62.224.0/20 */, 20, NDPI_PROTOCOL_TENCENT }, + { 0xAA6A0000 /* 170.106.0.0/16 */, 16, NDPI_PROTOCOL_TENCENT }, + { 0xAC51C000 /* 172.81.192.0/18 */, 18, NDPI_PROTOCOL_TENCENT }, + { 0xAF180000 /* 175.24.0.0/16 */, 16, NDPI_PROTOCOL_TENCENT }, + { 0xAF1B0000 /* 175.27.0.0/16 */, 16, NDPI_PROTOCOL_TENCENT }, + { 0xAFB20000 /* 175.178.0.0/16 */, 16, NDPI_PROTOCOL_TENCENT }, + { 0xB6FE0000 /* 182.254.0.0/16 */, 16, NDPI_PROTOCOL_TENCENT }, + { 0xBC838000 /* 188.131.128.0/17 */, 17, NDPI_PROTOCOL_TENCENT }, + { 0xC0908000 /* 192.144.128.0/17 */, 17, NDPI_PROTOCOL_TENCENT }, + { 0xC1700000 /* 193.112.0.0/16 */, 16, NDPI_PROTOCOL_TENCENT }, + { 0xCBC38000 /* 203.195.128.0/17 */, 17, NDPI_PROTOCOL_TENCENT }, + { 0xCBCD8000 /* 203.205.128.0/23 */, 23, NDPI_PROTOCOL_TENCENT }, + { 0xCBCD8600 /* 203.205.134.0/23 */, 23, NDPI_PROTOCOL_TENCENT }, + { 0xCBCD8800 /* 203.205.136.0/21 */, 21, NDPI_PROTOCOL_TENCENT }, + { 0xCBCD9000 /* 203.205.144.0/22 */, 22, NDPI_PROTOCOL_TENCENT }, + { 0xCBCD9B00 /* 203.205.155.0/24 */, 24, NDPI_PROTOCOL_TENCENT }, + { 0xCBCD9C00 /* 203.205.156.0/22 */, 22, NDPI_PROTOCOL_TENCENT }, + { 0xCBCDBC00 /* 203.205.188.0/24 */, 24, NDPI_PROTOCOL_TENCENT }, + { 0xCBCDBF00 /* 203.205.191.0/24 */, 24, NDPI_PROTOCOL_TENCENT }, + { 0xCBCDC100 /* 203.205.193.0/24 */, 24, NDPI_PROTOCOL_TENCENT }, + { 0xCBCDC200 /* 203.205.194.0/23 */, 23, NDPI_PROTOCOL_TENCENT }, + { 0xCBCDC400 /* 203.205.196.0/23 */, 23, NDPI_PROTOCOL_TENCENT }, + { 0xCBCDDA00 /* 203.205.218.0/23 */, 23, NDPI_PROTOCOL_TENCENT }, + { 0xCBCDDC00 /* 203.205.220.0/22 */, 22, NDPI_PROTOCOL_TENCENT }, + { 0xCBCDE000 /* 203.205.224.0/24 */, 24, NDPI_PROTOCOL_TENCENT }, + { 0xCBCDE800 /* 203.205.232.0/21 */, 21, NDPI_PROTOCOL_TENCENT }, + { 0xCBCDF000 /* 203.205.240.0/24 */, 24, NDPI_PROTOCOL_TENCENT }, + { 0xCBCDF200 /* 203.205.242.0/24 */, 24, NDPI_PROTOCOL_TENCENT }, + { 0xCBCDF800 /* 203.205.248.0/21 */, 21, NDPI_PROTOCOL_TENCENT }, + { 0xD249A000 /* 210.73.160.0/19 */, 19, NDPI_PROTOCOL_TENCENT }, + { 0xD2ABE800 /* 210.171.232.0/21 */, 21, NDPI_PROTOCOL_TENCENT }, + { 0xD2B44A00 /* 210.180.74.0/23 */, 23, NDPI_PROTOCOL_TENCENT }, + { 0xD3385C00 /* 211.56.92.0/22 */, 22, NDPI_PROTOCOL_TENCENT }, + { 0xD3988000 /* 211.152.128.0/22 */, 22, NDPI_PROTOCOL_TENCENT }, + { 0xD3988400 /* 211.152.132.0/23 */, 23, NDPI_PROTOCOL_TENCENT }, + { 0xD3988A00 /* 211.152.138.0/23 */, 23, NDPI_PROTOCOL_TENCENT }, + { 0xD3989000 /* 211.152.144.0/22 */, 22, NDPI_PROTOCOL_TENCENT }, + { 0xD3989400 /* 211.152.148.0/23 */, 23, NDPI_PROTOCOL_TENCENT }, + { 0xD3989800 /* 211.152.152.0/22 */, 22, NDPI_PROTOCOL_TENCENT }, + { 0xD3989E00 /* 211.152.158.0/23 */, 23, NDPI_PROTOCOL_TENCENT }, + { 0xD39F8000 /* 211.159.128.0/17 */, 17, NDPI_PROTOCOL_TENCENT }, + { 0xD4400000 /* 212.64.0.0/17 */, 17, NDPI_PROTOCOL_TENCENT }, + { 0xD4818000 /* 212.129.128.0/17 */, 17, NDPI_PROTOCOL_TENCENT }, + /* End */ + { 0x0, 0, 0 } +}; diff --git a/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_threema.c b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_threema.c new file mode 100644 index 0000000000..69a183cc46 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_threema.c @@ -0,0 +1,36 @@ +/* + * + * This file is generated automatically and part of nDPI + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +/* ****************************************************** */ +#include "../ndpi_typedefs.h" +#include "../ndpi_protocol_ids.h" + +static ndpi_network ndpi_protocol_threema_protocol_list[] = { + { 0x0594A000 /* 5.148.160.0/19 */, 19, NDPI_PROTOCOL_THREEMA }, + { 0x2D09A000 /* 45.9.160.0/23 */, 23, NDPI_PROTOCOL_THREEMA }, + { 0x2D09A200 /* 45.9.162.0/24 */, 24, NDPI_PROTOCOL_THREEMA }, + { 0x5C2AB800 /* 92.42.184.0/21 */, 21, NDPI_PROTOCOL_THREEMA }, + { 0x5EE6D000 /* 94.230.208.0/20 */, 20, NDPI_PROTOCOL_THREEMA }, + { 0xB2D12000 /* 178.209.32.0/19 */, 19, NDPI_PROTOCOL_THREEMA }, + { 0xB958EC00 /* 185.88.236.0/22 */, 22, NDPI_PROTOCOL_THREEMA }, + { 0xC1115500 /* 193.17.85.0/24 */, 24, NDPI_PROTOCOL_THREEMA }, + { 0xD996F000 /* 217.150.240.0/20 */, 20, NDPI_PROTOCOL_THREEMA }, + /* End */ + { 0x0, 0, 0 } +}; diff --git a/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_twitch.c b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_twitch.c new file mode 100644 index 0000000000..e39b28fa82 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_twitch.c @@ -0,0 +1,38 @@ +/* + * + * This file is generated automatically and part of nDPI + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +/* ****************************************************** */ +#include "../ndpi_typedefs.h" +#include "../ndpi_protocol_ids.h" + +static ndpi_network ndpi_protocol_twitch_protocol_list[] = { + { 0x17A00000 /* 23.160.0.0/24 */, 24, NDPI_PROTOCOL_TWITCH }, + { 0x2D718000 /* 45.113.128.0/22 */, 22, NDPI_PROTOCOL_TWITCH }, + { 0x34818000 /* 52.129.128.0/19 */, 19, NDPI_PROTOCOL_TWITCH }, + { 0x3481A000 /* 52.129.160.0/20 */, 20, NDPI_PROTOCOL_TWITCH }, + { 0x34DFC000 /* 52.223.192.0/18 */, 18, NDPI_PROTOCOL_TWITCH }, + { 0x63B54000 /* 99.181.64.0/18 */, 18, NDPI_PROTOCOL_TWITCH }, + { 0x67353000 /* 103.53.48.0/22 */, 22, NDPI_PROTOCOL_TWITCH }, + { 0xB92ACC00 /* 185.42.204.0/22 */, 22, NDPI_PROTOCOL_TWITCH }, + { 0xC0104000 /* 192.16.64.0/21 */, 21, NDPI_PROTOCOL_TWITCH }, + { 0xC06CEF00 /* 192.108.239.0/24 */, 24, NDPI_PROTOCOL_TWITCH }, + { 0xC709F800 /* 199.9.248.0/21 */, 21, NDPI_PROTOCOL_TWITCH }, + /* End */ + { 0x0, 0, 0 } +}; diff --git a/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_twitter.c b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_twitter.c new file mode 100644 index 0000000000..56c7dea539 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_twitter.c @@ -0,0 +1,60 @@ +/* + * + * This file is generated automatically and part of nDPI + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +/* ****************************************************** */ +#include "../ndpi_typedefs.h" +#include "../ndpi_protocol_ids.h" + +static ndpi_network ndpi_protocol_twitter_protocol_list[] = { + { 0x0819C200 /* 8.25.194.0/23 */, 23, NDPI_PROTOCOL_TWITTER }, + { 0x0819C400 /* 8.25.196.0/23 */, 23, NDPI_PROTOCOL_TWITTER }, + { 0x403F0000 /* 64.63.0.0/18 */, 18, NDPI_PROTOCOL_TWITTER }, + { 0x450C3800 /* 69.12.56.0/21 */, 21, NDPI_PROTOCOL_TWITTER }, + { 0x45C3A000 /* 69.195.160.0/24 */, 24, NDPI_PROTOCOL_TWITTER }, + { 0x45C3A200 /* 69.195.162.0/23 */, 23, NDPI_PROTOCOL_TWITTER }, + { 0x45C3A400 /* 69.195.164.0/23 */, 23, NDPI_PROTOCOL_TWITTER }, + { 0x45C3A600 /* 69.195.166.0/24 */, 24, NDPI_PROTOCOL_TWITTER }, + { 0x45C3A800 /* 69.195.168.0/23 */, 23, NDPI_PROTOCOL_TWITTER }, + { 0x45C3AB00 /* 69.195.171.0/24 */, 24, NDPI_PROTOCOL_TWITTER }, + { 0x45C3AC00 /* 69.195.172.0/24 */, 24, NDPI_PROTOCOL_TWITTER }, + { 0x45C3AE00 /* 69.195.174.0/23 */, 23, NDPI_PROTOCOL_TWITTER }, + { 0x45C3B000 /* 69.195.176.0/21 */, 21, NDPI_PROTOCOL_TWITTER }, + { 0x45C3B800 /* 69.195.184.0/22 */, 22, NDPI_PROTOCOL_TWITTER }, + { 0x67FC7000 /* 103.252.112.0/22 */, 22, NDPI_PROTOCOL_TWITTER }, + { 0x68F42800 /* 104.244.40.0/23 */, 23, NDPI_PROTOCOL_TWITTER }, + { 0x68F42A00 /* 104.244.42.0/24 */, 24, NDPI_PROTOCOL_TWITTER }, + { 0x68F42C00 /* 104.244.44.0/22 */, 22, NDPI_PROTOCOL_TWITTER }, + { 0xB92D0400 /* 185.45.4.0/22 */, 22, NDPI_PROTOCOL_TWITTER }, + { 0xBC40E000 /* 188.64.224.0/21 */, 21, NDPI_PROTOCOL_TWITTER }, + { 0xC02C4500 /* 192.44.69.0/24 */, 24, NDPI_PROTOCOL_TWITTER }, + { 0xC030EC00 /* 192.48.236.0/23 */, 23, NDPI_PROTOCOL_TWITTER }, + { 0xC0854C00 /* 192.133.76.0/22 */, 22, NDPI_PROTOCOL_TWITTER }, + { 0xC7109C00 /* 199.16.156.0/22 */, 22, NDPI_PROTOCOL_TWITTER }, + { 0xC73B9400 /* 199.59.148.0/22 */, 22, NDPI_PROTOCOL_TWITTER }, + { 0xC7603800 /* 199.96.56.0/21 */, 21, NDPI_PROTOCOL_TWITTER }, + { 0xCAA08000 /* 202.160.128.0/22 */, 22, NDPI_PROTOCOL_TWITTER }, + { 0xD1EDC000 /* 209.237.192.0/21 */, 21, NDPI_PROTOCOL_TWITTER }, + { 0xD1EDC800 /* 209.237.200.0/22 */, 22, NDPI_PROTOCOL_TWITTER }, + { 0xD1EDCC00 /* 209.237.204.0/24 */, 24, NDPI_PROTOCOL_TWITTER }, + { 0xD1EDDB00 /* 209.237.219.0/24 */, 24, NDPI_PROTOCOL_TWITTER }, + { 0xD1EDDC00 /* 209.237.220.0/23 */, 23, NDPI_PROTOCOL_TWITTER }, + { 0xD1EDDE00 /* 209.237.222.0/24 */, 24, NDPI_PROTOCOL_TWITTER }, + /* End */ + { 0x0, 0, 0 } +}; diff --git a/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_ubuntuone.c b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_ubuntuone.c new file mode 100644 index 0000000000..e6abe7ae0d --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_ubuntuone.c @@ -0,0 +1,34 @@ +/* + * + * This file is generated automatically and part of nDPI + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +/* ****************************************************** */ +#include "../ndpi_typedefs.h" +#include "../ndpi_protocol_ids.h" + +static ndpi_network ndpi_protocol_ubuntuone_protocol_list[] = { + { 0x5BBD5800 /* 91.189.88.0/24 */, 24, NDPI_PROTOCOL_UBUNTUONE }, + { 0x5BBD5A00 /* 91.189.90.0/23 */, 23, NDPI_PROTOCOL_UBUNTUONE }, + { 0x5BBD5C00 /* 91.189.92.0/23 */, 23, NDPI_PROTOCOL_UBUNTUONE }, + { 0x5BBD5E00 /* 91.189.94.0/24 */, 24, NDPI_PROTOCOL_UBUNTUONE }, + { 0xA2D52000 /* 162.213.32.0/22 */, 22, NDPI_PROTOCOL_UBUNTUONE }, + { 0xB97DBC00 /* 185.125.188.0/22 */, 22, NDPI_PROTOCOL_UBUNTUONE }, + { 0xC2A9FE00 /* 194.169.254.0/24 */, 24, NDPI_PROTOCOL_UBUNTUONE }, + /* End */ + { 0x0, 0, 0 } +}; diff --git a/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_webex.c b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_webex.c new file mode 100644 index 0000000000..45628ed7c0 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_asn_webex.c @@ -0,0 +1,54 @@ +/* + * + * This file is generated automatically and part of nDPI + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +/* ****************************************************** */ +#include "../ndpi_typedefs.h" +#include "../ndpi_protocol_ids.h" + +static ndpi_network ndpi_protocol_webex_protocol_list[] = { + { 0x0826D800 /* 8.38.216.0/24 */, 24, NDPI_PROTOCOL_WEBEX }, + { 0x17590000 /* 23.89.0.0/17 */, 17, NDPI_PROTOCOL_WEBEX }, + { 0x17598000 /* 23.89.128.0/19 */, 19, NDPI_PROTOCOL_WEBEX }, + { 0x1759A000 /* 23.89.160.0/20 */, 20, NDPI_PROTOCOL_WEBEX }, + { 0x1759B000 /* 23.89.176.0/21 */, 21, NDPI_PROTOCOL_WEBEX }, + { 0x1759C000 /* 23.89.192.0/19 */, 19, NDPI_PROTOCOL_WEBEX }, + { 0x3E6DC000 /* 62.109.192.0/18 */, 18, NDPI_PROTOCOL_WEBEX }, + { 0x40446000 /* 64.68.96.0/19 */, 19, NDPI_PROTOCOL_WEBEX }, + { 0x4272A000 /* 66.114.160.0/20 */, 20, NDPI_PROTOCOL_WEBEX }, + { 0x42A32000 /* 66.163.32.0/19 */, 19, NDPI_PROTOCOL_WEBEX }, + { 0x451AA000 /* 69.26.160.0/19 */, 19, NDPI_PROTOCOL_WEBEX }, + { 0x721DC000 /* 114.29.192.0/19 */, 19, NDPI_PROTOCOL_WEBEX }, + { 0x8BB15800 /* 139.177.88.0/22 */, 22, NDPI_PROTOCOL_WEBEX }, + { 0x8BB15C00 /* 139.177.92.0/23 */, 23, NDPI_PROTOCOL_WEBEX }, + { 0x96FD8000 /* 150.253.128.0/17 */, 17, NDPI_PROTOCOL_WEBEX }, + { 0xAA480000 /* 170.72.0.0/17 */, 17, NDPI_PROTOCOL_WEBEX }, + { 0xAA488000 /* 170.72.128.0/18 */, 18, NDPI_PROTOCOL_WEBEX }, + { 0xAA48C000 /* 170.72.192.0/19 */, 19, NDPI_PROTOCOL_WEBEX }, + { 0xAA858000 /* 170.133.128.0/18 */, 18, NDPI_PROTOCOL_WEBEX }, + { 0xAD27E000 /* 173.39.224.0/19 */, 19, NDPI_PROTOCOL_WEBEX }, + { 0xADF30000 /* 173.243.0.0/20 */, 20, NDPI_PROTOCOL_WEBEX }, + { 0xCFB6A000 /* 207.182.160.0/19 */, 19, NDPI_PROTOCOL_WEBEX }, + { 0xD0FDFE00 /* 208.253.254.0/24 */, 24, NDPI_PROTOCOL_WEBEX }, + { 0xD0FE7200 /* 208.254.114.0/24 */, 24, NDPI_PROTOCOL_WEBEX }, + { 0xD1C5C000 /* 209.197.192.0/19 */, 19, NDPI_PROTOCOL_WEBEX }, + { 0xD204C000 /* 210.4.192.0/20 */, 20, NDPI_PROTOCOL_WEBEX }, + { 0xD8978000 /* 216.151.128.0/19 */, 19, NDPI_PROTOCOL_WEBEX }, + /* End */ + { 0x0, 0, 0 } +}; diff --git a/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_azure_match.c b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_azure_match.c new file mode 100644 index 0000000000..6477259531 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_azure_match.c @@ -0,0 +1,48005 @@ +/* + * + * This file is generated automatically and part of nDPI + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +/* ****************************************************** */ +#include "../ndpi_typedefs.h" +#include "../ndpi_protocol_ids.h" + +static ndpi_network ndpi_protocol_microsoft_azure_protocol_list[] = { + { 0x04E86A58 /* 4.232.106.88/30 */, 30, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x0D411913 /* 13.65.25.19/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x0D423C77 /* 13.66.60.119/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x0D428FDC /* 13.66.143.220/30 */, 30, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x0D42CA0E /* 13.66.202.14/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x0D42F8E1 /* 13.66.248.225/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x0D42F9D3 /* 13.66.249.211/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x0D430A7C /* 13.67.10.124/30 */, 30, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x0D456D84 /* 13.69.109.132/30 */, 30, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x0D470135 /* 13.71.1.53/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x0D47249B /* 13.71.36.155/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x0D47C770 /* 13.71.199.112/30 */, 30, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x0D491226 /* 13.73.18.38/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x0D491880 /* 13.73.24.128/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x0D4919E5 /* 13.73.25.229/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x0D491C7D /* 13.73.28.125/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x0D496DC4 /* 13.73.109.196/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x0D496E94 /* 13.73.110.148/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x0D4970BF /* 13.73.112.191/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x0D4974E0 /* 13.73.116.224/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x0D4D35D8 /* 13.77.53.216/30 */, 30, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x0D4DAC66 /* 13.77.172.102/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x0D4DB7D1 /* 13.77.183.209/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x0D4DCAA4 /* 13.77.202.164/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x0D4E6D9C /* 13.78.109.156/30 */, 30, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x0D4E8091 /* 13.78.128.145/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x0D4E94B2 /* 13.78.148.178/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x0D4E9699 /* 13.78.150.153/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x0D4E96C9 /* 13.78.150.201/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x0D4E96D0 /* 13.78.150.208/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x0D4EDF74 /* 13.78.223.116/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x0D5431F7 /* 13.84.49.247/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x0D5433AC /* 13.84.51.172/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x0D54343A /* 13.84.52.58/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x0D56DDDC /* 13.86.221.220/30 */, 30, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x0D6A268E /* 13.106.38.142/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x0D6A2694 /* 13.106.38.148/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x0D6A3603 /* 13.106.54.3/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x0D6A3613 /* 13.106.54.19/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x0D6A39B5 /* 13.106.57.181/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x0D6A39C4 /* 13.106.57.196/31 */, 31, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x14114258 /* 20.17.66.88/30 */, 30, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x14152A58 /* 20.21.42.88/30 */, 30, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x1424498B /* 20.36.73.139/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x142449C1 /* 20.36.73.193/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x14244AD6 /* 20.36.74.214/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x14244AEF /* 20.36.74.239/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x14244B2E /* 20.36.75.46/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x14244B32 /* 20.36.75.50/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x14269584 /* 20.38.149.132/30 */, 30, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x142735AE /* 20.39.53.174/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x142A4024 /* 20.42.64.36/30 */, 30, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x142B797C /* 20.43.121.124/30 */, 30, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x142C11DC /* 20.44.17.220/30 */, 30, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x142D4089 /* 20.45.64.137/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x142D408A /* 20.45.64.138/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x142D408E /* 20.45.64.142/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x142D4859 /* 20.45.72.89/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x142D486F /* 20.45.72.111/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x142D4BB7 /* 20.45.75.183/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x142D7BEC /* 20.45.123.236/30 */, 30, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x143010F7 /* 20.48.16.247/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x14301553 /* 20.48.21.83/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x143015F2 /* 20.48.21.242/31 */, 31, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x1430287A /* 20.48.40.122/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x14345FFE /* 20.52.95.254/31 */, 31, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x14353E64 /* 20.53.62.100/31 */, 31, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x14450866 /* 20.69.8.102/31 */, 31, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x14481B98 /* 20.72.27.152/30 */, 30, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x145A2626 /* 20.90.38.38/31 */, 31, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x145C0572 /* 20.92.5.114/31 */, 31, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x1469D714 /* 20.105.215.20/31 */, 31, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x14742B6C /* 20.116.43.108/31 */, 31, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x1475C122 /* 20.117.193.34/31 */, 31, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x14764E24 /* 20.118.78.36/31 */, 31, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x14771CDC /* 20.119.28.220/31 */, 31, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x147D04A8 /* 20.125.4.168/31 */, 31, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x14874633 /* 20.135.70.51/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x14874A03 /* 20.135.74.3/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x1496ACE4 /* 20.150.172.228/30 */, 30, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x14C0EE7C /* 20.192.238.124/30 */, 30, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x14C180F4 /* 20.193.128.244/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x14C18106 /* 20.193.129.6/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x14C1817E /* 20.193.129.126/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x14C1880C /* 20.193.136.12/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x14C18839 /* 20.193.136.57/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x14C1883B /* 20.193.136.59/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x14C1889D /* 20.193.136.157/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x14C188A0 /* 20.193.136.160/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x14C188D6 /* 20.193.136.214/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x14C188D8 /* 20.193.136.216/31 */, 31, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x14C188E0 /* 20.193.136.224/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x14C188EF /* 20.193.136.239/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x14C188F9 /* 20.193.136.249/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x14C1890D /* 20.193.137.13/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x14C1890E /* 20.193.137.14/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x14C18924 /* 20.193.137.36/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x14C18937 /* 20.193.137.55/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x14C1CA04 /* 20.193.202.4/30 */, 30, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x14C35736 /* 20.195.87.54/31 */, 31, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x14C7C942 /* 20.199.201.66/31 */, 31, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x14CB583E /* 20.203.88.62/31 */, 31, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x14CCC0D8 /* 20.204.192.216/31 */, 31, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x14D2458C /* 20.210.69.140/31 */, 31, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x14D79A58 /* 20.215.154.88/30 */, 30, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x14D93A58 /* 20.217.58.88/30 */, 30, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x17618DA0 /* 23.97.141.160/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x1761A9D6 /* 23.97.169.214/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x1761D143 /* 23.97.209.67/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x1761D6D2 /* 23.97.214.210/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x1761DABC /* 23.97.218.188/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x17629686 /* 23.98.150.134/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x2844C389 /* 40.68.195.137/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x2844C93A /* 40.68.201.58/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x2844C941 /* 40.68.201.65/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x2844C9CE /* 40.68.201.206/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x2844C9D3 /* 40.68.201.211/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x2844CC12 /* 40.68.204.18/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x28456FC4 /* 40.69.111.196/30 */, 30, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x284A6618 /* 40.74.102.24/30 */, 30, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x2855CD4D /* 40.85.205.77/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x2855D633 /* 40.85.214.51/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x2855D9F1 /* 40.85.217.241/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x2855E449 /* 40.85.228.73/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x2855FBE8 /* 40.85.251.232/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x2855FE1F /* 40.85.254.31/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x2873256A /* 40.115.37.106/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x2879431E /* 40.121.67.30/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x2879DBD7 /* 40.121.219.215/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x2879DD3E /* 40.121.221.62/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x2879DEC9 /* 40.121.222.201/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x2879DFBA /* 40.121.223.186/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x287F5973 /* 40.127.89.115/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x287F59E9 /* 40.127.89.233/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x287F59ED /* 40.127.89.237/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x287F5A01 /* 40.127.90.1/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x287F5EDD /* 40.127.94.221/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x330C65AC /* 51.12.101.172/30 */, 30, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x330CCCF4 /* 51.12.204.244/30 */, 30, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x33356A58 /* 51.53.106.88/30 */, 30, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x3335BA58 /* 51.53.186.88/30 */, 30, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x33680964 /* 51.104.9.100/30 */, 30, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x3374A861 /* 51.116.168.97/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x3374A869 /* 51.116.168.105/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x3374A86B /* 51.116.168.107/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x3374A872 /* 51.116.168.114/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x3374ABA7 /* 51.116.171.167/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x3374ABAB /* 51.116.171.171/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x3374ABDB /* 51.116.171.219/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x3374EBDD /* 51.116.235.221/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x3374EF87 /* 51.116.239.135/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x338C3C3C /* 51.140.60.60/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x338C3CA0 /* 51.140.60.160/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x338C449E /* 51.140.68.158/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x338C46DA /* 51.140.70.218/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x338C4907 /* 51.140.73.7/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x338C780F /* 51.140.120.15/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x338CF264 /* 51.140.242.100/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x338CFA79 /* 51.140.250.121/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x338CFEE1 /* 51.140.254.225/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x338D0C52 /* 51.141.12.82/31 */, 31, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x338D0C54 /* 51.141.12.84/31 */, 31, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x338D0CEA /* 51.141.12.234/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x338D0DAA /* 51.141.13.170/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x339064C0 /* 51.144.100.192/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x348A1FD3 /* 52.138.31.211/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x34959A8E /* 52.149.154.142/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x349A4C5D /* 52.154.76.93/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x349A4DA4 /* 52.154.77.164/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x34A06141 /* 52.160.97.65/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x34A10DA7 /* 52.161.13.167/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x34A10E03 /* 52.161.14.3/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x34A1132D /* 52.161.19.45/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x34A1137D /* 52.161.19.125/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x34A11626 /* 52.161.22.38/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x34A118A5 /* 52.161.24.165/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x34A11C3E /* 52.161.28.62/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x34A11C9F /* 52.161.28.159/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x34A11CA7 /* 52.161.28.167/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x34A11EBD /* 52.161.30.189/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x34A11FDA /* 52.161.31.218/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x34A15C93 /* 52.161.92.147/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x34A15F59 /* 52.161.95.89/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x34A16083 /* 52.161.96.131/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x34A160D5 /* 52.161.96.213/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x34A16190 /* 52.161.97.144/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x34A16272 /* 52.161.98.114/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x34A16874 /* 52.161.104.116/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x34A16A35 /* 52.161.106.53/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x34A16DC4 /* 52.161.109.196/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x34AC88BC /* 52.172.136.188/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x34AC906F /* 52.172.144.111/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x34ACA45A /* 52.172.164.90/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x34ACBB5D /* 52.172.187.93/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x34ACC6EC /* 52.172.198.236/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x34ACCAC3 /* 52.172.202.195/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x34ACD292 /* 52.172.210.146/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x34ACD3AC /* 52.172.211.172/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x34ACD54E /* 52.172.213.78/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x34ACD7B4 /* 52.172.215.180/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x34ACDA90 /* 52.172.218.144/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x34ACDD0D /* 52.172.221.13/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x34ACDD61 /* 52.172.221.97/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x34B714F4 /* 52.183.20.244/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x34B71F00 /* 52.183.31.0/32 */, 32, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0x34B75E3B /* 52.183.94.59/32 */, 32, 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}, + { 0xA83F8000 /* 168.63.128.0/24 */, 24, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xA83F8100 /* 168.63.129.0/28 */, 28, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xA83F8120 /* 168.63.129.32/27 */, 27, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xA83F8140 /* 168.63.129.64/26 */, 26, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xA83F8180 /* 168.63.129.128/25 */, 25, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xA83F8200 /* 168.63.130.0/23 */, 23, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xA83F8400 /* 168.63.132.0/22 */, 22, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xA83F8800 /* 168.63.136.0/21 */, 21, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xA83F9400 /* 168.63.148.0/22 */, 22, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xA83F9800 /* 168.63.152.0/22 */, 22, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xA83F9C00 /* 168.63.156.0/24 */, 24, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xA83FA000 /* 168.63.160.0/19 */, 19, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xA83FC000 /* 168.63.192.0/19 */, 19, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xA83FE000 /* 168.63.224.0/19 */, 19, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xACA00000 /* 172.160.0.0/16 */, 16, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xACA10000 /* 172.161.0.0/16 */, 16, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xACA20000 /* 172.162.0.0/16 */, 16, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xACA30000 /* 172.163.0.0/16 */, 16, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xACA40000 /* 172.164.0.0/16 */, 16, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xACA50000 /* 172.165.0.0/16 */, 16, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xACA60000 /* 172.166.0.0/15 */, 15, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xACA80000 /* 172.168.0.0/15 */, 15, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xACAA0000 /* 172.170.0.0/16 */, 16, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xACAB0000 /* 172.171.0.0/19 */, 19, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xACAB2000 /* 172.171.32.0/19 */, 19, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xACAB4000 /* 172.171.64.0/19 */, 19, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xACAB6000 /* 172.171.96.0/19 */, 19, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xACAB8000 /* 172.171.128.0/17 */, 17, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xACAC0000 /* 172.172.0.0/15 */, 15, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xACAE0000 /* 172.174.0.0/16 */, 16, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xACAF0000 /* 172.175.0.0/16 */, 16, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xACB00000 /* 172.176.0.0/15 */, 15, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xACB20000 /* 172.178.0.0/17 */, 17, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xACB28000 /* 172.178.128.0/17 */, 17, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xACB30000 /* 172.179.0.0/16 */, 16, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xACB40000 /* 172.180.0.0/15 */, 15, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xACB60000 /* 172.182.0.0/16 */, 16, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xACB70000 /* 172.183.0.0/16 */, 16, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xACB80000 /* 172.184.0.0/15 */, 15, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xACBA0000 /* 172.186.0.0/16 */, 16, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xACBB0000 /* 172.187.0.0/18 */, 18, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xACBB8000 /* 172.187.128.0/17 */, 17, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFE81000 /* 191.232.16.0/21 */, 21, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFE82000 /* 191.232.32.0/19 */, 19, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFE84000 /* 191.232.64.0/20 */, 20, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFE8A000 /* 191.232.160.0/19 */, 19, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFE8C000 /* 191.232.192.0/18 */, 18, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFE90000 /* 191.233.0.0/21 */, 21, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFE90800 /* 191.233.8.0/21 */, 21, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFE91000 /* 191.233.16.0/20 */, 20, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFE92000 /* 191.233.32.0/20 */, 20, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFE93000 /* 191.233.48.0/21 */, 21, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFE94000 /* 191.233.64.0/18 */, 18, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFE98000 /* 191.233.128.0/20 */, 20, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFE99000 /* 191.233.144.0/20 */, 20, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFE9A000 /* 191.233.160.0/19 */, 19, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFE9C000 /* 191.233.192.0/18 */, 18, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEA0200 /* 191.234.2.0/23 */, 23, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEA1000 /* 191.234.16.0/20 */, 20, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEA2000 /* 191.234.32.0/19 */, 19, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEA8000 /* 191.234.128.0/18 */, 18, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEAC000 /* 191.234.192.0/19 */, 19, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEAE000 /* 191.234.224.0/19 */, 19, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEB2000 /* 191.235.32.0/19 */, 19, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEB4000 /* 191.235.64.0/18 */, 18, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEB8000 /* 191.235.128.0/18 */, 18, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEBC000 /* 191.235.192.0/22 */, 22, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEBC400 /* 191.235.196.0/22 */, 22, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEBC800 /* 191.235.200.0/21 */, 21, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEBD000 /* 191.235.208.0/20 */, 20, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEBE000 /* 191.235.224.0/20 */, 20, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEBF000 /* 191.235.240.0/21 */, 21, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEBF800 /* 191.235.248.0/23 */, 23, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEBFA00 /* 191.235.250.0/25 */, 25, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEBFF00 /* 191.235.255.0/24 */, 24, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEC0000 /* 191.236.0.0/18 */, 18, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEC4000 /* 191.236.64.0/18 */, 18, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEC8000 /* 191.236.128.0/18 */, 18, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFECC000 /* 191.236.192.0/18 */, 18, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFED0000 /* 191.237.0.0/17 */, 17, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFED8000 /* 191.237.128.0/18 */, 18, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEDC000 /* 191.237.192.0/23 */, 23, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEDC200 /* 191.237.194.0/24 */, 24, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEDC300 /* 191.237.195.0/24 */, 24, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEDC400 /* 191.237.196.0/24 */, 24, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEDC800 /* 191.237.200.0/21 */, 21, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEDD000 /* 191.237.208.0/20 */, 20, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEDE000 /* 191.237.224.0/21 */, 21, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEDE800 /* 191.237.232.0/22 */, 22, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEDEC00 /* 191.237.236.0/24 */, 24, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEDEE00 /* 191.237.238.0/24 */, 24, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEDF000 /* 191.237.240.0/23 */, 23, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEDF800 /* 191.237.248.0/21 */, 21, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEE0000 /* 191.238.0.0/18 */, 18, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEE4000 /* 191.238.64.0/23 */, 23, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEE4200 /* 191.238.66.0/23 */, 23, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEE4400 /* 191.238.68.0/24 */, 24, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEE4600 /* 191.238.70.0/23 */, 23, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEE4800 /* 191.238.72.0/21 */, 21, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEE5000 /* 191.238.80.0/21 */, 21, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEE5800 /* 191.238.88.0/22 */, 22, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEE5C00 /* 191.238.92.0/23 */, 23, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEE6000 /* 191.238.96.0/19 */, 19, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEE8000 /* 191.238.128.0/21 */, 21, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEE9000 /* 191.238.144.0/20 */, 20, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEEA000 /* 191.238.160.0/19 */, 19, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEEC000 /* 191.238.192.0/19 */, 19, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEEE000 /* 191.238.224.0/19 */, 19, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEF0000 /* 191.239.0.0/18 */, 18, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEF4000 /* 191.239.64.0/19 */, 19, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEF6000 /* 191.239.96.0/20 */, 20, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEF7000 /* 191.239.112.0/20 */, 20, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEFA000 /* 191.239.160.0/19 */, 19, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEFC000 /* 191.239.192.0/22 */, 22, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEFC800 /* 191.239.200.0/22 */, 22, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEFCC00 /* 191.239.204.0/22 */, 22, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEFD000 /* 191.239.208.0/20 */, 20, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEFE000 /* 191.239.224.0/20 */, 20, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xBFEFF000 /* 191.239.240.0/20 */, 20, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xC1954000 /* 193.149.64.0/21 */, 21, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xC1954800 /* 193.149.72.0/21 */, 21, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xC1955000 /* 193.149.80.0/21 */, 21, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xC1955800 /* 193.149.88.0/21 */, 21, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xC6B46100 /* 198.180.97.0/24 */, 24, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xC71E1000 /* 199.30.16.0/24 */, 24, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xC71E1200 /* 199.30.18.0/23 */, 23, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xC71E1400 /* 199.30.20.0/24 */, 24, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xC71E1600 /* 199.30.22.0/24 */, 24, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xC71E1800 /* 199.30.24.0/23 */, 23, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xC71E1B00 /* 199.30.27.0/25 */, 25, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xC71E1B90 /* 199.30.27.144/28 */, 28, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xC71E1BA0 /* 199.30.27.160/27 */, 27, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xC71E1C40 /* 199.30.28.64/26 */, 26, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xC71E1C80 /* 199.30.28.128/25 */, 25, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xC71E1D00 /* 199.30.29.0/24 */, 24, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xC71E1F00 /* 199.30.31.0/25 */, 25, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xC71E1FC0 /* 199.30.31.192/26 */, 26, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xCA59E940 /* 202.89.233.64/27 */, 27, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xCA59EB80 /* 202.89.235.128/25 */, 25, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xCC4FB400 /* 204.79.180.0/24 */, 24, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xCC981200 /* 204.152.18.0/31 */, 31, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xCC981208 /* 204.152.18.8/29 */, 29, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xCC981220 /* 204.152.18.32/27 */, 27, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xCC981240 /* 204.152.18.64/26 */, 26, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xCC981300 /* 204.152.19.0/24 */, 24, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xCCE7C500 /* 204.231.197.0/24 */, 24, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xCF2E0D00 /* 207.46.13.0/24 */, 24, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xCF2E3280 /* 207.46.50.128/28 */, 28, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xCF2E3B40 /* 207.46.59.64/27 */, 27, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xCF2E3F40 /* 207.46.63.64/27 */, 27, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xCF2E3F80 /* 207.46.63.128/25 */, 25, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xCF2E43A0 /* 207.46.67.160/27 */, 27, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xCF2E43C0 /* 207.46.67.192/27 */, 27, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xCF2E4800 /* 207.46.72.0/27 */, 27, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xCF2E4DE0 /* 207.46.77.224/28 */, 28, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xCF2E5700 /* 207.46.87.0/24 */, 24, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xCF2E5910 /* 207.46.89.16/28 */, 28, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xCF2E5F20 /* 207.46.95.32/27 */, 27, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xCF2E7E00 /* 207.46.126.0/24 */, 24, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xCF2E8000 /* 207.46.128.0/19 */, 19, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xCF2EC1C0 /* 207.46.193.192/28 */, 28, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xCF2EC1E0 /* 207.46.193.224/27 */, 27, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xCF2EC680 /* 207.46.198.128/25 */, 25, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xCF2EC860 /* 207.46.200.96/27 */, 27, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xCF2EC8B0 /* 207.46.200.176/28 */, 28, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xCF2ECA80 /* 207.46.202.128/28 */, 28, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xCF2ECD00 /* 207.46.205.0/24 */, 24, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xCF2EE000 /* 207.46.224.0/20 */, 20, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xCF44AE08 /* 207.68.174.8/29 */, 29, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xCF44AE28 /* 207.68.174.40/29 */, 29, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xCF44AE30 /* 207.68.174.48/29 */, 29, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xCF44AEB8 /* 207.68.174.184/29 */, 29, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xCF44AED0 /* 207.68.174.208/28 */, 28, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xD1F0D400 /* 209.240.212.0/23 */, 23, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xD5C78000 /* 213.199.128.0/20 */, 20, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xD5C7A900 /* 213.199.169.0/24 */, 24, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xD5C7B420 /* 213.199.180.32/28 */, 28, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xD5C7B460 /* 213.199.180.96/27 */, 27, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xD5C7B4C0 /* 213.199.180.192/27 */, 27, NDPI_PROTOCOL_MICROSOFT_AZURE }, + { 0xD5C7B700 /* 213.199.183.0/24 */, 24, NDPI_PROTOCOL_MICROSOFT_AZURE }, + /* End */ + { 0x0, 0, 0 } +}; diff --git a/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_cachefly_match.c b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_cachefly_match.c new file mode 100644 index 0000000000..19866c217f --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_cachefly_match.c @@ -0,0 +1,36 @@ +/* + * + * This file is generated automatically and part of nDPI + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +/* ****************************************************** */ +#include "../ndpi_typedefs.h" +#include "../ndpi_protocol_ids.h" + +static ndpi_network ndpi_protocol_cachefly_protocol_list[] = { + { 0xCDEAAF00 /* 205.234.175.0/24 */, 24, NDPI_PROTOCOL_CACHEFLY }, + { 0xCC5D9600 /* 204.93.150.0/24 */, 24, NDPI_PROTOCOL_CACHEFLY }, + { 0xCC5D8E00 /* 204.93.142.0/23 */, 23, NDPI_PROTOCOL_CACHEFLY }, + { 0xA7589E00 /* 167.88.158.0/24 */, 24, NDPI_PROTOCOL_CACHEFLY }, + { 0x42E1C500 /* 66.225.197.0/24 */, 24, NDPI_PROTOCOL_CACHEFLY }, + { 0x2D588400 /* 45.88.132.0/22 */, 22, NDPI_PROTOCOL_CACHEFLY }, + { 0x5250E0BE /* 82.80.224.190/32 */, 32, NDPI_PROTOCOL_CACHEFLY }, + { 0xA747EE9F /* 167.71.238.159/32 */, 32, NDPI_PROTOCOL_CACHEFLY }, + { 0x08F2E3F8 /* 8.242.227.248/29 */, 29, NDPI_PROTOCOL_CACHEFLY }, + /* End */ + { 0x0, 0, 0 } +}; diff --git a/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_cloudflare_match.c b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_cloudflare_match.c new file mode 100644 index 0000000000..f075e0a22a --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_cloudflare_match.c @@ -0,0 +1,42 @@ +/* + * + * This file is generated automatically and part of nDPI + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +/* ****************************************************** */ +#include "../ndpi_typedefs.h" +#include "../ndpi_protocol_ids.h" + +static ndpi_network ndpi_protocol_cloudflare_protocol_list[] = { + { 0xADF53000 /* 173.245.48.0/20 */, 20, NDPI_PROTOCOL_CLOUDFLARE }, + { 0x6715F400 /* 103.21.244.0/22 */, 22, NDPI_PROTOCOL_CLOUDFLARE }, + { 0x6716C800 /* 103.22.200.0/22 */, 22, NDPI_PROTOCOL_CLOUDFLARE }, + { 0x671F0400 /* 103.31.4.0/22 */, 22, NDPI_PROTOCOL_CLOUDFLARE }, + { 0x8D654000 /* 141.101.64.0/18 */, 18, NDPI_PROTOCOL_CLOUDFLARE }, + { 0x6CA2C000 /* 108.162.192.0/18 */, 18, NDPI_PROTOCOL_CLOUDFLARE }, + { 0xBE5DF000 /* 190.93.240.0/20 */, 20, NDPI_PROTOCOL_CLOUDFLARE }, + { 0xBC726000 /* 188.114.96.0/20 */, 20, NDPI_PROTOCOL_CLOUDFLARE }, + { 0xC5EAF000 /* 197.234.240.0/22 */, 22, NDPI_PROTOCOL_CLOUDFLARE }, + { 0xC6298000 /* 198.41.128.0/17 */, 17, NDPI_PROTOCOL_CLOUDFLARE }, + { 0xA29E0000 /* 162.158.0.0/15 */, 15, NDPI_PROTOCOL_CLOUDFLARE }, + { 0x68100000 /* 104.16.0.0/13 */, 13, NDPI_PROTOCOL_CLOUDFLARE }, + { 0x68180000 /* 104.24.0.0/14 */, 14, NDPI_PROTOCOL_CLOUDFLARE }, + { 0xAC400000 /* 172.64.0.0/13 */, 13, NDPI_PROTOCOL_CLOUDFLARE }, + { 0x83004800 /* 131.0.72.0/22 */, 22, NDPI_PROTOCOL_CLOUDFLARE }, + /* End */ + { 0x0, 0, 0 } +}; diff --git a/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_content_match.h b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_content_match.h new file mode 100644 index 0000000000..e74e4b79d2 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_content_match.h @@ -0,0 +1,1940 @@ +/* + * ndpi_content_match.c.inc + * + * Copyright (C) 2011-22 - ntop.org + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +/* ****************************************************** */ +#include "../ndpi_typedefs.h" +#include "../ndpi_protocol_ids.h" + +static ndpi_network host_protocol_list[] = { + /* + SoundCloud + TODO: are we able to autogenerate this list? + */ + { 0x22FB2FEE /* 34.251.47.238 */, 32, NDPI_PROTOCOL_SOUNDCLOUD }, + { 0x23A06456 /* 35.160.100.86 */, 32, NDPI_PROTOCOL_SOUNDCLOUD }, + { 0x36C0CA58 /* 54.192.202.88 */, 32, NDPI_PROTOCOL_SOUNDCLOUD }, + + /* + Instagram, Inc. + (instagram-*.fbcdn.net, fna-instagram-*.fbcdn.net) + TODO: are we able to autogenerate this list (like the other FB IPs)? + */ + { 0x9DF00225 /* 157.240.2.37/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF00234 /* 157.240.2.52/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF002AC /* 157.240.2.172/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF002AE /* 157.240.2.174/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF00326 /* 157.240.3.38/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0033F /* 157.240.3.63/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF003AC /* 157.240.3.172/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF003AE /* 157.240.3.174/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF00625 /* 157.240.6.37/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF00634 /* 157.240.6.52/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF006AC /* 157.240.6.172/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF006AE /* 157.240.6.174/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF00725 /* 157.240.7.37/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF00734 /* 157.240.7.52/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF007AC /* 157.240.7.172/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF007AE /* 157.240.7.174/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF00825 /* 157.240.8.37/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF00834 /* 157.240.8.52/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF008AC /* 157.240.8.172/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF008AE /* 157.240.8.174/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF00925 /* 157.240.9.37/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF00934 /* 157.240.9.52/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF009AC /* 157.240.9.172/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF009AE /* 157.240.9.174/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF00A25 /* 157.240.10.37/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF00A34 /* 157.240.10.52/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF00AAC /* 157.240.10.172/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF00AAE /* 157.240.10.174/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF00B25 /* 157.240.11.37/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF00B34 /* 157.240.11.52/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF00BAC /* 157.240.11.172/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF00BAE /* 157.240.11.174/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF00C25 /* 157.240.12.37/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF00C34 /* 157.240.12.52/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF00CAC /* 157.240.12.172/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF00CAE /* 157.240.12.174/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF00D25 /* 157.240.13.37/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF00D34 /* 157.240.13.52/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF00DAC /* 157.240.13.172/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF00DAE /* 157.240.13.174/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF00E25 /* 157.240.14.37/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF00E3F /* 157.240.14.63/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF00EAC /* 157.240.14.172/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF00EAE /* 157.240.14.174/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF00F20 /* 157.240.15.32/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF00F3F /* 157.240.15.63/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF00FAC /* 157.240.15.172/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF00FAE /* 157.240.15.174/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF01025 /* 157.240.16.37/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0103F /* 157.240.16.63/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF010AC /* 157.240.16.172/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF010AE /* 157.240.16.174/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF01126 /* 157.240.17.38/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0113F /* 157.240.17.63/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF011AC /* 157.240.17.172/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF011AE /* 157.240.17.174/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF01225 /* 157.240.18.37/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0123F /* 157.240.18.63/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF012AC /* 157.240.18.172/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF012AE /* 157.240.18.174/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF01327 /* 157.240.19.39/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0133F /* 157.240.19.63/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF013AC /* 157.240.19.172/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF013AE /* 157.240.19.174/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF01425 /* 157.240.20.37/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0143F /* 157.240.20.63/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF014AC /* 157.240.20.172/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF014AE /* 157.240.20.174/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF01525 /* 157.240.21.37/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0153F /* 157.240.21.63/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF015AC /* 157.240.21.172/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF015AE /* 157.240.21.174/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF01625 /* 157.240.22.37/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0163F /* 157.240.22.63/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF016AC /* 157.240.22.172/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF016AE /* 157.240.22.174/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF01726 /* 157.240.23.38/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0173F /* 157.240.23.63/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF017AC /* 157.240.23.172/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF017AE /* 157.240.23.174/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF01820 /* 157.240.24.32/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0183F /* 157.240.24.63/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF018AC /* 157.240.24.172/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF018AE /* 157.240.24.174/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF01920 /* 157.240.25.32/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0193F /* 157.240.25.63/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF019AC /* 157.240.25.172/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF019AE /* 157.240.25.174/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF01A26 /* 157.240.26.38/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF01A3F /* 157.240.26.63/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF01AAC /* 157.240.26.172/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF01AAE /* 157.240.26.174/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF01B26 /* 157.240.27.38/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF01B3F /* 157.240.27.63/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF01BAC /* 157.240.27.172/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF01BAE /* 157.240.27.174/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF01C25 /* 157.240.28.37/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF01C3F /* 157.240.28.63/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF01CAC /* 157.240.28.172/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF01CAE /* 157.240.28.174/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF01E26 /* 157.240.30.38/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF01E3F /* 157.240.30.63/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF01EAC /* 157.240.30.172/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF01EAE /* 157.240.30.174/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0809F /* 157.240.128.159/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF080A1 /* 157.240.128.161/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF080B6 /* 157.240.128.182/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0821F /* 157.240.130.31/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF08220 /* 157.240.130.32/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0822B /* 157.240.130.43/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0831F /* 157.240.131.31/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF08320 /* 157.240.131.32/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0832B /* 157.240.131.43/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0851F /* 157.240.133.31/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF08520 /* 157.240.133.32/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0852B /* 157.240.133.43/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0871F /* 157.240.135.31/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF08720 /* 157.240.135.32/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0872B /* 157.240.135.43/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0881F /* 157.240.136.31/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF08820 /* 157.240.136.32/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0882B /* 157.240.136.43/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF08A1F /* 157.240.138.31/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF08A20 /* 157.240.138.32/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF08A2B /* 157.240.138.43/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF08B1F /* 157.240.139.31/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF08B21 /* 157.240.139.33/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF08B2B /* 157.240.139.43/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF08C1F /* 157.240.140.31/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF08C21 /* 157.240.140.33/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF08C2B /* 157.240.140.43/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF08D1F /* 157.240.141.31/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF08D21 /* 157.240.141.33/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF08D2B /* 157.240.141.43/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF08E1F /* 157.240.142.31/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF08E21 /* 157.240.142.33/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF08E2B /* 157.240.142.43/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF08F1F /* 157.240.143.31/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF08F21 /* 157.240.143.33/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF08F2B /* 157.240.143.43/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0901F /* 157.240.144.31/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF09021 /* 157.240.144.33/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0902B /* 157.240.144.43/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0911F /* 157.240.145.31/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF09121 /* 157.240.145.33/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0912B /* 157.240.145.43/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0921F /* 157.240.146.31/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF09221 /* 157.240.146.33/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0922B /* 157.240.146.43/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0931F /* 157.240.147.31/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF09321 /* 157.240.147.33/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0932B /* 157.240.147.43/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0941F /* 157.240.148.31/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF09421 /* 157.240.148.33/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0942B /* 157.240.148.43/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0971F /* 157.240.151.31/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF09721 /* 157.240.151.33/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0972B /* 157.240.151.43/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0981F /* 157.240.152.31/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF09821 /* 157.240.152.33/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0982B /* 157.240.152.43/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF09B9F /* 157.240.155.159/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF09BA1 /* 157.240.155.161/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF09BB7 /* 157.240.155.183/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF09E9F /* 157.240.158.159/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF09EA1 /* 157.240.158.161/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF09EB7 /* 157.240.158.183/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF09F9F /* 157.240.159.159/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF09FA1 /* 157.240.159.161/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF09FB7 /* 157.240.159.183/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0A21F /* 157.240.162.31/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0A221 /* 157.240.162.33/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0A22B /* 157.240.162.43/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0A25F /* 157.240.162.95/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0A261 /* 157.240.162.97/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0A26B /* 157.240.162.107/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0A29F /* 157.240.162.159/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0A2A1 /* 157.240.162.161/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0A2AB /* 157.240.162.171/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0A2DF /* 157.240.162.223/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0A2E1 /* 157.240.162.225/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0A2EB /* 157.240.162.235/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0A41F /* 157.240.164.31/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0A421 /* 157.240.164.33/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0A42B /* 157.240.164.43/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0A45F /* 157.240.164.95/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0A461 /* 157.240.164.97/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0A46B /* 157.240.164.107/32 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/* 157.240.216.63/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0D8AC /* 157.240.216.172/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0D8AE /* 157.240.216.174/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0D926 /* 157.240.217.38/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0D93F /* 157.240.217.63/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0D9AC /* 157.240.217.172/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0D9AE /* 157.240.217.174/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0DA26 /* 157.240.218.38/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0DA3F /* 157.240.218.63/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0DAAC /* 157.240.218.172/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0DAAE /* 157.240.218.174/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0DC25 /* 157.240.220.37/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0DC3F /* 157.240.220.63/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0DCAC /* 157.240.220.172/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0DCAE /* 157.240.220.174/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0DD26 /* 157.240.221.38/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0DD3F /* 157.240.221.63/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0DDAC /* 157.240.221.172/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0DDAE /* 157.240.221.174/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0DE25 /* 157.240.222.37/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0DE3F /* 157.240.222.63/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0DEAC /* 157.240.222.172/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0DEAE /* 157.240.222.174/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0DF26 /* 157.240.223.38/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0DF3F /* 157.240.223.63/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0DFAC /* 157.240.223.172/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0DFAE /* 157.240.223.174/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0E020 /* 157.240.224.32/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0E03F /* 157.240.224.63/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0E0AC /* 157.240.224.172/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0E0AE /* 157.240.224.174/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0E120 /* 157.240.225.32/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0E13F /* 157.240.225.63/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0E1AC /* 157.240.225.172/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0E1AE /* 157.240.225.174/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0E220 /* 157.240.226.32/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0E23F /* 157.240.226.63/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0E2AC /* 157.240.226.172/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0E2AE /* 157.240.226.174/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0E320 /* 157.240.227.32/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0E33F /* 157.240.227.63/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0E3AC /* 157.240.227.172/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0E3AE /* 157.240.227.174/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0E420 /* 157.240.228.32/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0E43F /* 157.240.228.63/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0E4AC /* 157.240.228.172/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0E4AE /* 157.240.228.174/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0E520 /* 157.240.229.32/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0E53F /* 157.240.229.63/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0E5AC /* 157.240.229.172/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0E5AE /* 157.240.229.174/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0E5C6 /* 157.240.229.198/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0E720 /* 157.240.231.32/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0E73F /* 157.240.231.63/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0E7AC /* 157.240.231.172/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0E7AE /* 157.240.231.174/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0E820 /* 157.240.232.32/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0E83F /* 157.240.232.63/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0E8AC /* 157.240.232.172/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0E8AE /* 157.240.232.174/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0E920 /* 157.240.233.32/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0E93F /* 157.240.233.63/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0E9AC /* 157.240.233.172/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0E9AE /* 157.240.233.174/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0EA20 /* 157.240.234.32/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0EA3F /* 157.240.234.63/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0EAAC /* 157.240.234.172/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0EAAE /* 157.240.234.174/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0EB20 /* 157.240.235.32/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0EB3F /* 157.240.235.63/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0EBAC /* 157.240.235.172/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0EBAE /* 157.240.235.174/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0EC20 /* 157.240.236.32/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0EC3F /* 157.240.236.63/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0ECAC /* 157.240.236.172/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0ECAE /* 157.240.236.174/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0EF20 /* 157.240.239.32/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0EF3F /* 157.240.239.63/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0EFAC /* 157.240.239.172/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0EFAE /* 157.240.239.174/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0F020 /* 157.240.240.32/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0F03F /* 157.240.240.63/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0F0AC /* 157.240.240.172/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0F0AE /* 157.240.240.174/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0F120 /* 157.240.241.32/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0F13F /* 157.240.241.63/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0F1AC /* 157.240.241.172/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0F1AE /* 157.240.241.174/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + { 0x9DF0F1C4 /* 157.240.241.196/32 */, 32, NDPI_PROTOCOL_INSTAGRAM }, + + /* + OCS GO (Orange Cinéma Séries) + TODO: are we able to autogenerate this list? + */ + + { 0xB2F8D000 /* 178.248.208.0 */, 21, NDPI_PROTOCOL_OCS }, + + + /* Teamviewer + router1.teamviewer.com... router16.teamviewer.com + TODO: are we able to autogenerate this list (like the other Teamviewer IPs)? + */ + { 0x25FCE044 /* 37.252.224.68 */, 30, NDPI_PROTOCOL_TEAMVIEWER }, + { 0x25FCE048 /* 37.252.224.72 */, 30, NDPI_PROTOCOL_TEAMVIEWER }, + { 0x25FCE04C /* 37.252.224.76 */, 31, NDPI_PROTOCOL_TEAMVIEWER }, + { 0x25FCE784 /* 37.252.231.132 */, 30, NDPI_PROTOCOL_TEAMVIEWER }, + { 0x25FCE788 /* 37.252.231.136 */, 31, NDPI_PROTOCOL_TEAMVIEWER }, + { 0x25FCE864 /* 37.252.232.100 */, 30, NDPI_PROTOCOL_TEAMVIEWER }, + { 0x25FCE868 /* 37.252.232.104 */, 30, NDPI_PROTOCOL_TEAMVIEWER }, + { 0x25FCE86C /* 37.252.232.108 */, 31, NDPI_PROTOCOL_TEAMVIEWER }, + { 0x25FCF664 /* 37.252.246.100 */, 30, NDPI_PROTOCOL_TEAMVIEWER }, + { 0x25FCF668 /* 37.252.246.104 */, 31, NDPI_PROTOCOL_TEAMVIEWER }, + { 0x25FCF764 /* 37.252.247.100 */, 30, NDPI_PROTOCOL_TEAMVIEWER }, + { 0x25FCF768 /* 37.252.247.104 */, 29, NDPI_PROTOCOL_TEAMVIEWER }, + { 0x25FCF770 /* 37.252.247.112 */, 31, NDPI_PROTOCOL_TEAMVIEWER }, + { 0x25FCF772 /* 37.252.247.114 */, 32, NDPI_PROTOCOL_TEAMVIEWER }, + { 0x25FCFD64 /* 37.252.253.100 */, 30, NDPI_PROTOCOL_TEAMVIEWER }, + { 0x25FCFD68 /* 37.252.253.104 */, 31, NDPI_PROTOCOL_TEAMVIEWER }, + { 0x25FCFEA4 /* 37.252.254.164 */, 30, NDPI_PROTOCOL_TEAMVIEWER }, + { 0x25FCFEA8 /* 37.252.254.168 */, 29, NDPI_PROTOCOL_TEAMVIEWER }, + { 0x25FCFEB0 /* 37.252.254.176 */, 29, NDPI_PROTOCOL_TEAMVIEWER }, + { 0x25FCFEB8 /* 37.252.254.184 */, 30, NDPI_PROTOCOL_TEAMVIEWER }, + { 0x25FCFEBC /* 37.252.254.188 */, 32, NDPI_PROTOCOL_TEAMVIEWER }, + { 0x25FCFFC4 /* 37.252.255.196 */, 30, NDPI_PROTOCOL_TEAMVIEWER }, + { 0x25FCFFC8 /* 37.252.255.200 */, 29, NDPI_PROTOCOL_TEAMVIEWER }, + { 0x25FCFFD0 /* 37.252.255.208 */, 31, NDPI_PROTOCOL_TEAMVIEWER }, + { 0x25FCFFD2 /* 37.252.255.210 */, 32, NDPI_PROTOCOL_TEAMVIEWER }, + { 0x32751BD8 /* 50.117.27.216 */, 29, NDPI_PROTOCOL_TEAMVIEWER }, + { 0x44446410 /* 68.68.100.16 */, 29, NDPI_PROTOCOL_TEAMVIEWER }, + { 0x462634C8 /* 70.38.52.200 */, 29, NDPI_PROTOCOL_TEAMVIEWER }, + { 0x5E1006A4 /* 94.16.6.164 */, 30, NDPI_PROTOCOL_TEAMVIEWER }, + { 0x5E1006A8 /* 94.16.6.168 */, 29, NDPI_PROTOCOL_TEAMVIEWER }, + { 0x5E1006B0 /* 94.16.6.176 */, 31, NDPI_PROTOCOL_TEAMVIEWER }, + { 0x5E1006B2 /* 94.16.6.178 */, 32, NDPI_PROTOCOL_TEAMVIEWER }, + { 0x6CA399D8 /* 108.163.153.216 */, 29, NDPI_PROTOCOL_TEAMVIEWER }, + { 0x9EB05602 /* 158.176.86.2 */, 31, NDPI_PROTOCOL_TEAMVIEWER }, + { 0x9EB05604 /* 158.176.86.4 */, 30, NDPI_PROTOCOL_TEAMVIEWER }, + { 0x9EB05608 /* 158.176.86.8 */, 31, NDPI_PROTOCOL_TEAMVIEWER }, + { 0x9EB0560A /* 158.176.86.10 */, 31, NDPI_PROTOCOL_TEAMVIEWER }, + { 0x9EB0560C /* 158.176.86.12 */, 30, NDPI_PROTOCOL_TEAMVIEWER }, + { 0x9EB05610 /* 158.176.86.16 */, 32, NDPI_PROTOCOL_TEAMVIEWER }, + { 0x9F085884 /* 159.8.88.132 */, 30, NDPI_PROTOCOL_TEAMVIEWER }, + { 0x9F085888 /* 159.8.88.136 */, 29, NDPI_PROTOCOL_TEAMVIEWER }, + { 0x9F085890 /* 159.8.88.144 */, 31, NDPI_PROTOCOL_TEAMVIEWER }, + { 0x9F085892 /* 159.8.88.146 */, 32, NDPI_PROTOCOL_TEAMVIEWER }, + { 0x9F08E5E2 /* 159.8.229.226 */, 31, NDPI_PROTOCOL_TEAMVIEWER }, + { 0x9F08E5E4 /* 159.8.229.228 */, 30, NDPI_PROTOCOL_TEAMVIEWER }, + { 0x9F08E5E8 /* 159.8.229.232 */, 29, NDPI_PROTOCOL_TEAMVIEWER }, + { 0x9F08E5F0 /* 159.8.229.240 */, 32, NDPI_PROTOCOL_TEAMVIEWER }, + { 0x9F7AB6C4 /* 159.122.182.196 */, 30, NDPI_PROTOCOL_TEAMVIEWER }, + { 0x9F7AB6C8 /* 159.122.182.200 */, 29, NDPI_PROTOCOL_TEAMVIEWER }, + { 0x9F7AB6D0 /* 159.122.182.208 */, 31, NDPI_PROTOCOL_TEAMVIEWER }, + { 0x9F7AB6D2 /* 159.122.182.210 */, 32, NDPI_PROTOCOL_TEAMVIEWER }, + { 0x9F7ABD20 /* 159.122.189.32 */, 27, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xA19C4362 /* 161.156.67.98 */, 31, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xA19C4364 /* 161.156.67.100 */, 30, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xA19C4368 /* 161.156.67.104 */, 29, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xA19C4370 /* 161.156.67.112 */, 32, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xA9334DE2 /* 169.51.77.226 */, 31, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xA9334DE4 /* 169.51.77.228 */, 30, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xA9334DE8 /* 169.51.77.232 */, 30, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xAE8E0AE0 /* 174.142.10.224 */, 29, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xAE8EEBE8 /* 174.142.235.232 */, 29, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xAE8EEC78 /* 174.142.236.120 */, 29, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xB2FF9A84 /* 178.255.154.132 */, 30, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xB2FF9A88 /* 178.255.154.136 */, 29, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xB2FF9A90 /* 178.255.154.144 */, 31, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xB2FF9A92 /* 178.255.154.146 */, 32, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xB2FF9BA4 /* 178.255.155.164 */, 30, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xB2FF9BA8 /* 178.255.155.168 */, 29, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xB2FF9BB0 /* 178.255.155.176 */, 29, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xB2FF9BBC /* 178.255.155.188 */, 31, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xB2FF9BBE /* 178.255.155.190 */, 32, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xB86B0EA8 /* 184.107.14.168 */, 29, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xBC414C84 /* 188.65.76.132 */, 30, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xBC414C88 /* 188.65.76.136 */, 30, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xBC414C8C /* 188.65.76.140 */, 31, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xBCACC064 /* 188.172.192.100 */, 30, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xBCACC068 /* 188.172.192.104 */, 30, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xBCACC06C /* 188.172.192.108 */, 31, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xBCACC684 /* 188.172.198.132 */, 30, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xBCACC688 /* 188.172.198.136 */, 29, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xBCACC690 /* 188.172.198.144 */, 29, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xBCACC698 /* 188.172.198.152 */, 30, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xBCACC69C /* 188.172.198.156 */, 31, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xBCACC69E /* 188.172.198.158 */, 32, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xBCACDB84 /* 188.172.219.132 */, 30, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xBCACDB88 /* 188.172.219.136 */, 29, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xBCACDB90 /* 188.172.219.144 */, 30, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xBCACDB9B /* 188.172.219.155 */, 32, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xBCACDB9C /* 188.172.219.156 */, 31, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xBCACDB9E /* 188.172.219.158 */, 32, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xBCACDF64 /* 188.172.223.100 */, 30, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xBCACDF68 /* 188.172.223.104 */, 29, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xBCACDF70 /* 188.172.223.112 */, 31, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xBCACDF72 /* 188.172.223.114 */, 32, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xBCACE9A4 /* 188.172.233.164 */, 30, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xBCACE9A8 /* 188.172.233.168 */, 29, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xBCACE9B0 /* 188.172.233.176 */, 31, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xBCACE9B2 /* 188.172.233.178 */, 32, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xBCACE9B4 /* 188.172.233.180 */, 30, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xBCACE9B8 /* 188.172.233.184 */, 31, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xBCACEB84 /* 188.172.235.132 */, 30, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xBCACEB88 /* 188.172.235.136 */, 29, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xBCACEB90 /* 188.172.235.144 */, 29, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xBCACEB98 /* 188.172.235.152 */, 30, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xBCACEB9C /* 188.172.235.156 */, 31, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xBCACEB9E /* 188.172.235.158 */, 32, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xBCACF584 /* 188.172.245.132 */, 30, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xBCACF588 /* 188.172.245.136 */, 29, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xBCACF590 /* 188.172.245.144 */, 31, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xBCACF592 /* 188.172.245.146 */, 32, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xBCACF6A4 /* 188.172.246.164 */, 30, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xBCACF6A8 /* 188.172.246.168 */, 29, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xBCACF6B0 /* 188.172.246.176 */, 29, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xBCACF6BA /* 188.172.246.186 */, 31, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xBCACF6BC /* 188.172.246.188 */, 31, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xBCACF6BE /* 188.172.246.190 */, 32, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xBCACFE84 /* 188.172.254.132 */, 30, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xBCACFE88 /* 188.172.254.136 */, 30, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xBCACFE8C /* 188.172.254.140 */, 31, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xC0AF7958 /* 192.175.121.88 */, 29, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xD5E3A264 /* 213.227.162.100 */, 30, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xD5E3A268 /* 213.227.162.104 */, 29, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xD5E3A270 /* 213.227.162.112 */, 29, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xD5E3A27C /* 213.227.162.124 */, 31, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xD5E3A27E /* 213.227.162.126 */, 32, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xD5E3A384 /* 213.227.163.132 */, 30, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xD5E3A388 /* 213.227.163.136 */, 29, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xD5E3A390 /* 213.227.163.144 */, 29, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xD5E3A884 /* 213.227.168.132 */, 30, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xD5E3A888 /* 213.227.168.136 */, 29, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xD5E3A890 /* 213.227.168.144 */, 29, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xD5E3B984 /* 213.227.185.132 */, 30, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xD5E3B988 /* 213.227.185.136 */, 30, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xD5E3B98C /* 213.227.185.140 */, 31, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xD5E3BA84 /* 213.227.186.132 */, 30, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xD5E3BA88 /* 213.227.186.136 */, 29, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xD5E3BA90 /* 213.227.186.144 */, 29, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xD5E3BA98 /* 213.227.186.152 */, 30, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xD5E3BA9C /* 213.227.186.156 */, 32, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xD9920284 /* 217.146.2.132 */, 30, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xD9920288 /* 217.146.2.136 */, 29, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xD9920484 /* 217.146.4.132 */, 30, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xD9920488 /* 217.146.4.136 */, 31, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xD9920844 /* 217.146.8.68 */, 30, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xD9920848 /* 217.146.8.72 */, 30, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xD992084C /* 217.146.8.76 */, 31, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xD9920D84 /* 217.146.13.132 */, 30, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xD9920D88 /* 217.146.13.136 */, 29, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xD9920D90 /* 217.146.13.144 */, 31, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xD9920D92 /* 217.146.13.146 */, 32, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xD9920E84 /* 217.146.14.132 */, 30, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xD9920E88 /* 217.146.14.136 */, 30, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xD9920E8C /* 217.146.14.140 */, 31, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xD9921584 /* 217.146.21.132 */, 30, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xD9921588 /* 217.146.21.136 */, 30, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xD992158C /* 217.146.21.140 */, 31, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xD9921784 /* 217.146.23.132 */, 30, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xD9921788 /* 217.146.23.136 */, 29, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xD9921790 /* 217.146.23.144 */, 28, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xD99217A0 /* 217.146.23.160 */, 29, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xD99217A8 /* 217.146.23.168 */, 30, NDPI_PROTOCOL_TEAMVIEWER }, + { 0xD99217AC /* 217.146.23.172 */, 32, NDPI_PROTOCOL_TEAMVIEWER }, + +#if 0 + /* + IFLIX services -by www.vizuamatix.com R&D team + */ + { 0x344D0000 /* 52.77.0.0 */, 16, NDPI_PROTOCOL_IFLIX }, + { 0x34DC0000 /* 52.220.0.0 */, 16, NDPI_PROTOCOL_IFLIX }, + { 0x344A0000 /* 52.74.0.0 */, 16, NDPI_PROTOCOL_IFLIX }, + { 0x36E69F00 /* 54.230.159.0 */, 24, NDPI_PROTOCOL_IFLIX }, + { 0x36C09C50 /* 54.192.156.80 */, 32, NDPI_PROTOCOL_IFLIX }, + { 0x36FBB6A8 /* 54.251.182.168*/, 32, NDPI_PROTOCOL_IFLIX }, + { 0x36C09600 /* 54.192.150.0 */, 24, NDPI_PROTOCOL_IFLIX }, + { 0x344AC0F7 /* 52.74.192.247 */, 32, NDPI_PROTOCOL_IFLIX }, + { 0x0215E718 /* 2.21.231.24 */, 32, NDPI_PROTOCOL_IFLIX }, +#endif + + /* + Viber Media S.à r.l. + https://whois.arin.net/rest/nets;q=AWS-VIBER-MEDIA?showDetails=true&showARIN=false&showNonArinTopLevelNet=false&ext=netref2 + TODO: are we able to autogenerate this list? + */ + + { 0x0DE61550 /* 13.230.21.80/28 */, 28, NDPI_PROTOCOL_VIBER }, + { 0x0D39B480 /* 13.57.180.128/28 */, 28, NDPI_PROTOCOL_VIBER }, + { 0x012C30400 /* 18.195.4.0/23 */, 23, NDPI_PROTOCOL_VIBER }, + { 0x012C45500 /* 18.196.85.0/25 */, 25, NDPI_PROTOCOL_VIBER }, + { 0x022E8A340 /* 34.232.163.64/28 */, 28, NDPI_PROTOCOL_VIBER }, + { 0x022F67200 /* 34.246.114.0/23 */, 23, NDPI_PROTOCOL_VIBER }, + { 0x3400FC00 /* 52.0.252.0/22 */, 22, NDPI_PROTOCOL_VIBER }, + { 0x3403A746 /* 52.3.167.70/32 */, 32, NDPI_PROTOCOL_VIBER }, + { 0x34162CEB /* 52.22.44.235/32 */, 32, NDPI_PROTOCOL_VIBER }, + { 0x34165F0F /* 52.22.95.15/32 */, 32, NDPI_PROTOCOL_VIBER }, + { 0x3640BFF0 /* 54.64.191.240/28 */, 28, NDPI_PROTOCOL_VIBER }, + { 0x3655545D /* 54.85.84.93/32 */, 32, NDPI_PROTOCOL_VIBER }, + { 0x3655565D /* 54.85.86.93/32 */, 32, NDPI_PROTOCOL_VIBER }, + { 0x36A5FFD0 /* 54.165.255.208/28 */, 28, NDPI_PROTOCOL_VIBER }, + { 0x36A5FFE0 /* 54.165.255.224/27 */, 27, NDPI_PROTOCOL_VIBER }, + { 0x36DBBFA0 /* 54.219.191.160/28 */, 28, NDPI_PROTOCOL_VIBER }, + { 0x36E8FB90 /* 54.232.251.144/28 */, 28, NDPI_PROTOCOL_VIBER }, + + /* AnyDesk + TODO: are we able to autogenerate this list? + */ + { 0x3353EF8E /* 51.83.239.142/31 */, 31, NDPI_PROTOCOL_ANYDESK }, + { 0x3353EF90 /* 51.83.239.144/31 */, 31, NDPI_PROTOCOL_ANYDESK }, + { 0x3353EEC8 /* 51.83.238.200/29 */, 29, NDPI_PROTOCOL_ANYDESK }, + { 0x3353EED0 /* 51.83.238.208/29 */, 29, NDPI_PROTOCOL_ANYDESK }, + { 0x3353EED8 /* 51.83.238.216/30 */, 30, NDPI_PROTOCOL_ANYDESK }, + { 0x3353EEDC /* 51.83.238.220/31 */, 31, NDPI_PROTOCOL_ANYDESK }, + /* From support.anydesk.com/knowledge/firewall */ + { 0xEFFF6612 /* 239.255.102.18/32 */, 32, NDPI_PROTOCOL_ANYDESK }, + + /* + * Edgecast CDN + * Uses captcha to prevent web scraping. + * https://support.globaldots.com/hc/en-us/articles/115004003849-Edgecast-IP-addresses + */ + { 0x6CA1F000 /* 108.161.240.0/20 */, 20, NDPI_PROTOCOL_EDGECAST }, + { 0x6EE8B000 /* 110.232.176.0/22 */, 22, NDPI_PROTOCOL_EDGECAST }, + { 0x7567B700 /* 117.103.183.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0x7512E800 /* 117.18.232.0/21 */, 21, NDPI_PROTOCOL_EDGECAST }, + { 0x79BD2E00 /* 121.189.46.0/23 */, 23, NDPI_PROTOCOL_EDGECAST }, + { 0xB4F0B800 /* 180.240.184.0/24 */, 24, NDPI_PROTOCOL_EDGECAST }, + { 0xC0100000 /* 192.16.0.0/18 */, 18, NDPI_PROTOCOL_EDGECAST }, + { 0xC0E58000 /* 192.229.128.0/17 */, 17, NDPI_PROTOCOL_EDGECAST }, + { 0xC01E0000 /* 192.30.0.0/19 */, 19, NDPI_PROTOCOL_EDGECAST }, + { 0xC2FFD240 /* 194.255.210.64/26 */, 26, NDPI_PROTOCOL_EDGECAST }, + { 0xC6071000 /* 198.7.16.0/20 */, 20, NDPI_PROTOCOL_EDGECAST }, + { 0xCB4A0440 /* 203.74.4.64/26 */, 26, NDPI_PROTOCOL_EDGECAST }, + { 0xD540EA00 /* 213.64.234.0/26 */, 26, NDPI_PROTOCOL_EDGECAST }, + { 0x2E164000 /* 46.22.64.0/20 */, 20, NDPI_PROTOCOL_EDGECAST }, + { 0x05684000 /* 5.104.64.0/21 */, 21, NDPI_PROTOCOL_EDGECAST }, + { 0x44E82000 /* 68.232.32.0/20 */, 20, NDPI_PROTOCOL_EDGECAST }, + { 0x48155000 /* 72.21.80.0/20 */, 20, NDPI_PROTOCOL_EDGECAST }, + { 0x58C22D80 /* 88.194.45.128/26 */, 26, NDPI_PROTOCOL_EDGECAST }, + { 0x5DB8D000 /* 93.184.208.0/20 */, 20, NDPI_PROTOCOL_EDGECAST }, + + /* + TODO + + Salesforce + https://help.salesforce.com/s/articleView?id=000321501&type=1 + */ + + /* + GoTo products (mainly GoToMeeting) + Some of the IPs reported at + https://support.goto.com/connect/help/what-are-gotoconnects-ip-blocks-gotoconnect-gotoconnects-ip-blocks + are not present in the GoTo/LogMeIn/Citrix ASn + To be extra safe, add here the entire list. + TODO: are we able to autogenerate this list? + */ + { 0xC724F800 /* 199.36.248.0/22 */, 22, NDPI_PROTOCOL_GOTO }, + { 0xC7577800 /* 199.87.120.0/22 */, 22, NDPI_PROTOCOL_GOTO }, + { 0xA2FA3C00 /* 162.250.60.0/22 */, 22, NDPI_PROTOCOL_GOTO }, + { 0x2D0CC400 /* 45.12.196.0/22 */, 22, NDPI_PROTOCOL_GOTO }, + { 0xCAAD1800 /* 202.173.24.0/21 */, 21, NDPI_PROTOCOL_GOTO }, + { 0xADC70000 /* 173.199.0.0/18 */, 18, NDPI_PROTOCOL_GOTO }, + { 0x17EFE000 /* 23.239.224.0/19 */, 19, NDPI_PROTOCOL_GOTO }, + +#ifdef CUSTOM_NDPI_PROTOCOLS +#include "../../../nDPI-custom/custom_ndpi_content_match_host_protocol_list.c.inc" +#endif + + /* End */ + { 0x0, 0, 0 } +}; + + +/* ****************************************************** */ + +/* + Host-based match + + HTTP: Server: field + HTTPS: Server certificate name + + Risk classification criteria + ---------------------------- + + NDPI_PROTOCOL_SAFE + - Web sites (and CDNs) which are not commonly used to host malicious activities. + - OS update hosts. + - App stores. + - Commonly used services with passwords in encrypted channels (SMTPS, POPS, etc) + + NDPI_PROTOCOL_ACCEPTABLE + - Cloud services may be used to host malware (e.g., https://www.fireeye.com/blog/threat-research/2015/11/china-based-threat.html), + but it is mostly used for normal purposes. + - Webmail sites, which can be used to phising. + - Encrypted administrative protocols, such as SSH. + - Text, voice or video communication (e.g., Skype, Slack, Whatsapp). + - Ads services are commonly used to spread malware + (https://www.tripwire.com/state-of-security/security-data-protection/crypto-ransomware-spreads-via-poisoned-ads-on-major-websites/) + + NDPI_PROTOCOL_FUN + - Social media sites and services. + - Communication used for fun purposes, like Snapchat, Tinder, etc. + - Audio and videostreamming services (e.g., Netflix). + - Game services. + + NDPI_PROTOCOL_UNSAFE + - Unencrypted administrative protocols, such as Telnet. + - Cloud hosted servers when accessed by default domains, such as *.amazonaws.com. + - "AWS Supports 41% of Malware Hosting Sites, More than Any Other Web Host or ISP" + http://www.thewhir.com/web-hosting-news/aws-supports-41-malware-hosting-sites-web-host-isp + - https://www.scmagazine.com/600-plus-cloud-repositories-spotted-hosting-malware-and-malicious-files/article/572205/ + - https://howtoremove.guide/remove-s3-amazonaws-virus/ + - Torrents. + - Commonly used services with passwords in unencrypted channels (SMTP, POP, etc) + + NDPI_PROTOCOL_POTENTIALLY_DANGEROUS + - Tor and other anonymization access. + - Sites commonly used to host malware and not as commonly used by "normal" users. (e.g., pastebin.com) + https://isc.sans.edu/forums/diary/Many+Malware+Samples+Found+on+Pastebin/22036/ + + NDPI_PROTOCOL_UNRATED + - Avoid this class. + +*/ + +/* ****************************************************** */ + +static ndpi_protocol_match host_match[] = + { + { "dmqdd6hw24ucf.cloudfront.net", "AmazonVideo", NDPI_PROTOCOL_AMAZON_VIDEO, NDPI_PROTOCOL_CATEGORY_VIDEO, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "d25xi40x97liuc.cloudfront.net", "AmazonVideo", NDPI_PROTOCOL_AMAZON_VIDEO, NDPI_PROTOCOL_CATEGORY_VIDEO, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".aiv-delivery.net", "AmazonVideo", NDPI_PROTOCOL_AMAZON_VIDEO, NDPI_PROTOCOL_CATEGORY_VIDEO, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".aiv-cdn.net", "AmazonVideo", NDPI_PROTOCOL_AMAZON_VIDEO, NDPI_PROTOCOL_CATEGORY_VIDEO, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "1s3.lvlt.dash.us.aiv-cdn.net.c.footprint.net", "AmazonVideo", NDPI_PROTOCOL_AMAZON_VIDEO, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".s.loris.llnwd.net", "AmazonVideo", NDPI_PROTOCOL_AMAZON_VIDEO, NDPI_PROTOCOL_CATEGORY_VIDEO, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "atv-ext.amazon.com", "AmazonVideo", NDPI_PROTOCOL_AMAZON_VIDEO, NDPI_PROTOCOL_CATEGORY_VIDEO, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "atv-ps.amazon.com", "AmazonVideo", NDPI_PROTOCOL_AMAZON_VIDEO, NDPI_PROTOCOL_CATEGORY_VIDEO, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".media-amazon.com", "AmazonVideo", NDPI_PROTOCOL_AMAZON_VIDEO, NDPI_PROTOCOL_CATEGORY_VIDEO, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".amazonvideo.com", "AmazonVideo", NDPI_PROTOCOL_AMAZON_VIDEO, NDPI_PROTOCOL_CATEGORY_VIDEO, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".primevideo.com", "AmazonVideo", NDPI_PROTOCOL_AMAZON_VIDEO, NDPI_PROTOCOL_CATEGORY_VIDEO, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "amazon.", "Amazon", NDPI_PROTOCOL_AMAZON, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "amazon.com", "Amazon", NDPI_PROTOCOL_AMAZON, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "images-amazon.com", "Amazon", NDPI_PROTOCOL_AMAZON, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "ssl-images-amazon.com", "Amazon", NDPI_PROTOCOL_AMAZON, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "amazonaws.com", "AmazonAWS", NDPI_PROTOCOL_AMAZON_AWS, NDPI_PROTOCOL_CATEGORY_CLOUD, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "amazon-adsystem.com", "Amazon", NDPI_PROTOCOL_AMAZON, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".aws.", "AmazonAWS", NDPI_PROTOCOL_AMAZON_AWS, NDPI_PROTOCOL_CATEGORY_CLOUD, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".cloudfront.net", "AmazonAWS", NDPI_PROTOCOL_AMAZON_AWS, NDPI_PROTOCOL_CATEGORY_CLOUD, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".us-west-2.compute.amazonaws.com", "AmazonAWS", NDPI_PROTOCOL_AMAZON_AWS, NDPI_PROTOCOL_CATEGORY_CLOUD, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".teamviewer.com", "Teamviewer", NDPI_PROTOCOL_TEAMVIEWER, NDPI_PROTOCOL_CATEGORY_REMOTE_ACCESS, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".bloombergvault.com", "Bloomberg", NDPI_PROTOCOL_BLOOMBERG, NDPI_PROTOCOL_CATEGORY_CLOUD, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".bloomberg.com", "Bloomberg", NDPI_PROTOCOL_BLOOMBERG, NDPI_PROTOCOL_CATEGORY_CLOUD, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".salesforce.com", "Salesforce", NDPI_PROTOCOL_SALESFORCE, NDPI_PROTOCOL_CATEGORY_CLOUD, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".apple-dns.net", "Apple", NDPI_PROTOCOL_APPLE, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "origin-apple.com.akadns.net", "Apple", NDPI_PROTOCOL_APPLE, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "e6858.dsce9.akamaiedge.net", "Apple", NDPI_PROTOCOL_APPLE, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".mzstatic.com", "Apple", NDPI_PROTOCOL_APPLE, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "aaplimg.com", "Apple", NDPI_PROTOCOL_APPLE, NDPI_PROTOCOL_CATEGORY_SW_UPDATE, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".apple.com", "Apple", NDPI_PROTOCOL_APPLE, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".apple.news", "Apple", NDPI_PROTOCOL_APPLE, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".cdn-apple.com", "Apple", NDPI_PROTOCOL_APPLE, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".ls4-apple.com", "Apple", NDPI_PROTOCOL_APPLE, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".gc-apple.com", "Apple", NDPI_PROTOCOL_APPLE, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".ls-apple.com", "Apple", NDPI_PROTOCOL_APPLE, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".apple-cloudkit.com", "Apple", NDPI_PROTOCOL_APPLE, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "captive.apple.com", "Apple", NDPI_PROTOCOL_APPLE, NDPI_PROTOCOL_CATEGORY_CONNECTIVITY_CHECK, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "captive.apple.com.", "Apple", NDPI_PROTOCOL_APPLE, NDPI_PROTOCOL_CATEGORY_CONNECTIVITY_CHECK, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, /* apple.com.edgekey.net */ + { "gsp1.apple.com", "Apple", NDPI_PROTOCOL_APPLE, NDPI_PROTOCOL_CATEGORY_CONNECTIVITY_CHECK, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".push.apple.com", "ApplePush", NDPI_PROTOCOL_APPLE_PUSH, NDPI_PROTOCOL_CATEGORY_CLOUD, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "push-apple.com", "ApplePush", NDPI_PROTOCOL_APPLE_PUSH, NDPI_PROTOCOL_CATEGORY_CLOUD, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".icloud.com", "AppleiCloud", NDPI_PROTOCOL_APPLE_ICLOUD, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".icloud.com.", "AppleiCloud", NDPI_PROTOCOL_APPLE_ICLOUD, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, /* icloud.com.akadns.net */ + { ".me.com", "AppleiCloud", NDPI_PROTOCOL_APPLE_ICLOUD, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".icloud-content.com", "AppleiCloud", NDPI_PROTOCOL_APPLE_ICLOUD, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "iosapps.itunes.apple.com", "AppleStore", NDPI_PROTOCOL_APPLESTORE, NDPI_PROTOCOL_CATEGORY_SW_UPDATE, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, /* iOS */ + { "osxapps.itunes.apple.com", "AppleStore", NDPI_PROTOCOL_APPLESTORE, NDPI_PROTOCOL_CATEGORY_SW_UPDATE, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, /* MacOS */ + { "buy.itunes.apple.com", "AppleStore", NDPI_PROTOCOL_APPLESTORE, NDPI_PROTOCOL_CATEGORY_SW_UPDATE, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "su.itunes.apple.com", "AppleStore", NDPI_PROTOCOL_APPLESTORE, NDPI_PROTOCOL_CATEGORY_SW_UPDATE, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "se.itunes.apple.com", "AppleStore", NDPI_PROTOCOL_APPLESTORE, NDPI_PROTOCOL_CATEGORY_SW_UPDATE, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "myapp.itunes.apple.com", "AppleStore", NDPI_PROTOCOL_APPLESTORE, NDPI_PROTOCOL_CATEGORY_SW_UPDATE, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "swscan.apple.com", "AppleStore", NDPI_PROTOCOL_APPLESTORE, NDPI_PROTOCOL_CATEGORY_SW_UPDATE, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "itunes-apple.com", "AppleStore", NDPI_PROTOCOL_APPLESTORE, NDPI_PROTOCOL_CATEGORY_SW_UPDATE, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "itunes.apple.com", "AppleiTunes", NDPI_PROTOCOL_APPLE_ITUNES, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "tlnk.io", "AppleiTunes", NDPI_PROTOCOL_APPLE_ITUNES, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "guzzoni.apple.", "AppleSiri", NDPI_PROTOCOL_APPLE_SIRI, NDPI_PROTOCOL_CATEGORY_VIRTUAL_ASSISTANT, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".wbagora.com", "Playstation", NDPI_PROTOCOL_PLAYSTATION, NDPI_PROTOCOL_CATEGORY_GAME, NDPI_PROTOCOL_UNRATED, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".wbplay.com", "Playstation", NDPI_PROTOCOL_PLAYSTATION, NDPI_PROTOCOL_CATEGORY_GAME, NDPI_PROTOCOL_UNRATED, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".xbox.com", "Xbox", NDPI_PROTOCOL_XBOX, NDPI_PROTOCOL_CATEGORY_GAME, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".xboxlive.com", "Xbox", NDPI_PROTOCOL_XBOX, NDPI_PROTOCOL_CATEGORY_GAME, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".xboxlive.com.akadns.net", "Xbox", NDPI_PROTOCOL_XBOX, NDPI_PROTOCOL_CATEGORY_GAME, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".xboxlive.com.c.footprint.net", "Xbox", NDPI_PROTOCOL_XBOX, NDPI_PROTOCOL_CATEGORY_GAME, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "e13555.b.akamaiedge.net", "Playstation", NDPI_PROTOCOL_PLAYSTATION, NDPI_PROTOCOL_CATEGORY_GAME, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "e1800.d.akamaiedge.net", "Playstation", NDPI_PROTOCOL_PLAYSTATION, NDPI_PROTOCOL_CATEGORY_GAME, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "e1879.e7.akamaiedge.net", "Playstation", NDPI_PROTOCOL_PLAYSTATION, NDPI_PROTOCOL_CATEGORY_GAME, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { ".cnn.com", "CNN", NDPI_PROTOCOL_CNN, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".cnn.net", "CNN", NDPI_PROTOCOL_CNN, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { ".dropbox.com", "DropBox", NDPI_PROTOCOL_DROPBOX, NDPI_PROTOCOL_CATEGORY_CLOUD, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".dropboxstatic.com", "DropBox", NDPI_PROTOCOL_DROPBOX, NDPI_PROTOCOL_CATEGORY_CLOUD, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".dropbox-dns.com", "DropBox", NDPI_PROTOCOL_DROPBOX, NDPI_PROTOCOL_CATEGORY_CLOUD, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "log.getdropbox.com", "DropBox", NDPI_PROTOCOL_DROPBOX, NDPI_PROTOCOL_CATEGORY_CLOUD, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".dropboxapi.com", "DropBox", NDPI_PROTOCOL_DROPBOX, NDPI_PROTOCOL_CATEGORY_CLOUD, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { ".ebay.", "eBay", NDPI_PROTOCOL_EBAY, NDPI_PROTOCOL_CATEGORY_SHOPPING, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, /* or FUN */ + { ".ebay.com", "eBay", NDPI_PROTOCOL_EBAY, NDPI_PROTOCOL_CATEGORY_SHOPPING, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".ebaystatic.com", "eBay", NDPI_PROTOCOL_EBAY, NDPI_PROTOCOL_CATEGORY_SHOPPING, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".ebaydesc.com", "eBay", NDPI_PROTOCOL_EBAY, NDPI_PROTOCOL_CATEGORY_SHOPPING, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".ebayrtm.com", "eBay", NDPI_PROTOCOL_EBAY, NDPI_PROTOCOL_CATEGORY_SHOPPING, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".ebaystratus.com", "eBay", NDPI_PROTOCOL_EBAY, NDPI_PROTOCOL_CATEGORY_SHOPPING, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".ebayimg.com", "eBay", NDPI_PROTOCOL_EBAY, NDPI_PROTOCOL_CATEGORY_SHOPPING, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + /* Detected "instagram.c10r.facebook.com". Omitted "*amazonaws.com" and "*facebook.com" CDNs e.g. "ig-telegraph-shv-04-frc3.facebook.com" */ + { ".instagram.", "Instagram", NDPI_PROTOCOL_INSTAGRAM, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "instagram.", "Instagram", NDPI_PROTOCOL_INSTAGRAM, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, 15 }, + { ".cdninstagram.com", "Instagram", NDPI_PROTOCOL_INSTAGRAM, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "igcdn-photos-", "Instagram", NDPI_PROTOCOL_INSTAGRAM, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "instagramimages-", "Instagram", NDPI_PROTOCOL_INSTAGRAM, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "instagramstatic-", "Instagram", NDPI_PROTOCOL_INSTAGRAM, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "facebook.com", "Facebook", NDPI_PROTOCOL_FACEBOOK, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".facebook.net", "Facebook", NDPI_PROTOCOL_FACEBOOK, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "fbstatic-a.akamaihd.net", "Facebook", NDPI_PROTOCOL_FACEBOOK, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".fbcdn.net", "Facebook", NDPI_PROTOCOL_FACEBOOK, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "fbcdn-", "Facebook", NDPI_PROTOCOL_FACEBOOK, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".fbsbx.com", "Facebook", NDPI_PROTOCOL_FACEBOOK, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".fbwat.ch", "Facebook", NDPI_PROTOCOL_FACEBOOK, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".fb.com", "Facebook", NDPI_PROTOCOL_FACEBOOK, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".fb.gg", "Facebook", NDPI_PROTOCOL_FACEBOOK, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "speedtest.", "Ookla", NDPI_PROTOCOL_OOKLA, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".ooklaserver.net", "Ookla", NDPI_PROTOCOL_OOKLA, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "ntop.org", "ntop", NDPI_PROTOCOL_NTOP, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "docs.googleusercontent.com", "GoogleDocs", NDPI_PROTOCOL_GOOGLE_DOCS, NDPI_PROTOCOL_CATEGORY_COLLABORATIVE, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "docs.google.com", "GoogleDocs", NDPI_PROTOCOL_GOOGLE_DOCS, NDPI_PROTOCOL_CATEGORY_COLLABORATIVE, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "drive-thirdparty.googleusercontent.com", "GoogleDrive", NDPI_PROTOCOL_GOOGLE_DRIVE, NDPI_PROTOCOL_CATEGORY_CLOUD, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "drive.google.com", "GoogleDrive", NDPI_PROTOCOL_GOOGLE_DRIVE, NDPI_PROTOCOL_CATEGORY_CLOUD, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "android.clients.google.com", "PlayStore", NDPI_PROTOCOL_PLAYSTORE, NDPI_PROTOCOL_CATEGORY_SW_UPDATE, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + /* + https://www.fastvue.co/sophos/blog/google-data-saver-affect-security-confidentiality-reporting/ + Used by Google Chrome Lite Mode for Android + + This traffic will bypass checks and blocks as it will include all the communications from/to + the browser instead of using the standard communication mechanisms SSL/HTTP(S)/DNS + + https://github.com/curl/curl/wiki/DNS-over-HTTPS + */ + { ".googlezip.net", "DataSaver", NDPI_PROTOCOL_DATASAVER, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "datasaver.googleapis.com", "DataSaver", NDPI_PROTOCOL_DATASAVER, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + /* http://check.googlezip.net/connect [check browser connectivity] */ + // { ".googlezip.net", "Google", NDPI_PROTOCOL_GOOGLE, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + /* + https://github.com/bambenek/block-doh/blob/master/db.doh-redirect + https://github.com/curl/curl/wiki/DNS-over-HTTPS + */ + { "dns.google", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "dns.google.com", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "mozilla.cloudflare-dns.com", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, /* Firefox */ + { "cloudflare-dns.com", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "commons.host", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "doh.libredns.gr", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "dns9.quad9.net", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "doh.opendns.com", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "doh.dns.sb", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "doh.netweaver.uk", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "dns.dns-over-https.com", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "jp.tiarap.org", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "dns.dnsoverhttps.net", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "doh.powerdns.org", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "adblock.mydns.network", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "jp.tiar.app", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "doh.crypto.sx", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "dns.quad9.net", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "dns.containerpi.com", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "ibksturm.synology.me", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "doh.captnemo.in", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "dns.rubyfish.cn", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "doh.42l.fr", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "dns-family.adguard.com", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "appliedprivacy.net", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "doh.cleanbrowsing.org", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "dns10.quad9.net", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "doh-ch.blahdns.com", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "doh.seby.io", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "dns.adguard.com", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "ibuki.cgnat.net", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "jcdns.fun", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "doh-2.seby.io", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "doh.tiar.app", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "doh.dnswarden.com", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "doh-de.blahdns.com", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "doh-jp.blahdns.com", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "doh.appliedprivacy.net", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "doh.tiarap.org", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "doh.armadillodns.net", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "dns-nyc.aaflalo.me", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "dns.aa.net.uk", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "dns.aaflalo.me", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "dns11.quad9.net", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "dns.nextdns.io", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "doh.securedns.eu", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "rdns.faelix.net", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "captnemo.in", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "dns.dnshome.de", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "doh.dnslify.com", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "resolver-eu.lelux.fi", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "doh.bortzmeyer.fr", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".doh.dns.snopyta.org", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "jarjar.meganerd.nl", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "rumpelsepp.org", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "dnsnl.alekberg.net", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "dnses.alekberg.net", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "dnsse.alekberg.net", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "odvr.nic.cz", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "dns.dnscrypt.ca", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "dns1.dnscrypt.ca", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "dns2.dnscrypt.ca", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "dns.digitale-gesellschaft.ch", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "dns1.digitale-gesellschaft.ch", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "dns.cloudflare.com", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "doh.ffmuc.net", "DoH_DoT", NDPI_PROTOCOL_DOH_DOT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + + /* + See https://better.fyi/trackers/ + + DoubleClick by Google (2mdn.net) + DoubleClick by Google (doubleclick.net) + DoubleClick by Google + Google AdSense by Google (google.com) + Google AdSense by Google (google.se) + Google AdSense by Google (googleadservices.com) + Google Analytics by Google (google-analytics.com) + Google APIs by Google (ajax.googleapis.com) + Google Fonts by Google (fonts.googleapis.com) + Google Interactive Media Ads (imasdk.googleapis.com) + Google Syndication (googlesyndication.com) + Google Tag Manager by Google (googletagmanager.com) + Google Tag Manager by Google (googletagservices.com) + Gstatic by Google (gstatic.com) + */ + + /* Google Advertisements */ + { ".googlesyndication.com", "Google", NDPI_PROTOCOL_GOOGLE, CUSTOM_CATEGORY_ADVERTISEMENT, NDPI_PROTOCOL_TRACKER_ADS, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "googleads.", "Google", NDPI_PROTOCOL_GOOGLE, CUSTOM_CATEGORY_ADVERTISEMENT, NDPI_PROTOCOL_TRACKER_ADS, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".doubleclick.net", "Google", NDPI_PROTOCOL_GOOGLE, CUSTOM_CATEGORY_ADVERTISEMENT, NDPI_PROTOCOL_TRACKER_ADS, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "googleadservices.", "Google", NDPI_PROTOCOL_GOOGLE, CUSTOM_CATEGORY_ADVERTISEMENT, NDPI_PROTOCOL_TRACKER_ADS, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".2mdn.net", "Google", NDPI_PROTOCOL_GOOGLE, CUSTOM_CATEGORY_ADVERTISEMENT, NDPI_PROTOCOL_TRACKER_ADS, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".dmtry.com", "Google", NDPI_PROTOCOL_GOOGLE, CUSTOM_CATEGORY_ADVERTISEMENT, NDPI_PROTOCOL_TRACKER_ADS, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "google-analytics.", "Google", NDPI_PROTOCOL_GOOGLE, CUSTOM_CATEGORY_ADVERTISEMENT, NDPI_PROTOCOL_TRACKER_ADS, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".gvt1.com", "Google", NDPI_PROTOCOL_GOOGLE, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".gvt2.com", "Google", NDPI_PROTOCOL_GOOGLE, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "telephony.goog", "Google", NDPI_PROTOCOL_GOOGLE, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "connectivitycheck.android.com", "Google", NDPI_PROTOCOL_GOOGLE, NDPI_PROTOCOL_CATEGORY_CONNECTIVITY_CHECK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "connectivitycheck.gstatic.com", "Google", NDPI_PROTOCOL_GOOGLE, NDPI_PROTOCOL_CATEGORY_CONNECTIVITY_CHECK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".ampproject.org", "Google", NDPI_PROTOCOL_GOOGLE, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".ampproject.net", "Google", NDPI_PROTOCOL_GOOGLE, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "app-measurement.com", "Google", NDPI_PROTOCOL_GOOGLE, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".app-measurement.com", "Google", NDPI_PROTOCOL_GOOGLE, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + /* Google Hangout */ + { "images2-hangout-opensocial.googleusercontent.com", "GoogleHangout", NDPI_PROTOCOL_HANGOUT_DUO, NDPI_PROTOCOL_CATEGORY_CHAT, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + /* Google Services */ + { "googleapis.com", "GoogleServices", NDPI_PROTOCOL_GOOGLE_SERVICES, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".googletagmanager.com", "GoogleServices", NDPI_PROTOCOL_GOOGLE_SERVICES, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".googletagservices.com", "GoogleServices", NDPI_PROTOCOL_GOOGLE_SERVICES, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "mtalk.google.com", "GoogleServices", NDPI_PROTOCOL_GOOGLE_SERVICES, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "plus.google.com", "GooglePlus", NDPI_PROTOCOL_GOOGLE_PLUS, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "plus.url.google.com", "GooglePlus", NDPI_PROTOCOL_GOOGLE_PLUS, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "googleusercontent.com", "Google", NDPI_PROTOCOL_GOOGLE, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "1e100.net", "Google", NDPI_PROTOCOL_GOOGLE, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "maps.google.", "GoogleMaps", NDPI_PROTOCOL_GOOGLE_MAPS, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "maps.gstatic.com", "GoogleMaps", NDPI_PROTOCOL_GOOGLE_MAPS, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { ".gmail.", "GMail", NDPI_PROTOCOL_GMAIL, NDPI_PROTOCOL_CATEGORY_MAIL, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "inbox.google.com", "GMail", NDPI_PROTOCOL_GMAIL, NDPI_PROTOCOL_CATEGORY_MAIL, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "mail.google.", "GMail", NDPI_PROTOCOL_GMAIL, NDPI_PROTOCOL_CATEGORY_MAIL, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "google.com", "Google", NDPI_PROTOCOL_GOOGLE, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "google.", "Google", NDPI_PROTOCOL_GOOGLE, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".google.", "Google", NDPI_PROTOCOL_GOOGLE, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".gstatic.com", "Google", NDPI_PROTOCOL_GOOGLE, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "gstatic.com", "Google", NDPI_PROTOCOL_GOOGLE, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "ggpht.com", "Google", NDPI_PROTOCOL_GOOGLE, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { ".goog", "Google", NDPI_PROTOCOL_GOOGLE, NDPI_PROTOCOL_CATEGORY_CLOUD, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "outlook.com", "Outlook", NDPI_PROTOCOL_MS_OUTLOOK, NDPI_PROTOCOL_CATEGORY_MAIL, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "hotmail.com", "Outlook", NDPI_PROTOCOL_MS_OUTLOOK, NDPI_PROTOCOL_CATEGORY_MAIL, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { ".last.fm", "LastFM", NDPI_PROTOCOL_LASTFM, NDPI_PROTOCOL_CATEGORY_MUSIC, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "netflix.com", "NetFlix", NDPI_PROTOCOL_NETFLIX, NDPI_PROTOCOL_CATEGORY_VIDEO, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "nflxext.com", "NetFlix", NDPI_PROTOCOL_NETFLIX, NDPI_PROTOCOL_CATEGORY_VIDEO, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "nflximg.com", "NetFlix", NDPI_PROTOCOL_NETFLIX, NDPI_PROTOCOL_CATEGORY_VIDEO, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "nflximg.net", "NetFlix", NDPI_PROTOCOL_NETFLIX, NDPI_PROTOCOL_CATEGORY_VIDEO, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "nflxvideo.net", "NetFlix", NDPI_PROTOCOL_NETFLIX, NDPI_PROTOCOL_CATEGORY_VIDEO, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "nflxso.net", "NetFlix", NDPI_PROTOCOL_NETFLIX, NDPI_PROTOCOL_CATEGORY_VIDEO, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "fast.com", "NetFlix", NDPI_PROTOCOL_NETFLIX, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { ".skype.", "Skype_Teams", NDPI_PROTOCOL_SKYPE_TEAMS, NDPI_PROTOCOL_CATEGORY_VOIP, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".skypeassets.", "Skype_Teams", NDPI_PROTOCOL_SKYPE_TEAMS, NDPI_PROTOCOL_CATEGORY_VOIP, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".skypedata.", "Skype_Teams", NDPI_PROTOCOL_SKYPE_TEAMS, NDPI_PROTOCOL_CATEGORY_VOIP, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".skypeecs-", "Skype_Teams", NDPI_PROTOCOL_SKYPE_TEAMS, NDPI_PROTOCOL_CATEGORY_VOIP, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".skypeforbusiness.", "Skype_Teams", NDPI_PROTOCOL_SKYPE_TEAMS, NDPI_PROTOCOL_CATEGORY_VOIP, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".lync.com", "Skype_Teams", NDPI_PROTOCOL_SKYPE_TEAMS, NDPI_PROTOCOL_CATEGORY_VOIP, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "e7768.b.akamaiedge.net", "Skype_Teams", NDPI_PROTOCOL_SKYPE_TEAMS, NDPI_PROTOCOL_CATEGORY_VOIP, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "e4593.dspg.akamaiedge.net", "Skype_Teams", NDPI_PROTOCOL_SKYPE_TEAMS, NDPI_PROTOCOL_CATEGORY_VOIP, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "e4593.g.akamaiedge.net", "Skype_Teams", NDPI_PROTOCOL_SKYPE_TEAMS, NDPI_PROTOCOL_CATEGORY_VOIP, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "*.gateway.messenger.live.com", "Skype_Teams", NDPI_PROTOCOL_SKYPE_TEAMS, NDPI_PROTOCOL_CATEGORY_VOIP, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "teams.live.com", "Skype_Teams", NDPI_PROTOCOL_SKYPE_TEAMS, NDPI_PROTOCOL_CATEGORY_VOIP, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "skype-calling-missedcallsregistrar-", "Skype_Teams", NDPI_PROTOCOL_SKYPE_TEAMS, NDPI_PROTOCOL_CATEGORY_VOIP, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "teams.cloudapp.net", "Skype_Teams", NDPI_PROTOCOL_SKYPE_TEAMS, NDPI_PROTOCOL_CATEGORY_VOIP, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { ".tuenti.com", "Tuenti", NDPI_PROTOCOL_TUENTI, NDPI_PROTOCOL_CATEGORY_VOIP, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { ".twttr.com", "Twitter", NDPI_PROTOCOL_TWITTER, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "twitter.", "Twitter", NDPI_PROTOCOL_TWITTER, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "twimg.com", "Twitter", NDPI_PROTOCOL_TWITTER, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN , NDPI_PROTOCOL_DEFAULT_LEVEL}, + { "t.co", "Twitter", NDPI_PROTOCOL_TWITTER, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN , NDPI_PROTOCOL_DEFAULT_LEVEL}, + + { ".viber.com", "Viber", NDPI_PROTOCOL_VIBER, NDPI_PROTOCOL_CATEGORY_CHAT, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".cdn.viber.com", "Viber", NDPI_PROTOCOL_VIBER, NDPI_PROTOCOL_CATEGORY_CHAT, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".viber.it", "Viber", NDPI_PROTOCOL_VIBER, NDPI_PROTOCOL_CATEGORY_CHAT, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "wikipedia.", "Wikipedia", NDPI_PROTOCOL_WIKIPEDIA, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "wikimedia.", "Wikipedia", NDPI_PROTOCOL_WIKIPEDIA, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "mediawiki.", "Wikipedia", NDPI_PROTOCOL_WIKIPEDIA, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "wikimediafoundation.", "Wikipedia", NDPI_PROTOCOL_WIKIPEDIA, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "mmg-fna.whatsapp.net", "WhatsAppFiles", NDPI_PROTOCOL_WHATSAPP_FILES, NDPI_PROTOCOL_CATEGORY_DOWNLOAD_FT, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".fna.whatsapp.net", "WhatsAppFiles", NDPI_PROTOCOL_WHATSAPP_FILES, NDPI_PROTOCOL_CATEGORY_DOWNLOAD_FT, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".cdn.whatsapp.net", "WhatsAppFiles", NDPI_PROTOCOL_WHATSAPP_FILES, NDPI_PROTOCOL_CATEGORY_DOWNLOAD_FT, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "mms.whatsapp.net", "WhatsAppFiles", NDPI_PROTOCOL_WHATSAPP_FILES, NDPI_PROTOCOL_CATEGORY_DOWNLOAD_FT, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".whatsapp.", "WhatsApp", NDPI_PROTOCOL_WHATSAPP, NDPI_PROTOCOL_CATEGORY_CHAT, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "g.whatsapp.net", "WhatsApp", NDPI_PROTOCOL_WHATSAPP, NDPI_PROTOCOL_CATEGORY_CHAT, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "v.whatsapp.net", "WhatsApp", NDPI_PROTOCOL_WHATSAPP, NDPI_PROTOCOL_CATEGORY_CHAT, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "mmg.whatsapp.net", "WhatsApp", NDPI_PROTOCOL_WHATSAPP, NDPI_PROTOCOL_CATEGORY_CHAT, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { ".yahoo.", "Yahoo", NDPI_PROTOCOL_YAHOO, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".yimg.com", "Yahoo", NDPI_PROTOCOL_YAHOO, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "yahooapis.", "Yahoo", NDPI_PROTOCOL_YAHOO, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "upload.youtube.com", "YouTubeUpload", NDPI_PROTOCOL_YOUTUBE_UPLOAD, NDPI_PROTOCOL_CATEGORY_MEDIA, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "upload.video.google.com", "YouTubeUpload", NDPI_PROTOCOL_YOUTUBE_UPLOAD, NDPI_PROTOCOL_CATEGORY_MEDIA, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "youtubei.googleapis.com", "YouTube", NDPI_PROTOCOL_YOUTUBE, NDPI_PROTOCOL_CATEGORY_MEDIA, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "youtube.", "YouTube", NDPI_PROTOCOL_YOUTUBE, NDPI_PROTOCOL_CATEGORY_MEDIA, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "youtu.be", "YouTube", NDPI_PROTOCOL_YOUTUBE, NDPI_PROTOCOL_CATEGORY_MEDIA, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "yt3.ggpht.com", "YouTube", NDPI_PROTOCOL_YOUTUBE, NDPI_PROTOCOL_CATEGORY_MEDIA, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".googlevideo.com", "YouTube", NDPI_PROTOCOL_YOUTUBE, NDPI_PROTOCOL_CATEGORY_MEDIA, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".ytimg.com", "YouTube", NDPI_PROTOCOL_YOUTUBE, NDPI_PROTOCOL_CATEGORY_MEDIA, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "youtube-nocookie.", "YouTube", NDPI_PROTOCOL_YOUTUBE, NDPI_PROTOCOL_CATEGORY_MEDIA, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".youtube-ui.l.google.com", "YouTube", NDPI_PROTOCOL_YOUTUBE, NDPI_PROTOCOL_CATEGORY_MEDIA, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".youtubeeducation.com", "YouTube", NDPI_PROTOCOL_YOUTUBE, NDPI_PROTOCOL_CATEGORY_MEDIA, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { ".vevo.com", "Vevo", NDPI_PROTOCOL_VEVO, NDPI_PROTOCOL_CATEGORY_MUSIC, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { ".spotify.com", "Spotify", NDPI_PROTOCOL_SPOTIFY, NDPI_PROTOCOL_CATEGORY_MUSIC, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".scdn.co", "Spotify", NDPI_PROTOCOL_SPOTIFY, NDPI_PROTOCOL_CATEGORY_MUSIC, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".pscdn.co", "Spotify", NDPI_PROTOCOL_SPOTIFY, NDPI_PROTOCOL_CATEGORY_MUSIC, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "spotifycdn.net", "Spotify", NDPI_PROTOCOL_SPOTIFY, NDPI_PROTOCOL_CATEGORY_MUSIC, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "spotifycdn.com", "Spotify", NDPI_PROTOCOL_SPOTIFY, NDPI_PROTOCOL_CATEGORY_MUSIC, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "audio4-ak-spotify-com.akamaized.net", "Spotify", NDPI_PROTOCOL_SPOTIFY, NDPI_PROTOCOL_CATEGORY_MUSIC, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "audio-ak-spotify-com.akamaized.net", "Spotify", NDPI_PROTOCOL_SPOTIFY, NDPI_PROTOCOL_CATEGORY_MUSIC, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "heads-ak-spotify-com.akamaized.net", "Spotify", NDPI_PROTOCOL_SPOTIFY, NDPI_PROTOCOL_CATEGORY_MUSIC, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "spotify-com.akamaized.net", "Spotify", NDPI_PROTOCOL_SPOTIFY, NDPI_PROTOCOL_CATEGORY_MUSIC, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "spotify.com.edgesuite.net", "Spotify", NDPI_PROTOCOL_SPOTIFY, NDPI_PROTOCOL_CATEGORY_MUSIC, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "spotify.map.fastly.net", "Spotify", NDPI_PROTOCOL_SPOTIFY, NDPI_PROTOCOL_CATEGORY_MUSIC, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "spotify.edgekey.net", "Spotify", NDPI_PROTOCOL_SPOTIFY, NDPI_PROTOCOL_CATEGORY_MUSIC, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "spotify.demdex.net", "Spotify", NDPI_PROTOCOL_SPOTIFY, NDPI_PROTOCOL_CATEGORY_MUSIC, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".spotilocal.com", "Spotify", NDPI_PROTOCOL_SPOTIFY, NDPI_PROTOCOL_CATEGORY_MUSIC, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + + { "edge-mqtt.facebook.com", "Messenger", NDPI_PROTOCOL_MESSENGER, NDPI_PROTOCOL_CATEGORY_CHAT, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "mqtt-mini.facebook.com", "Messenger", NDPI_PROTOCOL_MESSENGER, NDPI_PROTOCOL_CATEGORY_CHAT, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, /* Messenger Lite */ + { "messenger.com", "Messenger", NDPI_PROTOCOL_MESSENGER, NDPI_PROTOCOL_CATEGORY_CHAT, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".m.me", "Messenger", NDPI_PROTOCOL_MESSENGER, NDPI_PROTOCOL_CATEGORY_CHAT, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + /* Pandora */ + { "pandora.com", "Pandora", NDPI_PROTOCOL_PANDORA, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { ".torproject.org", "Tor", NDPI_PROTOCOL_TOR, NDPI_PROTOCOL_CATEGORY_VPN, NDPI_PROTOCOL_POTENTIALLY_DANGEROUS, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { ".kakao.com", "KakaoTalk", NDPI_PROTOCOL_KAKAOTALK, NDPI_PROTOCOL_CATEGORY_CHAT, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "ttvnw.net", "Twitch", NDPI_PROTOCOL_TWITCH, NDPI_PROTOCOL_CATEGORY_VIDEO, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "jtvnw.net", "Twitch", NDPI_PROTOCOL_TWITCH, NDPI_PROTOCOL_CATEGORY_VIDEO, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "twitch.tv", "Twitch", NDPI_PROTOCOL_TWITCH, NDPI_PROTOCOL_CATEGORY_VIDEO, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "twitchcdn.net", "Twitch", NDPI_PROTOCOL_TWITCH, NDPI_PROTOCOL_CATEGORY_VIDEO, NDPI_PROTOCOL_FUN , NDPI_PROTOCOL_DEFAULT_LEVEL}, + { "twitchsvc.net", "Twitch", NDPI_PROTOCOL_TWITCH, NDPI_PROTOCOL_CATEGORY_VIDEO, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".contribute.live-video.net", "Twitch", NDPI_PROTOCOL_TWITCH, NDPI_PROTOCOL_CATEGORY_VIDEO, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { ".qq.com", "QQ", NDPI_PROTOCOL_QQ, NDPI_PROTOCOL_CATEGORY_CHAT, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".gtimg.com", "QQ", NDPI_PROTOCOL_QQ, NDPI_PROTOCOL_CATEGORY_CHAT, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { ".weibo.com", "Sina(Weibo)", NDPI_PROTOCOL_SINA, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".weibo.cn", "Sina(Weibo)", NDPI_PROTOCOL_SINA, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".sinaimg.cn", "Sina", NDPI_PROTOCOL_SINA, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".sinajs.cn", "Sina", NDPI_PROTOCOL_SINA, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".sina.cn", "Sina", NDPI_PROTOCOL_SINA, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".sina.com.cn", "Sina", NDPI_PROTOCOL_SINA, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + /* https://support.cipafilter.com/index.php?/Knowledgebase/Article/View/117/0/snapchat---how-to-block */ + { "feelinsonice.appspot.com", "Snapchat", NDPI_PROTOCOL_SNAPCHAT, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "feelinsonice-hrd.appspot.com", "Snapchat", NDPI_PROTOCOL_SNAPCHAT, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "feelinsonice.com", "Snapchat", NDPI_PROTOCOL_SNAPCHAT, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".snapchat.", "Snapchat", NDPI_PROTOCOL_SNAPCHAT, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".snapads.", "Snapchat", NDPI_PROTOCOL_SNAPCHAT, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".sc-cdn.net", "Snapchat", NDPI_PROTOCOL_SNAPCHAT, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".sc-prod.net", "Snapchat", NDPI_PROTOCOL_SNAPCHAT, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".sc-jpl.com", "Snapchat", NDPI_PROTOCOL_SNAPCHAT, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "sc-analytics.appspot.com", "Snapchat", NDPI_PROTOCOL_SNAPCHAT, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "snap.api.mapbox.com", "Snapchat", NDPI_PROTOCOL_SNAPCHAT, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "cognac-prod.appspot.com", "Snapchat", NDPI_PROTOCOL_SNAPCHAT, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".addlive.io", "Snapchat", NDPI_PROTOCOL_SNAPCHAT, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { ".waze.com", "Waze", NDPI_PROTOCOL_WAZE, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "wazespeechactiviation-pa.googleapis.com", "Waze", NDPI_PROTOCOL_WAZE, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "deezer.com", "Deezer", NDPI_PROTOCOL_DEEZER, NDPI_PROTOCOL_CATEGORY_MUSIC, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + /* Microsoft + Azure */ + { ".wpc.v0cdn.net", "Microsoft", NDPI_PROTOCOL_MICROSOFT, NDPI_PROTOCOL_CATEGORY_CLOUD, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".gfx.ms", "Microsoft", NDPI_PROTOCOL_MICROSOFT, NDPI_PROTOCOL_CATEGORY_CLOUD, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".aka.ms", "Microsoft", NDPI_PROTOCOL_MICROSOFT, NDPI_PROTOCOL_CATEGORY_CLOUD, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".sfx.ms", "Microsoft", NDPI_PROTOCOL_MICROSOFT, NDPI_PROTOCOL_CATEGORY_CLOUD, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".appcenter.ms", "Microsoft", NDPI_PROTOCOL_MICROSOFT, NDPI_PROTOCOL_CATEGORY_CLOUD, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "-msedge.net", "Microsoft", NDPI_PROTOCOL_MICROSOFT, NDPI_PROTOCOL_CATEGORY_CLOUD, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".microsoft.us", "Microsoft", NDPI_PROTOCOL_MICROSOFT, NDPI_PROTOCOL_CATEGORY_CLOUD, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".dynamics.com", "Microsoft", NDPI_PROTOCOL_MICROSOFT, NDPI_PROTOCOL_CATEGORY_CLOUD, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "msftncsi.com", "Microsoft", NDPI_PROTOCOL_MICROSOFT, NDPI_PROTOCOL_CATEGORY_CONNECTIVITY_CHECK, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".windows.net", "Microsoft", NDPI_PROTOCOL_MICROSOFT, NDPI_PROTOCOL_CATEGORY_CLOUD, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".windows.com", "Microsoft", NDPI_PROTOCOL_MICROSOFT, NDPI_PROTOCOL_CATEGORY_CLOUD, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".microsoft.com", "Microsoft", NDPI_PROTOCOL_MICROSOFT, NDPI_PROTOCOL_CATEGORY_CLOUD, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "msn.com", "Microsoft", NDPI_PROTOCOL_MICROSOFT, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".s-msft.com", "Microsoft", NDPI_PROTOCOL_MICROSOFT, NDPI_PROTOCOL_CATEGORY_SYSTEM_OS, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".webtrends.com", "Microsoft", NDPI_PROTOCOL_MICROSOFT, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".msecnd.net", "Microsoft", NDPI_PROTOCOL_MICROSOFT, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "bing.com", "Microsoft", NDPI_PROTOCOL_MICROSOFT, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".visualstudio.com", "Microsoft", NDPI_PROTOCOL_MICROSOFT, NDPI_PROTOCOL_CATEGORY_COLLABORATIVE, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "login.live.com", "Microsoft", NDPI_PROTOCOL_MICROSOFT, NDPI_PROTOCOL_CATEGORY_SYSTEM_OS, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "statics-marketingsites-wcus-ms-com.akamaized.net", "Microsoft", NDPI_PROTOCOL_MICROSOFT, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "statics-marketingsites-eus-ms-com.akamaized.net", "Microsoft", NDPI_PROTOCOL_MICROSOFT, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "img-prod-cms-rt-microsoft-com.akamaized.net", "Microsoft", NDPI_PROTOCOL_MICROSOFT, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "onecollector.cloudapp.aria.akadns.net", "Microsoft", NDPI_PROTOCOL_MICROSOFT, NDPI_PROTOCOL_CATEGORY_CLOUD, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "onecollector.akadns.net", "Microsoft", NDPI_PROTOCOL_MICROSOFT, NDPI_PROTOCOL_CATEGORY_CLOUD, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "microsoft.akadns.net", "Microsoft", NDPI_PROTOCOL_MICROSOFT, NDPI_PROTOCOL_CATEGORY_CLOUD, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "e1723.dscd.akamaiedge.net", "Microsoft", NDPI_PROTOCOL_MICROSOFT, NDPI_PROTOCOL_CATEGORY_CLOUD, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".microsofttranslator.com", "Microsoft", NDPI_PROTOCOL_MICROSOFT, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "sharepointonline.com", "Microsoft", NDPI_PROTOCOL_MICROSOFT, NDPI_PROTOCOL_CATEGORY_CLOUD, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "sharepoint.com", "Microsoft", NDPI_PROTOCOL_MICROSOFT, NDPI_PROTOCOL_CATEGORY_CLOUD, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".msftconnecttest.com", "Microsoft", NDPI_PROTOCOL_MICROSOFT, NDPI_PROTOCOL_CATEGORY_CONNECTIVITY_CHECK, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".windowsmedia.com", "Microsoft", NDPI_PROTOCOL_MICROSOFT, NDPI_PROTOCOL_CATEGORY_SYSTEM_OS, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".windowsphone.com", "Microsoft", NDPI_PROTOCOL_MICROSOFT, NDPI_PROTOCOL_CATEGORY_SYSTEM_OS, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".msa.akadns6.net", "Microsoft", NDPI_PROTOCOL_MICROSOFT, NDPI_PROTOCOL_CATEGORY_CLOUD, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".s-microsoft.com", "Microsoft", NDPI_PROTOCOL_MICROSOFT, NDPI_PROTOCOL_CATEGORY_CLOUD, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".msidentity.com", "Microsoft", NDPI_PROTOCOL_MICROSOFT, NDPI_PROTOCOL_CATEGORY_CLOUD, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".wac.phicdn.net", "Microsoft", NDPI_PROTOCOL_MICROSOFT, NDPI_PROTOCOL_CATEGORY_CLOUD, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".onestore.ms", "Microsoft", NDPI_PROTOCOL_MICROSOFT, NDPI_PROTOCOL_CATEGORY_CLOUD, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".msedge.net", "Microsoft", NDPI_PROTOCOL_MICROSOFT, NDPI_PROTOCOL_CATEGORY_CLOUD, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".mshome.net", "Microsoft", NDPI_PROTOCOL_MICROSOFT, NDPI_PROTOCOL_CATEGORY_CLOUD, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "..msn-com.", "Microsoft", NDPI_PROTOCOL_MICROSOFT, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".-s-msn-com.", "Microsoft", NDPI_PROTOCOL_MICROSOFT, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".s-msn.com", "Microsoft", NDPI_PROTOCOL_MICROSOFT, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".img-s-msn-com.", "Microsoft", NDPI_PROTOCOL_MICROSOFT, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "img-s-msn-com.", "Microsoft", NDPI_PROTOCOL_MICROSOFT, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".location.live.net", "Microsoft", NDPI_PROTOCOL_MICROSOFT, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".virtualearth.net", "Microsoft", NDPI_PROTOCOL_MICROSOFT, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "trafficmanager.net", "Microsoft", NDPI_PROTOCOL_MICROSOFT, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "testconnectivity.microsoft.com", "Microsoft", NDPI_PROTOCOL_MICROSOFT, NDPI_PROTOCOL_CATEGORY_CONNECTIVITY_CHECK, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "teredo.ipv6.microsoft.com", "Microsoft", NDPI_PROTOCOL_MICROSOFT, NDPI_PROTOCOL_CATEGORY_CONNECTIVITY_CHECK, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "teredo.ipv6.microsoft.com.nsatc.net", "Microsoft", NDPI_PROTOCOL_MICROSOFT, NDPI_PROTOCOL_CATEGORY_CONNECTIVITY_CHECK, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { ".azure.com", "Azure", NDPI_PROTOCOL_MICROSOFT_AZURE, NDPI_PROTOCOL_CATEGORY_CLOUD, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".azureedge.us", "Azure", NDPI_PROTOCOL_MICROSOFT_AZURE, NDPI_PROTOCOL_CATEGORY_CLOUD, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".azurefd.us", "Azure", NDPI_PROTOCOL_MICROSOFT_AZURE, NDPI_PROTOCOL_CATEGORY_CLOUD, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".azure-automation.net", "Azure", NDPI_PROTOCOL_MICROSOFT_AZURE, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".azureedge.net", "Azure", NDPI_PROTOCOL_MICROSOFT_AZURE, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "teams.microsoft.com", "Teams", NDPI_PROTOCOL_MSTEAMS, NDPI_PROTOCOL_CATEGORY_COLLABORATIVE, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "teams.microsoft.us", "Teams", NDPI_PROTOCOL_MSTEAMS, NDPI_PROTOCOL_CATEGORY_COLLABORATIVE, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "teams.skype.com", "Teams", NDPI_PROTOCOL_MSTEAMS, NDPI_PROTOCOL_CATEGORY_COLLABORATIVE, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "-teams.cloudapp.net", "Teams", NDPI_PROTOCOL_MSTEAMS, NDPI_PROTOCOL_CATEGORY_COLLABORATIVE, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "teams.trafficmanager.net", "Teams", NDPI_PROTOCOL_MSTEAMS, NDPI_PROTOCOL_CATEGORY_COLLABORATIVE, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "teams-msgapi.trafficmanager.net", "Teams", NDPI_PROTOCOL_MSTEAMS, NDPI_PROTOCOL_CATEGORY_COLLABORATIVE, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "teams.office.net", "Teams", NDPI_PROTOCOL_MSTEAMS, NDPI_PROTOCOL_CATEGORY_COLLABORATIVE, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "teams.office.com", "Teams", NDPI_PROTOCOL_MSTEAMS, NDPI_PROTOCOL_CATEGORY_COLLABORATIVE, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { ".storage.live.com", "MS_OneDrive", NDPI_PROTOCOL_MS_ONE_DRIVE,NDPI_PROTOCOL_CATEGORY_CLOUD, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "skyapi.live.net", "MS_OneDrive", NDPI_PROTOCOL_MS_ONE_DRIVE, NDPI_PROTOCOL_CATEGORY_CLOUD, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "d.docs.live.net", "MS_OneDrive", NDPI_PROTOCOL_MS_ONE_DRIVE, NDPI_PROTOCOL_CATEGORY_CLOUD, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "onedrive.live.com", "MS_OneDrive", NDPI_PROTOCOL_MS_ONE_DRIVE, NDPI_PROTOCOL_CATEGORY_CLOUD, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "cs9.wac.phicdn.net", "WindowsUpdate", NDPI_PROTOCOL_WINDOWS_UPDATE, NDPI_PROTOCOL_CATEGORY_SW_UPDATE, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".dl.delivery.mp.microsoft.com.", "WindowsUpdate", NDPI_PROTOCOL_WINDOWS_UPDATE, NDPI_PROTOCOL_CATEGORY_SW_UPDATE, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".delivery.dsp.mp.microsoft.com.nsatc.net", "WindowsUpdate", NDPI_PROTOCOL_WINDOWS_UPDATE, NDPI_PROTOCOL_CATEGORY_SW_UPDATE, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "sls.update.microsoft.com", "WindowsUpdate", NDPI_PROTOCOL_WINDOWS_UPDATE, NDPI_PROTOCOL_CATEGORY_SW_UPDATE, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "slscr.update.microsoft.com", "WindowsUpdate", NDPI_PROTOCOL_WINDOWS_UPDATE, NDPI_PROTOCOL_CATEGORY_SW_UPDATE, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "fe3.update.microsoft.com", "WindowsUpdate", NDPI_PROTOCOL_WINDOWS_UPDATE, NDPI_PROTOCOL_CATEGORY_SW_UPDATE, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".mp.microsoft.com.", "WindowsUpdate", NDPI_PROTOCOL_WINDOWS_UPDATE, NDPI_PROTOCOL_CATEGORY_SW_UPDATE, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "fe2.update.microsoft.com.", "WindowsUpdate", NDPI_PROTOCOL_WINDOWS_UPDATE, NDPI_PROTOCOL_CATEGORY_SW_UPDATE, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".wac.phicdn.net.", "WindowsUpdate", NDPI_PROTOCOL_WINDOWS_UPDATE, NDPI_PROTOCOL_CATEGORY_SW_UPDATE, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".geo-prod.do.dsp.mp.microsoft.com.", "WindowsUpdate", NDPI_PROTOCOL_WINDOWS_UPDATE, NDPI_PROTOCOL_CATEGORY_SW_UPDATE, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "geo-prod.do.dsp.mp.microsoft.com.", "WindowsUpdate", NDPI_PROTOCOL_WINDOWS_UPDATE, NDPI_PROTOCOL_CATEGORY_SW_UPDATE, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".delivery.mp.microsoft.com", "WindowsUpdate", NDPI_PROTOCOL_WINDOWS_UPDATE, NDPI_PROTOCOL_CATEGORY_SW_UPDATE, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".emdl.ws.microsoft.com", "WindowsUpdate", NDPI_PROTOCOL_WINDOWS_UPDATE, NDPI_PROTOCOL_CATEGORY_SW_UPDATE, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".prod.do.dsp.mp.microsoft.com", "WindowsUpdate", NDPI_PROTOCOL_WINDOWS_UPDATE, NDPI_PROTOCOL_CATEGORY_SW_UPDATE, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "update.microsoft.com", "WindowsUpdate", NDPI_PROTOCOL_WINDOWS_UPDATE, NDPI_PROTOCOL_CATEGORY_SW_UPDATE, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "update.microsoft.com.akadns.net", "WindowsUpdate", NDPI_PROTOCOL_WINDOWS_UPDATE, NDPI_PROTOCOL_CATEGORY_SW_UPDATE, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".windowsupdate.com", "WindowsUpdate", NDPI_PROTOCOL_WINDOWS_UPDATE, NDPI_PROTOCOL_CATEGORY_SW_UPDATE, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".ntservicepack.microsoft.com", "WindowsUpdate", NDPI_PROTOCOL_WINDOWS_UPDATE, NDPI_PROTOCOL_CATEGORY_SW_UPDATE, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".wustat.windows.com", "WindowsUpdate", NDPI_PROTOCOL_WINDOWS_UPDATE, NDPI_PROTOCOL_CATEGORY_SW_UPDATE, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "worldofwarcraft.com", "WorldOfWarcraft", NDPI_PROTOCOL_WORLDOFWARCRAFT, NDPI_PROTOCOL_CATEGORY_GAME, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { ".anchorfree.", "HotspotShield", NDPI_PROTOCOL_HOTSPOT_SHIELD, NDPI_PROTOCOL_CATEGORY_VPN, NDPI_PROTOCOL_POTENTIALLY_DANGEROUS, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "hotspotshield.com", "HotspotShield", NDPI_PROTOCOL_HOTSPOT_SHIELD, NDPI_PROTOCOL_CATEGORY_VPN, NDPI_PROTOCOL_POTENTIALLY_DANGEROUS, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".northghost.com", "HotspotShield", NDPI_PROTOCOL_HOTSPOT_SHIELD, NDPI_PROTOCOL_CATEGORY_VPN, NDPI_PROTOCOL_POTENTIALLY_DANGEROUS, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { ".webex.com", "Webex", NDPI_PROTOCOL_WEBEX, NDPI_PROTOCOL_CATEGORY_VOIP, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".zoom.us", "Zoom", NDPI_PROTOCOL_ZOOM, NDPI_PROTOCOL_CATEGORY_VIDEO, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { ".ocsdomain.com", "OCS", NDPI_PROTOCOL_OCS, NDPI_PROTOCOL_CATEGORY_MEDIA, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "ocs.fr", "OCS", NDPI_PROTOCOL_OCS, NDPI_PROTOCOL_CATEGORY_MEDIA, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".ocs.fr", "OCS", NDPI_PROTOCOL_OCS, NDPI_PROTOCOL_CATEGORY_MEDIA, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".labgency.ws", "OCS", NDPI_PROTOCOL_OCS, NDPI_PROTOCOL_CATEGORY_MEDIA, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { ".iflix.com", "IFLIX", NDPI_PROTOCOL_IFLIX, NDPI_PROTOCOL_CATEGORY_VIDEO, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".app.iflixcorp.com", "IFLIX", NDPI_PROTOCOL_IFLIX, NDPI_PROTOCOL_CATEGORY_VIDEO, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".images.iflixassets.com", "IFLIX", NDPI_PROTOCOL_IFLIX, NDPI_PROTOCOL_CATEGORY_VIDEO, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "crl.microsoft.com", "Microsoft365", NDPI_PROTOCOL_MICROSOFT_365, NDPI_PROTOCOL_CATEGORY_COLLABORATIVE, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "evsecure-ocsp.verisign.com", "Microsoft365", NDPI_PROTOCOL_MICROSOFT_365, NDPI_PROTOCOL_CATEGORY_COLLABORATIVE, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "evsecure-aia.verisign.com", "Microsoft365", NDPI_PROTOCOL_MICROSOFT_365, NDPI_PROTOCOL_CATEGORY_COLLABORATIVE, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "evsecure-crl.verisign.com", "Microsoft365", NDPI_PROTOCOL_MICROSOFT_365, NDPI_PROTOCOL_CATEGORY_COLLABORATIVE, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".omniroot.com", "Microsoft365", NDPI_PROTOCOL_MICROSOFT_365, NDPI_PROTOCOL_CATEGORY_COLLABORATIVE, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".microsoftonline.com", "Microsoft365", NDPI_PROTOCOL_MICROSOFT_365, NDPI_PROTOCOL_CATEGORY_COLLABORATIVE, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".microsoftonline.us", "Microsoft365", NDPI_PROTOCOL_MICROSOFT_365, NDPI_PROTOCOL_CATEGORY_COLLABORATIVE, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".office365.com", "Microsoft365", NDPI_PROTOCOL_MICROSOFT_365, NDPI_PROTOCOL_CATEGORY_COLLABORATIVE, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".office.com", "Microsoft365", NDPI_PROTOCOL_MICROSOFT_365, NDPI_PROTOCOL_CATEGORY_COLLABORATIVE, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "office.net", "Microsoft365", NDPI_PROTOCOL_MICROSOFT_365, NDPI_PROTOCOL_CATEGORY_COLLABORATIVE, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".msocsp.com", "Microsoft365", NDPI_PROTOCOL_MICROSOFT_365, NDPI_PROTOCOL_CATEGORY_COLLABORATIVE, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".msocdn.com", "Microsoft365", NDPI_PROTOCOL_MICROSOFT_365, NDPI_PROTOCOL_CATEGORY_COLLABORATIVE, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "officeapps.live.com", "Microsoft365", NDPI_PROTOCOL_MICROSOFT_365, NDPI_PROTOCOL_CATEGORY_COLLABORATIVE, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "outlook.live.com", "Microsoft365", NDPI_PROTOCOL_MICROSOFT_365, NDPI_PROTOCOL_CATEGORY_COLLABORATIVE, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "mail.live.com", "Microsoft365", NDPI_PROTOCOL_MICROSOFT_365, NDPI_PROTOCOL_CATEGORY_COLLABORATIVE, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "office.live.com", "Microsoft365", NDPI_PROTOCOL_MICROSOFT_365, NDPI_PROTOCOL_CATEGORY_COLLABORATIVE, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".onenote.", "Microsoft365", NDPI_PROTOCOL_MICROSOFT_365, NDPI_PROTOCOL_CATEGORY_COLLABORATIVE, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "cloudflare.com", "Cloudflare", NDPI_PROTOCOL_CLOUDFLARE, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "d295hzzivaok4k.cloudfront.net","OpenDNS", NDPI_PROTOCOL_OPENDNS, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".opendns.com", "OpenDNS", NDPI_PROTOCOL_OPENDNS, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + /* https://get.slack.help/hc/en-us/articles/205138367-Troubleshooting-Slack-connection-issues */ + { "slack.com", "Slack", NDPI_PROTOCOL_SLACK, NDPI_PROTOCOL_CATEGORY_COLLABORATIVE, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".slack-msgs.com", "Slack", NDPI_PROTOCOL_SLACK, NDPI_PROTOCOL_CATEGORY_COLLABORATIVE, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "slack-files.com", "Slack", NDPI_PROTOCOL_SLACK, NDPI_PROTOCOL_CATEGORY_COLLABORATIVE, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "slack-imgs.com", "Slack", NDPI_PROTOCOL_SLACK, NDPI_PROTOCOL_CATEGORY_COLLABORATIVE, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".slack-edge.com", "Slack", NDPI_PROTOCOL_SLACK, NDPI_PROTOCOL_CATEGORY_COLLABORATIVE, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".slack-core.com", "Slack", NDPI_PROTOCOL_SLACK, NDPI_PROTOCOL_CATEGORY_COLLABORATIVE, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "slack-redir.net", "Slack", NDPI_PROTOCOL_SLACK, NDPI_PROTOCOL_CATEGORY_COLLABORATIVE, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + /* Detected "slack-assets2.s3-us-west-2.amazonaws.com.". Omitted "*amazonaws.com" CDN */ + { "slack-assets2.s3-", "Slack", NDPI_PROTOCOL_SLACK, NDPI_PROTOCOL_CATEGORY_COLLABORATIVE, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "github.com", "Github", NDPI_PROTOCOL_GITHUB, NDPI_PROTOCOL_CATEGORY_COLLABORATIVE, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".github.com", "Github", NDPI_PROTOCOL_GITHUB, NDPI_PROTOCOL_CATEGORY_COLLABORATIVE, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "github.io", "Github", NDPI_PROTOCOL_GITHUB, NDPI_PROTOCOL_CATEGORY_COLLABORATIVE, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".github.io", "Github", NDPI_PROTOCOL_GITHUB, NDPI_PROTOCOL_CATEGORY_COLLABORATIVE, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "githubusercontent.com", "Github", NDPI_PROTOCOL_GITHUB, NDPI_PROTOCOL_CATEGORY_COLLABORATIVE, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".githubusercontent.com", "Github", NDPI_PROTOCOL_GITHUB, NDPI_PROTOCOL_CATEGORY_COLLABORATIVE, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "gitlab.com", "GitLab", NDPI_PROTOCOL_GITLAB, NDPI_PROTOCOL_CATEGORY_COLLABORATIVE, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".gitlab.com", "GitLab", NDPI_PROTOCOL_GITLAB, NDPI_PROTOCOL_CATEGORY_COLLABORATIVE, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".gitlab-static.net", "GitLab", NDPI_PROTOCOL_GITLAB, NDPI_PROTOCOL_CATEGORY_COLLABORATIVE, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".gitlab.io", "GitLab", NDPI_PROTOCOL_GITLAB, NDPI_PROTOCOL_CATEGORY_COLLABORATIVE, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".gitlab.net", "GitLab", NDPI_PROTOCOL_GITLAB, NDPI_PROTOCOL_CATEGORY_COLLABORATIVE, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { ".steampowered.com", "Steam", NDPI_PROTOCOL_STEAM, NDPI_PROTOCOL_CATEGORY_GAME, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "steamcommunity.com", "Steam", NDPI_PROTOCOL_STEAM, NDPI_PROTOCOL_CATEGORY_GAME, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".steamcontent.com", "Steam", NDPI_PROTOCOL_STEAM, NDPI_PROTOCOL_CATEGORY_GAME, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".steamstatic.com", "Steam", NDPI_PROTOCOL_STEAM, NDPI_PROTOCOL_CATEGORY_GAME, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "steamcommunity-a.akamaihd.net", "Steam", NDPI_PROTOCOL_STEAM, NDPI_PROTOCOL_CATEGORY_GAME, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { ".wechat.com", "WeChat", NDPI_PROTOCOL_WECHAT, NDPI_PROTOCOL_CATEGORY_CHAT, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".wechat.org", "WeChat", NDPI_PROTOCOL_WECHAT, NDPI_PROTOCOL_CATEGORY_CHAT, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".wechatapp.com", "WeChat", NDPI_PROTOCOL_WECHAT, NDPI_PROTOCOL_CATEGORY_CHAT, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".we.chat", "WeChat", NDPI_PROTOCOL_WECHAT, NDPI_PROTOCOL_CATEGORY_CHAT, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".wx.", "WeChat", NDPI_PROTOCOL_WECHAT, NDPI_PROTOCOL_CATEGORY_CHAT, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".weixin.", "WeChat", NDPI_PROTOCOL_WECHAT, NDPI_PROTOCOL_CATEGORY_CHAT, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".mmsns.qpic.cn", "WeChat", NDPI_PROTOCOL_WECHAT, NDPI_PROTOCOL_CATEGORY_CHAT, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "dnscrypt.org", "DNScrypt", NDPI_PROTOCOL_DNSCRYPT, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "torrent.", "BitTorrent", NDPI_PROTOCOL_BITTORRENT, NDPI_PROTOCOL_CATEGORY_DOWNLOAD_FT, NDPI_PROTOCOL_UNSAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "torrents.", "BitTorrent", NDPI_PROTOCOL_BITTORRENT, NDPI_PROTOCOL_CATEGORY_DOWNLOAD_FT, NDPI_PROTOCOL_UNSAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "torrentz.", "BitTorrent", NDPI_PROTOCOL_BITTORRENT, NDPI_PROTOCOL_CATEGORY_DOWNLOAD_FT, NDPI_PROTOCOL_UNSAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { ".nintendo.net", "Nintendo", NDPI_PROTOCOL_NINTENDO, NDPI_PROTOCOL_CATEGORY_GAME, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".nintendo.com", "Nintendo", NDPI_PROTOCOL_NINTENDO, NDPI_PROTOCOL_CATEGORY_GAME, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { ".playstation.net", "Playstation", NDPI_PROTOCOL_PLAYSTATION, NDPI_PROTOCOL_CATEGORY_GAME, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".playstation.com", "Playstation", NDPI_PROTOCOL_PLAYSTATION, NDPI_PROTOCOL_CATEGORY_GAME, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".sonyentertainmentnetwork.com", "Playstation", NDPI_PROTOCOL_PLAYSTATION, NDPI_PROTOCOL_CATEGORY_GAME, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { ".linkedin.com", "LinkedIn", NDPI_PROTOCOL_LINKEDIN, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".licdn.com", "LinkedIn", NDPI_PROTOCOL_LINKEDIN, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { ".sndcdn.com", "SoundCloud", NDPI_PROTOCOL_SOUNDCLOUD, NDPI_PROTOCOL_CATEGORY_MUSIC, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "soundcloud.com", "SoundCloud", NDPI_PROTOCOL_SOUNDCLOUD, NDPI_PROTOCOL_CATEGORY_MUSIC, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "getrockerbox.com", "SoundCloud", NDPI_PROTOCOL_SOUNDCLOUD, NDPI_PROTOCOL_CATEGORY_MUSIC, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "web.telegram.org", "Telegram", NDPI_PROTOCOL_TELEGRAM, NDPI_PROTOCOL_CATEGORY_CHAT, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "tdesktop.com", "Telegram", NDPI_PROTOCOL_TELEGRAM, NDPI_PROTOCOL_CATEGORY_CHAT, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "tupdate.com", "Telegram", NDPI_PROTOCOL_TELEGRAM, NDPI_PROTOCOL_CATEGORY_CHAT, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { ".pastebin.com", "Pastebin", NDPI_PROTOCOL_PASTEBIN, NDPI_PROTOCOL_CATEGORY_DOWNLOAD_FT, NDPI_PROTOCOL_POTENTIALLY_DANGEROUS, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "pastebin.com", "Pastebin", NDPI_PROTOCOL_PASTEBIN, NDPI_PROTOCOL_CATEGORY_DOWNLOAD_FT, NDPI_PROTOCOL_POTENTIALLY_DANGEROUS, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { ".ppstream.com", "PPStream", NDPI_PROTOCOL_PPSTREAM, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".pps.tv", "PPStream", NDPI_PROTOCOL_PPSTREAM, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { ".hulustream.com", "Hulu", NDPI_PROTOCOL_HULU, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "hulu.com", "Hulu", NDPI_PROTOCOL_HULU, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "assetshuluimcom-a.akamaihd.net", "Hulu", NDPI_PROTOCOL_HULU, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "ibhuluimcom-a.akamaihd.net", "Hulu", NDPI_PROTOCOL_HULU, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".huluad.com", "Hulu", NDPI_PROTOCOL_HULU, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".huluim.com", "Hulu", NDPI_PROTOCOL_HULU, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + /* + VidTO streaming service + */ + { ".vidto.me", "VidTO", NDPI_PROTOCOL_PPSTREAM, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".vidto.se", "VidTO", NDPI_PROTOCOL_PPSTREAM, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "snapcraft.io", "UbuntuONE", NDPI_PROTOCOL_UBUNTUONE, NDPI_PROTOCOL_CATEGORY_CLOUD, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "ubuntu.com", "UbuntuONE", NDPI_PROTOCOL_UBUNTUONE, NDPI_PROTOCOL_CATEGORY_CLOUD, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "signal.org", "Signal", NDPI_PROTOCOL_SIGNAL, NDPI_PROTOCOL_CATEGORY_CHAT, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "whispersystems.org", "Signal", NDPI_PROTOCOL_SIGNAL, NDPI_PROTOCOL_CATEGORY_CHAT, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "musical.ly", "TikTok", NDPI_PROTOCOL_TIKTOK, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "byteoversea.com", "TikTok", NDPI_PROTOCOL_TIKTOK, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "p16-tiktok-sign-va-h2.ibyteimg.com", "TikTok", NDPI_PROTOCOL_TIKTOK, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "p16-tiktok-sg.ibyteimg.com", "TikTok", NDPI_PROTOCOL_TIKTOK, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "p16-tiktok-va.ibyteimg.com", "TikTok", NDPI_PROTOCOL_TIKTOK, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "p16-musical-va.ibyteimg.com", "TikTok", NDPI_PROTOCOL_TIKTOK, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "p16-musical-sg.ibyteimg.com", "TikTok", NDPI_PROTOCOL_TIKTOK, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "p16-va-tiktok.ibyteimg.com", "TikTok", NDPI_PROTOCOL_TIKTOK, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "p16-ad-sg.ibyteimg.com", "TikTok", NDPI_PROTOCOL_TIKTOK, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "p21-ad-sg.ibyteimg.com", "TikTok", NDPI_PROTOCOL_TIKTOK, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "tiktokcdn.com", "TikTok", NDPI_PROTOCOL_TIKTOK, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "p16-tiktok-va-h2.ibyteimg.com", "TikTok", NDPI_PROTOCOL_TIKTOK, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "p16-tiktokcdn-com.akamaized.net", "TikTok", NDPI_PROTOCOL_TIKTOK, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "p16-va-default.akamaized.net", "TikTok", NDPI_PROTOCOL_TIKTOK, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "tiktokcdn.liveplay.myqcloud.com", "TikTok", NDPI_PROTOCOL_TIKTOK, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "musemuse.cn", "TikTok", NDPI_PROTOCOL_TIKTOK, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "tiktokv.com", "TikTok", NDPI_PROTOCOL_TIKTOK, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "bytecdn.cn", "TikTok", NDPI_PROTOCOL_TIKTOK, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "muscdn.com", "TikTok", NDPI_PROTOCOL_TIKTOK, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "tiktok.com", "TikTok", NDPI_PROTOCOL_TIKTOK, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "byted.org", "TikTok", NDPI_PROTOCOL_TIKTOK, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".tik-tokcdn.com", "TikTok", NDPI_PROTOCOL_TIKTOK, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "v19.byteicdn.com", "TikTok", NDPI_PROTOCOL_TIKTOK, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "v16m.byteicdn.com", "TikTok", NDPI_PROTOCOL_TIKTOK, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".tiktokcdn-us.com", "TikTok", NDPI_PROTOCOL_TIKTOK, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "brasilbandalarga.com.br", "EAQ", NDPI_PROTOCOL_EAQ, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".eaqbr.com.br", "EAQ", NDPI_PROTOCOL_EAQ, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { ".net.anydesk.com", "AnyDesk", NDPI_PROTOCOL_ANYDESK, NDPI_PROTOCOL_CATEGORY_REMOTE_ACCESS, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "discordapp.com", "Discord", NDPI_PROTOCOL_DISCORD, NDPI_PROTOCOL_CATEGORY_COLLABORATIVE, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "discordapp.net", "Discord", NDPI_PROTOCOL_DISCORD, NDPI_PROTOCOL_CATEGORY_COLLABORATIVE, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "discord.com", "Discord", NDPI_PROTOCOL_DISCORD, NDPI_PROTOCOL_CATEGORY_COLLABORATIVE, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "discord.gg", "Discord", NDPI_PROTOCOL_DISCORD, NDPI_PROTOCOL_CATEGORY_COLLABORATIVE, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "discord.media", "Discord", NDPI_PROTOCOL_DISCORD, NDPI_PROTOCOL_CATEGORY_COLLABORATIVE, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + /* + Amazon Alexa services + */ + { "alexa.amazon.com", "AmazonAlexa", NDPI_PROTOCOL_AMAZON_ALEXA, NDPI_PROTOCOL_CATEGORY_VIRTUAL_ASSISTANT, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "amazonalexa.com", "AmazonAlexa", NDPI_PROTOCOL_AMAZON_ALEXA, NDPI_PROTOCOL_CATEGORY_VIRTUAL_ASSISTANT, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "avs-alexa-1-na.amazon.com", "AmazonAlexa", NDPI_PROTOCOL_AMAZON_ALEXA, NDPI_PROTOCOL_CATEGORY_VIRTUAL_ASSISTANT, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "avs-alexa-2-na.amazon.com", "AmazonAlexa", NDPI_PROTOCOL_AMAZON_ALEXA, NDPI_PROTOCOL_CATEGORY_VIRTUAL_ASSISTANT, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "avs-alexa-3-na.amazon.com", "AmazonAlexa", NDPI_PROTOCOL_AMAZON_ALEXA, NDPI_PROTOCOL_CATEGORY_VIRTUAL_ASSISTANT, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "avs-alexa-4-na.amazon.com", "AmazonAlexa", NDPI_PROTOCOL_AMAZON_ALEXA, NDPI_PROTOCOL_CATEGORY_VIRTUAL_ASSISTANT, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "avs-alexa-5-na.amazon.com", "AmazonAlexa", NDPI_PROTOCOL_AMAZON_ALEXA, NDPI_PROTOCOL_CATEGORY_VIRTUAL_ASSISTANT, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "avs-alexa-6-na.amazon.com", "AmazonAlexa", NDPI_PROTOCOL_AMAZON_ALEXA, NDPI_PROTOCOL_CATEGORY_VIRTUAL_ASSISTANT, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "avs-alexa-7-na.amazon.com", "AmazonAlexa", NDPI_PROTOCOL_AMAZON_ALEXA, NDPI_PROTOCOL_CATEGORY_VIRTUAL_ASSISTANT, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "avs-alexa-8-na.amazon.com", "AmazonAlexa", NDPI_PROTOCOL_AMAZON_ALEXA, NDPI_PROTOCOL_CATEGORY_VIRTUAL_ASSISTANT, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "avs-alexa-9-na.amazon.com", "AmazonAlexa", NDPI_PROTOCOL_AMAZON_ALEXA, NDPI_PROTOCOL_CATEGORY_VIRTUAL_ASSISTANT, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "avs-alexa-10-na.amazon.com", "AmazonAlexa", NDPI_PROTOCOL_AMAZON_ALEXA, NDPI_PROTOCOL_CATEGORY_VIRTUAL_ASSISTANT, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "avs-alexa-11-na.amazon.com", "AmazonAlexa", NDPI_PROTOCOL_AMAZON_ALEXA, NDPI_PROTOCOL_CATEGORY_VIRTUAL_ASSISTANT, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "avs-alexa-12-na.amazon.com", "AmazonAlexa", NDPI_PROTOCOL_AMAZON_ALEXA, NDPI_PROTOCOL_CATEGORY_VIRTUAL_ASSISTANT, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "avs-alexa-13-na.amazon.com", "AmazonAlexa", NDPI_PROTOCOL_AMAZON_ALEXA, NDPI_PROTOCOL_CATEGORY_VIRTUAL_ASSISTANT, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "avs-alexa-14-na.amazon.com", "AmazonAlexa", NDPI_PROTOCOL_AMAZON_ALEXA, NDPI_PROTOCOL_CATEGORY_VIRTUAL_ASSISTANT, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "avs-alexa-15-na.amazon.com", "AmazonAlexa", NDPI_PROTOCOL_AMAZON_ALEXA, NDPI_PROTOCOL_CATEGORY_VIRTUAL_ASSISTANT, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "avs-alexa-16-na.amazon.com", "AmazonAlexa", NDPI_PROTOCOL_AMAZON_ALEXA, NDPI_PROTOCOL_CATEGORY_VIRTUAL_ASSISTANT, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "avs-alexa-17-na.amazon.com", "AmazonAlexa", NDPI_PROTOCOL_AMAZON_ALEXA, NDPI_PROTOCOL_CATEGORY_VIRTUAL_ASSISTANT, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "avs-alexa-18-na.amazon.com", "AmazonAlexa", NDPI_PROTOCOL_AMAZON_ALEXA, NDPI_PROTOCOL_CATEGORY_VIRTUAL_ASSISTANT, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "avs-alexa-19-na.amazon.com", "AmazonAlexa", NDPI_PROTOCOL_AMAZON_ALEXA, NDPI_PROTOCOL_CATEGORY_VIRTUAL_ASSISTANT, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + /* + Tumblr social network service + */ + { "tumblr.com", "Tumblr", NDPI_PROTOCOL_TUMBLR, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + /* + Reddit social network service + */ + { ".redd.it", "Reddit", NDPI_PROTOCOL_REDDIT, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".reddit.com", "Reddit", NDPI_PROTOCOL_REDDIT, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".redditmedia.com", "Reddit", NDPI_PROTOCOL_REDDIT, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".redditstatic.com", "Reddit", NDPI_PROTOCOL_REDDIT, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".reddit.map.fastly.net", "Reddit", NDPI_PROTOCOL_REDDIT, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + /* + Pinterest social network service + */ + { ".pinimg.com", "Pinterest", NDPI_PROTOCOL_PINTEREST, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "pinterest.global.map.fastly.net", "Pinterest", NDPI_PROTOCOL_PINTEREST, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "pinterest.map.fastly.net", "Pinterest", NDPI_PROTOCOL_PINTEREST, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "pinterest.", "Pinterest", NDPI_PROTOCOL_PINTEREST, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "pinterest.co.", "Pinterest", NDPI_PROTOCOL_PINTEREST, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + /* + Disney's DisneyPlus streaming service + */ + { "dssott.com.akamaized.net", "DisneyPlus", NDPI_PROTOCOL_DISNEYPLUS, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "disney-plus.com", "DisneyPlus", NDPI_PROTOCOL_DISNEYPLUS, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "disney-plus.net", "DisneyPlus", NDPI_PROTOCOL_DISNEYPLUS, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "disneyplus.com", "DisneyPlus", NDPI_PROTOCOL_DISNEYPLUS, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "disneyplus.net", "DisneyPlus", NDPI_PROTOCOL_DISNEYPLUS, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "dssott.com", "DisneyPlus", NDPI_PROTOCOL_DISNEYPLUS, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "disneyplus.com.ssl.sc.omtrdc.net", "DisneyPlus", NDPI_PROTOCOL_DISNEYPLUS, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".bamgrid.com", "DisneyPlus", NDPI_PROTOCOL_DISNEYPLUS, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".registerdisney.go.com", "DisneyPlus", NDPI_PROTOCOL_DISNEYPLUS, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + /* + Likee app + */ + { ".like.video", "Likee", NDPI_PROTOCOL_LIKEE, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".likee.video", "Likee", NDPI_PROTOCOL_LIKEE, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".likee.com", "Likee", NDPI_PROTOCOL_LIKEE, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".likeevideo.com", "Likee", NDPI_PROTOCOL_LIKEE, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".like-video.com", "Likee", NDPI_PROTOCOL_LIKEE, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".likeimo.tech", "Likee", NDPI_PROTOCOL_LIKEE, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".liketech.tech", "Likee", NDPI_PROTOCOL_LIKEE, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "bstream.hzmklvdieo.com", "Likee", NDPI_PROTOCOL_LIKEE, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "bstream.kzhi.tech", "Likee", NDPI_PROTOCOL_LIKEE, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + /* + Activision + */ + { "activision.", "Activision", NDPI_PROTOCOL_ACTIVISION, NDPI_PROTOCOL_CATEGORY_GAME, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".activision.com", "Activision", NDPI_PROTOCOL_ACTIVISION, NDPI_PROTOCOL_CATEGORY_GAME, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + /* Vimeo */ + { "vimeo.com", "Vimeo", NDPI_PROTOCOL_VIMEO, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".vimeo.com", "Vimeo", NDPI_PROTOCOL_VIMEO, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".vimeocdn.com", "Vimeo", NDPI_PROTOCOL_VIMEO, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { ".crashlytics.com", "Crashlytics", NDPI_PROTOCOL_CRASHLYSTICS, NDPI_PROTOCOL_CATEGORY_DATA_TRANSFER, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { ".fuze.com", "Fuze", NDPI_PROTOCOL_FUZE, NDPI_PROTOCOL_CATEGORY_VOIP, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".fuzemeeting.com", "Fuze", NDPI_PROTOCOL_FUZE, NDPI_PROTOCOL_CATEGORY_VOIP, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".thinkingphones.com", "Fuze", NDPI_PROTOCOL_FUZE, NDPI_PROTOCOL_CATEGORY_VOIP, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "alibaba.com", "Alibaba", NDPI_PROTOCOL_ALIBABA, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".alibaba.com", "Alibaba", NDPI_PROTOCOL_ALIBABA, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".aliapp.org", "Alibaba", NDPI_PROTOCOL_ALIBABA, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".alicdn.com", "Alibaba", NDPI_PROTOCOL_ALIBABA, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".aliyuncs.com", "Alibaba", NDPI_PROTOCOL_ALIBABA, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".mmstat.com", "Alibaba", NDPI_PROTOCOL_ALIBABA, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "mask.icloud.com", "iCloudPrivateRelay", NDPI_PROTOCOL_ICLOUD_PRIVATE_RELAY, NDPI_PROTOCOL_CATEGORY_VPN, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "mask-h2.icloud.com", "iCloudPrivateRelay", NDPI_PROTOCOL_ICLOUD_PRIVATE_RELAY, NDPI_PROTOCOL_CATEGORY_VPN, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "mask-api.icloud.com", "iCloudPrivateRelay", NDPI_PROTOCOL_ICLOUD_PRIVATE_RELAY, NDPI_PROTOCOL_CATEGORY_VPN, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "badoo.com", "Badoo", NDPI_PROTOCOL_BADOO, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "badoocdn.com", "Badoo", NDPI_PROTOCOL_BADOO, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".badoo.app", "Badoo", NDPI_PROTOCOL_BADOO, NDPI_PROTOCOL_CATEGORY_SOCIAL_NETWORK, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "accuweather.com", "AccuWeather", NDPI_PROTOCOL_ACCUWEATHER, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".accuweather.com", "AccuWeather", NDPI_PROTOCOL_ACCUWEATHER, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "zattoo.com", "Zattoo", NDPI_PROTOCOL_ZATTOO, NDPI_PROTOCOL_CATEGORY_VIDEO, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".zattoo.com", "Zattoo", NDPI_PROTOCOL_ZATTOO, NDPI_PROTOCOL_CATEGORY_VIDEO, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "zattosecurehd2-f.akamaihd.net", "Zattoo", NDPI_PROTOCOL_ZATTOO, NDPI_PROTOCOL_CATEGORY_VIDEO, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "classroom.google.com", "GoogleClassroom", NDPI_PROTOCOL_GOOGLE_CLASSROOM, NDPI_PROTOCOL_CATEGORY_COLLABORATIVE, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "fortinet.com", "Cybersec", NDPI_PROTOCOL_CYBERSECURITY, NDPI_PROTOCOL_CATEGORY_CYBERSECURITY, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "sophos.com", "Cybersec", NDPI_PROTOCOL_CYBERSECURITY, NDPI_PROTOCOL_CATEGORY_CYBERSECURITY, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "sophosxl.net", "Cybersec", NDPI_PROTOCOL_CYBERSECURITY, NDPI_PROTOCOL_CATEGORY_CYBERSECURITY, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "bitdefender.net", "Cybersec", NDPI_PROTOCOL_CYBERSECURITY, NDPI_PROTOCOL_CATEGORY_CYBERSECURITY, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "kaspersky.com", "Cybersec", NDPI_PROTOCOL_CYBERSECURITY, NDPI_PROTOCOL_CATEGORY_CYBERSECURITY, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "kaspersky-labs.com", "Cybersec", NDPI_PROTOCOL_CYBERSECURITY, NDPI_PROTOCOL_CATEGORY_CYBERSECURITY, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "mcafee.com", "Cybersec", NDPI_PROTOCOL_CYBERSECURITY, NDPI_PROTOCOL_CATEGORY_CYBERSECURITY, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "symantec.com", "Cybersec", NDPI_PROTOCOL_CYBERSECURITY, NDPI_PROTOCOL_CATEGORY_CYBERSECURITY, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "norton.com", "Cybersec", NDPI_PROTOCOL_CYBERSECURITY, NDPI_PROTOCOL_CATEGORY_CYBERSECURITY, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "f-secure.com", "Cybersec", NDPI_PROTOCOL_CYBERSECURITY, NDPI_PROTOCOL_CATEGORY_CYBERSECURITY, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "avira.com", "Cybersec", NDPI_PROTOCOL_CYBERSECURITY, NDPI_PROTOCOL_CATEGORY_CYBERSECURITY, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "pandasecurity.com", "Cybersec", NDPI_PROTOCOL_CYBERSECURITY, NDPI_PROTOCOL_CATEGORY_CYBERSECURITY, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "avast.com", "Cybersec", NDPI_PROTOCOL_CYBERSECURITY, NDPI_PROTOCOL_CATEGORY_CYBERSECURITY, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".avcdn.net", "Cybersec", NDPI_PROTOCOL_CYBERSECURITY, NDPI_PROTOCOL_CATEGORY_CYBERSECURITY, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "malwarebytes.com", "Cybersec", NDPI_PROTOCOL_CYBERSECURITY, NDPI_PROTOCOL_CATEGORY_CYBERSECURITY, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "trendmicro.com", "Cybersec", NDPI_PROTOCOL_CYBERSECURITY, NDPI_PROTOCOL_CATEGORY_CYBERSECURITY, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".eset.com", "Cybersec", NDPI_PROTOCOL_CYBERSECURITY, NDPI_PROTOCOL_CATEGORY_CYBERSECURITY, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".e5.sk", "Cybersec", NDPI_PROTOCOL_CYBERSECURITY, NDPI_PROTOCOL_CATEGORY_CYBERSECURITY, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "bullguard.com", "Cybersec", NDPI_PROTOCOL_CYBERSECURITY, NDPI_PROTOCOL_CATEGORY_CYBERSECURITY, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "paloaltonetworks.com", "Cybersec", NDPI_PROTOCOL_CYBERSECURITY, NDPI_PROTOCOL_CATEGORY_CYBERSECURITY, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "crowdstrike.com", "Cybersec", NDPI_PROTOCOL_CYBERSECURITY, NDPI_PROTOCOL_CATEGORY_CYBERSECURITY, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "checkpoint.com", "Cybersec", NDPI_PROTOCOL_CYBERSECURITY, NDPI_PROTOCOL_CATEGORY_CYBERSECURITY, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "darktrace.com", "Cybersec", NDPI_PROTOCOL_CYBERSECURITY, NDPI_PROTOCOL_CATEGORY_CYBERSECURITY, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "rapid7.com", "Cybersec", NDPI_PROTOCOL_CYBERSECURITY, NDPI_PROTOCOL_CATEGORY_CYBERSECURITY, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "barracuda.com", "Cybersec", NDPI_PROTOCOL_CYBERSECURITY, NDPI_PROTOCOL_CATEGORY_CYBERSECURITY, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "sonicwall.com", "Cybersec", NDPI_PROTOCOL_CYBERSECURITY, NDPI_PROTOCOL_CATEGORY_CYBERSECURITY, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".rsa.com", "Cybersec", NDPI_PROTOCOL_CYBERSECURITY, NDPI_PROTOCOL_CATEGORY_CYBERSECURITY, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + /* Popular antispam/reputation web sites */ + { "spamhaus.org", "Cybersec", NDPI_PROTOCOL_CYBERSECURITY, NDPI_PROTOCOL_CATEGORY_CYBERSECURITY, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "surbl.org", "Cybersec", NDPI_PROTOCOL_CYBERSECURITY, NDPI_PROTOCOL_CATEGORY_CYBERSECURITY, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "support-intelligence.net", "Cybersec", NDPI_PROTOCOL_CYBERSECURITY, NDPI_PROTOCOL_CATEGORY_CYBERSECURITY, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "mailspike.net", "Cybersec", NDPI_PROTOCOL_CYBERSECURITY, NDPI_PROTOCOL_CATEGORY_CYBERSECURITY, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "spamcop.net", "Cybersec", NDPI_PROTOCOL_CYBERSECURITY, NDPI_PROTOCOL_CATEGORY_CYBERSECURITY, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "rspamd.com", "Cybersec", NDPI_PROTOCOL_CYBERSECURITY, NDPI_PROTOCOL_CATEGORY_CYBERSECURITY, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "habeas.com", "Cybersec", NDPI_PROTOCOL_CYBERSECURITY, NDPI_PROTOCOL_CATEGORY_CYBERSECURITY, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "bondedsender.org", "Cybersec", NDPI_PROTOCOL_CYBERSECURITY, NDPI_PROTOCOL_CATEGORY_CYBERSECURITY, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "sorbs.net", "Cybersec", NDPI_PROTOCOL_CYBERSECURITY, NDPI_PROTOCOL_CATEGORY_CYBERSECURITY, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "surriel.com", "Cybersec", NDPI_PROTOCOL_CYBERSECURITY, NDPI_PROTOCOL_CATEGORY_CYBERSECURITY, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "spameatingmonkey.net", "Cybersec", NDPI_PROTOCOL_CYBERSECURITY, NDPI_PROTOCOL_CATEGORY_CYBERSECURITY, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "senderscore.com", "Cybersec", NDPI_PROTOCOL_CYBERSECURITY, NDPI_PROTOCOL_CATEGORY_CYBERSECURITY, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "ixhash.net", "Cybersec", NDPI_PROTOCOL_CYBERSECURITY, NDPI_PROTOCOL_CATEGORY_CYBERSECURITY, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "esvarbl.com", "Cybersec", NDPI_PROTOCOL_CYBERSECURITY, NDPI_PROTOCOL_CATEGORY_CYBERSECURITY, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".dnsbl.", /* www.dnsbl.info */ "Cybersec", NDPI_PROTOCOL_CYBERSECURITY, NDPI_PROTOCOL_CATEGORY_CYBERSECURITY, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "iqiyi.com", "PPStream", NDPI_PROTOCOL_PPSTREAM, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "iqiyipic.com", "PPStream", NDPI_PROTOCOL_PPSTREAM, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "iq.com", "PPStream", NDPI_PROTOCOL_PPSTREAM, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "qy.net", "PPStream", NDPI_PROTOCOL_PPSTREAM, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "qiyipic.com", "PPStream", NDPI_PROTOCOL_PPSTREAM, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "ppstream.com", "PPStream", NDPI_PROTOCOL_PPSTREAM, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "pluralsight.com", "Pluralsight", NDPI_PROTOCOL_PLURALSIGHT, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "pluralsight2.imgix.net", "Pluralsight", NDPI_PROTOCOL_PLURALSIGHT, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "pluralsight.imgix.net", "Pluralsight", NDPI_PROTOCOL_PLURALSIGHT, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "zn6qzq6caaucudesr-pluralsight.siteintercept.qualtrics.com", "Pluralsight", NDPI_PROTOCOL_PLURALSIGHT, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "znejw6fzxpoc4z2sj-pluralsight.siteintercept.qualtrics.com", "Pluralsight", NDPI_PROTOCOL_PLURALSIGHT, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "ip-video-course-exercise-files-us-west-2.s3.us-west-2.amazonaws.com", "Pluralsight", NDPI_PROTOCOL_PLURALSIGHT, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "pluralsight.demdex.net", "Pluralsight", NDPI_PROTOCOL_PLURALSIGHT, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "pluralsight.sc.omtrdc.net", "Pluralsight", NDPI_PROTOCOL_PLURALSIGHT, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "pluralsight.hb.omtrdc.net", "Pluralsight", NDPI_PROTOCOL_PLURALSIGHT, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "pluralsight.tt.omtrdc.net", "Pluralsight", NDPI_PROTOCOL_PLURALSIGHT, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { ".xiaomi.com", "Xiaomi", NDPI_PROTOCOL_XIAOMI, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".xiaomi.net", "Xiaomi", NDPI_PROTOCOL_XIAOMI, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".mi.com", "Xiaomi", NDPI_PROTOCOL_XIAOMI, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".miui.com", "Xiaomi", NDPI_PROTOCOL_XIAOMI, NDPI_PROTOCOL_CATEGORY_WEB, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "softether.org", "Softether", NDPI_PROTOCOL_SOFTETHER, NDPI_PROTOCOL_CATEGORY_VPN, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "softether-network.net", "Softether", NDPI_PROTOCOL_SOFTETHER, NDPI_PROTOCOL_CATEGORY_VPN, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "dazn.com", "Dazn", NDPI_PROTOCOL_DAZN, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "indazn.com", "Dazn", NDPI_PROTOCOL_DAZN, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "dazn-api.com", "Dazn", NDPI_PROTOCOL_DAZN, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "daznedge.net", "Dazn", NDPI_PROTOCOL_DAZN, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "dcavoddazn.akamaized.net", "Dazn", NDPI_PROTOCOL_DAZN, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "goto.com", "GoTo", NDPI_PROTOCOL_GOTO, NDPI_PROTOCOL_CATEGORY_VOIP, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "getgo.com", "GoTo", NDPI_PROTOCOL_GOTO, NDPI_PROTOCOL_CATEGORY_VOIP, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "gotomeeting.com", "GoTo", NDPI_PROTOCOL_GOTO, NDPI_PROTOCOL_CATEGORY_VOIP, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "expertcity.com", "GoTo", NDPI_PROTOCOL_GOTO, NDPI_PROTOCOL_CATEGORY_VOIP, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "goto-rtc.com", "GoTo", NDPI_PROTOCOL_GOTO, NDPI_PROTOCOL_CATEGORY_VOIP, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "logmeininc.com", "GoTo", NDPI_PROTOCOL_GOTO, NDPI_PROTOCOL_CATEGORY_VOIP, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "gotowebinar.com", "GoTo", NDPI_PROTOCOL_GOTO, NDPI_PROTOCOL_CATEGORY_VOIP, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "gototraining.com", "GoTo", NDPI_PROTOCOL_GOTO, NDPI_PROTOCOL_CATEGORY_VOIP, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "launchdarkly.com", "GoTo", NDPI_PROTOCOL_GOTO, NDPI_PROTOCOL_CATEGORY_VOIP, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "api-pub.mltree.net", "GoTo", NDPI_PROTOCOL_GOTO, NDPI_PROTOCOL_CATEGORY_VOIP, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "getgocdn.com", "GoTo", NDPI_PROTOCOL_GOTO, NDPI_PROTOCOL_CATEGORY_VOIP, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "cdngetgo.com", "GoTo", NDPI_PROTOCOL_GOTO, NDPI_PROTOCOL_CATEGORY_VOIP, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "gotomeet.at", "GoTo", NDPI_PROTOCOL_GOTO, NDPI_PROTOCOL_CATEGORY_VOIP, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "gotomeet.me", "GoTo", NDPI_PROTOCOL_GOTO, NDPI_PROTOCOL_CATEGORY_VOIP, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "getgoservices.com", "GoTo", NDPI_PROTOCOL_GOTO, NDPI_PROTOCOL_CATEGORY_VOIP, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "getgoservices.net", "GoTo", NDPI_PROTOCOL_GOTO, NDPI_PROTOCOL_CATEGORY_VOIP, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "gotoconference.com", "GoTo", NDPI_PROTOCOL_GOTO, NDPI_PROTOCOL_CATEGORY_VOIP, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "gotoroom.com", "GoTo", NDPI_PROTOCOL_GOTO, NDPI_PROTOCOL_CATEGORY_VOIP, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "joinwebinar.com", "GoTo", NDPI_PROTOCOL_GOTO, NDPI_PROTOCOL_CATEGORY_VOIP, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "1kxun.com", "1kxun", NDPI_PROTOCOL_1KXUN, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "1kxun.mobi", "1kxun", NDPI_PROTOCOL_1KXUN, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "tunnelbear.com", "TunnelBear", NDPI_PROTOCOL_TUNNELBEAR, NDPI_PROTOCOL_CATEGORY_VPN, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "polargrizzly.com", "TunnelBear", NDPI_PROTOCOL_TUNNELBEAR, NDPI_PROTOCOL_CATEGORY_VPN, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "cloudflareclient.com", "CloudflareWarp", NDPI_PROTOCOL_CLOUDFLARE_WARP, NDPI_PROTOCOL_CATEGORY_VPN, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "ocsp.digicert.com", "OCSP", NDPI_PROTOCOL_OCSP, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "ocsp.godaddy.com", "OCSP", NDPI_PROTOCOL_OCSP, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "ocsp.sectigo.com", "OCSP", NDPI_PROTOCOL_OCSP, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "ocsp.quovadisglobal.com", "OCSP", NDPI_PROTOCOL_OCSP, NDPI_PROTOCOL_CATEGORY_NETWORK, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "psiphon3.net", "Psiphon", NDPI_PROTOCOL_PSIPHON, NDPI_PROTOCOL_CATEGORY_VPN, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".psiphon3.net", "Psiphon", NDPI_PROTOCOL_PSIPHON, NDPI_PROTOCOL_CATEGORY_VPN, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "cachefly.com", "CacheFly", NDPI_PROTOCOL_CACHEFLY, NDPI_PROTOCOL_CATEGORY_CLOUD, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "discovery.syncthing.net", "Syncthing", NDPI_PROTOCOL_SYNCTHING, NDPI_PROTOCOL_CATEGORY_DOWNLOAD_FT, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { ".line-apps.com", "Line", NDPI_PROTOCOL_LINE, NDPI_PROTOCOL_CATEGORY_CHAT, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".line-scdn.net", "Line", NDPI_PROTOCOL_LINE, NDPI_PROTOCOL_CATEGORY_CHAT, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "line.me", "Line", NDPI_PROTOCOL_LINE, NDPI_PROTOCOL_CATEGORY_CHAT, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "line-website.com", "Line", NDPI_PROTOCOL_LINE, NDPI_PROTOCOL_CATEGORY_CHAT, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".linecorp.com", "Line", NDPI_PROTOCOL_LINE, NDPI_PROTOCOL_CATEGORY_CHAT, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { ".line.naver.jp", "Line", NDPI_PROTOCOL_LINE, NDPI_PROTOCOL_CATEGORY_CHAT, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "tv.apple.com", "AppleTVPlus", NDPI_PROTOCOL_APPLETVPLUS, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "tv.g.apple.com", "AppleTVPlus", NDPI_PROTOCOL_APPLETVPLUS, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "tv.v.aaplimg.com", "AppleTVPlus", NDPI_PROTOCOL_APPLETVPLUS, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "directv.com", "DirecTV", NDPI_PROTOCOL_DIRECTV, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "directvnow.com", "DirecTV", NDPI_PROTOCOL_DIRECTV, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "dtvbb.tv", "DirecTV", NDPI_PROTOCOL_DIRECTV, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "dtvce.com", "DirecTV", NDPI_PROTOCOL_DIRECTV, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "hbo.com", "HBO", NDPI_PROTOCOL_HBO, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "hbogo.co.th", "HBO", NDPI_PROTOCOL_HBO, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "hbogo.com", "HBO", NDPI_PROTOCOL_HBO, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "hbogo.eu", "HBO", NDPI_PROTOCOL_HBO, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "hbogoasia.com", "HBO", NDPI_PROTOCOL_HBO, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "hbogoasia.id", "HBO", NDPI_PROTOCOL_HBO, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "hbogoasia.ph", "HBO", NDPI_PROTOCOL_HBO, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "hbomax.com", "HBO", NDPI_PROTOCOL_HBO, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "hbomaxcdn.com", "HBO", NDPI_PROTOCOL_HBO, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "hbonow.com", "HBO", NDPI_PROTOCOL_HBO, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "maxgo.com", "HBO", NDPI_PROTOCOL_HBO, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "vudu.com", "Vudu", NDPI_PROTOCOL_VUDU, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { ".showtime.com", "Showtime", NDPI_PROTOCOL_SHOWTIME, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "dai.ly", "Dailymotion", NDPI_PROTOCOL_DAILYMOTION, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "dailymotion.com", "Dailymotion", NDPI_PROTOCOL_DAILYMOTION, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "dailymotionadvertising.com", "Dailymotion", NDPI_PROTOCOL_DAILYMOTION, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "dmcdn.net", "Dailymotion", NDPI_PROTOCOL_DAILYMOTION, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "dmxleo.com", "Dailymotion", NDPI_PROTOCOL_DAILYMOTION, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { ".livestream.com", "Livestream", NDPI_PROTOCOL_LIVESTREAM, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "v.qq.com", "Tencentvideo", NDPI_PROTOCOL_TENCENTVIDEO, NDPI_PROTOCOL_CATEGORY_STREAMING, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "937theriver.com", "IHeartRadio", NDPI_PROTOCOL_IHEARTRADIO, NDPI_PROTOCOL_CATEGORY_MUSIC, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "iheart.com", "IHeartRadio", NDPI_PROTOCOL_IHEARTRADIO, NDPI_PROTOCOL_CATEGORY_MUSIC, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "iheart.mx", "IHeartRadio", NDPI_PROTOCOL_IHEARTRADIO, NDPI_PROTOCOL_CATEGORY_MUSIC, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "iheartmedia.com", "IHeartRadio", NDPI_PROTOCOL_IHEARTRADIO, NDPI_PROTOCOL_CATEGORY_MUSIC, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "iheartradio.ca", "IHeartRadio", NDPI_PROTOCOL_IHEARTRADIO, NDPI_PROTOCOL_CATEGORY_MUSIC, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "iheartradio.co.nz", "IHeartRadio", NDPI_PROTOCOL_IHEARTRADIO, NDPI_PROTOCOL_CATEGORY_MUSIC, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "iheartradio.com", "IHeartRadio", NDPI_PROTOCOL_IHEARTRADIO, NDPI_PROTOCOL_CATEGORY_MUSIC, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "ihrdev.com", "IHeartRadio", NDPI_PROTOCOL_IHEARTRADIO, NDPI_PROTOCOL_CATEGORY_MUSIC, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "ihrhls.com", "IHeartRadio", NDPI_PROTOCOL_IHEARTRADIO, NDPI_PROTOCOL_CATEGORY_MUSIC, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "ihrint.com", "IHeartRadio", NDPI_PROTOCOL_IHEARTRADIO, NDPI_PROTOCOL_CATEGORY_MUSIC, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "ihrstage.com", "IHeartRadio", NDPI_PROTOCOL_IHEARTRADIO, NDPI_PROTOCOL_CATEGORY_MUSIC, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { ".tidal.com", "Tidal", NDPI_PROTOCOL_TIDAL, NDPI_PROTOCOL_CATEGORY_MUSIC, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "radiotime.com", "TuneIn", NDPI_PROTOCOL_TUNEIN, NDPI_PROTOCOL_CATEGORY_MUSIC, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "tunein.com", "TuneIn", NDPI_PROTOCOL_TUNEIN, NDPI_PROTOCOL_CATEGORY_MUSIC, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "tunenet.io", "TuneIn", NDPI_PROTOCOL_TUNEIN, NDPI_PROTOCOL_CATEGORY_MUSIC, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "siriusxm.ca", "SiriusXMRadio", NDPI_PROTOCOL_SIRIUSXMRADIO, NDPI_PROTOCOL_CATEGORY_MUSIC, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + { "siriusxm.com", "SiriusXMRadio", NDPI_PROTOCOL_SIRIUSXMRADIO, NDPI_PROTOCOL_CATEGORY_MUSIC, NDPI_PROTOCOL_FUN, NDPI_PROTOCOL_DEFAULT_LEVEL }, + + { "tailscale.com", "Tailscale", NDPI_PROTOCOL_TAILSCALE, NDPI_PROTOCOL_CATEGORY_VPN, NDPI_PROTOCOL_ACCEPTABLE, NDPI_PROTOCOL_DEFAULT_LEVEL }, + +#ifdef CUSTOM_NDPI_PROTOCOLS +#include "../../../nDPI-custom/custom_ndpi_content_match_host_match.c.inc" +#endif + + { NULL, NULL, NDPI_PROTOCOL_UNKNOWN, NDPI_PROTOCOL_CATEGORY_UNSPECIFIED, NDPI_PROTOCOL_SAFE, NDPI_PROTOCOL_DEFAULT_LEVEL } + }; + +/* ******************************************************************** */ + +static ndpi_tls_cert_name_match tls_certificate_match [] = { + { "CN=AnyDesk Client", NDPI_PROTOCOL_ANYDESK }, + { "O=philandro Software GmbH", NDPI_PROTOCOL_ANYDESK }, + { "O=Kakao", NDPI_PROTOCOL_KAKAOTALK }, + { "O=ntop.org", NDPI_PROTOCOL_NTOP }, + { "O=Netflix", NDPI_PROTOCOL_NETFLIX }, + { "O=Cloudflare", NDPI_PROTOCOL_CLOUDFLARE }, + { "CN=simplednscrypt.org", NDPI_PROTOCOL_DNSCRYPT }, + { "CN=*.gateway.messenger.live.com", NDPI_PROTOCOL_SKYPE_TEAMS }, + { "OU=FortiGate", NDPI_PROTOCOL_FORTICLIENT }, + { "CN=www.update.microsoft.com", NDPI_PROTOCOL_WINDOWS_UPDATE }, + { "CN=*.tunnelbear.com", NDPI_PROTOCOL_TUNNELBEAR }, + { "CN=cloudflareclient.com", NDPI_PROTOCOL_CLOUDFLARE_WARP }, + + { NULL, 0 } +}; + +/* ******************************************************************** */ + +/* + IMPORTANT + + Do NOT pur here strings that overlap with string in host_match[] + specified above +*/ + +static ndpi_category_match category_match[] = { + { ".edgecastcdn.net", NDPI_PROTOCOL_CATEGORY_MEDIA }, + { ".hwcdn.net", NDPI_PROTOCOL_CATEGORY_MEDIA }, + { ".llnwd.net", NDPI_PROTOCOL_CATEGORY_MEDIA }, + { ".llns.net", NDPI_PROTOCOL_CATEGORY_MEDIA }, + { ".fastly.net", NDPI_PROTOCOL_CATEGORY_MEDIA }, + { ".vultr.com", NDPI_PROTOCOL_CATEGORY_CLOUD }, + { "baidu.com", NDPI_PROTOCOL_CATEGORY_WEB }, + { "icq.com", NDPI_PROTOCOL_CATEGORY_CHAT }, + { "quickplay.com", NDPI_PROTOCOL_CATEGORY_STREAMING }, + { ".71.am", NDPI_PROTOCOL_CATEGORY_STREAMING }, + { "tcad.wedolook.com", NDPI_PROTOCOL_CATEGORY_STREAMING }, + { ".rapidvideo.com", NDPI_PROTOCOL_CATEGORY_STREAMING }, + { ".playercdn.net", NDPI_PROTOCOL_CATEGORY_STREAMING }, + { "showmax.com", NDPI_PROTOCOL_CATEGORY_STREAMING }, + { "showmax.akamaized.net", NDPI_PROTOCOL_CATEGORY_STREAMING }, + { "skyq.sky.com", NDPI_PROTOCOL_CATEGORY_STREAMING }, + { "iptv.sky.", NDPI_PROTOCOL_CATEGORY_STREAMING }, + { "pcdn.skycdn.", NDPI_PROTOCOL_CATEGORY_STREAMING }, + + /* https://success.tanaza.com/s/article/How-Automatic-Detection-of-Captive-Portal-works */ + { "thinkdifferent.us", NDPI_PROTOCOL_CATEGORY_CONNECTIVITY_CHECK }, + { "airport.us", NDPI_PROTOCOL_CATEGORY_CONNECTIVITY_CHECK }, + { "detectportal.firefox.com", NDPI_PROTOCOL_CATEGORY_CONNECTIVITY_CHECK }, + { "connectivitycheck.platform.hicloud.com", NDPI_PROTOCOL_CATEGORY_CONNECTIVITY_CHECK }, + + /* Hulu Streaming services AS23286 */ + { "8.28.124.0/24", NDPI_PROTOCOL_CATEGORY_STREAMING }, + { "8.28.125.0/24", NDPI_PROTOCOL_CATEGORY_STREAMING }, + { "199.200.50.0/23", NDPI_PROTOCOL_CATEGORY_STREAMING }, + { "199.200.51.0/24", NDPI_PROTOCOL_CATEGORY_STREAMING }, + { "199.60.116.0/24", NDPI_PROTOCOL_CATEGORY_STREAMING }, + { "208.91.158.0/23", NDPI_PROTOCOL_CATEGORY_STREAMING }, + { "209.249.186.0/24", NDPI_PROTOCOL_CATEGORY_STREAMING }, + + /* Disney Streaming services AS11251 */ + { "8.4.4.0/24", NDPI_PROTOCOL_CATEGORY_STREAMING }, + { "8.5.5.0/24", NDPI_PROTOCOL_CATEGORY_STREAMING }, + { "8.33.30.0/24", NDPI_PROTOCOL_CATEGORY_STREAMING }, + { "63.116.222.0/24", NDPI_PROTOCOL_CATEGORY_STREAMING }, + { "63.116.223.0/24", NDPI_PROTOCOL_CATEGORY_STREAMING }, + { "139.104.192.0/24", NDPI_PROTOCOL_CATEGORY_STREAMING }, + { "139.104.193.0/24", NDPI_PROTOCOL_CATEGORY_STREAMING }, + { "139.104.200.0/24", NDPI_PROTOCOL_CATEGORY_STREAMING }, + { "139.104.201.0/24", NDPI_PROTOCOL_CATEGORY_STREAMING }, + { "139.104.202.0/24", NDPI_PROTOCOL_CATEGORY_STREAMING }, + { "139.104.203.0/24", NDPI_PROTOCOL_CATEGORY_STREAMING }, + { "139.104.204.0/24", NDPI_PROTOCOL_CATEGORY_STREAMING }, + { "139.104.205.0/24", NDPI_PROTOCOL_CATEGORY_STREAMING }, + { "139.104.206.0/24", NDPI_PROTOCOL_CATEGORY_STREAMING }, + { "139.104.207.0/24", NDPI_PROTOCOL_CATEGORY_STREAMING }, + { "139.104.208.0/24", NDPI_PROTOCOL_CATEGORY_STREAMING }, + { "139.104.209.0/24", NDPI_PROTOCOL_CATEGORY_STREAMING }, + { "139.104.212.0/24", NDPI_PROTOCOL_CATEGORY_STREAMING }, + { "139.104.216.0/24", NDPI_PROTOCOL_CATEGORY_STREAMING }, + { "139.104.217.0/24", NDPI_PROTOCOL_CATEGORY_STREAMING }, + + /* + ADS and tracking + */ + /* Smaato is a digital ad tech platform and ad server */ + { ".smaato.net", CUSTOM_CATEGORY_ADVERTISEMENT }, + { ".smaato.com", CUSTOM_CATEGORY_ADVERTISEMENT }, + /* MoPub, a Twitter company, provides monetization solutions */ + { ".mopub.com", CUSTOM_CATEGORY_ADVERTISEMENT }, + /* AppsFlyer is a SaaS mobile marketing analytics and attribution platform */ + { ".appsflyer.com", CUSTOM_CATEGORY_ADVERTISEMENT }, + /* Adjust is the mobile marketing platform for marketers around the world */ + { ".adjust.com", CUSTOM_CATEGORY_ADVERTISEMENT }, + /* Helpshift enables brands to deliver superior digital customer service digital channels*/ + { ".helpshift.com", CUSTOM_CATEGORY_ADVERTISEMENT }, + /* AppLovin is a mobile marketing platform */ + { ".applovin.com", CUSTOM_CATEGORY_ADVERTISEMENT }, + /* AdRight is an innovative online advertising network */ + { ".adright.com", CUSTOM_CATEGORY_ADVERTISEMENT }, + /* MGID: Native Visitors Acquisition for Advertisers */ + { ".mgid.com", CUSTOM_CATEGORY_ADVERTISEMENT }, + /* InMobi is the world's leading mobile marketing and advertising platform provider */ + { ".inmobi.com", CUSTOM_CATEGORY_ADVERTISEMENT }, + /* AdColony - Elevating mobile advertising */ + { ".adcolony.com", CUSTOM_CATEGORY_ADVERTISEMENT }, + /* Supersonicads: App monetization done right */ + { ".supersonicads.com", CUSTOM_CATEGORY_ADVERTISEMENT }, + /* Criteo is an advertising company that provides online display advertisements */ + { ".criteo.net", CUSTOM_CATEGORY_ADVERTISEMENT }, + { ".criteo.com", CUSTOM_CATEGORY_ADVERTISEMENT }, + /* Flurry is an American mobile analytics, monetization, and advertising company */ + { ".flurry.com", CUSTOM_CATEGORY_ADVERTISEMENT }, + /* Taboola is the world's leading discovery & native advertising platform */ + { ".taboola.com", CUSTOM_CATEGORY_ADVERTISEMENT }, + /* Market research community, a leading global market research effort that studies and reports on Internet trends and behavior. */ + { ".scorecardresearch.com", CUSTOM_CATEGORY_ADVERTISEMENT }, + /* Magnite Inc. (formerly Rubicon Project) is an American online advertising technology firm */ + { ".rubiconproject.com", CUSTOM_CATEGORY_ADVERTISEMENT }, + /* Adnxs.com is run by AppNexus, a company that provides technology, data and analytics to help companies buy and sell online display advertising */ + { ".adnxs.com", CUSTOM_CATEGORY_ADVERTISEMENT }, + /* PubMatic, Inc. is a company that develops and implements online advertising software */ + { ".pubmatic.com", CUSTOM_CATEGORY_ADVERTISEMENT }, + /* “OpenX’s unified monetization platform */ + { ".openx.net", CUSTOM_CATEGORY_ADVERTISEMENT }, + /* AddThis share buttons, targeting tools and content recommendations help you get more likes, shares and followers */ + { ".addthis.com", CUSTOM_CATEGORY_ADVERTISEMENT }, + { ".addthisedge.com", CUSTOM_CATEGORY_ADVERTISEMENT }, + /* NEXAGE offers a mobile advertising platform that provides private and public exchanges */ + { ".nexage.com", CUSTOM_CATEGORY_ADVERTISEMENT }, + /* RadiumOne (formerly GWallet) is a digital advertising company */ + { ".gwallet.com", CUSTOM_CATEGORY_ADVERTISEMENT }, + + { NULL, 0 } +}; + diff --git a/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_dga_match.h b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_dga_match.h new file mode 100644 index 0000000000..6d8dc6aeea --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_dga_match.h @@ -0,0 +1,115 @@ +/* + * ndpi_dga_match.c.inc + * + * Copyright (C) 2011-22 - ntop.org + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +/* ******************************************************************** */ + +/* + Tor + The tor protocol uses SSL to contact peers so it could be exchanged with + standard SSL. However the host names such as + + - www.fgd2iwya7vinfutj5wq5we.com + - www.qbtxzhetq4s2f.com + - www.fgd2iwya7vinfutj5wq5we.net + + See also DGA (Domain Generation Algorithm) + + In essence www..com|net + + To do things properly we should check if host name in the certificate + exists or if the IP address of the SSL peer resolves to a name. Unfortunately + for performance reasons we can't afford to do a DNS lookup in nDPI (however apps + can do it if possible) and thus we have created a heuristic algorithm that tries + to check the host name (in the SSL certificate) to see if it looks like a + random name or a real name. We cannot use a dictionary (how can the kernel read a file?) + and this we use bigrams distribution to decide if the string looks like a + word or just random chars. + + http://www3.nd.edu/~busiforc/handouts/cryptography/Letter%20Frequencies.html + + DGA Datasets + - https://data.netlab.360.com/dga/ + - https://github.com/baderj/domain_generation_algorithms +*/ + +static const char *ndpi_en_bigrams[] = { + "aa", "ba", "ca", "da", "ea", "fa", "ga", "ha", "ia", "ja", "ka", "la", "ma", "na", "oa", "pa", "qa", + "ra", "sa", "ta", "ua", "va", "wa", "xa", "ya", "za", "ab", "bb", "db", "eb", "fb", "gb", "hb", "ib", + "kb", "lb", "mb", "nb", "ob", "pb", "rb", "sb", "tb", "ub", "wb", "yb", "ac", "bc", "cc", "dc", "ec", + "fc", "gc", "hc", "ic", "kc", "lc", "mc", "nc", "oc", "pc", "rc", "sc", "tc", "uc", "wc", "xc", "yc", + "ad", "bd", "cd", "dd", "ed", "fd", "gd", "hd", "id", "kd", "ld", "md", "nd", "od", "pd", "rd", "sd", + "td", "ud", "wd", "xd", "yd", "zd", "ae", "be", "ce", "de", "ee", "fe", "ge", "he", "ie", "je", "ke", + "le", "me", "ne", "oe", "pe", "re", "se", "te", "ue", "ve", "we", "xe", "ye", "ze", "af", "bf", "df", + "ef", "ff", "gf", "hf", "if", "kf", "lf", "mf", "nf", "of", "pf", "rf", "sf", "tf", "uf", "wf", "xf", + "yf", "zf", "ag", "bg", "dg", "eg", "fg", "gg", "hg", "ig", "kg", "lg", "ng", "og", "pg", "rg", "sg", + "tg", "ug", "wg", "yg", "ah", "bh", "ch", "dh", "eh", "fh", "gh", "hh", "ih", "kh", "lh", "mh", "nh", + "oh", "ph", "rh", "sh", "th", "uh", "wh", "xh", "yh", "ai", "bi", "ci", "di", "ei", "fi", "gi", "hi", + "ii", "ji", "ki", "li", "mi", "ni", "oi", "pi", "qi", "ri", "si", "ti", "ui", "vi", "wi", "xi", "yi", + "zi", "aj", "bj", "dj", "ej", "fj", "gj", "hj", "ij", "jj", "kj", "lj", "nj", "oj", "pj", "rj", "sj", + "tj", "uj", "wj", "yj", "ak", "ck", "dk", "ek", "gk", "ik", "kk", "lk", "mk", "nk", "ok", "pk", "rk", + "sk", "tk", "uk", "wk", "yk", "zk", "al", "bl", "cl", "dl", "el", "fl", "gl", "hl", "il", "kl", "ll", + "ml", "nl", "ol", "pl", "rl", "sl", "tl", "ul", "vl", "wl", "xl", "yl", "zl", "am", "bm", "cm", "dm", + "em", "fm", "gm", "hm", "im", "km", "lm", "mm", "nm", "om", "pm", "rm", "sm", "tm", "um", "wm", "xm", + "ym", "zm", "an", "bn", "cn", "dn", "en", "fn", "gn", "hn", "in", "kn", "ln", "mn", "nn", "on", "pn", + "rn", "sn", "tn", "un", "wn", "xn", "yn", "ao", "bo", "co", "do", "eo", "fo", "go", "ho", "io", "jo", + "ko", "lo", "mo", "no", "oo", "po", "ro", "so", "to", "uo", "vo", "wo", "xo", "yo", "zo", "ap", "bp", + "dp", "ep", "fp", "gp", "hp", "ip", "kp", "lp", "mp", "np", "op", "pp", "rp", "sp", "tp", "up", "wp", + "xp", "yp", "zp", "aq", "cq", "dq", "eq", "hq", "iq", "nq", "oq", "qq", "rq", "sq", "uq", "xq", "ar", + "br", "cr", "dr", "er", "fr", "gr", "hr", "ir", "kr", "lr", "mr", "nr", "or", "pr", "rr", "sr", "tr", + "ur", "vr", "wr", "xr", "yr", "as", "bs", "cs", "ds", "es", "fs", "gs", "hs", "is", "ks", "ls", "ms", + "ns", "os", "ps", "rs", "ss", "ts", "us", "vs", "ws", "xs", "ys", "at", "bt", "ct", "dt", "et", "ft", + "gt", "ht", "it", "kt", "lt", "mt", "nt", "ot", "pt", "rt", "st", "tt", "ut", "wt", "xt", "yt", "zt", + "au", "bu", "cu", "du", "eu", "fu", "gu", "hu", "iu", "ju", "ku", "lu", "mu", "nu", "ou", "pu", "qu", + "ru", "su", "tu", "uu", "vu", "wu", "xu", "yu", "zu", "av", "bv", "dv", "ev", "iv", "lv", "mv", "nv", + "ov", "rv", "sv", "tv", "uv", "vv", "zv", "aw", "bw", "dw", "ew", "fw", "gw", "hw", "iw", "kw", "lw", + "mw", "nw", "ow", "pw", "rw", "sw", "tw", "uw", "ww", "xw", "yw", "zw", "ax", "ex", "ix", "nx", "ox", + "rx", "ux", /* "xx", */ "yx", "ay", "by", "cy", "dy", "ey", "fy", "gy", "hy", "ky", "ly", "my", "ny", "oy", + "py", "ry", "sy", "ty", "uy", "vy", "wy", "xy", "yy", "zy", "az", "bz", "cz", "dz", "ez", "gz", "iz", + "lz", "nz", "oz", "pz", "rz", "tz", "uz", "zz", + NULL }; + +/* ******************************************************************** */ + +/* http://practicalcryptography.com/media/cryptanalysis/files/english_trigrams.txt.zip */ +/* Top EN trigrams */ +static const char *ndpi_en_trigrams[] = { +"the", "and", "ing", "ent", "ion", "her", "for", "tha", "nth", "int", "ere", "tio", "ter", "est", "ers", "ati", "hat", "ate", "all", "eth", "hes", "ver", "his", "oft", "ith", "fth", "sth", "oth", "res", "ont", "dth", "are", "rea", "ear", "was", "sin", "sto", "tth", "sta", "thi", "tin", "ted", "ons", "edt", "wit", "san", "din", "ort", "con", "rth", "eve", "eco", "era", "ist", "ngt", "ast", "ill", "com", "ore", "ive", "nce", "one", "edi", "pro", "ess", "out", "ein", "att", "men", "hec", "esa", "hen", "ina", "eri", "ert", "ame", "iti", "ome", "son", "art", "man", "ean", "ona", "eof", "tor", "hea", "ran", "rin", "ine", "eda", "nto", "ave", "nin", "ove", "oun", "ain", "ant", "str", "eto", "hem", "sof", "per", "nde", "ste", "nte", "eas", "dto", "our", "red", "rom", "tof", "ght", "tot", "ese", "cha", "ica", "hei", "hin", "ide", "ndt", "han", "tan", "lin", "not", "der", "ect", "tra", "igh", "fro", "eat", "sti", "hep", "ndi", "ins", "she", "nal", "pla", "als", "een", "nti", "you", "lan", "und", "nda", "rat", "lea", "can", "has", "nds", "nga", "hel", "hed", "inc", "use", "esi", "gth", "asa", "het", "nts", "hav", "hew", "tho", "but", "nan", "ass", "hef", "ies", "ret", "end", "par", "wer", "cti", "ren", "rec", "cal", "its", "ree", "ene", "rst", "eal", "ana", "nst", "cou", "tur", "min", "ity", "yth", "hey", "eca", "oul", "lle", "ard", "rou", "anc", "ost", "pre", "age", "efo", "les", "ssi", "ema", "eso", "tat", "ath", "wor", "ust", "heb", "ewa", "sho", "ind", "sed", "hou", "lly", "uld", "ase", "ure", "ono", "ele", "enc", "nat", "ead", "whe", "ell", "ble", "kin", "ans", "tic", "ali", "sco", "ero", "whi", "ces", "own", "nta", "act", "ber", "ven", "tim", "don", "dan", "ose", "ice", "isa", "ton", "den", "ngs", "ugh", "nes", "lat", "tal", "edo", "ten", "ime", "eme", "ack", "tes", "ple", "ous", "off", "tto", "chi", "ani", "orm", "ned", "ens", "sha", "mor", "iss", "ite", "nge", "tis", "ora", "lli", "ede", "sse", "ade", "rie", "aid", "emo", "ral", "sit", "oin", "hth", "tre", "any", "ake", "ern", "mer", "ric", "dis", "ish", "oug", "ini", "ong", "ntr", "eli", "wil", "led", "sar", "how", "edb", "ich", "spe", "sea", "lit", "yin", "sai", "ndo", "gin", "shi", "ord", "mon", "ena", "new", "por", "ser", "ial", "ori", "tte", "mar", "epr", "ach", "har", "yea", "tri", "che", "tea", "unt", "omp", "who", "tar", "owe", "rit", "ded", "ors", "day", "hee", "thr", "eir", "ond", "mes", "efi", "had", "ner", "ela", "let", "lso", "ris", "ire", "isi", "met", "ars", "hic", "cen", "ari", "fin", "tob", "nsi", "las", "ope", "lar", "des", "fte", "nit", "sen", "ang", "som", "abo", "sio", "two", "ian", "eis", "tsa", "ngi", "uni", "ses", "rep", "rac", "top", "abl", "eti", "ebe", "eha", "now", "oni", "ves", "fir", "erc", "ofa", "ace", "sal", "get", "app", "ane", "rsa", "nof", "heh", "gre", "win", "car", "ete", "mat", "cho", "lay", "swe", "esp", "pri", "tiv", "rof", "gra", "llo", "cor", "eac", "nis", "dit", "gan", "gto", "eno", "bou", "obe", "esh", "tos", "ery", "rma", "ngo", "ewi", "ara", "rto", "rel", "oma", "ala", "asi", "tst", "utt", "irs", "yan", "lla", "sfo", "ork", "ett", "lth", "sid", "aso", "swi", "ita", "set", "twa", "erm", "epa", "ron", "tit", "aft", "dre", "tle", "mil", "dby", "ale", "pen", "bec", "mbe", "toa", "heg", "sch", "sis", "rti", "heo", "low", "lis", "oll", "war", "alt", "elo", "tro", "cat", "med", "lic", "hil", "ile", "tht", "rem", "rre", "ays", "oli", "rso", "nsa", "omm", "old", "cre", "ata", "ise", "cia", "pos", "ger", "sma", "uti", "sts", "sec", "sbe", "eni", "sre", "lon", "isc", "nse", "nor", "bee", "ano", "nco", "fer", "itt", "sno", "epo", "eon", "eds", "eam", "esc", "fic", "ech", "way", "ved", "ike", "alo", "yof", "ash", "ote", "ook", "eta", "erf", "onc", "emi", "eci", "ats", "erv", "rsi", "sst", "ili", "eed", "ary", "sso", "mth", "vel", "dat", "mea", "esu", "uri", "pan", "rch", "uth", "spo", "wou", "ffe", "sel", "rei", "rge", "rse", "tom", "usi", "ega", "sas", "ssa", "ato", "erw", "ood", "ama", "sat", "ece", "mpl", "tso", "gen", "arr", "dea", "sca", "dof", "ual", "dbe", "ewo", "nso", "rte", "vin", "adi", "ndw", "ndh", "edf", "swh", "see", "toc", "tch", "ewh", "eba", "onl", "tem", "dwi", "err", "lec", "lac", "eop", "tel", "ami", "ehe", "dfo", "ien", "uch", "ndc", "ely", "dst", "ici", "edw", "aus", "nfo", "ntt", "nne", "ewe", "sur", "exp", "bet", "ket", "inf", "etr", "yto", "rde", "rce", "omt", "evi", "vet", "pec", "rai", "arl", "yst", "sou", "him", "ref", "lik", "ges", "cto", "urn", "fou", "lls", "rne", "wha", "tow", "ndr", "das", "ssu", "spr", "opl", "rad", "esw", "onf", "col", "omi", "duc", "mos", "ark", "tai", "ick", "hos", "ult", "emb", "ign", "hoo", "too", "nea", "itw", "ppe", "ffi", "ula", "nam", "mis", "ced", "los", "gam", "nas", "reg", "lie", "olo", "twe", "ann", "tod", "ail", "ota", "iso", "aye", "tco", "gro", "cam", "efe", "onw", "bea", "ngl", "wee", "edu", "rew", "aga", "til", "ode", "ory", "erb", "bac", "len", "nly", "imp", "aro", "ehi", "amp", "mpa", "spa", "ivi", "ict", "stt", "net", "rta", "hre", "erh", "eet", "row", "sor", "epe", "tie", "nch", "tru", "mal", "cte", "ndm", "atc", "fac", "twi", "orc", "dco", "ndp", "fre", "ofs", "arg", "ima", "dec", "eng", "ria", "owi", "eit", "pol", "ked", "inn", "bli", "dow", "etw", "clu", "hol", "air", "rri", "rig", "sla", "rop", "ofi", "toh", "non", "ool", "isp", "mak", "rev", "equ", "lyt", "jus", "lya", "ole", "cit", "pea", "vea", "kno", "oca", "tak", "acc", "cer", "ada", "sup", "ngw", "peo", "dso", "rdi", "tou", "cau", "rov", "tfo", "stu", "pin", "tly", "ied", "ues", "tsi", "awa", "ler", "wel", "epl", "hor", "erp", "hro", "ute", "oss", "tbe", "tyo", "tog", "heu", "byt", "ngf", "ngh", "hal", "ban", "ism", "rol", "atu", "sam", "hom", "dhi", "ild", "gai", "rds", "edh", "ino", "ego", "egi", "llt", "arc", "ram", "oto", "cle", "dhe", "aco", "orl", "cas", "riv", "ofc", "orn", "rna", "urs", "avi", "nar", "ubl", "tti", "mem", "amo", "rme", "qui", "que", "nee", "ndf", "inh", "ink", "eho", "ncl", "ock", "vic", "rts", "ets", "leg", "cla", "tse", "eor", "nci", "sli", "erg", "did", "rco", "bas", "loc", "ebu", "hig", "asp", "ext", "egr", "dia", "tab", "bri", "cei", "ras", "dal", "alc", "run", "ppo", "ofh", "cke", "atw", "cea", "ott", "bal", "nsh", "mai", "dar", "asb", "rfo", "vis", "owa", "ude", "rsh", "ifi", "loo", "hit", "uar", "cet", "ovi", "ndb", "tol", "uto", "lem", "bro", "vid", "rio", "uct", "try", "efr", "sde", "dha", "bel", "bil", "tas", "suc", "ebo", "oro", "sev", "mit", "yco", "nwh", "neo", "rvi", "dev", "eun", "wan", "sig", "ths", "asc", "dsa", "tac", "emp", "ank", "rke", "nhe", "nme", "nre", "ros", "ngc", "may", "unc", "nic", "nni", "ura", "ful", "oco", "osi", "def", "ngr", "tec", "say", "nbe", "yre", "ntl", "dge", "sac", "sfr", "tsh", "isn", "ldi", "arm", "cur", "eag", "ndl", "eld", "smo", "org", "llb", "del", "poi", "iat", "urt", "ker", "sol", "tma", "mus", "bei", "qua", "lys", "dwa", "nma", "hip", "rod", "efa", "inv", "isl", "pon", "yon", "pas", "lia", "reo", "lif", "tia", "cri", "nsu", "rly", "lbe", "oha", "ndd", "ham", "ept", "ebr", "bes", "ngp", "yha", "tme", "lef", "add", "ofm", "mad", "dma", "dur", "mme", "mas", "ize", "ics", "ybe", "dno", "ege", "gat", "dde", "cul", "uta", "meo", "lco", "val", "atr", "ecu", "ged", "ndu", "yar", "det", "isf", "ofp", "spi", "rot", "rob", "ped", "lde", "oti", "eek", "dem", "bef", "mov", "els", "iou", "swa", "erl", "imi", "fam", "nex", "lof", "fan", "oes", "scr", "isw", "ull", "erd", "inm", "soc", "rni", "eel", "apa", "mic", "dep", "rda", "pit", "ogr", "sun", "esf", "ida", "gar", "cks", "rag", "geo", "goo", "lud", "nhi", "ife", "bra", "ddi", "pat", "ceo", "ngb", "kes", "yer", "nwa", "dra", "lyi", "odu", "pub", "inu", "orr", "aya", "lor", "ttl", "hon", "sab", "nha", "ldb", "liv", "edr", "seo", "oad", "rmo", "dle", "ecr", "udi", "gon", "alf", "die", "rwa", "lst", "lig", "rid", "rmi", "ofe", "urc", "sic", "ape", "ayi", "bot", "eye", "fri", "ila", "ryo", "ado", "alm", "sag", "nwi", "wed", "nno", "abi", "rve", "ees", "aki", "fie", "bor", "dou", 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"bpc", "xmm", "wdl", "rkz", "ohg", "zcr", "jko", "mtt", "tks", "yfc", "pfc", "dfd", "crh", "wyd", "xxa", "djd", "voh", "nvh", "qvi", "zih", "djc", "yax", "xyf", "mtm", "wdp", "vhi", "tgt", "ppn", "lbj", "fub", "fcz", "bgu", "bsv", "qun", "hdb", "fnf", "syj", "fnd", "dkw", "fyy", "cns", "tgd", "qft", "dtl", "ulq", "svt", "jux", "fyg", "dmg", "wts", "wua", "vph", "igz", "drz", "dmh", "dhb", "hdp", "sbf", "lmk", "lmj", "jbe", "xvo", "oyv", "izp", "mlp", "tbt", "yuj", "rgj", "rhr", "wps", "dkg", "mdh", "nzr", "ygn", "nfy", "mht", "clt", "ivb", "pfs", "bdp", "axv", "oyz", "dnm", "vuk", "fgt", "sdk", "izn", "nmw", "pnp", "fns", "nxr", "hoz", "hrp", "btd", "jch", "xol", "rlv", "phj", "pcd", "png", "uyv", "npw", "vrs", "xob", "pyv", "jep", "ihy", "pnt", "jle", "brt", "ggf", "duz", "hux", "ptk", "rxe", "lbk", "bls", "ioz", "byx", "lrt", "yrb", "wcs", "qst", "zaj", "vdf", "zdr", "vtu", "bsq", "wrc", "nmn", "hbc", "bpp", "tkg", "xgu", "uxk", "lrd", "grp", "dmw", "txv", "xje", "prd", "dmf", "zut", "xau", "lyx", "nwv", "nbj", "obz", "svc", "pvc", "scv", "lbd", "djm", "ikg", "rzw", "vpt", "nzc", "nsx", "egv", "dwt", "guw", "uzw", "tuz", "ywy", "dhw", "pyk", "jcp", "hcd", "bqu", "pji", "aqd", "mfm", "bpw", "cmw", "dhl", "twp", "xnu", "tnp", "sfb", "pgc", "qim", "sfw", "fhs", "xyw", "qab", "tmn", "aaq", "zsf", "udk", + +#if 0 +"glt", "gtm", "iij", "hfs", "uht", "pll", "srr", "tmg", "gyj", "zui", "vce", "qre", "izf", "nzm", "fpp", "zzr", "voj", "jip", "bbq", "trl", "nrn", "ehf", "uut", "rxb", "nmv", "sqa", "qpr", "vmw", "jhi", "xsf", "xip", "hbb", "mtl", "lhs", "ejb", "cfb", "dvc", "swf", "spx", "fws", "wum", "ozm", "ocq", "djt", "fpy", "pyu", "nxw", "khn", "bmt", "zuo", "zve", "tcg", "smk", "dcz", "frp", "sfd", "nzt", "mxi", "fpg", "nfp", "nrr", "lbm", "zuh", "sxr", "qbe", "fui", "gcd", "aqm", "gpt", "ytl", "cbm", "kcs", "ybp", "svy", "vje", "ykw", "sfp", "mdm", "sff", "kuu", "gtp", "duj", "btv", "wcd", "prf", "ivh", "hpw", "qaw", "xoc", "nmg", "hgm", "uij", "vur", "wdg", "pgw", "yzh", "izl", "zua", "wdm", "udz", "prm", "ilz", "evk", "vwr", "eyz", "spv", "djb", "trw", "bpt", "udj", "qbu", "ixj", "hvs", "izk", "xep", "slf", "mbg", "gbm", "fks", "rqi", "xix", "jbl", "ogj", "hbp", "ggn", "qor", "ylk", "zsl", "hct", "ybm", "huu", "zzh", "vnd", "uhy", "lcf", "aej", "frt", "vru", "twm", "wyr", "ivv", "aoj", "pyj", "ilq", "bds", "uzn", "prb", "ncj", "kzo", "bnu", "kaq", "buu", "swm", "fiq", "ppv", "qam", "jdu", "ojs", "slm", "nwf", "ikv", "czi", "vms", "gkm", "fzu", "pgf", "fgs", "qon", "iuw", "ejl", "nlr", "juj", "jgr", "mgt", "ccn", "zby", "prw", "czs", "pgp", "lrb", "cpd", "wkm", "aoe", "abv", "xps", "epq", "ybs", "rzs", "jrf", "tlh", "svl", "fuf", "yxa", "lrc", "cmb", "bix", "lxi", "lpv", "lcz", "lww", "dtk", "rsx", "lcn", "juc", "lnr", "quh", "rvr", "dbj", "ibp", "dlw", "wkh", "xig", "uoj", "ioy", "wrd", "fck", "knd", "dlr", "oiu", "jcr", "dmk", "xud", "xlu", "djh", "ypg", "iuj", "xph", "ehk", "umq", "sxc", "rkq", "baq", "bft", "xyb", "rcv", "njw", "aey", "ybh", "zpu", "dxm", "skk", "kvs", "wlv", "mlf", "xeg", "xom", "uzy", "ozt", "cnt", "ylf", "lgd", "imz", "tgb", "sxb", "mdp", "dws", "jrp", "iuy", "gvs", "pvs", "txt", "tfw", "qbt", "cji", "yiu", "ycz", "zyz", "tqb", "fuw", "auq", "nlh", "nhh", "ejv", "bkn", "uxr", "kyy", "hml", "hcn", "wgs", "uvu", "lbn", "nvr", "pnd", "dfg", "mfc", "wuh", "rws", "tgn", "kky", "wms", "hbs", "cwt", "pnr", "jdo", "rfg", "dnp", "ycp", "nxc", "miq", "dlm", "aqp", "wuc", "rrv", "glc", "yww", "yff", "dcg", "hdl", "fvu", "fhp", "qdi", "jbo", "gyk", "blt", "prr", "lvu", "rxu", "tuu", "jjo", "cmm", "bko", "dmn", "hmf", "bnx", "guh", "dfp", "ozw", "nwb", "fpn", "dqi", "gcm", "fkw", "rvc", "ufk", "hpf", "sjs", "dnw", "fdm", "ywc", "gox", "nyz", "lgm", "bvo", "wfc", "mmn", "grc", "dlh", "mkm", "ipq", "ocz", "vbi", "vdu", "hmh", "wkt", "prn", "grm", "ggg", "yxm", "ajl", "fdp", "ejh", "dxe", "dtg", "tkw", "tgp", "jez", "fqa", "uix", "vui", "fqi", "nrg", "jso", "fhm", "hpv", "dwb", "bbf", "mnn", "bmg", "zsm", "jyo", "hks", "uoz", "brd", "nhk", "gtz", "dbw", "lnn", "tjp", "zzg", "qbj", "pzo", "zsr", "ozc", "cmr", "ioq", "bbm", "nxf", "prh", "mdn", "eiq", "sjp", "kbp", "jaq", "dbd", "cmh", "gll", "yej", "luy", "kps", "xkm", "hpj", "jbr", "cnr", "ihl", "elx", "ijr", "bnr", "dxb", "twb", "hrr", "dgc", "cww", "sxe", "tdl", "tdg", "pcv", "btn", "kzi", "aox", "xyz", "nfh", "vsy", "slw", "ccg", "xsb", "wdd", "fwu", "avb", "tpn", "smj", "qaf", "czw", "rpv", "mhw", "vdd", "zgi", "dcv", "ztu", "pgm", "lzs", "gcp", "ejj", "nwm", "nbd", "uaj", "jpo", "cmf", "xja", "lnl", "crb", "zti", "sjc", "ojp", "gcb", "cdv", "rqb", "slv", "vpu", "vko", "nlm", "ejn", "rjp", "nxu", "mgp", "wfp", "wdn", "pdw", "lgs", "vki", "gtb", "tfd", "rjd", "caq", "wcy", "cdn", "dgk", "rhb", "fgy", "cgh", "avf", "jni", "bbd", "khc", "fbn", "bng", "uhh", "nzd", "wkc", "waq", "jga", "aqr", "zug", "hqa", "ytc", "hdn", "xsd", "xee", "txe", "lpj", "wcb", "djw", "ykj", "fwp", "srn", "uqi", "ymh", "pff", "fgc", "jsm", "mkl", "dwp", "tmv", "yrw", "vtw", "pvt", "jno", "wwk", "wtc", "ehg", "xtq", "mtn", "jss", "ltq", "jtw", "nlf", "mdd", "uxn", "sln", "pnw", "djj", "hgy", "bmd", "zru", "ygw", "xaw", "njd", "yuv", "blm", "ygg", "sbj", "cfd", "bwr", "puw", "bkg", "oqi", "wwu", "vcu", "iuf", "mtd", "dwc", "iqb", "kll", "qsh", "jru", "dbf", "phv", "mxa", "sfg", "jpl", "cuh", "tjs", "ocg", "cmg", "hgw", "fmh", "dkc", "krd", "kox", "dqb", "goq", "emx", "vhf", "iue", "srg", "rrg", "fbm", "yhr", "vpm", "llx", "yez", "ivk", "bbg", "vcc", "kfc", "acj", "trg", "nxo", "rhn", "yuf", "uaz", "krh", "ohf", "srl", "slg", "fdd", "ctz", "zij", "ymg", "vdv", "nxx", "cbb", "xue", "vua", "ohj", "aqe", "qut", "yfs", "iht", "lkj", "iui", "pgh", "ivm", "svm", "azk", "qus", "wio", "ihr", "iuh", "tnr", "nhn", "xey", "kpp", "wyi", "bpd", "vfe", "jne", "hdj", "zok", "rhc", "rfy", "hrn", "gdc", "uuu", "uqa", "jtr", "dcj", "trf", "ewx", "dnj", "gtj", "wwj", "ojc", "nkz", "wwv", "ukv", "vpw", "ucn", "vsv", "mtf", "ugy", "slh", "kkk", "jmu", "wgm", "ssx", "svh", "mlw", "fpd", "ogv", "npn", "yft", "mdf", "gds", "hht", "jsw", "ffq", "cpw", "jei", "gbb", "ckx", "gky", "fpf", "qof", "fng", "okq", "qla", "opz", "nwn", "dgd", "tbw", "wct", "pcy", "hnq", "dvp", "cuk", "cgt", "qiw", "fmn", "njb", "mhc", "fbt", "bbp", "yrf", "tln", "xwr", "utx", "rvn", "csx", "xry", "mgw", "juw", "yzu", "kls", "ozd", "jiy", "dvt", "vmu", "juh", "fmg", "zgu", "xyp", "dkb", "hft", "rjs", "pnm", "pfw", "dxr", "yyy", "mks", "jpi", "fkg", "xni", "jsu", "cwc", "prz", "prk", "sxx", "zsw", "trr", "ojt", "cjs", "uyj", "kze", "ivg", "vax", "fwc", "uhw", "nbf", "lht", "dlg", "aql", "ugk", "gnk", "vdm", "qbr", "hpg", "cgs", "nvp", "blc", "cnd", "kww", "zsd", "wpm", "rcj", "ypf", "uua", "syy", "nvt", "lzu", "klm", "yht", "rwc", "sxo", "crw", "wfs", "fyv", "crr", "xmr", "rxt", "vpn", "qls", "bnl", "amx", "ziv", "tbd", "rxm", "rrj", "zny", "ovv", "wuw", "wmt", "sjd", "ubz", "dlf", "sdg", "wpc", "tcz", "nwp", "mhl", "duy", "rjc", "txs", "gxu", "cij", "bza", "krt", "krp", "ybd", "uhm", "srv", "qse", "azg", "bmr", "yrp", "scz", "hzw", "djf", "cll", "vpp", "swl", "nuj", "njm", "cfp", "lgp", "tjh", "ogk", "dwm", "cdh", "spk", "nzp", "jmc", "frn", "ypb", "fdl", "qbc", "hzu", "kcn", "cax", "gtl", "mgb", "fgn", "brz", "bfc", "tnl", "tfb", "lhc", "jlo", "clw", "zsb", "qde", "lzw", "fsj", "hrf", "fjr", "uzd", "ixx", "fgp", "dkt", "bze", "kkl", "pnb", "hzt", "giy", "tgc", "kgm", "yoz", "dhn", "zja", "pvp", "izg", "bfs", "khb", "frf", "fdv", "doq", "plp", "wcp", "qsi", "sxw", "pgb", "nmk", "yfm", "shz", "gkl", "iys", "jsk", "sfh", "qbm", "zzd", "rvw", "khp", "frr", "nbw", "ejf", "wbs", "jke", "qio", "joz", "ejw", "whp", "oez", "gdn", "wtf", "pld", "tlw", "gyy", "kwu", "gtk", "plm", "nnz", "idx", "fvl", "xcy", "wpt", "qaa", "mln", "cgy", "xsr", "rdx", "fdt", "qii", "pft", "hln", "cbt", "kgt", "kcb", "yuo", "gcn", "gfc", "bhd", "kgw", "zcu", "xaa", "sck", "uyk", "gdv", "vsj", "vby", "qta", "ksz", "clb", "wfm", "tyx", "tjm", "msz", "ycf", "jcc", "rbk", "mhr", "tqa", "pxi", "ozb", "jwe", "plw", "nvc", "tfp", "lgw", "cpb", "szw", "jfr", "gdw", "wpp", "vrt", "pmv", "gqb", "hgs", "lkk", "khh", "wox", "crn", "uwm", "mwt", "hkd", "pyy", "lhd", "jij", "trz", "agk", "dhh", "yhs", "dvb", "hhp", "ykc", "tbf", "jds", "cbw", "ajf", "gpw", "wrm", "hww", "flq", "puh", "jva", "jya", "qli", "lgt", "gwb", "sxf", "zju", "ziy", "xah", "mvu", "qsc", "lgn", "gct", "ucp", "mmv", "tzj", "fpb", "zup", "gtf", "pku", "nqb", "qhe", "tuj", "qil", "pdl", "xkl", "rwb", "mgc", "iuz", "dkp", "wku", "jfi", "bnn", "rvm", "svg", "pcn", "ijd", "wud", "kdj", "czu", "afj", "cny", "xeo", "qib", "fvs", "fdj", "eqw", "ywu", "ymk", "xyr", "qte", "sqi", "ybn", "jrk", "vum", "zzz", "agv", "mdl", "hpy", "frw", "cdl", "uud", "mhb", "fcg", "ytm", "rvd", "mgd", "jji", "quy", "mxm", "wft", "svw", "fuu", "zuy", "tkt", "fnh", "dxp", "zfu", "ojm", "txr", "rhw", "fxs", "dxs", "wmp", "rwm", "mwm", "mwy", "yln", "wcf", "kns", "jrl", "zbl", "xow", "vtt", "knj", "jvo", "zce", "jki", "aqg", "xew", "bmh", "tff", "btg", "rwt", "hgp", "cvc", "swd", "ugv", "qid", "lrp", "nxh", "wkb", "tkb", "wiy", "ufw", "mky", "fnt", "tlm", "ddk", "jte", "iqs", "ykt", "mbk", "kcc", "hcf", "klt", "dnl", "bhr", "azf", "nxn", "szs", "iuo", "hzh", "fxe", "dvf", "hbf", "brg", "auu", "aqq", "zyu", "cng", "xef", "wzi", "wji", "pnh", "lhr", "kgh", "jcl", "efx", "xmc", "txm", "rpj", "syx", "cbp", "fxm", "bpb", "xxs", "wiu", "nhg", "dfh", "tjc", "rwd", "fhn", "cwm", "vyj", "hpn", "cgc", "lwu", "lvc", "jsf", "gvu", "djv", "ziu", "eqs", "mfy", "ijm", "dqv", "tjd", "sgf", "mhp", "lvt", "rzl", "wyf", "cvt", "yrk", "qsp", "yvl", "ejk", "ygd", "frg", "xul", "xsn", "rvh", "mgy", "pmk", "nlg", "hxi", "fuo", "tjb", "ftq", "gkg", "yhm", "jbi", "ytb", "pij", "gfs", "wkl", "qbb", "tvy", "mlm", "dvh", "khk", "tck", "plf", "dvm", "whs", "vct", "pdh", "jhu", "snj", "qah", "eqt", "clr", "wln", "iww", "wnz", "vji", "nhf", "mdg", "npv", "aqn", "njf", "gtg", "cpn", "wbb", "tkc", "qum", "xih", "wgc", "pfp", "rfn", "bzu", "bld", "agj", "txb", "jps", "iwu", "nwl", "bvr", "wzo", "luu", "ehv", "jwo", "ajy", "yhd", "lxa", "gpd", "wwy", "qld", "flv", "dln", "xms", "wgn", "tkp", "rfk", "snv", "clp", "nrv", "hgt", "axk", "sjh", "qwo", "qbd", "nvm", "fgb", "dpj", "rbv", "yym", "kcd", "wyb", "vry", "mlk", "qih", "hrg", "uul", "sjb", "gbd", "whl", "pdy", "hnz", "fdb", "afv", "kuv", "wuk", "uzl", "lvr", "yrl", "vuz", "jjh", "kgs", "yjp", "jdd", "vdh", "bjs", "yfy", "plb", "xgl", "wza", "snn", "rhl", "bny", "qiu", "gmj", "ktm", "kld", "hzb", "dxt", "kpt", "khd", "vpb", "rmq", "msx", "gmn", "tlr", "svd", "wrp", "pdb", "snk", "oqa", "tcv", "wgh", "xxc", "kbs", "jti", "dxc", "dbg", "vgi", "rxw", "wrb", "swg", "rrk", "pfm", "cfw", "vpf", "rjh", "pdd", "hhd", "gpy", "tnk", "tcj", "spj", "mjr", "cgm", "uxg", "qbi", "bzo", "grr", "bck", "lgc", "prl", "jgo", "hbt", "sxl", "wue", "gzu", "poj", "ojv", "kvd", "jpg", "fiy", "ygp", "wyw", "eoq", "wui", "wcm", "hmv", "dhg", "wtg", "vuv", "jku", "jeg", "aiq", "vbl", "rxr", "zez", "xka", "pnf", "grf", "fht", "vju", "emz", "lws", "krc", "hgb", "grw", "dwl", "xkn", "njn", "dkf", "nzn", "cuv", "azv", "iug", "vuo", "tbj", "tlg", "nkq", "pvr", "ptq", "iux", "vbs", "tmz", "rxp", "kbb", "xht", "cff", "fkp", "vud", "puo", "bcj", "rjj", "ocv", "gft", "euu", "vup", "jbs", "mfw", "hzs", "hhm", "gpg", "uuc", "svf", "hbm", "clm", "nln", "bgl", "gdh", "cpg", "wtt", "szp", "piy", "ifq", "pks", "jej", "fvr", "bmb", "zwr", "ucm", "ljs", "pjs", "yhp", "lzm", "jsb", "gpf", "tjf", "tfg", "prg", "wrz", "lsx", "mkt", "fkb", "unx", "pdm", "wub", "ikj", "xeu", +#endif + +NULL +}; + +/* ******************************************************************** */ + +static const char *ndpi_en_impossible_bigrams[] = { + "bk", "bq", "bx", "cb", "cf", "cg", "cj", "cp", /* "cv", */ "cw", "cx", "dx", "fk", "fq", "fv", "fx", /* "ee", removed it can be found in 'meeting' */ + "fz", "gq", "gv", "gx", "hh", "hk", "hv", "hx", "hz", "iy", "jb", /* "jc", jcrew.com */ "jd", "jf", "jg", "jh", "jk", + "jl", "jm", "jn", "jp", "jq", /* "jr",*/ /* "js", */ "jt", "jv", "jw", "jx", "jy", "jz", /* "kg", */ "kq", "kv", "kx", + "kz", "lq", "lx", /* "mg" tamgrt.com , */ "mj", /* "mq", mqtt */ "mx", "mz", "pq", "pv", "px", "qb", "qc", "qd", "qe", "qf", "ii", + "qg", "qh", "qj", "qk", "ql", "qm", "qn", "qo", "qp", "qr", "qs", "qt", "qv", "qw", "qx", "qy", "uu", + "qz", "sx", "sz", "tq", "tx", "vb", "vc", "vd", "vf", "vg", "vh", "vj", /* "vm" Used in VMs */ "vn", /* "vp", Removed for vpbank.com */ "bw", /* "vk", "zr" Removed for kavkazr */ + "vq", /* "vt", gvt1.com, gvt2.com */ "vw", "vx", "vz", "wq", "wv", "wx", "wz", /* "xb", foxbusiness.com */ + "xg", "xj", "xk", "xv", "xz", "xw", /* "yd", Removed for anywayanyday.com */ /*"yp", Removed for paypal */ + "yj", "yq", "yv", "yz", "yw", "zb", "zc", "zg", "zh", "zj", "zn", "zq", "zs", "zx", /* "wh", e.g. why */ "wk", + "wb", "zk", "kp", "zk", "xy", "xx", + NULL }; diff --git a/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_ethereum_match.c b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_ethereum_match.c new file mode 100644 index 0000000000..691f6b3b0b --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_ethereum_match.c @@ -0,0 +1,51 @@ +/* + * + * This file is generated automatically and part of nDPI + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +/* ****************************************************** */ +#include "../ndpi_typedefs.h" +#include "../ndpi_protocol_ids.h" + +static ndpi_network ndpi_protocol_mining_protocol_list[] = { + { 0x128A6C43 /* 18.138.108.67/32 */, 32, NDPI_PROTOCOL_MINING }, + { 0x03D12D4F /* 3.209.45.79/32 */, 32, NDPI_PROTOCOL_MINING }, + { 0x34BBCF1B /* 52.187.207.27/32 */, 32, NDPI_PROTOCOL_MINING }, + { 0xBFEAA2C6 /* 191.234.162.198/32 */, 32, NDPI_PROTOCOL_MINING }, + { 0x34E7A56C /* 52.231.165.108/32 */, 32, NDPI_PROTOCOL_MINING }, + { 0x682AD919 /* 104.42.217.25/32 */, 32, NDPI_PROTOCOL_MINING }, + { 0x416C4665 /* 65.108.70.101/32 */, 32, NDPI_PROTOCOL_MINING }, + { 0x9D5A23A6 /* 157.90.35.166/32 */, 32, NDPI_PROTOCOL_MINING }, + { 0x34B0070A /* 52.176.7.10/32 */, 32, NDPI_PROTOCOL_MINING }, + { 0x34B0644D /* 52.176.100.77/32 */, 32, NDPI_PROTOCOL_MINING }, + { 0x34E8F398 /* 52.232.243.152/32 */, 32, NDPI_PROTOCOL_MINING }, + { 0xC051D0DF /* 192.81.208.223/32 */, 32, NDPI_PROTOCOL_MINING }, + { 0x12A8B656 /* 18.168.182.86/32 */, 32, NDPI_PROTOCOL_MINING }, + { 0x340E97B1 /* 52.14.151.177/32 */, 32, NDPI_PROTOCOL_MINING }, + { 0x34A92A65 /* 52.169.42.101/32 */, 32, NDPI_PROTOCOL_MINING }, + { 0x34039EB8 /* 52.3.158.184/32 */, 32, NDPI_PROTOCOL_MINING }, + { 0x9F591CD3 /* 159.89.28.211/32 */, 32, NDPI_PROTOCOL_MINING }, + { 0x338D4E35 /* 51.141.78.53/32 */, 32, NDPI_PROTOCOL_MINING }, + { 0x0D5D3689 /* 13.93.54.137/32 */, 32, NDPI_PROTOCOL_MINING }, + { 0x5EED3672 /* 94.237.54.114/32 */, 32, NDPI_PROTOCOL_MINING }, + { 0x12DAFA42 /* 18.218.250.66/32 */, 32, NDPI_PROTOCOL_MINING }, + { 0x030B9343 /* 3.11.147.67/32 */, 32, NDPI_PROTOCOL_MINING }, + { 0x2E04637A /* 46.4.99.122/32 */, 32, NDPI_PROTOCOL_MINING }, + { 0x586346B6 /* 88.99.70.182/32 */, 32, NDPI_PROTOCOL_MINING }, + /* End */ + { 0x0, 0, 0 } +}; diff --git a/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_google_cloud_match.c b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_google_cloud_match.c new file mode 100644 index 0000000000..bdc1bd4d51 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_google_cloud_match.c @@ -0,0 +1,558 @@ +/* + * + * This file is generated automatically and part of nDPI + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +/* ****************************************************** */ +#include "../ndpi_typedefs.h" +#include "../ndpi_protocol_ids.h" + +static ndpi_network ndpi_protocol_google_cloud_protocol_list[] = { + { 0x22500000 /* 34.80.0.0/15 */, 15, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22890000 /* 34.137.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23B98000 /* 35.185.128.0/19 */, 19, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23B9A000 /* 35.185.160.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23BB9000 /* 35.187.144.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23BDA000 /* 35.189.160.0/19 */, 19, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23C28000 /* 35.194.128.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23C98000 /* 35.201.128.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23CEC000 /* 35.206.192.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23DC2000 /* 35.220.32.0/21 */, 21, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23DD8000 /* 35.221.128.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23E58000 /* 35.229.128.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23EA0000 /* 35.234.0.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23EB1000 /* 35.235.16.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23EC8000 /* 35.236.128.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23F22000 /* 35.242.32.0/21 */, 21, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x689BC000 /* 104.155.192.0/19 */, 19, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x689BE000 /* 104.155.224.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x68C78000 /* 104.199.128.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x68C7C000 /* 104.199.192.0/19 */, 19, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x68C7E000 /* 104.199.224.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x68C7F200 /* 104.199.242.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x68C7F400 /* 104.199.244.0/22 */, 22, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x68C7F800 /* 104.199.248.0/21 */, 21, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x6BA7B000 /* 107.167.176.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x82D3F000 /* 130.211.240.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x225C0000 /* 34.92.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22608000 /* 34.96.128.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22685800 /* 34.104.88.0/21 */, 21, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x227C1800 /* 34.124.24.0/21 */, 21, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22960000 /* 34.150.0.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23D78000 /* 35.215.128.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23DC1B00 /* 35.220.27.0/24 */, 24, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23DC8000 /* 35.220.128.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23F14000 /* 35.241.64.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23F21B00 /* 35.242.27.0/24 */, 24, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23F30800 /* 35.243.8.0/21 */, 21, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22540000 /* 34.84.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22550000 /* 34.85.0.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22683E00 /* 34.104.62.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22688000 /* 34.104.128.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x227FBE00 /* 34.127.190.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22920000 /* 34.146.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x229D4000 /* 34.157.64.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x229DA400 /* 34.157.164.0/22 */, 22, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x229DC000 /* 34.157.192.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23BBC000 /* 35.187.192.0/19 */, 19, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23BD8000 /* 35.189.128.0/19 */, 19, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23BEE000 /* 35.190.224.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23C26000 /* 35.194.96.0/19 */, 19, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23C80000 /* 35.200.0.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23D50000 /* 35.213.0.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23DC3800 /* 35.220.56.0/22 */, 22, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23DD4000 /* 35.221.64.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23E6F000 /* 35.230.240.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23F23800 /* 35.242.56.0/22 */, 22, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23F34000 /* 35.243.64.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x68C65000 /* 104.198.80.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x68C67000 /* 104.198.112.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22610000 /* 34.97.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22683100 /* 34.104.49.0/24 */, 24, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x227FB100 /* 34.127.177.0/24 */, 24, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23D98000 /* 35.217.128.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23DC2D00 /* 35.220.45.0/24 */, 24, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23F22D00 /* 35.242.45.0/24 */, 24, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23F33800 /* 35.243.56.0/21 */, 21, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22402000 /* 34.64.32.0/19 */, 19, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22404000 /* 34.64.64.0/22 */, 22, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22404400 /* 34.64.68.0/22 */, 22, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22404800 /* 34.64.72.0/21 */, 21, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22405000 /* 34.64.80.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22406000 /* 34.64.96.0/19 */, 19, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22408000 /* 34.64.128.0/22 */, 22, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22408400 /* 34.64.132.0/22 */, 22, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22408800 /* 34.64.136.0/21 */, 21, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22409000 /* 34.64.144.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x2240A000 /* 34.64.160.0/19 */, 19, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x2240C000 /* 34.64.192.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23D80000 /* 35.216.0.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x225D0000 /* 34.93.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22648000 /* 34.100.128.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22686C00 /* 34.104.108.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x227C2C00 /* 34.124.44.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x229D5700 /* 34.157.87.0/24 */, 24, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x229DD700 /* 34.157.215.0/24 */, 24, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23C88000 /* 35.200.128.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23C92900 /* 35.201.41.0/24 */, 24, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23CFC000 /* 35.207.192.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23DC2A00 /* 35.220.42.0/24 */, 24, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23EAD000 /* 35.234.208.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23F22A00 /* 35.242.42.0/24 */, 24, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23F40000 /* 35.244.0.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22687800 /* 34.104.120.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x227C3800 /* 34.124.56.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x227ED000 /* 34.126.208.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22830000 /* 34.131.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22158000 /* 34.21.128.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22570000 /* 34.87.0.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22578000 /* 34.87.128.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22683A00 /* 34.104.58.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22686A00 /* 34.104.106.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x227C2A00 /* 34.124.42.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x227C8000 /* 34.124.128.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x227E4000 /* 34.126.64.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x227E8000 /* 34.126.128.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x228E8000 /* 34.142.128.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x228F8000 /* 34.143.128.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x229D5200 /* 34.157.82.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x229D5800 /* 34.157.88.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x229DD200 /* 34.157.210.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23B9B000 /* 35.185.176.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23BA9000 /* 35.186.144.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23BBE000 /* 35.187.224.0/19 */, 19, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23C58000 /* 35.197.128.0/19 */, 19, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23C6C000 /* 35.198.192.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23D58000 /* 35.213.128.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23DC1800 /* 35.220.24.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23EAC000 /* 35.234.192.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23F08000 /* 35.240.128.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23F21800 /* 35.242.24.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23F78000 /* 35.247.128.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22651200 /* 34.101.18.0/24 */, 24, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22651400 /* 34.101.20.0/22 */, 22, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22651800 /* 34.101.24.0/22 */, 22, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22652000 /* 34.101.32.0/19 */, 19, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22654000 /* 34.101.64.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22658000 /* 34.101.128.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22804000 /* 34.128.64.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23DB0000 /* 35.219.0.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x2257C000 /* 34.87.192.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22686800 /* 34.104.104.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22744000 /* 34.116.64.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x227C2800 /* 34.124.40.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22974000 /* 34.151.64.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22978000 /* 34.151.128.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23BD0000 /* 35.189.0.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23C5A000 /* 35.197.160.0/19 */, 19, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23C90000 /* 35.201.0.0/19 */, 19, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23D5C000 /* 35.213.192.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23DC2900 /* 35.220.41.0/24 */, 24, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23EAE000 /* 35.234.224.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23F22900 /* 35.242.41.0/24 */, 24, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23F44000 /* 35.244.64.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22687A00 /* 34.104.122.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x227C3A00 /* 34.124.58.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x227EC000 /* 34.126.192.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22810000 /* 34.129.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22687400 /* 34.104.116.0/22 */, 22, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22748000 /* 34.116.128.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22760000 /* 34.118.0.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x227C3400 /* 34.124.52.0/22 */, 22, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22580000 /* 34.88.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22686000 /* 34.104.96.0/21 */, 21, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x227C2000 /* 34.124.32.0/21 */, 21, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23CBE800 /* 35.203.232.0/21 */, 21, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23D90000 /* 35.217.0.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23DC1A00 /* 35.220.26.0/24 */, 24, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23E40000 /* 35.228.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23F21A00 /* 35.242.26.0/24 */, 24, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x229D2C00 /* 34.157.44.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x229DAC00 /* 34.157.172.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22A40000 /* 34.164.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22AF0000 /* 34.175.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x0822D000 /* 8.34.208.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x0822D300 /* 8.34.211.0/24 */, 24, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x0822DC00 /* 8.34.220.0/22 */, 22, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x17FB8000 /* 23.251.128.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22168000 /* 34.22.128.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x224C0000 /* 34.76.0.0/14 */, 14, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x2276FE00 /* 34.118.254.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x228C0000 /* 34.140.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23BB0000 /* 35.187.0.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23BBA000 /* 35.187.160.0/19 */, 19, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23BDC000 /* 35.189.192.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23BEC000 /* 35.190.192.0/19 */, 19, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23C30000 /* 35.195.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23CD0000 /* 35.205.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23CE8000 /* 35.206.128.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23D20000 /* 35.210.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23DC6000 /* 35.220.96.0/19 */, 19, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23E90000 /* 35.233.0.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23F00000 /* 35.240.0.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23F18000 /* 35.241.128.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23F24000 /* 35.242.64.0/19 */, 19, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x689B0000 /* 104.155.0.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x68C70000 /* 104.199.0.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x68C74200 /* 104.199.66.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x68C74400 /* 104.199.68.0/22 */, 22, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x68C74800 /* 104.199.72.0/21 */, 21, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x68C75000 /* 104.199.80.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x68C76000 /* 104.199.96.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x82D33000 /* 130.211.48.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x82D34000 /* 130.211.64.0/19 */, 19, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x82D36000 /* 130.211.96.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x92940200 /* 146.148.2.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x92940400 /* 146.148.4.0/22 */, 22, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x92940800 /* 146.148.8.0/21 */, 21, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x92941000 /* 146.148.16.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x92947000 /* 146.148.112.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0xC09E1C00 /* 192.158.28.0/22 */, 22, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22590000 /* 34.89.0.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22698000 /* 34.105.128.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x227FBA00 /* 34.127.186.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x228E0000 /* 34.142.0.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22938000 /* 34.147.128.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x229D2400 /* 34.157.36.0/22 */, 22, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x229D2800 /* 34.157.40.0/22 */, 22, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x229DA800 /* 34.157.168.0/22 */, 22, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23BD4000 /* 35.189.64.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23C5C000 /* 35.197.192.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23CBD200 /* 35.203.210.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23CBD400 /* 35.203.212.0/22 */, 22, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23CBD800 /* 35.203.216.0/22 */, 22, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23D60000 /* 35.214.0.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23DC1400 /* 35.220.20.0/22 */, 22, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23E68000 /* 35.230.128.0/19 */, 19, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23EA8000 /* 35.234.128.0/19 */, 19, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23EB3000 /* 35.235.48.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23F21400 /* 35.242.20.0/22 */, 22, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23F28000 /* 35.242.128.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23F60000 /* 35.246.0.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22598000 /* 34.89.128.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22687000 /* 34.104.112.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x226B0000 /* 34.107.0.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x2276F400 /* 34.118.244.0/22 */, 22, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x227C3000 /* 34.124.48.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x228D0000 /* 34.141.0.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x229D3000 /* 34.157.48.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x229DB000 /* 34.157.176.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x229F0000 /* 34.159.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23C64000 /* 35.198.64.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23C68000 /* 35.198.128.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23CF4000 /* 35.207.64.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23CF8000 /* 35.207.128.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23DC1200 /* 35.220.18.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23EA4000 /* 35.234.64.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23EB2000 /* 35.235.32.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23F21200 /* 35.242.18.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23F2C000 /* 35.242.192.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23F68000 /* 35.246.128.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x225A0000 /* 34.90.0.0/15 */, 15, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22687E00 /* 34.104.126.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x227C3E00 /* 34.124.62.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x228D8000 /* 34.141.128.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22930000 /* 34.147.0.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x229D5000 /* 34.157.80.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x229D5C00 /* 34.157.92.0/22 */, 22, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x229DD000 /* 34.157.208.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x229DDC00 /* 34.157.220.0/22 */, 22, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23CC0000 /* 35.204.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23D68000 /* 35.214.128.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23DC1000 /* 35.220.16.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23EAA000 /* 35.234.160.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23F21000 /* 35.242.16.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22410000 /* 34.65.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22686E00 /* 34.104.110.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x227C2E00 /* 34.124.46.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23D88000 /* 35.216.128.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23DC2C00 /* 35.220.44.0/24 */, 24, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23EBD800 /* 35.235.216.0/21 */, 21, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23F22C00 /* 35.242.44.0/24 */, 24, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x229A0000 /* 34.154.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x229D0800 /* 34.157.8.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x229D8800 /* 34.157.136.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23DBE000 /* 35.219.224.0/19 */, 19, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x229B0000 /* 34.155.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x229D0C00 /* 34.157.12.0/22 */, 22, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x229D8C00 /* 34.157.140.0/22 */, 22, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22A30000 /* 34.163.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x225F4000 /* 34.95.64.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22604000 /* 34.96.64.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22624000 /* 34.98.64.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22668000 /* 34.102.128.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22681B00 /* 34.104.27.0/24 */, 24, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x226B8000 /* 34.107.128.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x226E8000 /* 34.110.128.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x226F0000 /* 34.111.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22740000 /* 34.116.0.0/21 */, 21, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22750000 /* 34.117.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22780000 /* 34.120.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22808000 /* 34.128.128.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x2290C000 /* 34.144.192.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22950000 /* 34.149.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22A00000 /* 34.160.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23BAC000 /* 35.186.192.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23BE0000 /* 35.190.0.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23BE4000 /* 35.190.64.0/19 */, 19, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23BE7000 /* 35.190.112.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23C94000 /* 35.201.64.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23E3C000 /* 35.227.192.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23F10000 /* 35.241.0.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23F48000 /* 35.244.128.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x6BB2F000 /* 107.178.240.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x82D30400 /* 130.211.4.0/22 */, 22, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x82D30800 /* 130.211.8.0/21 */, 21, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x82D31000 /* 130.211.16.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x82D32000 /* 130.211.32.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22004000 /* 34.0.64.0/19 */, 19, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x229D5A00 /* 34.157.90.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x229DD800 /* 34.157.216.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22A50000 /* 34.165.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22138000 /* 34.19.128.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22140000 /* 34.20.0.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x225F0000 /* 34.95.0.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22684C00 /* 34.104.76.0/22 */, 22, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22768000 /* 34.118.128.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x227C0C00 /* 34.124.12.0/22 */, 22, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22980000 /* 34.152.0.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23CB0000 /* 35.203.0.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23D70000 /* 35.215.0.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23DC2B00 /* 35.220.43.0/24 */, 24, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23EAF000 /* 35.234.240.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23F22B00 /* 35.242.43.0/24 */, 24, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22002000 /* 34.0.32.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22687200 /* 34.104.114.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x227C3200 /* 34.124.50.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x227C7000 /* 34.124.112.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22820000 /* 34.130.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x225F8000 /* 34.95.128.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22685000 /* 34.104.80.0/21 */, 21, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x227C1000 /* 34.124.16.0/21 */, 21, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22970000 /* 34.151.0.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x2297C000 /* 34.151.192.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23C60000 /* 35.198.0.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23C74000 /* 35.199.64.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23D7C000 /* 35.215.192.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23DC2800 /* 35.220.40.0/24 */, 24, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23EB0000 /* 35.235.0.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23F22800 /* 35.242.40.0/24 */, 24, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23F7C000 /* 35.247.192.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22683200 /* 34.104.50.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x227FB200 /* 34.127.178.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22B00000 /* 34.176.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x0822D200 /* 8.34.210.0/24 */, 24, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x0822D400 /* 8.34.212.0/22 */, 22, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x0822D800 /* 8.34.216.0/22 */, 22, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x0823C000 /* 8.35.192.0/21 */, 21, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x17EC3000 /* 23.236.48.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x17FB9000 /* 23.251.144.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22100000 /* 34.16.0.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x221B0000 /* 34.27.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x221C0000 /* 34.28.0.0/15 */, 15, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x221E0000 /* 34.30.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22420000 /* 34.66.0.0/15 */, 15, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22440000 /* 34.68.0.0/14 */, 14, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22480000 /* 34.72.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x2276C800 /* 34.118.200.0/21 */, 21, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22790000 /* 34.121.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x227A0000 /* 34.122.0.0/15 */, 15, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22840000 /* 34.132.0.0/14 */, 14, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22880000 /* 34.136.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x229D5400 /* 34.157.84.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x229D6000 /* 34.157.96.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x229DD400 /* 34.157.212.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x229DE000 /* 34.157.224.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22AA0000 /* 34.170.0.0/15 */, 15, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22AC0000 /* 34.172.0.0/15 */, 15, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23B80000 /* 35.184.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23BC0000 /* 35.188.0.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23BC8000 /* 35.188.128.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23BCC000 /* 35.188.192.0/19 */, 19, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23C00000 /* 35.192.0.0/15 */, 15, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23C20000 /* 35.194.0.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23CA0000 /* 35.202.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23CE4000 /* 35.206.64.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23D00000 /* 35.208.0.0/15 */, 15, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23DC4000 /* 35.220.64.0/19 */, 19, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23DE0000 /* 35.222.0.0/15 */, 15, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23E00000 /* 35.224.0.0/15 */, 15, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23E20000 /* 35.226.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23E80000 /* 35.232.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23EE0000 /* 35.238.0.0/15 */, 15, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23F26000 /* 35.242.96.0/19 */, 19, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x689A1000 /* 104.154.16.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x689A2000 /* 104.154.32.0/19 */, 19, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x689A4000 /* 104.154.64.0/19 */, 19, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x689A6000 /* 104.154.96.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x689A7100 /* 104.154.113.0/24 */, 24, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x689A7200 /* 104.154.114.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x689A7400 /* 104.154.116.0/22 */, 22, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x689A7800 /* 104.154.120.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x689A8000 /* 104.154.128.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x689B8000 /* 104.155.128.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x68C50000 /* 104.197.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x68C61000 /* 104.198.16.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x68C62000 /* 104.198.32.0/19 */, 19, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x68C64000 /* 104.198.64.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x68C68000 /* 104.198.128.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x6BB2D000 /* 107.178.208.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x6C3B5000 /* 108.59.80.0/21 */, 21, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x82D37000 /* 130.211.112.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x82D38000 /* 130.211.128.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x82D3C000 /* 130.211.192.0/19 */, 19, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x82D3E000 /* 130.211.224.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x92942000 /* 146.148.32.0/19 */, 19, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x92944000 /* 146.148.64.0/19 */, 19, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x92946000 /* 146.148.96.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0xA2DEB000 /* 162.222.176.0/21 */, 21, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0xADFF7000 /* 173.255.112.0/21 */, 21, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0xC7C07300 /* 199.192.115.0/24 */, 24, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0xC7DFE800 /* 199.223.232.0/22 */, 22, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0xC7DFEC00 /* 199.223.236.0/24 */, 24, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22160000 /* 34.22.0.0/19 */, 19, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23BA0000 /* 35.186.0.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23BA8000 /* 35.186.128.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23CE2000 /* 35.206.32.0/19 */, 19, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23DC2E00 /* 35.220.46.0/24 */, 24, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23F22E00 /* 35.242.46.0/24 */, 24, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x6BA7A000 /* 107.167.160.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x6C3B5800 /* 108.59.88.0/21 */, 21, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0xADFF7800 /* 173.255.120.0/21 */, 21, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22170000 /* 34.23.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22180000 /* 34.24.0.0/15 */, 15, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x221A0000 /* 34.26.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22490000 /* 34.73.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x224A0000 /* 34.74.0.0/15 */, 15, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22628000 /* 34.98.128.0/21 */, 21, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x2276FA00 /* 34.118.250.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x228A0000 /* 34.138.0.0/15 */, 15, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22940000 /* 34.148.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23B90000 /* 35.185.0.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23BE8000 /* 35.190.128.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23C40000 /* 35.196.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23CF0000 /* 35.207.0.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23D30000 /* 35.211.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23DC0000 /* 35.220.0.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23E30000 /* 35.227.0.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23E51000 /* 35.229.16.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23E52000 /* 35.229.32.0/19 */, 19, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23E54000 /* 35.229.64.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23E70000 /* 35.231.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23ED0000 /* 35.237.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23F20000 /* 35.242.0.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23F38000 /* 35.243.128.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x68C40000 /* 104.196.0.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x68C44100 /* 104.196.65.0/24 */, 24, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x68C44200 /* 104.196.66.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x68C44400 /* 104.196.68.0/22 */, 22, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x68C46000 /* 104.196.96.0/19 */, 19, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x68C48000 /* 104.196.128.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x68C4C000 /* 104.196.192.0/19 */, 19, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0xA2D89400 /* 162.216.148.0/22 */, 22, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22150000 /* 34.21.0.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22558000 /* 34.85.128.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22560000 /* 34.86.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22683C00 /* 34.104.60.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22687C00 /* 34.104.124.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x2276FC00 /* 34.118.252.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x227C3C00 /* 34.124.60.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x227FBC00 /* 34.127.188.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22918000 /* 34.145.128.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22968000 /* 34.150.128.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x229D0000 /* 34.157.0.0/21 */, 21, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x229D1000 /* 34.157.16.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x229D8000 /* 34.157.128.0/21 */, 21, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x229D9000 /* 34.157.144.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23BAA000 /* 35.186.160.0/19 */, 19, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23BCE000 /* 35.188.224.0/19 */, 19, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23C24000 /* 35.194.64.0/19 */, 19, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23C70000 /* 35.199.0.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23D40000 /* 35.212.0.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23DC3C00 /* 35.220.60.0/22 */, 22, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23DD0000 /* 35.221.0.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23E6A000 /* 35.230.160.0/19 */, 19, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23EAB000 /* 35.234.176.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23ECC000 /* 35.236.192.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23F23C00 /* 35.242.60.0/22 */, 22, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23F32800 /* 35.243.40.0/21 */, 21, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23F50000 /* 35.245.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x229D2000 /* 34.157.32.0/22 */, 22, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x229DA000 /* 34.157.160.0/22 */, 22, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22A20000 /* 34.162.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22683800 /* 34.104.56.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x227FB800 /* 34.127.184.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22A10000 /* 34.161.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23CE0A00 /* 35.206.10.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x229D2E00 /* 34.157.46.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x229DAE00 /* 34.157.174.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22AE0000 /* 34.174.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22130000 /* 34.19.0.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22520000 /* 34.82.0.0/15 */, 15, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22690000 /* 34.105.0.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x2276C000 /* 34.118.192.0/21 */, 21, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x227F0000 /* 34.127.0.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22910000 /* 34.145.0.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x229D7000 /* 34.157.112.0/21 */, 21, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x229DF000 /* 34.157.240.0/21 */, 21, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22A80000 /* 34.168.0.0/15 */, 15, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23B9C000 /* 35.185.192.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23C50000 /* 35.197.0.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23C79000 /* 35.199.144.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23C7A000 /* 35.199.160.0/19 */, 19, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23CB8000 /* 35.203.128.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23D48000 /* 35.212.128.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23DC3000 /* 35.220.48.0/21 */, 21, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23E38000 /* 35.227.128.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23E60000 /* 35.230.0.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23E98000 /* 35.233.128.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23F23000 /* 35.242.48.0/21 */, 21, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23F32000 /* 35.243.32.0/21 */, 21, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23F70000 /* 35.247.0.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x68C4E000 /* 104.196.224.0/19 */, 19, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x68C60000 /* 104.198.0.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x68C66000 /* 104.198.96.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x68C77000 /* 104.199.112.0/20 */, 20, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22148000 /* 34.20.128.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x225E0000 /* 34.94.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22660000 /* 34.102.0.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22684000 /* 34.104.64.0/21 */, 21, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x226C0000 /* 34.108.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x2276F800 /* 34.118.248.0/23 */, 23, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x227C0000 /* 34.124.0.0/21 */, 21, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23D74000 /* 35.215.64.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23DC2F00 /* 35.220.47.0/24 */, 24, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23EB4000 /* 35.235.64.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23EC0000 /* 35.236.0.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23F22F00 /* 35.242.47.0/24 */, 24, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23F30000 /* 35.243.0.0/21 */, 21, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22162000 /* 34.22.32.0/19 */, 19, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22683400 /* 34.104.52.0/24 */, 24, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x226A0000 /* 34.106.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x227FB400 /* 34.127.180.0/24 */, 24, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23D94000 /* 35.217.64.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23DC1F00 /* 35.220.31.0/24 */, 24, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23F21F00 /* 35.242.31.0/24 */, 24, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22108000 /* 34.16.128.0/17 */, 17, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x22684800 /* 34.104.72.0/22 */, 22, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x2276F000 /* 34.118.240.0/22 */, 22, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x227C0800 /* 34.124.8.0/22 */, 22, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x227D0000 /* 34.125.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE_CLOUD }, + { 0x23DB8000 /* 35.219.128.0/18 */, 18, NDPI_PROTOCOL_GOOGLE_CLOUD }, + /* End */ + { 0x0, 0, 0 } +}; diff --git a/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_google_match.c b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_google_match.c new file mode 100644 index 0000000000..06c082b772 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_google_match.c @@ -0,0 +1,198 @@ +/* + * + * This file is generated automatically and part of nDPI + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +/* ****************************************************** */ +#include "../ndpi_typedefs.h" +#include "../ndpi_protocol_ids.h" + +static ndpi_network ndpi_protocol_google_protocol_list[] = { + { 0x08080400 /* 8.8.4.0/24 */, 24, NDPI_PROTOCOL_GOOGLE }, + { 0x08080800 /* 8.8.8.0/24 */, 24, NDPI_PROTOCOL_GOOGLE }, + { 0x0823C800 /* 8.35.200.0/21 */, 21, NDPI_PROTOCOL_GOOGLE }, + { 0x22000000 /* 34.0.0.0/19 */, 19, NDPI_PROTOCOL_GOOGLE }, + { 0x22003000 /* 34.0.48.0/20 */, 20, NDPI_PROTOCOL_GOOGLE }, + { 0x22006000 /* 34.0.96.0/19 */, 19, NDPI_PROTOCOL_GOOGLE }, + { 0x22008000 /* 34.0.128.0/17 */, 17, NDPI_PROTOCOL_GOOGLE }, + { 0x22010000 /* 34.1.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE }, + { 0x22020000 /* 34.2.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE }, + { 0x22030000 /* 34.3.0.0/23 */, 23, NDPI_PROTOCOL_GOOGLE }, + { 0x22030300 /* 34.3.3.0/24 */, 24, NDPI_PROTOCOL_GOOGLE }, + { 0x22030400 /* 34.3.4.0/24 */, 24, NDPI_PROTOCOL_GOOGLE }, + { 0x22030800 /* 34.3.8.0/21 */, 21, NDPI_PROTOCOL_GOOGLE }, + { 0x22031000 /* 34.3.16.0/20 */, 20, NDPI_PROTOCOL_GOOGLE }, + { 0x22032000 /* 34.3.32.0/19 */, 19, NDPI_PROTOCOL_GOOGLE }, + { 0x22034000 /* 34.3.64.0/18 */, 18, NDPI_PROTOCOL_GOOGLE }, + { 0x22038000 /* 34.3.128.0/17 */, 17, NDPI_PROTOCOL_GOOGLE }, + { 0x22040000 /* 34.4.0.0/14 */, 14, NDPI_PROTOCOL_GOOGLE }, + { 0x22080000 /* 34.8.0.0/13 */, 13, NDPI_PROTOCOL_GOOGLE }, + { 0x22110000 /* 34.17.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE }, + { 0x22120000 /* 34.18.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE }, + { 0x22164000 /* 34.22.64.0/18 */, 18, NDPI_PROTOCOL_GOOGLE }, + { 0x221F0000 /* 34.31.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE }, + { 0x22200000 /* 34.32.0.0/11 */, 11, NDPI_PROTOCOL_GOOGLE }, + { 0x22400000 /* 34.64.0.0/19 */, 19, NDPI_PROTOCOL_GOOGLE }, + { 0x22600000 /* 34.96.0.0/18 */, 18, NDPI_PROTOCOL_GOOGLE }, + { 0x22620000 /* 34.98.0.0/18 */, 18, NDPI_PROTOCOL_GOOGLE }, + { 0x22628800 /* 34.98.136.0/21 */, 21, NDPI_PROTOCOL_GOOGLE }, + { 0x22629000 /* 34.98.144.0/20 */, 20, NDPI_PROTOCOL_GOOGLE }, + { 0x2262A000 /* 34.98.160.0/19 */, 19, NDPI_PROTOCOL_GOOGLE }, + { 0x2262C000 /* 34.98.192.0/18 */, 18, NDPI_PROTOCOL_GOOGLE }, + { 0x22630000 /* 34.99.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE }, + { 0x22640000 /* 34.100.0.0/17 */, 17, NDPI_PROTOCOL_GOOGLE }, + { 0x22650000 /* 34.101.0.0/20 */, 20, NDPI_PROTOCOL_GOOGLE }, + { 0x22651000 /* 34.101.16.0/23 */, 23, NDPI_PROTOCOL_GOOGLE }, + { 0x22651300 /* 34.101.19.0/24 */, 24, NDPI_PROTOCOL_GOOGLE }, + { 0x22651C00 /* 34.101.28.0/22 */, 22, NDPI_PROTOCOL_GOOGLE }, + { 0x22670000 /* 34.103.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE }, + { 0x22680000 /* 34.104.0.0/20 */, 20, NDPI_PROTOCOL_GOOGLE }, + { 0x22681000 /* 34.104.16.0/21 */, 21, NDPI_PROTOCOL_GOOGLE }, + { 0x22681800 /* 34.104.24.0/23 */, 23, NDPI_PROTOCOL_GOOGLE }, + { 0x22681A00 /* 34.104.26.0/24 */, 24, NDPI_PROTOCOL_GOOGLE }, + { 0x22681C00 /* 34.104.28.0/22 */, 22, NDPI_PROTOCOL_GOOGLE }, + { 0x22682000 /* 34.104.32.0/20 */, 20, NDPI_PROTOCOL_GOOGLE }, + { 0x22683000 /* 34.104.48.0/24 */, 24, NDPI_PROTOCOL_GOOGLE }, + { 0x22683500 /* 34.104.53.0/24 */, 24, NDPI_PROTOCOL_GOOGLE }, + { 0x22683600 /* 34.104.54.0/23 */, 23, NDPI_PROTOCOL_GOOGLE }, + { 0x226D0000 /* 34.109.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE }, + { 0x226E0000 /* 34.110.0.0/17 */, 17, NDPI_PROTOCOL_GOOGLE }, + { 0x22700000 /* 34.112.0.0/14 */, 14, NDPI_PROTOCOL_GOOGLE }, + { 0x22740800 /* 34.116.8.0/21 */, 21, NDPI_PROTOCOL_GOOGLE }, + { 0x22741000 /* 34.116.16.0/20 */, 20, NDPI_PROTOCOL_GOOGLE }, + { 0x22742000 /* 34.116.32.0/19 */, 19, NDPI_PROTOCOL_GOOGLE }, + { 0x2276D000 /* 34.118.208.0/20 */, 20, NDPI_PROTOCOL_GOOGLE }, + { 0x2276E000 /* 34.118.224.0/20 */, 20, NDPI_PROTOCOL_GOOGLE }, + { 0x22770000 /* 34.119.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE }, + { 0x227C4000 /* 34.124.64.0/19 */, 19, NDPI_PROTOCOL_GOOGLE }, + { 0x227C6000 /* 34.124.96.0/20 */, 20, NDPI_PROTOCOL_GOOGLE }, + { 0x227E0000 /* 34.126.0.0/18 */, 18, NDPI_PROTOCOL_GOOGLE }, + { 0x227EE000 /* 34.126.224.0/19 */, 19, NDPI_PROTOCOL_GOOGLE }, + { 0x227F8000 /* 34.127.128.0/19 */, 19, NDPI_PROTOCOL_GOOGLE }, + { 0x227FA000 /* 34.127.160.0/20 */, 20, NDPI_PROTOCOL_GOOGLE }, + { 0x227FB000 /* 34.127.176.0/24 */, 24, NDPI_PROTOCOL_GOOGLE }, + { 0x227FB500 /* 34.127.181.0/24 */, 24, NDPI_PROTOCOL_GOOGLE }, + { 0x227FB600 /* 34.127.182.0/23 */, 23, NDPI_PROTOCOL_GOOGLE }, + { 0x227FC000 /* 34.127.192.0/18 */, 18, NDPI_PROTOCOL_GOOGLE }, + { 0x22800000 /* 34.128.0.0/18 */, 18, NDPI_PROTOCOL_GOOGLE }, + { 0x2280C000 /* 34.128.192.0/18 */, 18, NDPI_PROTOCOL_GOOGLE }, + { 0x228F0000 /* 34.143.0.0/17 */, 17, NDPI_PROTOCOL_GOOGLE }, + { 0x22900000 /* 34.144.0.0/17 */, 17, NDPI_PROTOCOL_GOOGLE }, + { 0x22908000 /* 34.144.128.0/18 */, 18, NDPI_PROTOCOL_GOOGLE }, + { 0x22984000 /* 34.152.64.0/18 */, 18, NDPI_PROTOCOL_GOOGLE }, + { 0x22988000 /* 34.152.128.0/17 */, 17, NDPI_PROTOCOL_GOOGLE }, + { 0x22990000 /* 34.153.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE }, + { 0x229C0000 /* 34.156.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE }, + { 0x229D0A00 /* 34.157.10.0/23 */, 23, NDPI_PROTOCOL_GOOGLE }, + { 0x229D5600 /* 34.157.86.0/24 */, 24, NDPI_PROTOCOL_GOOGLE }, + { 0x229D7800 /* 34.157.120.0/21 */, 21, NDPI_PROTOCOL_GOOGLE }, + { 0x229D8A00 /* 34.157.138.0/23 */, 23, NDPI_PROTOCOL_GOOGLE }, + { 0x229DD600 /* 34.157.214.0/24 */, 24, NDPI_PROTOCOL_GOOGLE }, + { 0x229DDA00 /* 34.157.218.0/23 */, 23, NDPI_PROTOCOL_GOOGLE }, + { 0x229DF800 /* 34.157.248.0/21 */, 21, NDPI_PROTOCOL_GOOGLE }, + { 0x229E0000 /* 34.158.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE }, + { 0x22A60000 /* 34.166.0.0/15 */, 15, NDPI_PROTOCOL_GOOGLE }, + { 0x22B10000 /* 34.177.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE }, + { 0x22B20000 /* 34.178.0.0/15 */, 15, NDPI_PROTOCOL_GOOGLE }, + { 0x22B40000 /* 34.180.0.0/14 */, 14, NDPI_PROTOCOL_GOOGLE }, + { 0x22B80000 /* 34.184.0.0/13 */, 13, NDPI_PROTOCOL_GOOGLE }, + { 0x23BB8000 /* 35.187.128.0/20 */, 20, NDPI_PROTOCOL_GOOGLE }, + { 0x23BE6000 /* 35.190.96.0/20 */, 20, NDPI_PROTOCOL_GOOGLE }, + { 0x23BEF000 /* 35.190.240.0/20 */, 20, NDPI_PROTOCOL_GOOGLE }, + { 0x23BF0000 /* 35.191.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE }, + { 0x23C78000 /* 35.199.128.0/20 */, 20, NDPI_PROTOCOL_GOOGLE }, + { 0x23C92000 /* 35.201.32.0/21 */, 21, NDPI_PROTOCOL_GOOGLE }, + { 0x23C92800 /* 35.201.40.0/24 */, 24, NDPI_PROTOCOL_GOOGLE }, + { 0x23C92A00 /* 35.201.42.0/23 */, 23, NDPI_PROTOCOL_GOOGLE }, + { 0x23C92C00 /* 35.201.44.0/22 */, 22, NDPI_PROTOCOL_GOOGLE }, + { 0x23C93000 /* 35.201.48.0/20 */, 20, NDPI_PROTOCOL_GOOGLE }, + { 0x23CBC000 /* 35.203.192.0/20 */, 20, NDPI_PROTOCOL_GOOGLE }, + { 0x23CBD000 /* 35.203.208.0/23 */, 23, NDPI_PROTOCOL_GOOGLE }, + { 0x23CBDC00 /* 35.203.220.0/22 */, 22, NDPI_PROTOCOL_GOOGLE }, + { 0x23CBE000 /* 35.203.224.0/21 */, 21, NDPI_PROTOCOL_GOOGLE }, + { 0x23CBF000 /* 35.203.240.0/20 */, 20, NDPI_PROTOCOL_GOOGLE }, + { 0x23CE0000 /* 35.206.0.0/21 */, 21, NDPI_PROTOCOL_GOOGLE }, + { 0x23CE0800 /* 35.206.8.0/23 */, 23, NDPI_PROTOCOL_GOOGLE }, + { 0x23CE0C00 /* 35.206.12.0/22 */, 22, NDPI_PROTOCOL_GOOGLE }, + { 0x23CE1000 /* 35.206.16.0/20 */, 20, NDPI_PROTOCOL_GOOGLE }, + { 0x23DA0000 /* 35.218.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE }, + { 0x23DBC000 /* 35.219.192.0/19 */, 19, NDPI_PROTOCOL_GOOGLE }, + { 0x23DC1C00 /* 35.220.28.0/23 */, 23, NDPI_PROTOCOL_GOOGLE }, + { 0x23DC1E00 /* 35.220.30.0/24 */, 24, NDPI_PROTOCOL_GOOGLE }, + { 0x23E50000 /* 35.229.0.0/20 */, 20, NDPI_PROTOCOL_GOOGLE }, + { 0x23E6C000 /* 35.230.192.0/19 */, 19, NDPI_PROTOCOL_GOOGLE }, + { 0x23E6E000 /* 35.230.224.0/20 */, 20, NDPI_PROTOCOL_GOOGLE }, + { 0x23EB8000 /* 35.235.128.0/18 */, 18, NDPI_PROTOCOL_GOOGLE }, + { 0x23EBC000 /* 35.235.192.0/20 */, 20, NDPI_PROTOCOL_GOOGLE }, + { 0x23EBD000 /* 35.235.208.0/21 */, 21, NDPI_PROTOCOL_GOOGLE }, + { 0x23EBE000 /* 35.235.224.0/19 */, 19, NDPI_PROTOCOL_GOOGLE }, + { 0x23F21C00 /* 35.242.28.0/23 */, 23, NDPI_PROTOCOL_GOOGLE }, + { 0x23F21E00 /* 35.242.30.0/24 */, 24, NDPI_PROTOCOL_GOOGLE }, + { 0x23F31000 /* 35.243.16.0/20 */, 20, NDPI_PROTOCOL_GOOGLE }, + { 0x23F33000 /* 35.243.48.0/21 */, 21, NDPI_PROTOCOL_GOOGLE }, + { 0x400F7000 /* 64.15.112.0/20 */, 20, NDPI_PROTOCOL_GOOGLE }, + { 0x40E9A000 /* 64.233.160.0/19 */, 19, NDPI_PROTOCOL_GOOGLE }, + { 0x4216E400 /* 66.22.228.0/23 */, 23, NDPI_PROTOCOL_GOOGLE }, + { 0x42660000 /* 66.102.0.0/20 */, 20, NDPI_PROTOCOL_GOOGLE }, + { 0x42F94000 /* 66.249.64.0/19 */, 19, NDPI_PROTOCOL_GOOGLE }, + { 0x46208000 /* 70.32.128.0/19 */, 19, NDPI_PROTOCOL_GOOGLE }, + { 0x480EC000 /* 72.14.192.0/18 */, 18, NDPI_PROTOCOL_GOOGLE }, + { 0x4A721800 /* 74.114.24.0/21 */, 21, NDPI_PROTOCOL_GOOGLE }, + { 0x4A7D0000 /* 74.125.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE }, + { 0x689A0000 /* 104.154.0.0/20 */, 20, NDPI_PROTOCOL_GOOGLE }, + { 0x689A7000 /* 104.154.112.0/24 */, 24, NDPI_PROTOCOL_GOOGLE }, + { 0x689A7A00 /* 104.154.122.0/23 */, 23, NDPI_PROTOCOL_GOOGLE }, + { 0x689A7C00 /* 104.154.124.0/22 */, 22, NDPI_PROTOCOL_GOOGLE }, + { 0x689BF000 /* 104.155.240.0/20 */, 20, NDPI_PROTOCOL_GOOGLE }, + { 0x68C44000 /* 104.196.64.0/24 */, 24, NDPI_PROTOCOL_GOOGLE }, + { 0x68C44800 /* 104.196.72.0/21 */, 21, NDPI_PROTOCOL_GOOGLE }, + { 0x68C45000 /* 104.196.80.0/20 */, 20, NDPI_PROTOCOL_GOOGLE }, + { 0x68C74000 /* 104.199.64.0/23 */, 23, NDPI_PROTOCOL_GOOGLE }, + { 0x68C7F000 /* 104.199.240.0/23 */, 23, NDPI_PROTOCOL_GOOGLE }, + { 0x68EDA000 /* 104.237.160.0/19 */, 19, NDPI_PROTOCOL_GOOGLE }, + { 0x6BB2C000 /* 107.178.192.0/20 */, 20, NDPI_PROTOCOL_GOOGLE }, + { 0x6BB2E000 /* 107.178.224.0/20 */, 20, NDPI_PROTOCOL_GOOGLE }, + { 0x6CAAC000 /* 108.170.192.0/18 */, 18, NDPI_PROTOCOL_GOOGLE }, + { 0x6CB10000 /* 108.177.0.0/17 */, 17, NDPI_PROTOCOL_GOOGLE }, + { 0x82D30000 /* 130.211.0.0/22 */, 22, NDPI_PROTOCOL_GOOGLE }, + { 0x88700000 /* 136.112.0.0/12 */, 12, NDPI_PROTOCOL_GOOGLE }, + { 0x8EFA0000 /* 142.250.0.0/15 */, 15, NDPI_PROTOCOL_GOOGLE }, + { 0x92940000 /* 146.148.0.0/23 */, 23, NDPI_PROTOCOL_GOOGLE }, + { 0xAC6E2000 /* 172.110.32.0/21 */, 21, NDPI_PROTOCOL_GOOGLE }, + { 0xACD90000 /* 172.217.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE }, + { 0xACFD0000 /* 172.253.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE }, + { 0xADC20000 /* 173.194.0.0/16 */, 16, NDPI_PROTOCOL_GOOGLE }, + { 0xC0B20000 /* 192.178.0.0/15 */, 15, NDPI_PROTOCOL_GOOGLE }, + { 0xC1BA0400 /* 193.186.4.0/24 */, 24, NDPI_PROTOCOL_GOOGLE }, + { 0xC7249A00 /* 199.36.154.0/23 */, 23, NDPI_PROTOCOL_GOOGLE }, + { 0xC7249C00 /* 199.36.156.0/24 */, 24, NDPI_PROTOCOL_GOOGLE }, + { 0xC7C07000 /* 199.192.112.0/23 */, 23, NDPI_PROTOCOL_GOOGLE }, + { 0xC7C07200 /* 199.192.114.0/24 */, 24, NDPI_PROTOCOL_GOOGLE }, + { 0xC7DFED00 /* 199.223.237.0/24 */, 24, NDPI_PROTOCOL_GOOGLE }, + { 0xC7DFEE00 /* 199.223.238.0/23 */, 23, NDPI_PROTOCOL_GOOGLE }, + { 0xCFDFA000 /* 207.223.160.0/20 */, 20, NDPI_PROTOCOL_GOOGLE }, + { 0xD0419800 /* 208.65.152.0/22 */, 22, NDPI_PROTOCOL_GOOGLE }, + { 0xD0446C00 /* 208.68.108.0/22 */, 22, NDPI_PROTOCOL_GOOGLE }, + { 0xD051BC00 /* 208.81.188.0/22 */, 22, NDPI_PROTOCOL_GOOGLE }, + { 0xD075E000 /* 208.117.224.0/19 */, 19, NDPI_PROTOCOL_GOOGLE }, + { 0xD1558000 /* 209.85.128.0/17 */, 17, NDPI_PROTOCOL_GOOGLE }, + { 0xD83AC000 /* 216.58.192.0/19 */, 19, NDPI_PROTOCOL_GOOGLE }, + { 0xD8495000 /* 216.73.80.0/20 */, 20, NDPI_PROTOCOL_GOOGLE }, + { 0xD8EF2000 /* 216.239.32.0/19 */, 19, NDPI_PROTOCOL_GOOGLE }, + /* End */ + { 0x0, 0, 0 } +}; diff --git a/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_icloud_private_relay_match.c b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_icloud_private_relay_match.c new file mode 100644 index 0000000000..388f75afd1 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_icloud_private_relay_match.c @@ -0,0 +1,3147 @@ +/* + * + * This file is generated automatically and part of nDPI + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +/* ****************************************************** */ +#include "../ndpi_typedefs.h" +#include "../ndpi_protocol_ids.h" + +static ndpi_network ndpi_anonymous_subscriber_protocol_list[] = { + { 0x081B4317 /* 8.27.67.23/32 */, 32, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x081B431F /* 8.27.67.31/32 */, 32, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x081B4320 /* 8.27.67.32/32 */, 32, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x081B4329 /* 8.27.67.41/32 */, 32, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x081B432A /* 8.27.67.42/31 */, 31, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x081B432C /* 8.27.67.44/32 */, 32, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x081B4333 /* 8.27.67.51/32 */, 32, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x081B4334 /* 8.27.67.52/32 */, 32, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x081B4336 /* 8.27.67.54/32 */, 32, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x081B4339 /* 8.27.67.57/32 */, 32, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x081B433A /* 8.27.67.58/32 */, 32, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x081B433D /* 8.27.67.61/32 */, 32, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x081B433F /* 8.27.67.63/32 */, 32, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x081B434A /* 8.27.67.74/31 */, 31, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x081B434D /* 8.27.67.77/32 */, 32, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x081B434E /* 8.27.67.78/31 */, 31, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x081B4359 /* 8.27.67.89/32 */, 32, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x081B4362 /* 8.27.67.98/32 */, 32, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x081B4364 /* 8.27.67.100/32 */, 32, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x081B436D /* 8.27.67.109/32 */, 32, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x081B4376 /* 8.27.67.118/32 */, 32, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x081B4378 /* 8.27.67.120/32 */, 32, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x081B4382 /* 8.27.67.130/32 */, 32, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x081B438A /* 8.27.67.138/32 */, 32, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x081B438D /* 8.27.67.141/32 */, 32, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x081B438F /* 8.27.67.143/32 */, 32, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x081B4392 /* 8.27.67.146/32 */, 32, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x081B43A4 /* 8.27.67.164/31 */, 31, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x081B43A9 /* 8.27.67.169/32 */, 32, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x081B43AD /* 8.27.67.173/32 */, 32, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x081B43BC /* 8.27.67.188/32 */, 32, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x081B43BE /* 8.27.67.190/32 */, 32, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x081B43CB /* 8.27.67.203/32 */, 32, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x081B43D2 /* 8.27.67.210/32 */, 32, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x081B43D4 /* 8.27.67.212/32 */, 32, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x081B43E4 /* 8.27.67.228/32 */, 32, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x081B43F3 /* 8.27.67.243/32 */, 32, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x081B43F5 /* 8.27.67.245/32 */, 32, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x681C0801 /* 104.28.8.1/32 */, 32, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x681C0802 /* 104.28.8.2/31 */, 31, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x681C0804 /* 104.28.8.4/30 */, 30, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x681C0808 /* 104.28.8.8/29 */, 29, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x681C0810 /* 104.28.8.16/28 */, 28, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x681C0820 /* 104.28.8.32/27 */, 27, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x681C0840 /* 104.28.8.64/26 */, 26, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x681C0880 /* 104.28.8.128/25 */, 25, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x681C0900 /* 104.28.9.0/24 */, 24, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x681C0A00 /* 104.28.10.0/23 */, 23, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x681C0C00 /* 104.28.12.0/23 */, 23, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x681C0E00 /* 104.28.14.0/24 */, 24, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x681C0F00 /* 104.28.15.0/26 */, 26, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x681C0F40 /* 104.28.15.64/27 */, 27, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x681C0F60 /* 104.28.15.96/28 */, 28, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x681C0F70 /* 104.28.15.112/29 */, 29, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x681C0F78 /* 104.28.15.120/31 */, 31, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x681C1C00 /* 104.28.28.0/26 */, 26, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x681C1C40 /* 104.28.28.64/29 */, 29, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x681C1C48 /* 104.28.28.72/30 */, 30, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x681C1C4C /* 104.28.28.76/32 */, 32, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x681C1C4F /* 104.28.28.79/32 */, 32, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x681C1C50 /* 104.28.28.80/32 */, 32, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x681C1C53 /* 104.28.28.83/32 */, 32, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x681C1C54 /* 104.28.28.84/30 */, 30, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x681C1C58 /* 104.28.28.88/32 */, 32, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x681C1C5B /* 104.28.28.91/32 */, 32, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x681C1C5C /* 104.28.28.92/32 */, 32, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x681C1C5F /* 104.28.28.95/32 */, 32, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x681C1C60 /* 104.28.28.96/30 */, 30, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x681C1C64 /* 104.28.28.100/32 */, 32, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x681C1D00 /* 104.28.29.0/27 */, 27, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x681C1D20 /* 104.28.29.32/28 */, 28, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x681C1D30 /* 104.28.29.48/31 */, 31, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x681C1D32 /* 104.28.29.50/32 */, 32, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x681C1D35 /* 104.28.29.53/32 */, 32, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x681C1D36 /* 104.28.29.54/32 */, 32, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x681C1D3B /* 104.28.29.59/32 */, 32, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x681C1D3C /* 104.28.29.60/32 */, 32, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x681C1D3F /* 104.28.29.63/32 */, 32, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x681C1D40 /* 104.28.29.64/30 */, 30, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x681C1D44 /* 104.28.29.68/32 */, 32, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x681C1D47 /* 104.28.29.71/32 */, 32, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0x681C1D48 /* 104.28.29.72/30 */, 30, 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172.226.169.128/27 */, 27, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2AA00 /* 172.226.170.0/24 */, 24, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2AB00 /* 172.226.171.0/25 */, 25, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2AB80 /* 172.226.171.128/27 */, 27, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2AC00 /* 172.226.172.0/28 */, 28, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2AE00 /* 172.226.174.0/26 */, 26, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2AE40 /* 172.226.174.64/30 */, 30, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2AE44 /* 172.226.174.68/31 */, 31, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2AF00 /* 172.226.175.0/24 */, 24, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2B000 /* 172.226.176.0/24 */, 24, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2B100 /* 172.226.177.0/26 */, 26, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2B140 /* 172.226.177.64/30 */, 30, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2B144 /* 172.226.177.68/31 */, 31, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2B200 /* 172.226.178.0/24 */, 24, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2B300 /* 172.226.179.0/26 */, 26, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2B340 /* 172.226.179.64/30 */, 30, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2B344 /* 172.226.179.68/31 */, 31, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2B400 /* 172.226.180.0/27 */, 27, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2B420 /* 172.226.180.32/28 */, 28, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2B440 /* 172.226.180.64/26 */, 26, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2B480 /* 172.226.180.128/27 */, 27, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2B600 /* 172.226.182.0/26 */, 26, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2B640 /* 172.226.182.64/28 */, 28, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2B650 /* 172.226.182.80/29 */, 29, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2B658 /* 172.226.182.88/30 */, 30, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2B700 /* 172.226.183.0/26 */, 26, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2B740 /* 172.226.183.64/28 */, 28, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2B750 /* 172.226.183.80/29 */, 29, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2B758 /* 172.226.183.88/30 */, 30, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2B800 /* 172.226.184.0/25 */, 25, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2B880 /* 172.226.184.128/29 */, 29, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2B888 /* 172.226.184.136/31 */, 31, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2BA00 /* 172.226.186.0/25 */, 25, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2BA80 /* 172.226.186.128/29 */, 29, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2BA88 /* 172.226.186.136/31 */, 31, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2BC00 /* 172.226.188.0/24 */, 24, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2BD00 /* 172.226.189.0/25 */, 25, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2BD80 /* 172.226.189.128/27 */, 27, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2BE00 /* 172.226.190.0/24 */, 24, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2BF00 /* 172.226.191.0/25 */, 25, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2BF80 /* 172.226.191.128/27 */, 27, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2C000 /* 172.226.192.0/24 */, 24, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2C100 /* 172.226.193.0/26 */, 26, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2C140 /* 172.226.193.64/27 */, 27, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2C160 /* 172.226.193.96/29 */, 29, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2C200 /* 172.226.194.0/24 */, 24, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2C300 /* 172.226.195.0/25 */, 25, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2C400 /* 172.226.196.0/24 */, 24, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2C500 /* 172.226.197.0/25 */, 25, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2C600 /* 172.226.198.0/24 */, 24, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2C700 /* 172.226.199.0/25 */, 25, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2C800 /* 172.226.200.0/24 */, 24, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2C900 /* 172.226.201.0/25 */, 25, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2CA00 /* 172.226.202.0/24 */, 24, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2CB00 /* 172.226.203.0/25 */, 25, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2CC00 /* 172.226.204.0/24 */, 24, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2CD00 /* 172.226.205.0/25 */, 25, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2CE00 /* 172.226.206.0/26 */, 26, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2CE40 /* 172.226.206.64/28 */, 28, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2CE50 /* 172.226.206.80/29 */, 29, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2CE58 /* 172.226.206.88/31 */, 31, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2CE60 /* 172.226.206.96/28 */, 28, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2D000 /* 172.226.208.0/26 */, 26, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2D200 /* 172.226.210.0/24 */, 24, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2D300 /* 172.226.211.0/25 */, 25, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2D380 /* 172.226.211.128/26 */, 26, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2D3C0 /* 172.226.211.192/30 */, 30, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2D3C8 /* 172.226.211.200/29 */, 29, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2D3D0 /* 172.226.211.208/28 */, 28, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2D400 /* 172.226.212.0/25 */, 25, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2D480 /* 172.226.212.128/29 */, 29, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2D488 /* 172.226.212.136/31 */, 31, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2D600 /* 172.226.214.0/27 */, 27, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2D620 /* 172.226.214.32/28 */, 28, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2D640 /* 172.226.214.64/27 */, 27, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2D800 /* 172.226.216.0/26 */, 26, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2D840 /* 172.226.216.64/28 */, 28, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2D850 /* 172.226.216.80/29 */, 29, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2D858 /* 172.226.216.88/31 */, 31, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2D860 /* 172.226.216.96/28 */, 28, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2DA00 /* 172.226.218.0/27 */, 27, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2DA20 /* 172.226.218.32/28 */, 28, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2DA30 /* 172.226.218.48/30 */, 30, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2DA34 /* 172.226.218.52/31 */, 31, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2DA38 /* 172.226.218.56/29 */, 29, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2DC00 /* 172.226.220.0/26 */, 26, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2DC40 /* 172.226.220.64/30 */, 30, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2DC44 /* 172.226.220.68/31 */, 31, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2DE00 /* 172.226.222.0/24 */, 24, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2E000 /* 172.226.224.0/28 */, 28, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2E010 /* 172.226.224.16/29 */, 29, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2E200 /* 172.226.226.0/27 */, 27, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2E220 /* 172.226.226.32/30 */, 30, NDPI_ANONYMOUS_SUBSCRIBER }, + { 0xACE2E224 /* 172.226.226.36/31 */, 31, NDPI_ANONYMOUS_SUBSCRIBER }, + /* End */ + { 0x0, 0, 0 } +}; diff --git a/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_ms_office365_match.c b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_ms_office365_match.c new file mode 100644 index 0000000000..b2f2d07126 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_ms_office365_match.c @@ -0,0 +1,34 @@ +/* + * + * This file is generated automatically and part of nDPI + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +/* ****************************************************** */ +#include "../ndpi_typedefs.h" +#include "../ndpi_protocol_ids.h" + +static ndpi_network ndpi_protocol_microsoft_365_protocol_list[] = { + { 0x0D6B8C06 /* 13.107.140.6/32 */, 32, NDPI_PROTOCOL_MICROSOFT_365 }, + { 0x0D6B120F /* 13.107.18.15/32 */, 32, NDPI_PROTOCOL_MICROSOFT_365 }, + { 0x0D6B06AB /* 13.107.6.171/32 */, 32, NDPI_PROTOCOL_MICROSOFT_365 }, + { 0x14BE8000 /* 20.190.128.0/18 */, 18, NDPI_PROTOCOL_MICROSOFT_365 }, + { 0x287E0000 /* 40.126.0.0/18 */, 18, NDPI_PROTOCOL_MICROSOFT_365 }, + { 0x346C0000 /* 52.108.0.0/14 */, 14, NDPI_PROTOCOL_MICROSOFT_365 }, + { 0x34F425A8 /* 52.244.37.168/32 */, 32, NDPI_PROTOCOL_MICROSOFT_365 }, + /* End */ + { 0x0, 0, 0 } +}; diff --git a/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_ms_onedrive_match.c b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_ms_onedrive_match.c new file mode 100644 index 0000000000..300fc15924 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_ms_onedrive_match.c @@ -0,0 +1,32 @@ +/* + * + * This file is generated automatically and part of nDPI + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +/* ****************************************************** */ +#include "../ndpi_typedefs.h" +#include "../ndpi_protocol_ids.h" + +static ndpi_network ndpi_protocol_ms_one_drive_protocol_list[] = { + { 0x68928000 /* 104.146.128.0/17 */, 17, NDPI_PROTOCOL_MS_ONE_DRIVE }, + { 0x0D6B8800 /* 13.107.136.0/22 */, 22, NDPI_PROTOCOL_MS_ONE_DRIVE }, + { 0x96AB2800 /* 150.171.40.0/22 */, 22, NDPI_PROTOCOL_MS_ONE_DRIVE }, + { 0x286C8000 /* 40.108.128.0/17 */, 17, NDPI_PROTOCOL_MS_ONE_DRIVE }, + { 0x34680000 /* 52.104.0.0/14 */, 14, NDPI_PROTOCOL_MS_ONE_DRIVE }, + /* End */ + { 0x0, 0, 0 } +}; diff --git a/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_ms_outlook_match.c b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_ms_outlook_match.c new file mode 100644 index 0000000000..32e78a727d --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_ms_outlook_match.c @@ -0,0 +1,43 @@ +/* + * + * This file is generated automatically and part of nDPI + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +/* ****************************************************** */ +#include "../ndpi_typedefs.h" +#include "../ndpi_protocol_ids.h" + +static ndpi_network ndpi_protocol_ms_outlook_protocol_list[] = { + { 0x682F0000 /* 104.47.0.0/17 */, 17, NDPI_PROTOCOL_MS_OUTLOOK }, + { 0x0D6B8000 /* 13.107.128.0/22 */, 22, NDPI_PROTOCOL_MS_OUTLOOK }, + { 0x0D6B120A /* 13.107.18.10/31 */, 31, NDPI_PROTOCOL_MS_OUTLOOK }, + { 0x0D6B0698 /* 13.107.6.152/31 */, 31, NDPI_PROTOCOL_MS_OUTLOOK }, + { 0x83FD21D7 /* 131.253.33.215/32 */, 32, NDPI_PROTOCOL_MS_OUTLOOK }, + { 0x84F50000 /* 132.245.0.0/16 */, 16, NDPI_PROTOCOL_MS_OUTLOOK }, + { 0x96AB2000 /* 150.171.32.0/22 */, 22, NDPI_PROTOCOL_MS_OUTLOOK }, + { 0xCC4FC5D7 /* 204.79.197.215/32 */, 32, NDPI_PROTOCOL_MS_OUTLOOK }, + { 0x1767A000 /* 23.103.160.0/20 */, 20, NDPI_PROTOCOL_MS_OUTLOOK }, + { 0x28680000 /* 40.104.0.0/15 */, 15, NDPI_PROTOCOL_MS_OUTLOOK }, + { 0x286B0000 /* 40.107.0.0/16 */, 16, NDPI_PROTOCOL_MS_OUTLOOK }, + { 0x285C0000 /* 40.92.0.0/15 */, 15, NDPI_PROTOCOL_MS_OUTLOOK }, + { 0x28600000 /* 40.96.0.0/13 */, 13, NDPI_PROTOCOL_MS_OUTLOOK }, + { 0x34640000 /* 52.100.0.0/14 */, 14, NDPI_PROTOCOL_MS_OUTLOOK }, + { 0x34EE4E58 /* 52.238.78.88/32 */, 32, NDPI_PROTOCOL_MS_OUTLOOK }, + { 0x34600000 /* 52.96.0.0/14 */, 14, NDPI_PROTOCOL_MS_OUTLOOK }, + /* End */ + { 0x0, 0, 0 } +}; diff --git a/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_ms_skype_teams_match.c b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_ms_skype_teams_match.c new file mode 100644 index 0000000000..eefb2ac102 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_ms_skype_teams_match.c @@ -0,0 +1,32 @@ +/* + * + * This file is generated automatically and part of nDPI + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +/* ****************************************************** */ +#include "../ndpi_typedefs.h" +#include "../ndpi_protocol_ids.h" + +static ndpi_network ndpi_protocol_skype_teams_protocol_list[] = { + { 0x0D6B4000 /* 13.107.64.0/18 */, 18, NDPI_PROTOCOL_SKYPE_TEAMS }, + { 0x34700000 /* 52.112.0.0/14 */, 14, NDPI_PROTOCOL_SKYPE_TEAMS }, + { 0x347A0000 /* 52.122.0.0/15 */, 15, NDPI_PROTOCOL_SKYPE_TEAMS }, + { 0x34EE778D /* 52.238.119.141/32 */, 32, NDPI_PROTOCOL_SKYPE_TEAMS }, + { 0x34F4A0CF /* 52.244.160.207/32 */, 32, NDPI_PROTOCOL_SKYPE_TEAMS }, + /* End */ + { 0x0, 0, 0 } +}; diff --git a/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_tor_match.c b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_tor_match.c new file mode 100644 index 0000000000..b4f2549576 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_tor_match.c @@ -0,0 +1,1314 @@ +/* + * + * This file is generated automatically and part of nDPI + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +/* ****************************************************** */ +#include "../ndpi_typedefs.h" +#include "../ndpi_protocol_ids.h" + +static ndpi_network ndpi_protocol_tor_protocol_list[] = { + { 0xB9F4C367 /* 185.244.195.103/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6512 /* 185.220.101.18/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9C28E5A /* 185.194.142.90/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6D466458 /* 109.70.100.88/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC66FE /* 185.220.102.254/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC02A740D /* 192.42.116.13/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6BAE8AAC /* 107.174.138.172/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xBC4438AF /* 188.68.56.175/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x2EA68B6F /* 46.166.139.111/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x59A38F08 /* 89.163.143.8/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC66F8 /* 185.220.102.248/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB330FBBC /* 179.48.251.188/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5FD9BAD0 /* 95.217.186.208/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9C17F99 /* 185.193.127.153/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6D46641B /* 109.70.100.27/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E653 /* 199.249.230.83/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9C347F4 /* 185.195.71.244/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x179AB102 /* 23.154.177.2/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6517 /* 185.220.101.23/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6BBD0C58 /* 107.189.12.88/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x68F44B21 /* 104.244.75.33/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6BBD1DCF /* 107.189.29.207/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x52DD8305 /* 82.221.131.5/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x05FF6297 /* 5.255.98.151/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6D46641C /* 109.70.100.28/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xD18D2286 /* 209.141.34.134/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9F3D85C /* 185.243.216.92/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E6BB /* 199.249.230.187/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x2578BAD0 /* 37.120.186.208/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC1DA76B6 /* 193.218.118.182/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x57EDA51F /* 87.237.165.31/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5BCB0592 /* 91.203.5.146/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xAC6BC986 /* 172.107.201.134/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC653B /* 185.220.101.59/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC64F5 /* 185.220.100.245/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xD5A4CE7C /* 213.164.206.124/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x05024D16 /* 5.2.77.22/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC64F6 /* 185.220.100.246/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6514 /* 185.220.101.20/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9AA7219 /* 185.170.114.25/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9C28EE2 /* 185.194.142.226/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x67D607FB /* 103.214.7.251/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E64A /* 199.249.230.74/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6511 /* 185.220.101.17/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xD5A4CC92 /* 213.164.204.146/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6539 /* 185.220.101.57/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6707 /* 185.220.103.7/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x68F44CAA /* 104.244.76.170/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC64F7 /* 185.220.100.247/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB2143710 /* 178.20.55.16/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x2D97A70C /* 45.151.167.12/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9C28D6B /* 185.194.141.107/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x179AB104 /* 23.154.177.4/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x7DD4F183 /* 125.212.241.131/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x4E82806A /* 78.130.128.106/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x4D444BAD /* 77.68.75.173/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6529 /* 185.220.101.41/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6D466413 /* 109.70.100.19/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6D46641A /* 109.70.100.26/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x25E48185 /* 37.228.129.133/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xBC44282E /* 188.68.40.46/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5DB1420F /* 93.177.66.15/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6520 /* 185.220.101.32/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x2D97A70B /* 45.151.167.11/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6528 /* 185.220.101.40/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC653D /* 185.220.101.61/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB96B4638 /* 185.107.70.56/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6502 /* 185.220.101.2/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5E8EF410 /* 94.142.244.16/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6BBD025B /* 107.189.2.91/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6503 /* 185.220.101.3/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC63280ED /* 198.50.128.237/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xD80AF792 /* 216.10.247.146/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9CF6ADE /* 185.207.106.222/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x68F44D50 /* 104.244.77.80/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xD9920229 /* 217.146.2.41/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5F802BA4 /* 95.128.43.164/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x67ECC958 /* 103.236.201.88/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E645 /* 199.249.230.69/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC1EFE866 /* 193.239.232.102/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x58D0D740 /* 88.208.215.64/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x050243E2 /* 5.2.67.226/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E68E /* 199.249.230.142/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x8DEF955E /* 141.239.149.94/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x877DCD19 /* 135.125.205.25/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9CF6B82 /* 185.207.107.130/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xD18D39B2 /* 209.141.57.178/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6D466455 /* 109.70.100.85/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6522 /* 185.220.101.34/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x53611458 /* 83.97.20.88/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xD94FB235 /* 217.79.178.53/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6BBD0E7B /* 107.189.14.123/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC02A7418 /* 192.42.116.24/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x66827109 /* 102.130.113.9/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xA2FB0598 /* 162.251.5.152/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC6623C5A /* 198.98.60.90/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6D466419 /* 109.70.100.25/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xD18D371A /* 209.141.55.26/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6D454311 /* 109.69.67.17/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1F189425 /* 31.24.148.37/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x05FF6217 /* 5.255.98.23/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB938AB5E /* 185.56.171.94/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E6AF /* 199.249.230.175/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9813D81 /* 185.129.61.129/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E6A6 /* 199.249.230.166/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E677 /* 199.249.230.119/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x671C345D /* 103.28.52.93/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC21AC04D /* 194.26.192.77/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9CF68E1 /* 185.207.104.225/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6507 /* 185.220.101.7/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x68F4492B /* 104.244.73.43/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6D466415 /* 109.70.100.21/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC653F /* 185.220.101.63/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xD8499F65 /* 216.73.159.101/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6BBD026F /* 107.189.2.111/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC64F4 /* 185.220.100.244/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9CF697C /* 185.207.105.124/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC3B00313 /* 195.176.3.19/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x25E4816D /* 37.228.129.109/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6D466416 /* 109.70.100.22/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x4713906A /* 71.19.144.106/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC3B00318 /* 195.176.3.24/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6527 /* 185.220.101.39/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9B9AA1B /* 185.185.170.27/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6BBD1E56 /* 107.189.30.86/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xA2F748C7 /* 162.247.72.199/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB211AA17 /* 178.17.170.23/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5B84903B /* 91.132.144.59/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB96457FD /* 185.100.87.253/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC66F0 /* 185.220.102.240/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x179AB109 /* 23.154.177.9/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x052D6261 /* 5.45.98.97/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x593A378D /* 89.58.55.141/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB96457C0 /* 185.100.87.192/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E666 /* 199.249.230.102/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6777 /* 185.220.103.119/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6506 /* 185.220.101.6/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x68959BE2 /* 104.149.155.226/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9F4C0B8 /* 185.244.192.184/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xBC442065 /* 188.68.32.101/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6510 /* 185.220.101.16/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6BBD1D67 /* 107.189.29.103/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x2D8085F2 /* 45.128.133.242/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6D466452 /* 109.70.100.82/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5D5FE4CD /* 93.95.228.205/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC66F3 /* 185.220.102.243/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E6B0 /* 199.249.230.176/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E6BA /* 199.249.230.186/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x48A72F45 /* 72.167.47.69/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x47139059 /* 71.19.144.89/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6708 /* 185.220.103.8/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x593A1B54 /* 89.58.27.84/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6775 /* 185.220.103.117/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6BBD0A3F /* 107.189.10.63/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x54EF2E07 /* 84.239.46.7/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E652 /* 199.249.230.82/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9F7E259 /* 185.247.226.89/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E693 /* 199.249.230.147/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E66D /* 199.249.230.109/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xCDB97723 /* 205.185.119.35/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC652D /* 185.220.101.45/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x179AB108 /* 23.154.177.8/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xBC4422E7 /* 188.68.34.231/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB2AF94C3 /* 178.175.148.195/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6521 /* 185.220.101.33/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC02A7419 /* 192.42.116.25/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC64FF /* 185.220.100.255/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E6B9 /* 199.249.230.185/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC64FC /* 185.220.100.252/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xCDB978CE /* 205.185.120.206/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC650C /* 185.220.101.12/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6BAEF466 /* 107.174.244.102/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x59EC7064 /* 89.236.112.100/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9F3DA1B /* 185.243.218.27/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xCCC21D04 /* 204.194.29.4/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5F8FC17D /* 95.143.193.125/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB21F4F54 /* 178.31.79.84/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x4F669E3C /* 79.102.158.60/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x2EC36BB9 /* 46.195.107.185/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB21E4F9A /* 178.30.79.154/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x4F66166F /* 79.102.22.111/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x4F66D7F3 /* 79.102.215.243/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB21E4AF8 /* 178.30.74.248/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x2EC34362 /* 46.195.67.98/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB21E9A65 /* 178.30.154.101/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB21F3211 /* 178.31.50.17/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC650B /* 185.220.101.11/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x052D6299 /* 5.45.98.153/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC650F /* 185.220.101.15/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x4D441AEE /* 77.68.26.238/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x4D440385 /* 77.68.3.133/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x68F44A1C /* 104.244.74.28/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xBC4429BF /* 188.68.41.191/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC1698696 /* 193.105.134.150/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x05FF64DB /* 5.255.100.219/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x2578B997 /* 37.120.185.151/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC02A740F /* 192.42.116.15/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC650D /* 185.220.101.13/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB97DA8D2 /* 185.125.168.210/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xD5A4CDA9 /* 213.164.205.169/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xD8EF5A13 /* 216.239.90.19/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9B79F6B /* 185.183.159.107/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x3EAB89A9 /* 62.171.137.169/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6D466459 /* 109.70.100.89/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6537 /* 185.220.101.55/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9822F3A /* 185.130.47.58/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC653A /* 185.220.101.58/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6772 /* 185.220.103.114/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6515 /* 185.220.101.21/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9222102 /* 185.34.33.2/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB964578B /* 185.100.87.139/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9CF6B6A /* 185.207.107.106/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9C28EC2 /* 185.194.142.194/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E64F /* 199.249.230.79/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC66F7 /* 185.220.102.247/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6D466453 /* 109.70.100.83/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB96457FA /* 185.100.87.250/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC650A /* 185.220.101.10/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6530 /* 185.220.101.48/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x2D3DBC90 /* 45.61.188.144/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x2E26FEF6 /* 46.38.254.246/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6518 /* 185.220.101.24/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xA2F749C0 /* 162.247.73.192/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9C402FB /* 185.196.2.251/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E68C /* 199.249.230.140/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB910266E /* 185.16.38.110/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xBC442444 /* 188.68.36.68/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x179AB107 /* 23.154.177.7/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6D466414 /* 109.70.100.20/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xD18D32B2 /* 209.141.50.178/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x68F44884 /* 104.244.72.132/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9F4C09B /* 185.244.192.155/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB90E61B0 /* 185.14.97.176/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9E96417 /* 185.233.100.23/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC3B00314 /* 195.176.3.20/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC3B00317 /* 195.176.3.23/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9E48948 /* 185.228.137.72/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x2D97A70A /* 45.151.167.10/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9813D08 /* 185.129.61.8/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC66F5 /* 185.220.102.245/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB910266F /* 185.16.38.111/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5F8EA13F /* 95.142.161.63/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB90484B7 /* 185.4.132.183/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x179AB105 /* 23.154.177.5/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC02A741A /* 192.42.116.26/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xA646CF02 /* 166.70.207.2/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC66FD /* 185.220.102.253/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6D46641D /* 109.70.100.29/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC66FB /* 185.220.102.251/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6526 /* 185.220.101.38/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB923CADE /* 185.35.202.222/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC652C /* 185.220.101.44/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x68F44C0D /* 104.244.76.13/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xD18D2DBD /* 209.141.45.189/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x58D0F0BC /* 88.208.240.188/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E675 /* 199.249.230.117/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E651 /* 199.249.230.81/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x2E26ECCA /* 46.38.236.202/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xD18D2ECB /* 209.141.46.203/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E6A5 /* 199.249.230.165/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5E107451 /* 94.16.116.81/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E6A9 /* 199.249.230.169/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6BBD0D5B /* 107.189.13.91/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6505 /* 185.220.101.5/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x2EB615F8 /* 46.182.21.248/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x68F44A61 /* 104.244.74.97/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5360D53F /* 83.96.213.63/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x57767A1E /* 87.118.122.30/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x9675C506 /* 150.117.197.6/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x179AB10B /* 23.154.177.11/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E6A7 /* 199.249.230.167/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB926AF82 /* 185.38.175.130/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6D46641E /* 109.70.100.30/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x42DCF2DE /* 66.220.242.222/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6D466454 /* 109.70.100.84/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x83FF0460 /* 131.255.4.96/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x68F44B4A /* 104.244.75.74/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB496E263 /* 180.150.226.99/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xA3AC29E4 /* 163.172.41.228/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6BBD0A8F /* 107.189.10.143/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x4D51F748 /* 77.81.247.72/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x2578BE86 /* 37.120.190.134/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9C28EF1 /* 185.194.142.241/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E66C /* 199.249.230.108/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xA2F74AC9 /* 162.247.74.201/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x2D3DBACB /* 45.61.186.203/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x330FFA5D /* 51.15.250.93/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x052D68B0 /* 5.45.104.176/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB32B9FC4 /* 179.43.159.196/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xCC55BF08 /* 204.85.191.8/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6DC98564 /* 109.201.133.100/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6538 /* 185.220.101.56/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x8B63AC0B /* 139.99.172.11/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E6B1 /* 199.249.230.177/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x179AB103 /* 23.154.177.3/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5E10795B /* 94.16.121.91/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xA2F74AD5 /* 162.247.74.213/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6778 /* 185.220.103.120/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xA2F74AD8 /* 162.247.74.216/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x9C923F9B /* 156.146.63.155/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x9C923F8A /* 156.146.63.138/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xD18D331E /* 209.141.51.30/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x023A386A /* 2.58.56.106/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x052D631A /* 5.45.99.26/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9E1440D /* 185.225.68.13/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x052D6870 /* 5.45.104.112/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6533 /* 185.220.101.51/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x05024FB3 /* 5.2.79.179/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9F3D85B /* 185.243.216.91/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x179AB106 /* 23.154.177.6/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6BBD1EE6 /* 107.189.30.230/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E670 /* 199.249.230.112/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6774 /* 185.220.103.116/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E679 /* 199.249.230.121/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB32B9FC5 /* 179.43.159.197/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9F4C28B /* 185.244.194.139/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xBC443A83 /* 188.68.58.131/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC66F4 /* 185.220.102.244/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x2EE8FBBF /* 46.232.251.191/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x2D4FB115 /* 45.79.177.21/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xA2F74ACE /* 162.247.74.206/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9B79E39 /* 185.183.158.57/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6536 /* 185.220.101.54/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9645516 /* 185.100.85.22/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xA077F9F0 /* 160.119.249.240/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC66239BF /* 198.98.57.191/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x8A3B126E /* 138.59.18.110/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6776 /* 185.220.103.118/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9102670 /* 185.16.38.112/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6D466421 /* 109.70.100.33/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x52DF0EF5 /* 82.223.14.245/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6525 /* 185.220.101.37/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x50F13CCF /* 80.241.60.207/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9F680A1 /* 185.246.128.161/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9813D03 /* 185.129.61.3/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xADEDCE44 /* 173.237.206.68/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC652A /* 185.220.101.42/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC66233BD /* 198.98.51.189/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC64F8 /* 185.220.100.248/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x593A1EA4 /* 89.58.30.164/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E68D /* 199.249.230.141/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC64FE /* 185.220.100.254/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E67B /* 199.249.230.123/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x68F4487B /* 104.244.72.123/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x25DDC603 /* 37.221.198.3/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5E107561 /* 94.16.117.97/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB07EFDBE /* 176.126.253.190/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x52DD80BF /* 82.221.128.191/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB03A6462 /* 176.58.100.98/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9645517 /* 185.100.85.23/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC64FD /* 185.220.100.253/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5043ACA2 /* 80.67.172.162/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB00A6BB4 /* 176.10.107.180/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9F3DA29 /* 185.243.218.41/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC66F2 /* 185.220.102.242/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC02A7416 /* 192.42.116.22/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E664 /* 199.249.230.100/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x0502486E /* 5.2.72.110/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB211ABC5 /* 178.17.171.197/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6534 /* 185.220.101.52/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB90A44C3 /* 185.10.68.195/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x052D6644 /* 5.45.102.68/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB96457AE /* 185.100.87.174/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB211AE0E /* 178.17.174.14/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6771 /* 185.220.103.113/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x4D4414D9 /* 77.68.20.217/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E6A8 /* 199.249.230.168/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9813D0A /* 185.129.61.10/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E690 /* 199.249.230.144/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6D466456 /* 109.70.100.86/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB32B9FC3 /* 179.43.159.195/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6DA921A3 /* 109.169.33.163/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E669 /* 199.249.230.105/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9435272 /* 185.67.82.114/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x05FF6393 /* 5.255.99.147/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9E48AF0 /* 185.228.138.240/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6BBD0C94 /* 107.189.12.148/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x05FF637C /* 5.255.99.124/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x57767A33 /* 87.118.122.51/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6D466451 /* 109.70.100.81/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9E48AEA /* 185.228.138.234/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xBC4434E7 /* 188.68.52.231/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB211AEA4 /* 178.17.174.164/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5BCB05A5 /* 91.203.5.165/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5EE6D094 /* 94.230.208.148/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x3626B765 /* 54.38.183.101/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xBC443103 /* 188.68.49.3/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xA7565E6B /* 167.86.94.107/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6D466418 /* 109.70.100.24/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x052D6AC5 /* 5.45.106.197/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x05FF61DD /* 5.255.97.221/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC02A7413 /* 192.42.116.19/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x58D0D441 /* 88.208.212.65/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xCC55BF09 /* 204.85.191.9/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x2578BBA1 /* 37.120.187.161/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6516 /* 185.220.101.22/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC66239CF /* 198.98.57.207/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9813D06 /* 185.129.61.6/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6D466450 /* 109.70.100.80/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC66F6 /* 185.220.102.246/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC66FA /* 185.220.102.250/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9645729 /* 185.100.87.41/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC02A741B /* 192.42.116.27/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x334B4017 /* 51.75.64.23/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC650E /* 185.220.101.14/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6D46641F /* 109.70.100.31/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x330F3B0F /* 51.15.59.15/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xA2F74A4A /* 162.247.74.74/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6D466417 /* 109.70.100.23/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6D466420 /* 109.70.100.32/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xD18D2967 /* 209.141.41.103/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x05024FBE /* 5.2.79.190/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6BBD01A0 /* 107.189.1.160/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x25BB60B7 /* 37.187.96.183/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xA2F74ACC /* 162.247.74.204/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC652B /* 185.220.101.43/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9A5AB54 /* 185.165.171.84/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6BBD1E16 /* 107.189.30.22/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5EE6D093 /* 94.230.208.147/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9645518 /* 185.100.85.24/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC02A7414 /* 192.42.116.20/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xA2F74A1B /* 162.247.74.27/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xD5A4CDA7 /* 213.164.205.167/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9E3444E /* 185.227.68.78/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC653E /* 185.220.101.62/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6504 /* 185.220.101.4/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5E8EF1C2 /* 94.142.241.194/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC64FA /* 185.220.100.250/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x58501456 /* 88.80.20.86/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E695 /* 199.249.230.149/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E668 /* 199.249.230.104/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xCC0B3283 /* 204.11.50.131/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xA3ACD5D4 /* 163.172.213.212/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5BF4B555 /* 91.244.181.85/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6524 /* 185.220.101.36/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x68F44A17 /* 104.244.74.23/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E678 /* 199.249.230.120/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E64C /* 199.249.230.76/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB992E8BF /* 185.146.232.191/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E676 /* 199.249.230.118/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC2206B3C /* 194.32.107.60/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x052D620C /* 5.45.98.12/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E67A /* 199.249.230.122/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xBC442A8B /* 188.68.42.139/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E64D /* 199.249.230.77/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6D466457 /* 109.70.100.87/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xD18D255E /* 209.141.37.94/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC64F9 /* 185.220.100.249/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB211AB66 /* 178.17.171.102/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E6B2 /* 199.249.230.178/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x57767467 /* 87.118.116.103/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9AA716D /* 185.170.113.109/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB952DB6D /* 185.82.219.109/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x3351FE11 /* 51.81.254.17/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5B5C6D2B /* 91.92.109.43/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x330FE36D /* 51.15.227.109/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x4292C121 /* 66.146.193.33/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E64E /* 199.249.230.78/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9C28DB2 /* 185.194.141.178/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC6609B03 /* 198.96.155.3/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB956945A /* 185.86.148.90/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9813D05 /* 185.129.61.5/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC02A7410 /* 192.42.116.16/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB2AA250B /* 178.170.37.11/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9BFCCFE /* 185.191.204.254/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x2D97A70D /* 45.151.167.13/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9813D01 /* 185.129.61.1/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xA2F74ACA /* 162.247.74.202/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5776745A /* 87.118.116.90/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9645519 /* 185.100.85.25/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC66F9 /* 185.220.102.249/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7C3FD9C /* 199.195.253.156/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xD18D36C3 /* 209.141.54.195/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x68F4485B /* 104.244.72.91/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xD55F9516 /* 213.95.149.22/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9CF6812 /* 185.207.104.18/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9813D04 /* 185.129.61.4/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E649 /* 199.249.230.73/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E6A4 /* 199.249.230.164/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC02A740E /* 192.42.116.14/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9813D02 /* 185.129.61.2/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x67FBA714 /* 103.251.167.20/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC66FC /* 185.220.102.252/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xBC4431EB /* 188.68.49.235/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5E20420F /* 94.32.66.15/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E667 /* 199.249.230.103/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xCB1CF6BD /* 203.28.246.189/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC652F /* 185.220.101.47/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x67FBA70A /* 103.251.167.10/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xCC089C8E /* 204.8.156.142/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E674 /* 199.249.230.116/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xCAA5E4E1 /* 202.165.228.225/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB211AE44 /* 178.17.174.68/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC02A7411 /* 192.42.116.17/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x57766E1B /* 87.118.110.27/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x53611454 /* 83.97.20.84/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xCDB97CC8 /* 205.185.124.200/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB95697A8 /* 185.86.151.168/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xD5A4CCB1 /* 213.164.204.177/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5BCB90C2 /* 91.203.144.194/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB98EEF31 /* 185.142.239.49/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x052D688D /* 5.45.104.141/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xD90CDD83 /* 217.12.221.131/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6508 /* 185.220.101.8/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E665 /* 199.249.230.101/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC64FB /* 185.220.100.251/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E673 /* 199.249.230.115/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xBE0A08A6 /* 190.10.8.166/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB23EDC5D /* 178.62.220.93/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6523 /* 185.220.101.35/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9F3DA2E /* 185.243.218.46/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6BBD0DFB /* 107.189.13.251/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x0502468C /* 5.2.70.140/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E692 /* 199.249.230.146/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xD18D36CB /* 209.141.54.203/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB926AF83 /* 185.38.175.131/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC02A7412 /* 192.42.116.18/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5FD86B94 /* 95.216.107.148/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E6BD /* 199.249.230.189/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6509 /* 185.220.101.9/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x68F44DD0 /* 104.244.77.208/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC653C /* 185.220.101.60/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC2588F42 /* 194.88.143.66/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E691 /* 199.249.230.145/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E64B /* 199.249.230.75/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x53611497 /* 83.97.20.151/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x59EA9DFE /* 89.234.157.254/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x052D6B6B /* 5.45.107.107/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC652E /* 185.220.101.46/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9645680 /* 185.100.86.128/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xD5A4CDA8 /* 213.164.205.168/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB32B8010 /* 179.43.128.16/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6531 /* 185.220.101.49/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9813D07 /* 185.129.61.7/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC11F189A /* 193.31.24.154/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xCC55BF07 /* 204.85.191.7/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x90AC7604 /* 144.172.118.4/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB32B9FC2 /* 179.43.159.194/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5E8C72D2 /* 94.140.114.210/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x555DDACC /* 85.93.218.204/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E66B /* 199.249.230.107/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6773 /* 185.220.103.115/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC87AB502 /* 200.122.181.2/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB99A6E8E /* 185.154.110.142/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB5771E1A /* 181.119.30.26/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6532 /* 185.220.101.50/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x68F44C7F /* 104.244.76.127/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E694 /* 199.249.230.148/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9813D09 /* 185.129.61.9/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x05FF6583 /* 5.255.101.131/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x179AB10A /* 23.154.177.10/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xAC5183A8 /* 172.81.131.168/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9048487 /* 185.4.132.135/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6513 /* 185.220.101.19/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6BBD1F66 /* 107.189.31.102/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC66F1 /* 185.220.102.241/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xA9EF80B3 /* 169.239.128.179/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x2EE269A8 /* 46.226.105.168/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9EB921D /* 185.235.146.29/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xD5A4CE7B /* 213.164.206.123/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x480EB30A /* 72.14.179.10/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E66E /* 199.249.230.110/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xA2F74A07 /* 162.247.74.7/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9822C6C /* 185.130.44.108/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x2D4F90DE /* 45.79.144.222/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9F7E225 /* 185.247.226.37/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6BBD0888 /* 107.189.8.136/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E68F /* 199.249.230.143/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6535 /* 185.220.101.53/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E66F /* 199.249.230.111/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x330F7FE3 /* 51.15.127.227/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E66A /* 199.249.230.106/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x68F44D35 /* 104.244.77.53/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC02A7417 /* 192.42.116.23/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xCDB97595 /* 205.185.117.149/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E650 /* 199.249.230.80/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6BBD0758 /* 107.189.7.88/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xBC44381B /* 188.68.56.27/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xBC44369E /* 188.68.54.158/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9CF6BE3 /* 185.207.107.227/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9813E3F /* 185.129.62.63/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB992E8A8 /* 185.146.232.168/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x2D9A62AD /* 45.154.98.173/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x2D9A62B0 /* 45.154.98.176/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xADF939FD /* 173.249.57.253/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6BBD0841 /* 107.189.8.65/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x504E1B79 /* 80.78.27.121/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6B98D904 /* 107.152.217.4/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x40057B42 /* 64.5.123.66/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xBC44332C /* 188.68.51.44/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x90AC4910 /* 144.172.73.16/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x54EF2E90 /* 84.239.46.144/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x67FBA715 /* 103.251.167.21/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9C134B4 /* 185.193.52.180/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x052D6ACF /* 5.45.106.207/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9AA727D /* 185.170.114.125/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x58D0E21A /* 88.208.226.26/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x05FF634A /* 5.255.99.74/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9645584 /* 185.100.85.132/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9E48892 /* 185.228.136.146/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB971801E /* 185.113.128.30/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x05FF67BE /* 5.255.103.190/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x05FF62E7 /* 5.255.98.231/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x52DD8BBE /* 82.221.139.190/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xD4154206 /* 212.21.66.6/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5BE825F1 /* 91.232.37.241/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9A3CC2C /* 185.163.204.44/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xA0CAA2BA /* 160.202.162.186/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xD5FC8C76 /* 213.252.140.118/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6BBD1F86 /* 107.189.31.134/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xD18D22EF /* 209.141.34.239/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9B79D7F /* 185.183.157.127/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6BBD1C9D /* 107.189.28.157/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x05FF63CD /* 5.255.99.205/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x68F44A39 /* 104.244.74.57/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xBC4425EC /* 188.68.37.236/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x05FF6305 /* 5.255.99.5/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5BCB0576 /* 91.203.5.118/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x052D6677 /* 5.45.102.119/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xBC442388 /* 188.68.35.136/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9CF6860 /* 185.207.104.96/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x2578A5E8 /* 37.120.165.232/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC6623BF3 /* 198.98.59.243/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x2578B9B1 /* 37.120.185.177/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9CF6BD8 /* 185.207.107.216/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x052D665D /* 5.45.102.93/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x052D669B /* 5.45.102.155/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x4F89C292 /* 79.137.194.146/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC64F3 /* 185.220.100.243/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC64F2 /* 185.220.100.242/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC64F1 /* 185.220.100.241/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x68C0018A /* 104.192.1.138/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC64F0 /* 185.220.100.240/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x052D62A2 /* 5.45.98.162/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9F4C0AF /* 185.244.192.175/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x023A3865 /* 2.58.56.101/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9F4C39D /* 185.244.195.157/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x593A34BD /* 89.58.52.189/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x052D6788 /* 5.45.103.136/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x4F6E3EF4 /* 79.110.62.244/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xBC443867 /* 188.68.56.103/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9F1D0CE /* 185.241.208.206/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9F1D0CC /* 185.241.208.204/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9F1D0CA /* 185.241.208.202/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x052D60B1 /* 5.45.96.177/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xBC443219 /* 188.68.50.25/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB2AF8707 /* 178.175.135.7/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x52DD8347 /* 82.221.131.71/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x59936C3E /* 89.147.108.62/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC651C /* 185.220.101.28/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC651B /* 185.220.101.27/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC651A /* 185.220.101.26/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6519 /* 185.220.101.25/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x58D0E1D1 /* 88.208.225.209/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x2D5FA9FF /* 45.95.169.255/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xAC6BF16E /* 172.107.241.110/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x8D620636 /* 141.98.6.54/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9B79DD6 /* 185.183.157.214/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xD04368A1 /* 208.67.104.161/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xD043689E /* 208.67.104.158/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1BFF4BC6 /* 27.255.75.198/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6501 /* 185.220.101.1/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x05C45F22 /* 5.196.95.34/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9072192 /* 185.7.33.146/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x2EA7F406 /* 46.167.244.6/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xCDB97CC1 /* 205.185.124.193/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1F8500B6 /* 31.133.0.182/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB926AF85 /* 185.38.175.133/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x178140FA /* 23.129.64.250/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC651F /* 185.220.101.31/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6500 /* 185.220.101.0/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC651E /* 185.220.101.30/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC651D /* 185.220.101.29/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x90D9566D /* 144.217.86.109/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x8B63EDCD /* 139.99.237.205/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x05FF64F5 /* 5.255.100.245/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6BBD0B50 /* 107.189.11.80/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xAB19C114 /* 171.25.193.20/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xAB19C14D /* 171.25.193.77/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC6623B78 /* 198.98.59.120/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC0630474 /* 192.99.4.116/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x36246CA2 /* 54.36.108.162/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC063204A /* 192.99.32.74/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x179AB10C /* 23.154.177.12/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x8DFFA1A6 /* 141.255.161.166/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xAB19C14E /* 171.25.193.78/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x179AB10D /* 23.154.177.13/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5BD04B03 /* 91.208.75.3/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9F6BC4A /* 185.246.188.74/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xBE67B362 /* 190.103.179.98/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB32B9FC6 /* 179.43.159.198/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5FD634D0 /* 95.214.52.208/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5FD6349C /* 95.214.52.156/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5FD634BD /* 95.214.52.189/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5FD634BB /* 95.214.52.187/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x68F44873 /* 104.244.72.115/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x68F44804 /* 104.244.72.4/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x8B1C248E /* 139.28.36.142/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1FAB9AA6 /* 31.171.154.166/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB32B9FC8 /* 179.43.159.200/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB32B9FC7 /* 179.43.159.199/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x05FF680E /* 5.255.104.14/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9B53D17 /* 185.181.61.23/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1789F9F0 /* 23.137.249.240/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB32B9FC9 /* 179.43.159.201/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x25E48118 /* 37.228.129.24/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xBFFC6F37 /* 191.252.111.55/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xD0440781 /* 208.68.7.129/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x05FF67EB /* 5.255.103.235/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6BBD0E2B /* 107.189.14.43/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xBE67B34C /* 190.103.179.76/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7C3F8AC /* 199.195.248.172/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9385353 /* 185.56.83.83/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9FE4B37 /* 185.254.75.55/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5CCD8107 /* 92.205.129.7/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9645788 /* 185.100.87.136/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5BD04B04 /* 91.208.75.4/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6BBD08B5 /* 107.189.8.181/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x05FF61AA /* 5.255.97.170/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xAB19C14F /* 171.25.193.79/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xAB19C150 /* 171.25.193.80/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x8E2CAA88 /* 142.44.170.136/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xD18D3B74 /* 209.141.59.116/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC350971E /* 195.80.151.30/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x2D0B3930 /* 45.11.57.48/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9B79F28 /* 185.183.159.40/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x05FF68EF /* 5.255.104.239/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xAB19C1EB /* 171.25.193.235/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xBCD66815 /* 188.214.104.21/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x2FF3678C /* 47.243.103.140/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9709C48 /* 185.112.156.72/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6BBD1E45 /* 107.189.30.69/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5FD6372B /* 95.214.55.43/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9F6BC43 /* 185.246.188.67/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xA2F74AD9 /* 162.247.74.217/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5E4BE146 /* 94.75.225.70/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC3584ACE /* 195.88.74.206/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x67A3DA0B /* 103.163.218.11/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5BCB0573 /* 91.203.5.115/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x7223F596 /* 114.35.245.150/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6BBD07B9 /* 107.189.7.185/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5D6368C2 /* 93.99.104.194/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xD8499F4B /* 216.73.159.75/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xBE78E562 /* 190.120.229.98/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB992E8F3 /* 185.146.232.243/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xD4C0F637 /* 212.192.246.55/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xD4C0F64A /* 212.192.246.74/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xD4C0F636 /* 212.192.246.54/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x33C3A6C3 /* 51.195.166.195/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x68C0034A /* 104.192.3.74/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x573E637A /* 87.62.99.122/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9E14A22 /* 185.225.74.34/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB90E6125 /* 185.14.97.37/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB90E6193 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NDPI_PROTOCOL_TOR }, + { 0xB9E145E8 /* 185.225.69.232/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x36246515 /* 54.36.101.21/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x2D422323 /* 45.66.35.35/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x50524E0E /* 80.82.78.14/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC1DA7697 /* 193.218.118.151/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x4F89C4DF /* 79.137.196.223/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x05FC7613 /* 5.252.118.19/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x17AF200B /* 23.175.32.11/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x4273BD95 /* 66.115.189.149/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x05FF6787 /* 5.255.103.135/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x2B80C9EF /* 43.128.201.239/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x54F34255 /* 84.243.66.85/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x05BB35C2 /* 5.187.53.194/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5FD6EB87 /* 95.214.235.135/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x3EB656EF /* 62.182.86.239/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x4D301CCE /* 77.48.28.206/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC8191B08 /* 200.25.27.8/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x9246921A /* 146.70.146.26/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x2FF34A88 /* 47.243.74.136/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x923B2C2D /* 146.59.44.45/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x33599970 /* 51.89.153.112/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x4D301CCC /* 77.48.28.204/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x593A362E /* 89.58.54.46/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1789F996 /* 23.137.249.150/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5BD04B99 /* 91.208.75.153/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xAC6BE3F6 /* 172.107.227.246/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB32BBB2B /* 179.43.187.43/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9709C33 /* 185.112.156.51/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9645679 /* 185.100.86.121/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x05FC171E /* 5.252.23.30/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1789FB3D /* 23.137.251.61/32 */, 32, NDPI_PROTOCOL_TOR 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23.128.248.11/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1780F80A /* 23.128.248.10/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1780F80E /* 23.128.248.14/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1780F80D /* 23.128.248.13/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x2D9A6221 /* 45.154.98.33/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1780F80C /* 23.128.248.12/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1780F817 /* 23.128.248.23/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1780F815 /* 23.128.248.21/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1780F80F /* 23.128.248.15/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1780F811 /* 23.128.248.17/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1780F818 /* 23.128.248.24/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1780F813 /* 23.128.248.19/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1780F810 /* 23.128.248.16/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1780F814 /* 23.128.248.20/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1780F812 /* 23.128.248.18/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1780F819 /* 23.128.248.25/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1780F816 /* 23.128.248.22/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB2FF2C5E /* 178.255.44.94/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB96456F5 /* 185.100.86.245/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB964567A /* 185.100.86.122/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB96457EE /* 185.100.87.238/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6D466423 /* 109.70.100.35/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6D466422 /* 109.70.100.34/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6D466424 /* 109.70.100.36/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5BD04B9C /* 91.208.75.156/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x05FF650A /* 5.255.101.10/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5C570675 /* 92.87.6.117/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x25E48168 /* 37.228.129.104/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9F865D7 /* 185.248.101.215/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5110212A /* 81.16.33.42/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9822E8D /* 185.130.46.141/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x179AB10F /* 23.154.177.15/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x179AB111 /* 23.154.177.17/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x179AB10E /* 23.154.177.14/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x179AB110 /* 23.154.177.16/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9B53D8E /* 185.181.61.142/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x8DFFA2DA /* 141.255.162.218/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC02A741C /* 192.42.116.28/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x178140D4 /* 23.129.64.212/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x17814086 /* 23.129.64.134/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x17814084 /* 23.129.64.132/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x178140E2 /* 23.129.64.226/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x17814087 /* 23.129.64.135/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x178140E4 /* 23.129.64.228/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1781408C /* 23.129.64.140/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x178140D9 /* 23.129.64.217/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x178140DA /* 23.129.64.218/32 */, 32, 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23.129.64.143/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x178140D7 /* 23.129.64.215/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x178140D2 /* 23.129.64.210/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x17814082 /* 23.129.64.130/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x178140DC /* 23.129.64.220/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x178140DE /* 23.129.64.222/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x17814091 /* 23.129.64.145/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x17814085 /* 23.129.64.133/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x17814083 /* 23.129.64.131/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1781408D /* 23.129.64.141/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1781408B /* 23.129.64.139/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x178140DF /* 23.129.64.223/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x17814088 /* 23.129.64.136/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1781408A /* 23.129.64.138/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x178140E3 /* 23.129.64.227/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x17814090 /* 23.129.64.144/32 */, 32, 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0xC7F9E69F /* 199.249.230.159/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB99B631C /* 185.155.99.28/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x2D5FA973 /* 45.95.169.115/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9F3DA98 /* 185.243.218.152/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xD9AACC6E /* 217.170.204.110/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E6A1 /* 199.249.230.161/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC02A74D7 /* 192.42.116.215/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6BBD1F21 /* 107.189.31.33/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC819104D /* 200.25.16.77/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x2D385B29 /* 45.56.91.41/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC1DA7648 /* 193.218.118.72/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6D62D036 /* 109.98.208.54/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5BD0A2C5 /* 91.208.162.197/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC02A74D8 /* 192.42.116.216/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB99B634D /* 185.155.99.77/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E6A2 /* 199.249.230.162/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E69C /* 199.249.230.156/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E6A0 /* 199.249.230.160/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC02A74C7 /* 192.42.116.199/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC02A74D6 /* 192.42.116.214/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5D7B0C70 /* 93.123.12.112/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB2DA9033 /* 178.218.144.51/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x05FF6F40 /* 5.255.111.64/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x2D3DBCDF /* 45.61.188.223/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC02A74C3 /* 192.42.116.195/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB965224A /* 185.101.34.74/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC02A74C4 /* 192.42.116.196/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB03A59B6 /* 176.58.89.182/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC2A9AF96 /* 194.169.175.150/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC7F9E698 /* 199.249.230.152/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC02A74BF /* 192.42.116.191/32 */, 32, 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0xC7F9E699 /* 199.249.230.153/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC02A74C6 /* 192.42.116.198/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9709C6D /* 185.112.156.109/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC02A74C8 /* 192.42.116.200/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC02A74C0 /* 192.42.116.192/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC02A74C1 /* 192.42.116.193/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC02A74C5 /* 192.42.116.197/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC02A74D5 /* 192.42.116.213/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x05FF60F5 /* 5.255.96.245/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6BBD01AF /* 107.189.1.175/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC02A74D4 /* 192.42.116.212/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC02A74D3 /* 192.42.116.211/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5BD04BB2 /* 91.208.75.178/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x59936F6A /* 89.147.111.106/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x85826B05 /* 133.130.107.5/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB99A6E11 /* 185.154.110.17/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xAC51836F /* 172.81.131.111/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1789FA1E /* 23.137.250.30/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xD18D3366 /* 209.141.51.102/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9541FFE /* 185.84.31.254/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x82C10FBA /* 130.193.15.186/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x82C10A15 /* 130.193.10.21/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1789F908 /* 23.137.249.8/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9F41E14 /* 185.244.30.20/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9F41E21 /* 185.244.30.33/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9F41E0B /* 185.244.30.11/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9F41E1C /* 185.244.30.28/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9F41E27 /* 185.244.30.39/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9F41E1E /* 185.244.30.30/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9F41E20 /* 185.244.30.32/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9F41E24 /* 185.244.30.36/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9F41E1B /* 185.244.30.27/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9F41E29 /* 185.244.30.41/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x2E669CC4 /* 46.102.156.196/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x2D9BA8CE /* 45.155.168.206/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x05BDD98F /* 5.189.217.143/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x2D0892D5 /* 45.8.146.213/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x66827FEF /* 102.130.127.239/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC02A74CB /* 192.42.116.203/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC02A74DA /* 192.42.116.218/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC02A74C9 /* 192.42.116.201/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC02A74DD /* 192.42.116.221/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC02A74DE /* 192.42.116.222/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC02A74CC /* 192.42.116.204/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC02A74CD /* 192.42.116.205/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC02A74CA /* 192.42.116.202/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC02A74DC /* 192.42.116.220/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC02A74DB /* 192.42.116.219/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x2D3DBCB6 /* 45.61.188.182/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x894AA9F1 /* 137.74.169.241/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC02A74BC /* 192.42.116.188/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB96B2FAB /* 185.107.47.171/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC02A74BD /* 192.42.116.189/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC02A74DF /* 192.42.116.223/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6D46645A /* 109.70.100.90/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6D46645B /* 109.70.100.91/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6D46645C /* 109.70.100.92/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6D46645E /* 109.70.100.94/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC02A74CE /* 192.42.116.206/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6D46645D /* 109.70.100.93/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x8D620B83 /* 141.98.11.131/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5EB0020A /* 94.176.2.10/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5BDA14C6 /* 91.218.20.198/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x2D9BADC2 /* 45.155.173.194/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xD90CD7A7 /* 217.12.215.167/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6546 /* 185.220.101.70/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6554 /* 185.220.101.84/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6551 /* 185.220.101.81/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6540 /* 185.220.101.64/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6548 /* 185.220.101.72/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6552 /* 185.220.101.82/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6541 /* 185.220.101.65/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC654E /* 185.220.101.78/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6547 /* 185.220.101.71/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6545 /* 185.220.101.69/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC654B /* 185.220.101.75/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6544 /* 185.220.101.68/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6543 /* 185.220.101.67/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC654F /* 185.220.101.79/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC654A /* 185.220.101.74/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6550 /* 185.220.101.80/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6549 /* 185.220.101.73/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6542 /* 185.220.101.66/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC654D /* 185.220.101.77/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC654C /* 185.220.101.76/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6553 /* 185.220.101.83/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6BBD05F1 /* 107.189.5.241/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xCDB97FE2 /* 205.185.127.226/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6BBD04A9 /* 107.189.4.169/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xCB1CF665 /* 203.28.246.101/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x179AB115 /* 23.154.177.21/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x179AB117 /* 23.154.177.23/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x179AB112 /* 23.154.177.18/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x179AB118 /* 23.154.177.24/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x179AB119 /* 23.154.177.25/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x179AB116 /* 23.154.177.22/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x179AB114 /* 23.154.177.20/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x179AB113 /* 23.154.177.19/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6BBD0C07 /* 107.189.12.7/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x90D95050 /* 144.217.80.80/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5D5FE256 /* 93.95.226.86/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC62EA69D /* 198.46.166.157/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x054F6D30 /* 5.79.109.48/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x4E8749B6 /* 78.135.73.182/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1780F8D0 /* 23.128.248.208/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1780F8D6 /* 23.128.248.214/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1780F8CA /* 23.128.248.202/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1780F8CF /* 23.128.248.207/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1780F8CB /* 23.128.248.203/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1780F8D5 /* 23.128.248.213/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1780F8D1 /* 23.128.248.209/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1780F8D2 /* 23.128.248.210/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1780F8D3 /* 23.128.248.211/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1780F8CC /* 23.128.248.204/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5D5FE6D8 /* 93.95.230.216/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1780F8D4 /* 23.128.248.212/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1780F8CE /* 23.128.248.206/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1780F8C9 /* 23.128.248.201/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1780F8CD /* 23.128.248.205/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1798E108 /* 23.152.225.8/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1798E109 /* 23.152.225.9/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1798E105 /* 23.152.225.5/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1798E104 /* 23.152.225.4/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1798E103 /* 23.152.225.3/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1798E102 /* 23.152.225.2/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1798E107 /* 23.152.225.7/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1798E106 /* 23.152.225.6/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9813E3E /* 185.129.62.62/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x674BBE39 /* 103.75.190.57/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xA07764BC /* 160.119.100.188/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x05BDD999 /* 5.189.217.153/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x66827F75 /* 102.130.127.117/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x4D49476E /* 77.73.71.110/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x68F44D05 /* 104.244.77.5/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x829550C7 /* 130.149.80.199/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB8693028 /* 184.105.48.40/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xD18D22A7 /* 209.141.34.167/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9F6BC49 /* 185.246.188.73/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC12A2171 /* 193.42.33.113/32 */, 32, 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/* 205.185.117.91/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC1BD64C5 /* 193.189.100.197/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC1BD64C7 /* 193.189.100.199/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC1BD64C2 /* 193.189.100.194/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC1BD64CB /* 193.189.100.203/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC1BD64C4 /* 193.189.100.196/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC1BD64C9 /* 193.189.100.201/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC1BD64C8 /* 193.189.100.200/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC1BD64CD /* 193.189.100.205/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC1BD64C3 /* 193.189.100.195/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC1BD64CC /* 193.189.100.204/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC1BD64CE /* 193.189.100.206/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC1BD64CA /* 193.189.100.202/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC1BD64C6 /* 193.189.100.198/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xCA454C24 /* 202.69.76.36/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x90AC7622 /* 144.172.118.34/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC051DFB1 /* 192.81.223.177/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xBCF0D214 /* 188.240.210.20/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x4F7C3CAE /* 79.124.60.174/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x98209609 /* 152.32.150.9/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC2B649E0 /* 194.182.73.224/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC65BF /* 185.220.101.191/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6598 /* 185.220.101.152/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC65B6 /* 185.220.101.182/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC65AD /* 185.220.101.173/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC659C /* 185.220.101.156/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC658E /* 185.220.101.142/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC65B5 /* 185.220.101.181/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC65BA /* 185.220.101.186/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6587 /* 185.220.101.135/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC65BE /* 185.220.101.190/32 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NDPI_PROTOCOL_TOR }, + { 0xB9DC6581 /* 185.220.101.129/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC65B7 /* 185.220.101.183/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC65A2 /* 185.220.101.162/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC65BC /* 185.220.101.188/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC659E /* 185.220.101.158/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC65A6 /* 185.220.101.166/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6599 /* 185.220.101.153/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC659F /* 185.220.101.159/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC65A7 /* 185.220.101.167/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6594 /* 185.220.101.148/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6582 /* 185.220.101.130/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6592 /* 185.220.101.146/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC658F /* 185.220.101.143/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC659B /* 185.220.101.155/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC65BD /* 185.220.101.189/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC65B4 /* 185.220.101.180/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6597 /* 185.220.101.151/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6590 /* 185.220.101.144/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC658C /* 185.220.101.140/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6580 /* 185.220.101.128/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC658B /* 185.220.101.139/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6585 /* 185.220.101.133/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC65B8 /* 185.220.101.184/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC658A /* 185.220.101.138/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC659A /* 185.220.101.154/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC65AE /* 185.220.101.174/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6593 /* 185.220.101.147/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC65A8 /* 185.220.101.168/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6596 /* 185.220.101.150/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC65A1 /* 185.220.101.161/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6595 /* 185.220.101.149/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC658D /* 185.220.101.141/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6583 /* 185.220.101.131/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6584 /* 185.220.101.132/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC65B2 /* 185.220.101.178/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC65B3 /* 185.220.101.179/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6591 /* 185.220.101.145/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC65AA /* 185.220.101.170/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC65AF /* 185.220.101.175/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xCB1CF68D /* 203.28.246.141/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xA45CDA8B /* 164.92.218.139/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5EB10983 /* 94.177.9.131/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9C17D2A /* 185.193.125.42/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x054F4213 /* 5.79.66.19/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x9750949F /* 151.80.148.159/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5043A751 /* 80.67.167.81/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x8FF425C0 /* 143.244.37.192/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5B5A78C4 /* 91.90.120.196/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xBC7E5EAD /* 188.126.94.173/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5E4BE151 /* 94.75.225.81/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9F7E262 /* 185.247.226.98/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6DCEF391 /* 109.206.243.145/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5C57066B /* 92.87.6.107/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC21AC08E /* 194.26.192.142/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x05B55077 /* 5.181.80.119/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB00A77D5 /* 176.10.119.213/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x2D9FFA3E /* 45.159.250.62/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x05FF6707 /* 5.255.103.7/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x17B8306C /* 23.184.48.108/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x801F000D /* 128.31.0.13/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5E836526 /* 94.131.101.38/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xAB19C1EA /* 171.25.193.234/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xAB19C119 /* 171.25.193.25/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x023A38D4 /* 2.58.56.212/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x2D4C4EE9 /* 45.76.78.233/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB0795133 /* 176.121.81.51/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5FD63661 /* 95.214.54.97/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x5BCB9174 /* 91.203.145.116/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB991F51A /* 185.145.245.26/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x8D5F948D /* 141.95.148.141/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC0C3500A /* 192.195.80.10/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xC63A6B35 /* 198.58.107.53/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9A5A9EF /* 185.165.169.239/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xA549F2A3 /* 165.73.242.163/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x59BB8F1F /* 89.187.143.31/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x2D8B7AF1 /* 45.139.122.241/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x17B83064 /* 23.184.48.100/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1F2AB038 /* 31.42.176.56/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x33DE564F /* 51.222.86.79/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x68958375 /* 104.149.131.117/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6704 /* 185.220.103.4/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6706 /* 185.220.103.6/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xA2F74AC8 /* 162.247.74.200/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB9DC6705 /* 185.220.103.5/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x92468175 /* 146.70.129.117/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x92468173 /* 146.70.129.115/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6DE4281D /* 109.228.40.29/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1798E10A /* 23.152.225.10/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1798E10B /* 23.152.225.11/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x6BBD05D9 /* 107.189.5.217/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xB970930A /* 185.112.147.10/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x05FF695C /* 5.255.105.92/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x2D5C014A /* 45.92.1.74/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0xCDB97321 /* 205.185.115.33/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x8BA2F3F4 /* 139.162.243.244/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1780F829 /* 23.128.248.41/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1780F824 /* 23.128.248.36/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1780F827 /* 23.128.248.39/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1780F828 /* 23.128.248.40/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1780F821 /* 23.128.248.33/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1780F826 /* 23.128.248.38/32 */, 32, NDPI_PROTOCOL_TOR }, + { 0x1780F825 /* 23.128.248.37/32 */, 32, NDPI_PROTOCOL_TOR }, + /* End */ + { 0x0, 0, 0 } +}; diff --git a/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_whatsapp_match.c b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_whatsapp_match.c new file mode 100644 index 0000000000..ff533fb665 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_whatsapp_match.c @@ -0,0 +1,256 @@ +/* + * + * This file is generated automatically and part of nDPI + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +/* ****************************************************** */ +#include "../ndpi_typedefs.h" +#include "../ndpi_protocol_ids.h" + +static ndpi_network ndpi_protocol_whatsapp_protocol_list[] = { + { 0x0321DD30 /* 3.33.221.48/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x0321FC3D /* 3.33.252.61/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x0FC5CED9 /* 15.197.206.217/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x0FC5D2D0 /* 15.197.210.208/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x1F0D403C /* 31.13.64.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x1F0D4131 /* 31.13.65.49/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x1F0D4132 /* 31.13.65.50/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x1F0D4233 /* 31.13.66.51/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x1F0D4238 /* 31.13.66.56/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x1F0D4334 /* 31.13.67.52/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x1F0D443C /* 31.13.68.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x1F0D453C /* 31.13.69.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x1F0D4631 /* 31.13.70.49/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x1F0D4632 /* 31.13.70.50/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x1F0D4731 /* 31.13.71.49/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x1F0D4732 /* 31.13.71.50/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x1F0D4830 /* 31.13.72.48/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x1F0D4834 /* 31.13.72.52/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x1F0D4934 /* 31.13.73.52/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x1F0D4A34 /* 31.13.74.52/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x1F0D4B3C /* 31.13.75.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x1F0D4C3C /* 31.13.76.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x1F0D4D3C /* 31.13.77.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x1F0D4E3C /* 31.13.78.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x1F0D4F35 /* 31.13.79.53/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x1F0D4F36 /* 31.13.79.54/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x1F0D5030 /* 31.13.80.48/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x1F0D5035 /* 31.13.80.53/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x1F0D5130 /* 31.13.81.48/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x1F0D5135 /* 31.13.81.53/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x1F0D5233 /* 31.13.82.51/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x1F0D5237 /* 31.13.82.55/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x1F0D5331 /* 31.13.83.49/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x1F0D5333 /* 31.13.83.51/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x1F0D5431 /* 31.13.84.49/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x1F0D5433 /* 31.13.84.51/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x1F0D5531 /* 31.13.85.49/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x1F0D5533 /* 31.13.85.51/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x1F0D5631 /* 31.13.86.49/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x1F0D5633 /* 31.13.86.51/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x1F0D5730 /* 31.13.87.48/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x1F0D5733 /* 31.13.87.51/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x1F0D583C /* 31.13.88.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x1F0D5935 /* 31.13.89.53/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x1F0D5936 /* 31.13.89.54/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x1F0D5A3C /* 31.13.90.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x1F0D5B3C /* 31.13.91.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x1F0D5C30 /* 31.13.92.48/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x1F0D5C34 /* 31.13.92.52/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x1F0D5D35 /* 31.13.93.53/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x1F0D5D36 /* 31.13.93.54/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x1F0D5E34 /* 31.13.94.52/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x1F0D5E36 /* 31.13.94.54/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x1F0D5F3C /* 31.13.95.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x22C0B50C /* 34.192.181.12/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x22C12670 /* 34.193.38.112/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x22C247D9 /* 34.194.71.217/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x22C2FFE6 /* 34.194.255.230/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x45ABFA3C /* 69.171.250.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x66846036 /* 102.132.96.54/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x66846136 /* 102.132.97.54/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x6684623C /* 102.132.98.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x6684633C /* 102.132.99.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x6684643C /* 102.132.100.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x6684653C /* 102.132.101.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x6684663C /* 102.132.102.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x6684673C /* 102.132.103.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x6684683C /* 102.132.104.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x6684693C /* 102.132.105.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x66846A3C /* 102.132.106.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x66846B3C /* 102.132.107.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x66846C3C /* 102.132.108.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x66846D3C /* 102.132.109.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x66846E3C /* 102.132.110.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x66846F3C /* 102.132.111.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0003C /* 157.240.0.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0013C /* 157.240.1.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF00235 /* 157.240.2.53/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF00236 /* 157.240.2.54/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF00336 /* 157.240.3.54/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0043C /* 157.240.4.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0053C /* 157.240.5.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF00635 /* 157.240.6.53/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF00636 /* 157.240.6.54/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF00735 /* 157.240.7.53/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF00736 /* 157.240.7.54/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF00835 /* 157.240.8.53/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF00836 /* 157.240.8.54/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF00935 /* 157.240.9.53/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF00936 /* 157.240.9.54/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF00A35 /* 157.240.10.53/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF00A36 /* 157.240.10.54/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF00B35 /* 157.240.11.53/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF00B36 /* 157.240.11.54/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF00C35 /* 157.240.12.53/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF00C36 /* 157.240.12.54/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF00D36 /* 157.240.13.54/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF00E34 /* 157.240.14.52/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF00F3C /* 157.240.15.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF01034 /* 157.240.16.52/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0113C /* 157.240.17.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF01234 /* 157.240.18.52/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF01335 /* 157.240.19.53/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF01336 /* 157.240.19.54/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF01434 /* 157.240.20.52/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF01534 /* 157.240.21.52/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF01635 /* 157.240.22.53/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF01636 /* 157.240.22.54/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF01735 /* 157.240.23.53/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF01736 /* 157.240.23.54/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0183C /* 157.240.24.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0193C /* 157.240.25.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF01A36 /* 157.240.26.54/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF01B36 /* 157.240.27.54/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF01C33 /* 157.240.28.51/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF01C37 /* 157.240.28.55/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF01D3C /* 157.240.29.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF01E36 /* 157.240.30.54/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF01F3C /* 157.240.31.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0C034 /* 157.240.192.52/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0C037 /* 157.240.192.55/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0C13C /* 157.240.193.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0C236 /* 157.240.194.54/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0C336 /* 157.240.195.54/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0C338 /* 157.240.195.56/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0C43C /* 157.240.196.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0C53C /* 157.240.197.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0C63C /* 157.240.198.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0C73C /* 157.240.199.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0C83C /* 157.240.200.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0C93C /* 157.240.201.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0CA3C /* 157.240.202.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0CB3C /* 157.240.203.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0CC3C /* 157.240.204.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0CD3C /* 157.240.205.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0CE3C /* 157.240.206.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0CF3C /* 157.240.207.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0D03C /* 157.240.208.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0D13C /* 157.240.209.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0D23C /* 157.240.210.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0D33C /* 157.240.211.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0D43C /* 157.240.212.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0D53C /* 157.240.213.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0D63C /* 157.240.214.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0D73C /* 157.240.215.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0D83C /* 157.240.216.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0D93C /* 157.240.217.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0DA3C /* 157.240.218.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0DB3C /* 157.240.219.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0DC3C /* 157.240.220.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0DD3C /* 157.240.221.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0DE3C /* 157.240.222.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0DF3C /* 157.240.223.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0E03C /* 157.240.224.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0E13C /* 157.240.225.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0E23C /* 157.240.226.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0E33C /* 157.240.227.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0E43C /* 157.240.228.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0E53C /* 157.240.229.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0E73C /* 157.240.231.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0E83C /* 157.240.232.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0E93C /* 157.240.233.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0EA3C /* 157.240.234.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0EB3C /* 157.240.235.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0EC3C /* 157.240.236.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0ED3C /* 157.240.237.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0EE3C /* 157.240.238.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0EF3C /* 157.240.239.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0F03C /* 157.240.240.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0F13C /* 157.240.241.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0F23C /* 157.240.242.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0F33C /* 157.240.243.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0F43C /* 157.240.244.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0F53C /* 157.240.245.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0F63C /* 157.240.246.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0F73C /* 157.240.247.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0F83C /* 157.240.248.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0F93C /* 157.240.249.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0FA3C /* 157.240.250.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0FB3C /* 157.240.251.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0FC3C /* 157.240.252.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0FD3C /* 157.240.253.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0x9DF0FE3C /* 157.240.254.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0xA346803C /* 163.70.128.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0xA346813C /* 163.70.129.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0xA346823C /* 163.70.130.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0xA346833C /* 163.70.131.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0xA346843C /* 163.70.132.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0xA346853C /* 163.70.133.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0xA346863C /* 163.70.134.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0xA346873C /* 163.70.135.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0xA346883C /* 163.70.136.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0xA346893C /* 163.70.137.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0xA3468A3C /* 163.70.138.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0xA3468B3C /* 163.70.139.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0xA3468C3C /* 163.70.140.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0xA3468D3C /* 163.70.141.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0xA3468E3C /* 163.70.142.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0xA3468F3C /* 163.70.143.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0xA346903C /* 163.70.144.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0xA346913C /* 163.70.145.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0xA346923C /* 163.70.146.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0xA346933C /* 163.70.147.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0xA346943C /* 163.70.148.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0xA346953C /* 163.70.149.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0xA346963C /* 163.70.150.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0xA346973C /* 163.70.151.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0xA346983C /* 163.70.152.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0xA346993C /* 163.70.153.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0xA3469A3C /* 163.70.154.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0xA3469B3C /* 163.70.155.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0xA3469C3C /* 163.70.156.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0xA3469D3C /* 163.70.157.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0xA3469E3C /* 163.70.158.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0xA3469F3C /* 163.70.159.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0xB33CC031 /* 179.60.192.49/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0xB33CC033 /* 179.60.192.51/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0xB33CC13C /* 179.60.193.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + { 0xB33CC235 /* 179.60.194.53/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0xB33CC236 /* 179.60.194.54/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0xB33CC331 /* 179.60.195.49/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0xB33CC333 /* 179.60.195.51/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0xB93CD835 /* 185.60.216.53/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0xB93CD836 /* 185.60.216.54/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0xB93CD935 /* 185.60.217.53/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0xB93CD936 /* 185.60.217.54/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0xB93CDA35 /* 185.60.218.53/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0xB93CDA36 /* 185.60.218.54/32 */, 32, NDPI_PROTOCOL_WHATSAPP }, + { 0xB93CDB3C /* 185.60.219.60/31 */, 31, NDPI_PROTOCOL_WHATSAPP }, + /* End */ + { 0x0, 0, 0 } +}; diff --git a/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_zoom_match.c b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_zoom_match.c new file mode 100644 index 0000000000..f3898811ba --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/inc_generated/ndpi_zoom_match.c @@ -0,0 +1,337 @@ +/* + * + * This file is generated automatically and part of nDPI + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +/* ****************************************************** */ +#include "../ndpi_typedefs.h" +#include "../ndpi_protocol_ids.h" + +static ndpi_network ndpi_protocol_zoom_protocol_list[] = { + { 0x03072300 /* 3.7.35.0/25 */, 25, NDPI_PROTOCOL_ZOOM }, + { 0x03158980 /* 3.21.137.128/25 */, 25, NDPI_PROTOCOL_ZOOM }, + { 0x03160B00 /* 3.22.11.0/24 */, 24, NDPI_PROTOCOL_ZOOM }, + { 0x03175D00 /* 3.23.93.0/24 */, 24, NDPI_PROTOCOL_ZOOM }, + { 0x03192980 /* 3.25.41.128/25 */, 25, NDPI_PROTOCOL_ZOOM }, + { 0x03192A00 /* 3.25.42.0/25 */, 25, NDPI_PROTOCOL_ZOOM }, + { 0x03193100 /* 3.25.49.0/24 */, 24, NDPI_PROTOCOL_ZOOM }, + { 0x03501480 /* 3.80.20.128/25 */, 25, NDPI_PROTOCOL_ZOOM }, + { 0x03601300 /* 3.96.19.0/24 */, 24, NDPI_PROTOCOL_ZOOM }, + { 0x03652080 /* 3.101.32.128/25 */, 25, NDPI_PROTOCOL_ZOOM }, + { 0x03653400 /* 3.101.52.0/25 */, 25, NDPI_PROTOCOL_ZOOM }, + { 0x03682280 /* 3.104.34.128/25 */, 25, NDPI_PROTOCOL_ZOOM }, + { 0x03787900 /* 3.120.121.0/25 */, 25, NDPI_PROTOCOL_ZOOM }, + { 0x037FC280 /* 3.127.194.128/25 */, 25, NDPI_PROTOCOL_ZOOM }, + { 0x03D04800 /* 3.208.72.0/25 */, 25, NDPI_PROTOCOL_ZOOM }, + { 0x03D3F100 /* 3.211.241.0/25 */, 25, NDPI_PROTOCOL_ZOOM }, + { 0x03EB4500 /* 3.235.69.0/25 */, 25, NDPI_PROTOCOL_ZOOM }, + { 0x03EB4780 /* 3.235.71.128/25 */, 25, NDPI_PROTOCOL_ZOOM }, + { 0x03EB4880 /* 3.235.72.128/25 */, 25, NDPI_PROTOCOL_ZOOM }, + { 0x03EB4900 /* 3.235.73.0/25 */, 25, NDPI_PROTOCOL_ZOOM }, + { 0x03EB5200 /* 3.235.82.0/23 */, 23, NDPI_PROTOCOL_ZOOM }, + { 0x03EB6000 /* 3.235.96.0/23 */, 23, NDPI_PROTOCOL_ZOOM }, + { 0x04227D80 /* 4.34.125.128/25 */, 25, NDPI_PROTOCOL_ZOOM }, + { 0x04234080 /* 4.35.64.128/25 */, 25, NDPI_PROTOCOL_ZOOM }, + { 0x08058000 /* 8.5.128.0/23 */, 23, NDPI_PROTOCOL_ZOOM }, + { 0x0D340680 /* 13.52.6.128/25 */, 25, NDPI_PROTOCOL_ZOOM }, + { 0x0D349200 /* 13.52.146.0/25 */, 25, NDPI_PROTOCOL_ZOOM }, + { 0x0FDC5000 /* 15.220.80.0/24 */, 24, NDPI_PROTOCOL_ZOOM }, + { 0x0FDC5100 /* 15.220.81.0/25 */, 25, NDPI_PROTOCOL_ZOOM }, + { 0x129D5800 /* 18.157.88.0/24 */, 24, NDPI_PROTOCOL_ZOOM }, + { 0x12CD5D80 /* 18.205.93.128/25 */, 25, NDPI_PROTOCOL_ZOOM }, + { 0x12FE1780 /* 18.254.23.128/25 */, 25, NDPI_PROTOCOL_ZOOM }, + { 0x12FE3D00 /* 18.254.61.0/25 */, 25, NDPI_PROTOCOL_ZOOM }, + { 0x14CB9E50 /* 20.203.158.80/28 */, 28, NDPI_PROTOCOL_ZOOM }, + { 0x14CBBEC0 /* 20.203.190.192/26 */, 26, NDPI_PROTOCOL_ZOOM }, + { 0x32EFCA00 /* 50.239.202.0/23 */, 23, NDPI_PROTOCOL_ZOOM }, + { 0x32EFCC00 /* 50.239.204.0/24 */, 24, NDPI_PROTOCOL_ZOOM }, + { 0x343D6480 /* 52.61.100.128/25 */, 25, NDPI_PROTOCOL_ZOOM }, + { 0x34549700 /* 52.84.151.0/24 */, 24, NDPI_PROTOCOL_ZOOM }, + { 0x34CA3EC0 /* 52.202.62.192/26 */, 26, NDPI_PROTOCOL_ZOOM }, + { 0x34D7A800 /* 52.215.168.0/25 */, 25, NDPI_PROTOCOL_ZOOM }, + { 0x407D3E00 /* 64.125.62.0/24 */, 24, NDPI_PROTOCOL_ZOOM }, + { 0x40D39000 /* 64.211.144.0/24 */, 24, NDPI_PROTOCOL_ZOOM }, + { 0x40E02000 /* 64.224.32.0/19 */, 19, NDPI_PROTOCOL_ZOOM }, + { 0x41279800 /* 65.39.152.0/24 */, 24, NDPI_PROTOCOL_ZOOM }, + { 0x45AE3900 /* 69.174.57.0/24 */, 24, NDPI_PROTOCOL_ZOOM }, + { 0x45AE6C00 /* 69.174.108.0/22 */, 22, NDPI_PROTOCOL_ZOOM }, + { 0x634F1400 /* 99.79.20.0/25 */, 25, NDPI_PROTOCOL_ZOOM }, + { 0x6524A700 /* 101.36.167.0/24 */, 24, NDPI_PROTOCOL_ZOOM }, + { 0x6524AA00 /* 101.36.170.0/23 */, 23, NDPI_PROTOCOL_ZOOM }, + { 0x677AA600 /* 103.122.166.0/23 */, 23, NDPI_PROTOCOL_ZOOM }, + { 0x6F217300 /* 111.33.115.0/25 */, 25, NDPI_PROTOCOL_ZOOM }, + { 0x6F21B500 /* 111.33.181.0/25 */, 25, NDPI_PROTOCOL_ZOOM }, + { 0x736E9AC0 /* 115.110.154.192/26 */, 26, NDPI_PROTOCOL_ZOOM }, + { 0x737238C0 /* 115.114.56.192/26 */, 26, NDPI_PROTOCOL_ZOOM }, + { 0x73727300 /* 115.114.115.0/26 */, 26, NDPI_PROTOCOL_ZOOM }, + { 0x73728300 /* 115.114.131.0/26 */, 26, NDPI_PROTOCOL_ZOOM }, + { 0x781D9400 /* 120.29.148.0/24 */, 24, NDPI_PROTOCOL_ZOOM }, + { 0x79F49200 /* 121.244.146.0/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x81970180 /* 129.151.1.128/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x819701C0 /* 129.151.1.192/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x81970200 /* 129.151.2.0/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x819703A0 /* 129.151.3.160/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x81970760 /* 129.151.7.96/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x81970B40 /* 129.151.11.64/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x81970B80 /* 129.151.11.128/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x81970C00 /* 129.151.12.0/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x81970D40 /* 129.151.13.64/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x81970FE0 /* 129.151.15.224/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x81971000 /* 129.151.16.0/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x81971FE0 /* 129.151.31.224/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x81972800 /* 129.151.40.0/25 */, 25, NDPI_PROTOCOL_ZOOM }, + { 0x819728A0 /* 129.151.40.160/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x819728C0 /* 129.151.40.192/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x81972900 /* 129.151.41.0/25 */, 25, NDPI_PROTOCOL_ZOOM }, + { 0x819729C0 /* 129.151.41.192/26 */, 26, NDPI_PROTOCOL_ZOOM }, + { 0x81972A00 /* 129.151.42.0/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x81972A40 /* 129.151.42.64/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x81972A80 /* 129.151.42.128/26 */, 26, NDPI_PROTOCOL_ZOOM }, + { 0x81972AE0 /* 129.151.42.224/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x81972B00 /* 129.151.43.0/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x81972B40 /* 129.151.43.64/26 */, 26, NDPI_PROTOCOL_ZOOM }, + { 0x81973000 /* 129.151.48.0/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x819730A0 /* 129.151.48.160/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x81973100 /* 129.151.49.0/26 */, 26, NDPI_PROTOCOL_ZOOM }, + { 0x81973160 /* 129.151.49.96/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x81973180 /* 129.151.49.128/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x819731C0 /* 129.151.49.192/26 */, 26, NDPI_PROTOCOL_ZOOM }, + { 0x81973200 /* 129.151.50.0/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x81973240 /* 129.151.50.64/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x81973480 /* 129.151.52.128/26 */, 26, NDPI_PROTOCOL_ZOOM }, + { 0x81973520 /* 129.151.53.32/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x819735E0 /* 129.151.53.224/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x81973720 /* 129.151.55.32/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x81973820 /* 129.151.56.32/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x81973920 /* 129.151.57.32/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x81973CC0 /* 129.151.60.192/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x819F0220 /* 129.159.2.32/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x819F02C0 /* 129.159.2.192/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x819F0300 /* 129.159.3.0/24 */, 24, NDPI_PROTOCOL_ZOOM }, + { 0x819F0400 /* 129.159.4.0/23 */, 23, NDPI_PROTOCOL_ZOOM }, + { 0x819F0600 /* 129.159.6.0/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x819F0660 /* 129.159.6.96/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x819F0680 /* 129.159.6.128/26 */, 26, NDPI_PROTOCOL_ZOOM }, + { 0x819F06C0 /* 129.159.6.192/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x819FA000 /* 129.159.160.0/26 */, 26, NDPI_PROTOCOL_ZOOM }, + { 0x819FA040 /* 129.159.160.64/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x819FA300 /* 129.159.163.0/26 */, 26, NDPI_PROTOCOL_ZOOM }, + { 0x819FA3A0 /* 129.159.163.160/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x819FD000 /* 129.159.208.0/21 */, 21, NDPI_PROTOCOL_ZOOM }, + { 0x819FD800 /* 129.159.216.0/26 */, 26, NDPI_PROTOCOL_ZOOM }, + { 0x819FD840 /* 129.159.216.64/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x819FD880 /* 129.159.216.128/26 */, 26, NDPI_PROTOCOL_ZOOM }, + { 0x823DA400 /* 130.61.164.0/22 */, 22, NDPI_PROTOCOL_ZOOM }, + { 0x84E2B000 /* 132.226.176.0/25 */, 25, NDPI_PROTOCOL_ZOOM }, + { 0x84E2B080 /* 132.226.176.128/26 */, 26, NDPI_PROTOCOL_ZOOM }, + { 0x84E2B160 /* 132.226.177.96/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x84E2B180 /* 132.226.177.128/25 */, 25, NDPI_PROTOCOL_ZOOM }, + { 0x84E2B200 /* 132.226.178.0/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x84E2B280 /* 132.226.178.128/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x84E2B2E0 /* 132.226.178.224/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x84E2B300 /* 132.226.179.0/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x84E2B340 /* 132.226.179.64/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x84E2B480 /* 132.226.180.128/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x84E2B7A0 /* 132.226.183.160/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x84E2B9C0 /* 132.226.185.192/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x86E00000 /* 134.224.0.0/16 */, 16, NDPI_PROTOCOL_ZOOM }, + { 0x8CEE8000 /* 140.238.128.0/24 */, 24, NDPI_PROTOCOL_ZOOM }, + { 0x8CEEE800 /* 140.238.232.0/22 */, 22, NDPI_PROTOCOL_ZOOM }, + { 0x90C30000 /* 144.195.0.0/16 */, 16, NDPI_PROTOCOL_ZOOM }, + { 0x937C6000 /* 147.124.96.0/19 */, 19, NDPI_PROTOCOL_ZOOM }, + { 0x95890000 /* 149.137.0.0/17 */, 17, NDPI_PROTOCOL_ZOOM }, + { 0x96E6E000 /* 150.230.224.0/25 */, 25, NDPI_PROTOCOL_ZOOM }, + { 0x96E6E080 /* 150.230.224.128/26 */, 26, NDPI_PROTOCOL_ZOOM }, + { 0x96E6E0E0 /* 150.230.224.224/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x98431400 /* 152.67.20.0/24 */, 24, NDPI_PROTOCOL_ZOOM }, + { 0x98437600 /* 152.67.118.0/24 */, 24, NDPI_PROTOCOL_ZOOM }, + { 0x9843A800 /* 152.67.168.0/22 */, 22, NDPI_PROTOCOL_ZOOM }, + { 0x9843B400 /* 152.67.180.0/24 */, 24, NDPI_PROTOCOL_ZOOM }, + { 0x9843B820 /* 152.67.184.32/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x9843F000 /* 152.67.240.0/21 */, 21, NDPI_PROTOCOL_ZOOM }, + { 0x98460000 /* 152.70.0.0/25 */, 25, NDPI_PROTOCOL_ZOOM }, + { 0x98460080 /* 152.70.0.128/26 */, 26, NDPI_PROTOCOL_ZOOM }, + { 0x984600E0 /* 152.70.0.224/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x98460100 /* 152.70.1.0/25 */, 25, NDPI_PROTOCOL_ZOOM }, + { 0x98460180 /* 152.70.1.128/26 */, 26, NDPI_PROTOCOL_ZOOM }, + { 0x984601C0 /* 152.70.1.192/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x98460200 /* 152.70.2.0/26 */, 26, NDPI_PROTOCOL_ZOOM }, + { 0x984607C0 /* 152.70.7.192/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x98460A20 /* 152.70.10.32/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x9846E020 /* 152.70.224.32/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x9846E040 /* 152.70.224.64/26 */, 26, NDPI_PROTOCOL_ZOOM }, + { 0x9846E0A0 /* 152.70.224.160/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x9846E0C0 /* 152.70.224.192/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x9846E100 /* 152.70.225.0/25 */, 25, NDPI_PROTOCOL_ZOOM }, + { 0x9846E1A0 /* 152.70.225.160/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x9846E1C0 /* 152.70.225.192/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x9846E200 /* 152.70.226.0/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x9846E360 /* 152.70.227.96/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x9846E3C0 /* 152.70.227.192/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x9846E400 /* 152.70.228.0/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x9846E440 /* 152.70.228.64/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x9846E480 /* 152.70.228.128/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x9C2D0000 /* 156.45.0.0/17 */, 17, NDPI_PROTOCOL_ZOOM }, + { 0x9E654000 /* 158.101.64.0/24 */, 24, NDPI_PROTOCOL_ZOOM }, + { 0x9E65B800 /* 158.101.184.0/23 */, 23, NDPI_PROTOCOL_ZOOM }, + { 0x9E65BA00 /* 158.101.186.0/25 */, 25, NDPI_PROTOCOL_ZOOM }, + { 0x9E65BA80 /* 158.101.186.128/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x9E65BAC0 /* 158.101.186.192/26 */, 26, NDPI_PROTOCOL_ZOOM }, + { 0x9E65BB00 /* 158.101.187.0/25 */, 25, NDPI_PROTOCOL_ZOOM }, + { 0x9E65BBA0 /* 158.101.187.160/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0x9E65BBC0 /* 158.101.187.192/26 */, 26, NDPI_PROTOCOL_ZOOM }, + { 0x9F7C0000 /* 159.124.0.0/16 */, 16, NDPI_PROTOCOL_ZOOM }, + { 0xA0013880 /* 160.1.56.128/25 */, 25, NDPI_PROTOCOL_ZOOM }, + { 0xA1C78800 /* 161.199.136.0/22 */, 22, NDPI_PROTOCOL_ZOOM }, + { 0xA20CE800 /* 162.12.232.0/22 */, 22, NDPI_PROTOCOL_ZOOM }, + { 0xA2FF2400 /* 162.255.36.0/22 */, 22, NDPI_PROTOCOL_ZOOM }, + { 0xA5FE5800 /* 165.254.88.0/23 */, 23, NDPI_PROTOCOL_ZOOM }, + { 0xA66C4000 /* 166.108.64.0/18 */, 18, NDPI_PROTOCOL_ZOOM }, + { 0xA88A1000 /* 168.138.16.0/22 */, 22, NDPI_PROTOCOL_ZOOM }, + { 0xA88A3000 /* 168.138.48.0/24 */, 24, NDPI_PROTOCOL_ZOOM }, + { 0xA88A3800 /* 168.138.56.0/21 */, 21, NDPI_PROTOCOL_ZOOM }, + { 0xA88A4800 /* 168.138.72.0/24 */, 24, NDPI_PROTOCOL_ZOOM }, + { 0xA88A4A00 /* 168.138.74.0/25 */, 25, NDPI_PROTOCOL_ZOOM }, + { 0xA88A5000 /* 168.138.80.0/25 */, 25, NDPI_PROTOCOL_ZOOM }, + { 0xA88A5080 /* 168.138.80.128/26 */, 26, NDPI_PROTOCOL_ZOOM }, + { 0xA88A50E0 /* 168.138.80.224/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xA88A5100 /* 168.138.81.0/24 */, 24, NDPI_PROTOCOL_ZOOM }, + { 0xA88A5200 /* 168.138.82.0/23 */, 23, NDPI_PROTOCOL_ZOOM }, + { 0xA88A5400 /* 168.138.84.0/25 */, 25, NDPI_PROTOCOL_ZOOM }, + { 0xA88A5480 /* 168.138.84.128/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xA88A54C0 /* 168.138.84.192/26 */, 26, NDPI_PROTOCOL_ZOOM }, + { 0xA88A5500 /* 168.138.85.0/24 */, 24, NDPI_PROTOCOL_ZOOM }, + { 0xA88A5600 /* 168.138.86.0/23 */, 23, NDPI_PROTOCOL_ZOOM }, + { 0xA88A6000 /* 168.138.96.0/22 */, 22, NDPI_PROTOCOL_ZOOM }, + { 0xA88A7400 /* 168.138.116.0/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xA88A7440 /* 168.138.116.64/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xA88A7480 /* 168.138.116.128/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xA88A74E0 /* 168.138.116.224/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xA88A7500 /* 168.138.117.0/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xA88A7560 /* 168.138.117.96/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xA88A7580 /* 168.138.117.128/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xA88A7600 /* 168.138.118.0/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xA88A76A0 /* 168.138.118.160/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xA88A76E0 /* 168.138.118.224/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xA88A7700 /* 168.138.119.0/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xA88A7780 /* 168.138.119.128/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xA88AF400 /* 168.138.244.0/24 */, 24, NDPI_PROTOCOL_ZOOM }, + { 0xAA720000 /* 170.114.0.0/16 */, 16, NDPI_PROTOCOL_ZOOM }, + { 0xADE75000 /* 173.231.80.0/20 */, 20, NDPI_PROTOCOL_ZOOM }, + { 0xC0CC0C00 /* 192.204.12.0/22 */, 22, NDPI_PROTOCOL_ZOOM }, + { 0xC17A1000 /* 193.122.16.0/25 */, 25, NDPI_PROTOCOL_ZOOM }, + { 0xC17A10C0 /* 193.122.16.192/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17A1100 /* 193.122.17.0/26 */, 26, NDPI_PROTOCOL_ZOOM }, + { 0xC17A1140 /* 193.122.17.64/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17A11E0 /* 193.122.17.224/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17A1220 /* 193.122.18.32/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17A1240 /* 193.122.18.64/26 */, 26, NDPI_PROTOCOL_ZOOM }, + { 0xC17A12A0 /* 193.122.18.160/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17A12C0 /* 193.122.18.192/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17A1300 /* 193.122.19.0/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17A13A0 /* 193.122.19.160/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17A13C0 /* 193.122.19.192/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17A14E0 /* 193.122.20.224/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17A1560 /* 193.122.21.96/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17A2000 /* 193.122.32.0/21 */, 21, NDPI_PROTOCOL_ZOOM }, + { 0xC17A2800 /* 193.122.40.0/22 */, 22, NDPI_PROTOCOL_ZOOM }, + { 0xC17A2C00 /* 193.122.44.0/24 */, 24, NDPI_PROTOCOL_ZOOM }, + { 0xC17A2D20 /* 193.122.45.32/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17A2D40 /* 193.122.45.64/26 */, 26, NDPI_PROTOCOL_ZOOM }, + { 0xC17A2D80 /* 193.122.45.128/25 */, 25, NDPI_PROTOCOL_ZOOM }, + { 0xC17A2E00 /* 193.122.46.0/23 */, 23, NDPI_PROTOCOL_ZOOM }, + { 0xC17AD060 /* 193.122.208.96/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17AD820 /* 193.122.216.32/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17ADE00 /* 193.122.222.0/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17ADF80 /* 193.122.223.128/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17AE2A0 /* 193.122.226.160/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17AE7C0 /* 193.122.231.192/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17AE8A0 /* 193.122.232.160/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17AED40 /* 193.122.237.64/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17AF4A0 /* 193.122.244.160/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17AF4E0 /* 193.122.244.224/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17AF500 /* 193.122.245.0/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17AF760 /* 193.122.247.96/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17AFCC0 /* 193.122.252.192/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17B0000 /* 193.123.0.0/19 */, 19, NDPI_PROTOCOL_ZOOM }, + { 0xC17B2800 /* 193.123.40.0/21 */, 21, NDPI_PROTOCOL_ZOOM }, + { 0xC17B8000 /* 193.123.128.0/19 */, 19, NDPI_PROTOCOL_ZOOM }, + { 0xC17BA800 /* 193.123.168.0/21 */, 21, NDPI_PROTOCOL_ZOOM }, + { 0xC17BC0E0 /* 193.123.192.224/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17BC100 /* 193.123.193.0/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17BC160 /* 193.123.193.96/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17BC260 /* 193.123.194.96/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17BC280 /* 193.123.194.128/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17BC2E0 /* 193.123.194.224/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17BC300 /* 193.123.195.0/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17BC400 /* 193.123.196.0/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17BC4C0 /* 193.123.196.192/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17BC500 /* 193.123.197.0/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17BC540 /* 193.123.197.64/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17BC640 /* 193.123.198.64/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17BC6A0 /* 193.123.198.160/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17BC740 /* 193.123.199.64/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17BC880 /* 193.123.200.128/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17BC920 /* 193.123.201.32/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17BC9E0 /* 193.123.201.224/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17BCA40 /* 193.123.202.64/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17BCA80 /* 193.123.202.128/26 */, 26, NDPI_PROTOCOL_ZOOM }, + { 0xC17BCB00 /* 193.123.203.0/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17BCBA0 /* 193.123.203.160/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17BCBC0 /* 193.123.203.192/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17BCC00 /* 193.123.204.0/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17BCC40 /* 193.123.204.64/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17BCD40 /* 193.123.205.64/26 */, 26, NDPI_PROTOCOL_ZOOM }, + { 0xC17BCD80 /* 193.123.205.128/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17BCE20 /* 193.123.206.32/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17BCE80 /* 193.123.206.128/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17BCF20 /* 193.123.207.32/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17BD0A0 /* 193.123.208.160/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17BD100 /* 193.123.209.0/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17BD160 /* 193.123.209.96/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17BD240 /* 193.123.210.64/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17BD3E0 /* 193.123.211.224/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17BD480 /* 193.123.212.128/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17BD7C0 /* 193.123.215.192/26 */, 26, NDPI_PROTOCOL_ZOOM }, + { 0xC17BD840 /* 193.123.216.64/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17BD880 /* 193.123.216.128/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17BD9A0 /* 193.123.217.160/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17BDB40 /* 193.123.219.64/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17BDCE0 /* 193.123.220.224/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17BDE40 /* 193.123.222.64/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC17BDEE0 /* 193.123.222.224/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xC6FB8000 /* 198.251.128.0/17 */, 17, NDPI_PROTOCOL_ZOOM }, + { 0xCAB1CF80 /* 202.177.207.128/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xCBC8DB80 /* 203.200.219.128/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xCC506800 /* 204.80.104.0/21 */, 21, NDPI_PROTOCOL_ZOOM }, + { 0xCC8D1C00 /* 204.141.28.0/22 */, 22, NDPI_PROTOCOL_ZOOM }, + { 0xCEF70000 /* 206.247.0.0/16 */, 16, NDPI_PROTOCOL_ZOOM }, + { 0xCFE28400 /* 207.226.132.0/24 */, 24, NDPI_PROTOCOL_ZOOM }, + { 0xD109D300 /* 209.9.211.0/24 */, 24, NDPI_PROTOCOL_ZOOM }, + { 0xD109D700 /* 209.9.215.0/24 */, 24, NDPI_PROTOCOL_ZOOM }, + { 0xD5139000 /* 213.19.144.0/24 */, 24, NDPI_PROTOCOL_ZOOM }, + { 0xD5139900 /* 213.19.153.0/24 */, 24, NDPI_PROTOCOL_ZOOM }, + { 0xD5F48C00 /* 213.244.140.0/24 */, 24, NDPI_PROTOCOL_ZOOM }, + { 0xDD7A3F00 /* 221.122.63.0/24 */, 24, NDPI_PROTOCOL_ZOOM }, + { 0xDD7A4000 /* 221.122.64.0/24 */, 24, NDPI_PROTOCOL_ZOOM }, + { 0xDD7A5840 /* 221.122.88.64/27 */, 27, NDPI_PROTOCOL_ZOOM }, + { 0xDD7A5880 /* 221.122.88.128/25 */, 25, NDPI_PROTOCOL_ZOOM }, + { 0xDD7A5980 /* 221.122.89.128/25 */, 25, NDPI_PROTOCOL_ZOOM }, + { 0xDD7B8BC0 /* 221.123.139.192/27 */, 27, NDPI_PROTOCOL_ZOOM }, + /* End */ + { 0x0, 0, 0 } +}; diff --git a/src/components/implementation/simple_nf/ndpi/ipp.c b/src/components/implementation/simple_nf/ndpi/ipp.c new file mode 100644 index 0000000000..5ff17c7568 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/ipp.c @@ -0,0 +1,68 @@ +/* + * ipp.c + * + * Copyright (C) 2009-11 - ipoque GmbH + * Copyright (C) 2011-22 - ntop.org + * + * This file is part of nDPI, an open source deep packet inspection + * library based on the OpenDPI and PACE technology by ipoque GmbH + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_IPP + +#include "ndpi_api.h" + + +static void ndpi_int_ipp_add_connection(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) +{ + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_IPP, NDPI_PROTOCOL_HTTP, NDPI_CONFIDENCE_DPI); +} + +static void ndpi_search_ipp(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) +{ + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + + NDPI_LOG_DBG(ndpi_struct, "search ipp\n"); + + /* Treat IPP as a HTTP sub-protocol */ + + if(flow->detected_protocol_stack[0] == NDPI_PROTOCOL_HTTP && + flow->http.method == NDPI_HTTP_METHOD_POST && + LINE_STARTS(packet->http_url_name, "/ipp/") == 1) { + NDPI_LOG_INFO(ndpi_struct, "found ipp\n"); + ndpi_int_ipp_add_connection(ndpi_struct, flow); + return; + } + + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); +} + + +void init_ipp_dissector(struct ndpi_detection_module_struct *ndpi_struct, u_int32_t *id) +{ + ndpi_set_bitmask_protocol_detection("IPP", ndpi_struct, *id, + NDPI_PROTOCOL_IPP, + ndpi_search_ipp, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_TCP_OR_UDP_WITH_PAYLOAD_WITHOUT_RETRANSMISSION, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK); + + *id += 1; +} diff --git a/src/components/implementation/simple_nf/ndpi/ipsec.c b/src/components/implementation/simple_nf/ndpi/ipsec.c new file mode 100644 index 0000000000..1e49d6ef4d --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/ipsec.c @@ -0,0 +1,198 @@ +/* + * ipsec.c + * + * Copyright (C) 2022-23 - ntop.org + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_IPSEC + +#include "ndpi_api.h" + +enum isakmp_type { + ISAKMP_INVALID = 0, + ISAKMP_MALFORMED, + ISAKMP_V1, + ISAKMP_V2, +}; + +static void ndpi_int_ipsec_add_connection(struct ndpi_detection_module_struct * const ndpi_struct, + struct ndpi_flow_struct * const flow, + enum isakmp_type isakmp_type) +{ + switch (isakmp_type) + { + case ISAKMP_INVALID: + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + return; + case ISAKMP_MALFORMED: + NDPI_LOG_INFO(ndpi_struct, "found malformed ISAKMP (UDP)\n"); + ndpi_set_risk(ndpi_struct, flow, NDPI_MALFORMED_PACKET, "Invalid IPSec/ISAKMP Header"); + break; + case ISAKMP_V1: + NDPI_LOG_INFO(ndpi_struct, "found ISAKMPv1 (UDP)\n"); + break; + case ISAKMP_V2: + NDPI_LOG_INFO(ndpi_struct, "found ISAKMPv2 (UDP)\n"); + break; + } + + ndpi_set_detected_protocol(ndpi_struct, flow, + NDPI_PROTOCOL_IPSEC, + NDPI_PROTOCOL_UNKNOWN, + NDPI_CONFIDENCE_DPI); +} + +static enum isakmp_type ndpi_int_check_ports(struct ndpi_packet_struct const * const packet) +{ + u_int16_t sport = ntohs(packet->udp->source); + u_int16_t dport = ntohs(packet->udp->dest); + + /* + * If packet matches default IPSec/ISAKMP ports, it is most likely malformed, + * not IPSec/ISAKMP otherwise. + */ + if (sport == 500 || dport == 500 || + sport == 4500 || dport == 4500) + { + return ISAKMP_MALFORMED; + } + + return ISAKMP_INVALID; +} + +static enum isakmp_type ndpi_int_check_isakmp_v1(struct ndpi_packet_struct const * const packet, + u_int16_t isakmp_offset, enum isakmp_type isakmp_type) +{ + /* Next payload type */ + if (packet->payload[isakmp_offset + 16] >= 14 && packet->payload[isakmp_offset + 16] <= 127) + { + return ndpi_int_check_ports(packet); + } + + /* Exchange Type */ + if (packet->payload[isakmp_offset + 18] >= 6 && packet->payload[isakmp_offset + 18] < 31) + { + return ndpi_int_check_ports(packet); + } + + /* Flags */ + if (packet->payload[isakmp_offset + 19] >= 8) + { + return ndpi_int_check_ports(packet); + } + + return isakmp_type; +} + +static enum isakmp_type ndpi_int_check_isakmp_v2(struct ndpi_packet_struct const * const packet, + u_int16_t isakmp_offset, enum isakmp_type isakmp_type) +{ + /* Next payload type */ + if ((packet->payload[isakmp_offset + 16] > 0 && packet->payload[isakmp_offset + 16] <= 32) || + (packet->payload[isakmp_offset + 16] >= 49 && packet->payload[isakmp_offset + 16] <= 127)) + { + return ndpi_int_check_ports(packet); + } + + /* Exchange Type */ + if ((packet->payload[isakmp_offset + 18] <= 33) || + (packet->payload[isakmp_offset + 18] >= 38 && packet->payload[isakmp_offset + 18] <= 239)) + { + return ndpi_int_check_ports(packet); + } + + /* Flags */ + if ((packet->payload[isakmp_offset + 19] & 0xC7) != 0) + { + return ndpi_int_check_ports(packet); + } + + return isakmp_type; +} + +static void ndpi_search_ipsec(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) +{ + struct ndpi_packet_struct * const packet = &ndpi_struct->packet; + u_int16_t isakmp_offset = 0; + enum isakmp_type isakmp_type = ISAKMP_INVALID; + + NDPI_LOG_DBG(ndpi_struct, "search IPSEC (UDP)\n"); + + if (packet->payload_packet_len < 28) + { + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + return; + } + + /* check for non-ESP marker required for ISAKMP over UDP */ + if (get_u_int32_t(packet->payload, 0) == 0x00000000) + { + isakmp_offset = 4; + if (packet->payload_packet_len < 32) + { + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + return; + } + } + + if (packet->payload[isakmp_offset + 17] != 0x20 /* Major Version 2 */) + { + if (packet->payload[isakmp_offset + 17] != 0x10 /* Major Version 1 */) + { + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + return; + } else { + /* Version 1 is obsolete, but still used by some embedded devices. */ + isakmp_type = ISAKMP_V1; + } + } else { + isakmp_type = ISAKMP_V2; + } + + if (ntohl(get_u_int32_t(packet->payload, isakmp_offset + 24)) != (u_int32_t)packet->payload_packet_len - isakmp_offset) + { + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + return; + } + + if (isakmp_type == ISAKMP_V1) + { + isakmp_type = ndpi_int_check_isakmp_v1(packet, isakmp_offset, isakmp_type); + } else { + isakmp_type = ndpi_int_check_isakmp_v2(packet, isakmp_offset, isakmp_type); + } + + ndpi_int_ipsec_add_connection(ndpi_struct, flow, isakmp_type); +} + +void init_ipsec_dissector(struct ndpi_detection_module_struct *ndpi_struct, + u_int32_t *id) +{ + ndpi_set_bitmask_protocol_detection("IPSec", ndpi_struct, *id, + NDPI_PROTOCOL_IPSEC, + ndpi_search_ipsec, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_UDP_WITH_PAYLOAD, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK + ); + + *id += 1; +} + diff --git a/src/components/implementation/simple_nf/ndpi/irc.c b/src/components/implementation/simple_nf/ndpi/irc.c new file mode 100644 index 0000000000..db73553e28 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/irc.c @@ -0,0 +1,630 @@ +/* + * irc.c + * + * Copyright (C) 2009-11 - ipoque GmbH + * Copyright (C) 2011-22 - ntop.org + * + * This file is part of nDPI, an open source deep packet inspection + * library based on the OpenDPI and PACE technology by ipoque GmbH + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_IRC + +#include "ndpi_api.h" + +static void ndpi_int_irc_add_connection(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow, ndpi_confidence_t confidence) +{ + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_IRC, NDPI_PROTOCOL_UNKNOWN, confidence); +} + +static u_int8_t ndpi_check_for_NOTICE_or_PRIVMSG(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) +{ + + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + // + u_int16_t i; + u_int8_t number_of_lines_to_be_searched_for = 0; + for (i = 0; i < packet->payload_packet_len - 7; i++) { + if (packet->payload[i] == 'N' || packet->payload[i] == 'P') { + if (memcmp(&packet->payload[i + 1], "OTICE ", 6) == 0 || memcmp(&packet->payload[i + 1], "RIVMSG ", 7) == 0) { + NDPI_LOG_DBG2(ndpi_struct, "found NOTICE or PRIVMSG\n"); + return 1; + } + } + if (packet->payload[i] == 0x0a) { + number_of_lines_to_be_searched_for++; + if (number_of_lines_to_be_searched_for == 2) { + return 0; + } + } + } + return 0; + +} + +static u_int8_t ndpi_check_for_Nickname(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) +{ + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + u_int16_t i, packetl = packet->payload_packet_len; + + if (packetl < 4) { + return 0; + } + + for (i = 0; i < (packetl - 4); i++) { + if (packet->payload[i] == 'N' || packet->payload[i] == 'n') { + if ((((packetl - (i + 1)) >= 4) && memcmp(&packet->payload[i + 1], "ick=", 4) == 0) + || (((packetl - (i + 1)) >= 8) && (memcmp(&packet->payload[i + 1], "ickname=", 8) == 0)) + || (((packetl - (i + 1)) >= 8) && (memcmp(&packet->payload[i + 1], "ickName=", 8) == 0))) { + NDPI_LOG_DBG2(ndpi_struct, "found HTTP IRC Nickname pattern\n"); + return 1; + } + } + } + return 0; +} + +static u_int8_t ndpi_check_for_cmd(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) +{ + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + u_int16_t i; + + if (packet->payload_packet_len < 4) { + return 0; + } + + for (i = 0; i < packet->payload_packet_len - 4; i++) { + if (packet->payload[i] == 'c') { + if (memcmp(&packet->payload[i + 1], "md=", 3) == 0) { + NDPI_LOG_DBG2(ndpi_struct, "found HTTP IRC cmd pattern \n"); + return 1; + } + } + } + return 0; +} + +static u_int8_t ndpi_check_for_IRC_traces(const u_int8_t * ptr, u_int16_t len) +{ + u_int16_t i; + + if (len < 4) { + return 0; + } + + for (i = 0; i < len - 4; i++) { + if (ptr[i] == 'i') { + if (memcmp(&ptr[i + 1], "rc.", 3) == 0) { + return 1; + } + } + } + return 0; +} + + +static u_int8_t ndpi_search_irc_ssl_detect_ninety_percent_but_very_fast(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) +{ + + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + + + NDPI_LOG_DBG(ndpi_struct, "start fast detect\n"); + + /* case 1: len 1460, len 1460, len 1176 several times in one direction, than len = 4, 4096, 8192 in the other direction */ + if (packet->payload_packet_len == 1460 + && ((flow->l4.tcp.irc_stage2 == 0 && flow->l4.tcp.irc_direction == 0) || (flow->l4.tcp.irc_stage2 == 3 + && flow->l4.tcp.irc_direction == + 1 + packet->packet_direction))) { + flow->l4.tcp.irc_stage2 = 1; + flow->l4.tcp.irc_direction = 1 + packet->packet_direction; + return 1; + } + if (packet->payload_packet_len == 1460 && flow->l4.tcp.irc_stage2 == 1 + && flow->l4.tcp.irc_direction == 1 + packet->packet_direction) { + flow->l4.tcp.irc_stage2 = 2; + return 1; + } + if (packet->payload_packet_len == 1176 && flow->l4.tcp.irc_stage2 == 2 + && flow->l4.tcp.irc_direction == 1 + packet->packet_direction) { + flow->l4.tcp.irc_stage2 = 3; + flow->l4.tcp.irc_0x1000_full = 1; + return 1; + } + if (packet->payload_packet_len == 4 && (flow->l4.tcp.irc_stage2 == 3 || flow->l4.tcp.irc_0x1000_full == 1) + && flow->l4.tcp.irc_direction == 2 - packet->packet_direction && (ntohs(get_u_int16_t(packet->payload, 2)) == 0x1000 + || ntohs(get_u_int16_t(packet->payload, 2)) == + 0x2000)) { + NDPI_LOG_INFO(ndpi_struct, "found IRC SSL: ->1460,1460,1176,<-4096||8192"); + ndpi_int_irc_add_connection(ndpi_struct, flow, NDPI_CONFIDENCE_DPI); + return 1; + } + /* case 2: len 1448, len 1448, len 1200 several times in one direction, than len = 4, 4096, 8192 in the other direction */ + if (packet->payload_packet_len == 1448 + && ((flow->l4.tcp.irc_stage2 == 0 && flow->l4.tcp.irc_direction == 0) || (flow->l4.tcp.irc_stage2 == 6 + && flow->l4.tcp.irc_direction == + 1 + packet->packet_direction))) { + flow->l4.tcp.irc_stage2 = 4; + flow->l4.tcp.irc_direction = 1 + packet->packet_direction; + NDPI_LOG_DBG2(ndpi_struct, "len = 1448 first\n"); + return 1; + } + if (packet->payload_packet_len == 1448 && flow->l4.tcp.irc_stage2 == 4 + && flow->l4.tcp.irc_direction == 1 + packet->packet_direction) { + flow->l4.tcp.irc_stage2 = 5; + NDPI_LOG_DBG2(ndpi_struct, "len = 1448 second \n"); + return 1; + } + if (packet->payload_packet_len == 1200 && flow->l4.tcp.irc_stage2 == 5 + && flow->l4.tcp.irc_direction == 1 + packet->packet_direction) { + flow->l4.tcp.irc_stage2 = 6; + flow->l4.tcp.irc_0x1000_full = 1; + NDPI_LOG_DBG2(ndpi_struct, "len = 1200 \n"); + return 1; + } + if (packet->payload_packet_len == 4 && (flow->l4.tcp.irc_stage2 == 6 || flow->l4.tcp.irc_0x1000_full == 1) + && flow->l4.tcp.irc_direction == 2 - packet->packet_direction && (ntohs(get_u_int16_t(packet->payload, 2)) == 0x1000 + || ntohs(get_u_int16_t(packet->payload, 2)) == + 0x2000)) { + NDPI_LOG_INFO(ndpi_struct, "found IRC SSL: ->1448,1448,1200,<-4096||8192"); + ndpi_int_irc_add_connection(ndpi_struct, flow, NDPI_CONFIDENCE_DPI); + return 1; + } + /* case 3: several packets with len 1380, 1200, 1024, 1448, 1248, + * than one packet in the other direction with the len or two times the len. */ + if (packet->payload_packet_len == 1380 && ((flow->l4.tcp.irc_stage2 == 0 && flow->l4.tcp.irc_direction == 0) + || (flow->l4.tcp.irc_stage2 == 7 + && flow->l4.tcp.irc_direction == 1 + packet->packet_direction))) { + flow->l4.tcp.irc_stage2 = 7; + flow->l4.tcp.irc_direction = 1 + packet->packet_direction; + return 1; + } + if (packet->payload_packet_len == 4 && flow->l4.tcp.irc_stage2 == 7 + && flow->l4.tcp.irc_direction == 2 - packet->packet_direction && (ntohs(get_u_int16_t(packet->payload, 2)) == 1380 + || ntohs(get_u_int16_t(packet->payload, 2)) == + 2760)) { + NDPI_LOG_INFO(ndpi_struct, "found IRC SSL: ->1380,<-1380||2760"); + ndpi_int_irc_add_connection(ndpi_struct, flow, NDPI_CONFIDENCE_DPI); + return 1; + } + if (packet->payload_packet_len == 1200 && ((flow->l4.tcp.irc_stage2 == 0 && flow->l4.tcp.irc_direction == 0) + || (flow->l4.tcp.irc_stage2 == 8 + && flow->l4.tcp.irc_direction == 1 + packet->packet_direction))) { + flow->l4.tcp.irc_stage2 = 8; + flow->l4.tcp.irc_direction = 1 + packet->packet_direction; + return 1; + } + if (packet->payload_packet_len == 4 && flow->l4.tcp.irc_stage2 == 8 + && flow->l4.tcp.irc_direction == 2 - packet->packet_direction && (ntohs(get_u_int16_t(packet->payload, 2)) == 1200 + || ntohs(get_u_int16_t(packet->payload, 2)) == + 2400)) { + NDPI_LOG_INFO(ndpi_struct, "found IRC SSL: ->1200,<-1200||2400"); + ndpi_int_irc_add_connection(ndpi_struct, flow, NDPI_CONFIDENCE_DPI); + return 1; + } + if (packet->payload_packet_len == 1024 && ((flow->l4.tcp.irc_stage2 == 0 && flow->l4.tcp.irc_direction == 0) + || (flow->l4.tcp.irc_stage2 == 9 + && flow->l4.tcp.irc_direction == 1 + packet->packet_direction))) { + flow->l4.tcp.irc_stage2 = 9; + flow->l4.tcp.irc_direction = 1 + packet->packet_direction; + return 1; + } + if (packet->payload_packet_len == 4 && (flow->l4.tcp.irc_stage2 == 9 || flow->l4.tcp.irc_stage2 == 15) + && flow->l4.tcp.irc_direction == 2 - packet->packet_direction && (ntohs(get_u_int16_t(packet->payload, 2)) == 1024 + || ntohs(get_u_int16_t(packet->payload, 2)) == + 2048)) { + NDPI_LOG_INFO(ndpi_struct, "found IRC SSL: ->1024,<-1024||2048"); + ndpi_int_irc_add_connection(ndpi_struct, flow, NDPI_CONFIDENCE_DPI); + return 1; + } + if (packet->payload_packet_len == 1248 && ((flow->l4.tcp.irc_stage2 == 0 && flow->l4.tcp.irc_direction == 0) + || (flow->l4.tcp.irc_stage2 == 10 + && flow->l4.tcp.irc_direction == 1 + packet->packet_direction))) { + flow->l4.tcp.irc_stage2 = 10; + flow->l4.tcp.irc_direction = 1 + packet->packet_direction; + return 1; + } + if (packet->payload_packet_len == 4 && flow->l4.tcp.irc_stage2 == 10 + && flow->l4.tcp.irc_direction == 2 - packet->packet_direction && (ntohs(get_u_int16_t(packet->payload, 2)) == 1248 + || ntohs(get_u_int16_t(packet->payload, 2)) == + 2496)) { + NDPI_LOG_INFO(ndpi_struct, "found IRC SSL: ->1248,<-1248||2496"); + ndpi_int_irc_add_connection(ndpi_struct, flow, NDPI_CONFIDENCE_DPI); + return 1; + } + if (packet->payload_packet_len == 1448 + && (flow->l4.tcp.irc_stage2 == 5 && flow->l4.tcp.irc_direction == 1 + packet->packet_direction)) { + flow->l4.tcp.irc_stage2 = 11; + return 1; + } + if (packet->payload_packet_len == 4 + && (flow->l4.tcp.irc_stage2 == 4 || flow->l4.tcp.irc_stage2 == 5 || flow->l4.tcp.irc_stage2 == 11 + || flow->l4.tcp.irc_stage2 == 13) + && flow->l4.tcp.irc_direction == 2 - packet->packet_direction && (ntohs(get_u_int16_t(packet->payload, 2)) == 1448 + || ntohs(get_u_int16_t(packet->payload, 2)) == + 2896)) { + NDPI_LOG_INFO(ndpi_struct, "found IRC SSL: ->1448,<-1448||2896"); + ndpi_int_irc_add_connection(ndpi_struct, flow, NDPI_CONFIDENCE_DPI); + return 1; + } + /* case 4 : five packets with len = 1448, one with len 952, than one packet from other direction len = 8192 */ + if (packet->payload_packet_len == 1448 + && (flow->l4.tcp.irc_stage2 == 11 && flow->l4.tcp.irc_direction == 1 + packet->packet_direction)) { + flow->l4.tcp.irc_stage2 = 12; + return 1; + } + if (packet->payload_packet_len == 1448 + && (flow->l4.tcp.irc_stage2 == 12 && flow->l4.tcp.irc_direction == 1 + packet->packet_direction)) { + flow->l4.tcp.irc_stage2 = 13; + return 1; + } + if (packet->payload_packet_len == 952 + && (flow->l4.tcp.irc_stage2 == 13 && flow->l4.tcp.irc_direction == 1 + packet->packet_direction)) { + flow->l4.tcp.irc_stage2 = 14; + return 1; + } + if (packet->payload_packet_len == 4 + && flow->l4.tcp.irc_stage2 == 14 + && flow->l4.tcp.irc_direction == 2 - packet->packet_direction && ntohs(get_u_int16_t(packet->payload, 2)) == 8192) { + NDPI_LOG_INFO(ndpi_struct, "found IRC SSL: ->1448,1448,1448,1448,1448,952,<-8192"); + ndpi_int_irc_add_connection(ndpi_struct, flow, NDPI_CONFIDENCE_DPI); + return 1; + } + /* case 5: len 1024, len 1448, len 1448, len 1200, len 1448, len 600 */ + if (packet->payload_packet_len == 1448 + && (flow->l4.tcp.irc_stage2 == 9 && flow->l4.tcp.irc_direction == 1 + packet->packet_direction)) { + flow->l4.tcp.irc_stage2 = 15; + return 1; + } + if (packet->payload_packet_len == 1448 + && (flow->l4.tcp.irc_stage2 == 15 && flow->l4.tcp.irc_direction == 1 + packet->packet_direction)) { + flow->l4.tcp.irc_stage2 = 16; + return 1; + } + if (packet->payload_packet_len == 1200 + && (flow->l4.tcp.irc_stage2 == 16 && flow->l4.tcp.irc_direction == 1 + packet->packet_direction)) { + flow->l4.tcp.irc_stage2 = 17; + return 1; + } + if (packet->payload_packet_len == 1448 + && (flow->l4.tcp.irc_stage2 == 17 && flow->l4.tcp.irc_direction == 1 + packet->packet_direction)) { + flow->l4.tcp.irc_stage2 = 18; + return 1; + } + if (packet->payload_packet_len == 600 + && (flow->l4.tcp.irc_stage2 == 18 && flow->l4.tcp.irc_direction == 1 + packet->packet_direction)) { + flow->l4.tcp.irc_stage2 = 19; + return 1; + } + if (packet->payload_packet_len == 4 + && flow->l4.tcp.irc_stage2 == 19 + && flow->l4.tcp.irc_direction == 2 - packet->packet_direction && ntohs(get_u_int16_t(packet->payload, 2)) == 7168) { + NDPI_LOG_INFO(ndpi_struct, "found IRC SSL: ->1024,1448,1448,1200,1448,600,<-7168"); + ndpi_int_irc_add_connection(ndpi_struct, flow, NDPI_CONFIDENCE_DPI); + return 1; + } + /* -> 1024, 1380, -> 2404 */ + if (packet->payload_packet_len == 1380 + && (flow->l4.tcp.irc_stage2 == 9 && flow->l4.tcp.irc_direction == 1 + packet->packet_direction)) { + flow->l4.tcp.irc_stage2 = 20; + return 1; + } + if (packet->payload_packet_len == 4 + && flow->l4.tcp.irc_stage2 == 20 + && flow->l4.tcp.irc_direction == 2 - packet->packet_direction && ntohs(get_u_int16_t(packet->payload, 2)) == 2404) { + NDPI_LOG_INFO(ndpi_struct, "found IRC SSL: ->1024,1380 <-2404"); + ndpi_int_irc_add_connection(ndpi_struct, flow, NDPI_CONFIDENCE_DPI); + return 1; + + } + return 0; +} + + +static void ndpi_search_irc_tcp(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) +{ + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + + u_int16_t c = 0; + u_int16_t i = 0; + u_int16_t j = 0; + u_int16_t h; + u_int16_t http_content_ptr_len = 0; + u_int8_t space = 0; + + NDPI_LOG_DBG(ndpi_struct, "search irc\n"); + if (flow->detected_protocol_stack[0] != NDPI_PROTOCOL_IRC && (flow->packet_counter > 10)) { + NDPI_LOG_DBG(ndpi_struct, "exclude irc, packet_counter > 70\n"); + NDPI_ADD_PROTOCOL_TO_BITMASK(flow->excluded_protocol_bitmask, NDPI_PROTOCOL_IRC); + return; + } + + if (flow->detected_protocol_stack[0] != NDPI_PROTOCOL_IRC && + ndpi_search_irc_ssl_detect_ninety_percent_but_very_fast(ndpi_struct, flow) != 0) { + return; + } + + if (flow->detected_protocol_stack[0] != NDPI_PROTOCOL_IRC && flow->packet_counter < 20 + && packet->payload_packet_len >= 8) { + if (get_u_int8_t(packet->payload, packet->payload_packet_len - 1) == 0x0a + || (ntohs(get_u_int16_t(packet->payload, packet->payload_packet_len - 2)) == 0x0a00)) { + if (memcmp(packet->payload, ":", 1) == 0) { + if (packet->payload[packet->payload_packet_len - 2] != 0x0d + && packet->payload[packet->payload_packet_len - 1] == 0x0a) { + ndpi_parse_packet_line_info_any(ndpi_struct, flow); + } else if (packet->payload[packet->payload_packet_len - 2] == 0x0d) { + ndpi_parse_packet_line_info(ndpi_struct, flow); + } else { + flow->l4.tcp.irc_3a_counter++; + packet->parsed_lines = 0; + } + for (i = 0; i < packet->parsed_lines; i++) { + if ((packet->line[i].len > 0) && packet->line[i].ptr[0] == ':') { + flow->l4.tcp.irc_3a_counter++; + if (flow->l4.tcp.irc_3a_counter == 7) { /* ':' == 0x3a */ + NDPI_LOG_INFO(ndpi_struct, "found irc. 0x3a. seven times."); + ndpi_int_irc_add_connection(ndpi_struct, flow, NDPI_CONFIDENCE_DPI); + goto detected_irc; + } + } + } + if (flow->l4.tcp.irc_3a_counter == 7) { /* ':' == 0x3a */ + NDPI_LOG_INFO(ndpi_struct, "found irc. 0x3a. seven times."); + ndpi_int_irc_add_connection(ndpi_struct, flow, NDPI_CONFIDENCE_DPI); + goto detected_irc; + } + } + + if ((memcmp(packet->payload, "USER ", 5) == 0) + || (memcmp(packet->payload, "NICK ", 5) == 0) + || (memcmp(packet->payload, "PASS ", 5) == 0) + || (memcmp(packet->payload, ":", 1) == 0 && ndpi_check_for_NOTICE_or_PRIVMSG(ndpi_struct, flow) != 0) + || (memcmp(packet->payload, "PONG ", 5) == 0) + || (memcmp(packet->payload, "PING ", 5) == 0) + || (memcmp(packet->payload, "JOIN ", 5) == 0) + || (memcmp(packet->payload, "MODE ", 5) == 0) + || (memcmp(packet->payload, "NOTICE ", 7) == 0) + || (memcmp(packet->payload, "PRIVMSG ", 8) == 0) + || (memcmp(packet->payload, "VERSION ", 8) == 0)) { + char *user = ndpi_strnstr((char*)packet->payload, "USER ", packet->payload_packet_len); + + if(user) { + char buf[32], msg[64], *sp; + + snprintf(buf, sizeof(buf), "%.*s", (int)(packet->payload_packet_len - (user + 5 - (char *)packet->payload)), user + 5); + if((sp = strchr(buf, ' ')) != NULL) + sp[0] = '\0'; + + snprintf(msg, sizeof(msg), "Found IRC username (%s)", buf); + ndpi_set_risk(ndpi_struct, flow, NDPI_CLEAR_TEXT_CREDENTIALS, msg); + } + + NDPI_LOG_DBG2(ndpi_struct, + "USER, NICK, PASS, NOTICE, PRIVMSG one time"); + if (flow->l4.tcp.irc_stage == 2) { + NDPI_LOG_INFO(ndpi_struct, "found irc"); + ndpi_int_irc_add_connection(ndpi_struct, flow, NDPI_CONFIDENCE_DPI); + flow->l4.tcp.irc_stage = 3; + } + if (flow->l4.tcp.irc_stage == 1) { + NDPI_LOG_DBG2(ndpi_struct, "second time, stage=2"); + flow->l4.tcp.irc_stage = 2; + } + if (flow->l4.tcp.irc_stage == 0) { + NDPI_LOG_DBG2(ndpi_struct, "first time, stage=1"); + flow->l4.tcp.irc_stage = 1; + } + /* irc packets can have either windows line breaks (0d0a) or unix line breaks (0a) */ + if (packet->payload[packet->payload_packet_len - 2] == 0x0d + && packet->payload[packet->payload_packet_len - 1] == 0x0a) { + ndpi_parse_packet_line_info(ndpi_struct, flow); + if (packet->parsed_lines > 1) { + NDPI_LOG_DBG2(ndpi_struct, "packet contains more than one line"); + for (c = 1; c < packet->parsed_lines; c++) { + if (packet->line[c].len > 4 && (memcmp(packet->line[c].ptr, "NICK ", 5) == 0 + || memcmp(packet->line[c].ptr, "USER ", 5) == 0)) { + NDPI_LOG_INFO(ndpi_struct, "found IRC: two icq signal words in the same packet"); + ndpi_int_irc_add_connection(ndpi_struct, flow, NDPI_CONFIDENCE_DPI); + flow->l4.tcp.irc_stage = 3; + return; + } + } + } + + } else if (packet->payload[packet->payload_packet_len - 1] == 0x0a) { + ndpi_parse_packet_line_info_any(ndpi_struct, flow); + if (packet->parsed_lines > 1) { + NDPI_LOG_DBG2(ndpi_struct, "packet contains more than one line"); + for (c = 1; c < packet->parsed_lines; c++) { + if (packet->line[c].len > 4 && (memcmp(packet->line[c].ptr, "NICK ", 5) == 0 + || memcmp(packet->line[c].ptr, "USER ", + 5) == 0)) { + NDPI_LOG_INFO(ndpi_struct, "found IRC: two icq signal words in the same packet"); + ndpi_int_irc_add_connection(ndpi_struct, flow, NDPI_CONFIDENCE_DPI); + flow->l4.tcp.irc_stage = 3; + return; + } + } + } + } + } + } + } + + /** + * Trying to primarily detect the HTTP Web based IRC chat patterns based on the HTTP headers + * during the User login time.When the HTTP data gets posted using the POST method ,patterns + * will be searched in the HTTP content. + */ + if ((flow->detected_protocol_stack[0] != NDPI_PROTOCOL_IRC) && (flow->l4.tcp.irc_stage == 0) + && (packet->payload_packet_len > 5)) { + //HTTP POST Method being employed + if (memcmp(packet->payload, "POST ", 5) == 0) { + ndpi_parse_packet_line_info(ndpi_struct, flow); + if (packet->parsed_lines) { + u_int16_t http_header_len = (u_int16_t)((packet->line[packet->parsed_lines - 1].ptr - packet->payload) + 2); + if (packet->payload_packet_len > http_header_len) { + http_content_ptr_len = packet->payload_packet_len - http_header_len; + } + if ((ndpi_check_for_IRC_traces(packet->line[0].ptr, packet->line[0].len)) + || ((packet->http_url_name.ptr) + && (ndpi_check_for_IRC_traces(packet->http_url_name.ptr, packet->http_url_name.len))) + || ((packet->referer_line.ptr) + && (ndpi_check_for_IRC_traces(packet->referer_line.ptr, packet->referer_line.len)))) { + NDPI_LOG_DBG2(ndpi_struct, + "IRC detected from the Http URL/ Referer header "); + flow->l4.tcp.irc_stage = 1; + // HTTP POST Request body is not in the same packet. + if (!http_content_ptr_len) { + return; + } + } + } + } + } + + if ((flow->detected_protocol_stack[0] != NDPI_PROTOCOL_IRC) && (flow->l4.tcp.irc_stage == 1)) { + if ((((packet->payload_packet_len - http_content_ptr_len) > 10) + && (memcmp(packet->payload + http_content_ptr_len, "interface=", 10) == 0) + && (ndpi_check_for_Nickname(ndpi_struct, flow) != 0)) + || (((packet->payload_packet_len - http_content_ptr_len) > 5) + && (memcmp(packet->payload + http_content_ptr_len, "item=", 5) == 0) + && (ndpi_check_for_cmd(ndpi_struct, flow) != 0))) { + NDPI_LOG_INFO(ndpi_struct, "found IRC: Nickname, cmd, one time"); + ndpi_int_irc_add_connection(ndpi_struct, flow, NDPI_CONFIDENCE_DPI); + return; + } + } + + detected_irc: + NDPI_LOG_DBG2(ndpi_struct, "detected_irc:"); + + if (flow->detected_protocol_stack[0] == NDPI_PROTOCOL_IRC) { + /* maybe this can be deleted at the end */ + + if (packet->payload[packet->payload_packet_len - 2] != 0x0d + && packet->payload[packet->payload_packet_len - 1] == 0x0a) { + NDPI_LOG_DBG2(ndpi_struct, "ndpi_parse_packet_line_info_any(ndpi_struct, flow);"); + ndpi_parse_packet_line_info_any(ndpi_struct, flow); + } else if (packet->payload[packet->payload_packet_len - 2] == 0x0d) { + ndpi_parse_packet_line_info(ndpi_struct, flow); + } else { + return; + } + for (i = 0; i < packet->parsed_lines; i++) { + if (packet->line[i].len > 6 && memcmp(packet->line[i].ptr, "NOTICE ", 7) == 0) { + NDPI_LOG_DBG2(ndpi_struct, "NOTICE"); + for (j = 7; j < packet->line[i].len - 9; j++) { + if (packet->line[i].ptr[j] == ':') { + if (memcmp(&packet->line[i].ptr[j + 1], "DCC SEND ", 9) == 0 + || memcmp(&packet->line[i].ptr[j + 1], "DCC CHAT ", 9) == 0) { + NDPI_LOG_INFO(ndpi_struct, + "found NOTICE and DCC CHAT or DCC SEND."); + } + } + } + } + if (packet->payload_packet_len > 0 && packet->payload[0] == 0x3a /* 0x3a = ':' */ ) { + NDPI_LOG_DBG2(ndpi_struct, "3a"); + for (j = 1; j < packet->line[i].len - 9; j++) { + if (packet->line[i].ptr[j] == ' ') { + j++; + if (packet->line[i].ptr[j] == 'P') { + NDPI_LOG_DBG2(ndpi_struct, "P"); + j++; + if (memcmp(&packet->line[i].ptr[j], "RIVMSG ", 7) == 0) + NDPI_LOG_DBG2(ndpi_struct, "RIVMSG"); + h = j + 7; + goto read_privmsg; + } + } + } + } + if (packet->line[i].len > 7 && (memcmp(packet->line[i].ptr, "PRIVMSG ", 8) == 0)) { + NDPI_LOG_DBG2(ndpi_struct, "PRIVMSG "); + h = 7; + read_privmsg: + for (j = h; j < packet->line[i].len - 9; j++) { + if (packet->line[i].ptr[j] == ':') { + if (memcmp(&packet->line[i].ptr[j + 1], "xdcc ", 5) == 0) { + NDPI_LOG_DBG2(ndpi_struct, "xdcc should match."); + } + j += 2; + if (j + 4 < packet->line[i].len && + memcmp(&packet->line[i].ptr[j], "DCC ", 4) == 0) { + j += 4; + NDPI_LOG_DBG2(ndpi_struct, "found DCC."); + if ((j + 5 < packet->line[i].len && + memcmp(&packet->line[i].ptr[j], "SEND ", 5) == 0) || + (j + 4 < packet->line[i].len && + memcmp(&packet->line[i].ptr[j], "CHAT", 4) == 0) || + (j + 4 < packet->line[i].len && + memcmp(&packet->line[i].ptr[j], "chat", 4) == 0) || + (j + 7 < packet->line[i].len && + memcmp(&packet->line[i].ptr[j], "sslchat", 7) == 0) || + (j + 5 < packet->line[i].len && + memcmp(&packet->line[i].ptr[j], "TSEND", 5) == 0)) { + NDPI_LOG_DBG2(ndpi_struct, "found CHAT,chat,sslchat,TSEND."); + j += 4; + + while (packet->line[i].len > j && + ((packet->line[i].ptr[j] >= 'a' && packet->line[i].ptr[j] <= 'z') + || (packet->line[i].ptr[j] >= 'A' && packet->line[i].ptr[j] <= 'Z') + || (packet->line[i].ptr[j] >= '0' && packet->line[i].ptr[j] <= '9') + || (packet->line[i].ptr[j] >= ' ') + || (packet->line[i].ptr[j] >= '.') + || (packet->line[i].ptr[j] >= '-'))) { + + if (packet->line[i].ptr[j] == ' ') { + space++; + NDPI_LOG_DBG2(ndpi_struct, "space %u.", space); + } + if (space == 3) { + j++; + NDPI_LOG_DBG2(ndpi_struct, "read port."); + } + + + j++; + } + + } + } + } + } + + } + } + } +} + +void init_irc_dissector(struct ndpi_detection_module_struct *ndpi_struct, + u_int32_t *id) +{ + ndpi_set_bitmask_protocol_detection("IRC", ndpi_struct, *id, + NDPI_PROTOCOL_IRC, + ndpi_search_irc_tcp, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_TCP_WITH_PAYLOAD_WITHOUT_RETRANSMISSION, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK); + + *id += 1; +} + diff --git a/src/components/implementation/simple_nf/ndpi/jabber.c b/src/components/implementation/simple_nf/ndpi/jabber.c new file mode 100644 index 0000000000..df286f1719 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/jabber.c @@ -0,0 +1,154 @@ +/* + * jabber.c + * + * Copyright (C) 2009-11 - ipoque GmbH + * Copyright (C) 2011-22 - ntop.org + * + * This file is part of nDPI, an open source deep packet inspection + * library based on the OpenDPI and PACE technology by ipoque GmbH + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_JABBER + +#include "ndpi_api.h" + +struct jabber_string { + char *string; + u_int ndpi_protocol; +}; + +static struct jabber_string jabber_strings[] = { + { "='im.truphone.com'", NDPI_PROTOCOL_TRUPHONE }, + { "=\"im.truphone.com\"", NDPI_PROTOCOL_TRUPHONE }, + { NULL, 0 } +}; + +static void ndpi_int_jabber_add_connection(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow, + u_int32_t protocol, ndpi_confidence_t confidence) +{ + ndpi_set_detected_protocol(ndpi_struct, flow, protocol, NDPI_PROTOCOL_UNKNOWN, confidence); +} + +static void check_content_type_and_change_protocol(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow, u_int16_t x) +{ + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + int i, left = packet->payload_packet_len-x; + + if(left <= 0) return; + + for(i=0; jabber_strings[i].string != NULL; i++) { + if(ndpi_strnstr((const char*)&packet->payload[x], jabber_strings[i].string, left) != NULL) { + ndpi_int_jabber_add_connection(ndpi_struct, flow, jabber_strings[i].ndpi_protocol, NDPI_CONFIDENCE_DPI); + return; + } + } +} + +static void ndpi_search_jabber_tcp(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) +{ + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + u_int16_t const max_packets = 4; + size_t i; + static uint8_t const valid_patterns[] = { 0x25, 0x26, 0x30 }; + + NDPI_LOG_DBG(ndpi_struct, "search JABBER\n"); + + if (packet->payload_packet_len >= 3 && + packet->payload[1] == 0x00 && packet->payload[2] == packet->payload_packet_len) + { + /* Old style Jabber/XMPP SSL. */ + if (flow->packet_counter > max_packets - 1) + { + ndpi_int_jabber_add_connection(ndpi_struct, flow, NDPI_PROTOCOL_JABBER, NDPI_CONFIDENCE_DPI); + return; + } + for (i = 0; i < NDPI_ARRAY_LENGTH(valid_patterns); ++i) + { + if (packet->payload[0] == valid_patterns[i]) + { + return; + } + } + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + return; + } + + /* search for jabber here */ + /* this part is working asymmetrically */ + if (packet->payload_packet_len >= NDPI_STATICSTRING_LEN("payload, "payload[0], + "xmlns='http://jabber.org/protocol/", packet->payload_packet_len) != NULL) + { + ndpi_int_jabber_add_connection(ndpi_struct, flow, NDPI_PROTOCOL_JABBER, NDPI_CONFIDENCE_DPI); + return; + } + + if (packet->payload_packet_len >= NDPI_STATICSTRING_LEN("payload_packet_len) != NULL) + { + ndpi_int_jabber_add_connection(ndpi_struct, flow, NDPI_PROTOCOL_JABBER, NDPI_CONFIDENCE_DPI); + return; + } + + if (packet->payload_packet_len == NDPI_STATICSTRING_LEN("") && + memcmp(packet->payload, "", NDPI_STATICSTRING_LEN("")) == 0) + { + ndpi_int_jabber_add_connection(ndpi_struct, flow, NDPI_PROTOCOL_JABBER, NDPI_CONFIDENCE_DPI); + return; + } + + if ((packet->payload_packet_len > 13 && memcmp(packet->payload, "payload_packet_len >= NDPI_STATICSTRING_LEN("payload, "payload_packet_len-13; + + if(ndpi_strnstr((const char *)&packet->payload[13], "xmlns:stream='http://etherx.jabber.org/streams'", start) + || ndpi_strnstr((const char *)&packet->payload[13], "xmlns:stream=\"http://etherx.jabber.org/streams\"", start)) { + + /* Protocol family */ + ndpi_int_jabber_add_connection(ndpi_struct, flow, NDPI_PROTOCOL_JABBER, NDPI_CONFIDENCE_DPI); + + /* search for subprotocols */ + check_content_type_and_change_protocol(ndpi_struct, flow, 13); + } + return; + } + + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + return; +} + + +void init_jabber_dissector(struct ndpi_detection_module_struct *ndpi_struct, u_int32_t *id) +{ + ndpi_set_bitmask_protocol_detection("Jabber", ndpi_struct, *id, + NDPI_PROTOCOL_JABBER, + ndpi_search_jabber_tcp, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_TCP_OR_UDP_WITH_PAYLOAD_WITHOUT_RETRANSMISSION, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK); + + *id += 1; +} + diff --git a/src/components/implementation/simple_nf/ndpi/kakaotalk_voice.c b/src/components/implementation/simple_nf/ndpi/kakaotalk_voice.c new file mode 100644 index 0000000000..dde13cde7d --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/kakaotalk_voice.c @@ -0,0 +1,78 @@ +/* + * kakaotalk_voice.c + * + * Copyright (C) 2015-22 - ntop.org + * + * This module is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This module is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License. + * If not, see . + * + */ + + +/* + KakaoTalk (call only) + + http://www.kakao.com/services/talk/voices +*/ +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_KAKAOTALK_VOICE + +#include "ndpi_api.h" + + +static void ndpi_search_kakaotalk_voice(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) { + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + + NDPI_LOG_DBG(ndpi_struct, "search kakaotalk_voice\n"); + + if(packet->iph + && packet->udp + && (packet->payload_packet_len >= 4) + ) { + if((packet->payload[0] == 0x81) + || (packet->payload[1] == 0xC8) + || (packet->payload[2] == 0x00) + || (packet->payload[3] == 0x0C)) { + /* Looks good so far */ + + /* + inetnum: 1.201.0.0 - 1.201.255.255 + netname: KINXINC-KR + */ + + if(((ntohl(packet->iph->saddr) & 0xFFFF0000 /* 255.255.0.0 */) == 0x01C90000 /* 1.201.0.0/16 */) + || ((ntohl(packet->iph->daddr) & 0xFFFF0000 /* 255.255.0.0 */) == 0x01C90000 /* 1.201.0.0/16 */)) { + NDPI_LOG_INFO(ndpi_struct, "found kakaotalk_voice\n"); + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_KAKAOTALK_VOICE, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); + return; + } + } + } + + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); +} + + +void init_kakaotalk_voice_dissector(struct ndpi_detection_module_struct *ndpi_struct, + u_int32_t *id) +{ + ndpi_set_bitmask_protocol_detection("KakaoTalk_Voice", ndpi_struct, *id, + NDPI_PROTOCOL_KAKAOTALK_VOICE, + ndpi_search_kakaotalk_voice, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_UDP_WITH_PAYLOAD, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK); + *id += 1; +} + diff --git a/src/components/implementation/simple_nf/ndpi/kerberos.c b/src/components/implementation/simple_nf/ndpi/kerberos.c new file mode 100644 index 0000000000..68dda46c95 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/kerberos.c @@ -0,0 +1,709 @@ +/* + * kerberos.c + * + * Copyright (C) 2011-22 - ntop.org + * Copyright (C) 2009-11 - ipoque GmbH + * + * This file is part of nDPI, an open source deep packet inspection + * library based on the OpenDPI and PACE technology by ipoque GmbH + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_KERBEROS + +#include "ndpi_api.h" + +/* #define KERBEROS_DEBUG 1 */ + +#define KERBEROS_PORT 88 + +static int ndpi_search_kerberos_extra(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow); + + +/* Reference: https://en.wikipedia.org/wiki/X.690#Length_octets */ +static int krb_decode_asn1_length(struct ndpi_detection_module_struct *ndpi_struct, + size_t * const kasn1_offset) +{ + struct ndpi_packet_struct * const packet = &ndpi_struct->packet; + int64_t length; + u_int16_t value_len; + + length = ndpi_asn1_ber_decode_length(&packet->payload[*kasn1_offset], + packet->payload_packet_len - *kasn1_offset, + &value_len); + + if (length == -1 || + packet->payload_packet_len < *kasn1_offset + value_len + length) + { + return -1; + } + + *kasn1_offset += value_len; + + return length; +} + +/* Reference: https://en.wikipedia.org/wiki/X.690#Identifier_octets */ +static int krb_decode_asn1_sequence_type(struct ndpi_detection_module_struct *ndpi_struct, + size_t * const kasn1_offset) +{ + struct ndpi_packet_struct * const packet = &ndpi_struct->packet; + + if (packet->payload_packet_len <= *kasn1_offset + 1 /* length octet */ || + packet->payload[*kasn1_offset] != 0x30 /* Universal Constructed Tag Type: Sequence */) + { + return -1; + } + + (*kasn1_offset)++; + + return krb_decode_asn1_length(ndpi_struct, kasn1_offset); +} + +/* Reference: https://en.wikipedia.org/wiki/X.690#Identifier_octets */ +static int krb_decode_asn1_string_type(struct ndpi_detection_module_struct *ndpi_struct, + size_t * const kasn1_offset, + char const ** const out) +{ + struct ndpi_packet_struct * const packet = &ndpi_struct->packet; + int length; + + if (packet->payload_packet_len <= *kasn1_offset + 1 /* length octet */ || + (packet->payload[*kasn1_offset] != 0xA3 /* Context-specific Constructed Tag Type: Bit String */ && + packet->payload[*kasn1_offset] != 0xA4 /* Context-specific Constructed Tag Type: Octect String */ && + packet->payload[*kasn1_offset] != 0x30 /* Sequence Of */)) + { + return -1; + } + + (*kasn1_offset)++; + + length = krb_decode_asn1_length(ndpi_struct, kasn1_offset); + if (length <= 0) + { + return -1; + } + + if (out != NULL) + { + *out = (char *)&packet->payload[*kasn1_offset]; + } + + return length; +} + +/* Reference: https://en.wikipedia.org/wiki/X.690#Identifier_octets */ +static int krb_decode_asn1_int_type(struct ndpi_detection_module_struct *ndpi_struct, + size_t * const kasn1_offset, + int * const out) +{ + struct ndpi_packet_struct * const packet = &ndpi_struct->packet; + int length; + + if (packet->payload_packet_len <= *kasn1_offset + 1 /* length octet */ || + packet->payload[*kasn1_offset] != 0x02) + { + return -1; + } + + (*kasn1_offset)++; + + length = krb_decode_asn1_length(ndpi_struct, kasn1_offset); + if (length <= 0 || length > 4) + { + return -1; + } + + if (out != NULL) + { + int i = 0; + *out = 0; + for (; i < length; ++i) + { + *out |= (unsigned int)packet->payload[*kasn1_offset + i] << (length - i - 1) * 8; + } + *kasn1_offset += i; + } + + return length; +} + +/* Tags in which we are not interested. */ +static int krb_decode_asn1_blocks_skip(struct ndpi_detection_module_struct *ndpi_struct, + size_t * const kasn1_offset) +{ + struct ndpi_packet_struct * const packet = &ndpi_struct->packet; + int length; + + if (packet->payload_packet_len <= *kasn1_offset + 1 /* length octet */ || + (packet->payload[*kasn1_offset] != 0xA0 /* Constructed Context-specific NULL */ && + packet->payload[*kasn1_offset] != 0xA1 /* Constructed Context-specific BOOLEAN */ && + packet->payload[*kasn1_offset] != 0xA2 /* Constructed Context-specific INTEGER */)) + { + return -1; + } + + (*kasn1_offset)++; + + length = krb_decode_asn1_length(ndpi_struct, kasn1_offset); + if (length < 0) + { + return -1; + } + + return length; +} + +static void krb_strncpy_lower(char * const dst, size_t dst_siz, + char const * const src, size_t src_siz) +{ + int i, dst_len = ndpi_min(src_siz, dst_siz - 1); + + dst[dst_len] = '\0'; + + for(i = 0; i < dst_len; ++i) + { + if (ndpi_isprint(src[i]) == 0) + { + dst[i] = '?'; + } else { + dst[i] = tolower(src[i]); + } + } +} + +/* Reference: https://datatracker.ietf.org/doc/html/rfc4120 */ +static int krb_parse(struct ndpi_detection_module_struct * const ndpi_struct, + struct ndpi_flow_struct * const flow, + size_t payload_offset) +{ + size_t kasn1_offset = payload_offset; + int length, krb_version, msg_type; + char const * text; + + length = krb_decode_asn1_sequence_type(ndpi_struct, &kasn1_offset); + if (length < 0) + { + return -1; + } + + length = krb_decode_asn1_blocks_skip(ndpi_struct, &kasn1_offset); + if (length < 0) + { + return -1; + } + + length = krb_decode_asn1_int_type(ndpi_struct, &kasn1_offset, &krb_version); /* pvno */ + if (length != 1 || krb_version != 5) + { + return -1; + } + + length = krb_decode_asn1_blocks_skip(ndpi_struct, &kasn1_offset); + if (length < 0) + { + return -1; + } + + length = krb_decode_asn1_int_type(ndpi_struct, &kasn1_offset, &msg_type); /* msg-type */ + if (length != 1 || msg_type != 0x0d /* TGS-REP */) + { + return -1; + } + + krb_decode_asn1_blocks_skip(ndpi_struct, &kasn1_offset); + + length = krb_decode_asn1_sequence_type(ndpi_struct, &kasn1_offset); /* Optional PADATA */ + if (length > 0) + { + kasn1_offset += length; + } + + length = krb_decode_asn1_string_type(ndpi_struct, &kasn1_offset, &text); + if (length < 3) + { + return -1; + } + + kasn1_offset += length; + text += 2; + length -= 2; + if (flow->protos.kerberos.domain[0] == '\0') + { + krb_strncpy_lower(flow->protos.kerberos.domain, sizeof(flow->protos.kerberos.domain), + text, length); + } + + length = krb_decode_asn1_string_type(ndpi_struct, &kasn1_offset, NULL); + if (length < 0) + { + return -1; + } + + length = krb_decode_asn1_sequence_type(ndpi_struct, &kasn1_offset); + if (length < 0) + { + return -1; + } + + length = krb_decode_asn1_blocks_skip(ndpi_struct, &kasn1_offset); + if (length < 0) + { + return -1; + } + kasn1_offset += length; + + length = krb_decode_asn1_blocks_skip(ndpi_struct, &kasn1_offset); + if (length < 0) + { + return -1; + } + + length = krb_decode_asn1_string_type(ndpi_struct, &kasn1_offset, &text); + if (length < 3) + { + return -1; + } + + kasn1_offset += length; + text += 2; + length -= 2; + if (flow->protos.kerberos.hostname[0] == '\0' && text[length - 1] != '$') + { + krb_strncpy_lower(flow->protos.kerberos.hostname, sizeof(flow->protos.kerberos.hostname), + text, length); + } else if (flow->protos.kerberos.username[0] == '\0') { + krb_strncpy_lower(flow->protos.kerberos.username, sizeof(flow->protos.kerberos.username), + text, length - 1); + } + + return 0; +} + +static void ndpi_int_kerberos_add_connection(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) { + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_KERBEROS, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); + NDPI_LOG_DBG(ndpi_struct, "trace KERBEROS\n"); +} + +/* ************************************************* */ + +static void ndpi_search_kerberos(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) { + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + u_int16_t sport = packet->tcp ? ntohs(packet->tcp->source) : ntohs(packet->udp->source); + u_int16_t dport = packet->tcp ? ntohs(packet->tcp->dest) : ntohs(packet->udp->dest); + const u_int8_t *original_packet_payload = NULL; + u_int16_t original_payload_packet_len = 0; + + if((sport != KERBEROS_PORT) && (dport != KERBEROS_PORT)) { + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + return; + } + + NDPI_LOG_DBG(ndpi_struct, "search KERBEROS\n"); + +#ifdef KERBEROS_DEBUG + printf("\n[Kerberos] Process packet [len: %u]\n", packet->payload_packet_len); +#endif + + if(flow->kerberos_buf.pktbuf != NULL) { + u_int missing = flow->kerberos_buf.pktbuf_maxlen - flow->kerberos_buf.pktbuf_currlen; + + if(packet->payload_packet_len <= missing) { + memcpy(&flow->kerberos_buf.pktbuf[flow->kerberos_buf.pktbuf_currlen], packet->payload, packet->payload_packet_len); + flow->kerberos_buf.pktbuf_currlen += packet->payload_packet_len; + + if(flow->kerberos_buf.pktbuf_currlen == flow->kerberos_buf.pktbuf_maxlen) { + original_packet_payload = packet->payload; + original_payload_packet_len = packet->payload_packet_len; + packet->payload = (u_int8_t *)flow->kerberos_buf.pktbuf; + packet->payload_packet_len = flow->kerberos_buf.pktbuf_currlen; +#ifdef KERBEROS_DEBUG + printf("[Kerberos] Packet is now full: processing\n"); +#endif + } else { +#ifdef KERBEROS_DEBUG + printf("[Kerberos] Missing %u bytes: skipping\n", + flow->kerberos_buf.pktbuf_maxlen - flow->kerberos_buf.pktbuf_currlen); +#endif + + return; + } + } + } + + /* I have observed 0a,0c,0d,0e at packet->payload[19/21], maybe there are other possibilities */ + if(packet->payload_packet_len >= 4) { + u_int32_t kerberos_len, expected_len; + u_int16_t base_offset = 0; + + if(packet->tcp) { + kerberos_len = ntohl(get_u_int32_t(packet->payload, 0)), + expected_len = packet->payload_packet_len - 4; + base_offset = 4; + } else + base_offset = 0, kerberos_len = expected_len = packet->payload_packet_len; + +#ifdef KERBEROS_DEBUG + printf("[Kerberos] [Kerberos len: %u][expected_len: %u]\n", kerberos_len, expected_len); +#endif + + if(kerberos_len < 12000) { + /* + Kerberos packets might be too long for a TCP packet + so it could be split across two packets. Instead of + rebuilding the stream we use a heuristic approach + */ + if(kerberos_len > expected_len) { + if(packet->tcp) { + if(flow->kerberos_buf.pktbuf == NULL) { + flow->kerberos_buf.pktbuf = (char*)ndpi_malloc(kerberos_len+4); + + if(flow->kerberos_buf.pktbuf != NULL) { + flow->kerberos_buf.pktbuf_maxlen = kerberos_len+4; +#ifdef KERBEROS_DEBUG + printf("[Kerberos] Allocated %u bytes\n", flow->kerberos_buf.pktbuf_maxlen); +#endif + } + } + + if(flow->kerberos_buf.pktbuf != NULL) { + if(packet->payload_packet_len <= flow->kerberos_buf.pktbuf_maxlen) { + memcpy(flow->kerberos_buf.pktbuf, packet->payload, packet->payload_packet_len); + flow->kerberos_buf.pktbuf_currlen = packet->payload_packet_len; + } + } + } + + return; + } else if(kerberos_len == expected_len) { + if(packet->payload_packet_len > 64) { + u_int16_t koffset, i; + + for(i=8; i<16; i++) + if((packet->payload[base_offset+i] == 0x03) + && (packet->payload[base_offset+i+1] == 0x02) + && (packet->payload[base_offset+i+2] == 0x01) + && (packet->payload[base_offset+i+3] != 0x05) + ) + break; + + koffset = base_offset + i + 3; + +#ifdef KERBEROS_DEBUG + printf("[Kerberos] [msg-type: 0x%02X/%u][koffset: %u]\n", + packet->payload[koffset], packet->payload[koffset], koffset); +#endif + + if(((packet->payload[koffset] == 0x0A) + || (packet->payload[koffset] == 0x0C) + || (packet->payload[koffset] == 0x1E) + || (packet->payload[koffset] == 0x0D) + || (packet->payload[koffset] == 0x0E))) { + u_int16_t koffsetp, body_offset = 0, pad_len; + u_int8_t msg_type = packet->payload[koffset]; + +#ifdef KERBEROS_DEBUG + printf("[Kerberos] Packet found 0x%02X/%u\n", msg_type, msg_type); +#endif + + ndpi_int_kerberos_add_connection(ndpi_struct, flow); + + if(msg_type != 0x0d) /* TGS-REP */ { + /* Process only on requests */ + if(packet->payload[koffset+1] == 0xA3) { + if(packet->payload[koffset+3] == 0x30) + pad_len = packet->payload[koffset+4]; + else { + /* Long pad */ + pad_len = packet->payload[koffset+2]; + for(i=3; i<10; i++) if(packet->payload[koffset+i] == pad_len) break; + + pad_len = (packet->payload[koffset+i+1] << 8) + packet->payload[koffset+i+2]; + koffset += i-2; + } + } else + pad_len = 0; + +#ifdef KERBEROS_DEBUG + printf("pad_len=0x%02X/%u\n", pad_len, pad_len); +#endif + + if(pad_len > 0) { + koffsetp = koffset + 2; + for(i=0; i<4; i++) if(packet->payload[koffsetp] != 0x30) koffsetp++; /* ASN.1 */ +#ifdef KERBEROS_DEBUG + printf("koffsetp=%u [%02X %02X] [byte 0 must be 0x30]\n", koffsetp, packet->payload[koffsetp], packet->payload[koffsetp+1]); +#endif + } else + koffsetp = koffset; + + body_offset = koffsetp + 1 + pad_len; + + for(i=0; i<10; i++) if(body_offsetpayload_packet_len && packet->payload[body_offset] != 0x05) body_offset++; /* ASN.1 */ +#ifdef KERBEROS_DEBUG + printf("body_offset=%u [%02X %02X] [byte 0 must be 0x05]\n", body_offset, packet->payload[body_offset], packet->payload[body_offset+1]); +#endif + } + + if(msg_type == 0x0A) /* AS-REQ */ { +#ifdef KERBEROS_DEBUG + printf("[Kerberos] Processing AS-REQ\n"); +#endif + + + if(body_offset < packet->payload_packet_len) { + u_int16_t name_offset = body_offset + 13; + + for(i=0; (i<20) && (name_offset < packet->payload_packet_len); i++) { + if(packet->payload[name_offset] != 0x1b) + name_offset++; /* ASN.1 */ + } + +#ifdef KERBEROS_DEBUG + printf("name_offset=%u [%02X %02X] [byte 0 must be 0x1b]\n", name_offset, packet->payload[name_offset], packet->payload[name_offset+1]); +#endif + + if(name_offset < packet->payload_packet_len - 1) { + u_int cname_len = 0; + + name_offset += 1; + if(name_offset < packet->payload_packet_len - 1 && + isprint(packet->payload[name_offset+1]) == 0) /* Isn't printable ? */ + { + name_offset++; + } + + if(name_offset < packet->payload_packet_len - 3 && + packet->payload[name_offset+1] == 0x1b) + { + name_offset += 2; + } + + cname_len = packet->payload[name_offset]; + + if((cname_len+name_offset) < packet->payload_packet_len) { + u_int realm_len, realm_offset; + char cname_str[48]; + u_int8_t num_cname = 0; + + cname_str[0] = '\0'; // required, because cname_len + + while(++num_cname <= 2) { + if (name_offset + cname_len + 1 >= packet->payload_packet_len) + cname_len = 0; + krb_strncpy_lower(cname_str, sizeof(cname_str), (char*)&packet->payload[name_offset+1], cname_len); + +#ifdef KERBEROS_DEBUG + printf("[AS-REQ][s/dport: %u/%u][Kerberos Cname][len: %u][%s]\n", sport, dport, cname_len, cname_str); +#endif + + if(((strcmp(cname_str, "host") == 0) || (strcmp(cname_str, "ldap") == 0)) && (packet->payload[name_offset+1+cname_len] == 0x1b) && num_cname == 1) { + name_offset += cname_len + 2; + if (name_offset < packet->payload_packet_len) + cname_len = packet->payload[name_offset]; + } else{ + break; + } + } + + realm_offset = cname_len + name_offset + 3; + + /* if cname does not end with a $ then it's a username */ + if(cname_len > 0 && name_offset + cname_len + 1 < packet->payload_packet_len + && (cname_len < sizeof(cname_str)) + && (cname_str[cname_len-1] == '$')) { + cname_str[cname_len-1] = '\0'; + ndpi_snprintf(flow->protos.kerberos.hostname, sizeof(flow->protos.kerberos.hostname), "%s", cname_str); + } else + ndpi_snprintf(flow->protos.kerberos.username, sizeof(flow->protos.kerberos.username), "%s", cname_str); + + for(i=0; (i < 14) && (realm_offset < packet->payload_packet_len); i++) { + if(packet->payload[realm_offset] != 0x1b) + realm_offset++; /* ASN.1 */ + } + +#ifdef KERBEROS_DEBUG + printf("realm_offset=%u [%02X %02X] [byte 0 must be 0x1b]\n", realm_offset, + packet->payload[realm_offset], packet->payload[realm_offset+1]); +#endif + + realm_offset += 1; + //if(num_cname == 2) realm_offset++; + if(realm_offset < packet->payload_packet_len) { + realm_len = packet->payload[realm_offset]; + + if((realm_offset+realm_len) < packet->payload_packet_len) { + char realm_str[48]; + + realm_offset += 1; + krb_strncpy_lower(realm_str, sizeof(realm_str), (char*)&packet->payload[realm_offset], realm_len); + +#ifdef KERBEROS_DEBUG + printf("[AS-REQ][Kerberos Realm][len: %u][%s]\n", realm_len, realm_str); +#endif + ndpi_snprintf(flow->protos.kerberos.domain, sizeof(flow->protos.kerberos.domain), "%s", realm_str); + } + } + } + } + } +#ifdef KERBEROS_DEBUG + printf("[Kerberos] Setting extra func from AS-REQ\n"); +#endif + flow->max_extra_packets_to_check = 5; /* Reply may be split into multiple segments */ + flow->extra_packets_func = ndpi_search_kerberos_extra; + } else if(msg_type == 0x0e) /* AS-REQ */ { +#ifdef KERBEROS_DEBUG + printf("[Kerberos] Processing AS-REQ\n"); +#endif + /* Nothing specific to do; stop dissecting this flow */ + flow->extra_packets_func = NULL; + + } else if(msg_type == 0x0c) /* TGS-REQ */ { +#ifdef KERBEROS_DEBUG + printf("[Kerberos] Processing TGS-REQ\n"); +#endif + + if(body_offset < packet->payload_packet_len) { + u_int16_t name_offset, padding_offset = body_offset + 4; + + name_offset = padding_offset; + for(i=0; i<14 && name_offset < packet->payload_packet_len; i++) if(packet->payload[name_offset] != 0x1b) name_offset++; /* ASN.1 */ + +#ifdef KERBEROS_DEBUG + printf("name_offset=%u [%02X %02X] [byte 0 must be 0x1b]\n", name_offset, packet->payload[name_offset], packet->payload[name_offset+1]); +#endif + + if(name_offset < (packet->payload_packet_len - 1)) { + u_int realm_len; + + name_offset++; + realm_len = packet->payload[name_offset]; + + if((realm_len+name_offset) < packet->payload_packet_len) { + char realm_str[48]; + + name_offset += 1; + krb_strncpy_lower(realm_str, sizeof(realm_str), (char*)&packet->payload[name_offset], realm_len); + +#ifdef KERBEROS_DEBUG + printf("[TGS-REQ][s/dport: %u/%u][Kerberos Realm][len: %u][%s]\n", sport, dport, realm_len, realm_str); +#endif + ndpi_snprintf(flow->protos.kerberos.domain, sizeof(flow->protos.kerberos.domain), "%s", realm_str); + + /* If necessary we can decode sname */ + if(flow->kerberos_buf.pktbuf) { + ndpi_free(flow->kerberos_buf.pktbuf); + packet->payload = original_packet_payload; + packet->payload_packet_len = original_payload_packet_len; + } + flow->kerberos_buf.pktbuf = NULL; + } + } + } +#ifdef KERBEROS_DEBUG + printf("[Kerberos] Setting extra func from TGS-REQ\n"); +#endif + if(!packet->udp) { + flow->max_extra_packets_to_check = 5; /* Reply may be split into multiple segments */ + flow->extra_packets_func = ndpi_search_kerberos_extra; + } + + if(flow->kerberos_buf.pktbuf != NULL) { + ndpi_free(flow->kerberos_buf.pktbuf); + packet->payload = original_packet_payload; + packet->payload_packet_len = original_payload_packet_len; + flow->kerberos_buf.pktbuf = NULL; + } + + return; + } else if(msg_type == 0x0d) /* TGS-REP */ { + NDPI_LOG_DBG(ndpi_struct, "[Kerberos] Processing TGS-REP\n"); + + if (krb_parse(ndpi_struct, flow, 8) != 0) + { + NDPI_LOG_DBG(ndpi_struct, "[TGS-REP] Invalid packet received\n"); + return; + } + NDPI_LOG_DBG(ndpi_struct, + "[TGS-REP][s/dport: %u/%u][Kerberos Hostname,Domain,Username][%s,%s,%s]\n", + sport, dport, flow->protos.kerberos.hostname, flow->protos.kerberos.domain, + flow->protos.kerberos.username); + flow->extra_packets_func = NULL; + } else if(msg_type == 0x1e) /* Error */ { +#ifdef KERBEROS_DEBUG + printf("[Kerberos] Processing KRB-Error\n"); +#endif + /* Nothing specific to do; stop dissecting this flow */ + flow->extra_packets_func = NULL; + } + + return; + } + } + } + } else { +#ifdef KERBEROS_DEBUG + printf("[Kerberos][s/dport: %u/%u] Skipping packet: too long [kerberos_len: %u]\n", + sport, dport, kerberos_len); +#endif + + if(flow->protos.kerberos.domain[0] != '\0') + return; + } + } + + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); +} + +static int ndpi_search_kerberos_extra(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) +{ + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + +#ifdef KERBEROS_DEBUG + printf("[Kerberos] Extra function\n"); +#endif + + /* Unfortunately, generic "extra function" code doesn't honour protocol bitmask */ + /* TODO: handle that in ndpi_main.c for all the protocols */ + if(packet->payload_packet_len == 0 || + packet->tcp_retransmission) + return 1; + + /* Possibly dissect the reply */ + ndpi_search_kerberos(ndpi_struct, flow); + + /* Possibly more processing */ + return flow->extra_packets_func != NULL; +} + +void init_kerberos_dissector(struct ndpi_detection_module_struct *ndpi_struct, + u_int32_t *id) { + ndpi_set_bitmask_protocol_detection("Kerberos", ndpi_struct, *id, + NDPI_PROTOCOL_KERBEROS, + ndpi_search_kerberos, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_TCP_OR_UDP_WITH_PAYLOAD_WITHOUT_RETRANSMISSION, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK); + + *id += 1; +} diff --git a/src/components/implementation/simple_nf/ndpi/kismet.c b/src/components/implementation/simple_nf/ndpi/kismet.c new file mode 100644 index 0000000000..4d4f3dae49 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/kismet.c @@ -0,0 +1,72 @@ +/* + * kismet.c + * + * Copyright (C) 2022-23 - ntop.org + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_KISMET + +#include "ndpi_api.h" + +static void ndpi_int_kismet_add_connection(struct ndpi_detection_module_struct * const ndpi_struct, + struct ndpi_flow_struct * const flow) +{ + NDPI_LOG_INFO(ndpi_struct, "found kismet\n"); + ndpi_set_detected_protocol(ndpi_struct, flow, + NDPI_PROTOCOL_KISMET, + NDPI_PROTOCOL_UNKNOWN, + NDPI_CONFIDENCE_DPI); +} + +static void ndpi_search_kismet(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) +{ + struct ndpi_packet_struct const * const packet = &ndpi_struct->packet; + + NDPI_LOG_DBG(ndpi_struct, "search kismet\n"); + + if (packet->payload_packet_len < NDPI_STATICSTRING_LEN("*KISMET: ")) + { + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); + return; + } + + if (strncmp((char const *)packet->payload, "*KISMET: ", NDPI_STATICSTRING_LEN("*KISMET: ")) == 0) + { + ndpi_int_kismet_add_connection(ndpi_struct, flow); + return; + } + + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); +} + +void init_kismet_dissector(struct ndpi_detection_module_struct *ndpi_struct, + u_int32_t *id) +{ + ndpi_set_bitmask_protocol_detection("kismet", ndpi_struct, *id, + NDPI_PROTOCOL_KISMET, + ndpi_search_kismet, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_TCP_WITH_PAYLOAD_WITHOUT_RETRANSMISSION, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK + ); + + *id += 1; +} diff --git a/src/components/implementation/simple_nf/ndpi/kontiki.c b/src/components/implementation/simple_nf/ndpi/kontiki.c new file mode 100644 index 0000000000..2186bde405 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/kontiki.c @@ -0,0 +1,79 @@ +/* + * kontiki.c + * + * Copyright (C) 2009-11 - ipoque GmbH + * Copyright (C) 2011-22 - ntop.org + * + * This file is part of nDPI, an open source deep packet inspection + * library based on the OpenDPI and PACE technology by ipoque GmbH + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_KONTIKI + +#include "ndpi_api.h" + + +static void ndpi_int_kontiki_add_connection(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) +{ + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_KONTIKI, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); + NDPI_LOG_INFO(ndpi_struct, "found Kontiki UDP\n"); +} + +static void ndpi_search_kontiki(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) +{ + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + + NDPI_LOG_DBG(ndpi_struct, "search Kontiki\n"); + + if (packet->payload_packet_len == 4 && (get_u_int32_t(packet->payload, 0) == htonl(0x02010100))) { + ndpi_int_kontiki_add_connection(ndpi_struct, flow); + return; + } + + if (packet->payload_packet_len > 0 && packet->payload[0] == 0x02) { + + if (packet->payload_packet_len == 20 && (get_u_int32_t(packet->payload, 16) == htonl(0x02040100))) { + ndpi_int_kontiki_add_connection(ndpi_struct, flow); + return; + } + if (packet->payload_packet_len == 16 && (get_u_int32_t(packet->payload, 12) == htonl(0x000004e4))) { + ndpi_int_kontiki_add_connection(ndpi_struct, flow); + return; + } + } + + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); +} + + +void init_kontiki_dissector(struct ndpi_detection_module_struct *ndpi_struct, + u_int32_t *id) +{ + ndpi_set_bitmask_protocol_detection("Kontiki", ndpi_struct, *id, + NDPI_PROTOCOL_KONTIKI, + ndpi_search_kontiki, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_UDP_WITH_PAYLOAD, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK); + + *id += 1; +} + diff --git a/src/components/implementation/simple_nf/ndpi/ldap.c b/src/components/implementation/simple_nf/ndpi/ldap.c new file mode 100644 index 0000000000..a7c64807eb --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/ldap.c @@ -0,0 +1,83 @@ +/* + * ldap.c + * + * Copyright (C) 2009-11 - ipoque GmbH + * Copyright (C) 2011-22 - ntop.org + * + * This file is part of nDPI, an open source deep packet inspection + * library based on the OpenDPI and PACE technology by ipoque GmbH + * + * nDPI is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * nDPI is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with nDPI. If not, see . + * + */ + +#include "ndpi_protocol_ids.h" + +#define NDPI_CURRENT_PROTO NDPI_PROTOCOL_LDAP + +#include "ndpi_api.h" + + +static void ndpi_int_ldap_add_connection(struct ndpi_detection_module_struct *ndpi_struct, + struct ndpi_flow_struct *flow) +{ + ndpi_set_detected_protocol(ndpi_struct, flow, NDPI_PROTOCOL_LDAP, NDPI_PROTOCOL_UNKNOWN, NDPI_CONFIDENCE_DPI); +} + +static void ndpi_search_ldap(struct ndpi_detection_module_struct *ndpi_struct, struct ndpi_flow_struct *flow) +{ + struct ndpi_packet_struct *packet = &ndpi_struct->packet; + int64_t length; + u_int16_t length_len = 0, msg_id_len; + u_int8_t op; + + NDPI_LOG_DBG(ndpi_struct, "search ldap\n"); + + if(packet->payload_packet_len > 1 && + packet->payload[0] == 0x30) { + length = ndpi_asn1_ber_decode_length(&packet->payload[1], packet->payload_packet_len - 1, &length_len); + NDPI_LOG_DBG(ndpi_struct, "length %d (%d bytes)\n", length, length_len); + if(length > 0 && + packet->payload_packet_len > 1 + length_len + 1 && + packet->payload[1 + length_len] == 0x02 /* Integer */) { + msg_id_len = packet->payload[1 + length_len + 1]; + if(packet->payload_packet_len > 1 + length_len + 1 + msg_id_len + 1) { + op = packet->payload[1 + length_len + 1 + msg_id_len + 1]; + NDPI_LOG_DBG(ndpi_struct, "Op 0x%x\n", op); + if((op & 0x60) == 0x60 && /* Application */ + (op & 0x1F) <= 25) { + NDPI_LOG_INFO(ndpi_struct, "found ldap\n"); + ndpi_int_ldap_add_connection(ndpi_struct, flow); + return; + } + } + } + } + + NDPI_EXCLUDE_PROTO(ndpi_struct, flow); +} + + +void init_ldap_dissector(struct ndpi_detection_module_struct *ndpi_struct, u_int32_t *id) +{ + ndpi_set_bitmask_protocol_detection("LDAP", ndpi_struct, *id, + NDPI_PROTOCOL_LDAP, + ndpi_search_ldap, + NDPI_SELECTION_BITMASK_PROTOCOL_V4_V6_TCP_OR_UDP_WITH_PAYLOAD_WITHOUT_RETRANSMISSION, + SAVE_DETECTION_BITMASK_AS_UNKNOWN, + ADD_TO_DETECTION_BITMASK); + + *id += 1; +} + diff --git a/src/components/implementation/simple_nf/ndpi/libcache.c b/src/components/implementation/simple_nf/ndpi/libcache.c new file mode 100644 index 0000000000..f6a12aa383 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/libcache.c @@ -0,0 +1,329 @@ +/** + * libcache.c + * +Copyright (c) 2017 William Guglielmo + +Permission is hereby granted, free of charge, to any person obtaining a copy +of this software and associated documentation files (the "Software"), to deal +in the Software without restriction, including without limitation the rights +to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +copies of the Software, and to permit persons to whom the Software is +furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice shall be included in all +copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +SOFTWARE. + * + */ + + +#include +#include +#include +#include + +#include "libcache.h" +#include "ndpi_api.h" + + +// https://en.wikipedia.org/wiki/Jenkins_hash_function +#define HASH_FUNCTION jenkins_one_at_a_time_hash +uint32_t jenkins_one_at_a_time_hash(const uint8_t* key, size_t length) { + size_t i = 0; + uint32_t hash = 0; + while (i != length) { + hash += key[i++]; + hash += hash << 10; + hash ^= hash >> 6; + } + hash += hash << 3; + hash ^= hash >> 11; + hash += hash << 15; + return hash; +} + + +struct cache { + uint32_t size; + uint32_t max_size; + cache_entry head; + cache_entry tail; + cache_entry_map *map; +}; + +struct cache_entry_map_ { + cache_entry entry; + cache_entry_map next; +}; + +struct cache_entry_ { + void *item; + uint32_t item_size; + cache_entry prev; + cache_entry next; +}; + + +void cache_touch_entry(cache_t cache, cache_entry entry) { + if(entry->prev) { + if(entry->next) { + entry->prev->next = entry->next; + entry->next->prev = entry->prev; + } else { + entry->prev->next = NULL; + cache->tail = entry->prev; + } + entry->prev = NULL; + entry->next = cache->head; + cache->head->prev = entry; + cache->head = entry; + } +} + + +cache_entry cache_entry_new(void) { + return (cache_entry) ndpi_calloc(sizeof(struct cache_entry_), 1); +} +cache_entry_map cache_entry_map_new(void) { + return (cache_entry_map) ndpi_calloc(sizeof(struct cache_entry_map_), 1); +} + +cache_t cache_new(uint32_t cache_max_size) { + cache_t cache; + if(!cache_max_size) { + return NULL; + } + + cache = (cache_t) ndpi_calloc(sizeof(struct cache), 1); + if(!cache) { + return NULL; + } + + cache->size = 0; + cache->max_size = cache_max_size; + + cache->map = (cache_entry_map *) ndpi_calloc(sizeof(cache_entry_map ), cache->max_size); + + if(!cache->map) { + ndpi_free(cache); + return NULL; + } + + return cache; +} + +cache_result cache_add(cache_t cache, void *item, uint32_t item_size) { + uint32_t hash; + cache_entry entry; + cache_entry_map map_entry; + + if(!cache || !item || !item_size) { + return CACHE_INVALID_INPUT; + } + + hash = HASH_FUNCTION(item, item_size) % cache->max_size; + + if((cache->map)[hash]) { + cache_entry_map hash_entry_map = cache->map[hash]; + + while(hash_entry_map) { + if(item_size == hash_entry_map->entry->item_size && + !memcmp(hash_entry_map->entry->item, item, item_size)) { + break; + } + + hash_entry_map = hash_entry_map->next; + } + + if(hash_entry_map) { + cache_touch_entry(cache, hash_entry_map->entry); + return CACHE_NO_ERROR; + } + } + + entry = cache_entry_new(); + if(!entry) { + return CACHE_MALLOC_ERROR; + } + + map_entry = cache_entry_map_new(); + if(!map_entry) { + ndpi_free(entry); + return CACHE_MALLOC_ERROR; + } + + + entry->item = ndpi_malloc(item_size); + if(!entry->item) { + ndpi_free(entry); + ndpi_free(map_entry); + return CACHE_MALLOC_ERROR; + } + memcpy(entry->item, item, item_size); + entry->item_size = item_size; + + entry->prev = NULL; + entry->next = cache->head; + if(cache->head) cache->head->prev = entry; + cache->head = entry; + + map_entry->entry = entry; + map_entry->next = cache->map[hash]; + cache->map[hash] = map_entry; + + if(cache->max_size > cache->size) { + (cache->size)++; + if(cache->size == 1) { + cache->tail = entry; + } + } else { + cache_entry tail = cache->tail; + + uint32_t hash = HASH_FUNCTION(tail->item, tail->item_size) % cache->max_size; + if(cache->map[hash]) { + cache_entry_map hash_entry_map_prev = NULL; + cache_entry_map hash_entry_map = cache->map[hash]; + while(hash_entry_map) { + if(tail->item_size == hash_entry_map->entry->item_size && + !memcmp(tail->item, hash_entry_map->entry->item, tail->item_size)) { + break; + } + + hash_entry_map_prev = hash_entry_map; + hash_entry_map = hash_entry_map->next; + } + + if(hash_entry_map_prev) { + if (hash_entry_map) { + hash_entry_map_prev->next = hash_entry_map->next; + } else { + hash_entry_map_prev->next = NULL; + } + } else { + cache->map[hash] = hash_entry_map->next; + } + + tail->prev->next = NULL; + cache->tail = tail->prev; + + ndpi_free(tail->item); + ndpi_free(tail); + ndpi_free(hash_entry_map); + } + } + + return CACHE_NO_ERROR; +} + +cache_result cache_contains(cache_t cache, void *item, uint32_t item_size) { + uint32_t hash; + + if(!cache || !item || !item_size) { + return CACHE_INVALID_INPUT; + } + + hash = HASH_FUNCTION(item, item_size) % cache->max_size; + + if(cache->map[hash]) { + cache_entry_map hash_entry_map = cache->map[hash]; + while(hash_entry_map) { + if(item_size == hash_entry_map->entry->item_size && + !memcmp(hash_entry_map->entry->item, item, item_size)) { + cache_touch_entry(cache, hash_entry_map->entry); + + return CACHE_CONTAINS_TRUE; + } + + hash_entry_map = hash_entry_map->next; + } + } + + return CACHE_CONTAINS_FALSE; +} + +cache_result cache_remove(cache_t cache, void *item, uint32_t item_size) { + uint32_t hash; + + if(!cache || !item || !item_size) { + return CACHE_INVALID_INPUT; + } + + hash = HASH_FUNCTION(item, item_size) % cache->max_size; + + if(cache->map[hash]) { + cache_entry_map hash_entry_map_prev = NULL; + cache_entry_map hash_entry_map = cache->map[hash]; + while(hash_entry_map) { + if(item_size == hash_entry_map->entry->item_size && + !memcmp(hash_entry_map->entry->item, item, item_size)) { + break; + } + + hash_entry_map_prev = hash_entry_map; + hash_entry_map = hash_entry_map->next; + } + + if(hash_entry_map) { + cache_entry entry; + + if(hash_entry_map_prev) { + hash_entry_map_prev->next = hash_entry_map->next; + } else { + cache->map[hash] = hash_entry_map->next; + } + + entry = hash_entry_map->entry; + + if(entry->prev) { + entry->prev->next = entry->next; + } else { + cache->head = entry->next; + } + if(entry->next) { + entry->next->prev = entry->prev; + } else { + cache->tail = entry->prev; + } + + ndpi_free(entry->item); + ndpi_free(entry); + ndpi_free(hash_entry_map); + + (cache->size)--; + return CACHE_NO_ERROR; + } + } + + return CACHE_REMOVE_NOT_FOUND; +} + +void cache_free(cache_t cache) { + uint32_t i; + if(!cache) { + return; + } + + for(i = 0; i < cache->max_size; i++) { + cache_entry_map prev = NULL; + cache_entry_map curr = cache->map[i]; + while(curr) { + prev = curr; + curr = curr->next; + ndpi_free(prev->entry->item); + ndpi_free(prev->entry); + ndpi_free(prev); + } + } + + ndpi_free(cache->map); + ndpi_free(cache); + + return; +} diff --git a/src/components/implementation/simple_nf/ndpi/libcache.h b/src/components/implementation/simple_nf/ndpi/libcache.h new file mode 100644 index 0000000000..98e1e74608 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/libcache.h @@ -0,0 +1,117 @@ +/** + * libcache.h + * +Copyright (c) 2017 William Guglielmo + +Permission is hereby granted, free of charge, to any person obtaining a copy +of this software and associated documentation files (the "Software"), to deal +in the Software without restriction, including without limitation the rights +to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +copies of the Software, and to permit persons to whom the Software is +furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice shall be included in all +copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +SOFTWARE. + * + */ + +#ifdef __cplusplus +extern "C" { +#endif + + +#ifndef __DESELMO_LIBCACHE_H__ +#define __DESELMO_LIBCACHE_H__ + +#include + +typedef struct cache_entry_ *cache_entry; + +typedef struct cache_entry_map_ *cache_entry_map; + +/** + * @brief Codes representing the result of some functions + * + */ +typedef enum cache_result { + CACHE_NO_ERROR = 0, /**< Returned by a function if no error occurs. */ + CACHE_CONTAINS_FALSE = 0, /**< Returned by function cache_contains if item is not present. */ + CACHE_CONTAINS_TRUE, /**< Returned by function cache_contains if item is present. */ + CACHE_INVALID_INPUT, /**< Returned by a function if it is called with invalid input parameters. */ + CACHE_REMOVE_NOT_FOUND, /**< Returned by function cache_remove if item is not present. */ + CACHE_MALLOC_ERROR /**< Returned by a function if a malloc fail. */ +} cache_result; + + +typedef struct cache *cache_t; + + +/** + * @brief Returns a new cache_t + * + * @par cache_max_size = max number of item that the new cache_t can contain + * @return a new cache_t, or NULL if an error occurred + * + */ +cache_t cache_new(uint32_t cache_max_size); + + +/** + * @brief Add an item in the specified cache_t + * + * @par cache = the cache_t + * @par item = pointer to the item to add + * @par item_size = size of the item + * @return a code representing the result of the function + * + */ +cache_result cache_add(cache_t cache, void *item, uint32_t item_size); + + +/** + * @brief Check if an item is in the specified cache_t + * + * @par cache = the cache_t + * @par item = pointer to the item to check + * @par item_size = size of the item + * @return a code representing the result of the function + * + */ +cache_result cache_contains(cache_t cache, void *item, uint32_t item_size); + + +/** + * @brief Remove an item in the specified cache_t + * + * @par cache = the cache_t + * @par item = pointer to the item to remove + * @par item_size = size of the item + * @return a code representing the result of the function + * + */ +cache_result cache_remove(cache_t cache, void *item, uint32_t item_size); + +/** + * @brief Free the specified cache_t + * + * @par alist = the cache + * + */ +void cache_free(cache_t cache); + +cache_entry cache_entry_new(void); +cache_entry_map cache_entry_map_new(void); + +#endif + +#ifdef __cplusplus +} +#endif diff --git a/src/components/implementation/simple_nf/ndpi/libinjection.h b/src/components/implementation/simple_nf/ndpi/libinjection.h new file mode 100644 index 0000000000..6b40b1df6a --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/libinjection.h @@ -0,0 +1,65 @@ +/** + * Copyright 2012-2016 Nick Galbreath + * nickg@client9.com + * BSD License -- see COPYING.txt for details + * + * https://libinjection.client9.com/ + * + */ + +#ifndef LIBINJECTION_H +#define LIBINJECTION_H + +#ifdef __cplusplus +# define LIBINJECTION_BEGIN_DECLS extern "C" { +# define LIBINJECTION_END_DECLS } +#else +# define LIBINJECTION_BEGIN_DECLS +# define LIBINJECTION_END_DECLS +#endif + +LIBINJECTION_BEGIN_DECLS + +/* + * Pull in size_t + */ +#include + +/* + * Version info. + * + * This is moved into a function to allow SWIG and other auto-generated + * binding to not be modified during minor release changes. We change + * change the version number in the c source file, and not regenerated + * the binding + * + * See python's normalized version + * http://www.python.org/dev/peps/pep-0386/#normalizedversion + */ +const char* libinjection_version(void); + +/** + * Simple API for SQLi detection - returns a SQLi fingerprint or NULL + * is benign input + * + * \param[in] s input string, may contain nulls, does not need to be null-terminated + * \param[in] slen input string length + * \param[out] fingerprint buffer of 8+ characters. c-string, + * \return 1 if SQLi, 0 if benign. fingerprint will be set or set to empty string. + */ +int libinjection_sqli(const char* s, size_t slen, char fingerprint[]); + +/** ALPHA version of xss detector. + * + * NOT DONE. + * + * \param[in] s input string, may contain nulls, does not need to be null-terminated + * \param[in] slen input string length + * \return 1 if XSS found, 0 if benign + * + */ +int libinjection_xss(const char* s, size_t slen); + +LIBINJECTION_END_DECLS + +#endif /* LIBINJECTION_H */ diff --git a/src/components/implementation/simple_nf/ndpi/libinjection_html5.c b/src/components/implementation/simple_nf/ndpi/libinjection_html5.c new file mode 100644 index 0000000000..a380ca0ad6 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/libinjection_html5.c @@ -0,0 +1,850 @@ +#include "libinjection_html5.h" + +#include +#include + +#ifdef DEBUG +#include +#define TRACE() printf("%s:%d\n", __FUNCTION__, __LINE__) +#else +#define TRACE() +#endif + + +#define CHAR_EOF -1 +#define CHAR_NULL 0 +#define CHAR_BANG 33 +#define CHAR_DOUBLE 34 +#define CHAR_PERCENT 37 +#define CHAR_SINGLE 39 +#define CHAR_DASH 45 +#define CHAR_SLASH 47 +#define CHAR_LT 60 +#define CHAR_EQUALS 61 +#define CHAR_GT 62 +#define CHAR_QUESTION 63 +#define CHAR_RIGHTB 93 +#define CHAR_TICK 96 + +/* prototypes */ + +static int h5_skip_white(h5_state_t* hs); +static int h5_is_white(char c); +static int h5_state_eof(h5_state_t* hs); +static int h5_state_data(h5_state_t* hs); +static int h5_state_tag_open(h5_state_t* hs); +static int h5_state_tag_name(h5_state_t* hs); +static int h5_state_tag_name_close(h5_state_t* hs); +static int h5_state_end_tag_open(h5_state_t* hs); +static int h5_state_self_closing_start_tag(h5_state_t* hs); +static int h5_state_attribute_name(h5_state_t* hs); +static int h5_state_after_attribute_name(h5_state_t* hs); +static int h5_state_before_attribute_name(h5_state_t* hs); +static int h5_state_before_attribute_value(h5_state_t* hs); +static int h5_state_attribute_value_double_quote(h5_state_t* hs); +static int h5_state_attribute_value_single_quote(h5_state_t* hs); +static int h5_state_attribute_value_back_quote(h5_state_t* hs); +static int h5_state_attribute_value_no_quote(h5_state_t* hs); +static int h5_state_after_attribute_value_quoted_state(h5_state_t* hs); +static int h5_state_comment(h5_state_t* hs); +static int h5_state_cdata(h5_state_t* hs); + + +/* 12.2.4.44 */ +static int h5_state_bogus_comment(h5_state_t* hs); +static int h5_state_bogus_comment2(h5_state_t* hs); + +/* 12.2.4.45 */ +static int h5_state_markup_declaration_open(h5_state_t* hs); + +/* 8.2.4.52 */ +static int h5_state_doctype(h5_state_t* hs); + +/** + * public function + */ +void libinjection_h5_init(h5_state_t* hs, const char* s, size_t len, enum html5_flags flags) +{ + memset(hs, 0, sizeof(h5_state_t)); + hs->s = s; + hs->len = len; + + switch (flags) { + case DATA_STATE: + hs->state = h5_state_data; + break; + case VALUE_NO_QUOTE: + hs->state = h5_state_before_attribute_name; + break; + case VALUE_SINGLE_QUOTE: + hs->state = h5_state_attribute_value_single_quote; + break; + case VALUE_DOUBLE_QUOTE: + hs->state = h5_state_attribute_value_double_quote; + break; + case VALUE_BACK_QUOTE: + hs->state = h5_state_attribute_value_back_quote; + break; + } +} + +/** + * public function + */ +int libinjection_h5_next(h5_state_t* hs) +{ + assert(hs->state != NULL); + return (*hs->state)(hs); +} + +/** + * Everything below here is private + * + */ + + +static int h5_is_white(char ch) +{ + /* + * \t = horizontal tab = 0x09 + * \n = newline = 0x0A + * \v = vertical tab = 0x0B + * \f = form feed = 0x0C + * \r = cr = 0x0D + */ + return strchr(" \t\n\v\f\r", ch) != NULL; +} + +static int h5_skip_white(h5_state_t* hs) +{ + char ch; + while (hs->pos < hs->len) { + ch = hs->s[hs->pos]; + switch (ch) { + case 0x00: /* IE only */ + case 0x20: + case 0x09: + case 0x0A: + case 0x0B: /* IE only */ + case 0x0C: + case 0x0D: /* IE only */ + hs->pos += 1; + break; + default: + return ch; + } + } + return CHAR_EOF; +} + +static int h5_state_eof(h5_state_t* hs) +{ + /* eliminate unused function argument warning */ + (void)hs; + return 0; +} + +static int h5_state_data(h5_state_t* hs) +{ + const char* idx; + + TRACE(); + assert(hs->len >= hs->pos); + idx = (const char*) memchr(hs->s + hs->pos, CHAR_LT, hs->len - hs->pos); + if (idx == NULL) { + hs->token_start = hs->s + hs->pos; + hs->token_len = hs->len - hs->pos; + hs->token_type = DATA_TEXT; + hs->state = h5_state_eof; + if (hs->token_len == 0) { + return 0; + } + } else { + hs->token_start = hs->s + hs->pos; + hs->token_type = DATA_TEXT; + hs->token_len = (size_t)(idx - hs->s) - hs->pos; + hs->pos = (size_t)(idx - hs->s) + 1; + hs->state = h5_state_tag_open; + if (hs->token_len == 0) { + return h5_state_tag_open(hs); + } + } + return 1; +} + +/** + * 12 2.4.8 + */ +static int h5_state_tag_open(h5_state_t* hs) +{ + char ch; + + TRACE(); + if (hs->pos >= hs->len) { + return 0; + } + ch = hs->s[hs->pos]; + if (ch == CHAR_BANG) { + hs->pos += 1; + return h5_state_markup_declaration_open(hs); + } else if (ch == CHAR_SLASH) { + hs->pos += 1; + hs->is_close = 1; + return h5_state_end_tag_open(hs); + } else if (ch == CHAR_QUESTION) { + hs->pos += 1; + return h5_state_bogus_comment(hs); + } else if (ch == CHAR_PERCENT) { + /* this is not in spec.. alternative comment format used + by IE <= 9 and Safari < 4.0.3 */ + hs->pos += 1; + return h5_state_bogus_comment2(hs); + } else if ((ch >= 'a' && ch <= 'z') || (ch >= 'A' && ch <= 'Z')) { + return h5_state_tag_name(hs); + } else if (ch == CHAR_NULL) { + /* IE-ism NULL characters are ignored */ + return h5_state_tag_name(hs); + } else { + /* user input mistake in configuring state */ + if (hs->pos == 0) { + return h5_state_data(hs); + } + hs->token_start = hs->s + hs->pos - 1; + hs->token_len = 1; + hs->token_type = DATA_TEXT; + hs->state = h5_state_data; + return 1; + } +} +/** + * 12.2.4.9 + */ +static int h5_state_end_tag_open(h5_state_t* hs) +{ + char ch; + + TRACE(); + + if (hs->pos >= hs->len) { + return 0; + } + ch = hs->s[hs->pos]; + if (ch == CHAR_GT) { + return h5_state_data(hs); + } else if ((ch >= 'a' && ch <= 'z') || (ch >= 'A' && ch <= 'Z')) { + return h5_state_tag_name(hs); + } + + hs->is_close = 0; + return h5_state_bogus_comment(hs); +} +/* + * + */ +static int h5_state_tag_name_close(h5_state_t* hs) +{ + TRACE(); + hs->is_close = 0; + hs->token_start = hs->s + hs->pos; + hs->token_len = 1; + hs->token_type = TAG_NAME_CLOSE; + hs->pos += 1; + if (hs->pos < hs->len) { + hs->state = h5_state_data; + } else { + hs->state = h5_state_eof; + } + + return 1; +} + +/** + * 12.2.4.10 + */ +static int h5_state_tag_name(h5_state_t* hs) +{ + char ch; + size_t pos; + + TRACE(); + pos = hs->pos; + while (pos < hs->len) { + ch = hs->s[pos]; + if (ch == 0) { + /* special non-standard case */ + /* allow nulls in tag name */ + /* some old browsers apparently allow and ignore them */ + pos += 1; + } else if (h5_is_white(ch)) { + hs->token_start = hs->s + hs->pos; + hs->token_len = pos - hs->pos; + hs->token_type = TAG_NAME_OPEN; + hs->pos = pos + 1; + hs->state = h5_state_before_attribute_name; + return 1; + } else if (ch == CHAR_SLASH) { + hs->token_start = hs->s + hs->pos; + hs->token_len = pos - hs->pos; + hs->token_type = TAG_NAME_OPEN; + hs->pos = pos + 1; + hs->state = h5_state_self_closing_start_tag; + return 1; + } else if (ch == CHAR_GT) { + hs->token_start = hs->s + hs->pos; + hs->token_len = pos - hs->pos; + if (hs->is_close) { + hs->pos = pos + 1; + hs->is_close = 0; + hs->token_type = TAG_CLOSE; + hs->state = h5_state_data; + } else { + hs->pos = pos; + hs->token_type = TAG_NAME_OPEN; + hs->state = h5_state_tag_name_close; + } + return 1; + } else { + pos += 1; + } + } + + hs->token_start = hs->s + hs->pos; + hs->token_len = hs->len - hs->pos; + hs->token_type = TAG_NAME_OPEN; + hs->state = h5_state_eof; + return 1; +} + +/** + * 12.2.4.34 + */ +static int h5_state_before_attribute_name(h5_state_t* hs) +{ + int ch; + + TRACE(); + ch = h5_skip_white(hs); + switch (ch) { + case CHAR_EOF: { + return 0; + } + case CHAR_SLASH: { + hs->pos += 1; + return h5_state_self_closing_start_tag(hs); + } + case CHAR_GT: { + hs->state = h5_state_data; + hs->token_start = hs->s + hs->pos; + hs->token_len = 1; + hs->token_type = TAG_NAME_CLOSE; + hs->pos += 1; + return 1; + } + default: { + return h5_state_attribute_name(hs); + } + } +} + +static int h5_state_attribute_name(h5_state_t* hs) +{ + char ch; + size_t pos; + + TRACE(); + pos = hs->pos + 1; + while (pos < hs->len) { + ch = hs->s[pos]; + if (h5_is_white(ch)) { + hs->token_start = hs->s + hs->pos; + hs->token_len = pos - hs->pos; + hs->token_type = ATTR_NAME; + hs->state = h5_state_after_attribute_name; + hs->pos = pos + 1; + return 1; + } else if (ch == CHAR_SLASH) { + hs->token_start = hs->s + hs->pos; + hs->token_len = pos - hs->pos; + hs->token_type = ATTR_NAME; + hs->state = h5_state_self_closing_start_tag; + hs->pos = pos + 1; + return 1; + } else if (ch == CHAR_EQUALS) { + hs->token_start = hs->s + hs->pos; + hs->token_len = pos - hs->pos; + hs->token_type = ATTR_NAME; + hs->state = h5_state_before_attribute_value; + hs->pos = pos + 1; + return 1; + } else if (ch == CHAR_GT) { + hs->token_start = hs->s + hs->pos; + hs->token_len = pos - hs->pos; + hs->token_type = ATTR_NAME; + hs->state = h5_state_tag_name_close; + hs->pos = pos; + return 1; + } else { + pos += 1; + } + } + /* EOF */ + hs->token_start = hs->s + hs->pos; + hs->token_len = hs->len - hs->pos; + hs->token_type = ATTR_NAME; + hs->state = h5_state_eof; + hs->pos = hs->len; + return 1; +} + +/** + * 12.2.4.36 + */ +static int h5_state_after_attribute_name(h5_state_t* hs) +{ + int c; + + TRACE(); + c = h5_skip_white(hs); + switch (c) { + case CHAR_EOF: { + return 0; + } + case CHAR_SLASH: { + hs->pos += 1; + return h5_state_self_closing_start_tag(hs); + } + case CHAR_EQUALS: { + hs->pos += 1; + return h5_state_before_attribute_value(hs); + } + case CHAR_GT: { + return h5_state_tag_name_close(hs); + } + default: { + return h5_state_attribute_name(hs); + } + } +} + +/** + * 12.2.4.37 + */ +static int h5_state_before_attribute_value(h5_state_t* hs) +{ + int c; + TRACE(); + + c = h5_skip_white(hs); + + if (c == CHAR_EOF) { + hs->state = h5_state_eof; + return 0; + } + + if (c == CHAR_DOUBLE) { + return h5_state_attribute_value_double_quote(hs); + } else if (c == CHAR_SINGLE) { + return h5_state_attribute_value_single_quote(hs); + } else if (c == CHAR_TICK) { + /* NON STANDARD IE */ + return h5_state_attribute_value_back_quote(hs); + } else { + return h5_state_attribute_value_no_quote(hs); + } +} + + +static int h5_state_attribute_value_quote(h5_state_t* hs, char qchar) +{ + const char* idx; + + TRACE(); + + /* skip initial quote in normal case. + * don't do this "if (pos == 0)" since it means we have started + * in a non-data state. given an input of '>pos > 0) { + hs->pos += 1; + } + + + idx = (const char*) memchr(hs->s + hs->pos, qchar, hs->len - hs->pos); + if (idx == NULL) { + hs->token_start = hs->s + hs->pos; + hs->token_len = hs->len - hs->pos; + hs->token_type = ATTR_VALUE; + hs->state = h5_state_eof; + } else { + hs->token_start = hs->s + hs->pos; + hs->token_len = (size_t)(idx - hs->s) - hs->pos; + hs->token_type = ATTR_VALUE; + hs->state = h5_state_after_attribute_value_quoted_state; + hs->pos += hs->token_len + 1; + } + return 1; +} + +static +int h5_state_attribute_value_double_quote(h5_state_t* hs) +{ + TRACE(); + return h5_state_attribute_value_quote(hs, CHAR_DOUBLE); +} + +static +int h5_state_attribute_value_single_quote(h5_state_t* hs) +{ + TRACE(); + return h5_state_attribute_value_quote(hs, CHAR_SINGLE); +} + +static +int h5_state_attribute_value_back_quote(h5_state_t* hs) +{ + TRACE(); + return h5_state_attribute_value_quote(hs, CHAR_TICK); +} + +static int h5_state_attribute_value_no_quote(h5_state_t* hs) +{ + char ch; + size_t pos; + + TRACE(); + pos = hs->pos; + while (pos < hs->len) { + ch = hs->s[pos]; + if (h5_is_white(ch)) { + hs->token_type = ATTR_VALUE; + hs->token_start = hs->s + hs->pos; + hs->token_len = pos - hs->pos; + hs->pos = pos + 1; + hs->state = h5_state_before_attribute_name; + return 1; + } else if (ch == CHAR_GT) { + hs->token_type = ATTR_VALUE; + hs->token_start = hs->s + hs->pos; + hs->token_len = pos - hs->pos; + hs->pos = pos; + hs->state = h5_state_tag_name_close; + return 1; + } + pos += 1; + } + TRACE(); + /* EOF */ + hs->state = h5_state_eof; + hs->token_start = hs->s + hs->pos; + hs->token_len = hs->len - hs->pos; + hs->token_type = ATTR_VALUE; + return 1; +} + +/** + * 12.2.4.41 + */ +static int h5_state_after_attribute_value_quoted_state(h5_state_t* hs) +{ + char ch; + + TRACE(); + if (hs->pos >= hs->len) { + return 0; + } + ch = hs->s[hs->pos]; + if (h5_is_white(ch)) { + hs->pos += 1; + return h5_state_before_attribute_name(hs); + } else if (ch == CHAR_SLASH) { + hs->pos += 1; + return h5_state_self_closing_start_tag(hs); + } else if (ch == CHAR_GT) { + hs->token_start = hs->s + hs->pos; + hs->token_len = 1; + hs->token_type = TAG_NAME_CLOSE; + hs->pos += 1; + hs->state = h5_state_data; + return 1; + } else { + return h5_state_before_attribute_name(hs); + } +} + +/** + * 12.2.4.43 + */ +static int h5_state_self_closing_start_tag(h5_state_t* hs) +{ + char ch; + + TRACE(); + if (hs->pos >= hs->len) { + return 0; + } + ch = hs->s[hs->pos]; + if (ch == CHAR_GT) { + assert(hs->pos > 0); + hs->token_start = hs->s + hs->pos -1; + hs->token_len = 2; + hs->token_type = TAG_NAME_SELFCLOSE; + hs->state = h5_state_data; + hs->pos += 1; + return 1; + } else { + return h5_state_before_attribute_name(hs); + } +} + +/** + * 12.2.4.44 + */ +static int h5_state_bogus_comment(h5_state_t* hs) +{ + const char* idx; + + TRACE(); + idx = (const char*) memchr(hs->s + hs->pos, CHAR_GT, hs->len - hs->pos); + if (idx == NULL) { + hs->token_start = hs->s + hs->pos; + hs->token_len = hs->len - hs->pos; + hs->pos = hs->len; + hs->state = h5_state_eof; + } else { + hs->token_start = hs->s + hs->pos; + hs->token_len = (size_t)(idx - hs->s) - hs->pos; + hs->pos = (size_t)(idx - hs->s) + 1; + hs->state = h5_state_data; + } + + hs->token_type = TAG_COMMENT; + return 1; +} + +/** + * 12.2.4.44 ALT + */ +static int h5_state_bogus_comment2(h5_state_t* hs) +{ + const char* idx; + size_t pos; + + TRACE(); + pos = hs->pos; + while (1) { + idx = (const char*) memchr(hs->s + pos, CHAR_PERCENT, hs->len - pos); + if (idx == NULL || (idx + 1 >= hs->s + hs->len)) { + hs->token_start = hs->s + hs->pos; + hs->token_len = hs->len - hs->pos; + hs->pos = hs->len; + hs->token_type = TAG_COMMENT; + hs->state = h5_state_eof; + return 1; + } + + if (*(idx +1) != CHAR_GT) { + pos = (size_t)(idx - hs->s) + 1; + continue; + } + + /* ends in %> */ + hs->token_start = hs->s + hs->pos; + hs->token_len = (size_t)(idx - hs->s) - hs->pos; + hs->pos = (size_t)(idx - hs->s) + 2; + hs->state = h5_state_data; + hs->token_type = TAG_COMMENT; + return 1; + } +} + +/** + * 8.2.4.45 + */ +static int h5_state_markup_declaration_open(h5_state_t* hs) +{ + size_t remaining; + + TRACE(); + remaining = hs->len - hs->pos; + if (remaining >= 7 && + /* case insensitive */ + (hs->s[hs->pos + 0] == 'D' || hs->s[hs->pos + 0] == 'd') && + (hs->s[hs->pos + 1] == 'O' || hs->s[hs->pos + 1] == 'o') && + (hs->s[hs->pos + 2] == 'C' || hs->s[hs->pos + 2] == 'c') && + (hs->s[hs->pos + 3] == 'T' || hs->s[hs->pos + 3] == 't') && + (hs->s[hs->pos + 4] == 'Y' || hs->s[hs->pos + 4] == 'y') && + (hs->s[hs->pos + 5] == 'P' || hs->s[hs->pos + 5] == 'p') && + (hs->s[hs->pos + 6] == 'E' || hs->s[hs->pos + 6] == 'e') + ) { + return h5_state_doctype(hs); + } else if (remaining >= 7 && + /* upper case required */ + hs->s[hs->pos + 0] == '[' && + hs->s[hs->pos + 1] == 'C' && + hs->s[hs->pos + 2] == 'D' && + hs->s[hs->pos + 3] == 'A' && + hs->s[hs->pos + 4] == 'T' && + hs->s[hs->pos + 5] == 'A' && + hs->s[hs->pos + 6] == '[' + ) { + hs->pos += 7; + return h5_state_cdata(hs); + } else if (remaining >= 2 && + hs->s[hs->pos + 0] == '-' && + hs->s[hs->pos + 1] == '-') { + hs->pos += 2; + return h5_state_comment(hs); + } + + return h5_state_bogus_comment(hs); +} + +/** + * 12.2.4.48 + * 12.2.4.49 + * 12.2.4.50 + * 12.2.4.51 + * state machine spec is confusing since it can only look + * at one character at a time but simply it's comments end by: + * 1) EOF + * 2) ending in --> + * 3) ending in -!> + */ +static int h5_state_comment(h5_state_t* hs) +{ + char ch; + const char* idx; + size_t pos; + size_t offset; + const char* end = hs->s + hs->len; + + TRACE(); + pos = hs->pos; + while (1) { + + idx = (const char*) memchr(hs->s + pos, CHAR_DASH, hs->len - pos); + + /* did not find anything or has less than 3 chars left */ + if (idx == NULL || idx > hs->s + hs->len - 3) { + hs->state = h5_state_eof; + hs->token_start = hs->s + hs->pos; + hs->token_len = hs->len - hs->pos; + hs->token_type = TAG_COMMENT; + return 1; + } + offset = 1; + + /* skip all nulls */ + while (idx + offset < end && *(idx + offset) == 0) { + offset += 1; + } + if (idx + offset == end) { + hs->state = h5_state_eof; + hs->token_start = hs->s + hs->pos; + hs->token_len = hs->len - hs->pos; + hs->token_type = TAG_COMMENT; + return 1; + } + + ch = *(idx + offset); + if (ch != CHAR_DASH && ch != CHAR_BANG) { + pos = (size_t)(idx - hs->s) + 1; + continue; + } + + /* need to test */ +#if 0 + /* skip all nulls */ + while (idx + offset < end && *(idx + offset) == 0) { + offset += 1; + } + if (idx + offset == end) { + hs->state = h5_state_eof; + hs->token_start = hs->s + hs->pos; + hs->token_len = hs->len - hs->pos; + hs->token_type = TAG_COMMENT; + return 1; + } +#endif + + offset += 1; + if (idx + offset == end) { + hs->state = h5_state_eof; + hs->token_start = hs->s + hs->pos; + hs->token_len = hs->len - hs->pos; + hs->token_type = TAG_COMMENT; + return 1; + } + + + ch = *(idx + offset); + if (ch != CHAR_GT) { + pos = (size_t)(idx - hs->s) + 1; + continue; + } + offset += 1; + + /* ends in --> or -!> */ + hs->token_start = hs->s + hs->pos; + hs->token_len = (size_t)(idx - hs->s) - hs->pos; + hs->pos = (size_t)(idx + offset - hs->s); + hs->state = h5_state_data; + hs->token_type = TAG_COMMENT; + return 1; + } +} + +static int h5_state_cdata(h5_state_t* hs) +{ + const char* idx; + size_t pos; + + TRACE(); + pos = hs->pos; + while (1) { + idx = (const char*) memchr(hs->s + pos, CHAR_RIGHTB, hs->len - pos); + + /* did not find anything or has less than 3 chars left */ + if (idx == NULL || idx > hs->s + hs->len - 3) { + hs->state = h5_state_eof; + hs->token_start = hs->s + hs->pos; + hs->token_len = hs->len - hs->pos; + hs->token_type = DATA_TEXT; + return 1; + } else if ( *(idx+1) == CHAR_RIGHTB && *(idx+2) == CHAR_GT) { + hs->state = h5_state_data; + hs->token_start = hs->s + hs->pos; + hs->token_len = (size_t)(idx - hs->s) - hs->pos; + hs->pos = (size_t)(idx - hs->s) + 3; + hs->token_type = DATA_TEXT; + return 1; + } else { + pos = (size_t)(idx - hs->s) + 1; + } + } +} + +/** + * 8.2.4.52 + * http://www.w3.org/html/wg/drafts/html/master/syntax.html#doctype-state + */ +static int h5_state_doctype(h5_state_t* hs) +{ + const char* idx; + + TRACE(); + hs->token_start = hs->s + hs->pos; + hs->token_type = DOCTYPE; + + idx = (const char*) memchr(hs->s + hs->pos, CHAR_GT, hs->len - hs->pos); + if (idx == NULL) { + hs->state = h5_state_eof; + hs->token_len = hs->len - hs->pos; + } else { + hs->state = h5_state_data; + hs->token_len = (size_t)(idx - hs->s) - hs->pos; + hs->pos = (size_t)(idx - hs->s) + 1; + } + return 1; +} diff --git a/src/components/implementation/simple_nf/ndpi/libinjection_html5.h b/src/components/implementation/simple_nf/ndpi/libinjection_html5.h new file mode 100644 index 0000000000..29a1459684 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/libinjection_html5.h @@ -0,0 +1,54 @@ +#ifndef LIBINJECTION_HTML5 +#define LIBINJECTION_HTML5 + +#ifdef __cplusplus +extern "C" { +#endif + +/* pull in size_t */ + +#include + +enum html5_type { + DATA_TEXT + , TAG_NAME_OPEN + , TAG_NAME_CLOSE + , TAG_NAME_SELFCLOSE + , TAG_DATA + , TAG_CLOSE + , ATTR_NAME + , ATTR_VALUE + , TAG_COMMENT + , DOCTYPE +}; + +enum html5_flags { + DATA_STATE + , VALUE_NO_QUOTE + , VALUE_SINGLE_QUOTE + , VALUE_DOUBLE_QUOTE + , VALUE_BACK_QUOTE +}; + +struct h5_state; +typedef int (*ptr_html5_state)(struct h5_state*); + +typedef struct h5_state { + const char* s; + size_t len; + size_t pos; + int is_close; + ptr_html5_state state; + const char* token_start; + size_t token_len; + enum html5_type token_type; +} h5_state_t; + + +void libinjection_h5_init(h5_state_t* hs, const char* s, size_t len, enum html5_flags); +int libinjection_h5_next(h5_state_t* hs); + +#ifdef __cplusplus +} +#endif +#endif diff --git a/src/components/implementation/simple_nf/ndpi/libinjection_sqli.c b/src/components/implementation/simple_nf/ndpi/libinjection_sqli.c new file mode 100644 index 0000000000..c411677347 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/libinjection_sqli.c @@ -0,0 +1,2325 @@ +/** + * Copyright 2012,2016 Nick Galbreath + * nickg@client9.com + * BSD License -- see COPYING.txt for details + * + * https://libinjection.client9.com/ + * + */ + +#include +#include +#include +#include +#include +#include + +#include "libinjection.h" +#include "libinjection_sqli.h" +#include "libinjection_sqli_data.h" + +#define LIBINJECTION_VERSION "3.9.2" + +#define LIBINJECTION_SQLI_TOKEN_SIZE sizeof(((stoken_t*)(0))->val) +#define LIBINJECTION_SQLI_MAX_TOKENS 5 + +#ifndef TRUE +#define TRUE 1 +#endif +#ifndef FALSE +#define FALSE 0 +#endif + +#define CHAR_NULL '\0' +#define CHAR_SINGLE '\'' +#define CHAR_DOUBLE '"' +#define CHAR_TICK '`' + +/* faster than calling out to libc isdigit */ +#define ISDIGIT(a) ((unsigned)((a) - '0') <= 9) + +#if 0 +#define FOLD_DEBUG printf("%d \t more=%d pos=%d left=%d\n", __LINE__, more, (int)pos, (int)left); +#else +#define FOLD_DEBUG +#endif + +/* + * not making public just yet + */ +typedef enum { + TYPE_NONE = 0 + , TYPE_KEYWORD = (int)'k' + , TYPE_UNION = (int)'U' + , TYPE_GROUP = (int)'B' + , TYPE_EXPRESSION = (int)'E' + , TYPE_SQLTYPE = (int)'t' + , TYPE_FUNCTION = (int)'f' + , TYPE_BAREWORD = (int)'n' + , TYPE_NUMBER = (int)'1' + , TYPE_VARIABLE = (int)'v' + , TYPE_STRING = (int)'s' + , TYPE_OPERATOR = (int)'o' + , TYPE_LOGIC_OPERATOR = (int)'&' + , TYPE_COMMENT = (int)'c' + , TYPE_COLLATE = (int)'A' + , TYPE_LEFTPARENS = (int)'(' + , TYPE_RIGHTPARENS = (int)')' /* not used? */ + , TYPE_LEFTBRACE = (int)'{' + , TYPE_RIGHTBRACE = (int)'}' + , TYPE_DOT = (int)'.' + , TYPE_COMMA = (int)',' + , TYPE_COLON = (int)':' + , TYPE_SEMICOLON = (int)';' + , TYPE_TSQL = (int)'T' /* TSQL start */ + , TYPE_UNKNOWN = (int)'?' + , TYPE_EVIL = (int)'X' /* unparsable, abort */ + , TYPE_FINGERPRINT = (int)'F' /* not really a token */ + , TYPE_BACKSLASH = (int)'\\' +} sqli_token_types; + +/** + * Initializes parsing state + * + */ +static char flag2delim(int flag) +{ + if (flag & FLAG_QUOTE_SINGLE) { + return CHAR_SINGLE; + } else if (flag & FLAG_QUOTE_DOUBLE) { + return CHAR_DOUBLE; + } else { + return CHAR_NULL; + } +} + +/* memchr2 finds a string of 2 characters inside another string + * This a specialized version of "memmem" or "memchr". + * 'memmem' doesn't exist on all platforms + * + * Porting notes: this is just a special version of + * astring.find("AB") + * + */ +static const char * +memchr2(const char *haystack, size_t haystack_len, char c0, char c1) +{ + const char *cur = haystack; + const char *last = haystack + haystack_len - 1; + + if (haystack_len < 2) { + return NULL; + } + + while (cur < last) { + /* safe since cur < len - 1 always */ + if (cur[0] == c0 && cur[1] == c1) { + return cur; + } + cur += 1; + } + + return NULL; +} + +/** + * memmem might not exist on some systems + */ +static const char * +my_memmem(const char* haystack, size_t hlen, const char* needle, size_t nlen) +{ + const char* cur; + const char* last; + assert(haystack); + assert(needle); + assert(nlen > 1); + last = haystack + hlen - nlen; + for (cur = haystack; cur <= last; ++cur) { + if (cur[0] == needle[0] && memcmp(cur, needle, nlen) == 0) { + return cur; + } + } + return NULL; +} + +/** Find largest string containing certain characters. + * + * C Standard library 'strspn' only works for 'c-strings' (null terminated) + * This works on arbitrary length. + * + * Performance notes: + * not critical + * + * Porting notes: + * if accept is 'ABC', then this function would be similar to + * a_regexp.match(a_str, '[ABC]*'), + */ +static size_t +strlenspn(const char *s, size_t len, const char *accept) +{ + size_t i; + for (i = 0; i < len; ++i) { + /* likely we can do better by inlining this function + * but this works for now + */ + if (strchr(accept, s[i]) == NULL) { + return i; + } + } + return len; +} + +static size_t +strlencspn(const char *s, size_t len, const char *accept) +{ + size_t i; + for (i = 0; i < len; ++i) { + /* likely we can do better by inlining this function + * but this works for now + */ + if (strchr(accept, s[i]) != NULL) { + return i; + } + } + return len; +} +static int char_is_white(char ch) { + /* ' ' space is 0x32 + '\t 0x09 \011 horizontal tab + '\n' 0x0a \012 new line + '\v' 0x0b \013 vertical tab + '\f' 0x0c \014 new page + '\r' 0x0d \015 carriage return + 0x00 \000 null (oracle) + 0xa0 \240 is Latin-1 + */ + return strchr(" \t\n\v\f\r\240\000", ch) != NULL; +} + +/* DANGER DANGER + * This is -very specialized function- + * + * this compares a ALL_UPPER CASE C STRING + * with a *arbitrary memory* + length + * + * Sane people would just make a copy, up-case + * and use a hash table. + * + * Required since libc version uses the current locale + * and is much slower. + */ +static int cstrcasecmp(const char *a, const char *b, size_t n) +{ + char cb; + + for (; n > 0; a++, b++, n--) { + cb = *b; + if (cb >= 'a' && cb <= 'z') { + cb -= 0x20; + } + if (*a != cb) { + return *a - cb; + } else if (*a == '\0') { + return -1; + } + } + + return (*a == 0) ? 0 : 1; +} + +/** + * Case sensitive string compare. + * Here only to make code more readable + */ +static int streq(const char *a, const char *b) +{ + return strcmp(a, b) == 0; +} + +/** + * + * + * + * Porting Notes: + * given a mapping/hash of string to char + * this is just + * typecode = mapping[key.upper()] + */ + +static char bsearch_keyword_type(const char *key, size_t len, + const keyword_t * keywords, size_t numb) +{ + size_t pos; + size_t left = 0; + size_t right = numb - 1; + + while (left < right) { + pos = (left + right) >> 1; + + /* arg0 = upper case only, arg1 = mixed case */ + if (cstrcasecmp(keywords[pos].word, key, len) < 0) { + left = pos + 1; + } else { + right = pos; + } + } + if ((left == right) && cstrcasecmp(keywords[left].word, key, len) == 0) { + return keywords[left].type; + } else { + return CHAR_NULL; + } +} + +static char is_keyword(const char* key, size_t len) +{ + return bsearch_keyword_type(key, len, sql_keywords, sql_keywords_sz); +} + +/* st_token methods + * + * The following functions manipulates the stoken_t type + * + * + */ + +static void st_clear(stoken_t * st) +{ + memset(st, 0, sizeof(stoken_t)); +} + +static void st_assign_char(stoken_t * st, const char stype, size_t pos, size_t len, + const char value) +{ + /* done to eliminate unused warning */ + (void)len; + st->type = (char) stype; + st->pos = pos; + st->len = 1; + st->val[0] = value; + st->val[1] = CHAR_NULL; +} + +static void st_assign(stoken_t * st, const char stype, + size_t pos, size_t len, const char* value) +{ + const size_t MSIZE = LIBINJECTION_SQLI_TOKEN_SIZE; + size_t last = len < MSIZE ? len : (MSIZE - 1); + st->type = (char) stype; + st->pos = pos; + st->len = last; + memcpy(st->val, value, last); + st->val[last] = CHAR_NULL; +} + +static void st_copy(stoken_t * dest, const stoken_t * src) +{ + memcpy(dest, src, sizeof(stoken_t)); +} + +static int st_is_arithmetic_op(const stoken_t* st) +{ + const char ch = st->val[0]; + return (st->type == TYPE_OPERATOR && st->len == 1 && + (ch == '*' || ch == '/' || ch == '-' || ch == '+' || ch == '%')); +} + +static int st_is_unary_op(const stoken_t * st) +{ + const char* str = st->val; + const size_t len = st->len; + + if (st->type != TYPE_OPERATOR) { + return FALSE; + } + + switch (len) { + case 1: + return *str == '+' || *str == '-' || *str == '!' || *str == '~'; + case 2: + return str[0] == '!' && str[1] == '!'; + case 3: + return cstrcasecmp("NOT", str, 3) == 0; + default: + return FALSE; + } +} + +/* Parsers + * + * + */ + +static size_t parse_white(struct libinjection_sqli_state * sf) +{ + return sf->pos + 1; +} + +static size_t parse_operator1(struct libinjection_sqli_state * sf) +{ + const char *cs = sf->s; + size_t pos = sf->pos; + + st_assign_char(sf->current, TYPE_OPERATOR, pos, 1, cs[pos]); + return pos + 1; +} + +static size_t parse_other(struct libinjection_sqli_state * sf) +{ + const char *cs = sf->s; + size_t pos = sf->pos; + + st_assign_char(sf->current, TYPE_UNKNOWN, pos, 1, cs[pos]); + return pos + 1; +} + +static size_t parse_char(struct libinjection_sqli_state * sf) +{ + const char *cs = sf->s; + size_t pos = sf->pos; + + st_assign_char(sf->current, cs[pos], pos, 1, cs[pos]); + return pos + 1; +} + +static size_t parse_eol_comment(struct libinjection_sqli_state * sf) +{ + const char *cs = sf->s; + const size_t slen = sf->slen; + size_t pos = sf->pos; + + const char *endpos = + (const char *) memchr((const void *) (cs + pos), '\n', slen - pos); + if (endpos == NULL) { + st_assign(sf->current, TYPE_COMMENT, pos, slen - pos, cs + pos); + return slen; + } else { + st_assign(sf->current, TYPE_COMMENT, pos, (size_t)(endpos - cs) - pos, cs + pos); + return (size_t)((endpos - cs) + 1); + } +} + +/** In ANSI mode, hash is an operator + * In MYSQL mode, it's a EOL comment like '--' + */ +static size_t parse_hash(struct libinjection_sqli_state * sf) +{ + sf->stats_comment_hash += 1; + if (sf->flags & FLAG_SQL_MYSQL) { + sf->stats_comment_hash += 1; + return parse_eol_comment(sf); + } else { + st_assign_char(sf->current, TYPE_OPERATOR, sf->pos, 1, '#'); + return sf->pos + 1; + } +} + +static size_t parse_dash(struct libinjection_sqli_state * sf) +{ + const char *cs = sf->s; + const size_t slen = sf->slen; + size_t pos = sf->pos; + + /* + * five cases + * 1) --[white] this is always a SQL comment + * 2) --[EOF] this is a comment + * 3) --[notwhite] in MySQL this is NOT a comment but two unary operators + * 4) --[notwhite] everyone else thinks this is a comment + * 5) -[not dash] '-' is a unary operator + */ + + if (pos + 2 < slen && cs[pos + 1] == '-' && char_is_white(cs[pos+2]) ) { + return parse_eol_comment(sf); + } else if (pos +2 == slen && cs[pos + 1] == '-') { + return parse_eol_comment(sf); + } else if (pos + 1 < slen && cs[pos + 1] == '-' && (sf->flags & FLAG_SQL_ANSI)) { + /* --[not-white] not-white case: + * + */ + sf->stats_comment_ddx += 1; + return parse_eol_comment(sf); + } else { + st_assign_char(sf->current, TYPE_OPERATOR, pos, 1, '-'); + return pos + 1; + } +} + + +/** This detects MySQL comments, comments that + * start with /x! We just ban these now but + * previously we attempted to parse the inside + * + * For reference: + * the form of /x![anything]x/ or /x!12345[anything] x/ + * + * Mysql 3 (maybe 4), allowed this: + * /x!0selectx/ 1; + * where 0 could be any number. + * + * The last version of MySQL 3 was in 2003. + + * It is unclear if the MySQL 3 syntax was allowed + * in MySQL 4. The last version of MySQL 4 was in 2008 + * + */ +static size_t is_mysql_comment(const char *cs, const size_t len, size_t pos) +{ + /* so far... + * cs[pos] == '/' && cs[pos+1] == '*' + */ + + if (pos + 2 >= len) { + /* not a mysql comment */ + return 0; + } + + if (cs[pos + 2] != '!') { + /* not a mysql comment */ + return 0; + } + + /* + * this is a mysql comment + * got "/x!" + */ + return 1; +} + +static size_t parse_slash(struct libinjection_sqli_state * sf) +{ + const char* ptr; + size_t clen; + const char *cs = sf->s; + const size_t slen = sf->slen; + size_t pos = sf->pos; + const char* cur = cs + pos; + char ctype = TYPE_COMMENT; + size_t pos1 = pos + 1; + if (pos1 == slen || cs[pos1] != '*') { + return parse_operator1(sf); + } + + /* + * skip over initial '/x' + */ + ptr = memchr2(cur + 2, slen - (pos + 2), '*', '/'); + + /* + * (ptr == NULL) causes false positive in cppcheck 1.61 + * casting to type seems to fix it + */ + if (ptr == (const char*) NULL) { + /* till end of line */ + clen = slen - pos; + } else { + clen = (size_t)(ptr + 2 - cur); + } + + /* + * postgresql allows nested comments which makes + * this is incompatible with parsing so + * if we find a '/x' inside the coment, then + * make a new token. + * + * Also, Mysql's "conditional" comments for version + * are an automatic black ban! + */ + + if(ptr && (memchr2(cur + 2, (size_t)(ptr - (cur + 1)), '/', '*') != NULL)) { + ctype = TYPE_EVIL; + } else if (is_mysql_comment(cs, slen, pos)) { + ctype = TYPE_EVIL; + } + + st_assign(sf->current, ctype, pos, clen, cs + pos); + return pos + clen; +} + + +static size_t parse_backslash(struct libinjection_sqli_state * sf) +{ + const char *cs = sf->s; + const size_t slen = sf->slen; + size_t pos = sf->pos; + + /* + * Weird MySQL alias for NULL, "\N" (capital N only) + */ + if (pos + 1 < slen && cs[pos +1] == 'N') { + st_assign(sf->current, TYPE_NUMBER, pos, 2, cs + pos); + return pos + 2; + } else { + st_assign_char(sf->current, TYPE_BACKSLASH, pos, 1, cs[pos]); + return pos + 1; + } +} + +static size_t parse_operator2(struct libinjection_sqli_state * sf) +{ + char ch; + const char *cs = sf->s; + const size_t slen = sf->slen; + size_t pos = sf->pos; + + if (pos + 1 >= slen) { + return parse_operator1(sf); + } + + if (pos + 2 < slen && + cs[pos] == '<' && + cs[pos + 1] == '=' && + cs[pos + 2] == '>') { + /* + * special 3-char operator + */ + st_assign(sf->current, TYPE_OPERATOR, pos, 3, cs + pos); + return pos + 3; + } + + ch = sf->lookup(sf, LOOKUP_OPERATOR, cs + pos, 2); + if (ch != CHAR_NULL) { + st_assign(sf->current, ch, pos, 2, cs+pos); + return pos + 2; + } + + /* + * not an operator.. what to do with the two + * characters we got? + */ + + if (cs[pos] == ':') { + /* ':' is not an operator */ + st_assign(sf->current, TYPE_COLON, pos, 1, cs+pos); + return pos + 1; + } else { + /* + * must be a single char operator + */ + return parse_operator1(sf); + } +} + +/* + * Ok! " \" " one backslash = escaped! + * " \\" " two backslash = not escaped! + * "\\\" " three backslash = escaped! + */ +static int is_backslash_escaped(const char* end, const char* start) +{ + const char* ptr; + for (ptr = end; ptr >= start; ptr--) { + if (*ptr != '\\') { + break; + } + } + /* if number of backslashes is odd, it is escaped */ + + return (end - ptr) & 1; +} + +static size_t is_double_delim_escaped(const char* cur, const char* end) +{ + return ((cur + 1) < end) && *(cur+1) == *cur; +} + +/* Look forward for doubling of delimiter + * + * case 'foo''bar' --> foo''bar + * + * ending quote isn't duplicated (i.e. escaped) + * since it's the wrong char or EOL + * + */ +static size_t parse_string_core(const char *cs, const size_t len, size_t pos, + stoken_t * st, char delim, size_t offset) +{ + /* + * offset is to skip the perhaps first quote char + */ + const char *qpos = + (const char *) memchr((const void *) (cs + pos + offset), delim, + len - pos - offset); + + /* + * then keep string open/close info + */ + if (offset > 0) { + /* + * this is real quote + */ + st->str_open = delim; + } else { + /* + * this was a simulated quote + */ + st->str_open = CHAR_NULL; + } + + while (TRUE) { + if (qpos == NULL) { + /* + * string ended with no trailing quote + * assign what we have + */ + st_assign(st, TYPE_STRING, pos + offset, len - pos - offset, cs + pos + offset); + st->str_close = CHAR_NULL; + return len; + } else if ( is_backslash_escaped(qpos - 1, cs + pos + offset)) { + /* keep going, move ahead one character */ + qpos = + (const char *) memchr((const void *) (qpos + 1), delim, + (size_t)((cs + len) - (qpos + 1))); + continue; + } else if (is_double_delim_escaped(qpos, cs + len)) { + /* keep going, move ahead two characters */ + qpos = + (const char *) memchr((const void *) (qpos + 2), delim, + (size_t)((cs + len) - (qpos + 2))); + continue; + } else { + /* hey it's a normal string */ + st_assign(st, TYPE_STRING, pos + offset, + (size_t)(qpos - (cs + pos + offset)), cs + pos + offset); + st->str_close = delim; + return (size_t)(qpos - cs + 1); + } + } +} + +/** + * Used when first char is a ' or " + */ +static size_t parse_string(struct libinjection_sqli_state * sf) +{ + const char *cs = sf->s; + const size_t slen = sf->slen; + size_t pos = sf->pos; + + /* + * assert cs[pos] == single or double quote + */ + return parse_string_core(cs, slen, pos, sf->current, cs[pos], 1); +} + +/** + * Used when first char is: + * N or n: mysql "National Character set" + * E : psql "Escaped String" + */ +static size_t parse_estring(struct libinjection_sqli_state * sf) +{ + const char *cs = sf->s; + const size_t slen = sf->slen; + size_t pos = sf->pos; + + if (pos + 2 >= slen || cs[pos+1] != CHAR_SINGLE) { + return parse_word(sf); + } + return parse_string_core(cs, slen, pos, sf->current, CHAR_SINGLE, 2); +} + +static size_t parse_ustring(struct libinjection_sqli_state * sf) +{ + const char *cs = sf->s; + size_t slen = sf->slen; + size_t pos = sf->pos; + + if (pos + 2 < slen && cs[pos+1] == '&' && cs[pos+2] == '\'') { + sf->pos += 2; + pos = parse_string(sf); + sf->current->str_open = 'u'; + if (sf->current->str_close == '\'') { + sf->current->str_close = 'u'; + } + return pos; + } else { + return parse_word(sf); + } +} + +static size_t parse_qstring_core(struct libinjection_sqli_state * sf, size_t offset) +{ + char ch; + const char *strend; + const char *cs = sf->s; + size_t slen = sf->slen; + size_t pos = sf->pos + offset; + + /* if we are already at end of string.. + if current char is not q or Q + if we don't have 2 more chars + if char2 != a single quote + then, just treat as word + */ + if (pos >= slen || + (cs[pos] != 'q' && cs[pos] != 'Q') || + pos + 2 >= slen || + cs[pos + 1] != '\'') { + return parse_word(sf); + } + + ch = cs[pos + 2]; + + /* the ch > 127 is un-needed since + * we assume char is signed + */ + if (ch < 33 /* || ch > 127 */) { + return parse_word(sf); + } + switch (ch) { + case '(' : ch = ')'; break; + case '[' : ch = ']'; break; + case '{' : ch = '}'; break; + case '<' : ch = '>'; break; + } + + strend = memchr2(cs + pos + 3, slen - pos - 3, ch, '\''); + if (strend == NULL) { + st_assign(sf->current, TYPE_STRING, pos + 3, slen - pos - 3, cs + pos + 3); + sf->current->str_open = 'q'; + sf->current->str_close = CHAR_NULL; + return slen; + } else { + st_assign(sf->current, TYPE_STRING, pos + 3, (size_t)(strend - cs) - pos - 3, cs + pos + 3); + sf->current->str_open = 'q'; + sf->current->str_close = 'q'; + return (size_t)(strend - cs + 2); + } +} + +/* + * Oracle's q string + */ +static size_t parse_qstring(struct libinjection_sqli_state * sf) +{ + return parse_qstring_core(sf, 0); +} + +/* + * mysql's N'STRING' or + * ... Oracle's nq string + */ +static size_t parse_nqstring(struct libinjection_sqli_state * sf) +{ + size_t slen = sf->slen; + size_t pos = sf->pos; + if (pos + 2 < slen && sf->s[pos+1] == CHAR_SINGLE) { + return parse_estring(sf); + } + return parse_qstring_core(sf, 1); +} + +/* + * binary literal string + * re: [bB]'[01]*' + */ +static size_t parse_bstring(struct libinjection_sqli_state *sf) +{ + size_t wlen; + const char *cs = sf->s; + size_t pos = sf->pos; + size_t slen = sf->slen; + + /* need at least 2 more characters + * if next char isn't a single quote, then + * continue as normal word + */ + if (pos + 2 >= slen || cs[pos+1] != '\'') { + return parse_word(sf); + } + + wlen = strlenspn(cs + pos + 2, sf->slen - pos - 2, "01"); + if (pos + 2 + wlen >= slen || cs[pos + 2 + wlen] != '\'') { + return parse_word(sf); + } + st_assign(sf->current, TYPE_NUMBER, pos, wlen + 3, cs + pos); + return pos + 2 + wlen + 1; +} + +/* + * hex literal string + * re: [xX]'[0123456789abcdefABCDEF]*' + * mysql has requirement of having EVEN number of chars, + * but pgsql does not + */ +static size_t parse_xstring(struct libinjection_sqli_state *sf) +{ + size_t wlen; + const char *cs = sf->s; + size_t pos = sf->pos; + size_t slen = sf->slen; + + /* need at least 2 more characters + * if next char isn't a single quote, then + * continue as normal word + */ + if (pos + 2 >= slen || cs[pos+1] != '\'') { + return parse_word(sf); + } + + wlen = strlenspn(cs + pos + 2, sf->slen - pos - 2, "0123456789ABCDEFabcdef"); + if (pos + 2 + wlen >= slen || cs[pos + 2 + wlen] != '\'') { + return parse_word(sf); + } + st_assign(sf->current, TYPE_NUMBER, pos, wlen + 3, cs + pos); + return pos + 2 + wlen + 1; +} + +/** + * This handles MS SQLSERVER bracket words + * http://stackoverflow.com/questions/3551284/sql-serverwhat-do-brackets-mean-around-column-name + * + */ +static size_t parse_bword(struct libinjection_sqli_state * sf) +{ + const char *cs = sf->s; + size_t pos = sf->pos; + const char* endptr = (const char*) memchr(cs + pos, ']', sf->slen - pos); + if (endptr == NULL) { + st_assign(sf->current, TYPE_BAREWORD, pos, sf->slen - pos, cs + pos); + return sf->slen; + } else { + st_assign(sf->current, TYPE_BAREWORD, pos, (size_t)(endptr - cs) - pos + 1, cs + pos); + return (size_t)((endptr - cs) + 1); + } +} + +static size_t parse_word(struct libinjection_sqli_state * sf) +{ + char ch; + char delim; + size_t i; + const char *cs = sf->s; + size_t pos = sf->pos; + size_t wlen = strlencspn(cs + pos, sf->slen - pos, + " []{}<>:\\?=@!#~+-*/&|^%(),';\t\n\v\f\r\"\240\000"); + + st_assign(sf->current, TYPE_BAREWORD, pos, wlen, cs + pos); + + /* now we need to look inside what we good for "." and "`" + * and see if what is before is a keyword or not + */ + for (i =0; i < sf->current->len; ++i) { + delim = sf->current->val[i]; + if (delim == '.' || delim == '`') { + ch = sf->lookup(sf, LOOKUP_WORD, sf->current->val, i); + if (ch != TYPE_NONE && ch != TYPE_BAREWORD) { + /* needed for swig */ + st_clear(sf->current); + /* + * we got something like "SELECT.1" + * or SELECT`column` + */ + st_assign(sf->current, ch, pos, i, cs + pos); + return pos + i; + } + } + } + + /* + * do normal lookup with word including '.' + */ + if (wlen < LIBINJECTION_SQLI_TOKEN_SIZE) { + + ch = sf->lookup(sf, LOOKUP_WORD, sf->current->val, wlen); + if (ch == CHAR_NULL) { + ch = TYPE_BAREWORD; + } + sf->current->type = ch; + } + return pos + wlen; +} + +/* MySQL backticks are a cross between string and + * and a bare word. + * + */ +static size_t parse_tick(struct libinjection_sqli_state* sf) +{ + size_t pos = parse_string_core(sf->s, sf->slen, sf->pos, sf->current, CHAR_TICK, 1); + + /* we could check to see if start and end of + * of string are both "`", i.e. make sure we have + * matching set. `foo` vs. `foo + * but I don't think it matters much + */ + + /* check value of string to see if it's a keyword, + * function, operator, etc + */ + char ch = sf->lookup(sf, LOOKUP_WORD, sf->current->val, sf->current->len); + if (ch == TYPE_FUNCTION) { + /* if it's a function, then convert token */ + sf->current->type = TYPE_FUNCTION; + } else { + /* otherwise it's a 'n' type -- mysql treats + * everything as a bare word + */ + sf->current->type = TYPE_BAREWORD; + } + return pos; +} + +static size_t parse_var(struct libinjection_sqli_state * sf) +{ + size_t xlen; + const char *cs = sf->s; + const size_t slen = sf->slen; + size_t pos = sf->pos + 1; + + /* + * var_count is only used to reconstruct + * the input. It counts the number of '@' + * seen 0 in the case of NULL, 1 or 2 + */ + + /* + * move past optional other '@' + */ + if (pos < slen && cs[pos] == '@') { + pos += 1; + sf->current->count = 2; + } else { + sf->current->count = 1; + } + + /* + * MySQL allows @@`version` + */ + if (pos < slen) { + if (cs[pos] == '`') { + sf->pos = pos; + pos = parse_tick(sf); + sf->current->type = TYPE_VARIABLE; + return pos; + } else if (cs[pos] == CHAR_SINGLE || cs[pos] == CHAR_DOUBLE) { + sf->pos = pos; + pos = parse_string(sf); + sf->current->type = TYPE_VARIABLE; + return pos; + } + } + + + xlen = strlencspn(cs + pos, slen - pos, + " <>:\\?=@!#~+-*/&|^%(),';\t\n\v\f\r'`\""); + if (xlen == 0) { + st_assign(sf->current, TYPE_VARIABLE, pos, 0, cs + pos); + return pos; + } else { + st_assign(sf->current, TYPE_VARIABLE, pos, xlen, cs + pos); + return pos + xlen; + } +} + +static size_t parse_money(struct libinjection_sqli_state *sf) +{ + size_t xlen; + const char* strend; + const char *cs = sf->s; + const size_t slen = sf->slen; + size_t pos = sf->pos; + + if (pos + 1 == slen) { + /* end of line */ + st_assign_char(sf->current, TYPE_BAREWORD, pos, 1, '$'); + return slen; + } + + /* + * $1,000.00 or $1.000,00 ok! + * This also parses $....,,,111 but that's ok + */ + + xlen = strlenspn(cs + pos + 1, slen - pos - 1, "0123456789.,"); + if (xlen == 0) { + if (cs[pos + 1] == '$') { + /* we have $$ .. find ending $$ and make string */ + strend = memchr2(cs + pos + 2, slen - pos -2, '$', '$'); + if (strend == NULL) { + /* fell off edge */ + st_assign(sf->current, TYPE_STRING, pos + 2, slen - (pos + 2), cs + pos + 2); + sf->current->str_open = '$'; + sf->current->str_close = CHAR_NULL; + return slen; + } else { + st_assign(sf->current, TYPE_STRING, pos + 2, + (size_t)(strend - (cs + pos + 2)), cs + pos + 2); + sf->current->str_open = '$'; + sf->current->str_close = '$'; + return (size_t)(strend - cs + 2); + } + } else { + /* ok it's not a number or '$$', but maybe it's pgsql "$ quoted strings" */ + xlen = strlenspn(cs + pos + 1, slen - pos - 1, "abcdefghjiklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ"); + if (xlen == 0) { + /* hmm it's "$" _something_ .. just add $ and keep going*/ + st_assign_char(sf->current, TYPE_BAREWORD, pos, 1, '$'); + return pos + 1; + } + /* we have $foobar????? */ + /* is it $foobar$ */ + if (pos + xlen + 1 == slen || cs[pos+xlen+1] != '$') { + /* not $foobar$, or fell off edge */ + st_assign_char(sf->current, TYPE_BAREWORD, pos, 1, '$'); + return pos + 1; + } + + /* we have $foobar$ ... find it again */ + strend = my_memmem(cs+xlen+2, slen - (pos+xlen+2), cs + pos, xlen+2); + + if (strend == NULL || ((size_t)(strend - cs) < (pos+xlen+2))) { + /* fell off edge */ + st_assign(sf->current, TYPE_STRING, pos+xlen+2, slen - pos - xlen - 2, cs+pos+xlen+2); + sf->current->str_open = '$'; + sf->current->str_close = CHAR_NULL; + return slen; + } else { + /* got one */ + st_assign(sf->current, TYPE_STRING, pos+xlen+2, + (size_t)(strend - (cs + pos + xlen + 2)), cs+pos+xlen+2); + sf->current->str_open = '$'; + sf->current->str_close = '$'; + return (size_t)((strend + xlen + 2) - cs); + } + } + } else if (xlen == 1 && cs[pos + 1] == '.') { + /* $. should parsed as a word */ + return parse_word(sf); + } else { + st_assign(sf->current, TYPE_NUMBER, pos, 1 + xlen, cs + pos); + return pos + 1 + xlen; + } +} + +static size_t parse_number(struct libinjection_sqli_state * sf) +{ + size_t xlen; + size_t start; + const char* digits = NULL; + const char *cs = sf->s; + const size_t slen = sf->slen; + size_t pos = sf->pos; + int have_e = 0; + int have_exp = 0; + + /* cs[pos] == '0' has 1/10 chance of being true, + * while pos+1< slen is almost always true + */ + if (cs[pos] == '0' && pos + 1 < slen) { + if (cs[pos + 1] == 'X' || cs[pos + 1] == 'x') { + digits = "0123456789ABCDEFabcdef"; + } else if (cs[pos + 1] == 'B' || cs[pos + 1] == 'b') { + digits = "01"; + } + + if (digits) { + xlen = strlenspn(cs + pos + 2, slen - pos - 2, digits); + if (xlen == 0) { + st_assign(sf->current, TYPE_BAREWORD, pos, 2, cs + pos); + return pos + 2; + } else { + st_assign(sf->current, TYPE_NUMBER, pos, 2 + xlen, cs + pos); + return pos + 2 + xlen; + } + } + } + + start = pos; + while (pos < slen && ISDIGIT(cs[pos])) { + pos += 1; + } + + if (pos < slen && cs[pos] == '.') { + pos += 1; + while (pos < slen && ISDIGIT(cs[pos])) { + pos += 1; + } + if (pos - start == 1) { + /* only one character read so far */ + st_assign_char(sf->current, TYPE_DOT, start, 1, '.'); + return pos; + } + } + + if (pos < slen) { + if (cs[pos] == 'E' || cs[pos] == 'e') { + have_e = 1; + pos += 1; + if (pos < slen && (cs[pos] == '+' || cs[pos] == '-')) { + pos += 1; + } + while (pos < slen && ISDIGIT(cs[pos])) { + have_exp = 1; + pos += 1; + } + } + } + + /* oracle's ending float or double suffix + * http://docs.oracle.com/cd/B19306_01/server.102/b14200/sql_elements003.htm#i139891 + */ + if (pos < slen && (cs[pos] == 'd' || cs[pos] == 'D' || cs[pos] == 'f' || cs[pos] == 'F')) { + if (pos + 1 == slen) { + /* line ends evaluate "... 1.2f$" as '1.2f' */ + pos += 1; + } else if ((char_is_white(cs[pos+1]) || cs[pos+1] == ';')) { + /* + * easy case, evaluate "... 1.2f ... as '1.2f' + */ + pos += 1; + } else if (cs[pos+1] == 'u' || cs[pos+1] == 'U') { + /* + * a bit of a hack but makes '1fUNION' parse as '1f UNION' + */ + pos += 1; + } else { + /* it's like "123FROM" */ + /* parse as "123" only */ + } + } + + if (have_e == 1 && have_exp == 0) { + /* very special form of + * "1234.e" + * "10.10E" + * ".E" + * this is a WORD not a number!! */ + st_assign(sf->current, TYPE_BAREWORD, start, pos - start, cs + start); + } else { + st_assign(sf->current, TYPE_NUMBER, start, pos - start, cs + start); + } + return pos; +} + +/* + * API to return version. This allows us to increment the version + * without having to regenerated the SWIG (or other binding) in minor + * releases. + */ +const char* libinjection_version() +{ + return LIBINJECTION_VERSION; +} + +int libinjection_sqli_tokenize(struct libinjection_sqli_state * sf) +{ + pt2Function fnptr; + size_t *pos = &sf->pos; + stoken_t *current = sf->current; + const char *s = sf->s; + const size_t slen = sf->slen; + + if (slen == 0) { + return FALSE; + } + + st_clear(current); + sf->current = current; + + /* + * if we are at beginning of string + * and in single-quote or double quote mode + * then pretend the input starts with a quote + */ + if (*pos == 0 && (sf->flags & (FLAG_QUOTE_SINGLE | FLAG_QUOTE_DOUBLE))) { + *pos = parse_string_core(s, slen, 0, current, flag2delim(sf->flags), 0); + sf->stats_tokens += 1; + return TRUE; + } + + while (*pos < slen) { + + /* + * get current character + */ + const unsigned char ch = (unsigned char) (s[*pos]); + + /* + * look up the parser, and call it + * + * Porting Note: this is mapping of char to function + * charparsers[ch]() + */ + fnptr = char_parse_map[ch]; + + *pos = (*fnptr) (sf); + + /* + * + */ + if (current->type != CHAR_NULL) { + sf->stats_tokens += 1; + return TRUE; + } + } + return FALSE; +} + +void libinjection_sqli_init(struct libinjection_sqli_state * sf, const char *s, size_t len, int flags) +{ + if (flags == 0) { + flags = FLAG_QUOTE_NONE | FLAG_SQL_ANSI; + } + + memset(sf, 0, sizeof(struct libinjection_sqli_state)); + sf->s = s; + sf->slen = len; + sf->lookup = libinjection_sqli_lookup_word; + sf->userdata = 0; + sf->flags = flags; + sf->current = &(sf->tokenvec[0]); +} + +void libinjection_sqli_reset(struct libinjection_sqli_state * sf, int flags) +{ + void *userdata = sf->userdata; + ptr_lookup_fn lookup = sf->lookup;; + + if (flags == 0) { + flags = FLAG_QUOTE_NONE | FLAG_SQL_ANSI; + } + libinjection_sqli_init(sf, sf->s, sf->slen, flags); + sf->lookup = lookup; + sf->userdata = userdata; +} + +void libinjection_sqli_callback(struct libinjection_sqli_state * sf, ptr_lookup_fn fn, void* userdata) +{ + if (fn == NULL) { + sf->lookup = libinjection_sqli_lookup_word; + sf->userdata = (void*)(NULL); + } else { + sf->lookup = fn; + sf->userdata = userdata; + } +} + +/** See if two tokens can be merged since they are compound SQL phrases. + * + * This takes two tokens, and, if they are the right type, + * merges their values together. Then checks to see if the + * new value is special using the PHRASES mapping. + * + * Example: "UNION" + "ALL" ==> "UNION ALL" + * + * C Security Notes: this is safe to use C-strings (null-terminated) + * since the types involved by definition do not have embedded nulls + * (e.g. there is no keyword with embedded null) + * + * Porting Notes: since this is C, it's oddly complicated. + * This is just: multikeywords[token.value + ' ' + token2.value] + * + */ +static int syntax_merge_words(struct libinjection_sqli_state * sf,stoken_t * a, stoken_t * b) +{ + size_t sz1; + size_t sz2; + size_t sz3; + char tmp[LIBINJECTION_SQLI_TOKEN_SIZE]; + char ch; + + /* first token is of right type? */ + if (! + (a->type == TYPE_KEYWORD || + a->type == TYPE_BAREWORD || + a->type == TYPE_OPERATOR || + a->type == TYPE_UNION || + a->type == TYPE_FUNCTION || + a->type == TYPE_EXPRESSION || + a->type == TYPE_TSQL || + a->type == TYPE_SQLTYPE)) { + return FALSE; + } + + if (! + (b->type == TYPE_KEYWORD || + b->type == TYPE_BAREWORD || + b->type == TYPE_OPERATOR || + b->type == TYPE_UNION || + b->type == TYPE_FUNCTION || + b->type == TYPE_EXPRESSION || + b->type == TYPE_TSQL || + b->type == TYPE_SQLTYPE || + b->type == TYPE_LOGIC_OPERATOR)) { + return FALSE; + } + + sz1 = a->len; + sz2 = b->len; + sz3 = sz1 + sz2 + 1; /* +1 for space in the middle */ + if (sz3 >= LIBINJECTION_SQLI_TOKEN_SIZE) { /* make sure there is room for ending null */ + return FALSE; + } + /* + * oddly annoying last.val + ' ' + current.val + */ + memcpy(tmp, a->val, sz1); + tmp[sz1] = ' '; + memcpy(tmp + sz1 + 1, b->val, sz2); + tmp[sz3] = CHAR_NULL; + ch = sf->lookup(sf, LOOKUP_WORD, tmp, sz3); + + if (ch != CHAR_NULL) { + st_assign(a, ch, a->pos, sz3, tmp); + return TRUE; + } else { + return FALSE; + } +} + +int libinjection_sqli_fold(struct libinjection_sqli_state * sf) +{ + stoken_t last_comment; + + /* POS is the position of where the NEXT token goes */ + size_t pos = 0; + + /* LEFT is a count of how many tokens that are already + folded or processed (i.e. part of the fingerprint) */ + size_t left = 0; + + int more = 1; + + st_clear(&last_comment); + + /* Skip all initial comments, right-parens ( and unary operators + * + */ + sf->current = &(sf->tokenvec[0]); + while (more) { + more = libinjection_sqli_tokenize(sf); + if ( ! (sf->current->type == TYPE_COMMENT || + sf->current->type == TYPE_LEFTPARENS || + sf->current->type == TYPE_SQLTYPE || + st_is_unary_op(sf->current))) { + break; + } + } + + if (! more) { + /* If input was only comments, unary or (, then exit */ + return 0; + } else { + /* it's some other token */ + pos += 1; + } + + while (1) { + FOLD_DEBUG; + + /* do we have all the max number of tokens? if so do + * some special cases for 5 tokens + */ + if (pos >= LIBINJECTION_SQLI_MAX_TOKENS) { + if ( + ( + sf->tokenvec[0].type == TYPE_NUMBER && + (sf->tokenvec[1].type == TYPE_OPERATOR || sf->tokenvec[1].type == TYPE_COMMA) && + sf->tokenvec[2].type == TYPE_LEFTPARENS && + sf->tokenvec[3].type == TYPE_NUMBER && + sf->tokenvec[4].type == TYPE_RIGHTPARENS + ) || + ( + sf->tokenvec[0].type == TYPE_BAREWORD && + sf->tokenvec[1].type == TYPE_OPERATOR && + sf->tokenvec[2].type == TYPE_LEFTPARENS && + (sf->tokenvec[3].type == TYPE_BAREWORD || sf->tokenvec[3].type == TYPE_NUMBER) && + sf->tokenvec[4].type == TYPE_RIGHTPARENS + ) || + ( + sf->tokenvec[0].type == TYPE_NUMBER && + sf->tokenvec[1].type == TYPE_RIGHTPARENS && + sf->tokenvec[2].type == TYPE_COMMA && + sf->tokenvec[3].type == TYPE_LEFTPARENS && + sf->tokenvec[4].type == TYPE_NUMBER + ) || + ( + sf->tokenvec[0].type == TYPE_BAREWORD && + sf->tokenvec[1].type == TYPE_RIGHTPARENS && + sf->tokenvec[2].type == TYPE_OPERATOR && + sf->tokenvec[3].type == TYPE_LEFTPARENS && + sf->tokenvec[4].type == TYPE_BAREWORD + ) + ) + { + if (pos > LIBINJECTION_SQLI_MAX_TOKENS) { + st_copy(&(sf->tokenvec[1]), &(sf->tokenvec[LIBINJECTION_SQLI_MAX_TOKENS])); + pos = 2; + left = 0; + } else { + pos = 1; + left = 0; + } + } + } + + if (! more || left >= LIBINJECTION_SQLI_MAX_TOKENS) { + left = pos; + break; + } + + /* get up to two tokens */ + while (more && pos <= LIBINJECTION_SQLI_MAX_TOKENS && (pos - left) < 2) { + sf->current = &(sf->tokenvec[pos]); + more = libinjection_sqli_tokenize(sf); + if (more) { + if (sf->current->type == TYPE_COMMENT) { + st_copy(&last_comment, sf->current); + } else { + last_comment.type = CHAR_NULL; + pos += 1; + } + } + } + FOLD_DEBUG; + /* did we get 2 tokens? if not then we are done */ + if (pos - left < 2) { + left = pos; + continue; + } + + /* FOLD: "ss" -> "s" + * "foo" "bar" is valid SQL + * just ignore second string + */ + if (sf->tokenvec[left].type == TYPE_STRING && sf->tokenvec[left+1].type == TYPE_STRING) { + pos -= 1; + sf->stats_folds += 1; + continue; + } else if (sf->tokenvec[left].type == TYPE_SEMICOLON && sf->tokenvec[left+1].type == TYPE_SEMICOLON) { + /* not sure how various engines handle + * 'select 1;;drop table foo' or + * 'select 1; /x foo x/; drop table foo' + * to prevent surprises, just fold away repeated semicolons + */ + pos -= 1; + sf->stats_folds += 1; + continue; + } else if ((sf->tokenvec[left].type == TYPE_OPERATOR || + sf->tokenvec[left].type == TYPE_LOGIC_OPERATOR) && + (st_is_unary_op(&sf->tokenvec[left+1]) || + sf->tokenvec[left+1].type == TYPE_SQLTYPE)) { + pos -= 1; + sf->stats_folds += 1; + left = 0; + continue; + } else if (sf->tokenvec[left].type == TYPE_LEFTPARENS && + st_is_unary_op(&sf->tokenvec[left+1])) { + pos -= 1; + sf->stats_folds += 1; + if (left > 0) { + left -= 1; + } + continue; + } else if (syntax_merge_words(sf, &sf->tokenvec[left], &sf->tokenvec[left+1])) { + pos -= 1; + sf->stats_folds += 1; + if (left > 0) { + left -= 1; + } + continue; + } else if (sf->tokenvec[left].type == TYPE_SEMICOLON && + sf->tokenvec[left+1].type == TYPE_FUNCTION && + (sf->tokenvec[left+1].val[0] == 'I' || + sf->tokenvec[left+1].val[0] == 'i' ) && + (sf->tokenvec[left+1].val[1] == 'F' || + sf->tokenvec[left+1].val[1] == 'f' )) { + /* IF is normally a function, except in Transact-SQL where it can be used as a + * standalone control flow operator, e.g. ; IF 1=1 ... + * if found after a semicolon, convert from 'f' type to 'T' type + */ + sf->tokenvec[left+1].type = TYPE_TSQL; + /* left += 2; */ + continue; /* reparse everything, but we probably can advance left, and pos */ + } else if ((sf->tokenvec[left].type == TYPE_BAREWORD || sf->tokenvec[left].type == TYPE_VARIABLE) && + sf->tokenvec[left+1].type == TYPE_LEFTPARENS && ( + /* TSQL functions but common enough to be column names */ + cstrcasecmp("USER_ID", sf->tokenvec[left].val, sf->tokenvec[left].len) == 0 || + cstrcasecmp("USER_NAME", sf->tokenvec[left].val, sf->tokenvec[left].len) == 0 || + + /* Function in MYSQL */ + cstrcasecmp("DATABASE", sf->tokenvec[left].val, sf->tokenvec[left].len) == 0 || + cstrcasecmp("PASSWORD", sf->tokenvec[left].val, sf->tokenvec[left].len) == 0 || + cstrcasecmp("USER", sf->tokenvec[left].val, sf->tokenvec[left].len) == 0 || + + /* Mysql words that act as a variable and are a function */ + + /* TSQL current_users is fake-variable */ + /* http://msdn.microsoft.com/en-us/library/ms176050.aspx */ + cstrcasecmp("CURRENT_USER", sf->tokenvec[left].val, sf->tokenvec[left].len) == 0 || + cstrcasecmp("CURRENT_DATE", sf->tokenvec[left].val, sf->tokenvec[left].len) == 0 || + cstrcasecmp("CURRENT_TIME", sf->tokenvec[left].val, sf->tokenvec[left].len) == 0 || + cstrcasecmp("CURRENT_TIMESTAMP", sf->tokenvec[left].val, sf->tokenvec[left].len) == 0 || + cstrcasecmp("LOCALTIME", sf->tokenvec[left].val, sf->tokenvec[left].len) == 0 || + cstrcasecmp("LOCALTIMESTAMP", sf->tokenvec[left].val, sf->tokenvec[left].len) == 0 + )) { + + /* pos is the same + * other conversions need to go here... for instance + * password CAN be a function, coalesce CAN be a function + */ + sf->tokenvec[left].type = TYPE_FUNCTION; + continue; + } else if (sf->tokenvec[left].type == TYPE_KEYWORD && ( + cstrcasecmp("IN", sf->tokenvec[left].val, sf->tokenvec[left].len) == 0 || + cstrcasecmp("NOT IN", sf->tokenvec[left].val, sf->tokenvec[left].len) == 0 + )) { + + if (sf->tokenvec[left+1].type == TYPE_LEFTPARENS) { + /* got .... IN ( ... (or 'NOT IN') + * it's an operator + */ + sf->tokenvec[left].type = TYPE_OPERATOR; + } else { + /* + * it's a nothing + */ + sf->tokenvec[left].type = TYPE_BAREWORD; + } + + /* "IN" can be used as "IN BOOLEAN MODE" for mysql + * in which case merging of words can be done later + * other wise it acts as an equality operator __ IN (values..) + * + * here we got "IN" "(" so it's an operator. + * also back track to handle "NOT IN" + * might need to do the same with like + * two use cases "foo" LIKE "BAR" (normal operator) + * "foo" = LIKE(1,2) + */ + continue; + } else if ((sf->tokenvec[left].type == TYPE_OPERATOR) && ( + cstrcasecmp("LIKE", sf->tokenvec[left].val, sf->tokenvec[left].len) == 0 || + cstrcasecmp("NOT LIKE", sf->tokenvec[left].val, sf->tokenvec[left].len) == 0)) { + if (sf->tokenvec[left+1].type == TYPE_LEFTPARENS) { + /* SELECT LIKE(... + * it's a function + */ + sf->tokenvec[left].type = TYPE_FUNCTION; + } + } else if (sf->tokenvec[left].type == TYPE_SQLTYPE && + (sf->tokenvec[left+1].type == TYPE_BAREWORD || + sf->tokenvec[left+1].type == TYPE_NUMBER || + sf->tokenvec[left+1].type == TYPE_SQLTYPE || + sf->tokenvec[left+1].type == TYPE_LEFTPARENS || + sf->tokenvec[left+1].type == TYPE_FUNCTION || + sf->tokenvec[left+1].type == TYPE_VARIABLE || + sf->tokenvec[left+1].type == TYPE_STRING)) { + st_copy(&sf->tokenvec[left], &sf->tokenvec[left+1]); + pos -= 1; + sf->stats_folds += 1; + left = 0; + continue; + } else if (sf->tokenvec[left].type == TYPE_COLLATE && + sf->tokenvec[left+1].type == TYPE_BAREWORD) { + /* + * there are too many collation types.. so if the bareword has a "_" + * then it's TYPE_SQLTYPE + */ + if (strchr(sf->tokenvec[left+1].val, '_') != NULL) { + sf->tokenvec[left+1].type = TYPE_SQLTYPE; + left = 0; + } + } else if (sf->tokenvec[left].type == TYPE_BACKSLASH) { + if (st_is_arithmetic_op(&(sf->tokenvec[left+1]))) { + /* very weird case in TSQL where '\%1' is parsed as '0 % 1', etc */ + sf->tokenvec[left].type = TYPE_NUMBER; + } else { + /* just ignore it.. Again T-SQL seems to parse \1 as "1" */ + st_copy(&sf->tokenvec[left], &sf->tokenvec[left+1]); + pos -= 1; + sf->stats_folds += 1; + } + left = 0; + continue; + } else if (sf->tokenvec[left].type == TYPE_LEFTPARENS && + sf->tokenvec[left+1].type == TYPE_LEFTPARENS) { + pos -= 1; + left = 0; + sf->stats_folds += 1; + continue; + } else if (sf->tokenvec[left].type == TYPE_RIGHTPARENS && + sf->tokenvec[left+1].type == TYPE_RIGHTPARENS) { + pos -= 1; + left = 0; + sf->stats_folds += 1; + continue; + } else if (sf->tokenvec[left].type == TYPE_LEFTBRACE && + sf->tokenvec[left+1].type == TYPE_BAREWORD) { + + /* + * MySQL Degenerate case -- + * + * select { ``.``.id }; -- valid !!! + * select { ``.``.``.id }; -- invalid + * select ``.``.id; -- invalid + * select { ``.id }; -- invalid + * + * so it appears {``.``.id} is a magic case + * I suspect this is "current database, current table, field id" + * + * The folding code can't look at more than 3 tokens, and + * I don't want to make two passes. + * + * Since "{ ``" so rare, we are just going to blacklist it. + * + * Highly likely this will need revisiting! + * + * CREDIT @rsalgado 2013-11-25 + */ + if (sf->tokenvec[left+1].len == 0) { + sf->tokenvec[left+1].type = TYPE_EVIL; + return (int)(left+2); + } + /* weird ODBC / MYSQL {foo expr} --> expr + * but for this rule we just strip away the "{ foo" part + */ + left = 0; + pos -= 2; + sf->stats_folds += 2; + continue; + } else if (sf->tokenvec[left+1].type == TYPE_RIGHTBRACE) { + pos -= 1; + left = 0; + sf->stats_folds += 1; + continue; + } + + /* all cases of handing 2 tokens is done + and nothing matched. Get one more token + */ + FOLD_DEBUG; + while (more && pos <= LIBINJECTION_SQLI_MAX_TOKENS && pos - left < 3) { + sf->current = &(sf->tokenvec[pos]); + more = libinjection_sqli_tokenize(sf); + if (more) { + if (sf->current->type == TYPE_COMMENT) { + st_copy(&last_comment, sf->current); + } else { + last_comment.type = CHAR_NULL; + pos += 1; + } + } + } + + /* do we have three tokens? If not then we are done */ + if (pos -left < 3) { + left = pos; + continue; + } + + /* + * now look for three token folding + */ + if (sf->tokenvec[left].type == TYPE_NUMBER && + sf->tokenvec[left+1].type == TYPE_OPERATOR && + sf->tokenvec[left+2].type == TYPE_NUMBER) { + pos -= 2; + left = 0; + continue; + } else if (sf->tokenvec[left].type == TYPE_OPERATOR && + sf->tokenvec[left+1].type != TYPE_LEFTPARENS && + sf->tokenvec[left+2].type == TYPE_OPERATOR) { + left = 0; + pos -= 2; + continue; + } else if (sf->tokenvec[left].type == TYPE_LOGIC_OPERATOR && + sf->tokenvec[left+2].type == TYPE_LOGIC_OPERATOR) { + pos -= 2; + left = 0; + continue; + } else if (sf->tokenvec[left].type == TYPE_VARIABLE && + sf->tokenvec[left+1].type == TYPE_OPERATOR && + (sf->tokenvec[left+2].type == TYPE_VARIABLE || + sf->tokenvec[left+2].type == TYPE_NUMBER || + sf->tokenvec[left+2].type == TYPE_BAREWORD)) { + pos -= 2; + left = 0; + continue; + } else if ((sf->tokenvec[left].type == TYPE_BAREWORD || + sf->tokenvec[left].type == TYPE_NUMBER ) && + sf->tokenvec[left+1].type == TYPE_OPERATOR && + (sf->tokenvec[left+2].type == TYPE_NUMBER || + sf->tokenvec[left+2].type == TYPE_BAREWORD)) { + pos -= 2; + left = 0; + continue; + } else if ((sf->tokenvec[left].type == TYPE_BAREWORD || + sf->tokenvec[left].type == TYPE_NUMBER || + sf->tokenvec[left].type == TYPE_VARIABLE || + sf->tokenvec[left].type == TYPE_STRING) && + sf->tokenvec[left+1].type == TYPE_OPERATOR && + streq(sf->tokenvec[left+1].val, "::") && + sf->tokenvec[left+2].type == TYPE_SQLTYPE) { + pos -= 2; + left = 0; + sf->stats_folds += 2; + continue; + } else if ((sf->tokenvec[left].type == TYPE_BAREWORD || + sf->tokenvec[left].type == TYPE_NUMBER || + sf->tokenvec[left].type == TYPE_STRING || + sf->tokenvec[left].type == TYPE_VARIABLE) && + sf->tokenvec[left+1].type == TYPE_COMMA && + (sf->tokenvec[left+2].type == TYPE_NUMBER || + sf->tokenvec[left+2].type == TYPE_BAREWORD || + sf->tokenvec[left+2].type == TYPE_STRING || + sf->tokenvec[left+2].type == TYPE_VARIABLE)) { + pos -= 2; + left = 0; + continue; + } else if ((sf->tokenvec[left].type == TYPE_EXPRESSION || + sf->tokenvec[left].type == TYPE_GROUP || + sf->tokenvec[left].type == TYPE_COMMA) && + st_is_unary_op(&sf->tokenvec[left+1]) && + sf->tokenvec[left+2].type == TYPE_LEFTPARENS) { + /* got something like SELECT + (, LIMIT + ( + * remove unary operator + */ + st_copy(&sf->tokenvec[left+1], &sf->tokenvec[left+2]); + pos -= 1; + left = 0; + continue; + } else if ((sf->tokenvec[left].type == TYPE_KEYWORD || + sf->tokenvec[left].type == TYPE_EXPRESSION || + sf->tokenvec[left].type == TYPE_GROUP ) && + st_is_unary_op(&sf->tokenvec[left+1]) && + (sf->tokenvec[left+2].type == TYPE_NUMBER || + sf->tokenvec[left+2].type == TYPE_BAREWORD || + sf->tokenvec[left+2].type == TYPE_VARIABLE || + sf->tokenvec[left+2].type == TYPE_STRING || + sf->tokenvec[left+2].type == TYPE_FUNCTION )) { + /* remove unary operators + * select - 1 + */ + st_copy(&sf->tokenvec[left+1], &sf->tokenvec[left+2]); + pos -= 1; + left = 0; + continue; + } else if (sf->tokenvec[left].type == TYPE_COMMA && + st_is_unary_op(&sf->tokenvec[left+1]) && + (sf->tokenvec[left+2].type == TYPE_NUMBER || + sf->tokenvec[left+2].type == TYPE_BAREWORD || + sf->tokenvec[left+2].type == TYPE_VARIABLE || + sf->tokenvec[left+2].type == TYPE_STRING)) { + /* + * interesting case turn ", -1" ->> ",1" PLUS we need to back up + * one token if possible to see if more folding can be done + * "1,-1" --> "1" + */ + st_copy(&sf->tokenvec[left+1], &sf->tokenvec[left+2]); + left = 0; + /* pos is >= 3 so this is safe */ + assert(pos >= 3); + pos -= 3; + continue; + } else if (sf->tokenvec[left].type == TYPE_COMMA && + st_is_unary_op(&sf->tokenvec[left+1]) && + sf->tokenvec[left+2].type == TYPE_FUNCTION) { + + /* Separate case from above since you end up with + * 1,-sin(1) --> 1 (1) + * Here, just do + * 1,-sin(1) --> 1,sin(1) + * just remove unary operator + */ + st_copy(&sf->tokenvec[left+1], &sf->tokenvec[left+2]); + pos -= 1; + left = 0; + continue; + } else if ((sf->tokenvec[left].type == TYPE_BAREWORD) && + (sf->tokenvec[left+1].type == TYPE_DOT) && + (sf->tokenvec[left+2].type == TYPE_BAREWORD)) { + /* ignore the '.n' + * typically is this databasename.table + */ + assert(pos >= 3); + pos -= 2; + left = 0; + continue; + } else if ((sf->tokenvec[left].type == TYPE_EXPRESSION) && + (sf->tokenvec[left+1].type == TYPE_DOT) && + (sf->tokenvec[left+2].type == TYPE_BAREWORD)) { + /* select . `foo` --> select `foo` */ + st_copy(&sf->tokenvec[left+1], &sf->tokenvec[left+2]); + pos -= 1; + left = 0; + continue; + } else if ((sf->tokenvec[left].type == TYPE_FUNCTION) && + (sf->tokenvec[left+1].type == TYPE_LEFTPARENS) && + (sf->tokenvec[left+2].type != TYPE_RIGHTPARENS)) { + /* + * whats going on here + * Some SQL functions like USER() have 0 args + * if we get User(foo), then User is not a function + * This should be expanded since it eliminated a lot of false + * positives. + */ + if (cstrcasecmp("USER", sf->tokenvec[left].val, sf->tokenvec[left].len) == 0) { + sf->tokenvec[left].type = TYPE_BAREWORD; + } + } + + /* no folding -- assume left-most token is + is good, now use the existing 2 tokens -- + do not get another + */ + + left += 1; + + } /* while(1) */ + + /* if we have 4 or less tokens, and we had a comment token + * at the end, add it back + */ + + if (left < LIBINJECTION_SQLI_MAX_TOKENS && last_comment.type == TYPE_COMMENT) { + st_copy(&sf->tokenvec[left], &last_comment); + left += 1; + } + + /* sometimes we grab a 6th token to help + determine the type of token 5. + */ + if (left > LIBINJECTION_SQLI_MAX_TOKENS) { + left = LIBINJECTION_SQLI_MAX_TOKENS; + } + + return (int)left; +} + +/* secondary api: detects SQLi in a string, GIVEN a context. + * + * A context can be: + * * CHAR_NULL (\0), process as is + * * CHAR_SINGLE ('), process pretending input started with a + * single quote. + * * CHAR_DOUBLE ("), process pretending input started with a + * double quote. + * + */ +const char* libinjection_sqli_fingerprint(struct libinjection_sqli_state * sql_state, int flags) +{ + int i; + int tlen = 0; + + libinjection_sqli_reset(sql_state, flags); + + tlen = libinjection_sqli_fold(sql_state); + + /* Check for magic PHP backquote comment + * If: + * * last token is of type "bareword" + * * And is quoted in a backtick + * * And isn't closed + * * And it's empty? + * Then convert it to comment + */ + if (tlen > 2 && + sql_state->tokenvec[tlen-1].type == TYPE_BAREWORD && + sql_state->tokenvec[tlen-1].str_open == CHAR_TICK && + sql_state->tokenvec[tlen-1].len == 0 && + sql_state->tokenvec[tlen-1].str_close == CHAR_NULL) { + sql_state->tokenvec[tlen-1].type = TYPE_COMMENT; + } + + for (i = 0; i < tlen; ++i) { + sql_state->fingerprint[i] = sql_state->tokenvec[i].type; + } + + /* + * make the fingerprint pattern a c-string (null delimited) + */ + sql_state->fingerprint[tlen] = CHAR_NULL; + + /* + * check for 'X' in pattern, and then + * clear out all tokens + * + * this means parsing could not be done + * accurately due to pgsql's double comments + * or other syntax that isn't consistent. + * Should be very rare false positive + */ + if (strchr(sql_state->fingerprint, TYPE_EVIL)) { + /* needed for SWIG */ + memset((void*)sql_state->fingerprint, 0, LIBINJECTION_SQLI_MAX_TOKENS + 1); + memset((void*)sql_state->tokenvec[0].val, 0, LIBINJECTION_SQLI_TOKEN_SIZE); + + sql_state->fingerprint[0] = TYPE_EVIL; + + sql_state->tokenvec[0].type = TYPE_EVIL; + sql_state->tokenvec[0].val[0] = TYPE_EVIL; + sql_state->tokenvec[1].type = CHAR_NULL; + } + + + return sql_state->fingerprint; +} + +int libinjection_sqli_check_fingerprint(struct libinjection_sqli_state* sql_state) +{ + return libinjection_sqli_blacklist(sql_state) && + libinjection_sqli_not_whitelist(sql_state); +} + +char libinjection_sqli_lookup_word(struct libinjection_sqli_state *sql_state, int lookup_type, + const char* str, size_t len) +{ + if (lookup_type == LOOKUP_FINGERPRINT) { + return libinjection_sqli_check_fingerprint(sql_state) ? 'X' : '\0'; + } else { + return bsearch_keyword_type(str, len, sql_keywords, sql_keywords_sz); + } +} + +int libinjection_sqli_blacklist(struct libinjection_sqli_state* sql_state) +{ + /* + * use minimum of 8 bytes to make sure gcc -fstack-protector + * works correctly + */ + char fp2[8]; + char ch; + size_t i; + size_t len = strlen(sql_state->fingerprint); + int patmatch; + + if (len < 1) { + sql_state->reason = __LINE__; + return FALSE; + } + + /* + to keep everything compatible, convert the + v0 fingerprint pattern to v1 + v0: up to 5 chars, mixed case + v1: 1 char is '0', up to 5 more chars, upper case + */ + + fp2[0] = '0'; + for (i = 0; i < len; ++i) { + ch = sql_state->fingerprint[i]; + if (ch >= 'a' && ch <= 'z') { + ch -= 0x20; + } + fp2[i+1] = ch; + } + fp2[i+1] = '\0'; + + patmatch = is_keyword(fp2, len + 1) == TYPE_FINGERPRINT; + + /* + * No match. + * + * Set sql_state->reason to current line number + * only for debugging purposes. + */ + if (!patmatch) { + sql_state->reason = __LINE__; + return FALSE; + } + + return TRUE; +} + +/* + * return TRUE if SQLi, false is benign + */ +int libinjection_sqli_not_whitelist(struct libinjection_sqli_state* sql_state) +{ + /* + * We assume we got a SQLi match + * This next part just helps reduce false positives. + * + */ + char ch; + size_t tlen = strlen(sql_state->fingerprint); + + if (tlen > 1 && sql_state->fingerprint[tlen-1] == TYPE_COMMENT) { + /* + * if ending comment is contains 'sp_password' then it's SQLi! + * MS Audit log apparently ignores anything with + * 'sp_password' in it. Unable to find primary reference to + * this "feature" of SQL Server but seems to be known SQLi + * technique + */ + if (my_memmem(sql_state->s, sql_state->slen, + "sp_password", strlen("sp_password"))) { + sql_state->reason = __LINE__; + return TRUE; + } + } + + switch (tlen) { + case 2:{ + /* + * case 2 are "very small SQLi" which make them + * hard to tell from normal input... + */ + + if (sql_state->fingerprint[1] == TYPE_UNION) { + if (sql_state->stats_tokens == 2) { + /* not sure why but 1U comes up in SQLi attack + * likely part of parameter splitting/etc. + * lots of reasons why "1 union" might be normal + * input, so beep only if other SQLi things are present + */ + /* it really is a number and 'union' + * other wise it has folding or comments + */ + sql_state->reason = __LINE__; + return FALSE; + } else { + sql_state->reason = __LINE__; + return TRUE; + } + } + /* + * if 'comment' is '#' ignore.. too many FP + */ + if (sql_state->tokenvec[1].val[0] == '#') { + sql_state->reason = __LINE__; + return FALSE; + } + + /* + * for fingerprint like 'nc', only comments of /x are treated + * as SQL... ending comments of "--" and "#" are not SQLi + */ + if (sql_state->tokenvec[0].type == TYPE_BAREWORD && + sql_state->tokenvec[1].type == TYPE_COMMENT && + sql_state->tokenvec[1].val[0] != '/') { + sql_state->reason = __LINE__; + return FALSE; + } + + /* + * if '1c' ends with '/x' then it's SQLi + */ + if (sql_state->tokenvec[0].type == TYPE_NUMBER && + sql_state->tokenvec[1].type == TYPE_COMMENT && + sql_state->tokenvec[1].val[0] == '/') { + return TRUE; + } + + /** + * there are some odd base64-looking query string values + * 1234-ABCDEFEhfhihwuefi-- + * which evaluate to "1c"... these are not SQLi + * but 1234-- probably is. + * Make sure the "1" in "1c" is actually a true decimal number + * + * Need to check -original- string since the folding step + * may have merged tokens, e.g. "1+FOO" is folded into "1" + * + * Note: evasion: 1*1-- + */ + if (sql_state->tokenvec[0].type == TYPE_NUMBER && + sql_state->tokenvec[1].type == TYPE_COMMENT) { + if (sql_state->stats_tokens > 2) { + /* we have some folding going on, highly likely SQLi */ + sql_state->reason = __LINE__; + return TRUE; + } + /* + * we check that next character after the number is either whitespace, + * or '/' or a '-' ==> SQLi. + */ + ch = sql_state->s[sql_state->tokenvec[0].len]; + if ( ch <= 32 ) { + /* next char was whitespace,e.g. "1234 --" + * this isn't exactly correct.. ideally we should skip over all whitespace + * but this seems to be ok for now + */ + return TRUE; + } + if (ch == '/' && sql_state->s[sql_state->tokenvec[0].len + 1] == '*') { + return TRUE; + } + if (ch == '-' && sql_state->s[sql_state->tokenvec[0].len + 1] == '-') { + return TRUE; + } + + sql_state->reason = __LINE__; + return FALSE; + } + + /* + * detect obvious SQLi scans.. many people put '--' in plain text + * so only detect if input ends with '--', e.g. 1-- but not 1-- foo + */ + if ((sql_state->tokenvec[1].len > 2) + && sql_state->tokenvec[1].val[0] == '-') { + sql_state->reason = __LINE__; + return FALSE; + } + + break; + } /* case 2 */ + case 3:{ + /* + * ...foo' + 'bar... + * no opening quote, no closing quote + * and each string has data + */ + + if (streq(sql_state->fingerprint, "sos") + || streq(sql_state->fingerprint, "s&s")) { + + if ((sql_state->tokenvec[0].str_open == CHAR_NULL) + && (sql_state->tokenvec[2].str_close == CHAR_NULL) + && (sql_state->tokenvec[0].str_close == sql_state->tokenvec[2].str_open)) { + /* + * if ....foo" + "bar.... + */ + sql_state->reason = __LINE__; + return TRUE; + } + if (sql_state->stats_tokens == 3) { + sql_state->reason = __LINE__; + return FALSE; + } + + /* + * not SQLi + */ + sql_state->reason = __LINE__; + return FALSE; + } else if (streq(sql_state->fingerprint, "s&n") || + streq(sql_state->fingerprint, "n&1") || + streq(sql_state->fingerprint, "1&1") || + streq(sql_state->fingerprint, "1&v") || + streq(sql_state->fingerprint, "1&s")) { + /* 'sexy and 17' not SQLi + * 'sexy and 17<18' SQLi + */ + if (sql_state->stats_tokens == 3) { + sql_state->reason = __LINE__; + return FALSE; + } + } else if (sql_state->tokenvec[1].type == TYPE_KEYWORD) { + if ((sql_state->tokenvec[1].len < 5) || + cstrcasecmp("INTO", sql_state->tokenvec[1].val, 4)) { + /* if it's not "INTO OUTFILE", or "INTO DUMPFILE" (MySQL) + * then treat as safe + */ + sql_state->reason = __LINE__; + return FALSE; + } + } + break; + } /* case 3 */ + case 4: + case 5: { + /* nothing right now */ + break; + } /* case 5 */ + } /* end switch */ + + return TRUE; +} + +/** Main API, detects SQLi in an input. + * + * + */ +static int reparse_as_mysql(struct libinjection_sqli_state * sql_state) +{ + return sql_state->stats_comment_ddx || + sql_state->stats_comment_hash; +} + +/* + * This function is mostly use with SWIG + */ +struct libinjection_sqli_token* +libinjection_sqli_get_token(struct libinjection_sqli_state * sql_state, int i) +{ + if (i < 0 || i > (int)LIBINJECTION_SQLI_MAX_TOKENS) { + return NULL; + } + return &(sql_state->tokenvec[i]); +} + +int libinjection_is_sqli(struct libinjection_sqli_state * sql_state) +{ + const char *s = sql_state->s; + size_t slen = sql_state->slen; + + /* + * no input? not SQLi + */ + if (slen == 0) { + return FALSE; + } + + /* + * test input "as-is" + */ + libinjection_sqli_fingerprint(sql_state, FLAG_QUOTE_NONE | FLAG_SQL_ANSI); + if (sql_state->lookup(sql_state, LOOKUP_FINGERPRINT, + sql_state->fingerprint, strlen(sql_state->fingerprint))) { + return TRUE; + } else if (reparse_as_mysql(sql_state)) { + libinjection_sqli_fingerprint(sql_state, FLAG_QUOTE_NONE | FLAG_SQL_MYSQL); + if (sql_state->lookup(sql_state, LOOKUP_FINGERPRINT, + sql_state->fingerprint, strlen(sql_state->fingerprint))) { + return TRUE; + } + } + + /* + * if input has a single_quote, then + * test as if input was actually ' + * example: if input if "1' = 1", then pretend it's + * "'1' = 1" + * Porting Notes: example the same as doing + * is_string_sqli(sql_state, "'" + s, slen+1, NULL, fn, arg) + * + */ + if (memchr(s, CHAR_SINGLE, slen)) { + libinjection_sqli_fingerprint(sql_state, FLAG_QUOTE_SINGLE | FLAG_SQL_ANSI); + if (sql_state->lookup(sql_state, LOOKUP_FINGERPRINT, + sql_state->fingerprint, strlen(sql_state->fingerprint))) { + return TRUE; + } else if (reparse_as_mysql(sql_state)) { + libinjection_sqli_fingerprint(sql_state, FLAG_QUOTE_SINGLE | FLAG_SQL_MYSQL); + if (sql_state->lookup(sql_state, LOOKUP_FINGERPRINT, + sql_state->fingerprint, strlen(sql_state->fingerprint))) { + return TRUE; + } + } + } + + /* + * same as above but with a double-quote " + */ + if (memchr(s, CHAR_DOUBLE, slen)) { + libinjection_sqli_fingerprint(sql_state, FLAG_QUOTE_DOUBLE | FLAG_SQL_MYSQL); + if (sql_state->lookup(sql_state, LOOKUP_FINGERPRINT, + sql_state->fingerprint, strlen(sql_state->fingerprint))) { + return TRUE; + } + } + + /* + * Hurray, input is not SQLi + */ + return FALSE; +} + +int libinjection_sqli(const char* input, size_t slen, char fingerprint[]) +{ + int issqli; + struct libinjection_sqli_state state; + + libinjection_sqli_init(&state, input, slen, 0); + issqli = libinjection_is_sqli(&state); + if (issqli) { + strcpy(fingerprint, state.fingerprint); + } else { + fingerprint[0] = '\0'; + } + return issqli; +} diff --git a/src/components/implementation/simple_nf/ndpi/libinjection_sqli.h b/src/components/implementation/simple_nf/ndpi/libinjection_sqli.h new file mode 100644 index 0000000000..b9746555a7 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/libinjection_sqli.h @@ -0,0 +1,294 @@ +/** + * Copyright 2012-2016 Nick Galbreath + * nickg@client9.com + * BSD License -- see `COPYING.txt` for details + * + * https://libinjection.client9.com/ + * + */ + +#ifndef LIBINJECTION_SQLI_H +#define LIBINJECTION_SQLI_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* + * Pull in size_t + */ +#include + +enum sqli_flags { + FLAG_NONE = 0 + , FLAG_QUOTE_NONE = 1 /* 1 << 0 */ + , FLAG_QUOTE_SINGLE = 2 /* 1 << 1 */ + , FLAG_QUOTE_DOUBLE = 4 /* 1 << 2 */ + + , FLAG_SQL_ANSI = 8 /* 1 << 3 */ + , FLAG_SQL_MYSQL = 16 /* 1 << 4 */ +}; + +enum lookup_type { + LOOKUP_WORD = 1 + , LOOKUP_TYPE = 2 + , LOOKUP_OPERATOR = 3 + , LOOKUP_FINGERPRINT = 4 +}; + +struct libinjection_sqli_token { +#ifdef SWIG +%immutable; +#endif + /* + * position and length of token + * in original string + */ + size_t pos; + size_t len; + + /* count: + * in type 'v', used for number of opening '@' + * but maybe used in other contexts + */ + int count; + + char type; + char str_open; + char str_close; + char val[32]; +}; + +typedef struct libinjection_sqli_token stoken_t; + +/** + * Pointer to function, takes c-string input, + * returns '\0' for no match, else a char + */ +struct libinjection_sqli_state; +typedef char (*ptr_lookup_fn)(struct libinjection_sqli_state*, int lookuptype, const char* word, size_t len); + +struct libinjection_sqli_state { +#ifdef SWIG +%immutable; +#endif + + /* + * input, does not need to be null terminated. + * it is also not modified. + */ + const char *s; + + /* + * input length + */ + size_t slen; + + /* + * How to lookup a word or fingerprint + */ + ptr_lookup_fn lookup; + void* userdata; + + /* + * + */ + int flags; + + /* + * pos is the index in the string during tokenization + */ + size_t pos; + +#ifndef SWIG + /* for SWIG.. don't use this.. use functional API instead */ + + /* MAX TOKENS + 1 since we use one extra token + * to determine the type of the previous token + */ + struct libinjection_sqli_token tokenvec[8]; +#endif + + /* + * Pointer to token position in tokenvec, above + */ + struct libinjection_sqli_token *current; + + /* + * fingerprint pattern c-string + * +1 for ending null + * Minimum of 8 bytes to add gcc's -fstack-protector to work + */ + char fingerprint[8]; + + /* + * Line number of code that said decided if the input was SQLi or + * not. Most of the time it's line that said "it's not a matching + * fingerprint" but there is other logic that sometimes approves + * an input. This is only useful for debugging. + * + */ + int reason; + + /* Number of ddw (dash-dash-white) comments + * These comments are in the form of + * '--[whitespace]' or '--[EOF]' + * + * All databases treat this as a comment. + */ + int stats_comment_ddw; + + /* Number of ddx (dash-dash-[notwhite]) comments + * + * ANSI SQL treats these are comments, MySQL treats this as + * two unary operators '-' '-' + * + * If you are parsing result returns FALSE and + * stats_comment_dd > 0, you should reparse with + * COMMENT_MYSQL + * + */ + int stats_comment_ddx; + + /* + * c-style comments found /x .. x/ + */ + int stats_comment_c; + + /* '#' operators or MySQL EOL comments found + * + */ + int stats_comment_hash; + + /* + * number of tokens folded away + */ + int stats_folds; + + /* + * total tokens processed + */ + int stats_tokens; + +}; + +typedef struct libinjection_sqli_state sfilter; + +struct libinjection_sqli_token* libinjection_sqli_get_token( + struct libinjection_sqli_state* sqlistate, int i); + +/* + * Version info. + * + * This is moved into a function to allow SWIG and other auto-generated + * binding to not be modified during minor release changes. We change + * change the version number in the c source file, and not regenerated + * the binding + * + * See python's normalized version + * http://www.python.org/dev/peps/pep-0386/#normalizedversion + */ +const char* libinjection_version(void); + +/** + * + */ +void libinjection_sqli_init(struct libinjection_sqli_state* sql_state, + const char* s, size_t slen, + int flags); + +/** + * Main API: tests for SQLi in three possible contexts, no quotes, + * single quote and double quote + * + * \param sql_state core data structure + * + * \return 1 (true) if SQLi, 0 (false) if benign + */ +int libinjection_is_sqli(struct libinjection_sqli_state* sql_state); + +/* FOR HACKERS ONLY + * provides deep hooks into the decision making process + */ +void libinjection_sqli_callback(struct libinjection_sqli_state* sql_state, + ptr_lookup_fn fn, + void* userdata); + + +/* + * Resets state, but keeps initial string and callbacks + */ +void libinjection_sqli_reset(struct libinjection_sqli_state* sql_state, + int flags); + +/** + * + */ + +/** + * This detects SQLi in a single context, mostly useful for custom + * logic and debugging. + * + * \param sql_state Main data structure + * \param flags flags to adjust parsing + * + * \returns a pointer to sfilter.fingerprint as convenience + * do not free! + * + */ +const char* libinjection_sqli_fingerprint(struct libinjection_sqli_state* sql_state, + int flags); + +/** + * The default "word" to token-type or fingerprint function. This + * uses a ASCII case-insensitive binary tree. + */ +char libinjection_sqli_lookup_word(struct libinjection_sqli_state* sql_state, + int lookup_type, + const char* s, + size_t slen); + +/* Streaming tokenization interface. + * + * sql_state->current is updated with the current token. + * + * \returns 1, has a token, keep going, or 0 no tokens + * + */ +int libinjection_sqli_tokenize(struct libinjection_sqli_state * sql_state); + +/** + * parses and folds input, up to 5 tokens + * + */ +int libinjection_sqli_fold(struct libinjection_sqli_state * sql_state); + +/** The built-in default function to match fingerprints + * and do false negative/positive analysis. This calls the following + * two functions. With this, you over-ride one part or the other. + * + * return libinjection_sqli_blacklist(sql_state) && + * libinjection_sqli_not_whitelist(sql_state); + * + * \param sql_state should be filled out after libinjection_sqli_fingerprint is called + */ +int libinjection_sqli_check_fingerprint(struct libinjection_sqli_state * sql_state); + +/* Given a pattern determine if it's a SQLi pattern. + * + * \return TRUE if sqli, false otherwise + */ +int libinjection_sqli_blacklist(struct libinjection_sqli_state* sql_state); + +/* Given a positive match for a pattern (i.e. pattern is SQLi), this function + * does additional analysis to reduce false positives. + * + * \return TRUE if SQLi, false otherwise + */ +int libinjection_sqli_not_whitelist(struct libinjection_sqli_state * sql_state); + +#ifdef __cplusplus +} +#endif + +#endif /* LIBINJECTION_SQLI_H */ diff --git a/src/components/implementation/simple_nf/ndpi/libinjection_sqli_data.h b/src/components/implementation/simple_nf/ndpi/libinjection_sqli_data.h new file mode 100644 index 0000000000..f5e1454143 --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/libinjection_sqli_data.h @@ -0,0 +1,9652 @@ + +#ifndef LIBINJECTION_SQLI_DATA_H +#define LIBINJECTION_SQLI_DATA_H + +#include "libinjection.h" +#include "libinjection_sqli.h" + +typedef struct { + const char *word; + char type; +} keyword_t; + +static size_t parse_money(sfilter * sf); +static size_t parse_other(sfilter * sf); +static size_t parse_white(sfilter * sf); +static size_t parse_operator1(sfilter *sf); +static size_t parse_char(sfilter *sf); +static size_t parse_hash(sfilter *sf); +static size_t parse_dash(sfilter *sf); +static size_t parse_slash(sfilter *sf); +static size_t parse_backslash(sfilter * sf); +static size_t parse_operator2(sfilter *sf); +static size_t parse_string(sfilter *sf); +static size_t parse_word(sfilter * sf); +static size_t parse_var(sfilter * sf); +static size_t parse_number(sfilter * sf); +static size_t parse_tick(sfilter * sf); +static size_t parse_ustring(sfilter * sf); +static size_t parse_qstring(sfilter * sf); +static size_t parse_nqstring(sfilter * sf); +static size_t parse_xstring(sfilter * sf); +static size_t parse_bstring(sfilter * sf); +static size_t parse_estring(sfilter * sf); +static size_t parse_bword(sfilter * sf); + + +typedef size_t (*pt2Function)(sfilter *sf); +static const pt2Function char_parse_map[] = { + &parse_white, /* 0 */ + &parse_white, /* 1 */ + &parse_white, /* 2 */ + &parse_white, /* 3 */ + &parse_white, /* 4 */ + &parse_white, /* 5 */ + &parse_white, /* 6 */ + &parse_white, /* 7 */ + &parse_white, /* 8 */ + &parse_white, /* 9 */ + &parse_white, /* 10 */ + &parse_white, /* 11 */ + &parse_white, /* 12 */ + &parse_white, /* 13 */ + &parse_white, /* 14 */ + &parse_white, /* 15 */ + &parse_white, /* 16 */ + &parse_white, /* 17 */ + &parse_white, /* 18 */ + &parse_white, /* 19 */ + &parse_white, /* 20 */ + &parse_white, /* 21 */ + &parse_white, /* 22 */ + &parse_white, /* 23 */ + &parse_white, /* 24 */ + &parse_white, /* 25 */ + &parse_white, /* 26 */ + &parse_white, /* 27 */ + &parse_white, /* 28 */ + &parse_white, /* 29 */ + &parse_white, /* 30 */ + &parse_white, /* 31 */ + &parse_white, /* 32 */ + &parse_operator2, /* 33 */ + &parse_string, /* 34 */ + &parse_hash, /* 35 */ + &parse_money, /* 36 */ + &parse_operator1, /* 37 */ + &parse_operator2, /* 38 */ + &parse_string, /* 39 */ + &parse_char, /* 40 */ + &parse_char, /* 41 */ + &parse_operator2, /* 42 */ + &parse_operator1, /* 43 */ + &parse_char, /* 44 */ + &parse_dash, /* 45 */ + &parse_number, /* 46 */ + &parse_slash, /* 47 */ + &parse_number, /* 48 */ + &parse_number, /* 49 */ + &parse_number, /* 50 */ + &parse_number, /* 51 */ + &parse_number, /* 52 */ + &parse_number, /* 53 */ + &parse_number, /* 54 */ + &parse_number, /* 55 */ + &parse_number, /* 56 */ + &parse_number, /* 57 */ + &parse_operator2, /* 58 */ + &parse_char, /* 59 */ + &parse_operator2, /* 60 */ + &parse_operator2, /* 61 */ + &parse_operator2, /* 62 */ + &parse_other, /* 63 */ + &parse_var, /* 64 */ + &parse_word, /* 65 */ + &parse_bstring, /* 66 */ + &parse_word, /* 67 */ + &parse_word, /* 68 */ + &parse_estring, /* 69 */ + &parse_word, /* 70 */ + &parse_word, /* 71 */ + &parse_word, /* 72 */ + &parse_word, /* 73 */ + &parse_word, /* 74 */ + &parse_word, /* 75 */ + &parse_word, /* 76 */ + &parse_word, /* 77 */ + &parse_nqstring, /* 78 */ + &parse_word, /* 79 */ + &parse_word, /* 80 */ + &parse_qstring, /* 81 */ + &parse_word, /* 82 */ + &parse_word, /* 83 */ + &parse_word, /* 84 */ + &parse_ustring, /* 85 */ + &parse_word, /* 86 */ + &parse_word, /* 87 */ + &parse_xstring, /* 88 */ + &parse_word, /* 89 */ + &parse_word, /* 90 */ + &parse_bword, /* 91 */ + &parse_backslash, /* 92 */ + &parse_other, /* 93 */ + &parse_operator1, /* 94 */ + &parse_word, /* 95 */ + &parse_tick, /* 96 */ + &parse_word, /* 97 */ + &parse_bstring, /* 98 */ + &parse_word, /* 99 */ + &parse_word, /* 100 */ + &parse_estring, /* 101 */ + &parse_word, /* 102 */ + &parse_word, /* 103 */ + &parse_word, /* 104 */ + &parse_word, /* 105 */ + &parse_word, /* 106 */ + &parse_word, /* 107 */ + &parse_word, /* 108 */ + &parse_word, /* 109 */ + &parse_nqstring, /* 110 */ + &parse_word, /* 111 */ + &parse_word, /* 112 */ + &parse_qstring, /* 113 */ + &parse_word, /* 114 */ + &parse_word, /* 115 */ + &parse_word, /* 116 */ + &parse_ustring, /* 117 */ + &parse_word, /* 118 */ + &parse_word, /* 119 */ + &parse_xstring, /* 120 */ + &parse_word, /* 121 */ + &parse_word, /* 122 */ + &parse_char, /* 123 */ + &parse_operator2, /* 124 */ + &parse_char, /* 125 */ + &parse_operator1, /* 126 */ + &parse_white, /* 127 */ + &parse_word, /* 128 */ + &parse_word, /* 129 */ + &parse_word, /* 130 */ + &parse_word, /* 131 */ + &parse_word, /* 132 */ + &parse_word, /* 133 */ + &parse_word, /* 134 */ + &parse_word, /* 135 */ + &parse_word, /* 136 */ + &parse_word, /* 137 */ + &parse_word, /* 138 */ + &parse_word, /* 139 */ + &parse_word, /* 140 */ + &parse_word, /* 141 */ + &parse_word, /* 142 */ + &parse_word, /* 143 */ + &parse_word, /* 144 */ + &parse_word, /* 145 */ + &parse_word, /* 146 */ + &parse_word, /* 147 */ + &parse_word, /* 148 */ + &parse_word, /* 149 */ + &parse_word, /* 150 */ + &parse_word, /* 151 */ + &parse_word, /* 152 */ + &parse_word, /* 153 */ + &parse_word, /* 154 */ + &parse_word, /* 155 */ + &parse_word, /* 156 */ + &parse_word, /* 157 */ + &parse_word, /* 158 */ + &parse_word, /* 159 */ + &parse_white, /* 160 */ + &parse_word, /* 161 */ + &parse_word, /* 162 */ + &parse_word, /* 163 */ + &parse_word, /* 164 */ + &parse_word, /* 165 */ + &parse_word, /* 166 */ + &parse_word, /* 167 */ + &parse_word, /* 168 */ + &parse_word, /* 169 */ + &parse_word, /* 170 */ + &parse_word, /* 171 */ + &parse_word, /* 172 */ + &parse_word, /* 173 */ + &parse_word, /* 174 */ + &parse_word, /* 175 */ + &parse_word, /* 176 */ + &parse_word, /* 177 */ + &parse_word, /* 178 */ + &parse_word, /* 179 */ + &parse_word, /* 180 */ + &parse_word, /* 181 */ + &parse_word, /* 182 */ + &parse_word, /* 183 */ + &parse_word, /* 184 */ + &parse_word, /* 185 */ + &parse_word, /* 186 */ + &parse_word, /* 187 */ + &parse_word, /* 188 */ + &parse_word, /* 189 */ + &parse_word, /* 190 */ + &parse_word, /* 191 */ + &parse_word, /* 192 */ + &parse_word, /* 193 */ + &parse_word, /* 194 */ + &parse_word, /* 195 */ + &parse_word, /* 196 */ + &parse_word, /* 197 */ + &parse_word, /* 198 */ + &parse_word, /* 199 */ + &parse_word, /* 200 */ + &parse_word, /* 201 */ + &parse_word, /* 202 */ + &parse_word, /* 203 */ + &parse_word, /* 204 */ + &parse_word, /* 205 */ + &parse_word, /* 206 */ + &parse_word, /* 207 */ + &parse_word, /* 208 */ + &parse_word, /* 209 */ + &parse_word, /* 210 */ + &parse_word, /* 211 */ + &parse_word, /* 212 */ + &parse_word, /* 213 */ + &parse_word, /* 214 */ + &parse_word, /* 215 */ + &parse_word, /* 216 */ + &parse_word, /* 217 */ + &parse_word, /* 218 */ + &parse_word, /* 219 */ + &parse_word, /* 220 */ + &parse_word, /* 221 */ + &parse_word, /* 222 */ + &parse_word, /* 223 */ + &parse_word, /* 224 */ + &parse_word, /* 225 */ + &parse_word, /* 226 */ + &parse_word, /* 227 */ + &parse_word, /* 228 */ + &parse_word, /* 229 */ + &parse_word, /* 230 */ + &parse_word, /* 231 */ + &parse_word, /* 232 */ + &parse_word, /* 233 */ + &parse_word, /* 234 */ + &parse_word, /* 235 */ + &parse_word, /* 236 */ + &parse_word, /* 237 */ + &parse_word, /* 238 */ + &parse_word, /* 239 */ + &parse_word, /* 240 */ + &parse_word, /* 241 */ + &parse_word, /* 242 */ + &parse_word, /* 243 */ + &parse_word, /* 244 */ + &parse_word, /* 245 */ + &parse_word, /* 246 */ + &parse_word, /* 247 */ + &parse_word, /* 248 */ + &parse_word, /* 249 */ + &parse_word, /* 250 */ + &parse_word, /* 251 */ + &parse_word, /* 252 */ + &parse_word, /* 253 */ + &parse_word, /* 254 */ + &parse_word, /* 255 */ +}; + +static const keyword_t sql_keywords[] = { + {"!!", 'o'}, + {"!<", 'o'}, + {"!=", 'o'}, + {"!>", 'o'}, + {"%=", 'o'}, + {"&&", '&'}, + {"&=", 'o'}, + {"*=", 'o'}, + {"+=", 'o'}, + {"-=", 'o'}, + {"/=", 'o'}, + {"0&(1)O", 'F'}, + {"0&(1)U", 'F'}, + {"0&(1O(", 'F'}, + {"0&(1OF", 'F'}, + {"0&(1OS", 'F'}, + {"0&(1OV", 'F'}, + {"0&(F()", 'F'}, + {"0&(F(1", 'F'}, + {"0&(F(F", 'F'}, + {"0&(F(N", 'F'}, + {"0&(F(S", 'F'}, + {"0&(F(V", 'F'}, + {"0&(N)O", 'F'}, + {"0&(N)U", 'F'}, + {"0&(NO(", 'F'}, + {"0&(NOF", 'F'}, + {"0&(NOS", 'F'}, + {"0&(NOV", 'F'}, + {"0&(S)O", 'F'}, + {"0&(S)U", 'F'}, + {"0&(SO(", 'F'}, + {"0&(SO1", 'F'}, + {"0&(SOF", 'F'}, + {"0&(SON", 'F'}, + {"0&(SOS", 'F'}, + {"0&(SOV", 'F'}, + {"0&(V)O", 'F'}, + {"0&(V)U", 'F'}, + {"0&(VO(", 'F'}, + {"0&(VOF", 'F'}, + {"0&(VOS", 'F'}, + {"0&1O(1", 'F'}, + {"0&1O(F", 'F'}, + {"0&1O(N", 'F'}, + {"0&1O(S", 'F'}, + {"0&1O(V", 'F'}, + {"0&1OF(", 'F'}, + {"0&1OS(", 'F'}, + {"0&1OS1", 'F'}, + {"0&1OSF", 'F'}, + {"0&1OSU", 'F'}, + {"0&1OSV", 'F'}, + {"0&1OV(", 'F'}, + {"0&1OVF", 'F'}, + {"0&1OVO", 'F'}, + {"0&1OVS", 'F'}, + {"0&1OVU", 'F'}, + {"0&1UE(", 'F'}, + {"0&1UE1", 'F'}, + {"0&1UEF", 'F'}, + {"0&1UEK", 'F'}, + {"0&1UEN", 'F'}, + {"0&1UES", 'F'}, + {"0&1UEV", 'F'}, + {"0&F()O", 'F'}, + {"0&F()U", 'F'}, + {"0&F(1)", 'F'}, + {"0&F(1O", 'F'}, + {"0&F(F(", 'F'}, + {"0&F(N)", 'F'}, + {"0&F(NO", 'F'}, + {"0&F(S)", 'F'}, + {"0&F(SO", 'F'}, + {"0&F(V)", 'F'}, + {"0&F(VO", 'F'}, + {"0&NO(1", 'F'}, + {"0&NO(F", 'F'}, + {"0&NO(N", 'F'}, + {"0&NO(S", 'F'}, + {"0&NO(V", 'F'}, + {"0&NOF(", 'F'}, + {"0&NOS(", 'F'}, + {"0&NOS1", 'F'}, + {"0&NOSF", 'F'}, + {"0&NOSU", 'F'}, + {"0&NOSV", 'F'}, + {"0&NOV(", 'F'}, + {"0&NOVF", 'F'}, + {"0&NOVO", 'F'}, + {"0&NOVS", 'F'}, + {"0&NOVU", 'F'}, + {"0&NUE(", 'F'}, + {"0&NUE1", 'F'}, + {"0&NUEF", 'F'}, + {"0&NUEK", 'F'}, + {"0&NUEN", 'F'}, + {"0&NUES", 'F'}, + {"0&NUEV", 'F'}, + {"0&SO(1", 'F'}, + {"0&SO(F", 'F'}, + {"0&SO(N", 'F'}, + {"0&SO(S", 'F'}, + {"0&SO(V", 'F'}, + {"0&SO1(", 'F'}, + {"0&SO1F", 'F'}, + {"0&SO1N", 'F'}, + {"0&SO1S", 'F'}, + {"0&SO1U", 'F'}, + {"0&SO1V", 'F'}, + {"0&SOF(", 'F'}, + {"0&SON(", 'F'}, + {"0&SON1", 'F'}, + {"0&SONF", 'F'}, + {"0&SONU", 'F'}, + {"0&SOS(", 'F'}, + {"0&SOS1", 'F'}, + {"0&SOSF", 'F'}, + {"0&SOSU", 'F'}, + {"0&SOSV", 'F'}, + {"0&SOV(", 'F'}, + {"0&SOVF", 'F'}, + {"0&SOVO", 'F'}, + {"0&SOVS", 'F'}, + {"0&SOVU", 'F'}, + {"0&SUE(", 'F'}, + {"0&SUE1", 'F'}, + {"0&SUEF", 'F'}, + {"0&SUEK", 'F'}, + {"0&SUEN", 'F'}, + {"0&SUES", 'F'}, + {"0&SUEV", 'F'}, + {"0&VO(1", 'F'}, + {"0&VO(F", 'F'}, + {"0&VO(N", 'F'}, + {"0&VO(S", 'F'}, + {"0&VO(V", 'F'}, + {"0&VOF(", 'F'}, + {"0&VOS(", 'F'}, + {"0&VOS1", 'F'}, + {"0&VOSF", 'F'}, + {"0&VOSU", 'F'}, + {"0&VOSV", 'F'}, + {"0&VUE(", 'F'}, + {"0&VUE1", 'F'}, + {"0&VUEF", 'F'}, + {"0&VUEK", 'F'}, + {"0&VUEN", 'F'}, + {"0&VUES", 'F'}, + {"0&VUEV", 'F'}, + {"0)&(EK", 'F'}, + {"0)&(EN", 'F'}, + {"0)UE(1", 'F'}, + {"0)UE(F", 'F'}, + {"0)UE(N", 'F'}, + {"0)UE(S", 'F'}, + {"0)UE(V", 'F'}, + {"0)UE1K", 'F'}, + {"0)UE1O", 'F'}, + {"0)UEF(", 'F'}, + {"0)UEK(", 'F'}, + {"0)UEK1", 'F'}, + {"0)UEKF", 'F'}, + {"0)UEKN", 'F'}, + {"0)UEKS", 'F'}, + {"0)UEKV", 'F'}, + {"0)UENK", 'F'}, + {"0)UENO", 'F'}, + {"0)UESK", 'F'}, + {"0)UESO", 'F'}, + {"0)UEVK", 'F'}, + {"0)UEVO", 'F'}, + {"01&(1&", 'F'}, + {"01&(1)", 'F'}, + {"01&(1,", 'F'}, + {"01&(1O", 'F'}, + {"01&(E(", 'F'}, + {"01&(E1", 'F'}, + {"01&(EF", 'F'}, + {"01&(EK", 'F'}, + {"01&(EN", 'F'}, + {"01&(EO", 'F'}, + {"01&(ES", 'F'}, + {"01&(EV", 'F'}, + {"01&(F(", 'F'}, + {"01&(N&", 'F'}, + {"01&(N)", 'F'}, + {"01&(N,", 'F'}, + {"01&(NO", 'F'}, + {"01&(S&", 'F'}, + {"01&(S)", 'F'}, + {"01&(S,", 'F'}, + {"01&(SO", 'F'}, + {"01&(V&", 'F'}, + {"01&(V)", 'F'}, + {"01&(V,", 'F'}, + {"01&(VO", 'F'}, + {"01&1", 'F'}, + {"01&1&(", 'F'}, + {"01&1&1", 'F'}, + {"01&1&F", 'F'}, + {"01&1&N", 'F'}, + {"01&1&S", 'F'}, + {"01&1&V", 'F'}, + {"01&1)&", 'F'}, + {"01&1)C", 'F'}, + {"01&1)O", 'F'}, + {"01&1)U", 'F'}, + {"01&1;", 'F'}, + {"01&1;C", 'F'}, + {"01&1;E", 'F'}, + {"01&1;T", 'F'}, + {"01&1B(", 'F'}, + {"01&1B1", 'F'}, + {"01&1BF", 'F'}, + {"01&1BN", 'F'}, + {"01&1BS", 'F'}, + {"01&1BV", 'F'}, + {"01&1C", 'F'}, + {"01&1EK", 'F'}, + {"01&1EN", 'F'}, + {"01&1F(", 'F'}, + {"01&1K(", 'F'}, + {"01&1K1", 'F'}, + {"01&1KF", 'F'}, + {"01&1KN", 'F'}, + {"01&1KS", 'F'}, + {"01&1KV", 'F'}, + {"01&1O(", 'F'}, + {"01&1OF", 'F'}, + {"01&1OS", 'F'}, + {"01&1OV", 'F'}, + {"01&1TN", 'F'}, + {"01&1U", 'F'}, + {"01&1U(", 'F'}, + {"01&1U;", 'F'}, + {"01&1UC", 'F'}, + {"01&1UE", 'F'}, + {"01&E(1", 'F'}, + {"01&E(F", 'F'}, + {"01&E(N", 'F'}, + {"01&E(O", 'F'}, + {"01&E(S", 'F'}, + {"01&E(V", 'F'}, + {"01&E1", 'F'}, + {"01&E1;", 'F'}, + {"01&E1C", 'F'}, + {"01&E1K", 'F'}, + {"01&E1O", 'F'}, + {"01&EF(", 'F'}, + {"01&EK(", 'F'}, + {"01&EK1", 'F'}, + {"01&EKF", 'F'}, + {"01&EKN", 'F'}, + {"01&EKS", 'F'}, + {"01&EKU", 'F'}, + {"01&EKV", 'F'}, + {"01&EN", 'F'}, + {"01&EN;", 'F'}, + {"01&ENC", 'F'}, + {"01&ENK", 'F'}, + {"01&ENO", 'F'}, + {"01&ES", 'F'}, + {"01&ES;", 'F'}, + {"01&ESC", 'F'}, + {"01&ESK", 'F'}, + {"01&ESO", 'F'}, + {"01&EUE", 'F'}, + {"01&EV", 'F'}, + {"01&EV;", 'F'}, + {"01&EVC", 'F'}, + {"01&EVK", 'F'}, + {"01&EVO", 'F'}, + {"01&F()", 'F'}, + {"01&F(1", 'F'}, + {"01&F(E", 'F'}, + {"01&F(F", 'F'}, + {"01&F(N", 'F'}, + {"01&F(S", 'F'}, + {"01&F(V", 'F'}, + {"01&K&(", 'F'}, + {"01&K&1", 'F'}, + {"01&K&F", 'F'}, + {"01&K&N", 'F'}, + {"01&K&S", 'F'}, + {"01&K&V", 'F'}, + {"01&K(1", 'F'}, + {"01&K(F", 'F'}, + {"01&K(N", 'F'}, + {"01&K(S", 'F'}, + {"01&K(V", 'F'}, + {"01&K1O", 'F'}, + {"01&KC", 'F'}, + {"01&KF(", 'F'}, + {"01&KNK", 'F'}, + {"01&KO(", 'F'}, + {"01&KO1", 'F'}, + {"01&KOF", 'F'}, + {"01&KOK", 'F'}, + {"01&KON", 'F'}, + {"01&KOS", 'F'}, + {"01&KOV", 'F'}, + {"01&KSO", 'F'}, + {"01&KVO", 'F'}, + {"01&N&(", 'F'}, + {"01&N&1", 'F'}, + {"01&N&F", 'F'}, + {"01&N&N", 'F'}, + {"01&N&S", 'F'}, + {"01&N&V", 'F'}, + {"01&N)&", 'F'}, + {"01&N)C", 'F'}, + {"01&N)O", 'F'}, + {"01&N)U", 'F'}, + {"01&N;", 'F'}, + {"01&N;C", 'F'}, + {"01&N;E", 'F'}, + {"01&N;T", 'F'}, + {"01&NB(", 'F'}, + {"01&NB1", 'F'}, + {"01&NBF", 'F'}, + {"01&NBN", 'F'}, + {"01&NBS", 'F'}, + {"01&NBV", 'F'}, + {"01&NC", 'F'}, + {"01&NEN", 'F'}, + {"01&NF(", 'F'}, + {"01&NK(", 'F'}, + {"01&NK1", 'F'}, + {"01&NKF", 'F'}, + {"01&NKN", 'F'}, + {"01&NKS", 'F'}, + {"01&NKV", 'F'}, + {"01&NO(", 'F'}, + {"01&NOF", 'F'}, + {"01&NOS", 'F'}, + {"01&NOV", 'F'}, + {"01&NTN", 'F'}, + {"01&NU", 'F'}, + {"01&NU(", 'F'}, + {"01&NU;", 'F'}, + {"01&NUC", 'F'}, + {"01&NUE", 'F'}, + {"01&S", 'F'}, + {"01&S&(", 'F'}, + {"01&S&1", 'F'}, + {"01&S&F", 'F'}, + {"01&S&N", 'F'}, + {"01&S&S", 'F'}, + {"01&S&V", 'F'}, + {"01&S)&", 'F'}, + {"01&S)C", 'F'}, + {"01&S)O", 'F'}, + {"01&S)U", 'F'}, + {"01&S1", 'F'}, + {"01&S1;", 'F'}, + {"01&S1C", 'F'}, + {"01&S;", 'F'}, + {"01&S;C", 'F'}, + {"01&S;E", 'F'}, + {"01&S;T", 'F'}, + {"01&SB(", 'F'}, + {"01&SB1", 'F'}, + {"01&SBF", 'F'}, + {"01&SBN", 'F'}, + {"01&SBS", 'F'}, + {"01&SBV", 'F'}, + {"01&SC", 'F'}, + {"01&SEK", 'F'}, + {"01&SEN", 'F'}, + {"01&SF(", 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'T'}, + {"DECODE", 'f'}, + {"DECRYPTBYASMKEY", 'f'}, + {"DECRYPTBYCERT", 'f'}, + {"DECRYPTBYKEY", 'f'}, + {"DECRYPTBYKEYAUTOCERT", 'f'}, + {"DECRYPTBYPASSPHRASE", 'f'}, + {"DEFAULT", 'k'}, + {"DEGREES", 'f'}, + {"DELAY", 'k'}, + {"DELAYED", 'k'}, + {"DELETE", 'T'}, + {"DENSE_RANK", 'f'}, + {"DESC", 'k'}, + {"DESCRIBE", 'k'}, + {"DES_DECRYPT", 'f'}, + {"DES_ENCRYPT", 'f'}, + {"DETERMINISTIC", 'k'}, + {"DFIRST", 'f'}, + {"DIFFERENCE", 'f'}, + {"DISTINCT", 'k'}, + {"DISTINCTROW", 'k'}, + {"DIV", 'o'}, + {"DLAST", 'f'}, + {"DLOOKUP", 'f'}, + {"DMAX", 'f'}, + {"DMIN", 'f'}, + {"DO", 'n'}, + {"DOUBLE", 't'}, + {"DOUBLE PRECISION", 't'}, + {"DROP", 'T'}, + {"DSUM", 'f'}, + {"DUAL", 'n'}, + {"EACH", 'k'}, + {"ELSE", 'k'}, + {"ELSEIF", 'k'}, + {"ELT", 'f'}, + {"ENCLOSED", 'k'}, + {"ENCODE", 'f'}, + {"ENCRYPT", 'f'}, + {"ENCRYPTBYASMKEY", 'f'}, + {"ENCRYPTBYCERT", 'f'}, + {"ENCRYPTBYKEY", 'f'}, + {"ENCRYPTBYPASSPHRASE", 'f'}, + {"ENUM_FIRST", 'f'}, + {"ENUM_LAST", 'f'}, + {"ENUM_RANGE", 'f'}, + {"EOMONTH", 'f'}, + {"EQV", 'o'}, + {"ESCAPED", 'k'}, + {"EVENTDATA", 'f'}, + {"EXCEPT", 'U'}, + {"EXEC", 'T'}, + {"EXECUTE", 'T'}, + {"EXECUTE AS", 'E'}, + {"EXECUTE AS LOGIN", 'E'}, + {"EXISTS", 'f'}, + {"EXIT", 'k'}, + {"EXP", 'f'}, + {"EXPLAIN", 'k'}, + {"EXPORT_SET", 'f'}, + {"EXTRACT", 'f'}, + {"EXTRACTVALUE", 'f'}, + {"EXTRACT_VALUE", 'f'}, + {"FALSE", '1'}, + {"FETCH", 'k'}, + {"FIELD", 'f'}, + {"FILEDATETIME", 'f'}, + {"FILEGROUPPROPERTY", 'f'}, + {"FILEGROUP_ID", 'f'}, + {"FILEGROUP_NAME", 'f'}, + {"FILELEN", 'f'}, + {"FILEPROPERTY", 'f'}, + {"FILETOBLOB", 'f'}, + {"FILETOCLOB", 'f'}, + {"FILE_ID", 'f'}, + {"FILE_IDEX", 'f'}, + {"FILE_NAME", 'f'}, + {"FIND_IN_SET", 'f'}, + {"FIRST_VALUE", 'f'}, + {"FLOAT", 't'}, + {"FLOAT4", 't'}, + {"FLOAT8", 't'}, + {"FLOOR", 'f'}, + {"FN_VIRTUALFILESTATS", 'f'}, + {"FOR", 'n'}, + {"FOR UPDATE", 'k'}, + {"FOR UPDATE NOWAIT", 'k'}, + {"FOR UPDATE OF", 'k'}, + {"FOR UPDATE SKIP", 'k'}, + {"FOR UPDATE SKIP LOCKED", 'k'}, + {"FOR UPDATE WAIT", 'k'}, + {"FORCE", 'k'}, + {"FOREIGN", 'k'}, + {"FORMAT", 'f'}, + {"FOUND_ROWS", 'f'}, + {"FROM", 'k'}, + {"FROM_BASE64", 'f'}, + {"FROM_DAYS", 'f'}, + {"FROM_UNIXTIME", 'f'}, + {"FULL JOIN", 'k'}, + {"FULL OUTER", 'k'}, + {"FULL OUTER JOIN", 'k'}, + {"FULLTEXT", 'k'}, + {"FULLTEXTCATALOGPROPERTY", 'f'}, + {"FULLTEXTSERVICEPROPERTY", 'f'}, + {"FUNCTION", 'k'}, + {"GENERATE_SERIES", 'f'}, + {"GENERATE_SUBSCRIPTS", 'f'}, + {"GETATTR", 'f'}, + {"GETDATE", 'f'}, + {"GETUTCDATE", 'f'}, + {"GET_BIT", 'f'}, + {"GET_BYTE", 'f'}, + {"GET_FORMAT", 'f'}, + {"GET_LOCK", 'f'}, + {"GO", 'T'}, + {"GOTO", 'T'}, + {"GRANT", 'k'}, + {"GREATEST", 'f'}, + {"GROUP", 'n'}, + {"GROUP BY", 'B'}, + {"GROUPING", 'f'}, + {"GROUPING_ID", 'f'}, + {"GROUP_CONCAT", 'f'}, + {"HANDLER", 'T'}, + {"HASHBYTES", 'f'}, + {"HAS_PERMS_BY_NAME", 'f'}, + {"HAVING", 'B'}, + {"HEX", 'f'}, + {"HIGH_PRIORITY", 'k'}, + {"HOST_NAME", 'f'}, + {"HOUR", 'f'}, + {"HOUR_MICROSECOND", 'k'}, + {"HOUR_MINUTE", 'k'}, + {"HOUR_SECOND", 'k'}, + {"IDENTIFY", 'f'}, + {"IDENT_CURRENT", 'f'}, + {"IDENT_INCR", 'f'}, + {"IDENT_SEED", 'f'}, + {"IF", 'f'}, + {"IF EXISTS", 'f'}, + {"IF NOT", 'f'}, + {"IF NOT EXISTS", 'f'}, + {"IFF", 'f'}, + {"IFNULL", 'f'}, + {"IGNORE", 'k'}, + {"IIF", 'f'}, + {"IN", 'k'}, + {"IN BOOLEAN", 'n'}, + {"IN BOOLEAN MODE", 'k'}, + {"INDEX", 'k'}, + {"INDEXKEY_PROPERTY", 'f'}, + {"INDEXPROPERTY", 'f'}, + {"INDEX_COL", 'f'}, + {"INET_ATON", 'f'}, + {"INET_NTOA", 'f'}, + {"INFILE", 'k'}, + {"INITCAP", 'f'}, + {"INNER", 'k'}, + {"INNER JOIN", 'k'}, + {"INOUT", 'k'}, + {"INSENSITIVE", 'k'}, + {"INSERT", 'E'}, + {"INSERT DELAYED", 'E'}, + {"INSERT DELAYED INTO", 'T'}, + {"INSERT HIGH_PRIORITY", 'E'}, + {"INSERT HIGH_PRIORITY INTO", 'T'}, + {"INSERT IGNORE", 'E'}, + {"INSERT IGNORE INTO", 'T'}, + {"INSERT INTO", 'T'}, + {"INSERT LOW_PRIORITY", 'E'}, + {"INSERT LOW_PRIORITY INTO", 'T'}, + {"INSTR", 'f'}, + {"INSTRREV", 'f'}, + {"INT", 't'}, + {"INT1", 't'}, + {"INT2", 't'}, + {"INT3", 't'}, + {"INT4", 't'}, + {"INT8", 't'}, + {"INTEGER", 't'}, + {"INTERSECT", 'U'}, + {"INTERSECT ALL", 'U'}, + {"INTERVAL", 'k'}, + {"INTO", 'k'}, + {"INTO DUMPFILE", 'k'}, + {"INTO OUTFILE", 'k'}, + {"IS", 'o'}, + {"IS DISTINCT", 'n'}, + {"IS DISTINCT FROM", 'o'}, + {"IS NOT", 'o'}, + {"IS NOT DISTINCT", 'n'}, + {"IS NOT DISTINCT FROM", 'o'}, + {"ISDATE", 'f'}, + {"ISEMPTY", 'f'}, + {"ISFINITE", 'f'}, + {"ISNULL", 'f'}, + {"ISNUMERIC", 'f'}, + {"IS_FREE_LOCK", 'f'}, + {"IS_MEMBER", 'f'}, + {"IS_OBJECTSIGNED", 'f'}, + {"IS_ROLEMEMBER", 'f'}, + {"IS_SRVROLEMEMBER", 'f'}, + {"IS_USED_LOCK", 'f'}, + {"ITERATE", 'k'}, + {"JOIN", 'k'}, + {"JSON_KEYS", 'f'}, + {"JULIANDAY", 'f'}, + {"JUSTIFY_DAYS", 'f'}, + {"JUSTIFY_HOURS", 'f'}, + {"JUSTIFY_INTERVAL", 'f'}, + {"KEYS", 'k'}, + {"KEY_GUID", 'f'}, + {"KEY_ID", 'f'}, + {"KILL", 'k'}, + {"LAG", 'f'}, + {"LASTVAL", 'f'}, + {"LAST_INSERT_ID", 'f'}, + {"LAST_INSERT_ROWID", 'f'}, + {"LAST_VALUE", 'f'}, + {"LCASE", 'f'}, + {"LEAD", 'f'}, + {"LEADING", 'k'}, + {"LEAST", 'f'}, + {"LEAVE", 'k'}, + {"LEFT", 'f'}, + {"LEFT JOIN", 'k'}, + {"LEFT OUTER", 'k'}, + {"LEFT OUTER JOIN", 'k'}, + {"LENGTH", 'f'}, + {"LIKE", 'o'}, + {"LIMIT", 'B'}, + {"LINEAR", 'k'}, + {"LINES", 'k'}, + {"LN", 'f'}, + {"LOAD", 'k'}, + {"LOAD DATA", 'T'}, + {"LOAD XML", 'T'}, + {"LOAD_EXTENSION", 'f'}, + {"LOAD_FILE", 'f'}, + {"LOCALTIME", 'v'}, + {"LOCALTIMESTAMP", 'v'}, + {"LOCATE", 'f'}, + {"LOCK", 'n'}, + {"LOCK IN", 'n'}, + {"LOCK IN SHARE", 'n'}, + {"LOCK IN SHARE MODE", 'k'}, + {"LOCK TABLE", 'k'}, + {"LOCK TABLES", 'k'}, + {"LOG", 'f'}, + {"LOG10", 'f'}, + {"LOG2", 'f'}, + {"LONGBLOB", 'k'}, + {"LONGTEXT", 'k'}, + {"LOOP", 'k'}, + {"LOWER", 'f'}, + {"LOWER_INC", 'f'}, + {"LOWER_INF", 'f'}, + {"LOW_PRIORITY", 'k'}, + {"LPAD", 'f'}, + {"LTRIM", 'f'}, + {"MAKEDATE", 'f'}, + {"MAKE_SET", 'f'}, + {"MASKLEN", 'f'}, + {"MASTER_BIND", 'k'}, + {"MASTER_POS_WAIT", 'f'}, + {"MASTER_SSL_VERIFY_SERVER_CERT", 'k'}, + {"MATCH", 'k'}, + {"MAX", 'f'}, + {"MAXVALUE", 'k'}, + {"MD5", 'f'}, + {"MEDIUMBLOB", 'k'}, + {"MEDIUMINT", 'k'}, + {"MEDIUMTEXT", 'k'}, + {"MERGE", 'k'}, + {"MICROSECOND", 'f'}, + {"MID", 'f'}, + {"MIDDLEINT", 'k'}, + {"MIN", 'f'}, + {"MINUTE", 'f'}, + {"MINUTE_MICROSECOND", 'k'}, + {"MINUTE_SECOND", 'k'}, + {"MKDIR", 'f'}, + {"MOD", 'o'}, + {"MODE", 'n'}, + {"MODIFIES", 'k'}, + {"MONEY", 't'}, + {"MONTH", 'f'}, + {"MONTHNAME", 'f'}, + {"NAME_CONST", 'f'}, + {"NATURAL", 'n'}, + {"NATURAL FULL", 'k'}, + {"NATURAL FULL OUTER JOIN", 'k'}, + {"NATURAL INNER", 'k'}, + {"NATURAL JOIN", 'k'}, + {"NATURAL LEFT", 'k'}, + {"NATURAL LEFT OUTER", 'k'}, + {"NATURAL LEFT OUTER JOIN", 'k'}, + {"NATURAL OUTER", 'k'}, + {"NATURAL RIGHT", 'k'}, + {"NATURAL RIGHT OUTER JOIN", 'k'}, + {"NETMASK", 'f'}, + {"NEXT VALUE", 'n'}, + {"NEXT VALUE FOR", 'k'}, + {"NEXTVAL", 'f'}, + {"NOT", 'o'}, + {"NOT BETWEEN", 'o'}, + {"NOT IN", 'k'}, + {"NOT LIKE", 'o'}, + {"NOT REGEXP", 'o'}, + {"NOT RLIKE", 'o'}, + {"NOT SIMILAR", 'o'}, + {"NOT SIMILAR TO", 'o'}, + {"NOTNULL", 'k'}, + {"NOW", 'f'}, + {"NOWAIT", 'k'}, + {"NO_WRITE_TO_BINLOG", 'k'}, + {"NTH_VALUE", 'f'}, + {"NTILE", 'f'}, + {"NULL", 'v'}, + {"NULLIF", 'f'}, + {"NUMERIC", 't'}, + {"NZ", 'f'}, + {"OBJECTPROPERTY", 'f'}, + {"OBJECTPROPERTYEX", 'f'}, + {"OBJECT_DEFINITION", 'f'}, + {"OBJECT_ID", 'f'}, + {"OBJECT_NAME", 'f'}, + {"OBJECT_SCHEMA_NAME", 'f'}, + {"OCT", 'f'}, + {"OCTET_LENGTH", 'f'}, + {"OFFSET", 'k'}, + {"OID", 't'}, + {"OLD_PASSWORD", 'f'}, + {"ONE_SHOT", 'k'}, + {"OPEN", 'k'}, + {"OPENDATASOURCE", 'f'}, + {"OPENQUERY", 'f'}, + {"OPENROWSET", 'f'}, + {"OPENXML", 'f'}, + {"OPTIMIZE", 'k'}, + {"OPTION", 'k'}, + {"OPTIONALLY", 'k'}, + {"OR", '&'}, + {"ORD", 'f'}, + {"ORDER", 'n'}, + {"ORDER BY", 'B'}, + {"ORIGINAL_DB_NAME", 'f'}, + {"ORIGINAL_LOGIN", 'f'}, + {"OUT", 'n'}, + {"OUTER", 'n'}, + {"OUTFILE", 'k'}, + {"OVERLAPS", 'f'}, + {"OVERLAY", 'f'}, + {"OWN3D", 'k'}, + {"OWN3D BY", 'B'}, + {"PARSENAME", 'f'}, + {"PARTITION", 'k'}, + {"PARTITION BY", 'B'}, + {"PASSWORD", 'n'}, + {"PATHINDEX", 'f'}, + {"PATINDEX", 'f'}, + {"PERCENTILE_COUNT", 'f'}, + {"PERCENTILE_DISC", 'f'}, + {"PERCENTILE_RANK", 'f'}, + {"PERCENT_RANK", 'f'}, + {"PERIOD_ADD", 'f'}, + {"PERIOD_DIFF", 'f'}, + {"PERMISSIONS", 'f'}, + {"PG_ADVISORY_LOCK", 'f'}, + {"PG_BACKEND_PID", 'f'}, + {"PG_CANCEL_BACKEND", 'f'}, + {"PG_CLIENT_ENCODING", 'f'}, + {"PG_CONF_LOAD_TIME", 'f'}, + {"PG_CREATE_RESTORE_POINT", 'f'}, + {"PG_HAS_ROLE", 'f'}, + {"PG_IS_IN_RECOVERY", 'f'}, + {"PG_IS_OTHER_TEMP_SCHEMA", 'f'}, + {"PG_LISTENING_CHANNELS", 'f'}, + {"PG_LS_DIR", 'f'}, + {"PG_MY_TEMP_SCHEMA", 'f'}, + {"PG_POSTMASTER_START_TIME", 'f'}, + {"PG_READ_BINARY_FILE", 'f'}, + {"PG_READ_FILE", 'f'}, + {"PG_RELOAD_CONF", 'f'}, + {"PG_ROTATE_LOGFILE", 'f'}, + {"PG_SLEEP", 'f'}, + {"PG_START_BACKUP", 'f'}, + {"PG_STAT_FILE", 'f'}, + {"PG_STOP_BACKUP", 'f'}, + {"PG_SWITCH_XLOG", 'f'}, + {"PG_TERMINATE_BACKEND", 'f'}, + {"PG_TRIGGER_DEPTH", 'f'}, + {"PI", 'f'}, + {"POSITION", 'f'}, + {"POW", 'f'}, + {"POWER", 'f'}, + {"PRECISION", 'k'}, + {"PREVIOUS VALUE", 'n'}, + {"PREVIOUS VALUE FOR", 'k'}, + {"PRIMARY", 'k'}, + {"PRINT", 'T'}, + {"PROCEDURE", 'k'}, + {"PROCEDURE ANALYSE", 'f'}, + {"PUBLISHINGSERVERNAME", 'f'}, + {"PURGE", 'k'}, + {"PWDCOMPARE", 'f'}, + {"PWDENCRYPT", 'f'}, + {"QUARTER", 'f'}, + {"QUOTE", 'f'}, + {"QUOTENAME", 'f'}, + {"QUOTE_IDENT", 'f'}, + {"QUOTE_LITERAL", 'f'}, + {"QUOTE_NULLABLE", 'f'}, + {"RADIANS", 'f'}, + {"RAISEERROR", 'E'}, + {"RAND", 'f'}, + {"RANDOM", 'f'}, + {"RANDOMBLOB", 'f'}, + {"RANGE", 'k'}, + {"RANK", 'f'}, + {"READ", 'k'}, + {"READ WRITE", 'k'}, + {"READS", 'k'}, + {"READ_WRITE", 'k'}, + {"REAL", 't'}, + {"REFERENCES", 'k'}, + {"REGCLASS", 't'}, + {"REGCONFIG", 't'}, + {"REGDICTIONARY", 't'}, + {"REGEXP", 'o'}, + {"REGEXP_INSTR", 'f'}, + {"REGEXP_MATCHES", 'f'}, + {"REGEXP_REPLACE", 'f'}, + {"REGEXP_SPLIT_TO_ARRAY", 'f'}, + {"REGEXP_SPLIT_TO_TABLE", 'f'}, + {"REGEXP_SUBSTR", 'f'}, + {"REGOPER", 't'}, + {"REGOPERATOR", 't'}, + {"REGPROC", 't'}, + {"REGPROCEDURE", 't'}, + {"REGTYPE", 't'}, + {"RELEASE", 'k'}, + {"RELEASE_LOCK", 'f'}, + {"RENAME", 'k'}, + {"REPEAT", 'k'}, + {"REPLACE", 'k'}, + {"REPLICATE", 'f'}, + {"REQUIRE", 'k'}, + {"RESIGNAL", 'k'}, + {"RESTRICT", 'k'}, + {"RETURN", 'k'}, + {"REVERSE", 'f'}, + {"REVOKE", 'k'}, + {"RIGHT", 'n'}, + {"RIGHT JOIN", 'k'}, + {"RIGHT OUTER", 'k'}, + {"RIGHT OUTER JOIN", 'k'}, + {"RLIKE", 'o'}, + {"ROUND", 'f'}, + {"ROW", 'f'}, + {"ROW_COUNT", 'f'}, + {"ROW_NUMBER", 'f'}, + {"ROW_TO_JSON", 'f'}, + {"RPAD", 'f'}, + {"RTRIM", 'f'}, + {"SCHAMA_NAME", 'f'}, + {"SCHEMA", 'k'}, + {"SCHEMAS", 'k'}, + {"SCHEMA_ID", 'f'}, + {"SCOPE_IDENTITY", 'f'}, + {"SECOND_MICROSECOND", 'k'}, + {"SEC_TO_TIME", 'f'}, + {"SELECT", 'E'}, + {"SELECT ALL", 'E'}, + {"SELECT DISTINCT", 'E'}, + {"SENSITIVE", 'k'}, + {"SEPARATOR", 'k'}, + {"SERIAL", 't'}, + {"SERIAL2", 't'}, + {"SERIAL4", 't'}, + {"SERIAL8", 't'}, + {"SERVERPROPERTY", 'f'}, + {"SESSION_USER", 'f'}, + {"SET", 'E'}, + {"SETATTR", 'f'}, + {"SETSEED", 'f'}, + {"SETVAL", 'f'}, + {"SET_BIT", 'f'}, + {"SET_BYTE", 'f'}, + {"SET_CONFIG", 'f'}, + {"SET_MASKLEN", 'f'}, + {"SHA", 'f'}, + {"SHA1", 'f'}, + {"SHA2", 'f'}, + {"SHOW", 'n'}, + {"SHUTDOWN", 'T'}, + {"SIGN", 'f'}, + {"SIGNAL", 'k'}, + {"SIGNBYASMKEY", 'f'}, + {"SIGNBYCERT", 'f'}, + {"SIMILAR", 'k'}, + {"SIMILAR TO", 'o'}, + {"SIN", 'f'}, + {"SLEEP", 'f'}, + {"SMALLDATETIMEFROMPARTS", 'f'}, + {"SMALLINT", 't'}, + {"SMALLSERIAL", 't'}, + {"SOME", 'f'}, + {"SOUNDEX", 'f'}, + {"SOUNDS", 'o'}, + {"SOUNDS LIKE", 'o'}, + {"SPACE", 'f'}, + {"SPATIAL", 'k'}, + {"SPECIFIC", 'k'}, + {"SPLIT_PART", 'f'}, + {"SQL", 'k'}, + {"SQLEXCEPTION", 'k'}, + {"SQLITE_VERSION", 'f'}, + {"SQLSTATE", 'k'}, + {"SQLWARNING", 'k'}, + {"SQL_BIG_RESULT", 'k'}, + {"SQL_BUFFER_RESULT", 'k'}, + {"SQL_CACHE", 'k'}, + {"SQL_CALC_FOUND_ROWS", 'k'}, + {"SQL_NO_CACHE", 'k'}, + {"SQL_SMALL_RESULT", 'k'}, + {"SQL_VARIANT_PROPERTY", 'f'}, + {"SQRT", 'f'}, + {"SSL", 'k'}, + {"STARTING", 'k'}, + {"STATEMENT_TIMESTAMP", 'f'}, + {"STATS_DATE", 'f'}, + {"STDDEV", 'f'}, + {"STDDEV_POP", 'f'}, + {"STDDEV_SAMP", 'f'}, + {"STRAIGHT_JOIN", 'k'}, + {"STRCMP", 'f'}, + {"STRCOMP", 'f'}, + {"STRCONV", 'f'}, + {"STRING_AGG", 'f'}, + {"STRING_TO_ARRAY", 'f'}, + {"STRPOS", 'f'}, + {"STR_TO_DATE", 'f'}, + {"STUFF", 'f'}, + {"SUBDATE", 'f'}, + {"SUBSTR", 'f'}, + {"SUBSTRING", 'f'}, + {"SUBSTRING_INDEX", 'f'}, + {"SUBTIME", 'f'}, + {"SUM", 'f'}, + {"SUSER_ID", 'f'}, + {"SUSER_NAME", 'f'}, + {"SUSER_SID", 'f'}, + {"SUSER_SNAME", 'f'}, + {"SWITCHOFFET", 'f'}, + {"SYS.DATABASE_NAME", 'n'}, + {"SYS.FN_BUILTIN_PERMISSIONS", 'f'}, + {"SYS.FN_GET_AUDIT_FILE", 'f'}, + {"SYS.FN_MY_PERMISSIONS", 'f'}, + {"SYS.STRAGG", 'f'}, + {"SYSCOLUMNS", 'k'}, + {"SYSDATE", 'f'}, + {"SYSDATETIME", 'f'}, + {"SYSDATETIMEOFFSET", 'f'}, + {"SYSOBJECTS", 'k'}, + {"SYSTEM_USER", 'f'}, + {"SYSUSERS", 'k'}, + {"SYSUTCDATETME", 'f'}, + {"TABLE", 'n'}, + {"TAN", 'f'}, + {"TERMINATED", 'k'}, + {"TERTIARY_WEIGHTS", 'f'}, + {"TEXT", 't'}, + {"TEXTPOS", 'f'}, + {"TEXTPTR", 'f'}, + {"TEXTVALID", 'f'}, + {"THEN", 'k'}, + {"TIME", 'k'}, + {"TIMEDIFF", 'f'}, + {"TIMEFROMPARTS", 'f'}, + {"TIMEOFDAY", 'f'}, + {"TIMESERIAL", 'f'}, + {"TIMESTAMP", 't'}, + {"TIMESTAMPADD", 'f'}, + {"TIMEVALUE", 'f'}, + {"TIME_FORMAT", 'f'}, + {"TIME_TO_SEC", 'f'}, + {"TINYBLOB", 'k'}, + {"TINYINT", 'k'}, + {"TINYTEXT", 'k'}, + {"TODATETIMEOFFSET", 'f'}, + {"TOP", 'k'}, + {"TOTAL", 'f'}, + {"TOTAL_CHANGES", 'f'}, + {"TO_ASCII", 'f'}, + {"TO_BASE64", 'f'}, + {"TO_CHAR", 'f'}, + {"TO_DATE", 'f'}, + {"TO_DAYS", 'f'}, + {"TO_HEX", 'f'}, + {"TO_NUMBER", 'f'}, + {"TO_SECONDS", 'f'}, + {"TO_TIMESTAMP", 'f'}, + {"TRAILING", 'n'}, + {"TRANSACTION_TIMESTAMP", 'f'}, + {"TRANSLATE", 'f'}, + {"TRIGGER", 'k'}, + {"TRIGGER_NESTLEVEL", 'f'}, + {"TRIM", 'f'}, + {"TRUE", '1'}, + {"TRUNC", 'f'}, + {"TRUNCATE", 'f'}, + {"TRY", 'T'}, + {"TRY_CAST", 'f'}, + {"TRY_CONVERT", 'f'}, + {"TRY_PARSE", 'f'}, + {"TYPEOF", 'f'}, + {"TYPEPROPERTY", 'f'}, + {"TYPE_ID", 'f'}, + {"TYPE_NAME", 'f'}, + {"UCASE", 'f'}, + {"UESCAPE", 'o'}, + {"UNCOMPRESS", 'f'}, + {"UNCOMPRESS_LENGTH", 'f'}, + {"UNDO", 'k'}, + {"UNHEX", 'f'}, + {"UNICODE", 'f'}, + {"UNION", 'U'}, + {"UNION ALL", 'U'}, + {"UNION ALL DISTINCT", 'U'}, + {"UNION DISTINCT", 'U'}, + {"UNION DISTINCT ALL", 'U'}, + {"UNIQUE", 'n'}, + {"UNIX_TIMESTAMP", 'f'}, + {"UNI_ON", 'U'}, + {"UNKNOWN", 'v'}, + {"UNLOCK", 'k'}, + {"UNNEST", 'f'}, + {"UNSIGNED", 'k'}, + {"UPDATE", 'E'}, + {"UPDATEXML", 'f'}, + {"UPPER", 'f'}, + {"UPPER_INC", 'f'}, + {"UPPER_INF", 'f'}, + {"USAGE", 'k'}, + {"USE", 'T'}, + {"USER", 'n'}, + {"USER_ID", 'n'}, + {"USER_LOCK.SLEEP", 'f'}, + {"USER_NAME", 'n'}, + {"USING", 'f'}, + {"UTC_DATE", 'k'}, + {"UTC_TIME", 'k'}, + {"UTC_TIMESTAMP", 'k'}, + {"UTL_HTTP.REQUEST", 'f'}, + {"UTL_INADDR.GET_HOST_ADDRESS", 'f'}, + {"UTL_INADDR.GET_HOST_NAME", 'f'}, + {"UUID", 'f'}, + {"UUID_SHORT", 'f'}, + {"VALUES", 'k'}, + {"VAR", 'f'}, + {"VARBINARY", 'k'}, + {"VARCHAR", 't'}, + {"VARCHARACTER", 'k'}, + {"VARIANCE", 'f'}, + {"VARP", 'f'}, + {"VARYING", 'k'}, + {"VAR_POP", 'f'}, + {"VAR_SAMP", 'f'}, + {"VERIFYSIGNEDBYASMKEY", 'f'}, + {"VERIFYSIGNEDBYCERT", 'f'}, + {"VERSION", 'f'}, + {"VOID", 't'}, + {"WAIT", 'k'}, + {"WAITFOR", 'n'}, + {"WAITFOR DELAY", 'E'}, + {"WAITFOR RECEIVE", 'E'}, + {"WAITFOR TIME", 'E'}, + {"WEEK", 'f'}, + {"WEEKDAY", 'f'}, + {"WEEKDAYNAME", 'f'}, + {"WEEKOFYEAR", 'f'}, + {"WHEN", 'k'}, + {"WHERE", 'k'}, + {"WHILE", 'T'}, + {"WIDTH_BUCKET", 'f'}, + {"WITH", 'n'}, + {"WITH ROLLUP", 'k'}, + {"XMLAGG", 'f'}, + {"XMLCOMMENT", 'f'}, + {"XMLCONCAT", 'f'}, + {"XMLELEMENT", 'f'}, + {"XMLEXISTS", 'f'}, + {"XMLFOREST", 'f'}, + {"XMLFORMAT", 'f'}, + {"XMLPI", 'f'}, + {"XMLROOT", 'f'}, + {"XMLTYPE", 'f'}, + {"XML_IS_WELL_FORMED", 'f'}, + {"XOR", '&'}, + {"XPATH", 'f'}, + {"XPATH_EXISTS", 'f'}, + {"XP_EXECRESULTSET", 'k'}, + {"YEAR", 'f'}, + {"YEARWEEK", 'f'}, + {"YEAR_MONTH", 'k'}, + {"ZEROBLOB", 'f'}, + {"ZEROFILL", 'k'}, + {"^=", 'o'}, + {"_ARMSCII8", 't'}, + {"_ASCII", 't'}, + {"_BIG5", 't'}, + {"_BINARY", 't'}, + {"_CP1250", 't'}, + {"_CP1251", 't'}, + {"_CP1257", 't'}, + {"_CP850", 't'}, + {"_CP852", 't'}, + {"_CP866", 't'}, + {"_CP932", 't'}, + {"_DEC8", 't'}, + {"_EUCJPMS", 't'}, + {"_EUCKR", 't'}, + {"_GB2312", 't'}, + {"_GBK", 't'}, + {"_GEOSTD8", 't'}, + {"_GREEK", 't'}, + {"_HEBREW", 't'}, + {"_HP8", 't'}, + {"_KEYBCS2", 't'}, + {"_KOI8R", 't'}, + {"_KOI8U", 't'}, + {"_LATIN1", 't'}, + {"_LATIN2", 't'}, + {"_LATIN5", 't'}, + {"_LATIN7", 't'}, + {"_MACCE", 't'}, + {"_MACROMAN", 't'}, + {"_SJIS", 't'}, + {"_SWE7", 't'}, + {"_TIS620", 't'}, + {"_UJIS", 't'}, + {"_USC2", 't'}, + {"_UTF8", 't'}, + {"|/", 'o'}, + {"|=", 'o'}, + {"||", '&'}, + {"~*", 'o'}, +}; +static const size_t sql_keywords_sz = 9352; +#endif diff --git a/src/components/implementation/simple_nf/ndpi/libinjection_xss.c b/src/components/implementation/simple_nf/ndpi/libinjection_xss.c new file mode 100644 index 0000000000..f0df4d84ac --- /dev/null +++ b/src/components/implementation/simple_nf/ndpi/libinjection_xss.c @@ -0,0 +1,532 @@ + +#include "libinjection.h" +#include "libinjection_xss.h" +#include "libinjection_html5.h" + +#include +#include + +typedef enum attribute { + TYPE_NONE + , TYPE_BLACK /* ban always */ + , TYPE_ATTR_URL /* attribute value takes a URL-like object */ + , TYPE_STYLE + , TYPE_ATTR_INDIRECT /* attribute *name* is given in *value* */ +} attribute_t; + + +static attribute_t is_black_attr(const char* s, size_t len); +static int is_black_tag(const char* s, size_t len); +static int is_black_url(const char* s, size_t len); +static int cstrcasecmp_with_null(const char *a, const char *b, size_t n); +static int html_decode_char_at(const char* src, size_t len, size_t* consumed); +static int htmlencode_startswith(const char* prefix, const char *src, size_t n); + + +typedef struct stringtype { + const char* name; + attribute_t atype; +} stringtype_t; + + +static const int gsHexDecodeMap[256] = { + 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, + 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, + 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, + 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, + 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 256, 256, + 256, 256, 256, 256, 256, 10, 11, 12, 13, 14, 15, 256, + 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, + 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, + 256, 10, 11, 12, 13, 14, 15, 256, 256, 256, 256, 256, + 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, + 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, + 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, + 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, + 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, + 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, + 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, + 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, + 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, + 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, + 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, + 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, + 256, 256, 256, 256 +}; + +static int html_decode_char_at(const char* src, size_t len, size_t* consumed) +{ + int val = 0; + size_t i; + int ch; + + if (len == 0 || src == NULL) { + *consumed = 0; + return -1; + } + + *consumed = 1; + if (*src != '&' || len < 2) { + return (unsigned char)(*src); + } + + + if (*(src+1) != '#') { + /* normally this would be for named entities + * but for this case we don't actually care + */ + return '&'; + } + + if (*(src+2) == 'x' || *(src+2) == 'X') { + ch = (unsigned char) (*(src+3)); + ch = gsHexDecodeMap[ch]; + if (ch == 256) { + /* degenerate case '&#[?]' */ + return '&'; + } + val = ch; + i = 4; + while (i < len) { + ch = (unsigned char) src[i]; + if (ch == ';') { + *consumed = i + 1; + return val; + } + ch = gsHexDecodeMap[ch]; + if (ch == 256) { + *consumed = i; + return val; + } + val = (val * 16) + ch; + if (val > 0x1000FF) { + return '&'; + } + ++i; + } + *consumed = i; + return val; + } else { + i = 2; + ch = (unsigned char) src[i]; + if (ch < '0' || ch > '9') { + return '&'; + } + val = ch - '0'; + i += 1; + while (i < len) { + ch = (unsigned char) src[i]; + if (ch == ';') { + *consumed = i + 1; + return val; + } + if (ch < '0' || ch > '9') { + *consumed = i; + return val; + } + val = (val * 10) + (ch - '0'); + if (val > 0x1000FF) { + return '&'; + } + ++i; + } + *consumed = i; + return val; + } +} + + +/* + * view-source: + * data: + * javascript: + */ +static stringtype_t BLACKATTR[] = { + { "ACTION", TYPE_ATTR_URL } /* form */ + , { "ATTRIBUTENAME", TYPE_ATTR_INDIRECT } /* SVG allow indirection of attribute names */ + , { "BY", TYPE_ATTR_URL } /* SVG */ + , { "BACKGROUND", TYPE_ATTR_URL } /* IE6, O11 */ + , { "DATAFORMATAS", TYPE_BLACK } /* IE */ + , { "DATASRC", TYPE_BLACK } /* IE */ + , { "DYNSRC", TYPE_ATTR_URL } /* Obsolete img attribute */ + , { "FILTER", TYPE_STYLE } /* Opera, SVG inline style */ + , { "FORMACTION", TYPE_ATTR_URL } /* HTML 5 */ + , { "FOLDER", TYPE_ATTR_URL } /* Only on A tags, IE-only */ + , { "FROM", TYPE_ATTR_URL } /* SVG */ + , { "HANDLER", TYPE_ATTR_URL } /* SVG Tiny, Opera */ + , { "HREF", TYPE_ATTR_URL } + , { "LOWSRC", TYPE_ATTR_URL } /* Obsolete img attribute */ + , { "POSTER", TYPE_ATTR_URL } /* Opera 10,11 */ + , { "SRC", TYPE_ATTR_URL } + , { "STYLE", TYPE_STYLE } + , { "TO", TYPE_ATTR_URL } /* SVG */ + , { "VALUES", TYPE_ATTR_URL } /* SVG */ + , { "XLINK:HREF", TYPE_ATTR_URL } + , { NULL, TYPE_NONE } +}; + +/* xmlns */ +/* `xml-stylesheet` > , */ + +/* + static const char* BLACKATTR[] = { + "ATTRIBUTENAME", + "BACKGROUND", + "DATAFORMATAS", + "HREF", + "SCROLL", + "SRC", + "STYLE", + "SRCDOC", + NULL + }; +*/ + +static const char* BLACKTAG[] = { + "APPLET" + /* , "AUDIO" */ + , "BASE" + , "COMMENT" /* IE http://html5sec.org/#38 */ + , "EMBED" + /* , "FORM" */ + , "FRAME" + , "FRAMESET" + , "HANDLER" /* Opera SVG, effectively a script tag */ + , "IFRAME" + , "IMPORT" + , "ISINDEX" + , "LINK" + , "LISTENER" + /* , "MARQUEE" */ + , "META" + , "NOSCRIPT" + , "OBJECT" + , "SCRIPT" + , "STYLE" + /* , "VIDEO" */ + , "VMLFRAME" + , "XML" + , "XSS" + , NULL +}; + + +static int cstrcasecmp_with_null(const char *a, const char *b, size_t n) +{ + char ca; + char cb; + /* printf("Comparing to %s %.*s\n", a, (int)n, b); */ + while (n-- > 0) { + cb = *b++; + if (cb == '\0') continue; + + ca = *a++; + + if (cb >= 'a' && cb <= 'z') { + cb -= 0x20; + } + /* printf("Comparing %c vs %c with %d left\n", ca, cb, (int)n); */ + if (ca != cb) { + return 1; + } + } + + if (*a == 0) { + /* printf(" MATCH \n"); */ + return 0; + } else { + return 1; + } +} + +/* + * Does an HTML encoded binary string (const char*, length) start with + * a all uppercase c-string (null terminated), case insensitive! + * + * also ignore any embedded nulls in the HTML string! + * + * return 1 if match / starts with + * return 0 if not + */ +static int htmlencode_startswith(const char *a, const char *b, size_t n) +{ + size_t consumed; + int cb; + int first = 1; + /* printf("Comparing %s with %.*s\n", a,(int)n,b); */ + while (n > 0) { + if (*a == 0) { + /* printf("Match EOL!\n"); */ + return 1; + } + cb = html_decode_char_at(b, n, &consumed); + b += consumed; + n -= consumed; + + if (first && cb <= 32) { + /* ignore all leading whitespace and control characters */ + continue; + } + first = 0; + + if (cb == 0) { + /* always ignore null characters in user input */ + continue; + } + + if (cb == 10) { + /* always ignore vertical tab characters in user input */ + /* who allows this?? */ + continue; + } + + if (cb >= 'a' && cb <= 'z') { + /* upcase */ + cb -= 0x20; + } + + if (*a != (char) cb) { + /* printf(" %c != %c\n", *a, cb); */ + /* mismatch */ + return 0; + } + a++; + } + + return (*a == 0) ? 1 : 0; +} + +static int is_black_tag(const char* s, size_t len) +{ + const char** black; + + if (len < 3) { + return 0; + } + + black = BLACKTAG; + while (*black != NULL) { + if (cstrcasecmp_with_null(*black, s, len) == 0) { + /* printf("Got black tag %s\n", *black); */ + return 1; + } + black += 1; + } + + /* anything SVG related */ + if ((s[0] == 's' || s[0] == 'S') && + (s[1] == 'v' || s[1] == 'V') && + (s[2] == 'g' || s[2] == 'G')) { + /* printf("Got SVG tag \n"); */ + return 1; + } + + /* Anything XSL(t) related */ + if ((s[0] == 'x' || s[0] == 'X') && + (s[1] == 's' || s[1] == 'S') && + (s[2] == 'l' || s[2] == 'L')) { + /* printf("Got XSL tag\n"); */ + return 1; + } + + return 0; +} + +static attribute_t is_black_attr(const char* s, size_t len) +{ + stringtype_t* black; + + if (len < 2) { + return TYPE_NONE; + } + + if (len >= 5) { + /* JavaScript on.* */ + if ((s[0] == 'o' || s[0] == 'O') && (s[1] == 'n' || s[1] == 'N')) { + /* printf("Got JavaScript on- attribute name\n"); */ + return TYPE_BLACK; + } + + + + /* XMLNS can be used to create arbitrary tags */ + if (cstrcasecmp_with_null("XMLNS", s, 5) == 0 || cstrcasecmp_with_null("XLINK", s, 5) == 0) { + /* printf("Got XMLNS and XLINK tags\n"); */ + return TYPE_BLACK; + } + } + + black = BLACKATTR; + while (black->name != NULL) { + if (cstrcasecmp_with_null(black->name, s, len) == 0) { + /* printf("Got banned attribute name %s\n", black->name); */ + return black->atype; + } + black += 1; + } + + return TYPE_NONE; +} + +static int is_black_url(const char* s, size_t len) +{ + + static const char* data_url = "DATA"; + static const char* viewsource_url = "VIEW-SOURCE"; + + /* obsolete but interesting signal */ + static const char* vbscript_url = "VBSCRIPT"; + + /* covers JAVA, JAVASCRIPT, + colon */ + static const char* javascript_url = "JAVA"; + + /* skip whitespace */ + while (len > 0 && (*s <= 32 || *s >= 127)) { + /* + * HEY: this is a signed character. + * We are intentionally skipping high-bit characters too + * since they are not ASCII, and Opera sometimes uses UTF-8 whitespace. + * + * Also in EUC-JP some of the high bytes are just ignored. + */ + ++s; + --len; + } + + if (htmlencode_startswith(data_url, s, len)) { + return 1; + } + + if (htmlencode_startswith(viewsource_url, s, len)) { + return 1; + } + + if (htmlencode_startswith(javascript_url, s, len)) { + return 1; + } + + if (htmlencode_startswith(vbscript_url, s, len)) { + return 1; + } + return 0; +} + +int libinjection_is_xss(const char* s, size_t len, int flags) +{ + h5_state_t h5; + attribute_t attr = TYPE_NONE; + + libinjection_h5_init(&h5, s, len, (enum html5_flags) flags); + while (libinjection_h5_next(&h5)) { + if (h5.token_type != ATTR_VALUE) { + attr = TYPE_NONE; + } + + if (h5.token_type == DOCTYPE) { + return 1; + } else if (h5.token_type == TAG_NAME_OPEN) { + if (is_black_tag(h5.token_start, h5.token_len)) { + return 1; + } + } else if (h5.token_type == ATTR_NAME) { + attr = is_black_attr(h5.token_start, h5.token_len); + } else if (h5.token_type == ATTR_VALUE) { + /* + * IE6,7,8 parsing works a bit differently so + * a whole