From 425abc59c1de4a82c12ae667d269a8a95679b4c3 Mon Sep 17 00:00:00 2001 From: alan-baker Date: Thu, 14 Nov 2024 14:13:00 -0500 Subject: [PATCH] Update LLVM (#1419) * Update tests to use splat disassembly --- deps.json | 2 +- ...read_image3d_with_literal_unorm_sampler.ll | 2 +- .../read_image3d_with_non_literal_sampler.ll | 2 +- test/IntegerBuiltins/add_sat/add_sat_char2.ll | 2 +- test/IntegerBuiltins/add_sat/add_sat_char3.ll | 2 +- test/IntegerBuiltins/add_sat/add_sat_char4.ll | 2 +- .../add_sat/add_sat_hack_clamp_char2.ll | 2 +- .../add_sat/add_sat_hack_clamp_char3.ll | 2 +- .../add_sat/add_sat_hack_clamp_char4.ll | 2 +- .../add_sat/add_sat_hack_clamp_int2.ll | 4 +-- .../add_sat/add_sat_hack_clamp_int3.ll | 4 +-- .../add_sat/add_sat_hack_clamp_int4.ll | 4 +-- .../add_sat/add_sat_hack_clamp_long2.ll | 4 +-- .../add_sat/add_sat_hack_clamp_long3.ll | 4 +-- .../add_sat/add_sat_hack_clamp_long4.ll | 4 +-- .../add_sat/add_sat_hack_clamp_short2.ll | 2 +- .../add_sat/add_sat_hack_clamp_short3.ll | 2 +- .../add_sat/add_sat_hack_clamp_short4.ll | 2 +- .../add_sat/add_sat_hack_clamp_test_gen.cpp | 8 +----- .../add_sat/add_sat_hack_clamp_uchar2.ll | 2 +- .../add_sat/add_sat_hack_clamp_uchar3.ll | 2 +- .../add_sat/add_sat_hack_clamp_uchar4.ll | 2 +- .../add_sat/add_sat_hack_clamp_uint2.ll | 2 +- .../add_sat/add_sat_hack_clamp_uint3.ll | 2 +- .../add_sat/add_sat_hack_clamp_uint4.ll | 2 +- .../add_sat/add_sat_hack_clamp_ulong2.ll | 2 +- .../add_sat/add_sat_hack_clamp_ulong3.ll | 2 +- .../add_sat/add_sat_hack_clamp_ulong4.ll | 2 +- .../add_sat/add_sat_hack_clamp_ushort2.ll | 2 +- .../add_sat/add_sat_hack_clamp_ushort3.ll | 2 +- .../add_sat/add_sat_hack_clamp_ushort4.ll | 2 +- test/IntegerBuiltins/add_sat/add_sat_int2.ll | 4 +-- test/IntegerBuiltins/add_sat/add_sat_int3.ll | 4 +-- test/IntegerBuiltins/add_sat/add_sat_int4.ll | 4 +-- test/IntegerBuiltins/add_sat/add_sat_long2.ll | 4 +-- test/IntegerBuiltins/add_sat/add_sat_long3.ll | 4 +-- test/IntegerBuiltins/add_sat/add_sat_long4.ll | 4 +-- .../IntegerBuiltins/add_sat/add_sat_short2.ll | 2 +- .../IntegerBuiltins/add_sat/add_sat_short3.ll | 2 +- .../IntegerBuiltins/add_sat/add_sat_short4.ll | 2 +- .../add_sat/add_sat_test_gen.cpp | 8 +----- .../IntegerBuiltins/add_sat/add_sat_uchar2.ll | 2 +- .../IntegerBuiltins/add_sat/add_sat_uchar3.ll | 2 +- .../IntegerBuiltins/add_sat/add_sat_uchar4.ll | 2 +- test/IntegerBuiltins/add_sat/add_sat_uint2.ll | 2 +- test/IntegerBuiltins/add_sat/add_sat_uint3.ll | 2 +- test/IntegerBuiltins/add_sat/add_sat_uint4.ll | 2 +- .../IntegerBuiltins/add_sat/add_sat_ulong2.ll | 2 +- .../IntegerBuiltins/add_sat/add_sat_ulong3.ll | 2 +- .../IntegerBuiltins/add_sat/add_sat_ulong4.ll | 2 +- .../add_sat/add_sat_ushort2.ll | 2 +- .../add_sat/add_sat_ushort3.ll | 2 +- .../add_sat/add_sat_ushort4.ll | 2 +- test/IntegerBuiltins/clz/char2_clz.ll | 2 +- test/IntegerBuiltins/clz/long2_clz.ll | 6 ++-- test/IntegerBuiltins/clz/short2_clz.ll | 2 +- test/IntegerBuiltins/ctz/uchar2_ctz.ll | 2 +- test/IntegerBuiltins/ctz/ulong2_ctz.ll | 6 ++-- test/IntegerBuiltins/ctz/ushort2_ctz.ll | 2 +- test/IntegerBuiltins/hadd/hadd_char2.ll | 6 ++-- test/IntegerBuiltins/hadd/hadd_char3.ll | 6 ++-- test/IntegerBuiltins/hadd/hadd_char4.ll | 6 ++-- test/IntegerBuiltins/hadd/hadd_int2.ll | 6 ++-- test/IntegerBuiltins/hadd/hadd_int3.ll | 6 ++-- test/IntegerBuiltins/hadd/hadd_int4.ll | 6 ++-- test/IntegerBuiltins/hadd/hadd_long2.ll | 6 ++-- test/IntegerBuiltins/hadd/hadd_long3.ll | 6 ++-- test/IntegerBuiltins/hadd/hadd_long4.ll | 6 ++-- test/IntegerBuiltins/hadd/hadd_short2.ll | 6 ++-- test/IntegerBuiltins/hadd/hadd_short3.ll | 6 ++-- test/IntegerBuiltins/hadd/hadd_short4.ll | 6 ++-- test/IntegerBuiltins/hadd/hadd_test_gen.cpp | 10 ++----- test/IntegerBuiltins/hadd/hadd_uchar2.ll | 6 ++-- test/IntegerBuiltins/hadd/hadd_uchar3.ll | 6 ++-- test/IntegerBuiltins/hadd/hadd_uchar4.ll | 6 ++-- test/IntegerBuiltins/hadd/hadd_uint2.ll | 6 ++-- test/IntegerBuiltins/hadd/hadd_uint3.ll | 6 ++-- test/IntegerBuiltins/hadd/hadd_uint4.ll | 6 ++-- test/IntegerBuiltins/hadd/hadd_ulong2.ll | 6 ++-- test/IntegerBuiltins/hadd/hadd_ulong3.ll | 6 ++-- test/IntegerBuiltins/hadd/hadd_ulong4.ll | 6 ++-- test/IntegerBuiltins/hadd/hadd_ushort2.ll | 6 ++-- test/IntegerBuiltins/hadd/hadd_ushort3.ll | 6 ++-- test/IntegerBuiltins/hadd/hadd_ushort4.ll | 6 ++-- test/IntegerBuiltins/hadd/rhadd_char2.ll | 6 ++-- test/IntegerBuiltins/hadd/rhadd_char3.ll | 6 ++-- test/IntegerBuiltins/hadd/rhadd_char4.ll | 6 ++-- test/IntegerBuiltins/hadd/rhadd_int2.ll | 6 ++-- test/IntegerBuiltins/hadd/rhadd_int3.ll | 6 ++-- test/IntegerBuiltins/hadd/rhadd_int4.ll | 6 ++-- test/IntegerBuiltins/hadd/rhadd_long2.ll | 6 ++-- test/IntegerBuiltins/hadd/rhadd_long3.ll | 6 ++-- test/IntegerBuiltins/hadd/rhadd_long4.ll | 6 ++-- test/IntegerBuiltins/hadd/rhadd_short2.ll | 6 ++-- test/IntegerBuiltins/hadd/rhadd_short3.ll | 6 ++-- test/IntegerBuiltins/hadd/rhadd_short4.ll | 6 ++-- test/IntegerBuiltins/hadd/rhadd_uchar2.ll | 6 ++-- test/IntegerBuiltins/hadd/rhadd_uchar3.ll | 6 ++-- test/IntegerBuiltins/hadd/rhadd_uchar4.ll | 6 ++-- test/IntegerBuiltins/hadd/rhadd_uint2.ll | 6 ++-- test/IntegerBuiltins/hadd/rhadd_uint3.ll | 6 ++-- test/IntegerBuiltins/hadd/rhadd_uint4.ll | 6 ++-- test/IntegerBuiltins/hadd/rhadd_ulong2.ll | 6 ++-- test/IntegerBuiltins/hadd/rhadd_ulong3.ll | 6 ++-- test/IntegerBuiltins/hadd/rhadd_ulong4.ll | 6 ++-- test/IntegerBuiltins/hadd/rhadd_ushort2.ll | 6 ++-- test/IntegerBuiltins/hadd/rhadd_ushort3.ll | 6 ++-- test/IntegerBuiltins/hadd/rhadd_ushort4.ll | 6 ++-- test/IntegerBuiltins/mad_sat/mad_sat_char2.ll | 2 +- .../mad_sat/mad_sat_hack_clamp_char2.ll | 2 +- .../mad_sat/mad_sat_hack_clamp_int2.ll | 22 +++++++-------- .../mad_sat/mad_sat_hack_clamp_long2.ll | 22 +++++++-------- .../mad_sat/mad_sat_hack_clamp_short2.ll | 2 +- .../mad_sat/mad_sat_hack_clamp_test_gen.cpp | 10 ++----- .../mad_sat/mad_sat_hack_clamp_uchar2.ll | 2 +- .../mad_sat/mad_sat_hack_clamp_uint2.ll | 2 +- .../mad_sat/mad_sat_hack_clamp_ulong2.ll | 2 +- .../mad_sat/mad_sat_hack_clamp_ushort2.ll | 2 +- test/IntegerBuiltins/mad_sat/mad_sat_int2.ll | 22 +++++++-------- test/IntegerBuiltins/mad_sat/mad_sat_long2.ll | 22 +++++++-------- .../IntegerBuiltins/mad_sat/mad_sat_short2.ll | 2 +- .../mad_sat/mad_sat_test_gen.cpp | 10 ++----- .../IntegerBuiltins/mad_sat/mad_sat_uchar2.ll | 2 +- test/IntegerBuiltins/mad_sat/mad_sat_uint2.ll | 2 +- .../IntegerBuiltins/mad_sat/mad_sat_ulong2.ll | 2 +- .../mad_sat/mad_sat_ushort2.ll | 2 +- test/IntegerBuiltins/rotate/rotate_uchar3.ll | 6 ++-- test/IntegerBuiltins/rotate/rotate_uint3.ll | 6 ++-- test/IntegerBuiltins/rotate/rotate_ulong3.ll | 6 ++-- test/IntegerBuiltins/rotate/rotate_ushort3.ll | 6 ++-- test/IntegerBuiltins/sub_sat/sub_sat_char2.ll | 2 +- test/IntegerBuiltins/sub_sat/sub_sat_char3.ll | 2 +- test/IntegerBuiltins/sub_sat/sub_sat_char4.ll | 2 +- .../sub_sat/sub_sat_hack_clamp_char2.ll | 2 +- .../sub_sat/sub_sat_hack_clamp_char3.ll | 2 +- .../sub_sat/sub_sat_hack_clamp_char4.ll | 2 +- .../sub_sat/sub_sat_hack_clamp_int2.ll | 4 +-- .../sub_sat/sub_sat_hack_clamp_int3.ll | 4 +-- .../sub_sat/sub_sat_hack_clamp_int4.ll | 4 +-- .../sub_sat/sub_sat_hack_clamp_long2.ll | 4 +-- .../sub_sat/sub_sat_hack_clamp_long3.ll | 4 +-- .../sub_sat/sub_sat_hack_clamp_long4.ll | 4 +-- .../sub_sat/sub_sat_hack_clamp_short2.ll | 2 +- .../sub_sat/sub_sat_hack_clamp_short3.ll | 2 +- .../sub_sat/sub_sat_hack_clamp_short4.ll | 2 +- .../sub_sat/sub_sat_hack_clamp_test_gen.cpp | 8 +----- test/IntegerBuiltins/sub_sat/sub_sat_int2.ll | 4 +-- test/IntegerBuiltins/sub_sat/sub_sat_int3.ll | 4 +-- test/IntegerBuiltins/sub_sat/sub_sat_int4.ll | 4 +-- test/IntegerBuiltins/sub_sat/sub_sat_long2.ll | 4 +-- test/IntegerBuiltins/sub_sat/sub_sat_long3.ll | 4 +-- test/IntegerBuiltins/sub_sat/sub_sat_long4.ll | 4 +-- .../IntegerBuiltins/sub_sat/sub_sat_short2.ll | 2 +- .../IntegerBuiltins/sub_sat/sub_sat_short3.ll | 2 +- .../IntegerBuiltins/sub_sat/sub_sat_short4.ll | 2 +- .../sub_sat/sub_sat_test_gen.cpp | 8 +----- test/LLVMIntrinsics/bswap/bswap_v2i16.ll | 4 +-- test/LLVMIntrinsics/bswap/bswap_v2i32.ll | 12 ++++---- test/LLVMIntrinsics/bswap/bswap_v2i64.ll | 28 +++++++++---------- test/MathBuiltins/cospi/cospi_double2.ll | 2 +- test/MathBuiltins/cospi/cospi_float2.ll | 2 +- test/MathBuiltins/expm1/expm1_double2.ll | 2 +- test/MathBuiltins/expm1/expm1_float2.ll | 2 +- .../MathBuiltins/isfinite/isfinite_double2.ll | 6 ++-- .../MathBuiltins/isfinite/isfinite_double3.ll | 6 ++-- .../MathBuiltins/isfinite/isfinite_double4.ll | 6 ++-- test/MathBuiltins/isfinite/isfinite_float2.ll | 6 ++-- test/MathBuiltins/isfinite/isfinite_float3.ll | 6 ++-- test/MathBuiltins/isfinite/isfinite_float4.ll | 6 ++-- test/MathBuiltins/isfinite/isfinite_half2.ll | 6 ++-- test/MathBuiltins/isfinite/isfinite_half3.ll | 6 ++-- test/MathBuiltins/isfinite/isfinite_half4.ll | 6 ++-- test/MathBuiltins/log/float2_log1p.ll | 2 +- test/MathBuiltins/log/float3_log1p.ll | 2 +- test/MathBuiltins/log/float4_log1p.ll | 2 +- test/MathBuiltins/sinpi/sinpi_double2.ll | 2 +- test/MathBuiltins/sinpi/sinpi_float2.ll | 2 +- test/MathBuiltins/tanpi/tanpi_double2.ll | 2 +- test/MathBuiltins/tanpi/tanpi_float2.ll | 2 +- test/PointerCasts/issue-1166.ll | 4 +-- test/RelationalBuiltins/isinf_overloads.ll | 12 ++++---- test/RelationalBuiltins/isnan_overloads.ll | 12 ++++---- .../isnormal/isnormal_double2.ll | 6 ++-- .../isnormal/isnormal_float2.ll | 6 ++-- .../isnormal/isnormal_half2.ll | 6 ++-- test/extract_constant.ll | 8 +++--- test/hack_scf/const_vec2.ll | 20 ++++++------- test/hack_scf/greater_than_const_vec4.ll | 4 +-- test/hack_scf/llvm_smax.ll | 4 +-- test/hack_scf/llvm_smin.ll | 4 +-- test/hack_scf/sclamp.ll | 8 +++--- test/hack_scf/smax.ll | 4 +-- test/hack_scf/smin.ll | 4 +-- 193 files changed, 442 insertions(+), 484 deletions(-) diff --git a/deps.json b/deps.json index d583d9f36..e5d2a64b2 100644 --- a/deps.json +++ b/deps.json @@ -6,7 +6,7 @@ "subrepo" : "llvm/llvm-project", "branch" : "main", "subdir" : "third_party/llvm", - "commit" : "8431494094c8732d1426763d3e1aae322fa76830" + "commit" : "4cdfa2a2c80d59db10d1a17e4ff0ec9902952759" }, { "name" : "SPIRV-Headers", diff --git a/test/ImageBuiltins/read_image3d_with_literal_unorm_sampler.ll b/test/ImageBuiltins/read_image3d_with_literal_unorm_sampler.ll index e334cf010..77d264f65 100644 --- a/test/ImageBuiltins/read_image3d_with_literal_unorm_sampler.ll +++ b/test/ImageBuiltins/read_image3d_with_literal_unorm_sampler.ll @@ -6,7 +6,7 @@ ; CHECK: [[sizes:%[^ ]+]] = call <4 x i32> @_Z13get_image_dim11ocl_image3d(target("spirv.Image", void, 2, 0, 0, 0, 0, 0, 0) %img) ; CHECK: [[sizes_convert:%[^ ]+]] = sitofp <4 x i32> [[sizes]] to <4 x float> ; CHECK: [[floor:%[^ ]+]] = call <4 x float> @floor(<4 x float> [[convert]]) -; CHECK: [[add:%[^ ]+]] = fadd <4 x float> [[floor]], +; CHECK: [[add:%[^ ]+]] = fadd <4 x float> [[floor]], splat (float 5.000000e-01) ; CHECK: [[div:%[^ ]+]] = fdiv <4 x float> [[add]], [[sizes_convert]] ; CHECK: call <4 x float> @_Z11read_imagef14ocl_image3d_ro11ocl_samplerDv4_f(target("spirv.Image", void, 2, 0, 0, 0, 0, 0, 0) %img, target("spirv.Sampler") [[sampler]], <4 x float> [[div]]) diff --git a/test/ImageBuiltins/read_image3d_with_non_literal_sampler.ll b/test/ImageBuiltins/read_image3d_with_non_literal_sampler.ll index fce9b3beb..a3c468082 100644 --- a/test/ImageBuiltins/read_image3d_with_non_literal_sampler.ll +++ b/test/ImageBuiltins/read_image3d_with_non_literal_sampler.ll @@ -5,7 +5,7 @@ ; CHECK: [[image_dim:%[^ ]+]] = call <4 x i32> @_Z13get_image_dim11ocl_image3d(target("spirv.Image", float, 2, 0, 0, 0, 1, 0, 0, 0) %0) ; CHECK: [[convert:%[^ ]+]] = sitofp <4 x i32> [[image_dim]] to <4 x float> ; CHECK: [[floor:%[^ ]+]] = call <4 x float> @floor(<4 x float> [[coord]]) -; CHECK: [[fadd:%[^ ]+]] = fadd <4 x float> [[floor]], +; CHECK: [[fadd:%[^ ]+]] = fadd <4 x float> [[floor]], splat (float 5.000000e-01) ; CHECK: [[fdiv_nearest:%[^ ]+]] = fdiv <4 x float> [[fadd]], [[convert]] ; CHECK: [[fdiv_linear:%[^ ]+]] = fdiv <4 x float> [[coord]], [[convert]] ; CHECK: [[sampler_mask:%[^ ]+]] = call i32 @clspv.get_normalized_sampler_mask(), !sampler_mask_push_constant_offset !29 diff --git a/test/IntegerBuiltins/add_sat/add_sat_char2.ll b/test/IntegerBuiltins/add_sat/add_sat_char2.ll index d69ecb96a..ae09228b7 100644 --- a/test/IntegerBuiltins/add_sat/add_sat_char2.ll +++ b/test/IntegerBuiltins/add_sat/add_sat_char2.ll @@ -20,6 +20,6 @@ declare <2 x i8> @_Z7add_satDv2_cS_(<2 x i8>, <2 x i8>) ; CHECK: [[sext_a:%[a-zA-Z0-9_.]+]] = sext <2 x i8> %a to <2 x i16> ; CHECK: [[sext_b:%[a-zA-Z0-9_.]+]] = sext <2 x i8> %b to <2 x i16> ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add nuw nsw <2 x i16> [[sext_a]], [[sext_b]] -; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <2 x i16> @_Z5clampDv2_sS_S_(<2 x i16> [[add]], <2 x i16> , <2 x i16> ) +; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <2 x i16> @_Z5clampDv2_sS_S_(<2 x i16> [[add]], <2 x i16> splat (i16 -128), <2 x i16> splat (i16 127)) ; CHECK: [[trunc:%[a-zA-Z0-9_.]+]] = trunc <2 x i16> [[clamp]] to <2 x i8> ; CHECK: ret <2 x i8> [[trunc]] diff --git a/test/IntegerBuiltins/add_sat/add_sat_char3.ll b/test/IntegerBuiltins/add_sat/add_sat_char3.ll index d1514e409..7ae44c0d5 100644 --- a/test/IntegerBuiltins/add_sat/add_sat_char3.ll +++ b/test/IntegerBuiltins/add_sat/add_sat_char3.ll @@ -20,6 +20,6 @@ declare <3 x i8> @_Z7add_satDv3_cS_(<3 x i8>, <3 x i8>) ; CHECK: [[sext_a:%[a-zA-Z0-9_.]+]] = sext <3 x i8> %a to <3 x i16> ; CHECK: [[sext_b:%[a-zA-Z0-9_.]+]] = sext <3 x i8> %b to <3 x i16> ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add nuw nsw <3 x i16> [[sext_a]], [[sext_b]] -; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <3 x i16> @_Z5clampDv3_sS_S_(<3 x i16> [[add]], <3 x i16> , <3 x i16> ) +; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <3 x i16> @_Z5clampDv3_sS_S_(<3 x i16> [[add]], <3 x i16> splat (i16 -128), <3 x i16> splat (i16 127)) ; CHECK: [[trunc:%[a-zA-Z0-9_.]+]] = trunc <3 x i16> [[clamp]] to <3 x i8> ; CHECK: ret <3 x i8> [[trunc]] diff --git a/test/IntegerBuiltins/add_sat/add_sat_char4.ll b/test/IntegerBuiltins/add_sat/add_sat_char4.ll index 6e6ae7a77..14e05f28c 100644 --- a/test/IntegerBuiltins/add_sat/add_sat_char4.ll +++ b/test/IntegerBuiltins/add_sat/add_sat_char4.ll @@ -20,6 +20,6 @@ declare <4 x i8> @_Z7add_satDv4_cS_(<4 x i8>, <4 x i8>) ; CHECK: [[sext_a:%[a-zA-Z0-9_.]+]] = sext <4 x i8> %a to <4 x i16> ; CHECK: [[sext_b:%[a-zA-Z0-9_.]+]] = sext <4 x i8> %b to <4 x i16> ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add nuw nsw <4 x i16> [[sext_a]], [[sext_b]] -; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <4 x i16> @_Z5clampDv4_sS_S_(<4 x i16> [[add]], <4 x i16> , <4 x i16> ) +; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <4 x i16> @_Z5clampDv4_sS_S_(<4 x i16> [[add]], <4 x i16> splat (i16 -128), <4 x i16> splat (i16 127)) ; CHECK: [[trunc:%[a-zA-Z0-9_.]+]] = trunc <4 x i16> [[clamp]] to <4 x i8> ; CHECK: ret <4 x i8> [[trunc]] diff --git a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_char2.ll b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_char2.ll index 57ff3b72f..4e0f4fb75 100644 --- a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_char2.ll +++ b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_char2.ll @@ -20,6 +20,6 @@ declare <2 x i8> @_Z7add_satDv2_cS_(<2 x i8>, <2 x i8>) ; CHECK: [[sext_a:%[a-zA-Z0-9_.]+]] = sext <2 x i8> %a to <2 x i32> ; CHECK: [[sext_b:%[a-zA-Z0-9_.]+]] = sext <2 x i8> %b to <2 x i32> ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add nuw nsw <2 x i32> [[sext_a]], [[sext_b]] -; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <2 x i32> @_Z5clampDv2_iS_S_(<2 x i32> [[add]], <2 x i32> , <2 x i32> ) +; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <2 x i32> @_Z5clampDv2_iS_S_(<2 x i32> [[add]], <2 x i32> splat (i32 -128), <2 x i32> splat (i32 127)) ; CHECK: [[trunc:%[a-zA-Z0-9_.]+]] = trunc <2 x i32> [[clamp]] to <2 x i8> ; CHECK: ret <2 x i8> [[trunc]] diff --git a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_char3.ll b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_char3.ll index bd627a03c..cc0288ccc 100644 --- a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_char3.ll +++ b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_char3.ll @@ -20,6 +20,6 @@ declare <3 x i8> @_Z7add_satDv3_cS_(<3 x i8>, <3 x i8>) ; CHECK: [[sext_a:%[a-zA-Z0-9_.]+]] = sext <3 x i8> %a to <3 x i32> ; CHECK: [[sext_b:%[a-zA-Z0-9_.]+]] = sext <3 x i8> %b to <3 x i32> ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add nuw nsw <3 x i32> [[sext_a]], [[sext_b]] -; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <3 x i32> @_Z5clampDv3_iS_S_(<3 x i32> [[add]], <3 x i32> , <3 x i32> ) +; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <3 x i32> @_Z5clampDv3_iS_S_(<3 x i32> [[add]], <3 x i32> splat (i32 -128), <3 x i32> splat (i32 127)) ; CHECK: [[trunc:%[a-zA-Z0-9_.]+]] = trunc <3 x i32> [[clamp]] to <3 x i8> ; CHECK: ret <3 x i8> [[trunc]] diff --git a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_char4.ll b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_char4.ll index 6bd993501..4112dbe86 100644 --- a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_char4.ll +++ b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_char4.ll @@ -20,6 +20,6 @@ declare <4 x i8> @_Z7add_satDv4_cS_(<4 x i8>, <4 x i8>) ; CHECK: [[sext_a:%[a-zA-Z0-9_.]+]] = sext <4 x i8> %a to <4 x i32> ; CHECK: [[sext_b:%[a-zA-Z0-9_.]+]] = sext <4 x i8> %b to <4 x i32> ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add nuw nsw <4 x i32> [[sext_a]], [[sext_b]] -; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <4 x i32> @_Z5clampDv4_iS_S_(<4 x i32> [[add]], <4 x i32> , <4 x i32> ) +; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <4 x i32> @_Z5clampDv4_iS_S_(<4 x i32> [[add]], <4 x i32> splat (i32 -128), <4 x i32> splat (i32 127)) ; CHECK: [[trunc:%[a-zA-Z0-9_.]+]] = trunc <4 x i32> [[clamp]] to <4 x i8> ; CHECK: ret <4 x i8> [[trunc]] diff --git a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_int2.ll b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_int2.ll index c4f49c77c..19bc315d4 100644 --- a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_int2.ll +++ b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_int2.ll @@ -21,7 +21,7 @@ declare <2 x i32> @_Z7add_satDv2_iS_(<2 x i32>, <2 x i32>) ; CHECK: [[b_lt_0:%[a-zA-Z0-9_.]+]] = icmp slt <2 x i32> %b, zeroinitializer ; CHECK: [[add_gt_a:%[a-zA-Z0-9_.]+]] = icmp sgt <2 x i32> [[add]], %a ; CHECK: [[add_lt_a:%[a-zA-Z0-9_.]+]] = icmp slt <2 x i32> [[add]], %a -; CHECK: [[min_clamp:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[add_gt_a]], <2 x i32> , <2 x i32> [[add]] -; CHECK: [[max_clamp:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[add_lt_a]], <2 x i32> , <2 x i32> [[add]] +; CHECK: [[min_clamp:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[add_gt_a]], <2 x i32> splat (i32 -2147483648), <2 x i32> [[add]] +; CHECK: [[max_clamp:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[add_lt_a]], <2 x i32> splat (i32 2147483647), <2 x i32> [[add]] ; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[b_lt_0]], <2 x i32> [[min_clamp]], <2 x i32> [[max_clamp]] ; CHECK: ret <2 x i32> [[sel]] diff --git a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_int3.ll b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_int3.ll index 8ca80d79f..a85f4a8f9 100644 --- a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_int3.ll +++ b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_int3.ll @@ -21,7 +21,7 @@ declare <3 x i32> @_Z7add_satDv3_iS_(<3 x i32>, <3 x i32>) ; CHECK: [[b_lt_0:%[a-zA-Z0-9_.]+]] = icmp slt <3 x i32> %b, zeroinitializer ; CHECK: [[add_gt_a:%[a-zA-Z0-9_.]+]] = icmp sgt <3 x i32> [[add]], %a ; CHECK: [[add_lt_a:%[a-zA-Z0-9_.]+]] = icmp slt <3 x i32> [[add]], %a -; CHECK: [[min_clamp:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[add_gt_a]], <3 x i32> , <3 x i32> [[add]] -; CHECK: [[max_clamp:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[add_lt_a]], <3 x i32> , <3 x i32> [[add]] +; CHECK: [[min_clamp:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[add_gt_a]], <3 x i32> splat (i32 -2147483648), <3 x i32> [[add]] +; CHECK: [[max_clamp:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[add_lt_a]], <3 x i32> splat (i32 2147483647), <3 x i32> [[add]] ; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[b_lt_0]], <3 x i32> [[min_clamp]], <3 x i32> [[max_clamp]] ; CHECK: ret <3 x i32> [[sel]] diff --git a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_int4.ll b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_int4.ll index ed4abd477..62a7e8227 100644 --- a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_int4.ll +++ b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_int4.ll @@ -21,7 +21,7 @@ declare <4 x i32> @_Z7add_satDv4_iS_(<4 x i32>, <4 x i32>) ; CHECK: [[b_lt_0:%[a-zA-Z0-9_.]+]] = icmp slt <4 x i32> %b, zeroinitializer ; CHECK: [[add_gt_a:%[a-zA-Z0-9_.]+]] = icmp sgt <4 x i32> [[add]], %a ; CHECK: [[add_lt_a:%[a-zA-Z0-9_.]+]] = icmp slt <4 x i32> [[add]], %a -; CHECK: [[min_clamp:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[add_gt_a]], <4 x i32> , <4 x i32> [[add]] -; CHECK: [[max_clamp:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[add_lt_a]], <4 x i32> , <4 x i32> [[add]] +; CHECK: [[min_clamp:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[add_gt_a]], <4 x i32> splat (i32 -2147483648), <4 x i32> [[add]] +; CHECK: [[max_clamp:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[add_lt_a]], <4 x i32> splat (i32 2147483647), <4 x i32> [[add]] ; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[b_lt_0]], <4 x i32> [[min_clamp]], <4 x i32> [[max_clamp]] ; CHECK: ret <4 x i32> [[sel]] diff --git a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_long2.ll b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_long2.ll index 06e63e67b..a3e9e381b 100644 --- a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_long2.ll +++ b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_long2.ll @@ -21,7 +21,7 @@ declare <2 x i64> @_Z7add_satDv2_lS_(<2 x i64>, <2 x i64>) ; CHECK: [[b_lt_0:%[a-zA-Z0-9_.]+]] = icmp slt <2 x i64> %b, zeroinitializer ; CHECK: [[add_gt_a:%[a-zA-Z0-9_.]+]] = icmp sgt <2 x i64> [[add]], %a ; CHECK: [[add_lt_a:%[a-zA-Z0-9_.]+]] = icmp slt <2 x i64> [[add]], %a -; CHECK: [[min_clamp:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[add_gt_a]], <2 x i64> , <2 x i64> [[add]] -; CHECK: [[max_clamp:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[add_lt_a]], <2 x i64> , <2 x i64> [[add]] +; CHECK: [[min_clamp:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[add_gt_a]], <2 x i64> splat (i64 -9223372036854775808), <2 x i64> [[add]] +; CHECK: [[max_clamp:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[add_lt_a]], <2 x i64> splat (i64 9223372036854775807), <2 x i64> [[add]] ; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[b_lt_0]], <2 x i64> [[min_clamp]], <2 x i64> [[max_clamp]] ; CHECK: ret <2 x i64> [[sel]] diff --git a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_long3.ll b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_long3.ll index bb3d21d16..3c964ff39 100644 --- a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_long3.ll +++ b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_long3.ll @@ -21,7 +21,7 @@ declare <3 x i64> @_Z7add_satDv3_lS_(<3 x i64>, <3 x i64>) ; CHECK: [[b_lt_0:%[a-zA-Z0-9_.]+]] = icmp slt <3 x i64> %b, zeroinitializer ; CHECK: [[add_gt_a:%[a-zA-Z0-9_.]+]] = icmp sgt <3 x i64> [[add]], %a ; CHECK: [[add_lt_a:%[a-zA-Z0-9_.]+]] = icmp slt <3 x i64> [[add]], %a -; CHECK: [[min_clamp:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[add_gt_a]], <3 x i64> , <3 x i64> [[add]] -; CHECK: [[max_clamp:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[add_lt_a]], <3 x i64> , <3 x i64> [[add]] +; CHECK: [[min_clamp:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[add_gt_a]], <3 x i64> splat (i64 -9223372036854775808), <3 x i64> [[add]] +; CHECK: [[max_clamp:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[add_lt_a]], <3 x i64> splat (i64 9223372036854775807), <3 x i64> [[add]] ; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[b_lt_0]], <3 x i64> [[min_clamp]], <3 x i64> [[max_clamp]] ; CHECK: ret <3 x i64> [[sel]] diff --git a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_long4.ll b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_long4.ll index 49e5b4d3b..d58069575 100644 --- a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_long4.ll +++ b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_long4.ll @@ -21,7 +21,7 @@ declare <4 x i64> @_Z7add_satDv4_lS_(<4 x i64>, <4 x i64>) ; CHECK: [[b_lt_0:%[a-zA-Z0-9_.]+]] = icmp slt <4 x i64> %b, zeroinitializer ; CHECK: [[add_gt_a:%[a-zA-Z0-9_.]+]] = icmp sgt <4 x i64> [[add]], %a ; CHECK: [[add_lt_a:%[a-zA-Z0-9_.]+]] = icmp slt <4 x i64> [[add]], %a -; CHECK: [[min_clamp:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[add_gt_a]], <4 x i64> , <4 x i64> [[add]] -; CHECK: [[max_clamp:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[add_lt_a]], <4 x i64> , <4 x i64> [[add]] +; CHECK: [[min_clamp:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[add_gt_a]], <4 x i64> splat (i64 -9223372036854775808), <4 x i64> [[add]] +; CHECK: [[max_clamp:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[add_lt_a]], <4 x i64> splat (i64 9223372036854775807), <4 x i64> [[add]] ; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[b_lt_0]], <4 x i64> [[min_clamp]], <4 x i64> [[max_clamp]] ; CHECK: ret <4 x i64> [[sel]] diff --git a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_short2.ll b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_short2.ll index 205710831..02b14309a 100644 --- a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_short2.ll +++ b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_short2.ll @@ -20,6 +20,6 @@ declare <2 x i16> @_Z7add_satDv2_sS_(<2 x i16>, <2 x i16>) ; CHECK: [[sext_a:%[a-zA-Z0-9_.]+]] = sext <2 x i16> %a to <2 x i32> ; CHECK: [[sext_b:%[a-zA-Z0-9_.]+]] = sext <2 x i16> %b to <2 x i32> ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add nuw nsw <2 x i32> [[sext_a]], [[sext_b]] -; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <2 x i32> @_Z5clampDv2_iS_S_(<2 x i32> [[add]], <2 x i32> , <2 x i32> ) +; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <2 x i32> @_Z5clampDv2_iS_S_(<2 x i32> [[add]], <2 x i32> splat (i32 -32768), <2 x i32> splat (i32 32767)) ; CHECK: [[trunc:%[a-zA-Z0-9_.]+]] = trunc <2 x i32> [[clamp]] to <2 x i16> ; CHECK: ret <2 x i16> [[trunc]] diff --git a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_short3.ll b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_short3.ll index b77616e64..ccccd5ff2 100644 --- a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_short3.ll +++ b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_short3.ll @@ -20,6 +20,6 @@ declare <3 x i16> @_Z7add_satDv3_sS_(<3 x i16>, <3 x i16>) ; CHECK: [[sext_a:%[a-zA-Z0-9_.]+]] = sext <3 x i16> %a to <3 x i32> ; CHECK: [[sext_b:%[a-zA-Z0-9_.]+]] = sext <3 x i16> %b to <3 x i32> ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add nuw nsw <3 x i32> [[sext_a]], [[sext_b]] -; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <3 x i32> @_Z5clampDv3_iS_S_(<3 x i32> [[add]], <3 x i32> , <3 x i32> ) +; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <3 x i32> @_Z5clampDv3_iS_S_(<3 x i32> [[add]], <3 x i32> splat (i32 -32768), <3 x i32> splat (i32 32767)) ; CHECK: [[trunc:%[a-zA-Z0-9_.]+]] = trunc <3 x i32> [[clamp]] to <3 x i16> ; CHECK: ret <3 x i16> [[trunc]] diff --git a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_short4.ll b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_short4.ll index 54529c4b3..0657e0153 100644 --- a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_short4.ll +++ b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_short4.ll @@ -20,6 +20,6 @@ declare <4 x i16> @_Z7add_satDv4_sS_(<4 x i16>, <4 x i16>) ; CHECK: [[sext_a:%[a-zA-Z0-9_.]+]] = sext <4 x i16> %a to <4 x i32> ; CHECK: [[sext_b:%[a-zA-Z0-9_.]+]] = sext <4 x i16> %b to <4 x i32> ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add nuw nsw <4 x i32> [[sext_a]], [[sext_b]] -; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <4 x i32> @_Z5clampDv4_iS_S_(<4 x i32> [[add]], <4 x i32> , <4 x i32> ) +; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <4 x i32> @_Z5clampDv4_iS_S_(<4 x i32> [[add]], <4 x i32> splat (i32 -32768), <4 x i32> splat (i32 32767)) ; CHECK: [[trunc:%[a-zA-Z0-9_.]+]] = trunc <4 x i32> [[clamp]] to <4 x i16> ; CHECK: ret <4 x i16> [[trunc]] diff --git a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_test_gen.cpp b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_test_gen.cpp index 4b78ffefe..8997a4e94 100644 --- a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_test_gen.cpp +++ b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_test_gen.cpp @@ -122,13 +122,7 @@ std::string SplatConstant(uint32_t vector, const std::string &type, if (vector == 1) return value; - std::string constant = "<"; - for (auto i = 0; i < vector; ++i) { - constant += type + " " + value; - constant += (i == (vector - 1) ? "" : ", "); - } - constant += ">"; - return constant; + return "splat (" + type + " " + value + ")"; } std::string NotConstant(uint32_t vector) { diff --git a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_uchar2.ll b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_uchar2.ll index 03df0f494..8663ca8c9 100644 --- a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_uchar2.ll +++ b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_uchar2.ll @@ -21,5 +21,5 @@ declare <2 x i8> @_Z7add_satDv2_hS_(<2 x i8>, <2 x i8>) ; CHECK: [[ex0:%[a-zA-Z0-9_.]+]] = extractvalue { <2 x i8>, <2 x i8> } [[call]], 0 ; CHECK: [[ex1:%[a-zA-Z0-9_.]+]] = extractvalue { <2 x i8>, <2 x i8> } [[call]], 1 ; CHECK: [[cmp:%[a-zA-Z0-9_.]+]] = icmp eq <2 x i8> [[ex1]], zeroinitializer -; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[cmp]], <2 x i8> [[ex0]], <2 x i8> +; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[cmp]], <2 x i8> [[ex0]], <2 x i8> splat (i8 -1) ; CHECK: ret <2 x i8> [[sel]] diff --git a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_uchar3.ll b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_uchar3.ll index 4fd87330d..72ff92c06 100644 --- a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_uchar3.ll +++ b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_uchar3.ll @@ -21,5 +21,5 @@ declare <3 x i8> @_Z7add_satDv3_hS_(<3 x i8>, <3 x i8>) ; CHECK: [[ex0:%[a-zA-Z0-9_.]+]] = extractvalue { <3 x i8>, <3 x i8> } [[call]], 0 ; CHECK: [[ex1:%[a-zA-Z0-9_.]+]] = extractvalue { <3 x i8>, <3 x i8> } [[call]], 1 ; CHECK: [[cmp:%[a-zA-Z0-9_.]+]] = icmp eq <3 x i8> [[ex1]], zeroinitializer -; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[cmp]], <3 x i8> [[ex0]], <3 x i8> +; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[cmp]], <3 x i8> [[ex0]], <3 x i8> splat (i8 -1) ; CHECK: ret <3 x i8> [[sel]] diff --git a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_uchar4.ll b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_uchar4.ll index 26ba3201f..05683b139 100644 --- a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_uchar4.ll +++ b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_uchar4.ll @@ -21,5 +21,5 @@ declare <4 x i8> @_Z7add_satDv4_hS_(<4 x i8>, <4 x i8>) ; CHECK: [[ex0:%[a-zA-Z0-9_.]+]] = extractvalue { <4 x i8>, <4 x i8> } [[call]], 0 ; CHECK: [[ex1:%[a-zA-Z0-9_.]+]] = extractvalue { <4 x i8>, <4 x i8> } [[call]], 1 ; CHECK: [[cmp:%[a-zA-Z0-9_.]+]] = icmp eq <4 x i8> [[ex1]], zeroinitializer -; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[cmp]], <4 x i8> [[ex0]], <4 x i8> +; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[cmp]], <4 x i8> [[ex0]], <4 x i8> splat (i8 -1) ; CHECK: ret <4 x i8> [[sel]] diff --git a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_uint2.ll b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_uint2.ll index 9f15ab472..9cd8ba215 100644 --- a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_uint2.ll +++ b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_uint2.ll @@ -21,5 +21,5 @@ declare <2 x i32> @_Z7add_satDv2_jS_(<2 x i32>, <2 x i32>) ; CHECK: [[ex0:%[a-zA-Z0-9_.]+]] = extractvalue { <2 x i32>, <2 x i32> } [[call]], 0 ; CHECK: [[ex1:%[a-zA-Z0-9_.]+]] = extractvalue { <2 x i32>, <2 x i32> } [[call]], 1 ; CHECK: [[cmp:%[a-zA-Z0-9_.]+]] = icmp eq <2 x i32> [[ex1]], zeroinitializer -; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[cmp]], <2 x i32> [[ex0]], <2 x i32> +; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[cmp]], <2 x i32> [[ex0]], <2 x i32> splat (i32 -1) ; CHECK: ret <2 x i32> [[sel]] diff --git a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_uint3.ll b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_uint3.ll index 4054a7219..3c46b6a51 100644 --- a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_uint3.ll +++ b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_uint3.ll @@ -21,5 +21,5 @@ declare <3 x i32> @_Z7add_satDv3_jS_(<3 x i32>, <3 x i32>) ; CHECK: [[ex0:%[a-zA-Z0-9_.]+]] = extractvalue { <3 x i32>, <3 x i32> } [[call]], 0 ; CHECK: [[ex1:%[a-zA-Z0-9_.]+]] = extractvalue { <3 x i32>, <3 x i32> } [[call]], 1 ; CHECK: [[cmp:%[a-zA-Z0-9_.]+]] = icmp eq <3 x i32> [[ex1]], zeroinitializer -; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[cmp]], <3 x i32> [[ex0]], <3 x i32> +; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[cmp]], <3 x i32> [[ex0]], <3 x i32> splat (i32 -1) ; CHECK: ret <3 x i32> [[sel]] diff --git a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_uint4.ll b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_uint4.ll index 43eb522b2..ea8b50ffd 100644 --- a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_uint4.ll +++ b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_uint4.ll @@ -21,5 +21,5 @@ declare <4 x i32> @_Z7add_satDv4_jS_(<4 x i32>, <4 x i32>) ; CHECK: [[ex0:%[a-zA-Z0-9_.]+]] = extractvalue { <4 x i32>, <4 x i32> } [[call]], 0 ; CHECK: [[ex1:%[a-zA-Z0-9_.]+]] = extractvalue { <4 x i32>, <4 x i32> } [[call]], 1 ; CHECK: [[cmp:%[a-zA-Z0-9_.]+]] = icmp eq <4 x i32> [[ex1]], zeroinitializer -; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[cmp]], <4 x i32> [[ex0]], <4 x i32> +; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[cmp]], <4 x i32> [[ex0]], <4 x i32> splat (i32 -1) ; CHECK: ret <4 x i32> [[sel]] diff --git a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_ulong2.ll b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_ulong2.ll index cc21d2359..4edf67e95 100644 --- a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_ulong2.ll +++ b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_ulong2.ll @@ -21,5 +21,5 @@ declare <2 x i64> @_Z7add_satDv2_mS_(<2 x i64>, <2 x i64>) ; CHECK: [[ex0:%[a-zA-Z0-9_.]+]] = extractvalue { <2 x i64>, <2 x i64> } [[call]], 0 ; CHECK: [[ex1:%[a-zA-Z0-9_.]+]] = extractvalue { <2 x i64>, <2 x i64> } [[call]], 1 ; CHECK: [[cmp:%[a-zA-Z0-9_.]+]] = icmp eq <2 x i64> [[ex1]], zeroinitializer -; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[cmp]], <2 x i64> [[ex0]], <2 x i64> +; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[cmp]], <2 x i64> [[ex0]], <2 x i64> splat (i64 -1) ; CHECK: ret <2 x i64> [[sel]] diff --git a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_ulong3.ll b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_ulong3.ll index 5809257a5..f5157bce9 100644 --- a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_ulong3.ll +++ b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_ulong3.ll @@ -21,5 +21,5 @@ declare <3 x i64> @_Z7add_satDv3_mS_(<3 x i64>, <3 x i64>) ; CHECK: [[ex0:%[a-zA-Z0-9_.]+]] = extractvalue { <3 x i64>, <3 x i64> } [[call]], 0 ; CHECK: [[ex1:%[a-zA-Z0-9_.]+]] = extractvalue { <3 x i64>, <3 x i64> } [[call]], 1 ; CHECK: [[cmp:%[a-zA-Z0-9_.]+]] = icmp eq <3 x i64> [[ex1]], zeroinitializer -; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[cmp]], <3 x i64> [[ex0]], <3 x i64> +; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[cmp]], <3 x i64> [[ex0]], <3 x i64> splat (i64 -1) ; CHECK: ret <3 x i64> [[sel]] diff --git a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_ulong4.ll b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_ulong4.ll index 8179babcf..8e4259817 100644 --- a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_ulong4.ll +++ b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_ulong4.ll @@ -21,5 +21,5 @@ declare <4 x i64> @_Z7add_satDv4_mS_(<4 x i64>, <4 x i64>) ; CHECK: [[ex0:%[a-zA-Z0-9_.]+]] = extractvalue { <4 x i64>, <4 x i64> } [[call]], 0 ; CHECK: [[ex1:%[a-zA-Z0-9_.]+]] = extractvalue { <4 x i64>, <4 x i64> } [[call]], 1 ; CHECK: [[cmp:%[a-zA-Z0-9_.]+]] = icmp eq <4 x i64> [[ex1]], zeroinitializer -; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[cmp]], <4 x i64> [[ex0]], <4 x i64> +; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[cmp]], <4 x i64> [[ex0]], <4 x i64> splat (i64 -1) ; CHECK: ret <4 x i64> [[sel]] diff --git a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_ushort2.ll b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_ushort2.ll index 2ccb1c852..775fc39c7 100644 --- a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_ushort2.ll +++ b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_ushort2.ll @@ -21,5 +21,5 @@ declare <2 x i16> @_Z7add_satDv2_tS_(<2 x i16>, <2 x i16>) ; CHECK: [[ex0:%[a-zA-Z0-9_.]+]] = extractvalue { <2 x i16>, <2 x i16> } [[call]], 0 ; CHECK: [[ex1:%[a-zA-Z0-9_.]+]] = extractvalue { <2 x i16>, <2 x i16> } [[call]], 1 ; CHECK: [[cmp:%[a-zA-Z0-9_.]+]] = icmp eq <2 x i16> [[ex1]], zeroinitializer -; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[cmp]], <2 x i16> [[ex0]], <2 x i16> +; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[cmp]], <2 x i16> [[ex0]], <2 x i16> splat (i16 -1) ; CHECK: ret <2 x i16> [[sel]] diff --git a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_ushort3.ll b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_ushort3.ll index ec82ab351..28fe0dca7 100644 --- a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_ushort3.ll +++ b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_ushort3.ll @@ -21,5 +21,5 @@ declare <3 x i16> @_Z7add_satDv3_tS_(<3 x i16>, <3 x i16>) ; CHECK: [[ex0:%[a-zA-Z0-9_.]+]] = extractvalue { <3 x i16>, <3 x i16> } [[call]], 0 ; CHECK: [[ex1:%[a-zA-Z0-9_.]+]] = extractvalue { <3 x i16>, <3 x i16> } [[call]], 1 ; CHECK: [[cmp:%[a-zA-Z0-9_.]+]] = icmp eq <3 x i16> [[ex1]], zeroinitializer -; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[cmp]], <3 x i16> [[ex0]], <3 x i16> +; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[cmp]], <3 x i16> [[ex0]], <3 x i16> splat (i16 -1) ; CHECK: ret <3 x i16> [[sel]] diff --git a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_ushort4.ll b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_ushort4.ll index f26d44bf9..1a335a73e 100644 --- a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_ushort4.ll +++ b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_ushort4.ll @@ -21,5 +21,5 @@ declare <4 x i16> @_Z7add_satDv4_tS_(<4 x i16>, <4 x i16>) ; CHECK: [[ex0:%[a-zA-Z0-9_.]+]] = extractvalue { <4 x i16>, <4 x i16> } [[call]], 0 ; CHECK: [[ex1:%[a-zA-Z0-9_.]+]] = extractvalue { <4 x i16>, <4 x i16> } [[call]], 1 ; CHECK: [[cmp:%[a-zA-Z0-9_.]+]] = icmp eq <4 x i16> [[ex1]], zeroinitializer -; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[cmp]], <4 x i16> [[ex0]], <4 x i16> +; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[cmp]], <4 x i16> [[ex0]], <4 x i16> splat (i16 -1) ; CHECK: ret <4 x i16> [[sel]] diff --git a/test/IntegerBuiltins/add_sat/add_sat_int2.ll b/test/IntegerBuiltins/add_sat/add_sat_int2.ll index 79ef38831..dbb975824 100644 --- a/test/IntegerBuiltins/add_sat/add_sat_int2.ll +++ b/test/IntegerBuiltins/add_sat/add_sat_int2.ll @@ -21,7 +21,7 @@ declare <2 x i32> @_Z7add_satDv2_iS_(<2 x i32>, <2 x i32>) ; CHECK: [[b_lt_0:%[a-zA-Z0-9_.]+]] = icmp slt <2 x i32> %b, zeroinitializer ; CHECK: [[add_gt_a:%[a-zA-Z0-9_.]+]] = icmp sgt <2 x i32> [[add]], %a ; CHECK: [[add_lt_a:%[a-zA-Z0-9_.]+]] = icmp slt <2 x i32> [[add]], %a -; CHECK: [[min_clamp:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[add_gt_a]], <2 x i32> , <2 x i32> [[add]] -; CHECK: [[max_clamp:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[add_lt_a]], <2 x i32> , <2 x i32> [[add]] +; CHECK: [[min_clamp:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[add_gt_a]], <2 x i32> splat (i32 -2147483648), <2 x i32> [[add]] +; CHECK: [[max_clamp:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[add_lt_a]], <2 x i32> splat (i32 2147483647), <2 x i32> [[add]] ; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[b_lt_0]], <2 x i32> [[min_clamp]], <2 x i32> [[max_clamp]] ; CHECK: ret <2 x i32> [[sel]] diff --git a/test/IntegerBuiltins/add_sat/add_sat_int3.ll b/test/IntegerBuiltins/add_sat/add_sat_int3.ll index a32773427..6015312e5 100644 --- a/test/IntegerBuiltins/add_sat/add_sat_int3.ll +++ b/test/IntegerBuiltins/add_sat/add_sat_int3.ll @@ -21,7 +21,7 @@ declare <3 x i32> @_Z7add_satDv3_iS_(<3 x i32>, <3 x i32>) ; CHECK: [[b_lt_0:%[a-zA-Z0-9_.]+]] = icmp slt <3 x i32> %b, zeroinitializer ; CHECK: [[add_gt_a:%[a-zA-Z0-9_.]+]] = icmp sgt <3 x i32> [[add]], %a ; CHECK: [[add_lt_a:%[a-zA-Z0-9_.]+]] = icmp slt <3 x i32> [[add]], %a -; CHECK: [[min_clamp:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[add_gt_a]], <3 x i32> , <3 x i32> [[add]] -; CHECK: [[max_clamp:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[add_lt_a]], <3 x i32> , <3 x i32> [[add]] +; CHECK: [[min_clamp:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[add_gt_a]], <3 x i32> splat (i32 -2147483648), <3 x i32> [[add]] +; CHECK: [[max_clamp:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[add_lt_a]], <3 x i32> splat (i32 2147483647), <3 x i32> [[add]] ; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[b_lt_0]], <3 x i32> [[min_clamp]], <3 x i32> [[max_clamp]] ; CHECK: ret <3 x i32> [[sel]] diff --git a/test/IntegerBuiltins/add_sat/add_sat_int4.ll b/test/IntegerBuiltins/add_sat/add_sat_int4.ll index e68564caa..a6f4f81a4 100644 --- a/test/IntegerBuiltins/add_sat/add_sat_int4.ll +++ b/test/IntegerBuiltins/add_sat/add_sat_int4.ll @@ -21,7 +21,7 @@ declare <4 x i32> @_Z7add_satDv4_iS_(<4 x i32>, <4 x i32>) ; CHECK: [[b_lt_0:%[a-zA-Z0-9_.]+]] = icmp slt <4 x i32> %b, zeroinitializer ; CHECK: [[add_gt_a:%[a-zA-Z0-9_.]+]] = icmp sgt <4 x i32> [[add]], %a ; CHECK: [[add_lt_a:%[a-zA-Z0-9_.]+]] = icmp slt <4 x i32> [[add]], %a -; CHECK: [[min_clamp:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[add_gt_a]], <4 x i32> , <4 x i32> [[add]] -; CHECK: [[max_clamp:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[add_lt_a]], <4 x i32> , <4 x i32> [[add]] +; CHECK: [[min_clamp:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[add_gt_a]], <4 x i32> splat (i32 -2147483648), <4 x i32> [[add]] +; CHECK: [[max_clamp:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[add_lt_a]], <4 x i32> splat (i32 2147483647), <4 x i32> [[add]] ; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[b_lt_0]], <4 x i32> [[min_clamp]], <4 x i32> [[max_clamp]] ; CHECK: ret <4 x i32> [[sel]] diff --git a/test/IntegerBuiltins/add_sat/add_sat_long2.ll b/test/IntegerBuiltins/add_sat/add_sat_long2.ll index 3d5ba564f..61bba431f 100644 --- a/test/IntegerBuiltins/add_sat/add_sat_long2.ll +++ b/test/IntegerBuiltins/add_sat/add_sat_long2.ll @@ -21,7 +21,7 @@ declare <2 x i64> @_Z7add_satDv2_lS_(<2 x i64>, <2 x i64>) ; CHECK: [[b_lt_0:%[a-zA-Z0-9_.]+]] = icmp slt <2 x i64> %b, zeroinitializer ; CHECK: [[add_gt_a:%[a-zA-Z0-9_.]+]] = icmp sgt <2 x i64> [[add]], %a ; CHECK: [[add_lt_a:%[a-zA-Z0-9_.]+]] = icmp slt <2 x i64> [[add]], %a -; CHECK: [[min_clamp:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[add_gt_a]], <2 x i64> , <2 x i64> [[add]] -; CHECK: [[max_clamp:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[add_lt_a]], <2 x i64> , <2 x i64> [[add]] +; CHECK: [[min_clamp:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[add_gt_a]], <2 x i64> splat (i64 -9223372036854775808), <2 x i64> [[add]] +; CHECK: [[max_clamp:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[add_lt_a]], <2 x i64> splat (i64 9223372036854775807), <2 x i64> [[add]] ; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[b_lt_0]], <2 x i64> [[min_clamp]], <2 x i64> [[max_clamp]] ; CHECK: ret <2 x i64> [[sel]] diff --git a/test/IntegerBuiltins/add_sat/add_sat_long3.ll b/test/IntegerBuiltins/add_sat/add_sat_long3.ll index ca5c35b19..ca9b68567 100644 --- a/test/IntegerBuiltins/add_sat/add_sat_long3.ll +++ b/test/IntegerBuiltins/add_sat/add_sat_long3.ll @@ -21,7 +21,7 @@ declare <3 x i64> @_Z7add_satDv3_lS_(<3 x i64>, <3 x i64>) ; CHECK: [[b_lt_0:%[a-zA-Z0-9_.]+]] = icmp slt <3 x i64> %b, zeroinitializer ; CHECK: [[add_gt_a:%[a-zA-Z0-9_.]+]] = icmp sgt <3 x i64> [[add]], %a ; CHECK: [[add_lt_a:%[a-zA-Z0-9_.]+]] = icmp slt <3 x i64> [[add]], %a -; CHECK: [[min_clamp:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[add_gt_a]], <3 x i64> , <3 x i64> [[add]] -; CHECK: [[max_clamp:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[add_lt_a]], <3 x i64> , <3 x i64> [[add]] +; CHECK: [[min_clamp:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[add_gt_a]], <3 x i64> splat (i64 -9223372036854775808), <3 x i64> [[add]] +; CHECK: [[max_clamp:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[add_lt_a]], <3 x i64> splat (i64 9223372036854775807), <3 x i64> [[add]] ; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[b_lt_0]], <3 x i64> [[min_clamp]], <3 x i64> [[max_clamp]] ; CHECK: ret <3 x i64> [[sel]] diff --git a/test/IntegerBuiltins/add_sat/add_sat_long4.ll b/test/IntegerBuiltins/add_sat/add_sat_long4.ll index 6a333f4dd..03b45120f 100644 --- a/test/IntegerBuiltins/add_sat/add_sat_long4.ll +++ b/test/IntegerBuiltins/add_sat/add_sat_long4.ll @@ -21,7 +21,7 @@ declare <4 x i64> @_Z7add_satDv4_lS_(<4 x i64>, <4 x i64>) ; CHECK: [[b_lt_0:%[a-zA-Z0-9_.]+]] = icmp slt <4 x i64> %b, zeroinitializer ; CHECK: [[add_gt_a:%[a-zA-Z0-9_.]+]] = icmp sgt <4 x i64> [[add]], %a ; CHECK: [[add_lt_a:%[a-zA-Z0-9_.]+]] = icmp slt <4 x i64> [[add]], %a -; CHECK: [[min_clamp:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[add_gt_a]], <4 x i64> , <4 x i64> [[add]] -; CHECK: [[max_clamp:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[add_lt_a]], <4 x i64> , <4 x i64> [[add]] +; CHECK: [[min_clamp:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[add_gt_a]], <4 x i64> splat (i64 -9223372036854775808), <4 x i64> [[add]] +; CHECK: [[max_clamp:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[add_lt_a]], <4 x i64> splat (i64 9223372036854775807), <4 x i64> [[add]] ; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[b_lt_0]], <4 x i64> [[min_clamp]], <4 x i64> [[max_clamp]] ; CHECK: ret <4 x i64> [[sel]] diff --git a/test/IntegerBuiltins/add_sat/add_sat_short2.ll b/test/IntegerBuiltins/add_sat/add_sat_short2.ll index b438f4759..8e94ae3ab 100644 --- a/test/IntegerBuiltins/add_sat/add_sat_short2.ll +++ b/test/IntegerBuiltins/add_sat/add_sat_short2.ll @@ -20,6 +20,6 @@ declare <2 x i16> @_Z7add_satDv2_sS_(<2 x i16>, <2 x i16>) ; CHECK: [[sext_a:%[a-zA-Z0-9_.]+]] = sext <2 x i16> %a to <2 x i32> ; CHECK: [[sext_b:%[a-zA-Z0-9_.]+]] = sext <2 x i16> %b to <2 x i32> ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add nuw nsw <2 x i32> [[sext_a]], [[sext_b]] -; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <2 x i32> @_Z5clampDv2_iS_S_(<2 x i32> [[add]], <2 x i32> , <2 x i32> ) +; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <2 x i32> @_Z5clampDv2_iS_S_(<2 x i32> [[add]], <2 x i32> splat (i32 -32768), <2 x i32> splat (i32 32767)) ; CHECK: [[trunc:%[a-zA-Z0-9_.]+]] = trunc <2 x i32> [[clamp]] to <2 x i16> ; CHECK: ret <2 x i16> [[trunc]] diff --git a/test/IntegerBuiltins/add_sat/add_sat_short3.ll b/test/IntegerBuiltins/add_sat/add_sat_short3.ll index 50e009fa6..e804daf07 100644 --- a/test/IntegerBuiltins/add_sat/add_sat_short3.ll +++ b/test/IntegerBuiltins/add_sat/add_sat_short3.ll @@ -20,6 +20,6 @@ declare <3 x i16> @_Z7add_satDv3_sS_(<3 x i16>, <3 x i16>) ; CHECK: [[sext_a:%[a-zA-Z0-9_.]+]] = sext <3 x i16> %a to <3 x i32> ; CHECK: [[sext_b:%[a-zA-Z0-9_.]+]] = sext <3 x i16> %b to <3 x i32> ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add nuw nsw <3 x i32> [[sext_a]], [[sext_b]] -; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <3 x i32> @_Z5clampDv3_iS_S_(<3 x i32> [[add]], <3 x i32> , <3 x i32> ) +; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <3 x i32> @_Z5clampDv3_iS_S_(<3 x i32> [[add]], <3 x i32> splat (i32 -32768), <3 x i32> splat (i32 32767)) ; CHECK: [[trunc:%[a-zA-Z0-9_.]+]] = trunc <3 x i32> [[clamp]] to <3 x i16> ; CHECK: ret <3 x i16> [[trunc]] diff --git a/test/IntegerBuiltins/add_sat/add_sat_short4.ll b/test/IntegerBuiltins/add_sat/add_sat_short4.ll index f563b65d7..f42cda359 100644 --- a/test/IntegerBuiltins/add_sat/add_sat_short4.ll +++ b/test/IntegerBuiltins/add_sat/add_sat_short4.ll @@ -20,6 +20,6 @@ declare <4 x i16> @_Z7add_satDv4_sS_(<4 x i16>, <4 x i16>) ; CHECK: [[sext_a:%[a-zA-Z0-9_.]+]] = sext <4 x i16> %a to <4 x i32> ; CHECK: [[sext_b:%[a-zA-Z0-9_.]+]] = sext <4 x i16> %b to <4 x i32> ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add nuw nsw <4 x i32> [[sext_a]], [[sext_b]] -; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <4 x i32> @_Z5clampDv4_iS_S_(<4 x i32> [[add]], <4 x i32> , <4 x i32> ) +; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <4 x i32> @_Z5clampDv4_iS_S_(<4 x i32> [[add]], <4 x i32> splat (i32 -32768), <4 x i32> splat (i32 32767)) ; CHECK: [[trunc:%[a-zA-Z0-9_.]+]] = trunc <4 x i32> [[clamp]] to <4 x i16> ; CHECK: ret <4 x i16> [[trunc]] diff --git a/test/IntegerBuiltins/add_sat/add_sat_test_gen.cpp b/test/IntegerBuiltins/add_sat/add_sat_test_gen.cpp index 0309482c2..a4bdfe3a4 100644 --- a/test/IntegerBuiltins/add_sat/add_sat_test_gen.cpp +++ b/test/IntegerBuiltins/add_sat/add_sat_test_gen.cpp @@ -122,13 +122,7 @@ std::string SplatConstant(uint32_t vector, const std::string &type, if (vector == 1) return value; - std::string constant = "<"; - for (auto i = 0; i < vector; ++i) { - constant += type + " " + value; - constant += (i == (vector - 1) ? "" : ", "); - } - constant += ">"; - return constant; + return "splat (" + type + " " + value + ")"; } std::string NotConstant(uint32_t vector) { diff --git a/test/IntegerBuiltins/add_sat/add_sat_uchar2.ll b/test/IntegerBuiltins/add_sat/add_sat_uchar2.ll index 6f29fd0e6..31230f68e 100644 --- a/test/IntegerBuiltins/add_sat/add_sat_uchar2.ll +++ b/test/IntegerBuiltins/add_sat/add_sat_uchar2.ll @@ -21,5 +21,5 @@ declare <2 x i8> @_Z7add_satDv2_hS_(<2 x i8>, <2 x i8>) ; CHECK: [[ex0:%[a-zA-Z0-9_.]+]] = extractvalue { <2 x i8>, <2 x i8> } [[call]], 0 ; CHECK: [[ex1:%[a-zA-Z0-9_.]+]] = extractvalue { <2 x i8>, <2 x i8> } [[call]], 1 ; CHECK: [[cmp:%[a-zA-Z0-9_.]+]] = icmp eq <2 x i8> [[ex1]], zeroinitializer -; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[cmp]], <2 x i8> [[ex0]], <2 x i8> +; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[cmp]], <2 x i8> [[ex0]], <2 x i8> splat (i8 -1) ; CHECK: ret <2 x i8> [[sel]] diff --git a/test/IntegerBuiltins/add_sat/add_sat_uchar3.ll b/test/IntegerBuiltins/add_sat/add_sat_uchar3.ll index 1128cc462..4833db58d 100644 --- a/test/IntegerBuiltins/add_sat/add_sat_uchar3.ll +++ b/test/IntegerBuiltins/add_sat/add_sat_uchar3.ll @@ -21,5 +21,5 @@ declare <3 x i8> @_Z7add_satDv3_hS_(<3 x i8>, <3 x i8>) ; CHECK: [[ex0:%[a-zA-Z0-9_.]+]] = extractvalue { <3 x i8>, <3 x i8> } [[call]], 0 ; CHECK: [[ex1:%[a-zA-Z0-9_.]+]] = extractvalue { <3 x i8>, <3 x i8> } [[call]], 1 ; CHECK: [[cmp:%[a-zA-Z0-9_.]+]] = icmp eq <3 x i8> [[ex1]], zeroinitializer -; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[cmp]], <3 x i8> [[ex0]], <3 x i8> +; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[cmp]], <3 x i8> [[ex0]], <3 x i8> splat (i8 -1) ; CHECK: ret <3 x i8> [[sel]] diff --git a/test/IntegerBuiltins/add_sat/add_sat_uchar4.ll b/test/IntegerBuiltins/add_sat/add_sat_uchar4.ll index b7e7fb7da..de39fdac2 100644 --- a/test/IntegerBuiltins/add_sat/add_sat_uchar4.ll +++ b/test/IntegerBuiltins/add_sat/add_sat_uchar4.ll @@ -21,5 +21,5 @@ declare <4 x i8> @_Z7add_satDv4_hS_(<4 x i8>, <4 x i8>) ; CHECK: [[ex0:%[a-zA-Z0-9_.]+]] = extractvalue { <4 x i8>, <4 x i8> } [[call]], 0 ; CHECK: [[ex1:%[a-zA-Z0-9_.]+]] = extractvalue { <4 x i8>, <4 x i8> } [[call]], 1 ; CHECK: [[cmp:%[a-zA-Z0-9_.]+]] = icmp eq <4 x i8> [[ex1]], zeroinitializer -; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[cmp]], <4 x i8> [[ex0]], <4 x i8> +; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[cmp]], <4 x i8> [[ex0]], <4 x i8> splat (i8 -1) ; CHECK: ret <4 x i8> [[sel]] diff --git a/test/IntegerBuiltins/add_sat/add_sat_uint2.ll b/test/IntegerBuiltins/add_sat/add_sat_uint2.ll index aaf251c01..7404efb1f 100644 --- a/test/IntegerBuiltins/add_sat/add_sat_uint2.ll +++ b/test/IntegerBuiltins/add_sat/add_sat_uint2.ll @@ -21,5 +21,5 @@ declare <2 x i32> @_Z7add_satDv2_jS_(<2 x i32>, <2 x i32>) ; CHECK: [[ex0:%[a-zA-Z0-9_.]+]] = extractvalue { <2 x i32>, <2 x i32> } [[call]], 0 ; CHECK: [[ex1:%[a-zA-Z0-9_.]+]] = extractvalue { <2 x i32>, <2 x i32> } [[call]], 1 ; CHECK: [[cmp:%[a-zA-Z0-9_.]+]] = icmp eq <2 x i32> [[ex1]], zeroinitializer -; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[cmp]], <2 x i32> [[ex0]], <2 x i32> +; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[cmp]], <2 x i32> [[ex0]], <2 x i32> splat (i32 -1) ; CHECK: ret <2 x i32> [[sel]] diff --git a/test/IntegerBuiltins/add_sat/add_sat_uint3.ll b/test/IntegerBuiltins/add_sat/add_sat_uint3.ll index dc1f99241..abeb136eb 100644 --- a/test/IntegerBuiltins/add_sat/add_sat_uint3.ll +++ b/test/IntegerBuiltins/add_sat/add_sat_uint3.ll @@ -21,5 +21,5 @@ declare <3 x i32> @_Z7add_satDv3_jS_(<3 x i32>, <3 x i32>) ; CHECK: [[ex0:%[a-zA-Z0-9_.]+]] = extractvalue { <3 x i32>, <3 x i32> } [[call]], 0 ; CHECK: [[ex1:%[a-zA-Z0-9_.]+]] = extractvalue { <3 x i32>, <3 x i32> } [[call]], 1 ; CHECK: [[cmp:%[a-zA-Z0-9_.]+]] = icmp eq <3 x i32> [[ex1]], zeroinitializer -; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[cmp]], <3 x i32> [[ex0]], <3 x i32> +; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[cmp]], <3 x i32> [[ex0]], <3 x i32> splat (i32 -1) ; CHECK: ret <3 x i32> [[sel]] diff --git a/test/IntegerBuiltins/add_sat/add_sat_uint4.ll b/test/IntegerBuiltins/add_sat/add_sat_uint4.ll index 4dcdde77d..924d3616e 100644 --- a/test/IntegerBuiltins/add_sat/add_sat_uint4.ll +++ b/test/IntegerBuiltins/add_sat/add_sat_uint4.ll @@ -21,5 +21,5 @@ declare <4 x i32> @_Z7add_satDv4_jS_(<4 x i32>, <4 x i32>) ; CHECK: [[ex0:%[a-zA-Z0-9_.]+]] = extractvalue { <4 x i32>, <4 x i32> } [[call]], 0 ; CHECK: [[ex1:%[a-zA-Z0-9_.]+]] = extractvalue { <4 x i32>, <4 x i32> } [[call]], 1 ; CHECK: [[cmp:%[a-zA-Z0-9_.]+]] = icmp eq <4 x i32> [[ex1]], zeroinitializer -; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[cmp]], <4 x i32> [[ex0]], <4 x i32> +; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[cmp]], <4 x i32> [[ex0]], <4 x i32> splat (i32 -1) ; CHECK: ret <4 x i32> [[sel]] diff --git a/test/IntegerBuiltins/add_sat/add_sat_ulong2.ll b/test/IntegerBuiltins/add_sat/add_sat_ulong2.ll index ae7268769..45ad1e80c 100644 --- a/test/IntegerBuiltins/add_sat/add_sat_ulong2.ll +++ b/test/IntegerBuiltins/add_sat/add_sat_ulong2.ll @@ -21,5 +21,5 @@ declare <2 x i64> @_Z7add_satDv2_mS_(<2 x i64>, <2 x i64>) ; CHECK: [[ex0:%[a-zA-Z0-9_.]+]] = extractvalue { <2 x i64>, <2 x i64> } [[call]], 0 ; CHECK: [[ex1:%[a-zA-Z0-9_.]+]] = extractvalue { <2 x i64>, <2 x i64> } [[call]], 1 ; CHECK: [[cmp:%[a-zA-Z0-9_.]+]] = icmp eq <2 x i64> [[ex1]], zeroinitializer -; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[cmp]], <2 x i64> [[ex0]], <2 x i64> +; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[cmp]], <2 x i64> [[ex0]], <2 x i64> splat (i64 -1) ; CHECK: ret <2 x i64> [[sel]] diff --git a/test/IntegerBuiltins/add_sat/add_sat_ulong3.ll b/test/IntegerBuiltins/add_sat/add_sat_ulong3.ll index ed4bbd139..92a3e5b53 100644 --- a/test/IntegerBuiltins/add_sat/add_sat_ulong3.ll +++ b/test/IntegerBuiltins/add_sat/add_sat_ulong3.ll @@ -21,5 +21,5 @@ declare <3 x i64> @_Z7add_satDv3_mS_(<3 x i64>, <3 x i64>) ; CHECK: [[ex0:%[a-zA-Z0-9_.]+]] = extractvalue { <3 x i64>, <3 x i64> } [[call]], 0 ; CHECK: [[ex1:%[a-zA-Z0-9_.]+]] = extractvalue { <3 x i64>, <3 x i64> } [[call]], 1 ; CHECK: [[cmp:%[a-zA-Z0-9_.]+]] = icmp eq <3 x i64> [[ex1]], zeroinitializer -; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[cmp]], <3 x i64> [[ex0]], <3 x i64> +; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[cmp]], <3 x i64> [[ex0]], <3 x i64> splat (i64 -1) ; CHECK: ret <3 x i64> [[sel]] diff --git a/test/IntegerBuiltins/add_sat/add_sat_ulong4.ll b/test/IntegerBuiltins/add_sat/add_sat_ulong4.ll index fb1e4893d..a864d1e0f 100644 --- a/test/IntegerBuiltins/add_sat/add_sat_ulong4.ll +++ b/test/IntegerBuiltins/add_sat/add_sat_ulong4.ll @@ -21,5 +21,5 @@ declare <4 x i64> @_Z7add_satDv4_mS_(<4 x i64>, <4 x i64>) ; CHECK: [[ex0:%[a-zA-Z0-9_.]+]] = extractvalue { <4 x i64>, <4 x i64> } [[call]], 0 ; CHECK: [[ex1:%[a-zA-Z0-9_.]+]] = extractvalue { <4 x i64>, <4 x i64> } [[call]], 1 ; CHECK: [[cmp:%[a-zA-Z0-9_.]+]] = icmp eq <4 x i64> [[ex1]], zeroinitializer -; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[cmp]], <4 x i64> [[ex0]], <4 x i64> +; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[cmp]], <4 x i64> [[ex0]], <4 x i64> splat (i64 -1) ; CHECK: ret <4 x i64> [[sel]] diff --git a/test/IntegerBuiltins/add_sat/add_sat_ushort2.ll b/test/IntegerBuiltins/add_sat/add_sat_ushort2.ll index cfe4a4c03..9c62d2d60 100644 --- a/test/IntegerBuiltins/add_sat/add_sat_ushort2.ll +++ b/test/IntegerBuiltins/add_sat/add_sat_ushort2.ll @@ -21,5 +21,5 @@ declare <2 x i16> @_Z7add_satDv2_tS_(<2 x i16>, <2 x i16>) ; CHECK: [[ex0:%[a-zA-Z0-9_.]+]] = extractvalue { <2 x i16>, <2 x i16> } [[call]], 0 ; CHECK: [[ex1:%[a-zA-Z0-9_.]+]] = extractvalue { <2 x i16>, <2 x i16> } [[call]], 1 ; CHECK: [[cmp:%[a-zA-Z0-9_.]+]] = icmp eq <2 x i16> [[ex1]], zeroinitializer -; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[cmp]], <2 x i16> [[ex0]], <2 x i16> +; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[cmp]], <2 x i16> [[ex0]], <2 x i16> splat (i16 -1) ; CHECK: ret <2 x i16> [[sel]] diff --git a/test/IntegerBuiltins/add_sat/add_sat_ushort3.ll b/test/IntegerBuiltins/add_sat/add_sat_ushort3.ll index a8b8bafbe..1a7db08c8 100644 --- a/test/IntegerBuiltins/add_sat/add_sat_ushort3.ll +++ b/test/IntegerBuiltins/add_sat/add_sat_ushort3.ll @@ -21,5 +21,5 @@ declare <3 x i16> @_Z7add_satDv3_tS_(<3 x i16>, <3 x i16>) ; CHECK: [[ex0:%[a-zA-Z0-9_.]+]] = extractvalue { <3 x i16>, <3 x i16> } [[call]], 0 ; CHECK: [[ex1:%[a-zA-Z0-9_.]+]] = extractvalue { <3 x i16>, <3 x i16> } [[call]], 1 ; CHECK: [[cmp:%[a-zA-Z0-9_.]+]] = icmp eq <3 x i16> [[ex1]], zeroinitializer -; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[cmp]], <3 x i16> [[ex0]], <3 x i16> +; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[cmp]], <3 x i16> [[ex0]], <3 x i16> splat (i16 -1) ; CHECK: ret <3 x i16> [[sel]] diff --git a/test/IntegerBuiltins/add_sat/add_sat_ushort4.ll b/test/IntegerBuiltins/add_sat/add_sat_ushort4.ll index 6721a900d..fe76f458b 100644 --- a/test/IntegerBuiltins/add_sat/add_sat_ushort4.ll +++ b/test/IntegerBuiltins/add_sat/add_sat_ushort4.ll @@ -21,5 +21,5 @@ declare <4 x i16> @_Z7add_satDv4_tS_(<4 x i16>, <4 x i16>) ; CHECK: [[ex0:%[a-zA-Z0-9_.]+]] = extractvalue { <4 x i16>, <4 x i16> } [[call]], 0 ; CHECK: [[ex1:%[a-zA-Z0-9_.]+]] = extractvalue { <4 x i16>, <4 x i16> } [[call]], 1 ; CHECK: [[cmp:%[a-zA-Z0-9_.]+]] = icmp eq <4 x i16> [[ex1]], zeroinitializer -; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[cmp]], <4 x i16> [[ex0]], <4 x i16> +; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[cmp]], <4 x i16> [[ex0]], <4 x i16> splat (i16 -1) ; CHECK: ret <4 x i16> [[sel]] diff --git a/test/IntegerBuiltins/clz/char2_clz.ll b/test/IntegerBuiltins/clz/char2_clz.ll index 2e74fd813..abcf2191f 100644 --- a/test/IntegerBuiltins/clz/char2_clz.ll +++ b/test/IntegerBuiltins/clz/char2_clz.ll @@ -15,7 +15,7 @@ declare spir_func <2 x i32> @_Z3clzDv2_j(<2 x i32>) ; CHECK: [[zext:%[a-zA-Z0-9_.]+]] = zext <2 x i8> %in to <2 x i32> ; CHECK: [[call:%[a-zA-Z0-9_.]+]] = call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> [[zext]], i1 false) -; CHECK: [[sub:%[a-zA-Z0-9_.]+]] = sub <2 x i32> [[call]], +; CHECK: [[sub:%[a-zA-Z0-9_.]+]] = sub <2 x i32> [[call]], splat (i32 24) ; CHECK: [[trunc:%[a-zA-Z0-9_.]+]] = trunc <2 x i32> [[sub]] to <2 x i8> ; CHECK: ret <2 x i8> [[trunc]] ; CHECK: declare <2 x i32> @llvm.ctlz.v2i32(<2 x i32>, i1 immarg) diff --git a/test/IntegerBuiltins/clz/long2_clz.ll b/test/IntegerBuiltins/clz/long2_clz.ll index 4fbaa2102..4cd474c62 100644 --- a/test/IntegerBuiltins/clz/long2_clz.ll +++ b/test/IntegerBuiltins/clz/long2_clz.ll @@ -12,13 +12,13 @@ entry: declare <2 x i64> @_Z3clzl(<2 x i64>) -; CHECK: [[shr:%[a-zA-Z0-9_.]+]] = lshr <2 x i64> %in, +; CHECK: [[shr:%[a-zA-Z0-9_.]+]] = lshr <2 x i64> %in, splat (i64 32) ; CHECK: [[top:%[a-zA-Z0-9_.]+]] = trunc <2 x i64> [[shr]] to <2 x i32> ; CHECK: [[bot:%[a-zA-Z0-9_.]+]] = trunc <2 x i64> %in to <2 x i32> ; CHECK: [[top_clz:%[a-zA-Z0-9_.]+]] = call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> [[top]], i1 false) ; CHECK: [[bot_clz:%[a-zA-Z0-9_.]+]] = call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> [[bot]], i1 false) -; CHECK: [[cmp:%[a-zA-Z0-9_.]+]] = icmp eq <2 x i32> [[top_clz]], -; CHECK: [[bot_adjust:%[a-zA-Z0-9_.]+]] = add <2 x i32> [[bot_clz]], +; CHECK: [[cmp:%[a-zA-Z0-9_.]+]] = icmp eq <2 x i32> [[top_clz]], splat (i32 32) +; CHECK: [[bot_adjust:%[a-zA-Z0-9_.]+]] = add <2 x i32> [[bot_clz]], splat (i32 32) ; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[cmp]], <2 x i32> [[bot_adjust]], <2 x i32> [[top_clz]] ; CHECK: [[zext:%[a-zA-Z0-9_.]+]] = zext <2 x i32> [[sel]] to <2 x i64> ; CHECK: ret <2 x i64> [[zext]] diff --git a/test/IntegerBuiltins/clz/short2_clz.ll b/test/IntegerBuiltins/clz/short2_clz.ll index 32c017523..de4ab0f5e 100644 --- a/test/IntegerBuiltins/clz/short2_clz.ll +++ b/test/IntegerBuiltins/clz/short2_clz.ll @@ -14,7 +14,7 @@ declare spir_func <2 x i16> @_Z3clzs(<2 x i16>) ; CHECK: [[zext:%[a-zA-Z0-9_.]+]] = zext <2 x i16> %in to <2 x i32> ; CHECK: [[call:%[a-zA-Z0-9_.]+]] = call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> [[zext]], i1 false) -; CHECK: [[sub:%[a-zA-Z0-9_.]+]] = sub <2 x i32> [[call]], +; CHECK: [[sub:%[a-zA-Z0-9_.]+]] = sub <2 x i32> [[call]], splat (i32 16) ; CHECK: [[trunc:%[a-zA-Z0-9_.]+]] = trunc <2 x i32> [[sub]] to <2 x i16> ; CHECK: ret <2 x i16> [[trunc]] ; CHECK: declare <2 x i32> @llvm.ctlz.v2i32(<2 x i32>, i1 immarg) diff --git a/test/IntegerBuiltins/ctz/uchar2_ctz.ll b/test/IntegerBuiltins/ctz/uchar2_ctz.ll index 309e5197b..c180c776c 100644 --- a/test/IntegerBuiltins/ctz/uchar2_ctz.ll +++ b/test/IntegerBuiltins/ctz/uchar2_ctz.ll @@ -13,6 +13,6 @@ entry: declare spir_func <2 x i8> @_Z3ctzDv2_h(<2 x i8>) ; CHECK: [[zext:%[a-zA-Z0-9_.]+]] = zext <2 x i8> %in to <2 x i32> -; CHECK: [[or:%[a-zA-Z0-9_.]+]] = or <2 x i32> [[zext]], +; CHECK: [[or:%[a-zA-Z0-9_.]+]] = or <2 x i32> [[zext]], splat (i32 256) ; CHECK: [[call:%[a-zA-Z0-9_.]+]] = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[or]], i1 false) ; CHECK: trunc <2 x i32> [[call]] to <2 x i8> diff --git a/test/IntegerBuiltins/ctz/ulong2_ctz.ll b/test/IntegerBuiltins/ctz/ulong2_ctz.ll index 6b7c9b8db..af6f6b630 100644 --- a/test/IntegerBuiltins/ctz/ulong2_ctz.ll +++ b/test/IntegerBuiltins/ctz/ulong2_ctz.ll @@ -12,13 +12,13 @@ entry: declare spir_func <2 x i64> @_Z3ctzDv2_m(<2 x i64>) -; CHECK: [[shr:%[a-zA-Z0-9_.]+]] = lshr <2 x i64> %in, +; CHECK: [[shr:%[a-zA-Z0-9_.]+]] = lshr <2 x i64> %in, splat (i64 32) ; CHECK: [[hi:%[a-zA-Z0-9_.]+]] = trunc <2 x i64> [[shr]] to <2 x i32> ; CHECK: [[lo:%[a-zA-Z0-9_.]+]] = trunc <2 x i64> %in to <2 x i32> ; CHECK: [[hi_ctz:%[a-zA-Z0-9_.]+]] = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[hi]], i1 false) ; CHECK: [[lo_ctz:%[a-zA-Z0-9_.]+]] = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[lo]], i1 false) -; CHECK: [[cmp:%[a-zA-Z0-9_.]+]] = icmp eq <2 x i32> [[lo_ctz]], -; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add <2 x i32> [[hi_ctz]], +; CHECK: [[cmp:%[a-zA-Z0-9_.]+]] = icmp eq <2 x i32> [[lo_ctz]], splat (i32 32) +; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add <2 x i32> [[hi_ctz]], splat (i32 32) ; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[cmp]], <2 x i32> [[add]], <2 x i32> [[lo_ctz]] ; CHECK: zext <2 x i32> [[sel]] to <2 x i64> diff --git a/test/IntegerBuiltins/ctz/ushort2_ctz.ll b/test/IntegerBuiltins/ctz/ushort2_ctz.ll index 0f851fded..c544028bd 100644 --- a/test/IntegerBuiltins/ctz/ushort2_ctz.ll +++ b/test/IntegerBuiltins/ctz/ushort2_ctz.ll @@ -13,7 +13,7 @@ entry: declare spir_func <2 x i16> @_Z3ctzDv2_t(<2 x i16>) ; CHECK: [[zext:%[a-zA-Z0-9_.]+]] = zext <2 x i16> %in to <2 x i32> -; CHECK: [[or:%[a-zA-Z0-9_.]+]] = or <2 x i32> [[zext]], +; CHECK: [[or:%[a-zA-Z0-9_.]+]] = or <2 x i32> [[zext]], splat (i32 65536) ; CHECK: [[call:%[a-zA-Z0-9_.]+]] = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[or]], i1 false) ; CHECK: trunc <2 x i32> [[call]] to <2 x i16> diff --git a/test/IntegerBuiltins/hadd/hadd_char2.ll b/test/IntegerBuiltins/hadd/hadd_char2.ll index 987cb5294..4c2f66334 100644 --- a/test/IntegerBuiltins/hadd/hadd_char2.ll +++ b/test/IntegerBuiltins/hadd/hadd_char2.ll @@ -17,10 +17,10 @@ entry: declare <2 x i8> @_Z4haddDv2_cS_(<2 x i8>, <2 x i8>) -; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = ashr <2 x i8> %a, -; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = ashr <2 x i8> %b, +; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = ashr <2 x i8> %a, splat (i8 1) +; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = ashr <2 x i8> %b, splat (i8 1) ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add <2 x i8> [[a_shr]], [[b_shr]] ; CHECK: [[join:%[a-zA-Z0-9_.]+]] = and <2 x i8> %a, %b -; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <2 x i8> [[join]], +; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <2 x i8> [[join]], splat (i8 1) ; CHECK: [[hadd:%[a-zA-Z0-9_.]+]] = add <2 x i8> [[add]], [[and]] ; CHECK: ret <2 x i8> [[hadd]] diff --git a/test/IntegerBuiltins/hadd/hadd_char3.ll b/test/IntegerBuiltins/hadd/hadd_char3.ll index 18d28dfa1..01ba4861e 100644 --- a/test/IntegerBuiltins/hadd/hadd_char3.ll +++ b/test/IntegerBuiltins/hadd/hadd_char3.ll @@ -17,10 +17,10 @@ entry: declare <3 x i8> @_Z4haddDv3_cS_(<3 x i8>, <3 x i8>) -; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = ashr <3 x i8> %a, -; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = ashr <3 x i8> %b, +; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = ashr <3 x i8> %a, splat (i8 1) +; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = ashr <3 x i8> %b, splat (i8 1) ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add <3 x i8> [[a_shr]], [[b_shr]] ; CHECK: [[join:%[a-zA-Z0-9_.]+]] = and <3 x i8> %a, %b -; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <3 x i8> [[join]], +; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <3 x i8> [[join]], splat (i8 1) ; CHECK: [[hadd:%[a-zA-Z0-9_.]+]] = add <3 x i8> [[add]], [[and]] ; CHECK: ret <3 x i8> [[hadd]] diff --git a/test/IntegerBuiltins/hadd/hadd_char4.ll b/test/IntegerBuiltins/hadd/hadd_char4.ll index 43391a427..02bf0f832 100644 --- a/test/IntegerBuiltins/hadd/hadd_char4.ll +++ b/test/IntegerBuiltins/hadd/hadd_char4.ll @@ -17,10 +17,10 @@ entry: declare <4 x i8> @_Z4haddDv4_cS_(<4 x i8>, <4 x i8>) -; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = ashr <4 x i8> %a, -; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = ashr <4 x i8> %b, +; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = ashr <4 x i8> %a, splat (i8 1) +; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = ashr <4 x i8> %b, splat (i8 1) ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add <4 x i8> [[a_shr]], [[b_shr]] ; CHECK: [[join:%[a-zA-Z0-9_.]+]] = and <4 x i8> %a, %b -; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <4 x i8> [[join]], +; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <4 x i8> [[join]], splat (i8 1) ; CHECK: [[hadd:%[a-zA-Z0-9_.]+]] = add <4 x i8> [[add]], [[and]] ; CHECK: ret <4 x i8> [[hadd]] diff --git a/test/IntegerBuiltins/hadd/hadd_int2.ll b/test/IntegerBuiltins/hadd/hadd_int2.ll index bbeb0a020..f5ffccff1 100644 --- a/test/IntegerBuiltins/hadd/hadd_int2.ll +++ b/test/IntegerBuiltins/hadd/hadd_int2.ll @@ -17,10 +17,10 @@ entry: declare <2 x i32> @_Z4haddDv2_iS_(<2 x i32>, <2 x i32>) -; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = ashr <2 x i32> %a, -; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = ashr <2 x i32> %b, +; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = ashr <2 x i32> %a, splat (i32 1) +; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = ashr <2 x i32> %b, splat (i32 1) ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add <2 x i32> [[a_shr]], [[b_shr]] ; CHECK: [[join:%[a-zA-Z0-9_.]+]] = and <2 x i32> %a, %b -; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <2 x i32> [[join]], +; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <2 x i32> [[join]], splat (i32 1) ; CHECK: [[hadd:%[a-zA-Z0-9_.]+]] = add <2 x i32> [[add]], [[and]] ; CHECK: ret <2 x i32> [[hadd]] diff --git a/test/IntegerBuiltins/hadd/hadd_int3.ll b/test/IntegerBuiltins/hadd/hadd_int3.ll index 8e9e46493..5d43ea3a3 100644 --- a/test/IntegerBuiltins/hadd/hadd_int3.ll +++ b/test/IntegerBuiltins/hadd/hadd_int3.ll @@ -17,10 +17,10 @@ entry: declare <3 x i32> @_Z4haddDv3_iS_(<3 x i32>, <3 x i32>) -; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = ashr <3 x i32> %a, -; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = ashr <3 x i32> %b, +; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = ashr <3 x i32> %a, splat (i32 1) +; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = ashr <3 x i32> %b, splat (i32 1) ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add <3 x i32> [[a_shr]], [[b_shr]] ; CHECK: [[join:%[a-zA-Z0-9_.]+]] = and <3 x i32> %a, %b -; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <3 x i32> [[join]], +; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <3 x i32> [[join]], splat (i32 1) ; CHECK: [[hadd:%[a-zA-Z0-9_.]+]] = add <3 x i32> [[add]], [[and]] ; CHECK: ret <3 x i32> [[hadd]] diff --git a/test/IntegerBuiltins/hadd/hadd_int4.ll b/test/IntegerBuiltins/hadd/hadd_int4.ll index 53ceea18d..4dfd03574 100644 --- a/test/IntegerBuiltins/hadd/hadd_int4.ll +++ b/test/IntegerBuiltins/hadd/hadd_int4.ll @@ -17,10 +17,10 @@ entry: declare <4 x i32> @_Z4haddDv4_iS_(<4 x i32>, <4 x i32>) -; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = ashr <4 x i32> %a, -; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = ashr <4 x i32> %b, +; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = ashr <4 x i32> %a, splat (i32 1) +; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = ashr <4 x i32> %b, splat (i32 1) ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add <4 x i32> [[a_shr]], [[b_shr]] ; CHECK: [[join:%[a-zA-Z0-9_.]+]] = and <4 x i32> %a, %b -; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <4 x i32> [[join]], +; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <4 x i32> [[join]], splat (i32 1) ; CHECK: [[hadd:%[a-zA-Z0-9_.]+]] = add <4 x i32> [[add]], [[and]] ; CHECK: ret <4 x i32> [[hadd]] diff --git a/test/IntegerBuiltins/hadd/hadd_long2.ll b/test/IntegerBuiltins/hadd/hadd_long2.ll index 39e17243c..0a56bcd07 100644 --- a/test/IntegerBuiltins/hadd/hadd_long2.ll +++ b/test/IntegerBuiltins/hadd/hadd_long2.ll @@ -17,10 +17,10 @@ entry: declare <2 x i64> @_Z4haddDv2_lS_(<2 x i64>, <2 x i64>) -; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = ashr <2 x i64> %a, -; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = ashr <2 x i64> %b, +; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = ashr <2 x i64> %a, splat (i64 1) +; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = ashr <2 x i64> %b, splat (i64 1) ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add <2 x i64> [[a_shr]], [[b_shr]] ; CHECK: [[join:%[a-zA-Z0-9_.]+]] = and <2 x i64> %a, %b -; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <2 x i64> [[join]], +; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <2 x i64> [[join]], splat (i64 1) ; CHECK: [[hadd:%[a-zA-Z0-9_.]+]] = add <2 x i64> [[add]], [[and]] ; CHECK: ret <2 x i64> [[hadd]] diff --git a/test/IntegerBuiltins/hadd/hadd_long3.ll b/test/IntegerBuiltins/hadd/hadd_long3.ll index f6fdc4ad2..987c7fd18 100644 --- a/test/IntegerBuiltins/hadd/hadd_long3.ll +++ b/test/IntegerBuiltins/hadd/hadd_long3.ll @@ -17,10 +17,10 @@ entry: declare <3 x i64> @_Z4haddDv3_lS_(<3 x i64>, <3 x i64>) -; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = ashr <3 x i64> %a, -; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = ashr <3 x i64> %b, +; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = ashr <3 x i64> %a, splat (i64 1) +; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = ashr <3 x i64> %b, splat (i64 1) ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add <3 x i64> [[a_shr]], [[b_shr]] ; CHECK: [[join:%[a-zA-Z0-9_.]+]] = and <3 x i64> %a, %b -; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <3 x i64> [[join]], +; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <3 x i64> [[join]], splat (i64 1) ; CHECK: [[hadd:%[a-zA-Z0-9_.]+]] = add <3 x i64> [[add]], [[and]] ; CHECK: ret <3 x i64> [[hadd]] diff --git a/test/IntegerBuiltins/hadd/hadd_long4.ll b/test/IntegerBuiltins/hadd/hadd_long4.ll index 808de0309..eec17df2c 100644 --- a/test/IntegerBuiltins/hadd/hadd_long4.ll +++ b/test/IntegerBuiltins/hadd/hadd_long4.ll @@ -17,10 +17,10 @@ entry: declare <4 x i64> @_Z4haddDv4_lS_(<4 x i64>, <4 x i64>) -; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = ashr <4 x i64> %a, -; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = ashr <4 x i64> %b, +; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = ashr <4 x i64> %a, splat (i64 1) +; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = ashr <4 x i64> %b, splat (i64 1) ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add <4 x i64> [[a_shr]], [[b_shr]] ; CHECK: [[join:%[a-zA-Z0-9_.]+]] = and <4 x i64> %a, %b -; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <4 x i64> [[join]], +; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <4 x i64> [[join]], splat (i64 1) ; CHECK: [[hadd:%[a-zA-Z0-9_.]+]] = add <4 x i64> [[add]], [[and]] ; CHECK: ret <4 x i64> [[hadd]] diff --git a/test/IntegerBuiltins/hadd/hadd_short2.ll b/test/IntegerBuiltins/hadd/hadd_short2.ll index 082173952..82e2f6f5c 100644 --- a/test/IntegerBuiltins/hadd/hadd_short2.ll +++ b/test/IntegerBuiltins/hadd/hadd_short2.ll @@ -17,10 +17,10 @@ entry: declare <2 x i16> @_Z4haddDv2_sS_(<2 x i16>, <2 x i16>) -; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = ashr <2 x i16> %a, -; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = ashr <2 x i16> %b, +; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = ashr <2 x i16> %a, splat (i16 1) +; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = ashr <2 x i16> %b, splat (i16 1) ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add <2 x i16> [[a_shr]], [[b_shr]] ; CHECK: [[join:%[a-zA-Z0-9_.]+]] = and <2 x i16> %a, %b -; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <2 x i16> [[join]], +; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <2 x i16> [[join]], splat (i16 1) ; CHECK: [[hadd:%[a-zA-Z0-9_.]+]] = add <2 x i16> [[add]], [[and]] ; CHECK: ret <2 x i16> [[hadd]] diff --git a/test/IntegerBuiltins/hadd/hadd_short3.ll b/test/IntegerBuiltins/hadd/hadd_short3.ll index e93138b3d..d12e79afc 100644 --- a/test/IntegerBuiltins/hadd/hadd_short3.ll +++ b/test/IntegerBuiltins/hadd/hadd_short3.ll @@ -17,10 +17,10 @@ entry: declare <3 x i16> @_Z4haddDv3_sS_(<3 x i16>, <3 x i16>) -; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = ashr <3 x i16> %a, -; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = ashr <3 x i16> %b, +; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = ashr <3 x i16> %a, splat (i16 1) +; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = ashr <3 x i16> %b, splat (i16 1) ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add <3 x i16> [[a_shr]], [[b_shr]] ; CHECK: [[join:%[a-zA-Z0-9_.]+]] = and <3 x i16> %a, %b -; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <3 x i16> [[join]], +; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <3 x i16> [[join]], splat (i16 1) ; CHECK: [[hadd:%[a-zA-Z0-9_.]+]] = add <3 x i16> [[add]], [[and]] ; CHECK: ret <3 x i16> [[hadd]] diff --git a/test/IntegerBuiltins/hadd/hadd_short4.ll b/test/IntegerBuiltins/hadd/hadd_short4.ll index 00adc2553..a12468578 100644 --- a/test/IntegerBuiltins/hadd/hadd_short4.ll +++ b/test/IntegerBuiltins/hadd/hadd_short4.ll @@ -17,10 +17,10 @@ entry: declare <4 x i16> @_Z4haddDv4_sS_(<4 x i16>, <4 x i16>) -; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = ashr <4 x i16> %a, -; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = ashr <4 x i16> %b, +; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = ashr <4 x i16> %a, splat (i16 1) +; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = ashr <4 x i16> %b, splat (i16 1) ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add <4 x i16> [[a_shr]], [[b_shr]] ; CHECK: [[join:%[a-zA-Z0-9_.]+]] = and <4 x i16> %a, %b -; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <4 x i16> [[join]], +; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <4 x i16> [[join]], splat (i16 1) ; CHECK: [[hadd:%[a-zA-Z0-9_.]+]] = add <4 x i16> [[add]], [[and]] ; CHECK: ret <4 x i16> [[hadd]] diff --git a/test/IntegerBuiltins/hadd/hadd_test_gen.cpp b/test/IntegerBuiltins/hadd/hadd_test_gen.cpp index 6a97141e7..40b1d93f6 100644 --- a/test/IntegerBuiltins/hadd/hadd_test_gen.cpp +++ b/test/IntegerBuiltins/hadd/hadd_test_gen.cpp @@ -19,7 +19,7 @@ #include const std::string preamble = R"( -; RUN: clspv-opt -ReplaceOpenCLBuiltin %s -o %t.ll +; RUN: clspv-opt --passes=replace-opencl-builtin %s -o %t.ll ; RUN: FileCheck %s < %t.ll ; AUTO-GENERATED TEST FILE @@ -103,13 +103,7 @@ std::string SplatConstant(uint32_t vector, const std::string &type, if (vector == 1) return value; - std::string constant = "<"; - for (auto i = 0; i < vector; ++i) { - constant += type + " " + value; - constant += (i == (vector - 1) ? "" : ", "); - } - constant += ">"; - return constant; + return "splat (" + type + " " + value + ")"; } int main() { diff --git a/test/IntegerBuiltins/hadd/hadd_uchar2.ll b/test/IntegerBuiltins/hadd/hadd_uchar2.ll index 469d7737b..574b70f83 100644 --- a/test/IntegerBuiltins/hadd/hadd_uchar2.ll +++ b/test/IntegerBuiltins/hadd/hadd_uchar2.ll @@ -17,10 +17,10 @@ entry: declare <2 x i8> @_Z4haddDv2_hS_(<2 x i8>, <2 x i8>) -; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = lshr <2 x i8> %a, -; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = lshr <2 x i8> %b, +; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = lshr <2 x i8> %a, splat (i8 1) +; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = lshr <2 x i8> %b, splat (i8 1) ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add <2 x i8> [[a_shr]], [[b_shr]] ; CHECK: [[join:%[a-zA-Z0-9_.]+]] = and <2 x i8> %a, %b -; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <2 x i8> [[join]], +; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <2 x i8> [[join]], splat (i8 1) ; CHECK: [[hadd:%[a-zA-Z0-9_.]+]] = add <2 x i8> [[add]], [[and]] ; CHECK: ret <2 x i8> [[hadd]] diff --git a/test/IntegerBuiltins/hadd/hadd_uchar3.ll b/test/IntegerBuiltins/hadd/hadd_uchar3.ll index 7def7dd82..fecc78c06 100644 --- a/test/IntegerBuiltins/hadd/hadd_uchar3.ll +++ b/test/IntegerBuiltins/hadd/hadd_uchar3.ll @@ -17,10 +17,10 @@ entry: declare <3 x i8> @_Z4haddDv3_hS_(<3 x i8>, <3 x i8>) -; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = lshr <3 x i8> %a, -; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = lshr <3 x i8> %b, +; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = lshr <3 x i8> %a, splat (i8 1) +; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = lshr <3 x i8> %b, splat (i8 1) ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add <3 x i8> [[a_shr]], [[b_shr]] ; CHECK: [[join:%[a-zA-Z0-9_.]+]] = and <3 x i8> %a, %b -; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <3 x i8> [[join]], +; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <3 x i8> [[join]], splat (i8 1) ; CHECK: [[hadd:%[a-zA-Z0-9_.]+]] = add <3 x i8> [[add]], [[and]] ; CHECK: ret <3 x i8> [[hadd]] diff --git a/test/IntegerBuiltins/hadd/hadd_uchar4.ll b/test/IntegerBuiltins/hadd/hadd_uchar4.ll index c1aa1f6ed..d4be6c03d 100644 --- a/test/IntegerBuiltins/hadd/hadd_uchar4.ll +++ b/test/IntegerBuiltins/hadd/hadd_uchar4.ll @@ -17,10 +17,10 @@ entry: declare <4 x i8> @_Z4haddDv4_hS_(<4 x i8>, <4 x i8>) -; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = lshr <4 x i8> %a, -; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = lshr <4 x i8> %b, +; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = lshr <4 x i8> %a, splat (i8 1) +; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = lshr <4 x i8> %b, splat (i8 1) ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add <4 x i8> [[a_shr]], [[b_shr]] ; CHECK: [[join:%[a-zA-Z0-9_.]+]] = and <4 x i8> %a, %b -; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <4 x i8> [[join]], +; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <4 x i8> [[join]], splat (i8 1) ; CHECK: [[hadd:%[a-zA-Z0-9_.]+]] = add <4 x i8> [[add]], [[and]] ; CHECK: ret <4 x i8> [[hadd]] diff --git a/test/IntegerBuiltins/hadd/hadd_uint2.ll b/test/IntegerBuiltins/hadd/hadd_uint2.ll index e69edc85b..e096a8aff 100644 --- a/test/IntegerBuiltins/hadd/hadd_uint2.ll +++ b/test/IntegerBuiltins/hadd/hadd_uint2.ll @@ -17,10 +17,10 @@ entry: declare <2 x i32> @_Z4haddDv2_jS_(<2 x i32>, <2 x i32>) -; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = lshr <2 x i32> %a, -; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = lshr <2 x i32> %b, +; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = lshr <2 x i32> %a, splat (i32 1) +; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = lshr <2 x i32> %b, splat (i32 1) ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add <2 x i32> [[a_shr]], [[b_shr]] ; CHECK: [[join:%[a-zA-Z0-9_.]+]] = and <2 x i32> %a, %b -; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <2 x i32> [[join]], +; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <2 x i32> [[join]], splat (i32 1) ; CHECK: [[hadd:%[a-zA-Z0-9_.]+]] = add <2 x i32> [[add]], [[and]] ; CHECK: ret <2 x i32> [[hadd]] diff --git a/test/IntegerBuiltins/hadd/hadd_uint3.ll b/test/IntegerBuiltins/hadd/hadd_uint3.ll index 79b0dc6cd..bd5286414 100644 --- a/test/IntegerBuiltins/hadd/hadd_uint3.ll +++ b/test/IntegerBuiltins/hadd/hadd_uint3.ll @@ -17,10 +17,10 @@ entry: declare <3 x i32> @_Z4haddDv3_jS_(<3 x i32>, <3 x i32>) -; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = lshr <3 x i32> %a, -; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = lshr <3 x i32> %b, +; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = lshr <3 x i32> %a, splat (i32 1) +; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = lshr <3 x i32> %b, splat (i32 1) ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add <3 x i32> [[a_shr]], [[b_shr]] ; CHECK: [[join:%[a-zA-Z0-9_.]+]] = and <3 x i32> %a, %b -; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <3 x i32> [[join]], +; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <3 x i32> [[join]], splat (i32 1) ; CHECK: [[hadd:%[a-zA-Z0-9_.]+]] = add <3 x i32> [[add]], [[and]] ; CHECK: ret <3 x i32> [[hadd]] diff --git a/test/IntegerBuiltins/hadd/hadd_uint4.ll b/test/IntegerBuiltins/hadd/hadd_uint4.ll index ef7b75468..9e5de2e71 100644 --- a/test/IntegerBuiltins/hadd/hadd_uint4.ll +++ b/test/IntegerBuiltins/hadd/hadd_uint4.ll @@ -17,10 +17,10 @@ entry: declare <4 x i32> @_Z4haddDv4_jS_(<4 x i32>, <4 x i32>) -; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = lshr <4 x i32> %a, -; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = lshr <4 x i32> %b, +; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = lshr <4 x i32> %a, splat (i32 1) +; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = lshr <4 x i32> %b, splat (i32 1) ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add <4 x i32> [[a_shr]], [[b_shr]] ; CHECK: [[join:%[a-zA-Z0-9_.]+]] = and <4 x i32> %a, %b -; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <4 x i32> [[join]], +; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <4 x i32> [[join]], splat (i32 1) ; CHECK: [[hadd:%[a-zA-Z0-9_.]+]] = add <4 x i32> [[add]], [[and]] ; CHECK: ret <4 x i32> [[hadd]] diff --git a/test/IntegerBuiltins/hadd/hadd_ulong2.ll b/test/IntegerBuiltins/hadd/hadd_ulong2.ll index a463e701c..a96b01f8d 100644 --- a/test/IntegerBuiltins/hadd/hadd_ulong2.ll +++ b/test/IntegerBuiltins/hadd/hadd_ulong2.ll @@ -17,10 +17,10 @@ entry: declare <2 x i64> @_Z4haddDv2_mS_(<2 x i64>, <2 x i64>) -; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = lshr <2 x i64> %a, -; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = lshr <2 x i64> %b, +; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = lshr <2 x i64> %a, splat (i64 1) +; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = lshr <2 x i64> %b, splat (i64 1) ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add <2 x i64> [[a_shr]], [[b_shr]] ; CHECK: [[join:%[a-zA-Z0-9_.]+]] = and <2 x i64> %a, %b -; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <2 x i64> [[join]], +; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <2 x i64> [[join]], splat (i64 1) ; CHECK: [[hadd:%[a-zA-Z0-9_.]+]] = add <2 x i64> [[add]], [[and]] ; CHECK: ret <2 x i64> [[hadd]] diff --git a/test/IntegerBuiltins/hadd/hadd_ulong3.ll b/test/IntegerBuiltins/hadd/hadd_ulong3.ll index 466bc799d..b1fc41f21 100644 --- a/test/IntegerBuiltins/hadd/hadd_ulong3.ll +++ b/test/IntegerBuiltins/hadd/hadd_ulong3.ll @@ -17,10 +17,10 @@ entry: declare <3 x i64> @_Z4haddDv3_mS_(<3 x i64>, <3 x i64>) -; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = lshr <3 x i64> %a, -; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = lshr <3 x i64> %b, +; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = lshr <3 x i64> %a, splat (i64 1) +; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = lshr <3 x i64> %b, splat (i64 1) ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add <3 x i64> [[a_shr]], [[b_shr]] ; CHECK: [[join:%[a-zA-Z0-9_.]+]] = and <3 x i64> %a, %b -; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <3 x i64> [[join]], +; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <3 x i64> [[join]], splat (i64 1) ; CHECK: [[hadd:%[a-zA-Z0-9_.]+]] = add <3 x i64> [[add]], [[and]] ; CHECK: ret <3 x i64> [[hadd]] diff --git a/test/IntegerBuiltins/hadd/hadd_ulong4.ll b/test/IntegerBuiltins/hadd/hadd_ulong4.ll index 261b253e8..ee20b34f5 100644 --- a/test/IntegerBuiltins/hadd/hadd_ulong4.ll +++ b/test/IntegerBuiltins/hadd/hadd_ulong4.ll @@ -17,10 +17,10 @@ entry: declare <4 x i64> @_Z4haddDv4_mS_(<4 x i64>, <4 x i64>) -; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = lshr <4 x i64> %a, -; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = lshr <4 x i64> %b, +; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = lshr <4 x i64> %a, splat (i64 1) +; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = lshr <4 x i64> %b, splat (i64 1) ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add <4 x i64> [[a_shr]], [[b_shr]] ; CHECK: [[join:%[a-zA-Z0-9_.]+]] = and <4 x i64> %a, %b -; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <4 x i64> [[join]], +; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <4 x i64> [[join]], splat (i64 1) ; CHECK: [[hadd:%[a-zA-Z0-9_.]+]] = add <4 x i64> [[add]], [[and]] ; CHECK: ret <4 x i64> [[hadd]] diff --git a/test/IntegerBuiltins/hadd/hadd_ushort2.ll b/test/IntegerBuiltins/hadd/hadd_ushort2.ll index 8aabcc6f9..c1b9f75ab 100644 --- a/test/IntegerBuiltins/hadd/hadd_ushort2.ll +++ b/test/IntegerBuiltins/hadd/hadd_ushort2.ll @@ -17,10 +17,10 @@ entry: declare <2 x i16> @_Z4haddDv2_tS_(<2 x i16>, <2 x i16>) -; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = lshr <2 x i16> %a, -; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = lshr <2 x i16> %b, +; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = lshr <2 x i16> %a, splat (i16 1) +; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = lshr <2 x i16> %b, splat (i16 1) ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add <2 x i16> [[a_shr]], [[b_shr]] ; CHECK: [[join:%[a-zA-Z0-9_.]+]] = and <2 x i16> %a, %b -; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <2 x i16> [[join]], +; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <2 x i16> [[join]], splat (i16 1) ; CHECK: [[hadd:%[a-zA-Z0-9_.]+]] = add <2 x i16> [[add]], [[and]] ; CHECK: ret <2 x i16> [[hadd]] diff --git a/test/IntegerBuiltins/hadd/hadd_ushort3.ll b/test/IntegerBuiltins/hadd/hadd_ushort3.ll index 57db1837b..103030be2 100644 --- a/test/IntegerBuiltins/hadd/hadd_ushort3.ll +++ b/test/IntegerBuiltins/hadd/hadd_ushort3.ll @@ -17,10 +17,10 @@ entry: declare <3 x i16> @_Z4haddDv3_tS_(<3 x i16>, <3 x i16>) -; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = lshr <3 x i16> %a, -; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = lshr <3 x i16> %b, +; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = lshr <3 x i16> %a, splat (i16 1) +; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = lshr <3 x i16> %b, splat (i16 1) ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add <3 x i16> [[a_shr]], [[b_shr]] ; CHECK: [[join:%[a-zA-Z0-9_.]+]] = and <3 x i16> %a, %b -; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <3 x i16> [[join]], +; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <3 x i16> [[join]], splat (i16 1) ; CHECK: [[hadd:%[a-zA-Z0-9_.]+]] = add <3 x i16> [[add]], [[and]] ; CHECK: ret <3 x i16> [[hadd]] diff --git a/test/IntegerBuiltins/hadd/hadd_ushort4.ll b/test/IntegerBuiltins/hadd/hadd_ushort4.ll index b470fc28c..d19bdba0d 100644 --- a/test/IntegerBuiltins/hadd/hadd_ushort4.ll +++ b/test/IntegerBuiltins/hadd/hadd_ushort4.ll @@ -17,10 +17,10 @@ entry: declare <4 x i16> @_Z4haddDv4_tS_(<4 x i16>, <4 x i16>) -; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = lshr <4 x i16> %a, -; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = lshr <4 x i16> %b, +; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = lshr <4 x i16> %a, splat (i16 1) +; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = lshr <4 x i16> %b, splat (i16 1) ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add <4 x i16> [[a_shr]], [[b_shr]] ; CHECK: [[join:%[a-zA-Z0-9_.]+]] = and <4 x i16> %a, %b -; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <4 x i16> [[join]], +; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <4 x i16> [[join]], splat (i16 1) ; CHECK: [[hadd:%[a-zA-Z0-9_.]+]] = add <4 x i16> [[add]], [[and]] ; CHECK: ret <4 x i16> [[hadd]] diff --git a/test/IntegerBuiltins/hadd/rhadd_char2.ll b/test/IntegerBuiltins/hadd/rhadd_char2.ll index 2e0f82ed6..02431ccb5 100644 --- a/test/IntegerBuiltins/hadd/rhadd_char2.ll +++ b/test/IntegerBuiltins/hadd/rhadd_char2.ll @@ -17,10 +17,10 @@ entry: declare <2 x i8> @_Z5rhaddDv2_cS_(<2 x i8>, <2 x i8>) -; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = ashr <2 x i8> %a, -; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = ashr <2 x i8> %b, +; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = ashr <2 x i8> %a, splat (i8 1) +; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = ashr <2 x i8> %b, splat (i8 1) ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add <2 x i8> [[a_shr]], [[b_shr]] ; CHECK: [[join:%[a-zA-Z0-9_.]+]] = or <2 x i8> %a, %b -; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <2 x i8> [[join]], +; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <2 x i8> [[join]], splat (i8 1) ; CHECK: [[hadd:%[a-zA-Z0-9_.]+]] = add <2 x i8> [[add]], [[and]] ; CHECK: ret <2 x i8> [[hadd]] diff --git a/test/IntegerBuiltins/hadd/rhadd_char3.ll b/test/IntegerBuiltins/hadd/rhadd_char3.ll index b5c6f1e4e..1f42c0c7c 100644 --- a/test/IntegerBuiltins/hadd/rhadd_char3.ll +++ b/test/IntegerBuiltins/hadd/rhadd_char3.ll @@ -17,10 +17,10 @@ entry: declare <3 x i8> @_Z5rhaddDv3_cS_(<3 x i8>, <3 x i8>) -; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = ashr <3 x i8> %a, -; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = ashr <3 x i8> %b, +; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = ashr <3 x i8> %a, splat (i8 1) +; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = ashr <3 x i8> %b, splat (i8 1) ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add <3 x i8> [[a_shr]], [[b_shr]] ; CHECK: [[join:%[a-zA-Z0-9_.]+]] = or <3 x i8> %a, %b -; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <3 x i8> [[join]], +; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <3 x i8> [[join]], splat (i8 1) ; CHECK: [[hadd:%[a-zA-Z0-9_.]+]] = add <3 x i8> [[add]], [[and]] ; CHECK: ret <3 x i8> [[hadd]] diff --git a/test/IntegerBuiltins/hadd/rhadd_char4.ll b/test/IntegerBuiltins/hadd/rhadd_char4.ll index 674c3ad5b..98bbca57a 100644 --- a/test/IntegerBuiltins/hadd/rhadd_char4.ll +++ b/test/IntegerBuiltins/hadd/rhadd_char4.ll @@ -17,10 +17,10 @@ entry: declare <4 x i8> @_Z5rhaddDv4_cS_(<4 x i8>, <4 x i8>) -; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = ashr <4 x i8> %a, -; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = ashr <4 x i8> %b, +; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = ashr <4 x i8> %a, splat (i8 1) +; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = ashr <4 x i8> %b, splat (i8 1) ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add <4 x i8> [[a_shr]], [[b_shr]] ; CHECK: [[join:%[a-zA-Z0-9_.]+]] = or <4 x i8> %a, %b -; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <4 x i8> [[join]], +; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <4 x i8> [[join]], splat (i8 1) ; CHECK: [[hadd:%[a-zA-Z0-9_.]+]] = add <4 x i8> [[add]], [[and]] ; CHECK: ret <4 x i8> [[hadd]] diff --git a/test/IntegerBuiltins/hadd/rhadd_int2.ll b/test/IntegerBuiltins/hadd/rhadd_int2.ll index 49d887f58..50a64b2d9 100644 --- a/test/IntegerBuiltins/hadd/rhadd_int2.ll +++ b/test/IntegerBuiltins/hadd/rhadd_int2.ll @@ -17,10 +17,10 @@ entry: declare <2 x i32> @_Z5rhaddDv2_iS_(<2 x i32>, <2 x i32>) -; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = ashr <2 x i32> %a, -; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = ashr <2 x i32> %b, +; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = ashr <2 x i32> %a, splat (i32 1) +; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = ashr <2 x i32> %b, splat (i32 1) ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add <2 x i32> [[a_shr]], [[b_shr]] ; CHECK: [[join:%[a-zA-Z0-9_.]+]] = or <2 x i32> %a, %b -; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <2 x i32> [[join]], +; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <2 x i32> [[join]], splat (i32 1) ; CHECK: [[hadd:%[a-zA-Z0-9_.]+]] = add <2 x i32> [[add]], [[and]] ; CHECK: ret <2 x i32> [[hadd]] diff --git a/test/IntegerBuiltins/hadd/rhadd_int3.ll b/test/IntegerBuiltins/hadd/rhadd_int3.ll index ce1935afe..2d492a089 100644 --- a/test/IntegerBuiltins/hadd/rhadd_int3.ll +++ b/test/IntegerBuiltins/hadd/rhadd_int3.ll @@ -17,10 +17,10 @@ entry: declare <3 x i32> @_Z5rhaddDv3_iS_(<3 x i32>, <3 x i32>) -; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = ashr <3 x i32> %a, -; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = ashr <3 x i32> %b, +; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = ashr <3 x i32> %a, splat (i32 1) +; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = ashr <3 x i32> %b, splat (i32 1) ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add <3 x i32> [[a_shr]], [[b_shr]] ; CHECK: [[join:%[a-zA-Z0-9_.]+]] = or <3 x i32> %a, %b -; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <3 x i32> [[join]], +; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <3 x i32> [[join]], splat (i32 1) ; CHECK: [[hadd:%[a-zA-Z0-9_.]+]] = add <3 x i32> [[add]], [[and]] ; CHECK: ret <3 x i32> [[hadd]] diff --git a/test/IntegerBuiltins/hadd/rhadd_int4.ll b/test/IntegerBuiltins/hadd/rhadd_int4.ll index 0ab0ebef6..45ab2f29f 100644 --- a/test/IntegerBuiltins/hadd/rhadd_int4.ll +++ b/test/IntegerBuiltins/hadd/rhadd_int4.ll @@ -17,10 +17,10 @@ entry: declare <4 x i32> @_Z5rhaddDv4_iS_(<4 x i32>, <4 x i32>) -; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = ashr <4 x i32> %a, -; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = ashr <4 x i32> %b, +; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = ashr <4 x i32> %a, splat (i32 1) +; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = ashr <4 x i32> %b, splat (i32 1) ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add <4 x i32> [[a_shr]], [[b_shr]] ; CHECK: [[join:%[a-zA-Z0-9_.]+]] = or <4 x i32> %a, %b -; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <4 x i32> [[join]], +; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <4 x i32> [[join]], splat (i32 1) ; CHECK: [[hadd:%[a-zA-Z0-9_.]+]] = add <4 x i32> [[add]], [[and]] ; CHECK: ret <4 x i32> [[hadd]] diff --git a/test/IntegerBuiltins/hadd/rhadd_long2.ll b/test/IntegerBuiltins/hadd/rhadd_long2.ll index 0715e12d4..e8925f079 100644 --- a/test/IntegerBuiltins/hadd/rhadd_long2.ll +++ b/test/IntegerBuiltins/hadd/rhadd_long2.ll @@ -17,10 +17,10 @@ entry: declare <2 x i64> @_Z5rhaddDv2_lS_(<2 x i64>, <2 x i64>) -; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = ashr <2 x i64> %a, -; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = ashr <2 x i64> %b, +; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = ashr <2 x i64> %a, splat (i64 1) +; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = ashr <2 x i64> %b, splat (i64 1) ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add <2 x i64> [[a_shr]], [[b_shr]] ; CHECK: [[join:%[a-zA-Z0-9_.]+]] = or <2 x i64> %a, %b -; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <2 x i64> [[join]], +; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <2 x i64> [[join]], splat (i64 1) ; CHECK: [[hadd:%[a-zA-Z0-9_.]+]] = add <2 x i64> [[add]], [[and]] ; CHECK: ret <2 x i64> [[hadd]] diff --git a/test/IntegerBuiltins/hadd/rhadd_long3.ll b/test/IntegerBuiltins/hadd/rhadd_long3.ll index d2cfca968..87789d910 100644 --- a/test/IntegerBuiltins/hadd/rhadd_long3.ll +++ b/test/IntegerBuiltins/hadd/rhadd_long3.ll @@ -17,10 +17,10 @@ entry: declare <3 x i64> @_Z5rhaddDv3_lS_(<3 x i64>, <3 x i64>) -; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = ashr <3 x i64> %a, -; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = ashr <3 x i64> %b, +; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = ashr <3 x i64> %a, splat (i64 1) +; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = ashr <3 x i64> %b, splat (i64 1) ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add <3 x i64> [[a_shr]], [[b_shr]] ; CHECK: [[join:%[a-zA-Z0-9_.]+]] = or <3 x i64> %a, %b -; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <3 x i64> [[join]], +; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <3 x i64> [[join]], splat (i64 1) ; CHECK: [[hadd:%[a-zA-Z0-9_.]+]] = add <3 x i64> [[add]], [[and]] ; CHECK: ret <3 x i64> [[hadd]] diff --git a/test/IntegerBuiltins/hadd/rhadd_long4.ll b/test/IntegerBuiltins/hadd/rhadd_long4.ll index 9bbd95002..c3fb3f76d 100644 --- a/test/IntegerBuiltins/hadd/rhadd_long4.ll +++ b/test/IntegerBuiltins/hadd/rhadd_long4.ll @@ -17,10 +17,10 @@ entry: declare <4 x i64> @_Z5rhaddDv4_lS_(<4 x i64>, <4 x i64>) -; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = ashr <4 x i64> %a, -; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = ashr <4 x i64> %b, +; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = ashr <4 x i64> %a, splat (i64 1) +; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = ashr <4 x i64> %b, splat (i64 1) ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add <4 x i64> [[a_shr]], [[b_shr]] ; CHECK: [[join:%[a-zA-Z0-9_.]+]] = or <4 x i64> %a, %b -; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <4 x i64> [[join]], +; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <4 x i64> [[join]], splat (i64 1) ; CHECK: [[hadd:%[a-zA-Z0-9_.]+]] = add <4 x i64> [[add]], [[and]] ; CHECK: ret <4 x i64> [[hadd]] diff --git a/test/IntegerBuiltins/hadd/rhadd_short2.ll b/test/IntegerBuiltins/hadd/rhadd_short2.ll index 5e2265fa7..fe4ff58fa 100644 --- a/test/IntegerBuiltins/hadd/rhadd_short2.ll +++ b/test/IntegerBuiltins/hadd/rhadd_short2.ll @@ -17,10 +17,10 @@ entry: declare <2 x i16> @_Z5rhaddDv2_sS_(<2 x i16>, <2 x i16>) -; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = ashr <2 x i16> %a, -; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = ashr <2 x i16> %b, +; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = ashr <2 x i16> %a, splat (i16 1) +; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = ashr <2 x i16> %b, splat (i16 1) ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add <2 x i16> [[a_shr]], [[b_shr]] ; CHECK: [[join:%[a-zA-Z0-9_.]+]] = or <2 x i16> %a, %b -; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <2 x i16> [[join]], +; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <2 x i16> [[join]], splat (i16 1) ; CHECK: [[hadd:%[a-zA-Z0-9_.]+]] = add <2 x i16> [[add]], [[and]] ; CHECK: ret <2 x i16> [[hadd]] diff --git a/test/IntegerBuiltins/hadd/rhadd_short3.ll b/test/IntegerBuiltins/hadd/rhadd_short3.ll index 46d3872c4..b8544ef62 100644 --- a/test/IntegerBuiltins/hadd/rhadd_short3.ll +++ b/test/IntegerBuiltins/hadd/rhadd_short3.ll @@ -17,10 +17,10 @@ entry: declare <3 x i16> @_Z5rhaddDv3_sS_(<3 x i16>, <3 x i16>) -; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = ashr <3 x i16> %a, -; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = ashr <3 x i16> %b, +; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = ashr <3 x i16> %a, splat (i16 1) +; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = ashr <3 x i16> %b, splat (i16 1) ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add <3 x i16> [[a_shr]], [[b_shr]] ; CHECK: [[join:%[a-zA-Z0-9_.]+]] = or <3 x i16> %a, %b -; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <3 x i16> [[join]], +; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <3 x i16> [[join]], splat (i16 1) ; CHECK: [[hadd:%[a-zA-Z0-9_.]+]] = add <3 x i16> [[add]], [[and]] ; CHECK: ret <3 x i16> [[hadd]] diff --git a/test/IntegerBuiltins/hadd/rhadd_short4.ll b/test/IntegerBuiltins/hadd/rhadd_short4.ll index 4d7e0e89f..2e89faeac 100644 --- a/test/IntegerBuiltins/hadd/rhadd_short4.ll +++ b/test/IntegerBuiltins/hadd/rhadd_short4.ll @@ -17,10 +17,10 @@ entry: declare <4 x i16> @_Z5rhaddDv4_sS_(<4 x i16>, <4 x i16>) -; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = ashr <4 x i16> %a, -; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = ashr <4 x i16> %b, +; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = ashr <4 x i16> %a, splat (i16 1) +; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = ashr <4 x i16> %b, splat (i16 1) ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add <4 x i16> [[a_shr]], [[b_shr]] ; CHECK: [[join:%[a-zA-Z0-9_.]+]] = or <4 x i16> %a, %b -; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <4 x i16> [[join]], +; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <4 x i16> [[join]], splat (i16 1) ; CHECK: [[hadd:%[a-zA-Z0-9_.]+]] = add <4 x i16> [[add]], [[and]] ; CHECK: ret <4 x i16> [[hadd]] diff --git a/test/IntegerBuiltins/hadd/rhadd_uchar2.ll b/test/IntegerBuiltins/hadd/rhadd_uchar2.ll index 1bed3a065..cb2d3018c 100644 --- a/test/IntegerBuiltins/hadd/rhadd_uchar2.ll +++ b/test/IntegerBuiltins/hadd/rhadd_uchar2.ll @@ -17,10 +17,10 @@ entry: declare <2 x i8> @_Z5rhaddDv2_hS_(<2 x i8>, <2 x i8>) -; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = lshr <2 x i8> %a, -; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = lshr <2 x i8> %b, +; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = lshr <2 x i8> %a, splat (i8 1) +; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = lshr <2 x i8> %b, splat (i8 1) ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add <2 x i8> [[a_shr]], [[b_shr]] ; CHECK: [[join:%[a-zA-Z0-9_.]+]] = or <2 x i8> %a, %b -; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <2 x i8> [[join]], +; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <2 x i8> [[join]], splat (i8 1) ; CHECK: [[hadd:%[a-zA-Z0-9_.]+]] = add <2 x i8> [[add]], [[and]] ; CHECK: ret <2 x i8> [[hadd]] diff --git a/test/IntegerBuiltins/hadd/rhadd_uchar3.ll b/test/IntegerBuiltins/hadd/rhadd_uchar3.ll index 707855441..0009da9aa 100644 --- a/test/IntegerBuiltins/hadd/rhadd_uchar3.ll +++ b/test/IntegerBuiltins/hadd/rhadd_uchar3.ll @@ -17,10 +17,10 @@ entry: declare <3 x i8> @_Z5rhaddDv3_hS_(<3 x i8>, <3 x i8>) -; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = lshr <3 x i8> %a, -; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = lshr <3 x i8> %b, +; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = lshr <3 x i8> %a, splat (i8 1) +; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = lshr <3 x i8> %b, splat (i8 1) ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add <3 x i8> [[a_shr]], [[b_shr]] ; CHECK: [[join:%[a-zA-Z0-9_.]+]] = or <3 x i8> %a, %b -; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <3 x i8> [[join]], +; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <3 x i8> [[join]], splat (i8 1) ; CHECK: [[hadd:%[a-zA-Z0-9_.]+]] = add <3 x i8> [[add]], [[and]] ; CHECK: ret <3 x i8> [[hadd]] diff --git a/test/IntegerBuiltins/hadd/rhadd_uchar4.ll b/test/IntegerBuiltins/hadd/rhadd_uchar4.ll index 6467c5d75..15b1d6e46 100644 --- a/test/IntegerBuiltins/hadd/rhadd_uchar4.ll +++ b/test/IntegerBuiltins/hadd/rhadd_uchar4.ll @@ -17,10 +17,10 @@ entry: declare <4 x i8> @_Z5rhaddDv4_hS_(<4 x i8>, <4 x i8>) -; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = lshr <4 x i8> %a, -; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = lshr <4 x i8> %b, +; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = lshr <4 x i8> %a, splat (i8 1) +; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = lshr <4 x i8> %b, splat (i8 1) ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add <4 x i8> [[a_shr]], [[b_shr]] ; CHECK: [[join:%[a-zA-Z0-9_.]+]] = or <4 x i8> %a, %b -; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <4 x i8> [[join]], +; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <4 x i8> [[join]], splat (i8 1) ; CHECK: [[hadd:%[a-zA-Z0-9_.]+]] = add <4 x i8> [[add]], [[and]] ; CHECK: ret <4 x i8> [[hadd]] diff --git a/test/IntegerBuiltins/hadd/rhadd_uint2.ll b/test/IntegerBuiltins/hadd/rhadd_uint2.ll index d5d26cc75..6f2763b2c 100644 --- a/test/IntegerBuiltins/hadd/rhadd_uint2.ll +++ b/test/IntegerBuiltins/hadd/rhadd_uint2.ll @@ -17,10 +17,10 @@ entry: declare <2 x i32> @_Z5rhaddDv2_jS_(<2 x i32>, <2 x i32>) -; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = lshr <2 x i32> %a, -; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = lshr <2 x i32> %b, +; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = lshr <2 x i32> %a, splat (i32 1) +; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = lshr <2 x i32> %b, splat (i32 1) ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add <2 x i32> [[a_shr]], [[b_shr]] ; CHECK: [[join:%[a-zA-Z0-9_.]+]] = or <2 x i32> %a, %b -; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <2 x i32> [[join]], +; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <2 x i32> [[join]], splat (i32 1) ; CHECK: [[hadd:%[a-zA-Z0-9_.]+]] = add <2 x i32> [[add]], [[and]] ; CHECK: ret <2 x i32> [[hadd]] diff --git a/test/IntegerBuiltins/hadd/rhadd_uint3.ll b/test/IntegerBuiltins/hadd/rhadd_uint3.ll index 0a9c0a46b..eaf15ce37 100644 --- a/test/IntegerBuiltins/hadd/rhadd_uint3.ll +++ b/test/IntegerBuiltins/hadd/rhadd_uint3.ll @@ -17,10 +17,10 @@ entry: declare <3 x i32> @_Z5rhaddDv3_jS_(<3 x i32>, <3 x i32>) -; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = lshr <3 x i32> %a, -; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = lshr <3 x i32> %b, +; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = lshr <3 x i32> %a, splat (i32 1) +; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = lshr <3 x i32> %b, splat (i32 1) ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add <3 x i32> [[a_shr]], [[b_shr]] ; CHECK: [[join:%[a-zA-Z0-9_.]+]] = or <3 x i32> %a, %b -; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <3 x i32> [[join]], +; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <3 x i32> [[join]], splat (i32 1) ; CHECK: [[hadd:%[a-zA-Z0-9_.]+]] = add <3 x i32> [[add]], [[and]] ; CHECK: ret <3 x i32> [[hadd]] diff --git a/test/IntegerBuiltins/hadd/rhadd_uint4.ll b/test/IntegerBuiltins/hadd/rhadd_uint4.ll index fcf3ce99d..58d53e4e0 100644 --- a/test/IntegerBuiltins/hadd/rhadd_uint4.ll +++ b/test/IntegerBuiltins/hadd/rhadd_uint4.ll @@ -17,10 +17,10 @@ entry: declare <4 x i32> @_Z5rhaddDv4_jS_(<4 x i32>, <4 x i32>) -; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = lshr <4 x i32> %a, -; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = lshr <4 x i32> %b, +; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = lshr <4 x i32> %a, splat (i32 1) +; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = lshr <4 x i32> %b, splat (i32 1) ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add <4 x i32> [[a_shr]], [[b_shr]] ; CHECK: [[join:%[a-zA-Z0-9_.]+]] = or <4 x i32> %a, %b -; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <4 x i32> [[join]], +; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <4 x i32> [[join]], splat (i32 1) ; CHECK: [[hadd:%[a-zA-Z0-9_.]+]] = add <4 x i32> [[add]], [[and]] ; CHECK: ret <4 x i32> [[hadd]] diff --git a/test/IntegerBuiltins/hadd/rhadd_ulong2.ll b/test/IntegerBuiltins/hadd/rhadd_ulong2.ll index d8e7b2857..5fdad080a 100644 --- a/test/IntegerBuiltins/hadd/rhadd_ulong2.ll +++ b/test/IntegerBuiltins/hadd/rhadd_ulong2.ll @@ -17,10 +17,10 @@ entry: declare <2 x i64> @_Z5rhaddDv2_mS_(<2 x i64>, <2 x i64>) -; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = lshr <2 x i64> %a, -; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = lshr <2 x i64> %b, +; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = lshr <2 x i64> %a, splat (i64 1) +; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = lshr <2 x i64> %b, splat (i64 1) ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add <2 x i64> [[a_shr]], [[b_shr]] ; CHECK: [[join:%[a-zA-Z0-9_.]+]] = or <2 x i64> %a, %b -; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <2 x i64> [[join]], +; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <2 x i64> [[join]], splat (i64 1) ; CHECK: [[hadd:%[a-zA-Z0-9_.]+]] = add <2 x i64> [[add]], [[and]] ; CHECK: ret <2 x i64> [[hadd]] diff --git a/test/IntegerBuiltins/hadd/rhadd_ulong3.ll b/test/IntegerBuiltins/hadd/rhadd_ulong3.ll index 3324d49c2..23af2fb2c 100644 --- a/test/IntegerBuiltins/hadd/rhadd_ulong3.ll +++ b/test/IntegerBuiltins/hadd/rhadd_ulong3.ll @@ -17,10 +17,10 @@ entry: declare <3 x i64> @_Z5rhaddDv3_mS_(<3 x i64>, <3 x i64>) -; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = lshr <3 x i64> %a, -; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = lshr <3 x i64> %b, +; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = lshr <3 x i64> %a, splat (i64 1) +; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = lshr <3 x i64> %b, splat (i64 1) ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add <3 x i64> [[a_shr]], [[b_shr]] ; CHECK: [[join:%[a-zA-Z0-9_.]+]] = or <3 x i64> %a, %b -; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <3 x i64> [[join]], +; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <3 x i64> [[join]], splat (i64 1) ; CHECK: [[hadd:%[a-zA-Z0-9_.]+]] = add <3 x i64> [[add]], [[and]] ; CHECK: ret <3 x i64> [[hadd]] diff --git a/test/IntegerBuiltins/hadd/rhadd_ulong4.ll b/test/IntegerBuiltins/hadd/rhadd_ulong4.ll index 01af131d4..3331de59b 100644 --- a/test/IntegerBuiltins/hadd/rhadd_ulong4.ll +++ b/test/IntegerBuiltins/hadd/rhadd_ulong4.ll @@ -17,10 +17,10 @@ entry: declare <4 x i64> @_Z5rhaddDv4_mS_(<4 x i64>, <4 x i64>) -; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = lshr <4 x i64> %a, -; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = lshr <4 x i64> %b, +; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = lshr <4 x i64> %a, splat (i64 1) +; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = lshr <4 x i64> %b, splat (i64 1) ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add <4 x i64> [[a_shr]], [[b_shr]] ; CHECK: [[join:%[a-zA-Z0-9_.]+]] = or <4 x i64> %a, %b -; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <4 x i64> [[join]], +; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <4 x i64> [[join]], splat (i64 1) ; CHECK: [[hadd:%[a-zA-Z0-9_.]+]] = add <4 x i64> [[add]], [[and]] ; CHECK: ret <4 x i64> [[hadd]] diff --git a/test/IntegerBuiltins/hadd/rhadd_ushort2.ll b/test/IntegerBuiltins/hadd/rhadd_ushort2.ll index b04e5840b..10af4be87 100644 --- a/test/IntegerBuiltins/hadd/rhadd_ushort2.ll +++ b/test/IntegerBuiltins/hadd/rhadd_ushort2.ll @@ -17,10 +17,10 @@ entry: declare <2 x i16> @_Z5rhaddDv2_tS_(<2 x i16>, <2 x i16>) -; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = lshr <2 x i16> %a, -; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = lshr <2 x i16> %b, +; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = lshr <2 x i16> %a, splat (i16 1) +; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = lshr <2 x i16> %b, splat (i16 1) ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add <2 x i16> [[a_shr]], [[b_shr]] ; CHECK: [[join:%[a-zA-Z0-9_.]+]] = or <2 x i16> %a, %b -; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <2 x i16> [[join]], +; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <2 x i16> [[join]], splat (i16 1) ; CHECK: [[hadd:%[a-zA-Z0-9_.]+]] = add <2 x i16> [[add]], [[and]] ; CHECK: ret <2 x i16> [[hadd]] diff --git a/test/IntegerBuiltins/hadd/rhadd_ushort3.ll b/test/IntegerBuiltins/hadd/rhadd_ushort3.ll index 41a5b99c2..305e8164e 100644 --- a/test/IntegerBuiltins/hadd/rhadd_ushort3.ll +++ b/test/IntegerBuiltins/hadd/rhadd_ushort3.ll @@ -17,10 +17,10 @@ entry: declare <3 x i16> @_Z5rhaddDv3_tS_(<3 x i16>, <3 x i16>) -; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = lshr <3 x i16> %a, -; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = lshr <3 x i16> %b, +; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = lshr <3 x i16> %a, splat (i16 1) +; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = lshr <3 x i16> %b, splat (i16 1) ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add <3 x i16> [[a_shr]], [[b_shr]] ; CHECK: [[join:%[a-zA-Z0-9_.]+]] = or <3 x i16> %a, %b -; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <3 x i16> [[join]], +; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <3 x i16> [[join]], splat (i16 1) ; CHECK: [[hadd:%[a-zA-Z0-9_.]+]] = add <3 x i16> [[add]], [[and]] ; CHECK: ret <3 x i16> [[hadd]] diff --git a/test/IntegerBuiltins/hadd/rhadd_ushort4.ll b/test/IntegerBuiltins/hadd/rhadd_ushort4.ll index ff06d28fb..191a1410f 100644 --- a/test/IntegerBuiltins/hadd/rhadd_ushort4.ll +++ b/test/IntegerBuiltins/hadd/rhadd_ushort4.ll @@ -17,10 +17,10 @@ entry: declare <4 x i16> @_Z5rhaddDv4_tS_(<4 x i16>, <4 x i16>) -; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = lshr <4 x i16> %a, -; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = lshr <4 x i16> %b, +; CHECK: [[a_shr:%[a-zA_Z0-9_.]+]] = lshr <4 x i16> %a, splat (i16 1) +; CHECK: [[b_shr:%[a-zA-Z0-9_.]+]] = lshr <4 x i16> %b, splat (i16 1) ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add <4 x i16> [[a_shr]], [[b_shr]] ; CHECK: [[join:%[a-zA-Z0-9_.]+]] = or <4 x i16> %a, %b -; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <4 x i16> [[join]], +; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <4 x i16> [[join]], splat (i16 1) ; CHECK: [[hadd:%[a-zA-Z0-9_.]+]] = add <4 x i16> [[add]], [[and]] ; CHECK: ret <4 x i16> [[hadd]] diff --git a/test/IntegerBuiltins/mad_sat/mad_sat_char2.ll b/test/IntegerBuiltins/mad_sat/mad_sat_char2.ll index 0bf97215c..2904223f5 100644 --- a/test/IntegerBuiltins/mad_sat/mad_sat_char2.ll +++ b/test/IntegerBuiltins/mad_sat/mad_sat_char2.ll @@ -22,6 +22,6 @@ declare <2 x i8> @_Z7mad_satDv2_cS_S_(<2 x i8>, <2 x i8>, <2 x i8>) ; CHECK: [[sext_c:%[a-zA-Z0-9_.]+]] = sext <2 x i8> %c to <2 x i16> ; CHECK: [[mul:%[a-zA-Z0-9_.]+]] = mul nuw nsw <2 x i16> [[sext_a]], [[sext_b]] ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add nuw nsw <2 x i16> [[mul]], [[sext_c]] -; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <2 x i16> @_Z5clampDv2_sS_S_(<2 x i16> [[add]], <2 x i16> , <2 x i16> ) +; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <2 x i16> @_Z5clampDv2_sS_S_(<2 x i16> [[add]], <2 x i16> splat (i16 -128), <2 x i16> splat (i16 127)) ; CHECK: [[trunc:%[a-zA-Z0-9_.]+]] = trunc <2 x i16> [[clamp]] to <2 x i8> ; CHECK: ret <2 x i8> [[trunc]] diff --git a/test/IntegerBuiltins/mad_sat/mad_sat_hack_clamp_char2.ll b/test/IntegerBuiltins/mad_sat/mad_sat_hack_clamp_char2.ll index c75a0f370..8efea632a 100644 --- a/test/IntegerBuiltins/mad_sat/mad_sat_hack_clamp_char2.ll +++ b/test/IntegerBuiltins/mad_sat/mad_sat_hack_clamp_char2.ll @@ -22,6 +22,6 @@ declare <2 x i8> @_Z7mad_satDv2_cS_S_(<2 x i8>, <2 x i8>, <2 x i8>) ; CHECK: [[sext_c:%[a-zA-Z0-9_.]+]] = sext <2 x i8> %c to <2 x i32> ; CHECK: [[mul:%[a-zA-Z0-9_.]+]] = mul nuw nsw <2 x i32> [[sext_a]], [[sext_b]] ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add nuw nsw <2 x i32> [[mul]], [[sext_c]] -; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <2 x i32> @_Z5clampDv2_iS_S_(<2 x i32> [[add]], <2 x i32> , <2 x i32> ) +; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <2 x i32> @_Z5clampDv2_iS_S_(<2 x i32> [[add]], <2 x i32> splat (i32 -128), <2 x i32> splat (i32 127)) ; CHECK: [[trunc:%[a-zA-Z0-9_.]+]] = trunc <2 x i32> [[clamp]] to <2 x i8> ; CHECK: ret <2 x i8> [[trunc]] diff --git a/test/IntegerBuiltins/mad_sat/mad_sat_hack_clamp_int2.ll b/test/IntegerBuiltins/mad_sat/mad_sat_hack_clamp_int2.ll index 191369953..00d19acf3 100644 --- a/test/IntegerBuiltins/mad_sat/mad_sat_hack_clamp_int2.ll +++ b/test/IntegerBuiltins/mad_sat/mad_sat_hack_clamp_int2.ll @@ -22,18 +22,18 @@ declare <2 x i32> @_Z7mad_satDv2_iS_S_(<2 x i32>, <2 x i32>, <2 x i32>) ; CHECK: [[mul_hi:%[a-zA-Z0-9_.]+]] = extractvalue { <2 x i32>, <2 x i32> } [[mul_ext]], 1 ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add <2 x i32> [[mul_lo]], %c ; CHECK: [[xor:%[a-zA-Z0-9_.]+]] = xor <2 x i32> %a, %b -; CHECK: [[same_sign:%[a-zA-Z0-9_.]+]] = icmp sgt <2 x i32> [[xor]], -; CHECK: [[diff_sign:%[a-zA-Z0-9_.]+]] = xor <2 x i1> [[same_sign]], +; CHECK: [[same_sign:%[a-zA-Z0-9_.]+]] = icmp sgt <2 x i32> [[xor]], splat (i32 -1) +; CHECK: [[diff_sign:%[a-zA-Z0-9_.]+]] = xor <2 x i1> [[same_sign]], splat (i1 true) ; CHECK: [[hi_eq_0:%[a-zA-Z0-9_.]+]] = icmp eq <2 x i32> [[mul_hi]], zeroinitializer -; CHECK: [[hi_ne_0:%[a-zA-Z0-9_.]+]] = xor <2 x i1> [[hi_eq_0]], -; CHECK: [[lo_ge_max:%[a-zA-Z0-9_.]+]] = icmp uge <2 x i32> [[mul_lo]], +; CHECK: [[hi_ne_0:%[a-zA-Z0-9_.]+]] = xor <2 x i1> [[hi_eq_0]], splat (i1 true) +; CHECK: [[lo_ge_max:%[a-zA-Z0-9_.]+]] = icmp uge <2 x i32> [[mul_lo]], splat (i32 2147483647) ; CHECK: [[c_gt_0:%[a-zA-Z0-9_.]+]] = icmp sgt <2 x i32> %c, zeroinitializer ; CHECK: [[c_lt_0:%[a-zA-Z0-9_.]+]] = icmp slt <2 x i32> %c, zeroinitializer -; CHECK: [[add_gt_max:%[a-zA-Z0-9_.]+]] = icmp ugt <2 x i32> [[add]], -; CHECK: [[hi_eq_m1:%[a-zA-Z0-9_.]+]] = icmp eq <2 x i32> [[mul_hi]], -; CHECK: [[hi_ne_m1:%[a-zA-Z0-9_.]+]] = xor <2 x i1> [[hi_eq_m1]], -; CHECK: [[lo_le_max_plus_1:%[a-zA-Z0-9_.]+]] = icmp ule <2 x i32> [[mul_lo]], -; CHECK: [[max_sub_lo:%[a-zA-Z0-9_.]+]] = sub <2 x i32> , [[mul_lo]] +; CHECK: [[add_gt_max:%[a-zA-Z0-9_.]+]] = icmp ugt <2 x i32> [[add]], splat (i32 2147483647) +; CHECK: [[hi_eq_m1:%[a-zA-Z0-9_.]+]] = icmp eq <2 x i32> [[mul_hi]], splat (i32 -1) +; CHECK: [[hi_ne_m1:%[a-zA-Z0-9_.]+]] = xor <2 x i1> [[hi_eq_m1]], splat (i1 true) +; CHECK: [[lo_le_max_plus_1:%[a-zA-Z0-9_.]+]] = icmp ule <2 x i32> [[mul_lo]], splat (i32 -2147483648) +; CHECK: [[max_sub_lo:%[a-zA-Z0-9_.]+]] = sub <2 x i32> splat (i32 2147483647), [[mul_lo]] ; CHECK: [[c_lt_max_sub_lo:%[a-zA-Z0-9_.]+]] = icmp ult <2 x i32> %c, [[max_sub_lo]] ; CHECK: [[max_clamp1:%[a-zA-Z0-9_.]+]] = and <2 x i1> [[same_sign]], [[hi_ne_0]] ; CHECK: [[tmp:%[a-zA-Z0-9_.]+]] = or <2 x i1> [[c_gt_0]], [[add_gt_max]] @@ -45,6 +45,6 @@ declare <2 x i32> @_Z7mad_satDv2_iS_S_(<2 x i32>, <2 x i32>, <2 x i32>) ; CHECK: [[tmp2:%[a-zA-Z0-9_.]+]] = and <2 x i1> [[hi_eq_m1]], [[lo_le_max_plus_1]] ; CHECK: [[min_clamp2:%[a-zA-Z0-9_.]+]] = and <2 x i1> [[tmp2]], [[tmp]] ; CHECK: [[min_clamp:%[a-zA-Z0-9_.]+]] = or <2 x i1> [[min_clamp1]], [[min_clamp2]] -; CHECK: [[sel1:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[min_clamp]], <2 x i32> , <2 x i32> [[add]] -; CHECK: [[sel2:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[max_clamp]], <2 x i32> , <2 x i32> [[sel1]] +; CHECK: [[sel1:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[min_clamp]], <2 x i32> splat (i32 -2147483648), <2 x i32> [[add]] +; CHECK: [[sel2:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[max_clamp]], <2 x i32> splat (i32 2147483647), <2 x i32> [[sel1]] ; CHECK: ret <2 x i32> [[sel2]] diff --git a/test/IntegerBuiltins/mad_sat/mad_sat_hack_clamp_long2.ll b/test/IntegerBuiltins/mad_sat/mad_sat_hack_clamp_long2.ll index dc28e23b8..0753a7b85 100644 --- a/test/IntegerBuiltins/mad_sat/mad_sat_hack_clamp_long2.ll +++ b/test/IntegerBuiltins/mad_sat/mad_sat_hack_clamp_long2.ll @@ -22,18 +22,18 @@ declare <2 x i64> @_Z7mad_satDv2_lS_S_(<2 x i64>, <2 x i64>, <2 x i64>) ; CHECK: [[mul_hi:%[a-zA-Z0-9_.]+]] = extractvalue { <2 x i64>, <2 x i64> } [[mul_ext]], 1 ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add <2 x i64> [[mul_lo]], %c ; CHECK: [[xor:%[a-zA-Z0-9_.]+]] = xor <2 x i64> %a, %b -; CHECK: [[same_sign:%[a-zA-Z0-9_.]+]] = icmp sgt <2 x i64> [[xor]], -; CHECK: [[diff_sign:%[a-zA-Z0-9_.]+]] = xor <2 x i1> [[same_sign]], +; CHECK: [[same_sign:%[a-zA-Z0-9_.]+]] = icmp sgt <2 x i64> [[xor]], splat (i64 -1) +; CHECK: [[diff_sign:%[a-zA-Z0-9_.]+]] = xor <2 x i1> [[same_sign]], splat (i1 true) ; CHECK: [[hi_eq_0:%[a-zA-Z0-9_.]+]] = icmp eq <2 x i64> [[mul_hi]], zeroinitializer -; CHECK: [[hi_ne_0:%[a-zA-Z0-9_.]+]] = xor <2 x i1> [[hi_eq_0]], -; CHECK: [[lo_ge_max:%[a-zA-Z0-9_.]+]] = icmp uge <2 x i64> [[mul_lo]], +; CHECK: [[hi_ne_0:%[a-zA-Z0-9_.]+]] = xor <2 x i1> [[hi_eq_0]], splat (i1 true) +; CHECK: [[lo_ge_max:%[a-zA-Z0-9_.]+]] = icmp uge <2 x i64> [[mul_lo]], splat (i64 9223372036854775807) ; CHECK: [[c_gt_0:%[a-zA-Z0-9_.]+]] = icmp sgt <2 x i64> %c, zeroinitializer ; CHECK: [[c_lt_0:%[a-zA-Z0-9_.]+]] = icmp slt <2 x i64> %c, zeroinitializer -; CHECK: [[add_gt_max:%[a-zA-Z0-9_.]+]] = icmp ugt <2 x i64> [[add]], -; CHECK: [[hi_eq_m1:%[a-zA-Z0-9_.]+]] = icmp eq <2 x i64> [[mul_hi]], -; CHECK: [[hi_ne_m1:%[a-zA-Z0-9_.]+]] = xor <2 x i1> [[hi_eq_m1]], -; CHECK: [[lo_le_max_plus_1:%[a-zA-Z0-9_.]+]] = icmp ule <2 x i64> [[mul_lo]], -; CHECK: [[max_sub_lo:%[a-zA-Z0-9_.]+]] = sub <2 x i64> , [[mul_lo]] +; CHECK: [[add_gt_max:%[a-zA-Z0-9_.]+]] = icmp ugt <2 x i64> [[add]], splat (i64 9223372036854775807) +; CHECK: [[hi_eq_m1:%[a-zA-Z0-9_.]+]] = icmp eq <2 x i64> [[mul_hi]], splat (i64 -1) +; CHECK: [[hi_ne_m1:%[a-zA-Z0-9_.]+]] = xor <2 x i1> [[hi_eq_m1]], splat (i1 true) +; CHECK: [[lo_le_max_plus_1:%[a-zA-Z0-9_.]+]] = icmp ule <2 x i64> [[mul_lo]], splat (i64 -9223372036854775808) +; CHECK: [[max_sub_lo:%[a-zA-Z0-9_.]+]] = sub <2 x i64> splat (i64 9223372036854775807), [[mul_lo]] ; CHECK: [[c_lt_max_sub_lo:%[a-zA-Z0-9_.]+]] = icmp ult <2 x i64> %c, [[max_sub_lo]] ; CHECK: [[max_clamp1:%[a-zA-Z0-9_.]+]] = and <2 x i1> [[same_sign]], [[hi_ne_0]] ; CHECK: [[tmp:%[a-zA-Z0-9_.]+]] = or <2 x i1> [[c_gt_0]], [[add_gt_max]] @@ -45,6 +45,6 @@ declare <2 x i64> @_Z7mad_satDv2_lS_S_(<2 x i64>, <2 x i64>, <2 x i64>) ; CHECK: [[tmp2:%[a-zA-Z0-9_.]+]] = and <2 x i1> [[hi_eq_m1]], [[lo_le_max_plus_1]] ; CHECK: [[min_clamp2:%[a-zA-Z0-9_.]+]] = and <2 x i1> [[tmp2]], [[tmp]] ; CHECK: [[min_clamp:%[a-zA-Z0-9_.]+]] = or <2 x i1> [[min_clamp1]], [[min_clamp2]] -; CHECK: [[sel1:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[min_clamp]], <2 x i64> , <2 x i64> [[add]] -; CHECK: [[sel2:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[max_clamp]], <2 x i64> , <2 x i64> [[sel1]] +; CHECK: [[sel1:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[min_clamp]], <2 x i64> splat (i64 -9223372036854775808), <2 x i64> [[add]] +; CHECK: [[sel2:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[max_clamp]], <2 x i64> splat (i64 9223372036854775807), <2 x i64> [[sel1]] ; CHECK: ret <2 x i64> [[sel2]] diff --git a/test/IntegerBuiltins/mad_sat/mad_sat_hack_clamp_short2.ll b/test/IntegerBuiltins/mad_sat/mad_sat_hack_clamp_short2.ll index 2a0f88932..ed84c027d 100644 --- a/test/IntegerBuiltins/mad_sat/mad_sat_hack_clamp_short2.ll +++ b/test/IntegerBuiltins/mad_sat/mad_sat_hack_clamp_short2.ll @@ -22,6 +22,6 @@ declare <2 x i16> @_Z7mad_satDv2_sS_S_(<2 x i16>, <2 x i16>, <2 x i16>) ; CHECK: [[sext_c:%[a-zA-Z0-9_.]+]] = sext <2 x i16> %c to <2 x i32> ; CHECK: [[mul:%[a-zA-Z0-9_.]+]] = mul nuw nsw <2 x i32> [[sext_a]], [[sext_b]] ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add nuw nsw <2 x i32> [[mul]], [[sext_c]] -; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <2 x i32> @_Z5clampDv2_iS_S_(<2 x i32> [[add]], <2 x i32> , <2 x i32> ) +; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <2 x i32> @_Z5clampDv2_iS_S_(<2 x i32> [[add]], <2 x i32> splat (i32 -32768), <2 x i32> splat (i32 32767)) ; CHECK: [[trunc:%[a-zA-Z0-9_.]+]] = trunc <2 x i32> [[clamp]] to <2 x i16> ; CHECK: ret <2 x i16> [[trunc]] diff --git a/test/IntegerBuiltins/mad_sat/mad_sat_hack_clamp_test_gen.cpp b/test/IntegerBuiltins/mad_sat/mad_sat_hack_clamp_test_gen.cpp index 3f01674d6..c974e99ec 100644 --- a/test/IntegerBuiltins/mad_sat/mad_sat_hack_clamp_test_gen.cpp +++ b/test/IntegerBuiltins/mad_sat/mad_sat_hack_clamp_test_gen.cpp @@ -18,7 +18,7 @@ #include const std::string preamble = R"( -; RUN: clspv-opt -ReplaceOpenCLBuiltin -hack-clamp-width %s -o %t.ll +; RUN: clspv-opt --passes=replace-opencl-builtin -hack-clamp-width %s -o %t.ll ; RUN: FileCheck %s < %t.ll ; AUTO-GENERATED TEST FILE @@ -122,13 +122,7 @@ std::string SplatConstant(uint32_t vector, const std::string &type, if (vector == 1) return value; - std::string constant = "<"; - for (auto i = 0; i < vector; ++i) { - constant += type + " " + value; - constant += (i == (vector - 1) ? "" : ", "); - } - constant += ">"; - return constant; + return "splat (" + type + " " + value + ")"; } std::string NotConstant(uint32_t vector) { diff --git a/test/IntegerBuiltins/mad_sat/mad_sat_hack_clamp_uchar2.ll b/test/IntegerBuiltins/mad_sat/mad_sat_hack_clamp_uchar2.ll index 4e53cf616..858995fde 100644 --- a/test/IntegerBuiltins/mad_sat/mad_sat_hack_clamp_uchar2.ll +++ b/test/IntegerBuiltins/mad_sat/mad_sat_hack_clamp_uchar2.ll @@ -25,5 +25,5 @@ declare <2 x i8> @_Z7mad_satDv2_hS_S_(<2 x i8>, <2 x i8>, <2 x i8>) ; CHECK: [[ex1:%[a-zA-Z0-9_.]+]] = extractvalue { <2 x i8>, <2 x i8> } [[add]], 1 ; CHECK: [[or:%[a-zA-Z0-9_.]+]] = or <2 x i8> [[mul_hi]], [[ex1]] ; CHECK: [[cmp:%[a-zA-Z0-9_.]+]] = icmp eq <2 x i8> [[or]], zeroinitializer -; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[cmp]], <2 x i8> [[ex0]], <2 x i8> +; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[cmp]], <2 x i8> [[ex0]], <2 x i8> splat (i8 -1) ; CHECK: ret <2 x i8> [[sel]] diff --git a/test/IntegerBuiltins/mad_sat/mad_sat_hack_clamp_uint2.ll b/test/IntegerBuiltins/mad_sat/mad_sat_hack_clamp_uint2.ll index 0c74f928c..b5ed705ae 100644 --- a/test/IntegerBuiltins/mad_sat/mad_sat_hack_clamp_uint2.ll +++ b/test/IntegerBuiltins/mad_sat/mad_sat_hack_clamp_uint2.ll @@ -25,5 +25,5 @@ declare <2 x i32> @_Z7mad_satDv2_jS_S_(<2 x i32>, <2 x i32>, <2 x i32>) ; CHECK: [[ex1:%[a-zA-Z0-9_.]+]] = extractvalue { <2 x i32>, <2 x i32> } [[add]], 1 ; CHECK: [[or:%[a-zA-Z0-9_.]+]] = or <2 x i32> [[mul_hi]], [[ex1]] ; CHECK: [[cmp:%[a-zA-Z0-9_.]+]] = icmp eq <2 x i32> [[or]], zeroinitializer -; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[cmp]], <2 x i32> [[ex0]], <2 x i32> +; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[cmp]], <2 x i32> [[ex0]], <2 x i32> splat (i32 -1) ; CHECK: ret <2 x i32> [[sel]] diff --git a/test/IntegerBuiltins/mad_sat/mad_sat_hack_clamp_ulong2.ll b/test/IntegerBuiltins/mad_sat/mad_sat_hack_clamp_ulong2.ll index c93c3146a..840201c7e 100644 --- a/test/IntegerBuiltins/mad_sat/mad_sat_hack_clamp_ulong2.ll +++ b/test/IntegerBuiltins/mad_sat/mad_sat_hack_clamp_ulong2.ll @@ -25,5 +25,5 @@ declare <2 x i64> @_Z7mad_satDv2_mS_S_(<2 x i64>, <2 x i64>, <2 x i64>) ; CHECK: [[ex1:%[a-zA-Z0-9_.]+]] = extractvalue { <2 x i64>, <2 x i64> } [[add]], 1 ; CHECK: [[or:%[a-zA-Z0-9_.]+]] = or <2 x i64> [[mul_hi]], [[ex1]] ; CHECK: [[cmp:%[a-zA-Z0-9_.]+]] = icmp eq <2 x i64> [[or]], zeroinitializer -; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[cmp]], <2 x i64> [[ex0]], <2 x i64> +; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[cmp]], <2 x i64> [[ex0]], <2 x i64> splat (i64 -1) ; CHECK: ret <2 x i64> [[sel]] diff --git a/test/IntegerBuiltins/mad_sat/mad_sat_hack_clamp_ushort2.ll b/test/IntegerBuiltins/mad_sat/mad_sat_hack_clamp_ushort2.ll index 053f78e53..4ef05e51d 100644 --- a/test/IntegerBuiltins/mad_sat/mad_sat_hack_clamp_ushort2.ll +++ b/test/IntegerBuiltins/mad_sat/mad_sat_hack_clamp_ushort2.ll @@ -25,5 +25,5 @@ declare <2 x i16> @_Z7mad_satDv2_tS_S_(<2 x i16>, <2 x i16>, <2 x i16>) ; CHECK: [[ex1:%[a-zA-Z0-9_.]+]] = extractvalue { <2 x i16>, <2 x i16> } [[add]], 1 ; CHECK: [[or:%[a-zA-Z0-9_.]+]] = or <2 x i16> [[mul_hi]], [[ex1]] ; CHECK: [[cmp:%[a-zA-Z0-9_.]+]] = icmp eq <2 x i16> [[or]], zeroinitializer -; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[cmp]], <2 x i16> [[ex0]], <2 x i16> +; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[cmp]], <2 x i16> [[ex0]], <2 x i16> splat (i16 -1) ; CHECK: ret <2 x i16> [[sel]] diff --git a/test/IntegerBuiltins/mad_sat/mad_sat_int2.ll b/test/IntegerBuiltins/mad_sat/mad_sat_int2.ll index 7265da7a2..af9df48a4 100644 --- a/test/IntegerBuiltins/mad_sat/mad_sat_int2.ll +++ b/test/IntegerBuiltins/mad_sat/mad_sat_int2.ll @@ -22,18 +22,18 @@ declare <2 x i32> @_Z7mad_satDv2_iS_S_(<2 x i32>, <2 x i32>, <2 x i32>) ; CHECK: [[mul_hi:%[a-zA-Z0-9_.]+]] = extractvalue { <2 x i32>, <2 x i32> } [[mul_ext]], 1 ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add <2 x i32> [[mul_lo]], %c ; CHECK: [[xor:%[a-zA-Z0-9_.]+]] = xor <2 x i32> %a, %b -; CHECK: [[same_sign:%[a-zA-Z0-9_.]+]] = icmp sgt <2 x i32> [[xor]], -; CHECK: [[diff_sign:%[a-zA-Z0-9_.]+]] = xor <2 x i1> [[same_sign]], +; CHECK: [[same_sign:%[a-zA-Z0-9_.]+]] = icmp sgt <2 x i32> [[xor]], splat (i32 -1) +; CHECK: [[diff_sign:%[a-zA-Z0-9_.]+]] = xor <2 x i1> [[same_sign]], splat (i1 true) ; CHECK: [[hi_eq_0:%[a-zA-Z0-9_.]+]] = icmp eq <2 x i32> [[mul_hi]], zeroinitializer -; CHECK: [[hi_ne_0:%[a-zA-Z0-9_.]+]] = xor <2 x i1> [[hi_eq_0]], -; CHECK: [[lo_ge_max:%[a-zA-Z0-9_.]+]] = icmp uge <2 x i32> [[mul_lo]], +; CHECK: [[hi_ne_0:%[a-zA-Z0-9_.]+]] = xor <2 x i1> [[hi_eq_0]], splat (i1 true) +; CHECK: [[lo_ge_max:%[a-zA-Z0-9_.]+]] = icmp uge <2 x i32> [[mul_lo]], splat (i32 2147483647) ; CHECK: [[c_gt_0:%[a-zA-Z0-9_.]+]] = icmp sgt <2 x i32> %c, zeroinitializer ; CHECK: [[c_lt_0:%[a-zA-Z0-9_.]+]] = icmp slt <2 x i32> %c, zeroinitializer -; CHECK: [[add_gt_max:%[a-zA-Z0-9_.]+]] = icmp ugt <2 x i32> [[add]], -; CHECK: [[hi_eq_m1:%[a-zA-Z0-9_.]+]] = icmp eq <2 x i32> [[mul_hi]], -; CHECK: [[hi_ne_m1:%[a-zA-Z0-9_.]+]] = xor <2 x i1> [[hi_eq_m1]], -; CHECK: [[lo_le_max_plus_1:%[a-zA-Z0-9_.]+]] = icmp ule <2 x i32> [[mul_lo]], -; CHECK: [[max_sub_lo:%[a-zA-Z0-9_.]+]] = sub <2 x i32> , [[mul_lo]] +; CHECK: [[add_gt_max:%[a-zA-Z0-9_.]+]] = icmp ugt <2 x i32> [[add]], splat (i32 2147483647) +; CHECK: [[hi_eq_m1:%[a-zA-Z0-9_.]+]] = icmp eq <2 x i32> [[mul_hi]], splat (i32 -1) +; CHECK: [[hi_ne_m1:%[a-zA-Z0-9_.]+]] = xor <2 x i1> [[hi_eq_m1]], splat (i1 true) +; CHECK: [[lo_le_max_plus_1:%[a-zA-Z0-9_.]+]] = icmp ule <2 x i32> [[mul_lo]], splat (i32 -2147483648) +; CHECK: [[max_sub_lo:%[a-zA-Z0-9_.]+]] = sub <2 x i32> splat (i32 2147483647), [[mul_lo]] ; CHECK: [[c_lt_max_sub_lo:%[a-zA-Z0-9_.]+]] = icmp ult <2 x i32> %c, [[max_sub_lo]] ; CHECK: [[max_clamp1:%[a-zA-Z0-9_.]+]] = and <2 x i1> [[same_sign]], [[hi_ne_0]] ; CHECK: [[tmp:%[a-zA-Z0-9_.]+]] = or <2 x i1> [[c_gt_0]], [[add_gt_max]] @@ -45,6 +45,6 @@ declare <2 x i32> @_Z7mad_satDv2_iS_S_(<2 x i32>, <2 x i32>, <2 x i32>) ; CHECK: [[tmp2:%[a-zA-Z0-9_.]+]] = and <2 x i1> [[hi_eq_m1]], [[lo_le_max_plus_1]] ; CHECK: [[min_clamp2:%[a-zA-Z0-9_.]+]] = and <2 x i1> [[tmp2]], [[tmp]] ; CHECK: [[min_clamp:%[a-zA-Z0-9_.]+]] = or <2 x i1> [[min_clamp1]], [[min_clamp2]] -; CHECK: [[sel1:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[min_clamp]], <2 x i32> , <2 x i32> [[add]] -; CHECK: [[sel2:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[max_clamp]], <2 x i32> , <2 x i32> [[sel1]] +; CHECK: [[sel1:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[min_clamp]], <2 x i32> splat (i32 -2147483648), <2 x i32> [[add]] +; CHECK: [[sel2:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[max_clamp]], <2 x i32> splat (i32 2147483647), <2 x i32> [[sel1]] ; CHECK: ret <2 x i32> [[sel2]] diff --git a/test/IntegerBuiltins/mad_sat/mad_sat_long2.ll b/test/IntegerBuiltins/mad_sat/mad_sat_long2.ll index 71681c0c7..fcebeae67 100644 --- a/test/IntegerBuiltins/mad_sat/mad_sat_long2.ll +++ b/test/IntegerBuiltins/mad_sat/mad_sat_long2.ll @@ -22,18 +22,18 @@ declare <2 x i64> @_Z7mad_satDv2_lS_S_(<2 x i64>, <2 x i64>, <2 x i64>) ; CHECK: [[mul_hi:%[a-zA-Z0-9_.]+]] = extractvalue { <2 x i64>, <2 x i64> } [[mul_ext]], 1 ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add <2 x i64> [[mul_lo]], %c ; CHECK: [[xor:%[a-zA-Z0-9_.]+]] = xor <2 x i64> %a, %b -; CHECK: [[same_sign:%[a-zA-Z0-9_.]+]] = icmp sgt <2 x i64> [[xor]], -; CHECK: [[diff_sign:%[a-zA-Z0-9_.]+]] = xor <2 x i1> [[same_sign]], +; CHECK: [[same_sign:%[a-zA-Z0-9_.]+]] = icmp sgt <2 x i64> [[xor]], splat (i64 -1) +; CHECK: [[diff_sign:%[a-zA-Z0-9_.]+]] = xor <2 x i1> [[same_sign]], splat (i1 true) ; CHECK: [[hi_eq_0:%[a-zA-Z0-9_.]+]] = icmp eq <2 x i64> [[mul_hi]], zeroinitializer -; CHECK: [[hi_ne_0:%[a-zA-Z0-9_.]+]] = xor <2 x i1> [[hi_eq_0]], -; CHECK: [[lo_ge_max:%[a-zA-Z0-9_.]+]] = icmp uge <2 x i64> [[mul_lo]], +; CHECK: [[hi_ne_0:%[a-zA-Z0-9_.]+]] = xor <2 x i1> [[hi_eq_0]], splat (i1 true) +; CHECK: [[lo_ge_max:%[a-zA-Z0-9_.]+]] = icmp uge <2 x i64> [[mul_lo]], splat (i64 9223372036854775807) ; CHECK: [[c_gt_0:%[a-zA-Z0-9_.]+]] = icmp sgt <2 x i64> %c, zeroinitializer ; CHECK: [[c_lt_0:%[a-zA-Z0-9_.]+]] = icmp slt <2 x i64> %c, zeroinitializer -; CHECK: [[add_gt_max:%[a-zA-Z0-9_.]+]] = icmp ugt <2 x i64> [[add]], -; CHECK: [[hi_eq_m1:%[a-zA-Z0-9_.]+]] = icmp eq <2 x i64> [[mul_hi]], -; CHECK: [[hi_ne_m1:%[a-zA-Z0-9_.]+]] = xor <2 x i1> [[hi_eq_m1]], -; CHECK: [[lo_le_max_plus_1:%[a-zA-Z0-9_.]+]] = icmp ule <2 x i64> [[mul_lo]], -; CHECK: [[max_sub_lo:%[a-zA-Z0-9_.]+]] = sub <2 x i64> , [[mul_lo]] +; CHECK: [[add_gt_max:%[a-zA-Z0-9_.]+]] = icmp ugt <2 x i64> [[add]], splat (i64 9223372036854775807) +; CHECK: [[hi_eq_m1:%[a-zA-Z0-9_.]+]] = icmp eq <2 x i64> [[mul_hi]], splat (i64 -1) +; CHECK: [[hi_ne_m1:%[a-zA-Z0-9_.]+]] = xor <2 x i1> [[hi_eq_m1]], splat (i1 true) +; CHECK: [[lo_le_max_plus_1:%[a-zA-Z0-9_.]+]] = icmp ule <2 x i64> [[mul_lo]], splat (i64 -9223372036854775808) +; CHECK: [[max_sub_lo:%[a-zA-Z0-9_.]+]] = sub <2 x i64> splat (i64 9223372036854775807), [[mul_lo]] ; CHECK: [[c_lt_max_sub_lo:%[a-zA-Z0-9_.]+]] = icmp ult <2 x i64> %c, [[max_sub_lo]] ; CHECK: [[max_clamp1:%[a-zA-Z0-9_.]+]] = and <2 x i1> [[same_sign]], [[hi_ne_0]] ; CHECK: [[tmp:%[a-zA-Z0-9_.]+]] = or <2 x i1> [[c_gt_0]], [[add_gt_max]] @@ -45,6 +45,6 @@ declare <2 x i64> @_Z7mad_satDv2_lS_S_(<2 x i64>, <2 x i64>, <2 x i64>) ; CHECK: [[tmp2:%[a-zA-Z0-9_.]+]] = and <2 x i1> [[hi_eq_m1]], [[lo_le_max_plus_1]] ; CHECK: [[min_clamp2:%[a-zA-Z0-9_.]+]] = and <2 x i1> [[tmp2]], [[tmp]] ; CHECK: [[min_clamp:%[a-zA-Z0-9_.]+]] = or <2 x i1> [[min_clamp1]], [[min_clamp2]] -; CHECK: [[sel1:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[min_clamp]], <2 x i64> , <2 x i64> [[add]] -; CHECK: [[sel2:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[max_clamp]], <2 x i64> , <2 x i64> [[sel1]] +; CHECK: [[sel1:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[min_clamp]], <2 x i64> splat (i64 -9223372036854775808), <2 x i64> [[add]] +; CHECK: [[sel2:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[max_clamp]], <2 x i64> splat (i64 9223372036854775807), <2 x i64> [[sel1]] ; CHECK: ret <2 x i64> [[sel2]] diff --git a/test/IntegerBuiltins/mad_sat/mad_sat_short2.ll b/test/IntegerBuiltins/mad_sat/mad_sat_short2.ll index 61840ae9d..702f7c874 100644 --- a/test/IntegerBuiltins/mad_sat/mad_sat_short2.ll +++ b/test/IntegerBuiltins/mad_sat/mad_sat_short2.ll @@ -22,6 +22,6 @@ declare <2 x i16> @_Z7mad_satDv2_sS_S_(<2 x i16>, <2 x i16>, <2 x i16>) ; CHECK: [[sext_c:%[a-zA-Z0-9_.]+]] = sext <2 x i16> %c to <2 x i32> ; CHECK: [[mul:%[a-zA-Z0-9_.]+]] = mul nuw nsw <2 x i32> [[sext_a]], [[sext_b]] ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add nuw nsw <2 x i32> [[mul]], [[sext_c]] -; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <2 x i32> @_Z5clampDv2_iS_S_(<2 x i32> [[add]], <2 x i32> , <2 x i32> ) +; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <2 x i32> @_Z5clampDv2_iS_S_(<2 x i32> [[add]], <2 x i32> splat (i32 -32768), <2 x i32> splat (i32 32767)) ; CHECK: [[trunc:%[a-zA-Z0-9_.]+]] = trunc <2 x i32> [[clamp]] to <2 x i16> ; CHECK: ret <2 x i16> [[trunc]] diff --git a/test/IntegerBuiltins/mad_sat/mad_sat_test_gen.cpp b/test/IntegerBuiltins/mad_sat/mad_sat_test_gen.cpp index 2847be1a4..b72298b56 100644 --- a/test/IntegerBuiltins/mad_sat/mad_sat_test_gen.cpp +++ b/test/IntegerBuiltins/mad_sat/mad_sat_test_gen.cpp @@ -18,7 +18,7 @@ #include const std::string preamble = R"( -; RUN: clspv-opt -ReplaceOpenCLBuiltin %s -o %t.ll +; RUN: clspv-opt --passes=replace-opencl-builtin %s -o %t.ll ; RUN: FileCheck %s < %t.ll ; AUTO-GENERATED TEST FILE @@ -122,13 +122,7 @@ std::string SplatConstant(uint32_t vector, const std::string &type, if (vector == 1) return value; - std::string constant = "<"; - for (auto i = 0; i < vector; ++i) { - constant += type + " " + value; - constant += (i == (vector - 1) ? "" : ", "); - } - constant += ">"; - return constant; + return "splat (" + type + " " + value + ")"; } std::string NotConstant(uint32_t vector) { diff --git a/test/IntegerBuiltins/mad_sat/mad_sat_uchar2.ll b/test/IntegerBuiltins/mad_sat/mad_sat_uchar2.ll index 980b46003..20376476d 100644 --- a/test/IntegerBuiltins/mad_sat/mad_sat_uchar2.ll +++ b/test/IntegerBuiltins/mad_sat/mad_sat_uchar2.ll @@ -25,5 +25,5 @@ declare <2 x i8> @_Z7mad_satDv2_hS_S_(<2 x i8>, <2 x i8>, <2 x i8>) ; CHECK: [[ex1:%[a-zA-Z0-9_.]+]] = extractvalue { <2 x i8>, <2 x i8> } [[add]], 1 ; CHECK: [[or:%[a-zA-Z0-9_.]+]] = or <2 x i8> [[mul_hi]], [[ex1]] ; CHECK: [[cmp:%[a-zA-Z0-9_.]+]] = icmp eq <2 x i8> [[or]], zeroinitializer -; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[cmp]], <2 x i8> [[ex0]], <2 x i8> +; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[cmp]], <2 x i8> [[ex0]], <2 x i8> splat (i8 -1) ; CHECK: ret <2 x i8> [[sel]] diff --git a/test/IntegerBuiltins/mad_sat/mad_sat_uint2.ll b/test/IntegerBuiltins/mad_sat/mad_sat_uint2.ll index 7cf45ee62..997bcd6c5 100644 --- a/test/IntegerBuiltins/mad_sat/mad_sat_uint2.ll +++ b/test/IntegerBuiltins/mad_sat/mad_sat_uint2.ll @@ -25,5 +25,5 @@ declare <2 x i32> @_Z7mad_satDv2_jS_S_(<2 x i32>, <2 x i32>, <2 x i32>) ; CHECK: [[ex1:%[a-zA-Z0-9_.]+]] = extractvalue { <2 x i32>, <2 x i32> } [[add]], 1 ; CHECK: [[or:%[a-zA-Z0-9_.]+]] = or <2 x i32> [[mul_hi]], [[ex1]] ; CHECK: [[cmp:%[a-zA-Z0-9_.]+]] = icmp eq <2 x i32> [[or]], zeroinitializer -; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[cmp]], <2 x i32> [[ex0]], <2 x i32> +; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[cmp]], <2 x i32> [[ex0]], <2 x i32> splat (i32 -1) ; CHECK: ret <2 x i32> [[sel]] diff --git a/test/IntegerBuiltins/mad_sat/mad_sat_ulong2.ll b/test/IntegerBuiltins/mad_sat/mad_sat_ulong2.ll index 797cf467a..512df5aa6 100644 --- a/test/IntegerBuiltins/mad_sat/mad_sat_ulong2.ll +++ b/test/IntegerBuiltins/mad_sat/mad_sat_ulong2.ll @@ -25,5 +25,5 @@ declare <2 x i64> @_Z7mad_satDv2_mS_S_(<2 x i64>, <2 x i64>, <2 x i64>) ; CHECK: [[ex1:%[a-zA-Z0-9_.]+]] = extractvalue { <2 x i64>, <2 x i64> } [[add]], 1 ; CHECK: [[or:%[a-zA-Z0-9_.]+]] = or <2 x i64> [[mul_hi]], [[ex1]] ; CHECK: [[cmp:%[a-zA-Z0-9_.]+]] = icmp eq <2 x i64> [[or]], zeroinitializer -; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[cmp]], <2 x i64> [[ex0]], <2 x i64> +; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[cmp]], <2 x i64> [[ex0]], <2 x i64> splat (i64 -1) ; CHECK: ret <2 x i64> [[sel]] diff --git a/test/IntegerBuiltins/mad_sat/mad_sat_ushort2.ll b/test/IntegerBuiltins/mad_sat/mad_sat_ushort2.ll index ece4ebbf5..85f1c2047 100644 --- a/test/IntegerBuiltins/mad_sat/mad_sat_ushort2.ll +++ b/test/IntegerBuiltins/mad_sat/mad_sat_ushort2.ll @@ -25,5 +25,5 @@ declare <2 x i16> @_Z7mad_satDv2_tS_S_(<2 x i16>, <2 x i16>, <2 x i16>) ; CHECK: [[ex1:%[a-zA-Z0-9_.]+]] = extractvalue { <2 x i16>, <2 x i16> } [[add]], 1 ; CHECK: [[or:%[a-zA-Z0-9_.]+]] = or <2 x i16> [[mul_hi]], [[ex1]] ; CHECK: [[cmp:%[a-zA-Z0-9_.]+]] = icmp eq <2 x i16> [[or]], zeroinitializer -; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[cmp]], <2 x i16> [[ex0]], <2 x i16> +; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[cmp]], <2 x i16> [[ex0]], <2 x i16> splat (i16 -1) ; CHECK: ret <2 x i16> [[sel]] diff --git a/test/IntegerBuiltins/rotate/rotate_uchar3.ll b/test/IntegerBuiltins/rotate/rotate_uchar3.ll index 9a57fcedb..6ea31ff47 100644 --- a/test/IntegerBuiltins/rotate/rotate_uchar3.ll +++ b/test/IntegerBuiltins/rotate/rotate_uchar3.ll @@ -1,9 +1,9 @@ ; RUN: clspv-opt %s -o %t.ll --passes=replace-opencl-builtin,replace-llvm-intrinsics ; RUN: FileCheck %s < %t.ll -; CHECK: [[mask1:%[0-9]+]] = and <3 x i8> %b, -; CHECK: [[sub:%[0-9]+]] = sub <3 x i8> -; CHECK: [[mask2:%[0-9]+]] = and <3 x i8> [[sub]], +; CHECK: [[mask1:%[0-9]+]] = and <3 x i8> %b, splat (i8 7) +; CHECK: [[sub:%[0-9]+]] = sub <3 x i8> splat (i8 8) +; CHECK: [[mask2:%[0-9]+]] = and <3 x i8> [[sub]], splat (i8 7) ; CHECK: [[shl:%[0-9]+]] = shl <3 x i8> %a, [[mask1]] ; CHECK: [[shr:%[0-9]+]] = lshr <3 x i8> %a, [[mask2]] ; CHECK: [[or:%[0-9]+]] = or <3 x i8> [[shr]], [[shl]] diff --git a/test/IntegerBuiltins/rotate/rotate_uint3.ll b/test/IntegerBuiltins/rotate/rotate_uint3.ll index 64abdb9dc..3f5957669 100644 --- a/test/IntegerBuiltins/rotate/rotate_uint3.ll +++ b/test/IntegerBuiltins/rotate/rotate_uint3.ll @@ -1,9 +1,9 @@ ; RUN: clspv-opt %s -o %t.ll --passes=replace-opencl-builtin,replace-llvm-intrinsics ; RUN: FileCheck %s < %t.ll -; CHECK: [[mask1:%[0-9]+]] = and <3 x i32> %b, -; CHECK: [[sub:%[0-9]+]] = sub <3 x i32> -; CHECK: [[mask2:%[0-9]+]] = and <3 x i32> [[sub]], +; CHECK: [[mask1:%[0-9]+]] = and <3 x i32> %b, splat (i32 31) +; CHECK: [[sub:%[0-9]+]] = sub <3 x i32> splat (i32 32) +; CHECK: [[mask2:%[0-9]+]] = and <3 x i32> [[sub]], splat (i32 31) ; CHECK: [[shl:%[0-9]+]] = shl <3 x i32> %a, [[mask1]] ; CHECK: [[shr:%[0-9]+]] = lshr <3 x i32> %a, [[mask2]] ; CHECK: [[or:%[0-9]+]] = or <3 x i32> [[shr]], [[shl]] diff --git a/test/IntegerBuiltins/rotate/rotate_ulong3.ll b/test/IntegerBuiltins/rotate/rotate_ulong3.ll index 02f987185..ccb9d3571 100644 --- a/test/IntegerBuiltins/rotate/rotate_ulong3.ll +++ b/test/IntegerBuiltins/rotate/rotate_ulong3.ll @@ -1,9 +1,9 @@ ; RUN: clspv-opt %s -o %t.ll --passes=replace-opencl-builtin,replace-llvm-intrinsics ; RUN: FileCheck %s < %t.ll -; CHECK: [[mask1:%[0-9]+]] = and <3 x i64> %b, -; CHECK: [[sub:%[0-9]+]] = sub <3 x i64> -; CHECK: [[mask2:%[0-9]+]] = and <3 x i64> [[sub]], +; CHECK: [[mask1:%[0-9]+]] = and <3 x i64> %b, splat (i64 63) +; CHECK: [[sub:%[0-9]+]] = sub <3 x i64> splat (i64 64) +; CHECK: [[mask2:%[0-9]+]] = and <3 x i64> [[sub]], splat (i64 63) ; CHECK: [[shl:%[0-9]+]] = shl <3 x i64> %a, [[mask1]] ; CHECK: [[shr:%[0-9]+]] = lshr <3 x i64> %a, [[mask2]] ; CHECK: [[or:%[0-9]+]] = or <3 x i64> [[shr]], [[shl]] diff --git a/test/IntegerBuiltins/rotate/rotate_ushort3.ll b/test/IntegerBuiltins/rotate/rotate_ushort3.ll index 4f1b6160c..f0ea71a00 100644 --- a/test/IntegerBuiltins/rotate/rotate_ushort3.ll +++ b/test/IntegerBuiltins/rotate/rotate_ushort3.ll @@ -1,9 +1,9 @@ ; RUN: clspv-opt %s -o %t.ll --passes=replace-opencl-builtin,replace-llvm-intrinsics ; RUN: FileCheck %s < %t.ll -; CHECK: [[mask1:%[0-9]+]] = and <3 x i16> %b, -; CHECK: [[sub:%[0-9]+]] = sub <3 x i16> -; CHECK: [[mask2:%[0-9]+]] = and <3 x i16> [[sub]], +; CHECK: [[mask1:%[0-9]+]] = and <3 x i16> %b, splat (i16 15) +; CHECK: [[sub:%[0-9]+]] = sub <3 x i16> splat (i16 16) +; CHECK: [[mask2:%[0-9]+]] = and <3 x i16> [[sub]], splat (i16 15) ; CHECK: [[shl:%[0-9]+]] = shl <3 x i16> %a, [[mask1]] ; CHECK: [[shr:%[0-9]+]] = lshr <3 x i16> %a, [[mask2]] ; CHECK: [[or:%[0-9]+]] = or <3 x i16> [[shr]], [[shl]] diff --git a/test/IntegerBuiltins/sub_sat/sub_sat_char2.ll b/test/IntegerBuiltins/sub_sat/sub_sat_char2.ll index 2854b428f..7516485c4 100644 --- a/test/IntegerBuiltins/sub_sat/sub_sat_char2.ll +++ b/test/IntegerBuiltins/sub_sat/sub_sat_char2.ll @@ -20,6 +20,6 @@ declare <2 x i8> @_Z7sub_satDv2_cS_(<2 x i8>, <2 x i8>) ; CHECK: [[sext_a:%[a-zA-Z0-9_.]+]] = sext <2 x i8> %a to <2 x i16> ; CHECK: [[sext_b:%[a-zA-Z0-9_.]+]] = sext <2 x i8> %b to <2 x i16> ; CHECK: [[sub:%[a-zA-Z0-9_.]+]] = sub nuw nsw <2 x i16> [[sext_a]], [[sext_b]] -; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <2 x i16> @_Z5clampDv2_sS_S_(<2 x i16> [[sub]], <2 x i16> , <2 x i16> ) +; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <2 x i16> @_Z5clampDv2_sS_S_(<2 x i16> [[sub]], <2 x i16> splat (i16 -128), <2 x i16> splat (i16 127)) ; CHECK: [[trunc:%[a-zA-Z0-9_.]+]] = trunc <2 x i16> [[clamp]] to <2 x i8> ; CHECK: ret <2 x i8> [[trunc]] diff --git a/test/IntegerBuiltins/sub_sat/sub_sat_char3.ll b/test/IntegerBuiltins/sub_sat/sub_sat_char3.ll index 53dff63ec..1303e542b 100644 --- a/test/IntegerBuiltins/sub_sat/sub_sat_char3.ll +++ b/test/IntegerBuiltins/sub_sat/sub_sat_char3.ll @@ -20,6 +20,6 @@ declare <3 x i8> @_Z7sub_satDv3_cS_(<3 x i8>, <3 x i8>) ; CHECK: [[sext_a:%[a-zA-Z0-9_.]+]] = sext <3 x i8> %a to <3 x i16> ; CHECK: [[sext_b:%[a-zA-Z0-9_.]+]] = sext <3 x i8> %b to <3 x i16> ; CHECK: [[sub:%[a-zA-Z0-9_.]+]] = sub nuw nsw <3 x i16> [[sext_a]], [[sext_b]] -; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <3 x i16> @_Z5clampDv3_sS_S_(<3 x i16> [[sub]], <3 x i16> , <3 x i16> ) +; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <3 x i16> @_Z5clampDv3_sS_S_(<3 x i16> [[sub]], <3 x i16> splat (i16 -128), <3 x i16> splat (i16 127)) ; CHECK: [[trunc:%[a-zA-Z0-9_.]+]] = trunc <3 x i16> [[clamp]] to <3 x i8> ; CHECK: ret <3 x i8> [[trunc]] diff --git a/test/IntegerBuiltins/sub_sat/sub_sat_char4.ll b/test/IntegerBuiltins/sub_sat/sub_sat_char4.ll index 6fbf77f33..dc2a35812 100644 --- a/test/IntegerBuiltins/sub_sat/sub_sat_char4.ll +++ b/test/IntegerBuiltins/sub_sat/sub_sat_char4.ll @@ -20,6 +20,6 @@ declare <4 x i8> @_Z7sub_satDv4_cS_(<4 x i8>, <4 x i8>) ; CHECK: [[sext_a:%[a-zA-Z0-9_.]+]] = sext <4 x i8> %a to <4 x i16> ; CHECK: [[sext_b:%[a-zA-Z0-9_.]+]] = sext <4 x i8> %b to <4 x i16> ; CHECK: [[sub:%[a-zA-Z0-9_.]+]] = sub nuw nsw <4 x i16> [[sext_a]], [[sext_b]] -; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <4 x i16> @_Z5clampDv4_sS_S_(<4 x i16> [[sub]], <4 x i16> , <4 x i16> ) +; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <4 x i16> @_Z5clampDv4_sS_S_(<4 x i16> [[sub]], <4 x i16> splat (i16 -128), <4 x i16> splat (i16 127)) ; CHECK: [[trunc:%[a-zA-Z0-9_.]+]] = trunc <4 x i16> [[clamp]] to <4 x i8> ; CHECK: ret <4 x i8> [[trunc]] diff --git a/test/IntegerBuiltins/sub_sat/sub_sat_hack_clamp_char2.ll b/test/IntegerBuiltins/sub_sat/sub_sat_hack_clamp_char2.ll index d07dfd035..7583a406b 100644 --- a/test/IntegerBuiltins/sub_sat/sub_sat_hack_clamp_char2.ll +++ b/test/IntegerBuiltins/sub_sat/sub_sat_hack_clamp_char2.ll @@ -20,6 +20,6 @@ declare <2 x i8> @_Z7sub_satDv2_cS_(<2 x i8>, <2 x i8>) ; CHECK: [[sext_a:%[a-zA-Z0-9_.]+]] = sext <2 x i8> %a to <2 x i32> ; CHECK: [[sext_b:%[a-zA-Z0-9_.]+]] = sext <2 x i8> %b to <2 x i32> ; CHECK: [[sub:%[a-zA-Z0-9_.]+]] = sub nuw nsw <2 x i32> [[sext_a]], [[sext_b]] -; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <2 x i32> @_Z5clampDv2_iS_S_(<2 x i32> [[sub]], <2 x i32> , <2 x i32> ) +; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <2 x i32> @_Z5clampDv2_iS_S_(<2 x i32> [[sub]], <2 x i32> splat (i32 -128), <2 x i32> splat (i32 127)) ; CHECK: [[trunc:%[a-zA-Z0-9_.]+]] = trunc <2 x i32> [[clamp]] to <2 x i8> ; CHECK: ret <2 x i8> [[trunc]] diff --git a/test/IntegerBuiltins/sub_sat/sub_sat_hack_clamp_char3.ll b/test/IntegerBuiltins/sub_sat/sub_sat_hack_clamp_char3.ll index c9f8c5dd1..597f96528 100644 --- a/test/IntegerBuiltins/sub_sat/sub_sat_hack_clamp_char3.ll +++ b/test/IntegerBuiltins/sub_sat/sub_sat_hack_clamp_char3.ll @@ -20,6 +20,6 @@ declare <3 x i8> @_Z7sub_satDv3_cS_(<3 x i8>, <3 x i8>) ; CHECK: [[sext_a:%[a-zA-Z0-9_.]+]] = sext <3 x i8> %a to <3 x i32> ; CHECK: [[sext_b:%[a-zA-Z0-9_.]+]] = sext <3 x i8> %b to <3 x i32> ; CHECK: [[sub:%[a-zA-Z0-9_.]+]] = sub nuw nsw <3 x i32> [[sext_a]], [[sext_b]] -; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <3 x i32> @_Z5clampDv3_iS_S_(<3 x i32> [[sub]], <3 x i32> , <3 x i32> ) +; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <3 x i32> @_Z5clampDv3_iS_S_(<3 x i32> [[sub]], <3 x i32> splat (i32 -128), <3 x i32> splat (i32 127)) ; CHECK: [[trunc:%[a-zA-Z0-9_.]+]] = trunc <3 x i32> [[clamp]] to <3 x i8> ; CHECK: ret <3 x i8> [[trunc]] diff --git a/test/IntegerBuiltins/sub_sat/sub_sat_hack_clamp_char4.ll b/test/IntegerBuiltins/sub_sat/sub_sat_hack_clamp_char4.ll index 23245c19f..9769af685 100644 --- a/test/IntegerBuiltins/sub_sat/sub_sat_hack_clamp_char4.ll +++ b/test/IntegerBuiltins/sub_sat/sub_sat_hack_clamp_char4.ll @@ -20,6 +20,6 @@ declare <4 x i8> @_Z7sub_satDv4_cS_(<4 x i8>, <4 x i8>) ; CHECK: [[sext_a:%[a-zA-Z0-9_.]+]] = sext <4 x i8> %a to <4 x i32> ; CHECK: [[sext_b:%[a-zA-Z0-9_.]+]] = sext <4 x i8> %b to <4 x i32> ; CHECK: [[sub:%[a-zA-Z0-9_.]+]] = sub nuw nsw <4 x i32> [[sext_a]], [[sext_b]] -; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <4 x i32> @_Z5clampDv4_iS_S_(<4 x i32> [[sub]], <4 x i32> , <4 x i32> ) +; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <4 x i32> @_Z5clampDv4_iS_S_(<4 x i32> [[sub]], <4 x i32> splat (i32 -128), <4 x i32> splat (i32 127)) ; CHECK: [[trunc:%[a-zA-Z0-9_.]+]] = trunc <4 x i32> [[clamp]] to <4 x i8> ; CHECK: ret <4 x i8> [[trunc]] diff --git a/test/IntegerBuiltins/sub_sat/sub_sat_hack_clamp_int2.ll b/test/IntegerBuiltins/sub_sat/sub_sat_hack_clamp_int2.ll index 0ff20d642..10c75b3a4 100644 --- a/test/IntegerBuiltins/sub_sat/sub_sat_hack_clamp_int2.ll +++ b/test/IntegerBuiltins/sub_sat/sub_sat_hack_clamp_int2.ll @@ -21,7 +21,7 @@ declare <2 x i32> @_Z7sub_satDv2_iS_(<2 x i32>, <2 x i32>) ; CHECK: [[b_lt_0:%[a-zA-Z0-9_.]+]] = icmp slt <2 x i32> %b, zeroinitializer ; CHECK: [[sub_gt_a:%[a-zA-Z0-9_.]+]] = icmp sgt <2 x i32> [[sub]], %a ; CHECK: [[sub_lt_a:%[a-zA-Z0-9_.]+]] = icmp slt <2 x i32> [[sub]], %a -; CHECK: [[neg_clamp:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[sub_lt_a]], <2 x i32> , <2 x i32> [[sub]] -; CHECK: [[pos_clamp:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[sub_gt_a]], <2 x i32> , <2 x i32> [[sub]] +; CHECK: [[neg_clamp:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[sub_lt_a]], <2 x i32> splat (i32 2147483647), <2 x i32> [[sub]] +; CHECK: [[pos_clamp:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[sub_gt_a]], <2 x i32> splat (i32 -2147483648), <2 x i32> [[sub]] ; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[b_lt_0]], <2 x i32> [[neg_clamp]], <2 x i32> [[pos_clamp]] ; CHECK: ret <2 x i32> [[sel]] diff --git a/test/IntegerBuiltins/sub_sat/sub_sat_hack_clamp_int3.ll b/test/IntegerBuiltins/sub_sat/sub_sat_hack_clamp_int3.ll index c4853270c..0de1232af 100644 --- a/test/IntegerBuiltins/sub_sat/sub_sat_hack_clamp_int3.ll +++ b/test/IntegerBuiltins/sub_sat/sub_sat_hack_clamp_int3.ll @@ -21,7 +21,7 @@ declare <3 x i32> @_Z7sub_satDv3_iS_(<3 x i32>, <3 x i32>) ; CHECK: [[b_lt_0:%[a-zA-Z0-9_.]+]] = icmp slt <3 x i32> %b, zeroinitializer ; CHECK: [[sub_gt_a:%[a-zA-Z0-9_.]+]] = icmp sgt <3 x i32> [[sub]], %a ; CHECK: [[sub_lt_a:%[a-zA-Z0-9_.]+]] = icmp slt <3 x i32> [[sub]], %a -; CHECK: [[neg_clamp:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[sub_lt_a]], <3 x i32> , <3 x i32> [[sub]] -; CHECK: [[pos_clamp:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[sub_gt_a]], <3 x i32> , <3 x i32> [[sub]] +; CHECK: [[neg_clamp:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[sub_lt_a]], <3 x i32> splat (i32 2147483647), <3 x i32> [[sub]] +; CHECK: [[pos_clamp:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[sub_gt_a]], <3 x i32> splat (i32 -2147483648), <3 x i32> [[sub]] ; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[b_lt_0]], <3 x i32> [[neg_clamp]], <3 x i32> [[pos_clamp]] ; CHECK: ret <3 x i32> [[sel]] diff --git a/test/IntegerBuiltins/sub_sat/sub_sat_hack_clamp_int4.ll b/test/IntegerBuiltins/sub_sat/sub_sat_hack_clamp_int4.ll index c61b8fa66..e3cd71a06 100644 --- a/test/IntegerBuiltins/sub_sat/sub_sat_hack_clamp_int4.ll +++ b/test/IntegerBuiltins/sub_sat/sub_sat_hack_clamp_int4.ll @@ -21,7 +21,7 @@ declare <4 x i32> @_Z7sub_satDv4_iS_(<4 x i32>, <4 x i32>) ; CHECK: [[b_lt_0:%[a-zA-Z0-9_.]+]] = icmp slt <4 x i32> %b, zeroinitializer ; CHECK: [[sub_gt_a:%[a-zA-Z0-9_.]+]] = icmp sgt <4 x i32> [[sub]], %a ; CHECK: [[sub_lt_a:%[a-zA-Z0-9_.]+]] = icmp slt <4 x i32> [[sub]], %a -; CHECK: [[neg_clamp:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[sub_lt_a]], <4 x i32> , <4 x i32> [[sub]] -; CHECK: [[pos_clamp:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[sub_gt_a]], <4 x i32> , <4 x i32> [[sub]] +; CHECK: [[neg_clamp:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[sub_lt_a]], <4 x i32> splat (i32 2147483647), <4 x i32> [[sub]] +; CHECK: [[pos_clamp:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[sub_gt_a]], <4 x i32> splat (i32 -2147483648), <4 x i32> [[sub]] ; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[b_lt_0]], <4 x i32> [[neg_clamp]], <4 x i32> [[pos_clamp]] ; CHECK: ret <4 x i32> [[sel]] diff --git a/test/IntegerBuiltins/sub_sat/sub_sat_hack_clamp_long2.ll b/test/IntegerBuiltins/sub_sat/sub_sat_hack_clamp_long2.ll index 454c9f4e6..c6c9c21a1 100644 --- a/test/IntegerBuiltins/sub_sat/sub_sat_hack_clamp_long2.ll +++ b/test/IntegerBuiltins/sub_sat/sub_sat_hack_clamp_long2.ll @@ -21,7 +21,7 @@ declare <2 x i64> @_Z7sub_satDv2_lS_(<2 x i64>, <2 x i64>) ; CHECK: [[b_lt_0:%[a-zA-Z0-9_.]+]] = icmp slt <2 x i64> %b, zeroinitializer ; CHECK: [[sub_gt_a:%[a-zA-Z0-9_.]+]] = icmp sgt <2 x i64> [[sub]], %a ; CHECK: [[sub_lt_a:%[a-zA-Z0-9_.]+]] = icmp slt <2 x i64> [[sub]], %a -; CHECK: [[neg_clamp:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[sub_lt_a]], <2 x i64> , <2 x i64> [[sub]] -; CHECK: [[pos_clamp:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[sub_gt_a]], <2 x i64> , <2 x i64> [[sub]] +; CHECK: [[neg_clamp:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[sub_lt_a]], <2 x i64> splat (i64 9223372036854775807), <2 x i64> [[sub]] +; CHECK: [[pos_clamp:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[sub_gt_a]], <2 x i64> splat (i64 -9223372036854775808), <2 x i64> [[sub]] ; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[b_lt_0]], <2 x i64> [[neg_clamp]], <2 x i64> [[pos_clamp]] ; CHECK: ret <2 x i64> [[sel]] diff --git a/test/IntegerBuiltins/sub_sat/sub_sat_hack_clamp_long3.ll b/test/IntegerBuiltins/sub_sat/sub_sat_hack_clamp_long3.ll index 9720632e5..d42493496 100644 --- a/test/IntegerBuiltins/sub_sat/sub_sat_hack_clamp_long3.ll +++ b/test/IntegerBuiltins/sub_sat/sub_sat_hack_clamp_long3.ll @@ -21,7 +21,7 @@ declare <3 x i64> @_Z7sub_satDv3_lS_(<3 x i64>, <3 x i64>) ; CHECK: [[b_lt_0:%[a-zA-Z0-9_.]+]] = icmp slt <3 x i64> %b, zeroinitializer ; CHECK: [[sub_gt_a:%[a-zA-Z0-9_.]+]] = icmp sgt <3 x i64> [[sub]], %a ; CHECK: [[sub_lt_a:%[a-zA-Z0-9_.]+]] = icmp slt <3 x i64> [[sub]], %a -; CHECK: [[neg_clamp:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[sub_lt_a]], <3 x i64> , <3 x i64> [[sub]] -; CHECK: [[pos_clamp:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[sub_gt_a]], <3 x i64> , <3 x i64> [[sub]] +; CHECK: [[neg_clamp:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[sub_lt_a]], <3 x i64> splat (i64 9223372036854775807), <3 x i64> [[sub]] +; CHECK: [[pos_clamp:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[sub_gt_a]], <3 x i64> splat (i64 -9223372036854775808), <3 x i64> [[sub]] ; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[b_lt_0]], <3 x i64> [[neg_clamp]], <3 x i64> [[pos_clamp]] ; CHECK: ret <3 x i64> [[sel]] diff --git a/test/IntegerBuiltins/sub_sat/sub_sat_hack_clamp_long4.ll b/test/IntegerBuiltins/sub_sat/sub_sat_hack_clamp_long4.ll index 936f85eb0..f64182939 100644 --- a/test/IntegerBuiltins/sub_sat/sub_sat_hack_clamp_long4.ll +++ b/test/IntegerBuiltins/sub_sat/sub_sat_hack_clamp_long4.ll @@ -21,7 +21,7 @@ declare <4 x i64> @_Z7sub_satDv4_lS_(<4 x i64>, <4 x i64>) ; CHECK: [[b_lt_0:%[a-zA-Z0-9_.]+]] = icmp slt <4 x i64> %b, zeroinitializer ; CHECK: [[sub_gt_a:%[a-zA-Z0-9_.]+]] = icmp sgt <4 x i64> [[sub]], %a ; CHECK: [[sub_lt_a:%[a-zA-Z0-9_.]+]] = icmp slt <4 x i64> [[sub]], %a -; CHECK: [[neg_clamp:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[sub_lt_a]], <4 x i64> , <4 x i64> [[sub]] -; CHECK: [[pos_clamp:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[sub_gt_a]], <4 x i64> , <4 x i64> [[sub]] +; CHECK: [[neg_clamp:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[sub_lt_a]], <4 x i64> splat (i64 9223372036854775807), <4 x i64> [[sub]] +; CHECK: [[pos_clamp:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[sub_gt_a]], <4 x i64> splat (i64 -9223372036854775808), <4 x i64> [[sub]] ; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[b_lt_0]], <4 x i64> [[neg_clamp]], <4 x i64> [[pos_clamp]] ; CHECK: ret <4 x i64> [[sel]] diff --git a/test/IntegerBuiltins/sub_sat/sub_sat_hack_clamp_short2.ll b/test/IntegerBuiltins/sub_sat/sub_sat_hack_clamp_short2.ll index c283864a6..e30c655da 100644 --- a/test/IntegerBuiltins/sub_sat/sub_sat_hack_clamp_short2.ll +++ b/test/IntegerBuiltins/sub_sat/sub_sat_hack_clamp_short2.ll @@ -20,6 +20,6 @@ declare <2 x i16> @_Z7sub_satDv2_sS_(<2 x i16>, <2 x i16>) ; CHECK: [[sext_a:%[a-zA-Z0-9_.]+]] = sext <2 x i16> %a to <2 x i32> ; CHECK: [[sext_b:%[a-zA-Z0-9_.]+]] = sext <2 x i16> %b to <2 x i32> ; CHECK: [[sub:%[a-zA-Z0-9_.]+]] = sub nuw nsw <2 x i32> [[sext_a]], [[sext_b]] -; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <2 x i32> @_Z5clampDv2_iS_S_(<2 x i32> [[sub]], <2 x i32> , <2 x i32> ) +; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <2 x i32> @_Z5clampDv2_iS_S_(<2 x i32> [[sub]], <2 x i32> splat (i32 -32768), <2 x i32> splat (i32 32767)) ; CHECK: [[trunc:%[a-zA-Z0-9_.]+]] = trunc <2 x i32> [[clamp]] to <2 x i16> ; CHECK: ret <2 x i16> [[trunc]] diff --git a/test/IntegerBuiltins/sub_sat/sub_sat_hack_clamp_short3.ll b/test/IntegerBuiltins/sub_sat/sub_sat_hack_clamp_short3.ll index 6c4f5ad09..3c9118db7 100644 --- a/test/IntegerBuiltins/sub_sat/sub_sat_hack_clamp_short3.ll +++ b/test/IntegerBuiltins/sub_sat/sub_sat_hack_clamp_short3.ll @@ -20,6 +20,6 @@ declare <3 x i16> @_Z7sub_satDv3_sS_(<3 x i16>, <3 x i16>) ; CHECK: [[sext_a:%[a-zA-Z0-9_.]+]] = sext <3 x i16> %a to <3 x i32> ; CHECK: [[sext_b:%[a-zA-Z0-9_.]+]] = sext <3 x i16> %b to <3 x i32> ; CHECK: [[sub:%[a-zA-Z0-9_.]+]] = sub nuw nsw <3 x i32> [[sext_a]], [[sext_b]] -; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <3 x i32> @_Z5clampDv3_iS_S_(<3 x i32> [[sub]], <3 x i32> , <3 x i32> ) +; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <3 x i32> @_Z5clampDv3_iS_S_(<3 x i32> [[sub]], <3 x i32> splat (i32 -32768), <3 x i32> splat (i32 32767)) ; CHECK: [[trunc:%[a-zA-Z0-9_.]+]] = trunc <3 x i32> [[clamp]] to <3 x i16> ; CHECK: ret <3 x i16> [[trunc]] diff --git a/test/IntegerBuiltins/sub_sat/sub_sat_hack_clamp_short4.ll b/test/IntegerBuiltins/sub_sat/sub_sat_hack_clamp_short4.ll index d5d3f2ac0..4d19250c3 100644 --- a/test/IntegerBuiltins/sub_sat/sub_sat_hack_clamp_short4.ll +++ b/test/IntegerBuiltins/sub_sat/sub_sat_hack_clamp_short4.ll @@ -20,6 +20,6 @@ declare <4 x i16> @_Z7sub_satDv4_sS_(<4 x i16>, <4 x i16>) ; CHECK: [[sext_a:%[a-zA-Z0-9_.]+]] = sext <4 x i16> %a to <4 x i32> ; CHECK: [[sext_b:%[a-zA-Z0-9_.]+]] = sext <4 x i16> %b to <4 x i32> ; CHECK: [[sub:%[a-zA-Z0-9_.]+]] = sub nuw nsw <4 x i32> [[sext_a]], [[sext_b]] -; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <4 x i32> @_Z5clampDv4_iS_S_(<4 x i32> [[sub]], <4 x i32> , <4 x i32> ) +; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <4 x i32> @_Z5clampDv4_iS_S_(<4 x i32> [[sub]], <4 x i32> splat (i32 -32768), <4 x i32> splat (i32 32767)) ; CHECK: [[trunc:%[a-zA-Z0-9_.]+]] = trunc <4 x i32> [[clamp]] to <4 x i16> ; CHECK: ret <4 x i16> [[trunc]] diff --git a/test/IntegerBuiltins/sub_sat/sub_sat_hack_clamp_test_gen.cpp b/test/IntegerBuiltins/sub_sat/sub_sat_hack_clamp_test_gen.cpp index f57f50e10..541801e31 100644 --- a/test/IntegerBuiltins/sub_sat/sub_sat_hack_clamp_test_gen.cpp +++ b/test/IntegerBuiltins/sub_sat/sub_sat_hack_clamp_test_gen.cpp @@ -122,13 +122,7 @@ std::string SplatConstant(uint32_t vector, const std::string &type, if (vector == 1) return value; - std::string constant = "<"; - for (auto i = 0; i < vector; ++i) { - constant += type + " " + value; - constant += (i == (vector - 1) ? "" : ", "); - } - constant += ">"; - return constant; + return "splat (" + type + " " + value + ")"; } std::string NotConstant(uint32_t vector) { diff --git a/test/IntegerBuiltins/sub_sat/sub_sat_int2.ll b/test/IntegerBuiltins/sub_sat/sub_sat_int2.ll index fa8186818..0c960cb6e 100644 --- a/test/IntegerBuiltins/sub_sat/sub_sat_int2.ll +++ b/test/IntegerBuiltins/sub_sat/sub_sat_int2.ll @@ -21,7 +21,7 @@ declare <2 x i32> @_Z7sub_satDv2_iS_(<2 x i32>, <2 x i32>) ; CHECK: [[b_lt_0:%[a-zA-Z0-9_.]+]] = icmp slt <2 x i32> %b, zeroinitializer ; CHECK: [[sub_gt_a:%[a-zA-Z0-9_.]+]] = icmp sgt <2 x i32> [[sub]], %a ; CHECK: [[sub_lt_a:%[a-zA-Z0-9_.]+]] = icmp slt <2 x i32> [[sub]], %a -; CHECK: [[neg_clamp:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[sub_lt_a]], <2 x i32> , <2 x i32> [[sub]] -; CHECK: [[pos_clamp:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[sub_gt_a]], <2 x i32> , <2 x i32> [[sub]] +; CHECK: [[neg_clamp:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[sub_lt_a]], <2 x i32> splat (i32 2147483647), <2 x i32> [[sub]] +; CHECK: [[pos_clamp:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[sub_gt_a]], <2 x i32> splat (i32 -2147483648), <2 x i32> [[sub]] ; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[b_lt_0]], <2 x i32> [[neg_clamp]], <2 x i32> [[pos_clamp]] ; CHECK: ret <2 x i32> [[sel]] diff --git a/test/IntegerBuiltins/sub_sat/sub_sat_int3.ll b/test/IntegerBuiltins/sub_sat/sub_sat_int3.ll index 95c8829ea..a5a3b0f77 100644 --- a/test/IntegerBuiltins/sub_sat/sub_sat_int3.ll +++ b/test/IntegerBuiltins/sub_sat/sub_sat_int3.ll @@ -21,7 +21,7 @@ declare <3 x i32> @_Z7sub_satDv3_iS_(<3 x i32>, <3 x i32>) ; CHECK: [[b_lt_0:%[a-zA-Z0-9_.]+]] = icmp slt <3 x i32> %b, zeroinitializer ; CHECK: [[sub_gt_a:%[a-zA-Z0-9_.]+]] = icmp sgt <3 x i32> [[sub]], %a ; CHECK: [[sub_lt_a:%[a-zA-Z0-9_.]+]] = icmp slt <3 x i32> [[sub]], %a -; CHECK: [[neg_clamp:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[sub_lt_a]], <3 x i32> , <3 x i32> [[sub]] -; CHECK: [[pos_clamp:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[sub_gt_a]], <3 x i32> , <3 x i32> [[sub]] +; CHECK: [[neg_clamp:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[sub_lt_a]], <3 x i32> splat (i32 2147483647), <3 x i32> [[sub]] +; CHECK: [[pos_clamp:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[sub_gt_a]], <3 x i32> splat (i32 -2147483648), <3 x i32> [[sub]] ; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[b_lt_0]], <3 x i32> [[neg_clamp]], <3 x i32> [[pos_clamp]] ; CHECK: ret <3 x i32> [[sel]] diff --git a/test/IntegerBuiltins/sub_sat/sub_sat_int4.ll b/test/IntegerBuiltins/sub_sat/sub_sat_int4.ll index 65ec6ec4d..23c26f40a 100644 --- a/test/IntegerBuiltins/sub_sat/sub_sat_int4.ll +++ b/test/IntegerBuiltins/sub_sat/sub_sat_int4.ll @@ -21,7 +21,7 @@ declare <4 x i32> @_Z7sub_satDv4_iS_(<4 x i32>, <4 x i32>) ; CHECK: [[b_lt_0:%[a-zA-Z0-9_.]+]] = icmp slt <4 x i32> %b, zeroinitializer ; CHECK: [[sub_gt_a:%[a-zA-Z0-9_.]+]] = icmp sgt <4 x i32> [[sub]], %a ; CHECK: [[sub_lt_a:%[a-zA-Z0-9_.]+]] = icmp slt <4 x i32> [[sub]], %a -; CHECK: [[neg_clamp:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[sub_lt_a]], <4 x i32> , <4 x i32> [[sub]] -; CHECK: [[pos_clamp:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[sub_gt_a]], <4 x i32> , <4 x i32> [[sub]] +; CHECK: [[neg_clamp:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[sub_lt_a]], <4 x i32> splat (i32 2147483647), <4 x i32> [[sub]] +; CHECK: [[pos_clamp:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[sub_gt_a]], <4 x i32> splat (i32 -2147483648), <4 x i32> [[sub]] ; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[b_lt_0]], <4 x i32> [[neg_clamp]], <4 x i32> [[pos_clamp]] ; CHECK: ret <4 x i32> [[sel]] diff --git a/test/IntegerBuiltins/sub_sat/sub_sat_long2.ll b/test/IntegerBuiltins/sub_sat/sub_sat_long2.ll index c3de524bd..08eb3988f 100644 --- a/test/IntegerBuiltins/sub_sat/sub_sat_long2.ll +++ b/test/IntegerBuiltins/sub_sat/sub_sat_long2.ll @@ -21,7 +21,7 @@ declare <2 x i64> @_Z7sub_satDv2_lS_(<2 x i64>, <2 x i64>) ; CHECK: [[b_lt_0:%[a-zA-Z0-9_.]+]] = icmp slt <2 x i64> %b, zeroinitializer ; CHECK: [[sub_gt_a:%[a-zA-Z0-9_.]+]] = icmp sgt <2 x i64> [[sub]], %a ; CHECK: [[sub_lt_a:%[a-zA-Z0-9_.]+]] = icmp slt <2 x i64> [[sub]], %a -; CHECK: [[neg_clamp:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[sub_lt_a]], <2 x i64> , <2 x i64> [[sub]] -; CHECK: [[pos_clamp:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[sub_gt_a]], <2 x i64> , <2 x i64> [[sub]] +; CHECK: [[neg_clamp:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[sub_lt_a]], <2 x i64> splat (i64 9223372036854775807), <2 x i64> [[sub]] +; CHECK: [[pos_clamp:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[sub_gt_a]], <2 x i64> splat (i64 -9223372036854775808), <2 x i64> [[sub]] ; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[b_lt_0]], <2 x i64> [[neg_clamp]], <2 x i64> [[pos_clamp]] ; CHECK: ret <2 x i64> [[sel]] diff --git a/test/IntegerBuiltins/sub_sat/sub_sat_long3.ll b/test/IntegerBuiltins/sub_sat/sub_sat_long3.ll index 194b91792..d4e09f53a 100644 --- a/test/IntegerBuiltins/sub_sat/sub_sat_long3.ll +++ b/test/IntegerBuiltins/sub_sat/sub_sat_long3.ll @@ -21,7 +21,7 @@ declare <3 x i64> @_Z7sub_satDv3_lS_(<3 x i64>, <3 x i64>) ; CHECK: [[b_lt_0:%[a-zA-Z0-9_.]+]] = icmp slt <3 x i64> %b, zeroinitializer ; CHECK: [[sub_gt_a:%[a-zA-Z0-9_.]+]] = icmp sgt <3 x i64> [[sub]], %a ; CHECK: [[sub_lt_a:%[a-zA-Z0-9_.]+]] = icmp slt <3 x i64> [[sub]], %a -; CHECK: [[neg_clamp:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[sub_lt_a]], <3 x i64> , <3 x i64> [[sub]] -; CHECK: [[pos_clamp:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[sub_gt_a]], <3 x i64> , <3 x i64> [[sub]] +; CHECK: [[neg_clamp:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[sub_lt_a]], <3 x i64> splat (i64 9223372036854775807), <3 x i64> [[sub]] +; CHECK: [[pos_clamp:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[sub_gt_a]], <3 x i64> splat (i64 -9223372036854775808), <3 x i64> [[sub]] ; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[b_lt_0]], <3 x i64> [[neg_clamp]], <3 x i64> [[pos_clamp]] ; CHECK: ret <3 x i64> [[sel]] diff --git a/test/IntegerBuiltins/sub_sat/sub_sat_long4.ll b/test/IntegerBuiltins/sub_sat/sub_sat_long4.ll index faa10cb27..a6834a6a8 100644 --- a/test/IntegerBuiltins/sub_sat/sub_sat_long4.ll +++ b/test/IntegerBuiltins/sub_sat/sub_sat_long4.ll @@ -21,7 +21,7 @@ declare <4 x i64> @_Z7sub_satDv4_lS_(<4 x i64>, <4 x i64>) ; CHECK: [[b_lt_0:%[a-zA-Z0-9_.]+]] = icmp slt <4 x i64> %b, zeroinitializer ; CHECK: [[sub_gt_a:%[a-zA-Z0-9_.]+]] = icmp sgt <4 x i64> [[sub]], %a ; CHECK: [[sub_lt_a:%[a-zA-Z0-9_.]+]] = icmp slt <4 x i64> [[sub]], %a -; CHECK: [[neg_clamp:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[sub_lt_a]], <4 x i64> , <4 x i64> [[sub]] -; CHECK: [[pos_clamp:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[sub_gt_a]], <4 x i64> , <4 x i64> [[sub]] +; CHECK: [[neg_clamp:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[sub_lt_a]], <4 x i64> splat (i64 9223372036854775807), <4 x i64> [[sub]] +; CHECK: [[pos_clamp:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[sub_gt_a]], <4 x i64> splat (i64 -9223372036854775808), <4 x i64> [[sub]] ; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[b_lt_0]], <4 x i64> [[neg_clamp]], <4 x i64> [[pos_clamp]] ; CHECK: ret <4 x i64> [[sel]] diff --git a/test/IntegerBuiltins/sub_sat/sub_sat_short2.ll b/test/IntegerBuiltins/sub_sat/sub_sat_short2.ll index fd80e7049..7f93f005d 100644 --- a/test/IntegerBuiltins/sub_sat/sub_sat_short2.ll +++ b/test/IntegerBuiltins/sub_sat/sub_sat_short2.ll @@ -20,6 +20,6 @@ declare <2 x i16> @_Z7sub_satDv2_sS_(<2 x i16>, <2 x i16>) ; CHECK: [[sext_a:%[a-zA-Z0-9_.]+]] = sext <2 x i16> %a to <2 x i32> ; CHECK: [[sext_b:%[a-zA-Z0-9_.]+]] = sext <2 x i16> %b to <2 x i32> ; CHECK: [[sub:%[a-zA-Z0-9_.]+]] = sub nuw nsw <2 x i32> [[sext_a]], [[sext_b]] -; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <2 x i32> @_Z5clampDv2_iS_S_(<2 x i32> [[sub]], <2 x i32> , <2 x i32> ) +; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <2 x i32> @_Z5clampDv2_iS_S_(<2 x i32> [[sub]], <2 x i32> splat (i32 -32768), <2 x i32> splat (i32 32767)) ; CHECK: [[trunc:%[a-zA-Z0-9_.]+]] = trunc <2 x i32> [[clamp]] to <2 x i16> ; CHECK: ret <2 x i16> [[trunc]] diff --git a/test/IntegerBuiltins/sub_sat/sub_sat_short3.ll b/test/IntegerBuiltins/sub_sat/sub_sat_short3.ll index c5e45e912..2fd55745d 100644 --- a/test/IntegerBuiltins/sub_sat/sub_sat_short3.ll +++ b/test/IntegerBuiltins/sub_sat/sub_sat_short3.ll @@ -20,6 +20,6 @@ declare <3 x i16> @_Z7sub_satDv3_sS_(<3 x i16>, <3 x i16>) ; CHECK: [[sext_a:%[a-zA-Z0-9_.]+]] = sext <3 x i16> %a to <3 x i32> ; CHECK: [[sext_b:%[a-zA-Z0-9_.]+]] = sext <3 x i16> %b to <3 x i32> ; CHECK: [[sub:%[a-zA-Z0-9_.]+]] = sub nuw nsw <3 x i32> [[sext_a]], [[sext_b]] -; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <3 x i32> @_Z5clampDv3_iS_S_(<3 x i32> [[sub]], <3 x i32> , <3 x i32> ) +; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <3 x i32> @_Z5clampDv3_iS_S_(<3 x i32> [[sub]], <3 x i32> splat (i32 -32768), <3 x i32> splat (i32 32767)) ; CHECK: [[trunc:%[a-zA-Z0-9_.]+]] = trunc <3 x i32> [[clamp]] to <3 x i16> ; CHECK: ret <3 x i16> [[trunc]] diff --git a/test/IntegerBuiltins/sub_sat/sub_sat_short4.ll b/test/IntegerBuiltins/sub_sat/sub_sat_short4.ll index 3daa0899b..328c52784 100644 --- a/test/IntegerBuiltins/sub_sat/sub_sat_short4.ll +++ b/test/IntegerBuiltins/sub_sat/sub_sat_short4.ll @@ -20,6 +20,6 @@ declare <4 x i16> @_Z7sub_satDv4_sS_(<4 x i16>, <4 x i16>) ; CHECK: [[sext_a:%[a-zA-Z0-9_.]+]] = sext <4 x i16> %a to <4 x i32> ; CHECK: [[sext_b:%[a-zA-Z0-9_.]+]] = sext <4 x i16> %b to <4 x i32> ; CHECK: [[sub:%[a-zA-Z0-9_.]+]] = sub nuw nsw <4 x i32> [[sext_a]], [[sext_b]] -; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <4 x i32> @_Z5clampDv4_iS_S_(<4 x i32> [[sub]], <4 x i32> , <4 x i32> ) +; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <4 x i32> @_Z5clampDv4_iS_S_(<4 x i32> [[sub]], <4 x i32> splat (i32 -32768), <4 x i32> splat (i32 32767)) ; CHECK: [[trunc:%[a-zA-Z0-9_.]+]] = trunc <4 x i32> [[clamp]] to <4 x i16> ; CHECK: ret <4 x i16> [[trunc]] diff --git a/test/IntegerBuiltins/sub_sat/sub_sat_test_gen.cpp b/test/IntegerBuiltins/sub_sat/sub_sat_test_gen.cpp index 01f93910e..3a7719895 100644 --- a/test/IntegerBuiltins/sub_sat/sub_sat_test_gen.cpp +++ b/test/IntegerBuiltins/sub_sat/sub_sat_test_gen.cpp @@ -122,13 +122,7 @@ std::string SplatConstant(uint32_t vector, const std::string &type, if (vector == 1) return value; - std::string constant = "<"; - for (auto i = 0; i < vector; ++i) { - constant += type + " " + value; - constant += (i == (vector - 1) ? "" : ", "); - } - constant += ">"; - return constant; + return "splat (" + type + " " + value + ")"; } std::string NotConstant(uint32_t vector) { diff --git a/test/LLVMIntrinsics/bswap/bswap_v2i16.ll b/test/LLVMIntrinsics/bswap/bswap_v2i16.ll index fa4f9601a..7f7427e79 100644 --- a/test/LLVMIntrinsics/bswap/bswap_v2i16.ll +++ b/test/LLVMIntrinsics/bswap/bswap_v2i16.ll @@ -1,8 +1,8 @@ ; RUN: clspv-opt %s -o %t.ll --passes=replace-llvm-intrinsics ; RUN: FileCheck %s < %t.ll -; CHECK: [[shl:%[^ ]+]] = shl <2 x i16> %input, -; CHECK: [[lshr:%[^ ]+]] = lshr <2 x i16> %input, +; CHECK: [[shl:%[^ ]+]] = shl <2 x i16> %input, splat (i16 8) +; CHECK: [[lshr:%[^ ]+]] = lshr <2 x i16> %input, splat (i16 8) ; CHECK: or <2 x i16> [[shl]], [[lshr]] declare <2 x i16> @llvm.bswap.v2i16(<2 x i16>) diff --git a/test/LLVMIntrinsics/bswap/bswap_v2i32.ll b/test/LLVMIntrinsics/bswap/bswap_v2i32.ll index cea647861..920851586 100644 --- a/test/LLVMIntrinsics/bswap/bswap_v2i32.ll +++ b/test/LLVMIntrinsics/bswap/bswap_v2i32.ll @@ -1,12 +1,12 @@ ; RUN: clspv-opt %s -o %t.ll --passes=replace-llvm-intrinsics ; RUN: FileCheck %s < %t.ll -; CHECK: [[byte3:%[^ ]+]] = shl <2 x i32> %input, -; CHECK: [[and:%[^ ]+]] = and <2 x i32> %input, -; CHECK: [[byte2:%[^ ]+]] = shl <2 x i32> [[and]], -; CHECK: [[lshr:%[^ ]+]] = lshr <2 x i32> %input, -; CHECK: [[byte1:%[^ ]+]] = and <2 x i32> [[lshr]], -; CHECK: [[byte0:%[^ ]+]] = lshr <2 x i32> %input, +; CHECK: [[byte3:%[^ ]+]] = shl <2 x i32> %input, splat (i32 24) +; CHECK: [[and:%[^ ]+]] = and <2 x i32> %input, splat (i32 65280) +; CHECK: [[byte2:%[^ ]+]] = shl <2 x i32> [[and]], splat (i32 8) +; CHECK: [[lshr:%[^ ]+]] = lshr <2 x i32> %input, splat (i32 8) +; CHECK: [[byte1:%[^ ]+]] = and <2 x i32> [[lshr]], splat (i32 65280) +; CHECK: [[byte0:%[^ ]+]] = lshr <2 x i32> %input, splat (i32 24) ; CHECK: [[bswap32:%[^ ]+]] = or <2 x i32> [[byte3]], [[byte2]] ; CHECK: [[bswap321:%[^ ]+]] = or <2 x i32> [[bswap32]], [[byte1]] ; CHECK: or <2 x i32> [[bswap321]], [[byte0]] diff --git a/test/LLVMIntrinsics/bswap/bswap_v2i64.ll b/test/LLVMIntrinsics/bswap/bswap_v2i64.ll index 7b1a11deb..861fb94c5 100644 --- a/test/LLVMIntrinsics/bswap/bswap_v2i64.ll +++ b/test/LLVMIntrinsics/bswap/bswap_v2i64.ll @@ -1,20 +1,20 @@ ; RUN: clspv-opt %s -o %t.ll --passes=replace-llvm-intrinsics ; RUN: FileCheck %s < %t.ll -; CHECK: [[byte7:%[^ ]+]] = shl <2 x i64> %input, -; CHECK: [[and:%[^ ]+]] = and <2 x i64> %input, -; CHECK: [[byte6:%[^ ]+]] = shl <2 x i64> [[and]], -; CHECK: [[and:%[^ ]+]] = and <2 x i64> %input, -; CHECK: [[byte5:%[^ ]+]] = shl <2 x i64> [[and]], -; CHECK: [[and:%[^ ]+]] = and <2 x i64> %input, -; CHECK: [[byte4:%[^ ]+]] = shl <2 x i64> [[and]], -; CHECK: [[lshr:%[^ ]+]] = lshr <2 x i64> %input, -; CHECK: [[byte3:%[^ ]+]] = and <2 x i64> [[lshr]], -; CHECK: [[lshr:%[^ ]+]] = lshr <2 x i64> %input, -; CHECK: [[byte2:%[^ ]+]] = and <2 x i64> [[lshr]], -; CHECK: [[lshr:%[^ ]+]] = lshr <2 x i64> %input, -; CHECK: [[byte1:%[^ ]+]] = and <2 x i64> [[lshr]], -; CHECK: [[byte0:%[^ ]+]] = lshr <2 x i64> %input, +; CHECK: [[byte7:%[^ ]+]] = shl <2 x i64> %input, splat (i64 56) +; CHECK: [[and:%[^ ]+]] = and <2 x i64> %input, splat (i64 65280) +; CHECK: [[byte6:%[^ ]+]] = shl <2 x i64> [[and]], splat (i64 40) +; CHECK: [[and:%[^ ]+]] = and <2 x i64> %input, splat (i64 16711680) +; CHECK: [[byte5:%[^ ]+]] = shl <2 x i64> [[and]], splat (i64 24) +; CHECK: [[and:%[^ ]+]] = and <2 x i64> %input, splat (i64 4278190080) +; CHECK: [[byte4:%[^ ]+]] = shl <2 x i64> [[and]], splat (i64 8) +; CHECK: [[lshr:%[^ ]+]] = lshr <2 x i64> %input, splat (i64 8) +; CHECK: [[byte3:%[^ ]+]] = and <2 x i64> [[lshr]], splat (i64 4278190080) +; CHECK: [[lshr:%[^ ]+]] = lshr <2 x i64> %input, splat (i64 24) +; CHECK: [[byte2:%[^ ]+]] = and <2 x i64> [[lshr]], splat (i64 16711680) +; CHECK: [[lshr:%[^ ]+]] = lshr <2 x i64> %input, splat (i64 40) +; CHECK: [[byte1:%[^ ]+]] = and <2 x i64> [[lshr]], splat (i64 65280) +; CHECK: [[byte0:%[^ ]+]] = lshr <2 x i64> %input, splat (i64 56) ; CHECK: [[bswap76:%[^ ]+]] = or <2 x i64> [[byte7]], [[byte6]] ; CHECK: [[bswap765:%[^ ]+]] = or <2 x i64> [[bswap76]], [[byte5]] ; CHECK: [[bswap7654:%[^ ]+]] = or <2 x i64> [[bswap765]], [[byte4]] diff --git a/test/MathBuiltins/cospi/cospi_double2.ll b/test/MathBuiltins/cospi/cospi_double2.ll index 192fd9bc5..7770c21bc 100644 --- a/test/MathBuiltins/cospi/cospi_double2.ll +++ b/test/MathBuiltins/cospi/cospi_double2.ll @@ -12,6 +12,6 @@ entry: declare spir_func <2 x double> @_Z5cospiDv2_d(<2 x double>) -; CHECK: [[mul:%[a-zA-Z0-9_.]+]] = fmul <2 x double> %x, +; CHECK: [[mul:%[a-zA-Z0-9_.]+]] = fmul <2 x double> %x, splat (double 0x400921FB54442D18) ; CHECK: [[cos:%[a-zA-Z0-9_.]+]] = call <2 x double> @llvm.cos.v2f64(<2 x double> [[mul]]) diff --git a/test/MathBuiltins/cospi/cospi_float2.ll b/test/MathBuiltins/cospi/cospi_float2.ll index afd95c209..fd6242aa4 100644 --- a/test/MathBuiltins/cospi/cospi_float2.ll +++ b/test/MathBuiltins/cospi/cospi_float2.ll @@ -12,5 +12,5 @@ entry: declare spir_func <2 x float> @_Z5cospiDv2_f(<2 x float>) -; CHECK: [[mul:%[a-zA-Z0-9_.]+]] = fmul <2 x float> %x, +; CHECK: [[mul:%[a-zA-Z0-9_.]+]] = fmul <2 x float> %x, splat (float 0x400921FB60000000) ; CHECK: [[cos:%[a-zA-Z0-9_.]+]] = call <2 x float> @llvm.cos.v2f32(<2 x float> [[mul]]) diff --git a/test/MathBuiltins/expm1/expm1_double2.ll b/test/MathBuiltins/expm1/expm1_double2.ll index 800c44ce3..2da68a6e2 100644 --- a/test/MathBuiltins/expm1/expm1_double2.ll +++ b/test/MathBuiltins/expm1/expm1_double2.ll @@ -13,7 +13,7 @@ entry: declare spir_func <2 x double> @_Z5expm1Dv2_d(<2 x double> %x) ; CHECK: [[exp:%[a-zA-Z0-9_.]+]] = call <2 x double> @llvm.exp.v2f64(<2 x double> %x) -; CHECK: [[sub:%[a-zA-Z0-9_.]+]] = fsub <2 x double> [[exp]], +; CHECK: [[sub:%[a-zA-Z0-9_.]+]] = fsub <2 x double> [[exp]], splat (double 1.000000e+00) ; CHECK: ret <2 x double> [[sub]] diff --git a/test/MathBuiltins/expm1/expm1_float2.ll b/test/MathBuiltins/expm1/expm1_float2.ll index 13de5a772..f3d3848ac 100644 --- a/test/MathBuiltins/expm1/expm1_float2.ll +++ b/test/MathBuiltins/expm1/expm1_float2.ll @@ -13,6 +13,6 @@ entry: declare spir_func <2 x float> @_Z5expm1Dv2_f(<2 x float> %x) ; CHECK: [[exp:%[a-zA-Z0-9_.]+]] = call <2 x float> @llvm.exp.v2f32(<2 x float> %x) -; CHECK: [[sub:%[a-zA-Z0-9_.]+]] = fsub <2 x float> [[exp]], +; CHECK: [[sub:%[a-zA-Z0-9_.]+]] = fsub <2 x float> [[exp]], splat (float 1.000000e+00) ; CHECK: ret <2 x float> [[sub]] diff --git a/test/MathBuiltins/isfinite/isfinite_double2.ll b/test/MathBuiltins/isfinite/isfinite_double2.ll index 3669b4074..598c7c29a 100644 --- a/test/MathBuiltins/isfinite/isfinite_double2.ll +++ b/test/MathBuiltins/isfinite/isfinite_double2.ll @@ -8,9 +8,9 @@ define spir_kernel void @test(<2 x double> %val, <2 x i32> addrspace(1)* nocaptu entry: %call = tail call spir_func <2 x i32> @_Z8isfiniteDv2_d(<2 x double> %val) ;CHECK: %0 = bitcast <2 x double> %val to <2 x i64> - ;CHECK: %1 = and <2 x i64> , %0 - ;CHECK: %2 = icmp eq <2 x i64> %1, - ;CHECK: %3 = select <2 x i1> %2, <2 x i32> zeroinitializer, <2 x i32> + ;CHECK: %1 = and <2 x i64> splat (i64 9218868437227405312), %0 + ;CHECK: %2 = icmp eq <2 x i64> %1, splat (i64 9218868437227405312) + ;CHECK: %3 = select <2 x i1> %2, <2 x i32> zeroinitializer, <2 x i32> splat (i32 -1) store <2 x i32> %call, <2 x i32> addrspace(1)* %out, align 8 ret void } diff --git a/test/MathBuiltins/isfinite/isfinite_double3.ll b/test/MathBuiltins/isfinite/isfinite_double3.ll index 087f17cfd..4e7fc488a 100644 --- a/test/MathBuiltins/isfinite/isfinite_double3.ll +++ b/test/MathBuiltins/isfinite/isfinite_double3.ll @@ -8,9 +8,9 @@ define spir_kernel void @test(<3 x double> %val, <3 x i32> addrspace(1)* nocaptu entry: %call = tail call spir_func <3 x i32> @_Z8isfiniteDv3_d(<3 x double> %val) ;CHECK: %0 = bitcast <3 x double> %val to <3 x i64> - ;CHECK: %1 = and <3 x i64> , %0 - ;CHECK: %2 = icmp eq <3 x i64> %1, - ;CHECK: %3 = select <3 x i1> %2, <3 x i32> zeroinitializer, <3 x i32> + ;CHECK: %1 = and <3 x i64> splat (i64 9218868437227405312), %0 + ;CHECK: %2 = icmp eq <3 x i64> %1, splat (i64 9218868437227405312) + ;CHECK: %3 = select <3 x i1> %2, <3 x i32> zeroinitializer, <3 x i32> splat (i32 -1) store <3 x i32> %call, <3 x i32> addrspace(1)* %out, align 8 ret void } diff --git a/test/MathBuiltins/isfinite/isfinite_double4.ll b/test/MathBuiltins/isfinite/isfinite_double4.ll index f13648132..d18f8b6a8 100644 --- a/test/MathBuiltins/isfinite/isfinite_double4.ll +++ b/test/MathBuiltins/isfinite/isfinite_double4.ll @@ -8,9 +8,9 @@ define spir_kernel void @test(<4 x double> %val, <4 x i32> addrspace(1)* nocaptu entry: %call = tail call spir_func <4 x i32> @_Z8isfiniteDv4_d(<4 x double> %val) ;CHECK: %0 = bitcast <4 x double> %val to <4 x i64> - ;CHECK: %1 = and <4 x i64> , %0 - ;CHECK: %2 = icmp eq <4 x i64> %1, - ;CHECK: %3 = select <4 x i1> %2, <4 x i32> zeroinitializer, <4 x i32> + ;CHECK: %1 = and <4 x i64> splat (i64 9218868437227405312), %0 + ;CHECK: %2 = icmp eq <4 x i64> %1, splat (i64 9218868437227405312) + ;CHECK: %3 = select <4 x i1> %2, <4 x i32> zeroinitializer, <4 x i32> splat (i32 -1) store <4 x i32> %call, <4 x i32> addrspace(1)* %out, align 8 ret void } diff --git a/test/MathBuiltins/isfinite/isfinite_float2.ll b/test/MathBuiltins/isfinite/isfinite_float2.ll index a026a143b..3cf0a8e3c 100644 --- a/test/MathBuiltins/isfinite/isfinite_float2.ll +++ b/test/MathBuiltins/isfinite/isfinite_float2.ll @@ -8,9 +8,9 @@ define spir_kernel void @test(<2 x float> %val, <2 x i32> addrspace(1)* nocaptur entry: %call = tail call spir_func <2 x i32> @_Z8isfiniteDv2_f(<2 x float> %val) ;CHECK: %0 = bitcast <2 x float> %val to <2 x i32> - ;CHECK: %1 = and <2 x i32> , %0 - ;CHECK: %2 = icmp eq <2 x i32> %1, - ;CHECK: %3 = select <2 x i1> %2, <2 x i32> zeroinitializer, <2 x i32> + ;CHECK: %1 = and <2 x i32> splat (i32 2139095040), %0 + ;CHECK: %2 = icmp eq <2 x i32> %1, splat (i32 2139095040) + ;CHECK: %3 = select <2 x i1> %2, <2 x i32> zeroinitializer, <2 x i32> splat (i32 -1) store <2 x i32> %call, <2 x i32> addrspace(1)* %out, align 8 ret void } diff --git a/test/MathBuiltins/isfinite/isfinite_float3.ll b/test/MathBuiltins/isfinite/isfinite_float3.ll index 392d7b7b8..c90ac681f 100644 --- a/test/MathBuiltins/isfinite/isfinite_float3.ll +++ b/test/MathBuiltins/isfinite/isfinite_float3.ll @@ -8,9 +8,9 @@ define spir_kernel void @test(<3 x float> %val, <3 x i32> addrspace(1)* nocaptur entry: %call = tail call spir_func <3 x i32> @_Z8isfiniteDv3_f(<3 x float> %val) ;CHECK: %0 = bitcast <3 x float> %val to <3 x i32> - ;CHECK: %1 = and <3 x i32> , %0 - ;CHECK: %2 = icmp eq <3 x i32> %1, - ;CHECK: %3 = select <3 x i1> %2, <3 x i32> zeroinitializer, <3 x i32> + ;CHECK: %1 = and <3 x i32> splat (i32 2139095040), %0 + ;CHECK: %2 = icmp eq <3 x i32> %1, splat (i32 2139095040) + ;CHECK: %3 = select <3 x i1> %2, <3 x i32> zeroinitializer, <3 x i32> splat (i32 -1) store <3 x i32> %call, <3 x i32> addrspace(1)* %out, align 8 ret void } diff --git a/test/MathBuiltins/isfinite/isfinite_float4.ll b/test/MathBuiltins/isfinite/isfinite_float4.ll index a9fed083e..9609e035a 100644 --- a/test/MathBuiltins/isfinite/isfinite_float4.ll +++ b/test/MathBuiltins/isfinite/isfinite_float4.ll @@ -8,9 +8,9 @@ define spir_kernel void @test(<4 x float> %val, <4 x i32> addrspace(1)* nocaptur entry: %call = tail call spir_func <4 x i32> @_Z8isfiniteDv4_f(<4 x float> %val) ;CHECK: %0 = bitcast <4 x float> %val to <4 x i32> - ;CHECK: %1 = and <4 x i32> , %0 - ;CHECK: %2 = icmp eq <4 x i32> %1, - ;CHECK: %3 = select <4 x i1> %2, <4 x i32> zeroinitializer, <4 x i32> + ;CHECK: %1 = and <4 x i32> splat (i32 2139095040), %0 + ;CHECK: %2 = icmp eq <4 x i32> %1, splat (i32 2139095040) + ;CHECK: %3 = select <4 x i1> %2, <4 x i32> zeroinitializer, <4 x i32> splat (i32 -1) store <4 x i32> %call, <4 x i32> addrspace(1)* %out, align 8 ret void } diff --git a/test/MathBuiltins/isfinite/isfinite_half2.ll b/test/MathBuiltins/isfinite/isfinite_half2.ll index 8f4c105a1..e0d771215 100644 --- a/test/MathBuiltins/isfinite/isfinite_half2.ll +++ b/test/MathBuiltins/isfinite/isfinite_half2.ll @@ -8,9 +8,9 @@ define spir_kernel void @test(<2 x half> %val, <2 x i32> addrspace(1)* nocapture entry: %call = tail call spir_func <2 x i32> @_Z8isfiniteDv2_h(<2 x half> %val) ;CHECK: %0 = bitcast <2 x half> %val to <2 x i16> - ;CHECK: %1 = and <2 x i16> , %0 - ;CHECK: %2 = icmp eq <2 x i16> %1, - ;CHECK: %3 = select <2 x i1> %2, <2 x i32> zeroinitializer, <2 x i32> + ;CHECK: %1 = and <2 x i16> splat (i16 31744), %0 + ;CHECK: %2 = icmp eq <2 x i16> %1, splat (i16 31744) + ;CHECK: %3 = select <2 x i1> %2, <2 x i32> zeroinitializer, <2 x i32> splat (i32 -1) store <2 x i32> %call, <2 x i32> addrspace(1)* %out, align 8 ret void } diff --git a/test/MathBuiltins/isfinite/isfinite_half3.ll b/test/MathBuiltins/isfinite/isfinite_half3.ll index be4a7dbe1..03087acfa 100644 --- a/test/MathBuiltins/isfinite/isfinite_half3.ll +++ b/test/MathBuiltins/isfinite/isfinite_half3.ll @@ -8,9 +8,9 @@ define spir_kernel void @test(<3 x half> %val, <3 x i32> addrspace(1)* nocapture entry: %call = tail call spir_func <3 x i32> @_Z8isfiniteDv3_h(<3 x half> %val) ;CHECK: %0 = bitcast <3 x half> %val to <3 x i16> - ;CHECK: %1 = and <3 x i16> , %0 - ;CHECK: %2 = icmp eq <3 x i16> %1, - ;CHECK: %3 = select <3 x i1> %2, <3 x i32> zeroinitializer, <3 x i32> + ;CHECK: %1 = and <3 x i16> splat (i16 31744), %0 + ;CHECK: %2 = icmp eq <3 x i16> %1, splat (i16 31744) + ;CHECK: %3 = select <3 x i1> %2, <3 x i32> zeroinitializer, <3 x i32> splat (i32 -1) store <3 x i32> %call, <3 x i32> addrspace(1)* %out, align 8 ret void } diff --git a/test/MathBuiltins/isfinite/isfinite_half4.ll b/test/MathBuiltins/isfinite/isfinite_half4.ll index 7a0a04850..907429f4a 100644 --- a/test/MathBuiltins/isfinite/isfinite_half4.ll +++ b/test/MathBuiltins/isfinite/isfinite_half4.ll @@ -8,9 +8,9 @@ define spir_kernel void @test(<4 x half> %val, <4 x i32> addrspace(1)* nocapture entry: %call = tail call spir_func <4 x i32> @_Z8isfiniteDv4_h(<4 x half> %val) ;CHECK: %0 = bitcast <4 x half> %val to <4 x i16> - ;CHECK: %1 = and <4 x i16> , %0 - ;CHECK: %2 = icmp eq <4 x i16> %1, - ;CHECK: %3 = select <4 x i1> %2, <4 x i32> zeroinitializer, <4 x i32> + ;CHECK: %1 = and <4 x i16> splat (i16 31744), %0 + ;CHECK: %2 = icmp eq <4 x i16> %1, splat (i16 31744) + ;CHECK: %3 = select <4 x i1> %2, <4 x i32> zeroinitializer, <4 x i32> splat (i32 -1) store <4 x i32> %call, <4 x i32> addrspace(1)* %out, align 8 ret void } diff --git a/test/MathBuiltins/log/float2_log1p.ll b/test/MathBuiltins/log/float2_log1p.ll index c235e51f1..be3eea323 100644 --- a/test/MathBuiltins/log/float2_log1p.ll +++ b/test/MathBuiltins/log/float2_log1p.ll @@ -7,7 +7,7 @@ target triple = "spir64-unknown-unknown" define spir_kernel void @test(<2 x float> %val, <2 x float> addrspace(1)* nocapture %out) { entry: %call = tail call spir_func <2 x float> @_Z5log1pDv2_f(<2 x float> %val) - ; CHECK: %0 = fadd <2 x float> , %val + ; CHECK: %0 = fadd <2 x float> splat (float 1.000000e+00) ; CHECK: %1 = call <2 x float> @llvm.log.v2f32(<2 x float> %0) store <2 x float> %call, <2 x float> addrspace(1)* %out, align 8 ret void diff --git a/test/MathBuiltins/log/float3_log1p.ll b/test/MathBuiltins/log/float3_log1p.ll index c4c94d624..bb91838a6 100644 --- a/test/MathBuiltins/log/float3_log1p.ll +++ b/test/MathBuiltins/log/float3_log1p.ll @@ -7,7 +7,7 @@ target triple = "spir64-unknown-unknown" define spir_kernel void @test(<3 x float> %val, <3 x float> addrspace(1)* nocapture %out) { entry: %call = tail call spir_func <3 x float> @_Z5log1pDv3_f(<3 x float> %val) - ; CHECK: %0 = fadd <3 x float> , %val + ; CHECK: %0 = fadd <3 x float> splat (float 1.000000e+00) ; CHECK: %1 = call <3 x float> @llvm.log.v3f32(<3 x float> %0) store <3 x float> %call, <3 x float> addrspace(1)* %out, align 16 ret void diff --git a/test/MathBuiltins/log/float4_log1p.ll b/test/MathBuiltins/log/float4_log1p.ll index 9b77469fb..01dfaf486 100644 --- a/test/MathBuiltins/log/float4_log1p.ll +++ b/test/MathBuiltins/log/float4_log1p.ll @@ -7,7 +7,7 @@ target triple = "spir64-unknown-unknown" define spir_kernel void @test(<4 x float> %val, <4 x float> addrspace(1)* nocapture %out) { entry: %call = tail call spir_func <4 x float> @_Z5log1pDv4_f(<4 x float> %val) - ; CHECK: %0 = fadd <4 x float> , %val + ; CHECK: %0 = fadd <4 x float> splat (float 1.000000e+00) ; CHECK: %1 = call <4 x float> @llvm.log.v4f32(<4 x float> %0) store <4 x float> %call, <4 x float> addrspace(1)* %out, align 16 ret void diff --git a/test/MathBuiltins/sinpi/sinpi_double2.ll b/test/MathBuiltins/sinpi/sinpi_double2.ll index 3802ad58f..daac36b9f 100644 --- a/test/MathBuiltins/sinpi/sinpi_double2.ll +++ b/test/MathBuiltins/sinpi/sinpi_double2.ll @@ -12,7 +12,7 @@ entry: declare spir_func <2 x double> @_Z5sinpiDv2_d(<2 x double>) -; CHECK: [[mul:%[a-zA-Z0-9_.]+]] = fmul <2 x double> %x, +; CHECK: [[mul:%[a-zA-Z0-9_.]+]] = fmul <2 x double> %x, splat (double 0x400921FB54442D18) ; CHECK: [[sin:%[a-zA-Z0-9_.]+]] = call <2 x double> @llvm.sin.v2f64(<2 x double> [[mul]]) diff --git a/test/MathBuiltins/sinpi/sinpi_float2.ll b/test/MathBuiltins/sinpi/sinpi_float2.ll index 328374a5c..d20810ce7 100644 --- a/test/MathBuiltins/sinpi/sinpi_float2.ll +++ b/test/MathBuiltins/sinpi/sinpi_float2.ll @@ -12,6 +12,6 @@ entry: declare spir_func <2 x float> @_Z5sinpiDv2_f(<2 x float>) -; CHECK: [[mul:%[a-zA-Z0-9_.]+]] = fmul <2 x float> %x, +; CHECK: [[mul:%[a-zA-Z0-9_.]+]] = fmul <2 x float> %x, splat (float 0x400921FB60000000) ; CHECK: [[sin:%[a-zA-Z0-9_.]+]] = call <2 x float> @llvm.sin.v2f32(<2 x float> [[mul]]) diff --git a/test/MathBuiltins/tanpi/tanpi_double2.ll b/test/MathBuiltins/tanpi/tanpi_double2.ll index ecfab628e..e406b0970 100644 --- a/test/MathBuiltins/tanpi/tanpi_double2.ll +++ b/test/MathBuiltins/tanpi/tanpi_double2.ll @@ -12,7 +12,7 @@ entry: declare spir_func <2 x double> @_Z5tanpiDv2_d(<2 x double>) -; CHECK: [[mul:%[a-zA-Z0-9_.]+]] = fmul <2 x double> %x, +; CHECK: [[mul:%[a-zA-Z0-9_.]+]] = fmul <2 x double> %x, splat (double 0x400921FB54442D18) ; CHECK: [[sin:%[a-zA-Z0-9_.]+]] = call <2 x double> @llvm.sin.v2f64(<2 x double> [[mul]]) ; CHECK: [[cos:%[a-zA-Z0-9_.]+]] = call <2 x double> @llvm.cos.v2f64(<2 x double> [[mul]]) ; CHECK: [[div:%[a-zA-Z0-9_.]+]] = fdiv <2 x double> [[sin]], [[cos]] diff --git a/test/MathBuiltins/tanpi/tanpi_float2.ll b/test/MathBuiltins/tanpi/tanpi_float2.ll index 752cefd51..e4cf193fb 100644 --- a/test/MathBuiltins/tanpi/tanpi_float2.ll +++ b/test/MathBuiltins/tanpi/tanpi_float2.ll @@ -12,7 +12,7 @@ entry: declare spir_func <2 x float> @_Z5tanpiDv2_f(<2 x float>) -; CHECK: [[mul:%[a-zA-Z0-9_.]+]] = fmul <2 x float> %x, +; CHECK: [[mul:%[a-zA-Z0-9_.]+]] = fmul <2 x float> %x, splat (float 0x400921FB60000000) ; CHECK: [[sin:%[a-zA-Z0-9_.]+]] = call <2 x float> @llvm.sin.v2f32(<2 x float> [[mul]]) ; CHECK: [[cos:%[a-zA-Z0-9_.]+]] = call <2 x float> @llvm.cos.v2f32(<2 x float> [[mul]]) ; CHECK: [[div:%[a-zA-Z0-9_.]+]] = fdiv <2 x float> [[sin]], [[cos]] diff --git a/test/PointerCasts/issue-1166.ll b/test/PointerCasts/issue-1166.ll index 6fe545041..559353b1e 100644 --- a/test/PointerCasts/issue-1166.ll +++ b/test/PointerCasts/issue-1166.ll @@ -2,9 +2,9 @@ ; RUN: FileCheck %s < %t.ll ; CHECK: [[gep:%[^ ]+]] = getelementptr i32, ptr addrspace(1) %s, i32 0 -; CHECK: store i32 extractelement (<2 x i32> bitcast (<1 x i64> to <2 x i32>), i64 0), ptr addrspace(1) [[gep]], align 4 +; CHECK: store i32 extractelement (<2 x i32> bitcast (<1 x i64> splat (i64 8000000000) to <2 x i32>), i64 0), ptr addrspace(1) [[gep]], align 4 ; CHECK: [[gep:%[^ ]+]] = getelementptr i32, ptr addrspace(1) %s, i32 1 -; CHECK: store i32 extractelement (<2 x i32> bitcast (<1 x i64> to <2 x i32>), i64 1), ptr addrspace(1) [[gep]], align 4 +; CHECK: store i32 extractelement (<2 x i32> bitcast (<1 x i64> splat (i64 8000000000) to <2 x i32>), i64 1), ptr addrspace(1) [[gep]], align 4 ; CHECK: [[gep:%[^ ]+]] = getelementptr i32, ptr addrspace(1) %s, i32 2 ; CHECK: store i32 77, ptr addrspace(1) [[gep]], align 4 ; CHECK: [[gep:%[^ ]+]] = getelementptr i32, ptr addrspace(1) %s, i32 3 diff --git a/test/RelationalBuiltins/isinf_overloads.ll b/test/RelationalBuiltins/isinf_overloads.ll index 3b94b75ce..066340fa5 100644 --- a/test/RelationalBuiltins/isinf_overloads.ll +++ b/test/RelationalBuiltins/isinf_overloads.ll @@ -8,9 +8,9 @@ target triple = "spir-unknown-unknown" define spir_func void @test() { entry: %call = tail call spir_func i32 @_Z5isinff(float 0x40035C2900000000) #3 - %call1 = tail call spir_func <2 x i32> @_Z5isinfDv2_f(<2 x float> ) #3 - %call2 = tail call spir_func <3 x i32> @_Z5isinfDv3_f(<3 x float> ) #3 - %call3 = tail call spir_func <4 x i32> @_Z5isinfDv4_f(<4 x float> ) #3 + %call1 = tail call spir_func <2 x i32> @_Z5isinfDv2_f(<2 x float> splat (float 0x40035C2900000000)) #3 + %call2 = tail call spir_func <3 x i32> @_Z5isinfDv3_f(<3 x float> splat (float 0x40035C2900000000)) #3 + %call3 = tail call spir_func <4 x i32> @_Z5isinfDv4_f(<4 x float> splat (float 0x40035C2900000000)) #3 ret void } @@ -29,6 +29,6 @@ declare spir_func <3 x i32> @_Z5isinfDv3_f(<3 x float>) local_unnamed_addr #2 declare spir_func <4 x i32> @_Z5isinfDv4_f(<4 x float>) local_unnamed_addr #2 ; CHECK: call i1 @_Z8spirv.op.157.f(i32 157, float 0x40035C2900000000) -; CHECK: call <2 x i1> @_Z8spirv.op.157.Dv2_f(i32 157, <2 x float> ) -; CHECK: call <3 x i1> @_Z8spirv.op.157.Dv3_f(i32 157, <3 x float> ) -; CHECK: call <4 x i1> @_Z8spirv.op.157.Dv4_f(i32 157, <4 x float> ) +; CHECK: call <2 x i1> @_Z8spirv.op.157.Dv2_f(i32 157, <2 x float> splat (float 0x40035C2900000000)) +; CHECK: call <3 x i1> @_Z8spirv.op.157.Dv3_f(i32 157, <3 x float> splat (float 0x40035C2900000000)) +; CHECK: call <4 x i1> @_Z8spirv.op.157.Dv4_f(i32 157, <4 x float> splat (float 0x40035C2900000000)) diff --git a/test/RelationalBuiltins/isnan_overloads.ll b/test/RelationalBuiltins/isnan_overloads.ll index 5d8747917..edeabb0b8 100644 --- a/test/RelationalBuiltins/isnan_overloads.ll +++ b/test/RelationalBuiltins/isnan_overloads.ll @@ -8,9 +8,9 @@ target triple = "spir-unknown-unknown" define spir_func void @test() { entry: %call = tail call spir_func i32 @_Z5isnanf(float 0x40035C2900000000) #3 - %call1 = tail call spir_func <2 x i32> @_Z5isnanDv2_f(<2 x float> ) #3 - %call2 = tail call spir_func <3 x i32> @_Z5isnanDv3_f(<3 x float> ) #3 - %call3 = tail call spir_func <4 x i32> @_Z5isnanDv4_f(<4 x float> ) #3 + %call1 = tail call spir_func <2 x i32> @_Z5isnanDv2_f(<2 x float> splat (float 0x40035C2900000000)) #3 + %call2 = tail call spir_func <3 x i32> @_Z5isnanDv3_f(<3 x float> splat (float 0x40035C2900000000)) #3 + %call3 = tail call spir_func <4 x i32> @_Z5isnanDv4_f(<4 x float> splat (float 0x40035C2900000000)) #3 ret void } @@ -29,6 +29,6 @@ declare spir_func <3 x i32> @_Z5isnanDv3_f(<3 x float>) local_unnamed_addr #2 declare spir_func <4 x i32> @_Z5isnanDv4_f(<4 x float>) local_unnamed_addr #2 ; CHECK: call i1 @_Z8spirv.op.156.f(i32 156, float 0x40035C2900000000) -; CHECK: call <2 x i1> @_Z8spirv.op.156.Dv2_f(i32 156, <2 x float> ) -; CHECK: call <3 x i1> @_Z8spirv.op.156.Dv3_f(i32 156, <3 x float> ) -; CHECK: call <4 x i1> @_Z8spirv.op.156.Dv4_f(i32 156, <4 x float> ) +; CHECK: call <2 x i1> @_Z8spirv.op.156.Dv2_f(i32 156, <2 x float> splat (float 0x40035C2900000000)) +; CHECK: call <3 x i1> @_Z8spirv.op.156.Dv3_f(i32 156, <3 x float> splat (float 0x40035C2900000000)) +; CHECK: call <4 x i1> @_Z8spirv.op.156.Dv4_f(i32 156, <4 x float> splat (float 0x40035C2900000000)) diff --git a/test/RelationalBuiltins/isnormal/isnormal_double2.ll b/test/RelationalBuiltins/isnormal/isnormal_double2.ll index 3ec517535..34a47cbc3 100644 --- a/test/RelationalBuiltins/isnormal/isnormal_double2.ll +++ b/test/RelationalBuiltins/isnormal/isnormal_double2.ll @@ -13,9 +13,9 @@ entry: declare spir_func <2 x i64> @_Z8isnormalDv2_d(<2 x double>) ; CHECK: [[cast:%[a-zA-Z0-9_.]+]] = bitcast <2 x double> %x to <2 x i64> -; CHECK: [[abs:%[a-zA-Z0-9_.]+]] = and <2 x i64> [[cast]], -; CHECK: [[lt:%[a-zA-Z0-9_.]+]] = icmp ult <2 x i64> [[abs]], -; CHECK: [[ge:%[a-zA-Z0-9_.]+]] = icmp uge <2 x i64> [[abs]], +; CHECK: [[abs:%[a-zA-Z0-9_.]+]] = and <2 x i64> [[cast]], splat (i64 9223372036854775807) +; CHECK: [[lt:%[a-zA-Z0-9_.]+]] = icmp ult <2 x i64> [[abs]], splat (i64 9218868437227405312) +; CHECK: [[ge:%[a-zA-Z0-9_.]+]] = icmp uge <2 x i64> [[abs]], splat (i64 4503599627370496) ; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <2 x i1> [[lt]], [[ge]] ; CHECK: [[zext:%[a-zA-Z0-9_]+]] = sext <2 x i1> [[and]] to <2 x i64> ; CHECK: ret <2 x i64> [[zext]] diff --git a/test/RelationalBuiltins/isnormal/isnormal_float2.ll b/test/RelationalBuiltins/isnormal/isnormal_float2.ll index 12a9a7ff9..f56d8ade2 100644 --- a/test/RelationalBuiltins/isnormal/isnormal_float2.ll +++ b/test/RelationalBuiltins/isnormal/isnormal_float2.ll @@ -13,9 +13,9 @@ entry: declare spir_func <2 x i32> @_Z8isnormalDv2_f(<2 x float>) ; CHECK: [[cast:%[a-zA-Z0-9_.]+]] = bitcast <2 x float> %x to <2 x i32> -; CHECK: [[abs:%[a-zA-Z0-9_.]+]] = and <2 x i32> [[cast]], -; CHECK: [[lt:%[a-zA-Z0-9_.]+]] = icmp ult <2 x i32> [[abs]], -; CHECK: [[ge:%[a-zA-Z0-9_.]+]] = icmp uge <2 x i32> [[abs]], +; CHECK: [[abs:%[a-zA-Z0-9_.]+]] = and <2 x i32> [[cast]], splat (i32 2147483647) +; CHECK: [[lt:%[a-zA-Z0-9_.]+]] = icmp ult <2 x i32> [[abs]], splat (i32 2139095040) +; CHECK: [[ge:%[a-zA-Z0-9_.]+]] = icmp uge <2 x i32> [[abs]], splat (i32 8388608) ; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <2 x i1> [[lt]], [[ge]] ; CHECK: [[zext:%[a-zA-Z0-9_]+]] = sext <2 x i1> [[and]] to <2 x i32> ; CHECK: ret <2 x i32> [[zext]] diff --git a/test/RelationalBuiltins/isnormal/isnormal_half2.ll b/test/RelationalBuiltins/isnormal/isnormal_half2.ll index bba14c6a2..6c595aa03 100644 --- a/test/RelationalBuiltins/isnormal/isnormal_half2.ll +++ b/test/RelationalBuiltins/isnormal/isnormal_half2.ll @@ -13,9 +13,9 @@ entry: declare spir_func <2 x i16> @_Z8isnormalDv2_Dh(<2 x half>) ; CHECK: [[cast:%[a-zA-Z0-9_.]+]] = bitcast <2 x half> %x to <2 x i16> -; CHECK: [[abs:%[a-zA-Z0-9_.]+]] = and <2 x i16> [[cast]], -; CHECK: [[lt:%[a-zA-Z0-9_.]+]] = icmp ult <2 x i16> [[abs]], -; CHECK: [[ge:%[a-zA-Z0-9_.]+]] = icmp uge <2 x i16> [[abs]], +; CHECK: [[abs:%[a-zA-Z0-9_.]+]] = and <2 x i16> [[cast]], splat (i16 32767) +; CHECK: [[lt:%[a-zA-Z0-9_.]+]] = icmp ult <2 x i16> [[abs]], splat (i16 31744) +; CHECK: [[ge:%[a-zA-Z0-9_.]+]] = icmp uge <2 x i16> [[abs]], splat (i16 1024) ; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <2 x i1> [[lt]], [[ge]] ; CHECK: [[zext:%[a-zA-Z0-9_]+]] = sext <2 x i1> [[and]] to <2 x i16> ; CHECK: ret <2 x i16> [[zext]] diff --git a/test/extract_constant.ll b/test/extract_constant.ll index afa336a3e..306ad2cd1 100644 --- a/test/extract_constant.ll +++ b/test/extract_constant.ll @@ -6,20 +6,20 @@ ; CHECK: [[ARRAY_ALLOC:[a-zA-Z0-9_]*]] = alloca [8 x i8], align 8 ; CHECK: %[[GET_ELE_PTR:[a-zA-Z0-9_]*]] = getelementptr [8 x i8], ptr %{{.*}}.[[ARRAY_ALLOC]], i32 0 -; CHECK: %[[BITCAST1:[a-zA-Z0-9_]*]] = bitcast <1 x i64> to <4 x i16> +; CHECK: %[[BITCAST1:[a-zA-Z0-9_]*]] = bitcast <1 x i64> splat (i64 369832251558649162) to <4 x i16> ; CHECK: %[[EXTRACT_ELE1:[a-zA-Z0-9_]*]] = extractelement <4 x i16> %[[BITCAST1]], i32 0 ; CHECK: %[[INSERT_ELE1:[a-zA-Z0-9_]*]] = insertelement <2 x i16> {{.*}}, i16 %[[EXTRACT_ELE1]], i64 0 -; CHECK: %[[BITCAST2:[a-zA-Z0-9_]*]] = bitcast <1 x i64> to <4 x i16> +; CHECK: %[[BITCAST2:[a-zA-Z0-9_]*]] = bitcast <1 x i64> splat (i64 369832251558649162) to <4 x i16> ; CHECK: %[[EXTRACT_ELE2:[a-zA-Z0-9_]*]] = extractelement <4 x i16> %[[BITCAST2]], i32 1 ; CHECK: %[[INSERT_ELE2:[a-zA-Z0-9_]*]] = insertelement <2 x i16> %[[INSERT_ELE1]], i16 %[[EXTRACT_ELE2]], i64 1 ; CHECK: %[[BITCAST3:[a-zA-Z0-9_]*]] = bitcast <2 x i16> %[[INSERT_ELE2]] to <4 x i8> ; CHECK: %[[ELEMENT1:[a-zA-Z0-9_]*]] = extractelement <4 x i8> %[[BITCAST3]], i64 0 ; CHECK: %[[INSERT_VALUE1:[a-zA-Z0-9_]*]] = insertvalue [8 x i8] {{.*}}, i8 %[[ELEMENT1]] -; CHECK: %[[BITCAST4:[a-zA-Z0-9_]*]] = bitcast <1 x i64> to <4 x i16> +; CHECK: %[[BITCAST4:[a-zA-Z0-9_]*]] = bitcast <1 x i64> splat (i64 369832251558649162) to <4 x i16> ; CHECK: %[[EXTRACT_ELE3:[a-zA-Z0-9_]*]] = extractelement <4 x i16> %[[BITCAST4]], i32 0 ; CHECK: %[[INSERT_ELE3:[a-zA-Z0-9_]*]] = insertelement <2 x i16> {{.*}}, i16 %[[EXTRACT_ELE3]], i64 0 -; CHECK: %[[BITCAST5:[a-zA-Z0-9_]*]] = bitcast <1 x i64> to <4 x i16> +; CHECK: %[[BITCAST5:[a-zA-Z0-9_]*]] = bitcast <1 x i64> splat (i64 369832251558649162) to <4 x i16> ; CHECK: %[[EXTRACT_ELE4:[a-zA-Z0-9_]*]] = extractelement <4 x i16> %[[BITCAST5]], i32 1 ; CHECK: %[[INSERT_ELE4:[a-zA-Z0-9_]*]] = insertelement <2 x i16> %[[INSERT_ELE3]], i16 %[[EXTRACT_ELE4]], i64 1 ; CHECK: %[[BITCAST6:[a-zA-Z0-9_]*]] = bitcast <2 x i16> %[[INSERT_ELE4]] to <4 x i8> diff --git a/test/hack_scf/const_vec2.ll b/test/hack_scf/const_vec2.ll index 816a25d15..92de4514b 100644 --- a/test/hack_scf/const_vec2.ll +++ b/test/hack_scf/const_vec2.ll @@ -6,25 +6,25 @@ target triple = "spir-unknown-unknown" define spir_kernel void @foo(<2 x i32> %x) { entry: - ; CHECK: [[sub:%[a-zA-Z0-9_]+]] = sub <2 x i32> %x, - ; CHECK: [[sub2:%[a-zA-Z0-9_]+]] = sub <2 x i32> [[sub]], - ; CHECK: [[and:%[a-zA-Z0-9_]+]] = and <2 x i32> [[sub2]], + ; CHECK: [[sub:%[a-zA-Z0-9_]+]] = sub <2 x i32> %x, splat (i32 4) + ; CHECK: [[sub2:%[a-zA-Z0-9_]+]] = sub <2 x i32> [[sub]], splat (i32 1) + ; CHECK: [[and:%[a-zA-Z0-9_]+]] = and <2 x i32> [[sub2]], splat (i32 -2147483648) ; CHECK: icmp eq <2 x i32> [[and]], zeroinitializer %sgt = icmp sgt <2 x i32> %x, - ; CHECK: [[sub:%[a-zA-Z0-9_]+]] = sub <2 x i32> %x, - ; CHECK: [[and:%[a-zA-Z0-9_]+]] = and <2 x i32> [[sub]], + ; CHECK: [[sub:%[a-zA-Z0-9_]+]] = sub <2 x i32> %x, splat (i32 6) + ; CHECK: [[and:%[a-zA-Z0-9_]+]] = and <2 x i32> [[sub]], splat (i32 -2147483648) ; CHECK: icmp eq <2 x i32> [[and]], zeroinitializer %sge = icmp sge <2 x i32> %x, - ; CHECK: [[sub:%[a-zA-Z0-9_]+]] = sub <2 x i32> , %x - ; CHECK: [[sub2:%[a-zA-Z0-9_]+]] = sub <2 x i32> [[sub]], - ; CHECK: [[and:%[a-zA-Z0-9_]+]] = and <2 x i32> [[sub2]], + ; CHECK: [[sub:%[a-zA-Z0-9_]+]] = sub <2 x i32> splat (i32 8) + ; CHECK: [[sub2:%[a-zA-Z0-9_]+]] = sub <2 x i32> [[sub]], splat (i32 1) + ; CHECK: [[and:%[a-zA-Z0-9_]+]] = and <2 x i32> [[sub2]], splat (i32 -2147483648) ; CHECK: icmp eq <2 x i32> [[and]], zeroinitializer %slt = icmp slt <2 x i32> %x, - ; CHECK: [[sub:%[a-zA-Z0-9_]+]] = sub <2 x i32> , %x - ; CHECK: [[and:%[a-zA-Z0-9_]+]] = and <2 x i32> [[sub]], + ; CHECK: [[sub:%[a-zA-Z0-9_]+]] = sub <2 x i32> splat (i32 10), %x + ; CHECK: [[and:%[a-zA-Z0-9_]+]] = and <2 x i32> [[sub]], splat (i32 -2147483648) ; CHECK: icmp eq <2 x i32> [[and]], zeroinitializer %sle = icmp sle <2 x i32> %x, diff --git a/test/hack_scf/greater_than_const_vec4.ll b/test/hack_scf/greater_than_const_vec4.ll index f4e249ca3..b2b97c033 100644 --- a/test/hack_scf/greater_than_const_vec4.ll +++ b/test/hack_scf/greater_than_const_vec4.ll @@ -11,8 +11,8 @@ entry: } ; CHECK: [[sub1:%[a-zA-Z0-9_.]+]] = sub <4 x i32> %x, -; CHECK: [[sub2:%[a-zA-Z0-9_.]+]] = sub <4 x i32> [[sub1]], -; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <4 x i32> [[sub2]], +; CHECK: [[sub2:%[a-zA-Z0-9_.]+]] = sub <4 x i32> [[sub1]], splat (i32 1) +; CHECK: [[and:%[a-zA-Z0-9_.]+]] = and <4 x i32> [[sub2]], splat (i32 -2147483648) ; CHECK: [[cmp:%[a-zA-Z0-9_.]+]] = icmp eq <4 x i32> [[and]], zeroinitializer ; CHECK: ret <4 x i1> [[cmp]] diff --git a/test/hack_scf/llvm_smax.ll b/test/hack_scf/llvm_smax.ll index b79f1f7ca..289ea40e2 100644 --- a/test/hack_scf/llvm_smax.ll +++ b/test/hack_scf/llvm_smax.ll @@ -22,8 +22,8 @@ declare i32 @llvm.smax.i32(i32, i32) ; CHECK-LABEL: smax3 ; CHECK: [[b_m_a:%[0-9]+]] = sub <3 x i32> %b, %a -; CHECK: [[m_1:%[0-9]+]] = sub <3 x i32> [[b_m_a]], -; CHECK: [[and:%[0-9]+]] = and <3 x i32> [[m_1]], +; CHECK: [[m_1:%[0-9]+]] = sub <3 x i32> [[b_m_a]], splat (i32 1) +; CHECK: [[and:%[0-9]+]] = and <3 x i32> [[m_1]], splat (i32 -2147483648) ; CHECK: [[cmp:%[0-9]+]] = icmp eq <3 x i32> [[and]], zeroinitializer ; CHECK: [[sel:%[0-9]+]] = select <3 x i1> [[cmp]], <3 x i32> %b, <3 x i32> %a ; CHECK: ret <3 x i32> [[sel]] diff --git a/test/hack_scf/llvm_smin.ll b/test/hack_scf/llvm_smin.ll index 26298c7f6..ba0faf1b1 100644 --- a/test/hack_scf/llvm_smin.ll +++ b/test/hack_scf/llvm_smin.ll @@ -22,8 +22,8 @@ declare i32 @llvm.smin.i32(i32, i32) ; CHECK-LABEL: smin2 ; CHECK: [[a_m_b:%[0-9]+]] = sub <2 x i32> %a, %b -; CHECK: [[m_1:%[0-9]+]] = sub <2 x i32> [[a_m_b]], -; CHECK: [[and:%[0-9]+]] = and <2 x i32> [[m_1]], +; CHECK: [[m_1:%[0-9]+]] = sub <2 x i32> [[a_m_b]], splat (i32 1) +; CHECK: [[and:%[0-9]+]] = and <2 x i32> [[m_1]], splat (i32 -2147483648) ; CHECK: [[cmp:%[0-9]+]] = icmp eq <2 x i32> [[and]], zeroinitializer ; CHECK: [[sel:%[0-9]+]] = select <2 x i1> [[cmp]], <2 x i32> %b, <2 x i32> %a ; CHECK: ret <2 x i32> [[sel]] diff --git a/test/hack_scf/sclamp.ll b/test/hack_scf/sclamp.ll index 2316ee37d..25c59c852 100644 --- a/test/hack_scf/sclamp.ll +++ b/test/hack_scf/sclamp.ll @@ -27,13 +27,13 @@ declare spir_func i32 @_Z5clampiii(i32, i32, i32) ; CHECK-LABEL: sclamp4 ; CHECK: [[b_m_a:%[0-9]+]] = sub <4 x i32> %b, %a -; CHECK: [[m_1:%[0-9]+]] = sub <4 x i32> [[b_m_a]], -; CHECK: [[and:%[0-9]+]] = and <4 x i32> [[m_1]], +; CHECK: [[m_1:%[0-9]+]] = sub <4 x i32> [[b_m_a]], splat (i32 1) +; CHECK: [[and:%[0-9]+]] = and <4 x i32> [[m_1]], splat (i32 -2147483648) ; CHECK: [[cmp:%[0-9]+]] = icmp eq <4 x i32> [[and]], zeroinitializer ; CHECK: [[sel:%[0-9]+]] = select <4 x i1> [[cmp]], <4 x i32> %b, <4 x i32> %a ; CHECK: [[a_m_c:%[0-9]+]] = sub <4 x i32> %a, %c -; CHECK: [[m_1:%[0-9]+]] = sub <4 x i32> [[a_m_c]], -; CHECK: [[and:%[0-9]+]] = and <4 x i32> [[m_1]], +; CHECK: [[m_1:%[0-9]+]] = sub <4 x i32> [[a_m_c]], splat (i32 1) +; CHECK: [[and:%[0-9]+]] = and <4 x i32> [[m_1]], splat (i32 -2147483648) ; CHECK: [[cmp:%[0-9]+]] = icmp eq <4 x i32> [[and]], zeroinitializer ; CHECK: [[sel2:%[0-9]+]] = select <4 x i1> [[cmp]], <4 x i32> %c, <4 x i32> [[sel]] ; CHECK: ret <4 x i32> [[sel2]] diff --git a/test/hack_scf/smax.ll b/test/hack_scf/smax.ll index 70987b5a9..9292660fc 100644 --- a/test/hack_scf/smax.ll +++ b/test/hack_scf/smax.ll @@ -22,8 +22,8 @@ declare spir_func i32 @_Z3maxii(i32, i32) ; CHECK-LABEL: smax3 ; CHECK: [[b_m_a:%[0-9]+]] = sub <3 x i32> %b, %a -; CHECK: [[m_1:%[0-9]+]] = sub <3 x i32> [[b_m_a]], -; CHECK: [[and:%[0-9]+]] = and <3 x i32> [[m_1]], +; CHECK: [[m_1:%[0-9]+]] = sub <3 x i32> [[b_m_a]], splat (i32 1) +; CHECK: [[and:%[0-9]+]] = and <3 x i32> [[m_1]], splat (i32 -2147483648) ; CHECK: [[cmp:%[0-9]+]] = icmp eq <3 x i32> [[and]], zeroinitializer ; CHECK: [[sel:%[0-9]+]] = select <3 x i1> [[cmp]], <3 x i32> %b, <3 x i32> %a ; CHECK: ret <3 x i32> [[sel]] diff --git a/test/hack_scf/smin.ll b/test/hack_scf/smin.ll index ed64b347b..26761500f 100644 --- a/test/hack_scf/smin.ll +++ b/test/hack_scf/smin.ll @@ -22,8 +22,8 @@ declare spir_func i32 @_Z3minii(i32, i32) ; CHECK-LABEL: smin2 ; CHECK: [[a_m_b:%[0-9]+]] = sub <2 x i32> %a, %b -; CHECK: [[m_1:%[0-9]+]] = sub <2 x i32> [[a_m_b]], -; CHECK: [[and:%[0-9]+]] = and <2 x i32> [[m_1]], +; CHECK: [[m_1:%[0-9]+]] = sub <2 x i32> [[a_m_b]], splat (i32 1) +; CHECK: [[and:%[0-9]+]] = and <2 x i32> [[m_1]], splat (i32 -2147483648) ; CHECK: [[cmp:%[0-9]+]] = icmp eq <2 x i32> [[and]], zeroinitializer ; CHECK: [[sel:%[0-9]+]] = select <2 x i1> [[cmp]], <2 x i32> %b, <2 x i32> %a ; CHECK: ret <2 x i32> [[sel]]