From fc218bae5fdce738cb6a2762f1d3a820b0b93438 Mon Sep 17 00:00:00 2001 From: Balaji Gontumukkala Date: Fri, 13 Sep 2024 09:39:31 +0000 Subject: [PATCH] Bug Fix for timer test 403 Signed-off-by: Balaji Gontumukkala --- pal/uefi_dt/bsa/src/pal_timer_wd.c | 1 + .../operating_system/test_os_d003.c | 19 +++++++++++++++++-- 2 files changed, 18 insertions(+), 2 deletions(-) diff --git a/pal/uefi_dt/bsa/src/pal_timer_wd.c b/pal/uefi_dt/bsa/src/pal_timer_wd.c index 8c974a5c..97892bfd 100644 --- a/pal/uefi_dt/bsa/src/pal_timer_wd.c +++ b/pal/uefi_dt/bsa/src/pal_timer_wd.c @@ -624,6 +624,7 @@ pal_timer_create_info_table_dt(TIMER_INFO_TABLE *TimerTable) else GtEntry->GtCntBase[GtEntry->timer_count] = fdt32_to_cpu(Preg[index]); + GtEntry->GtCntBase[GtEntry->timer_count] += GtEntry->block_cntl_base; GtEntry->frame_num[GtEntry->timer_count] = frame_number; index = 0; diff --git a/test_pool/peripherals/operating_system/test_os_d003.c b/test_pool/peripherals/operating_system/test_os_d003.c index cbd62778..21434ae0 100644 --- a/test_pool/peripherals/operating_system/test_os_d003.c +++ b/test_pool/peripherals/operating_system/test_os_d003.c @@ -84,9 +84,12 @@ uart_enable_txintr() uint32_t data; /* Enable TX interrupt by setting mask bit[5] in UARTIMSC */ + val_print(ACS_PRINT_ERR, "\n uart_enable_txintr ", 0); data = uart_reg_read(BSA_UARTIMSC, WIDTH_BIT32); + val_print(ACS_PRINT_ERR, "\n BSA_UARTIMSC done ", 0); data = data | (1<<5); uart_reg_write(BSA_UARTIMSC, WIDTH_BIT32, data); + val_print(ACS_PRINT_ERR, "\n BSA_UARTIMSC ", 0); } void @@ -157,6 +160,8 @@ payload() && interface_type != COMPATIBLE_GENERIC_16550) { l_uart_base = val_peripheral_get_info(UART_BASE0, count - 1); + + val_print(ACS_PRINT_ERR, "\n l_uart_base 0x%lx ", l_uart_base); if (l_uart_base == 0) { val_set_status(index, RESULT_SKIP(TEST_NUM, 2)); return; @@ -196,8 +201,11 @@ payload1() while (count != 0) { timeout = TIMEOUT_MEDIUM; int_id = val_peripheral_get_info(UART_GSIV, count - 1); + val_print(ACS_PRINT_ERR, "\n int_id %d ", int_id); interface_type = val_peripheral_get_info(UART_INTERFACE_TYPE, count - 1); + val_print(ACS_PRINT_ERR, "\n interface_type %d ", interface_type); l_uart_base = val_peripheral_get_info(UART_BASE0, count - 1); + val_print(ACS_PRINT_ERR, "\n l_uart_base %d ", l_uart_base); if (interface_type != COMPATIBLE_FULL_16550 && interface_type != COMPATIBLE_SUBSET_16550 && interface_type != COMPATIBLE_GENERIC_16550) { @@ -214,21 +222,27 @@ payload1() return; } + val_print(ACS_PRINT_ERR, "\n val_gic_is_valid_espi done ", 0); /* Install ISR */ if (val_gic_install_isr(int_id, isr)) { val_print(ACS_PRINT_ERR, "\n GIC Install Handler Failed...", 0); val_set_status(index, RESULT_FAIL(TEST_NUM1, 3)); return; } + val_print(ACS_PRINT_ERR, "\n val_gic_install_isr done ", 0); val_peripheral_uart_setup(); + val_print(ACS_PRINT_ERR, "\n val_peripheral_uart_setup done ", 0); uart_enable_txintr(); + val_print(ACS_PRINT_ERR, "\n uart_enable_txintr done ", 0); val_print_raw(l_uart_base, g_print_level, "\n Test Message ", 0); + val_print(ACS_PRINT_ERR, "\n val_print_raw done ", 0); while ((--timeout > 0) && (IS_RESULT_PENDING(val_get_status(index)))) { }; + val_print(ACS_PRINT_ERR, "\n timeout done ", 0); if (timeout == 0) { val_print(ACS_PRINT_ERR, "\n Did not receive UART interrupt on %d ", @@ -240,6 +254,7 @@ payload1() } } count--; + val_print(ACS_PRINT_ERR, "\n count-- %d ", count); } if (test_fail) @@ -265,7 +280,7 @@ os_d003_entry(uint32_t num_pe) status = val_initialize_test(TEST_NUM, TEST_DESC, num_pe); if (status != ACS_STATUS_SKIP) - val_run_test_payload(TEST_NUM, num_pe, payload, 0); + val_run_test_payload(TEST_NUM, num_pe, payload1, 0); /* get the result from all PE and check for failure */ status = val_check_for_error(TEST_NUM, num_pe, TEST_RULE); @@ -275,7 +290,7 @@ os_d003_entry(uint32_t num_pe) if (!status) { status = val_initialize_test(TEST_NUM1, TEST_DESC1, val_pe_get_num()); if (status != ACS_STATUS_SKIP) - val_run_test_payload(TEST_NUM1, num_pe, payload1, 0); + val_run_test_payload(TEST_NUM1, num_pe, payload, 0); /* get the result from all PE and check for failure */ status = val_check_for_error(TEST_NUM1, num_pe, TEST_RULE1);