Generic SPI slave support

[RyanMeulenkamp]

Hi,

I needed to implement something that resembles generic SPI slave rather than the command/address/status construction the ESP uses. I found a way that works good enough for me. I thought, can't hurt to share. Here's the code:

/**
 * The ESP8266 uses a proprietary protocol on top of SPI, that forces you into
 *  using a certain format. Either:
 *  - <command><address><data>
 *  - <status command = 0xX1><status>
 * 
 * In which:
 *  - command = 3 - 16 bits long
 *  - address = 1 - 32 bits long
 *  - data    = 1 - 16 words of 32 bits long
 *  - status  = 1 - 4 bytes long
 * 
 * Individual steps can be turned off, but turning off the command phase doesn't
 * work unfortunately. The workaround I found for getting something that has
 * some semblence of a generic SPI interface is by making the command 8 bits
 * long and reading that during a transfer interrupt. One known issue is that it
 * requires a chip select toggle between bytes. Also, there is no hardware
 * buffering, so higher speeds might cause problems.
 */

#include <Arduino.h>
#include <esp8266_peri.h>
#include <ets_sys.h>

#define BUFFER_SIZE 256

#ifdef SIXTEEN_BITS
volatile uint16_t buffer[BUFFER_SIZE];
#define COMMAND_LENGTH 15
#else
volatile uint8_t buffer[BUFFER_SIZE];
#define COMMAND_LENGTH 7
#endif

volatile uint8_t write_pos = 0;
volatile uint8_t read_pos = 0;
volatile uint64_t next = 0;

inline void clear_interrupts() {
    //disable interrupts
    SPI1S &= ~(0x3E0);
    //reset
    SPI1S |= SPISSRES;
    //clear interrupts
    SPI1S &= ~(0x1F);
    //enable interrupts
    SPI1S |= (0x3E0);
}

void ICACHE_RAM_ATTR _hspi_slave_isr_handler(void *arg) {

    // SPI1 ISR
    if(SPIIR & (1 << SPII1)) {
        clear_interrupts();

        // Append to the buffer
        buffer[write_pos++] = SPI1U2;

    // SPI0 ISR
    } else if(SPIIR & (1 << SPII0)) {
        // clear SPI ISR
        SPI0S &= ~(0x3ff);
    }
}

void hspi_slave_begin() {

    pinMode(SS, SPECIAL);
    pinMode(SCK, SPECIAL);
    pinMode(MISO, SPECIAL);
    pinMode(MOSI, SPECIAL);

    // setting config bits in SPI_SLAVE_REG, defined in "esp8266_peri.h"
    // SPISE - spi slave enable
    // SPISTRIE - enables transmission interrupts
    SPI1S = SPISE | SPISTRIE;

    // Clock settings must be set to 0 in slave mode
    SPI1CLK = 0;

    // SPI_USER_REG
    // SPIUCOMMAND - Enable the command phase (the only phase we will allow).
    // SPIUSSE - Sample on rising edge
    SPI1U = SPIUCOMMAND | SPIUSSE;

    // SPI_USER2_REG
    // SPILCOMMAND - Set length of command to 8 (or 16) bits
    SPI1U2 = (COMMAND_LENGTH << SPILCOMMAND);

    // Set all other phase lengths to 0
    SPI1S1 = 0;

    // Use default pin for slave select. Couldn't find in the datasheet or
    // other ESP code why pin 19 is the right one, but heck it works. 
    SPI1P = (1 << 19);

    // Also totally unclear why this is required from the datasheets.
    SPI1CMD = SPIBUSY;

    ETS_SPI_INTR_ATTACH(_hspi_slave_isr_handler, buffer);
    ETS_SPI_INTR_ENABLE();
}

void setup() {
    Serial.begin(115200);
    hspi_slave_begin();
}

void loop () {
    if (write_pos != read_pos) {
#ifdef SIXTEEN_BITS
        Serial.write((uint8_t) buffer[read_pos] & 0xFF);
        Serial.write((uint8_t) (buffer[read_pos++] >> 8) & 0xFF);
#else
        Serial.write(buffer[read_pos++]);
#endif
    }
}

I took some parts from the existing hspi_slave code.

[d-a-v]

I'm not a hardware specialist, but should SPI0 be not modified (at least when running on esp8266) ?
(also there)

[RyanMeulenkamp]

I'm not sure about that part to be honest, took it directly from hspi_slave. SPI0 is used for flash right? Haven't seen any problems other than the unit not booting or programming when SPI chip select is connected (which I read somewhere was a known issue). I did remove that line at some point which gave problems, but I don't remember what it was exactly 😅

[JAndrassy]

HSPI is pins 12, 13, 14, 15, so the normal SPI used by default with the SPI library

[JiriBilek]

Interesting hack!
So if I understand it correctly, you enable only command code in the ESP proprietary protocol and then you read the command value in the interrupt handler (unknown trick for me). How do you ensure the ESP is not interpreting the command and it doesn't try to read or send more data from the SPI bus? By toggling the SS after the 8/16 bits transfer?
I wonder if the ESP can transmit data using this pattern because I was convinced it transmits data only as an answer to certain command codes.

[RyanMeulenkamp]

Yes, like I mentioned in the header of the file: it requires the SPI master to toggle the SS pin between transfers. I have to confess I didn't even try transmitting any data so I don't know about that. For my project only receiving was required. Not being able to sent would make it pretty useless in many cases.