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fix sound
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ericlewis committed Sep 13, 2022
1 parent ce87eff commit 08a7c06
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Showing 4 changed files with 3 additions and 3 deletions.
4 changes: 2 additions & 2 deletions src/fpga/apf/build_id.mif
Original file line number Diff line number Diff line change
Expand Up @@ -10,7 +10,7 @@ CONTENT
BEGIN

0E0 : 20220913;
0E1 : 00102508;
0E2 : d4c9dd4c;
0E1 : 00104835;
0E2 : 5ad64d88;

END;
2 changes: 1 addition & 1 deletion src/fpga/core/core_top.sv
Original file line number Diff line number Diff line change
Expand Up @@ -523,7 +523,7 @@ data_loader_8 #(
//
// synchronize audio samples coming from the core
wire [31:0] audgen_sampdata_s;
synch_3 #(.WIDTH(32)) s5(({1'b0, audio, 1'b0, audio}), audgen_sampdata_s, audgen_sclk);
synch_3 #(.WIDTH(32)) s5(({1'b0, audio[7:1], 1'b0, audio[7:1]}), audgen_sampdata_s, audgen_sclk);
reg [31:0] audgen_sampshift;
reg [4:0] audgen_lrck_cnt;
reg audgen_lrck;
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Binary file modified src/fpga/output_files/ap_core.rbf
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Binary file modified src/fpga/output_files/ap_core.sof
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