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Currently output 2 uses GPIO 8, which is used chip enable for SPI0. To use this pin it is required to disable CE on GPIO0.
The text was updated successfully, but these errors were encountered:
dereulenspiegel
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Currently output 2 uses GPIO 8, which is used chip enable for SPI0. To use this pin it is required to disable CE on GPIO0.
The text was updated successfully, but these errors were encountered: