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The SVD file states that the register is at offset 0xC whereas the ST's RM0360 states that it is at offset 0x10. I also checked with VSCode and a debugger that in fact offset 0x10 provides all the functionality defined for the INIT regsiter while 0xC does not.
The text was updated successfully, but these errors were encountered:
VincentDary
changed the title
Incorrect address for register providing the CRC initial value.
STM32F030.svd: Incorrect address for register providing the CRC initial value.
Oct 28, 2024
Hello @everclear72216 ,
Thank you very much for your feedback, but this is not the right place for your contribution. Due to the license on the SVD files, we don't directly change SVD files as part of this project. The goal of this repository is to provide original SVD file from vendor without any modification, only update from vendor release are accepted. I suggest you to contact the Open-CMSIS-Pack team and ask for a patch to the STM32F0x0 Value Line SVDs, and when it will be fixed propose a patch in this repository.
VincentDary
changed the title
STM32F030.svd: Incorrect address for register providing the CRC initial value.
STMicro/STM32F030.svd: Incorrect address for register providing the CRC initial value.
Oct 30, 2024
https://github.com/posborne/cmsis-svd/blob/0dd8f9af9a69399088a711259af813383bef08d3/data/STMicro/STM32F030.svd#L98
The SVD file states that the register is at offset 0xC whereas the ST's RM0360 states that it is at offset 0x10. I also checked with VSCode and a debugger that in fact offset 0x10 provides all the functionality defined for the INIT regsiter while 0xC does not.
The text was updated successfully, but these errors were encountered: