Add support for Xtensa embedded llvm target

[xfcasio]

request to add support for the Xtensa llvm embedded target (for esp development boards)

[lerno]

This is currently blocked due to LLVM support of Xtensa is not completely merged yet. This might happen in LLVM 20

[kassane]

This is currently blocked due to LLVM support of Xtensa is not completely merged yet. This might happen in LLVM 20

Q: What is xtensa's relevance for most users?
A: esp32 (legacy)!

I have my doubts about that. Maybe LLVM 30+!!
Xtensa for LLVM is experimental (generic cpu-features only). Currently need espressif-fork for esp8266, esp32 & esp32-S[2|3].

upstream:
https://github.com/llvm/llvm-project/blob/master/llvm/lib/Target/Xtensa/Xtensa.td
espressif/llvm
https://github.com/espressif/llvm-project/blob/xtensa_release_18.1.2/llvm/lib/Target/Xtensa/Xtensa.td

References

• Tracking Issue for merging to upstream (LLVM-57) espressif/llvm-project#4
• Please include Xtensa arch in standard distro? ldc-developers/ldc#4725 (similar question)

[kassane]

My simple test (picsimlab/espressif-QEMU)

# static c3c compiler
c3c --version
C3 Compiler Version:       0.6.2 (prerelease)
Installed directory:       /home/kassane/.local/bin/
LLVM version:              18.1.2
LLVM default target:       x86_64-linux-musl

[lerno]

So what do you advice here?

[kassane]

So what do you advice here?

My proposal is to continue the development of xtensa support, focusing on esp32-devices (primary purpose for espressif users).

Note: New espressif devices, now replacing xtensa to risc-v32 (no SIMD/Vector). Old xtensa (esp32/S[2|3] legacy) for higher performance.

Add c3c using espressif/llvm backend artifact in the CI (no impacting upstream artifacts). This will make upstream c3c accessible without forking (like, esp-rs).

[lerno]

So like a special espressif c3c version?

[kassane]

So like a special espressif c3c version?

esp32 support only!
The other upstream targets will remain unchanged.