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Filing this for tracking, and so we can link it to the Verilator issue we will file.
In #636, we added several lines that clock gate the parameter-controlled bind statements in Verilator. This is because Verilator seems to instantiate this modules, even when the parameters supposedly prevent their instantiation.
Filing this for tracking, and so we can link it to the Verilator issue we will file.
In #636, we added several lines that clock gate the parameter-controlled bind statements in Verilator. This is because Verilator seems to instantiate this modules, even when the parameters supposedly prevent their instantiation.
They look roughly like this:
,.clk_i(clk_i && $root.`HOST_MODULE_PATH.testbench.enable_vcore_profiling_p)
Similar statements exist for
enable_cache_profiling_p
enable_router_profiling_p
enable_vcore_pc_coverage_p
andenable_vanilla_core_trace_p
.When this bug is fixed in Verilator, we need to undo this change and revert back to the original source.
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