hdl_2019_r1
Changelog:
-
Supported tools version for this release are:
-
Major updates:
- code refactoring (rename Altera to Intel)
- use smart connect in Xilinx designs
- add support for VCU118
- M2K cascading support
- Library updates:
- optimized util_pack cores (util_cpack2 and util_upack2)
- add axi_fan_control
- New projects:
- FMCOMMS11
- FMCLIDAR1_EBZ
- ADRV9009_ZU11EG
- DAC_FMC_EBZ supporting 8 different high speed DAC
- AD9208_DUAL_EBZ
- New GT projects: AD4020, AD5758, AD7405
- AD7768-1 with cora7z board
- Reference links: