From f0e0fd832d2280e695105d587de34ee1051a151a Mon Sep 17 00:00:00 2001 From: Istvan-Zsolt Szekely Date: Fri, 8 Mar 2024 13:38:00 +0000 Subject: [PATCH] util_axis_fifo_asym: Updated copyright year Signed-off-by: Istvan-Zsolt Szekely --- library/data_offload/data_offload.v | 2 +- library/util_axis_fifo_asym/util_axis_fifo_asym.v | 2 +- library/util_axis_fifo_asym/util_axis_fifo_asym_ip.tcl | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/library/data_offload/data_offload.v b/library/data_offload/data_offload.v index ca821ce7045..4a091e60e00 100644 --- a/library/data_offload/data_offload.v +++ b/library/data_offload/data_offload.v @@ -1,6 +1,6 @@ // *************************************************************************** // *************************************************************************** -// Copyright (C) 2021-2023 Analog Devices, Inc. All rights reserved. +// Copyright (C) 2021-2024 Analog Devices, Inc. All rights reserved. // // In this HDL repository, there are many different and unique modules, consisting // of various HDL (Verilog or VHDL) components. The individual modules are diff --git a/library/util_axis_fifo_asym/util_axis_fifo_asym.v b/library/util_axis_fifo_asym/util_axis_fifo_asym.v index a2aa6c74e87..b6e548cabb3 100644 --- a/library/util_axis_fifo_asym/util_axis_fifo_asym.v +++ b/library/util_axis_fifo_asym/util_axis_fifo_asym.v @@ -1,6 +1,6 @@ // *************************************************************************** // *************************************************************************** -// Copyright (C) 2021-2023 Analog Devices, Inc. All rights reserved. +// Copyright (C) 2021-2024 Analog Devices, Inc. All rights reserved. // // In this HDL repository, there are many different and unique modules, consisting // of various HDL (Verilog or VHDL) components. The individual modules are diff --git a/library/util_axis_fifo_asym/util_axis_fifo_asym_ip.tcl b/library/util_axis_fifo_asym/util_axis_fifo_asym_ip.tcl index 499a8cd93b5..db33723d5a0 100644 --- a/library/util_axis_fifo_asym/util_axis_fifo_asym_ip.tcl +++ b/library/util_axis_fifo_asym/util_axis_fifo_asym_ip.tcl @@ -1,5 +1,5 @@ ############################################################################### -## Copyright (C) 2015-2023 Analog Devices, Inc. All rights reserved. +## Copyright (C) 2015-2024 Analog Devices, Inc. All rights reserved. ### SPDX short identifier: ADIBSD ###############################################################################