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validate rather than resolve SourceLocation paths, to prevent inconsi…
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…stencies on Windows CI/CD and also to guard against accidental relative path inclusion especially when deserializing AWST
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achidlow committed Sep 10, 2024
1 parent 3733f07 commit 1d7b06f
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Showing 18 changed files with 2,019 additions and 2,016 deletions.
64 changes: 32 additions & 32 deletions examples/voting/out/VotingRoundApp.approval.mir

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2 changes: 1 addition & 1 deletion scripts/generate_puya_lib.py
Original file line number Diff line number Diff line change
Expand Up @@ -17,7 +17,7 @@ def main() -> None:
puya_lib_path = VCS_ROOT / "src" / LIB_NAME
output_path = VCS_ROOT / "src" / "puya" / "ir" / "_puya_lib.awst.json"
find_str = f'"file": "{puya_lib_path}'
replace_str = f'"file": "{LIB_NAME}'
replace_str = '"file": "/puya/lib'
replace_awst = awst_path.read_text().replace(find_str, replace_str)
output_path.write_text(replace_awst)
awst_path.unlink(missing_ok=True)
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1,512 changes: 756 additions & 756 deletions src/puya/ir/_puya_lib.awst.json

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16 changes: 9 additions & 7 deletions src/puya/parse.py
Original file line number Diff line number Diff line change
Expand Up @@ -8,15 +8,9 @@
from puya.utils import make_path_relative_to_cwd


def _resolved_path(p: Path | str) -> Path:
if isinstance(p, str):
p = Path(p)
return p.resolve()


@attrs.frozen(kw_only=True, repr=False, str=False)
class SourceLocation:
file: Path = attrs.field(converter=_resolved_path)
file: Path = attrs.field()
line: int = attrs.field(validator=attrs.validators.ge(1))
end_line: int = attrs.field()
comment_lines: int = attrs.field(default=0, validator=attrs.validators.ge(0))
Expand All @@ -28,6 +22,14 @@ class SourceLocation:
default=None, validator=attrs.validators.optional(attrs.validators.ge(1))
)

@file.validator
def _file_validator(self, _attribute: object, value: Path) -> None:
# this check is simply to make sure relative paths aren't accidentally passed in.
# so we use root rather than is_absolute(), because that requires a drive on Windows,
# which we naturally don't supply for synthetic paths such as embedded lib.
if not value.root:
raise ValueError(f"source file locations cannot be relative, got {value}")

@end_line.default
def _end_line_default(self) -> int:
return self.line
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2 changes: 1 addition & 1 deletion src/puyapy/parse.py
Original file line number Diff line number Diff line change
Expand Up @@ -264,7 +264,7 @@ def _try_parse_log_parts(
line = int(line_str)
except ValueError:
line = 1
location = SourceLocation(file=path_str, line=line)
location = SourceLocation(file=Path(path_str).resolve(), line=line)
level = _MYPY_SEVERITY_TO_LOG_LEVEL[severity_str]
return log.Log(message=msg, level=level, location=location)

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746 changes: 373 additions & 373 deletions test_cases/arc4_dynamic_arrays/out/DynamicArrayContract.approval.mir

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14 changes: 7 additions & 7 deletions test_cases/arc4_dynamic_arrays/puya.log
Original file line number Diff line number Diff line change
Expand Up @@ -1214,7 +1214,7 @@ debug: Merged linear block@3: // for_footer_L110 into block@2: // for_body_L111
debug: Optimizer: Remove Empty Blocks
debug: Optimizer: Remove Unreachable Blocks
debug: Optimizer: Repeated Expression Elimination
debug: Replacing redundant declaration let tmp%1#0: uint64 = (* length_minus_1#0 2u) with copy of existing registers (Register(source_location=_puya_lib/arc4.py:103:4-24, ir_type=uint64, name='popped_header_offset', version=0),)
debug: Replacing redundant declaration let tmp%1#0: uint64 = (* length_minus_1#0 2u) with copy of existing registers (Register(source_location=/puya/lib/arc4.py:103:4-24, ir_type=uint64, name='popped_header_offset', version=0),)
debug: Found equivalence set: popped_header_offset#0, tmp%1#0
debug: Replacing {tmp%1#0} with popped_header_offset#0 made 1 modifications
debug: Optimizer: Remove Calls To No Op Subroutines
Expand All @@ -1235,10 +1235,10 @@ debug: Merged linear block@7: // for_footer_L204 into block@6: // for_body_L205
debug: Optimizer: Remove Empty Blocks
debug: Optimizer: Remove Unreachable Blocks
debug: Optimizer: Repeated Expression Elimination
debug: Replacing redundant declaration let tmp%4#0: uint64 = (* new_items_count#0 2u) with copy of existing registers (Register(source_location=_puya_lib/arc4.py:198:4-26, ir_type=uint64, name='item_offset_adjustment', version=0),)
debug: Replacing redundant declaration let tmp%12#0: uint64 = (* array_items_count#0 2u) with copy of existing registers (Register(source_location=_puya_lib/arc4.py:199:33-64, ir_type=uint64, name='tmp%0', version=0),)
debug: Replacing redundant declaration let tmp%13#0: uint64 = (len array_head_and_tail#0) with copy of existing registers (Register(source_location=_puya_lib/arc4.py:203:4-26, ir_type=uint64, name='item_offset_adjustment', version=2),)
debug: Replacing redundant declaration let tmp%16#0: uint64 = (* new_items_count#0 2u) with copy of existing registers (Register(source_location=_puya_lib/arc4.py:204:33-62, ir_type=uint64, name='tmp%4', version=0),)
debug: Replacing redundant declaration let tmp%4#0: uint64 = (* new_items_count#0 2u) with copy of existing registers (Register(source_location=/puya/lib/arc4.py:198:4-26, ir_type=uint64, name='item_offset_adjustment', version=0),)
debug: Replacing redundant declaration let tmp%12#0: uint64 = (* array_items_count#0 2u) with copy of existing registers (Register(source_location=/puya/lib/arc4.py:199:33-64, ir_type=uint64, name='tmp%0', version=0),)
debug: Replacing redundant declaration let tmp%13#0: uint64 = (len array_head_and_tail#0) with copy of existing registers (Register(source_location=/puya/lib/arc4.py:203:4-26, ir_type=uint64, name='item_offset_adjustment', version=2),)
debug: Replacing redundant declaration let tmp%16#0: uint64 = (* new_items_count#0 2u) with copy of existing registers (Register(source_location=/puya/lib/arc4.py:204:33-62, ir_type=uint64, name='tmp%4', version=0),)
debug: Found equivalence set: item_offset_adjustment#0, tmp%4#0, tmp%16#0
debug: Replacing {tmp%4#0, tmp%16#0} with item_offset_adjustment#0 made 2 modifications
debug: Found equivalence set: tmp%0#0, tmp%12#0
Expand Down Expand Up @@ -1277,10 +1277,10 @@ debug: Merged linear block@3: // for_footer_L269 into block@2: // for_body_L270
debug: Optimizer: Remove Empty Blocks
debug: Optimizer: Remove Unreachable Blocks
debug: Optimizer: Repeated Expression Elimination
debug: Replacing redundant declaration let tmp%8#0: uint64 = (+ index#0 1u) with copy of existing registers (Register(source_location=_puya_lib/arc4.py:257:60-69, ir_type=uint64, name='tmp%1', version=0),)
debug: Replacing redundant declaration let tmp%8#0: uint64 = (+ index#0 1u) with copy of existing registers (Register(source_location=/puya/lib/arc4.py:257:60-69, ir_type=uint64, name='tmp%1', version=0),)
debug: Found equivalence set: tmp%1#0, tmp%8#0
debug: Replacing {tmp%8#0} with tmp%1#0 made 1 modifications
debug: Replacing redundant declaration let head_offset#0: uint64 = (* tmp%1#0 2u) with copy of existing registers (Register(source_location=_puya_lib/arc4.py:257:59-74, ir_type=uint64, name='tmp%2', version=0),)
debug: Replacing redundant declaration let head_offset#0: uint64 = (* tmp%1#0 2u) with copy of existing registers (Register(source_location=/puya/lib/arc4.py:257:59-74, ir_type=uint64, name='tmp%2', version=0),)
debug: Found equivalence set: tmp%2#0, head_offset#0
debug: Replacing {tmp%2#0} with head_offset#0 made 2 modifications
debug: Optimizer: Remove Calls To No Op Subroutines
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