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Benjamin Vernoux edited this page Jul 14, 2015 · 17 revisions

This TODO list is mainly for brainstorming and when items will be clearly defined each item will move to https://github.com/airspy/firmware/issues and affected to someone to avoid doing same things in //

  • Add get_samplerates(0) (return number of samples rates) and get_samplerates(nb_samplerates) commands.
  • Change configuration M4, M0 and group all the config in 1 file and 1 structure in a fixed addr in FLASH and copied to a fixed addr in SRAM at start.
  • Modify usb_vendor_request_write_spiflash()/usb_vendor_request_read_spiflash() to usb_vendor_request_write()/usb_vendor_request_read() which write/read in SRAM/Peripheral/SPIFlash depending on dest addr.
  • SAFE Firmware flasher:
    • Do all check in host (after write readback the firmware from spiflash) (with a CRC32 or MD5 file with same name as the firmware to flash) and do not modify firmware except requires implementation of 1.
  • Implement reset command.
  • Merge multiple sample rate config:
    • Idea1: Challenge Needs to change SI5351C LPC clock(main clock), so need to reconfigure ALL clocks like after a reset but without resetting USB0 Clock !!
      • Potential problems:
        • Random bug with USB lockup on PC side or FW side.. (ultra hard to debug) Due to reconfiguration of USB0 PLL (as it is required to reconfigure it)
        • LPC random freeze during reconfiguration of PLL1 (already seen).
    • Idea2: For each new sample rate set a variable with a signature in fixed SRAM addr and reboot, at boot check that signature and use the value to configure the system.
      • Potential problems:
        • No problem on firmware side ultra clean and simple.
        • On Host side lib airspy shall manage that new feature and close then reopen the device in a transparent way (as there is a new USB enumeration due to reboot).
  • Implement EXT Clock 1pps detection/selection at boot in SI5351C.
  • Calibration TODO define API/conf and how to do it (in SI5351C ...)
  • Packing ADC samples from 16bits to 12bits in order to use less USB bandwidth (1/4), this requires host side to Unpack from 12 to 16bits at reception.