From 8fa7b8c6da1616a589cf7dfaf877f4febefb6a8b Mon Sep 17 00:00:00 2001
From: Akash Kollipara <akashkollipara@gmail.com>
Date: Mon, 1 Jan 2024 12:36:07 +0530
Subject: [PATCH 01/10] <libresource> Add new macros to create SP and DP

Issue: #256
---
 src/lib/libc/include/stdio.h                  |   4 +-
 src/lib/libresource/include/dp.h              |  29 ++
 src/lib/libresource/include/dp/dp_gpio.h      |  30 ++
 src/lib/libresource/include/dp/dp_module.h    |  55 +++-
 src/lib/libresource/include/dp/dp_system.h    |  54 +++-
 src/lib/libresource/include/sp.h              |  50 ++++
 src/lib/libresource/include/sp/sp_visor.h     |  51 +++-
 .../mega_avr/atmega2560/resources/dp.c        | 257 ++++--------------
 .../mega_avr/atmega2560/resources/sp.c        |  44 +--
 .../mega_avr/atmega328p/resources/dp.c        | 136 ++-------
 .../mega_avr/atmega328p/resources/sp.c        |  44 +--
 .../sifive/fe310g002-bl/resources/dp.c        | 103 ++-----
 .../sifive/fe310g002-bl/resources/sp.c        |  60 +---
 src/platform/sifive/fe310g002/resources/dp.c  | 105 ++-----
 src/platform/sifive/fe310g002/resources/sp.c  |  62 ++---
 .../sifive/qemu-sifive-e-bl/resources/dp.c    |  77 +-----
 .../sifive/qemu-sifive-e-bl/resources/sp.c    |  41 +--
 .../sifive/qemu-sifive-e/resources/dp.c       | 105 ++-----
 .../sifive/qemu-sifive-e/resources/sp.c       |  62 ++---
 19 files changed, 510 insertions(+), 859 deletions(-)

diff --git a/src/lib/libc/include/stdio.h b/src/lib/libc/include/stdio.h
index f26cb025..ae15c575 100644
--- a/src/lib/libc/include/stdio.h
+++ b/src/lib/libc/include/stdio.h
@@ -1,6 +1,6 @@
 /*
  * CYANCORE LICENSE
- * Copyrights (C) 2019, Cyancore Team
+ * Copyrights (C) 2024, Cyancore Team
  *
  * File Name		: stdio.h
  * Description		: This file contains sources of libc-stdio
@@ -44,4 +44,4 @@ int vprintf(const FILE *, bool, const char *fmt, va_list args);
 #endif
 
 #define printf(fmt, ...)	if(!NOLOGS) __printf(fmt, ##__VA_ARGS__)
-#define eprintf(fmt, ...)	if(!NOLOGS) __eprintf(fmt, ##__VA_ARGS__))
+#define eprintf(fmt, ...)	if(!NOLOGS) __eprintf(fmt, ##__VA_ARGS__)
diff --git a/src/lib/libresource/include/dp.h b/src/lib/libresource/include/dp.h
index df5aa996..7efd9921 100644
--- a/src/lib/libresource/include/dp.h
+++ b/src/lib/libresource/include/dp.h
@@ -29,3 +29,32 @@ typedef const struct device_properties
 } dp_t;
 
 status_t dp_init(dp_t *);
+
+/**
+ * add_cpu - Adds cpu node to dp tree
+ *
+ * @param[in] _index - Index of cpu node
+ * @param[in] cpu - cpu node to be added
+ */
+#define add_cpu(_index, cpu)					\
+	.core[_index] = &cpu					\
+
+/**
+ * create_dp - Instantiates DP tree
+ *
+ * @param[in] _name - Name of the tree
+ * @param[in] clk - base clock of system
+ * @param[in] mem - memory module of system
+ * @param[in] ports_list - list of all available gpio ports
+ * @param[in] mod_list - list of all available modules
+ * @param[in] ... - CPU list as variable args, use add_cpu macro
+ */
+#define create_dp(_name, clk, mem, ports_list, mod_list, ...)	\
+	dp_t _name =						\
+	{							\
+		.base_clock = clk,				\
+		.memory = &mem,					\
+		add_ports(port_list),				\
+		add_modules(mod_list),				\
+		##__VA_ARGS__					\
+	}
diff --git a/src/lib/libresource/include/dp/dp_gpio.h b/src/lib/libresource/include/dp/dp_gpio.h
index 0b749000..a5bde199 100644
--- a/src/lib/libresource/include/dp/dp_gpio.h
+++ b/src/lib/libresource/include/dp/dp_gpio.h
@@ -39,4 +39,34 @@ typedef const struct gpio_module
 #define add_ports(x)		.ports = x,		\
 				.n_ports = propsize(x)
 
+/**
+ * create_gpio_module - Instantiates gpio module
+ *
+ * @param[in] _name - Name of the module
+ * @param[in] _id - id of the module
+ * @param[in] _baddr - base address of the module
+ * @param[in] _stride - stride of the address space
+ */
+#define create_gpio_module(_name, _id, _baddr, _stride)	\
+	gpio_module_t _name =		\
+	{				\
+		.id = _id,		\
+		.baddr = _baddr,	\
+		.stride = _stride	\
+	}
+
+/**
+ * create_gpio_list - Creates a list of gpio module
+ *
+ * @param[in] _name - Name of the list
+ * @param[in] _gpio - name of first module
+ * @param[in] ... - variable args if there is more than 1 module
+ */
+#define create_gpio_list(_name, gpio, ...)	\
+	gpio_module_t * const _name[] =		\
+	{					\
+		gpio,				\
+		##__VA_ARGS__			\
+	}
+
 gpio_module_t *dp_get_port_info(hw_devid_t);
diff --git a/src/lib/libresource/include/dp/dp_module.h b/src/lib/libresource/include/dp/dp_module.h
index d2866449..06ec06d3 100644
--- a/src/lib/libresource/include/dp/dp_module.h
+++ b/src/lib/libresource/include/dp/dp_module.h
@@ -1,6 +1,6 @@
 /*
  * CYANCORE LICENSE
- * Copyrights (C) 2019, Cyancore Team
+ * Copyrights (C) 2024, Cyancore Team
  *
  * File Name		: dp_module.h
  * Description		: This file contains prototypes of device
@@ -26,4 +26,57 @@ typedef const struct module
 #define add_modules(x)		.modules = x,		\
 				.n_mods = propsize(x)
 
+/**
+ * add_irq - Adds irq structure to the module
+ *
+ * @param[in] _index - Index of array to add
+ * @param[in] _mod - irq module
+ * @param[in] _id - irq id
+ * @param[in] _trigger - irq trigger type
+ */
+#define add_irq(_index, _mod, _id, _trigger)		\
+	.interrupt[_index] = {_mod, _id, _trigger}
+
+/**
+ * create_module - Instantiates module property structure
+ *
+ * @param[in] _name - Name of the module or struct
+ * @param[in] _id - module ID
+ * @param[in] _baddr - base address of the module
+ * @param[in] _stride - stride of the address space
+ * @param[in] _clk - clock value of used by the module
+ * @param[in] _clk_id - clock ID to enable the module
+ * @param[in] ... - Variable args for adding irqs, if any IRQ is associated, use
+ * add_irq macro to add the value. For example:
+ * create_module(test, test | 0, 0x1000, 0x100, 115200, 10,
+ * add_irq(int_plat, 10, int_rising edge),
+ * add_irq(int_plat, 11, int_rising_edge));
+ * if no IRQs are associated, omit the addition.
+ */
+#define create_module(_name, _id, _baddr, _stride, _clk, _clk_id, ...)\
+	module_t _name =					\
+	{							\
+		.id = _id,					\
+		.baddr = _baddr,				\
+		.stride = _stride,				\
+		.clk = _clk,					\
+		.clk_id = _clk_id,				\
+		##__VA_ARGS__					\
+	}
+
+
+/**
+ * create_module_list - Creates a list of modules
+ *
+ * @param[in] _name - Name of the module
+ * @param[in] mod1 - name of first module
+ * @param[in] ... - variable agrs if there are more than 1 module
+ */
+#define create_module_list(_name, mod1, ...)	\
+	module_t * const _name[] =		\
+	{					\
+		mod1,				\
+		##__VA_ARGS__			\
+	}
+
 module_t *dp_get_module_info(hw_devid_t dev);
diff --git a/src/lib/libresource/include/dp/dp_system.h b/src/lib/libresource/include/dp/dp_system.h
index 9cb931af..bf8cab98 100644
--- a/src/lib/libresource/include/dp/dp_system.h
+++ b/src/lib/libresource/include/dp/dp_system.h
@@ -1,6 +1,6 @@
 /*
  * CYANCORE LICENSE
- * Copyrights (C) 2019, Cyancore Team
+ * Copyrights (C) 2024, Cyancore Team
  *
  * File Name		: dp_system.h
  * Description		: This file contains prototypes of device
@@ -52,7 +52,7 @@ typedef const struct cpu
 {
 	char name[10];
 	uint16_t id;
-	cpu_sleep_t **states;
+	cpu_sleep_t *states;
 	size_t n_sleep_states;
 
 } cpu_t;
@@ -73,3 +73,53 @@ typedef enum clock_type
 cpu_t *dp_get_cpu_info(uint8_t);
 const unsigned long *dp_get_base_clock();
 memory_t *dp_get_memory_info();
+
+/**
+ * create_memory - Instantiates memory module
+ *
+ * @param[in] _name - Name of the module
+ * @param[in] _start - start address of the memory
+ * @param[in] _size - size of memory segment
+ */
+#define create_memory(_name, _start, _size)	\
+	static memory_t _name =			\
+	{					\
+		.start = _start,		\
+		.size = _size			\
+	}
+
+/**
+ * create_sleep_list - Creates CPU states list
+ *
+ * @param[in] _name - Name of the list
+ * @param[in] state1 - Minimum of 1 states is required
+ * @param[in] ... - Variable args for more states
+ */
+#define create_sleep_list(_name, state1, ...)	\
+	static cpu_sleep_t _name[] = {state1, ##__VA_ARGS__}
+
+/**
+ * add_cpu_sleep_states - Adds cpu states to create_cpu
+ *
+ * @param[in] x = CPU states list
+ */
+#define add_cpu_sleep_states(x)			\
+	.states = &x,				\
+	.n_sleep_states = propsize(x)
+
+/**
+ * create_cpu - Instantitates cpu module
+ *
+ * @param[in] _name - Name of the module
+ * @param[in] _cpu - type of cpu
+ * @param[in] _id - ID of the cpu
+ * @param[in] ... - Variable args for sleep modes
+ */
+#define create_cpu(_name, _cpu, _id, ...)		\
+	static cpu_t _name =				\
+	{						\
+		.name = _cpu,				\
+		.id = _id,				\
+		##__VA_ARGS__				\
+	}
+
diff --git a/src/lib/libresource/include/sp.h b/src/lib/libresource/include/sp.h
index 3c6decdd..04774d02 100644
--- a/src/lib/libresource/include/sp.h
+++ b/src/lib/libresource/include/sp.h
@@ -1,3 +1,14 @@
+/*
+ * CYANCORE LICENSE
+ * Copyrights (C) 2024, Cyancore Team
+ *
+ * File Name		: sp.h
+ * Description		: This file contains datatype and macros for
+ *			  software properties
+ * Primary Author	: Akash Kollipara [akashkollipara@gmail.com]
+ * Organisation		: Cyancore Core-Team
+ */
+
 #pragma once
 
 #include <status.h>
@@ -43,7 +54,46 @@ typedef const struct sp
 	size_t n_swdev;
 } sp_t;
 
+/**
+ * create_swdev_list - Creates list of all software devices
+ *
+ * @param[in] _name - Name of the list
+ * @param[in] dev1 - minimum of 1 device is needed
+ * @param[in] ... - Variable arg if more than 1 device is present
+ */
+#define create_swdev_list(_name, dev1, ...)		\
+	swdev_t * const _name[] =			\
+	{dev1, ##__VA_ARGS__}
+
+/**
+ * add_swdev - Adds software devices into SP
+ *
+ * @param[in] x - Name of swdev list created
+ */
 #define add_swdev(x)		.swdev = x,		\
 				.n_swdev = propsize(x)
 
+/**
+ * add_terravisor - Adds terravisor node into SP
+ *
+ * @param[in] x - Name of the terravisor node
+ */
+#define add_terravisor(x)	.terravisor = &x
+
+/**
+ * create_sp - Instantiates SP tree
+ *
+ * @param[in] _name - Name of the SP tree
+ * @param[in] devs - use add_swdev macro to append list
+ * @param[in] visor1 - Minimum of 1 visor is required
+ * @param[in] ... - Variable args for more visors
+ */
+#define create_sp(_name, devs, visor1, ...)		\
+	sp_t _name =					\
+	{						\
+		devs,					\
+		visor1,					\
+		##__VA_ARGS__				\
+	}
+
 status_t sp_init(sp_t *);
diff --git a/src/lib/libresource/include/sp/sp_visor.h b/src/lib/libresource/include/sp/sp_visor.h
index 6da07093..15c7970a 100644
--- a/src/lib/libresource/include/sp/sp_visor.h
+++ b/src/lib/libresource/include/sp/sp_visor.h
@@ -1,6 +1,6 @@
 /*
  * CYANCORE LICENSE
- * Copyrights (C) 2019, Cyancore Team
+ * Copyrights (C) 2024, Cyancore Team
  *
  * File Name		: sp_visor.h
  * Description		: This file contains data structures of software 
@@ -29,11 +29,60 @@ typedef const struct visor
 	size_t n_dev;
 } visor_t;
 
+/**
+ * create_pmux - Instantiates pinmux struct
+ *
+ * @param[in] _name - Name of the struct
+ * @param[in] _port - port of all the pins
+ * @param[in] _func - type of function
+ * @param[in] _pin1 - Needs minimum of 1 pin
+ * @param[in] ... - Variable args for more pin
+ */
+#define create_pmux(_name, _port, _func, _pin1, ...)		\
+	static const uint8_t _name##pins[] = {_pin1,		\
+					##__VA_ARGS__};		\
+	static const pinmux_t _name = addpins(_port,		\
+				_name##pins, _func)
+
+/**
+ * add_pinmux - Adds pinmux node to create_swdev
+ *
+ * @param[in] x - pinmux node
+ */
+#define add_pinmux(x)	.pmux = &x
+
+/**
+ * create_swdev - Instantiates sw dev module
+ *
+ * @param[in] _name - Name of the node
+ * @param[in] _swdev_id - sw dev ID
+ * @param[in] _hwdev_id - hw dev ID of connecting hardware
+ * @param[in] ... - Variable args if pinmux is needed
+ */
+#define create_swdev(_name, _swdev_id, _hwdev_id, ...)		\
+	static swdev_t _name =					\
+	{							\
+		.swdev_id = _swdev_id,				\
+		.hwdev_id = _hwdev_id,				\
+		##__VA_ARGS__					\
+	}
+
 #define add_visor_devs(x)	{				\
 					.devids = x,		\
 					.n_dev = propsize(x)	\
 				}
 
+/**
+ * create_visor - Instantiates visor struct
+ *
+ * @param[in] _name - Name of the visor module
+ * @param[in] _dev1 - Minimum of 1 device needs to be assiged
+ * @param[in] ... - Variable args for more than 1 device
+ */
+#define create_visor(_name, dev1, ...)				\
+	const sw_devid_t _name##_dev[] = {dev1, ##__VA_ARGS__};	\
+	static visor_t _name = add_visor_devs(_name##_dev)
+
 typedef enum
 {
 	terravisor_id		= 0x1010,
diff --git a/src/platform/mega_avr/atmega2560/resources/dp.c b/src/platform/mega_avr/atmega2560/resources/dp.c
index 8a133f8e..f52235db 100644
--- a/src/platform/mega_avr/atmega2560/resources/dp.c
+++ b/src/platform/mega_avr/atmega2560/resources/dp.c
@@ -1,8 +1,8 @@
 /*
  * CYANCORE LICENSE
- * Copyrights (C) 2019, Cyancore Team
+ * Copyrights (C) 2024, Cyancore Team
  *
- * File Name		: platform_dp.c
+ * File Name		: dp.c
  * Description		: This file contains sources for platform
  *			  device properties
  * Primary Author	: Rahul Goyal [rhgoyal01@gmail.com]
@@ -19,201 +19,58 @@
 WARN(< ! > FCLK is not defined!)
 #endif
 
-cpu_t core0 =
-{
-	.name = "avr5",
-	.id = 0x0000
-};
-
-memory_t mem =
-{
-	.start = 0,
-	.size = DMEM_LENGTH
-};
-
-module_t uart0 =
-{
-	.id = uart | 0,
-	.baddr = 0xc0,
-	.clk_id = 0x01,
-	.stride = 0x06,
-	.clk = 115200,
-	.interrupt[0] = {int_arch, 25, int_level},
-	.interrupt[1] = {int_arch, 27, int_level},
-};
-
-gpio_module_t port0 =
-{
-	.id = gpio | PORTA,
-	.baddr = 0x20,
-	.stride = 3
-};
-
-gpio_module_t port1 =
-{
-	.id = gpio | PORTB,
-	.baddr = 0x23,
-	.stride = 3
-};
-
-gpio_module_t port2 =
-{
-	.id = gpio | PORTC,
-	.baddr = 0x26,
-	.stride = 3
-};
-
-gpio_module_t port3 =
-{
-	.id = gpio | PORTD,
-	.baddr = 0x29,
-	.stride = 3
-};
-
-gpio_module_t port4 =
-{
-	.id = gpio | PORTE,
-	.baddr = 0x2c,
-	.stride = 3
-};
-
-gpio_module_t port5 =
-{
-	.id = gpio | PORTF,
-	.baddr = 0x2f,
-	.stride = 3
-};
-
-gpio_module_t port6 =
-{
-	.id = gpio | PORTG,
-	.baddr = 0x32,
-	.stride = 3
-};
-
-gpio_module_t port7 =
-{
-	.id = gpio | PORTH,
-	.baddr = 0x100,
-	.stride = 3
-};
-
-gpio_module_t port8 =
-{
-	.id = gpio | PORTJ,
-	.baddr = 0x103,
-	.stride = 3
-};
-
-gpio_module_t port9 =
-{
-	.id = gpio | PORTK,
-	.baddr = 0x106,
-	.stride = 3
-};
-
-gpio_module_t port10 =
-{
-	.id = gpio | PORTL,
-	.baddr = 0x109,
-	.stride = 3
-};
-
-module_t wdt0 =
-{
-	.id = wdt | 0,
-	.baddr=0x60,
-	.stride=0x1,
-	.interrupt[0] = {int_arch, 6, int_level},
-	.clk = 0x7
-};
-
-module_t timer0 =
-{
-	.id = timer | 0x00,
-	.baddr = 0x44,
-	.stride = 5,
-	.clk = FCLK,
-	.interrupt[0] = {int_arch, 21, int_level},
-	.interrupt[1] = {int_arch, 22, int_level},
-	.clk_id = 5,
-};
-
-module_t timer1 =
-{
-	.id = timer | 0x10,
-	.baddr = 0x80,
-	.stride = 12,
-	.clk = FCLK,
-	.interrupt[0] = {int_arch, 17, int_level},
-	.interrupt[1] = {int_arch, 18, int_level},
-	.clk_id = 3,
-};
-
-module_t timer2 =
-{
-	.id = timer | 0x20,
-	.baddr = 0xb0,
-	.stride = 5,
-	.clk = FCLK,
-	.interrupt[0] = {int_arch, 13, int_level},
-	.interrupt[1] = {int_arch, 24, int_level},
-	.clk_id = 6,
-};
-
-module_t timer3 =
-{
-	.id = timer | 0x30,
-	.baddr = 0x90,
-	.stride = 12,
-	.clk = FCLK,
-	.interrupt[0] = {int_arch, 32, int_level},
-	.interrupt[1] = {int_arch, 33, int_level},
-	.clk_id = 11,
-};
-
-module_t timer4 =
-{
-	.id = timer | 0x40,
-	.baddr = 0xa0,
-	.stride = 12,
-	.clk = FCLK,
-	.interrupt[0] = {int_arch, 42, int_level},
-	.interrupt[1] = {int_arch, 43, int_level},
-	.clk_id = 12,
-};
-
-module_t timer5 =
-{
-	.id = timer | 0x50,
-	.baddr = 0x120,
-	.stride = 12,
-	.clk = FCLK,
-	.interrupt[0] = {int_arch, 47, int_level},
-	.interrupt[1] = {int_arch, 48, int_level},
-	.clk_id = 13,
-};
-
-gpio_module_t *port_list[] =
-{
-	&port0, &port1, &port2, &port3, &port4, &port5,
-	&port6, &port7, &port8, &port9, &port10
-};
-
-module_t *mod_list[] =
-{
-	&uart0, &wdt0,
-	&timer0, &timer1, &timer2,
-	&timer3, &timer4, &timer5,
-};
-
-dp_t device_prop =
-{
-	.base_clock = FCLK,
-	.core[0] = &core0,
-	.memory = &mem,
-
-	add_ports(port_list),
-
-	add_modules(mod_list),
-};
+create_cpu(core0, "avr5", 0);
+
+create_memory(mem, 0, DMEM_LENGTH);
+
+create_module(uart0, (uart | 0), 0xc0, 0x06, 115200, 1,
+		add_irq(0, int_arch, 25, int_level),
+		add_irq(1, int_arch, 27, int_level));
+
+create_gpio_module(port0, (gpio | PORTA), 0x20, 3);
+create_gpio_module(port1, (gpio | PORTB), 0x23, 3);
+create_gpio_module(port2, (gpio | PORTC), 0x26, 3);
+create_gpio_module(port3, (gpio | PORTD), 0x29, 3);
+create_gpio_module(port4, (gpio | PORTE), 0x2c, 3);
+create_gpio_module(port5, (gpio | PORTF), 0x2f, 3);
+create_gpio_module(port6, (gpio | PORTG), 0x32, 3);
+create_gpio_module(port7, (gpio | PORTH), 0x100, 3);
+create_gpio_module(port8, (gpio | PORTJ), 0x103, 3);
+create_gpio_module(port9, (gpio | PORTK), 0x106, 3);
+create_gpio_module(port10, (gpio | PORTL), 0x109, 3);
+
+create_module(wdt0, (wdt | 0), 0x60, 0x1, 0x7, 0,
+		add_irq(0, int_arch, 0x6, int_level));
+
+create_module(timer0, (timer | 0x00), 0x44, 5, FCLK, 5,
+		add_irq(0, int_arch, 21, int_level),
+		add_irq(1, int_arch, 22, int_level));
+
+create_module(timer1, (timer | 0x10), 0x80, 12, FCLK, 3,
+		add_irq(0, int_arch, 17, int_level),
+		add_irq(1, int_arch, 18, int_level));
+
+create_module(timer2, (timer | 0x20), 0xb0, 5, FCLK, 6,
+		add_irq(0, int_arch, 13, int_level),
+		add_irq(1, int_arch, 24, int_level));
+
+create_module(timer3, (timer | 0x30), 0x90, 12, FCLK, 11,
+		add_irq(0, int_arch, 32, int_level),
+		add_irq(1, int_arch, 33, int_level));
+
+create_module(timer4, (timer | 0x40), 0xa0, 12, FCLK, 12,
+		add_irq(0, int_arch, 42, int_level),
+		add_irq(1, int_arch, 43, int_level));
+
+create_module(timer5, (timer | 0x50), 0x120, 12, FCLK, 13,
+		add_irq(0, int_arch, 47, int_level),
+		add_irq(1, int_arch, 48, int_level));
+
+create_gpio_list(port_list, &port0, &port1, &port2, &port3, &port4,
+		&port5, &port6, &port7, &port8, &port9, &port10);
+
+create_module_list(mod_list, &uart0, &wdt0, &timer0,
+		&timer1, &timer2, &timer3, &timer4, &timer5);
+
+create_dp(device_prop, FCLK, mem, port_list, mod_list,
+		add_cpu(0, core0));
diff --git a/src/platform/mega_avr/atmega2560/resources/sp.c b/src/platform/mega_avr/atmega2560/resources/sp.c
index 2f5b6374..193cc933 100644
--- a/src/platform/mega_avr/atmega2560/resources/sp.c
+++ b/src/platform/mega_avr/atmega2560/resources/sp.c
@@ -1,6 +1,6 @@
 /*
  * CYANCORE LICENSE
- * Copyrights (C) 2019, Cyancore Team
+ * Copyrights (C) 2024, Cyancore Team
  *
  * File Name		: platform_sp.c
  * Description		: This file contains sources for platform
@@ -12,40 +12,18 @@
 #include <status.h>
 #include <resource.h>
 
-swdev_t consoleUart =
-{
-	.swdev_id = console_uart,
-	.hwdev_id = uart
-};
+create_swdev(consoleUart, console_uart, (uart | 0));
 
-swdev_t schedTimer =
-{
-	.swdev_id = sched_timer,
-	.hwdev_id = timer | 0x00,
-};
+create_swdev(schedTimer, sched_timer, (timer | 0));
 
-static uint8_t led0pins[] = {7};
-static pinmux_t obled0 = addpins(1, led0pins, 0);
-swdev_t onBoardLED0 =
-{
-	.swdev_id = onboard_led | 0,
-	.pmux = &obled0
-};
+create_pmux(obled0, 1, 0, 7);
+create_swdev(onBoardLED0, (onboard_led | 0), 0, add_pinmux(obled0));
 
-sw_devid_t terra_devs[] =
-{
-	console_uart, sched_timer, (onboard_led | 0),
-};
+create_visor(terravisor, console_uart, sched_timer, (onboard_led | 0));
 
-visor_t terravisor = add_visor_devs(terra_devs);
+create_swdev_list(sw_devs, &consoleUart, &schedTimer, &onBoardLED0);
 
-swdev_t *sw_devs[] =
-{
-	&consoleUart, &schedTimer, &onBoardLED0,
-};
-
-sp_t software_prop =
-{
-	.terravisor = &terravisor,
-	add_swdev(sw_devs),
-};
+create_sp(software_prop,
+	  add_swdev(sw_devs),
+	  add_terravisor(terravisor),
+	 );
diff --git a/src/platform/mega_avr/atmega328p/resources/dp.c b/src/platform/mega_avr/atmega328p/resources/dp.c
index a47682ee..56f23aad 100644
--- a/src/platform/mega_avr/atmega328p/resources/dp.c
+++ b/src/platform/mega_avr/atmega328p/resources/dp.c
@@ -1,8 +1,8 @@
 /*
  * CYANCORE LICENSE
- * Copyrights (C) 2019, Cyancore Team
+ * Copyrights (C) 2024, Cyancore Team
  *
- * File Name		: platform_dp.c
+ * File Name		: dp.c
  * Description		: This file contains sources for platform
  *			  device properties
  * Primary Author	: Akash Kollipara [akashkollipara@gmail.com]
@@ -19,119 +19,41 @@
 WARN(< ! > FCLK is not defined!)
 #endif
 
-cpu_t core0 =
-{
-	.name = "avr5",
-	.id = 0x0000
-};
+create_cpu(core0, "avr5", 0);
 
-memory_t mem =
-{
-	.start = 0,
-	.size = DMEM_LENGTH
-};
+create_memory(mem, 0, DMEM_LENGTH);
 
-module_t uart0 =
-{
-	.id = uart | 0,
-	.baddr = 0xc0,
-	.clk_id = 0x01,
-	.stride = 0x06,
-	.clk = 115200,
-	.interrupt[0] = {int_arch, 18, int_level},
-	.interrupt[1] = {int_arch, 20, int_level},
-};
+create_module(uart0, (uart | 0), 0xc0, 0x06, 115200, 1,
+		add_irq(0, int_arch, 18, int_level),
+		add_irq(1, int_arch, 20, int_level));
 
-gpio_module_t port0 =
-{
-	.id = gpio | PORTB,
-	.baddr = 0x23,
-	.stride = 3
-};
+create_gpio_module(port0, (gpio | PORTB), 0x23, 3);
+create_gpio_module(port1, (gpio | PORTC), 0x26, 3);
+create_gpio_module(port2, (gpio | PORTD), 0x29, 3);
 
-gpio_module_t port1 =
-{
-	.id = gpio | PORTC,
-	.baddr = 0x26,
-	.stride = 3
-};
+create_module(wdt0, (wdt | 0), 0x60, 0x1, 0x7, 0,
+		add_irq(0, int_arch, 0x6, int_level));
 
-gpio_module_t port2 =
-{
-	.id = gpio | PORTD,
-	.baddr = 0x29,
-	.stride = 3
-};
+create_module(timer0, (timer | 0x00), 0x44, 5, FCLK, 5,
+		add_irq(0, int_arch, 14, int_level),
+		add_irq(1, int_arch, 15, int_level));
 
-module_t wdt0 =
-{
-	.id = wdt | 0,
-	.baddr=0x60,
-	.stride=0x1,
-	.interrupt[0] = {int_arch, 0x6, int_level},
-	.clk = 0x7
-};
+create_module(timer1, (timer | 0x10), 0x80, 12, FCLK, 3,
+		add_irq(0, int_arch, 11, int_level),
+		add_irq(1, int_arch, 12, int_level));
 
-module_t timer0 =
-{
-	.id = timer | 0x00,
-	.baddr = 0x44,
-	.stride = 5,
-	.clk = FCLK,
-	.interrupt[0] = {int_arch, 14, int_level},
-	.interrupt[1] = {int_arch, 15, int_level},
-	.clk_id = 5,
-};
+create_module(timer2, (timer | 0x20), 0xb0, 5, FCLK, 6,
+		add_irq(0, int_arch, 7, int_level),
+		add_irq(1, int_arch, 8, int_level));
 
-module_t timer1 =
-{
-	.id = timer | 0x10,
-	.baddr = 0x80,
-	.stride = 12,
-	.clk = FCLK,
-	.interrupt[0] = {int_arch, 11, int_level},
-	.interrupt[1] = {int_arch, 12, int_level},
-	.clk_id = 3,
-};
+create_module(adc0, (adc | 0x00), 0x78, 8, 0, 0,
+		add_irq(0, int_arch, 21, int_level),
+		add_irq(1, int_arch, 23, int_level));
 
-module_t timer2 =
-{
-	.id = timer | 0x20,
-	.baddr = 0xb0,
-	.stride = 5,
-	.clk = FCLK,
-	.interrupt[0] = {int_arch, 7, int_level},
-	.interrupt[1] = {int_arch, 8, int_level},
-	.clk_id = 6,
-};
+create_gpio_list(port_list, &port0, &port1, &port2);
 
-module_t adc0 =
-{
-	.id = adc | 0x00,
-	.baddr = 0x78,
-	.stride = 8,
-	.interrupt[0] = {int_arch, 21, int_level},
-	.interrupt[1] = {int_arch, 23, int_level},
-	.clk_id = 0,
-};
+create_module_list(mod_list, &uart0, &wdt0, &timer0,
+		&timer1, &timer2, &adc0);
 
-gpio_module_t *port_list[] =
-{
-	&port0, &port1, &port2,
-};
-
-module_t *mod_list[] =
-{
-	&uart0, &wdt0, &timer0, &timer1, &timer2, &adc0,
-};
-
-dp_t device_prop =
-{
-	.base_clock = FCLK,
-	.core[0] = &core0,
-	.memory = &mem,
-
-	add_ports(port_list),
-
-	add_modules(mod_list),
-};
+create_dp(device_prop, FCLK, mem, port_list, mod_list,
+		add_cpu(0, core0));
diff --git a/src/platform/mega_avr/atmega328p/resources/sp.c b/src/platform/mega_avr/atmega328p/resources/sp.c
index 10a270ea..574e9b96 100644
--- a/src/platform/mega_avr/atmega328p/resources/sp.c
+++ b/src/platform/mega_avr/atmega328p/resources/sp.c
@@ -1,6 +1,6 @@
 /*
  * CYANCORE LICENSE
- * Copyrights (C) 2019, Cyancore Team
+ * Copyrights (C) 2024, Cyancore Team
  *
  * File Name		: platform_sp.c
  * Description		: This file contains sources for platform
@@ -12,40 +12,18 @@
 #include <status.h>
 #include <resource.h>
 
-swdev_t consoleUart =
-{
-	.swdev_id = console_uart,
-	.hwdev_id = uart
-};
+create_swdev(consoleUart, console_uart, (uart | 0));
 
-swdev_t schedTimer =
-{
-	.swdev_id = sched_timer,
-	.hwdev_id = timer | 0,
-};
+create_swdev(schedTimer, sched_timer, (timer | 0));
 
-static uint8_t led0pins[] = {5};
-static pinmux_t obled0 = addpins(1, led0pins, 0);
-swdev_t onBoardLED0 =
-{
-	.swdev_id = onboard_led | 0,
-	.pmux = &obled0
-};
+create_pmux(obled0, 1, 0, 5);
+create_swdev(onBoardLED0, (onboard_led | 0), 0, add_pinmux(obled0));
 
-sw_devid_t terra_devs[] =
-{
-	console_uart, sched_timer, (onboard_led | 0),
-};
+create_visor(terravisor, console_uart, sched_timer, (onboard_led | 0));
 
-visor_t terravisor = add_visor_devs(terra_devs);
+create_swdev_list(sw_devs, &consoleUart, &schedTimer, &onBoardLED0);
 
-swdev_t *sw_devs[] =
-{
-	&consoleUart, &schedTimer, &onBoardLED0,
-};
-
-sp_t software_prop =
-{
-	.terravisor = &terravisor,
-	add_swdev(sw_devs),
-};
+create_sp(software_prop,
+	  add_swdev(sw_devs),
+	  add_terravisor(terravisor),
+	 );
diff --git a/src/platform/sifive/fe310g002-bl/resources/dp.c b/src/platform/sifive/fe310g002-bl/resources/dp.c
index 5cb7c709..f61fba98 100644
--- a/src/platform/sifive/fe310g002-bl/resources/dp.c
+++ b/src/platform/sifive/fe310g002-bl/resources/dp.c
@@ -1,6 +1,6 @@
 /*
  * CYANCORE LICENSE
- * Copyrights (C) 2019, Cyancore Team
+ * Copyrights (C) 2024, Cyancore Team
  *
  * File Name		: platform_dp.c
  * Description		: This file contains sources for platform
@@ -19,97 +19,34 @@
 WARN(< ! > XCLK is not defined!)
 #endif
 
-cpu_t core0 =
-{
-	.name = "riscv-e310",
-	.id = 0x0000
-};
+create_cpu(core0, "riscv-e310", 0);
 
-memory_t mem =
-{
-	.start = V_DMEM_START,
-	.size = DMEM_LENGTH
-};
+create_memory(mem, V_DMEM_START, DMEM_LENGTH);
 
-module_t plic0 =
-{
-	.id = plic,
-	.baddr = 0x0c000000,
-	.stride = 0x04000000,
-	.interrupt[0] = {int_local, 11, int_rising_edge},
-};
+create_module(plic0, plic, 0x0c000000, 0x04000000, 0, 0,
+		add_irq(0, int_local, 11, int_rising_edge));
 
-module_t clint0 =
-{
-	.id = clint,
-	.baddr = 0x02000000,
-	.stride = 0xc000,
-};
+create_module(clint0, clint, 0x02000000, 0xc000, 0, 0);
 
-module_t uart0 =
-{
-	.id = uart | 0,
-	.baddr = 0x10013000,
-	.stride = 0x20,
-	.clk = 115200,
-	.interrupt[0] = {int_plat, 3, int_rising_edge},
-};
+create_module(uart0, (uart | 0), 0x10013000, 0x20, 115200, 0,
+		add_irq(0, int_plat, 3, int_rising_edge));
 
-module_t uart1 =
-{
-	.id = uart | 1,
-	.baddr = 0x10023000,
-	.stride = 0x20,
-	.clk = 115200,
-	.interrupt[0] = {int_plat, 4, int_rising_edge},
-};
+create_module(uart1, (uart | 1), 0x10023000, 0x20, 115200, 0,
+		add_irq(0, int_plat, 4, int_rising_edge));
 
-module_t prci0 =
-{
-	.id = prci,
-	.baddr = 0x10008000,
-	.stride = 0x1000,
-};
+create_module(prci0, prci, 0x10008000, 0x1000, 0, 0);
 
-gpio_module_t port0 =
-{
-	.id = gpio | PORTA,
-	.baddr = 0x10012000,
-	.stride = 0x4c,
-};
+create_module(aon0, (aon | 0), 0x10000000, 0x1000, 0, 0);
 
-module_t aon0 =
-{
-	.id = aon | 0,
-	.baddr = 0x10000000,
-	.stride = 0x1000,
-};
+create_module(timer_core0, (timer | 0), 0, 0, 32768, 0,
+		add_irq(0, int_local, 7, int_level));
 
-module_t timer_core0 =
-{
-	.id = timer | 0,
-	.clk = 32768,
-	.interrupt[0] = {int_local, 7, int_level},
-};
+create_gpio_module(port0, (gpio | PORTA), 0x10012000, 0x4c);
 
-gpio_module_t * const port_list[] =
-{
-	&port0,
-};
+create_gpio_list(port_list, &port0);
 
-module_t * const mod_list[] =
-{
-	&plic0, &uart0, &prci0, &clint0, &aon0, &uart1,
-	&timer_core0,
-};
+create_module_list(mod_list, &plic0, &uart0, &prci0,
+		&clint0, &aon0, &uart1, &timer_core0);
 
-dp_t device_prop =
-{
-	.base_clock = XCLK,
-	.core[0] = &core0,
-	.memory = &mem,
-
-	add_ports(port_list),
-
-	add_modules(mod_list),
-};
+create_dp(device_prop, XCLK, mem, port_list, mod_list,
+	add_cpu(0, core0));
diff --git a/src/platform/sifive/fe310g002-bl/resources/sp.c b/src/platform/sifive/fe310g002-bl/resources/sp.c
index 4e668118..8b10c0bb 100644
--- a/src/platform/sifive/fe310g002-bl/resources/sp.c
+++ b/src/platform/sifive/fe310g002-bl/resources/sp.c
@@ -1,6 +1,6 @@
 /*
  * CYANCORE LICENSE
- * Copyrights (C) 2019, Cyancore Team
+ * Copyrights (C) 2024, Cyancore Team
  *
  * File Name		: platform_sp.c
  * Description		: This file contains sources for platform
@@ -13,53 +13,23 @@
 #include <plat_defines.h>
 #include <resource.h>
 
-static const uint8_t uart0pins[] = {16, 17};
-static pinmux_t uart0 = addpins(0, uart0pins, serial);
-swdev_t consoleUart =
-{
-	.swdev_id = console_uart,
-	.hwdev_id = uart | 0,
-	.pmux = &uart0
-};
+create_pmux(uart0, 0, serial, 16, 17);
+create_swdev(consoleUart, console_uart, (uart | 0), add_pinmux(uart0));
 
-swdev_t schedTimer =
-{
-	.swdev_id = sched_timer,
-	.hwdev_id = timer | 0,
-};
+create_swdev(schedTimer, sched_timer, (timer | 0));
 
-static const uint8_t led0pins[] = {19, 21};
-static pinmux_t obled0 = addpins(0, led0pins, 0);
-swdev_t onBoardLED0 =
-{
-	.swdev_id = onboard_led | 0,
-	.pmux = &obled0
-};
+create_pmux(obled0, 0, 0, 19, 21);
+create_swdev(onBoardLED0, (onboard_led | 0), 0, add_pinmux(obled0));
 
-static const uint8_t led1pins[] = {20};
-static pinmux_t obled1 = addpins(0, led1pins, 0);
-swdev_t onBoardLED1 =
-{
-	.swdev_id = onboard_led | 1,
-	.pmux = &obled1
-};
+create_pmux(obled1, 0, 0, 20);
+create_swdev(onBoardLED1, (onboard_led | 1), 0, add_pinmux(obled1));
 
-const sw_devid_t terra_devs[] =
-{
-	console_uart, sched_timer, (onboard_led | 0),
-	(onboard_led | 1),
-};
+create_visor(terravisor, console_uart, sched_timer,
+		(onboard_led | 0), (onboard_led | 1));
 
-visor_t terravisor = add_visor_devs(terra_devs);
+create_swdev_list(sw_devs, &consoleUart, &schedTimer, &onBoardLED0, &onBoardLED1);
 
-swdev_t * const sw_devs[] =
-{
-	&consoleUart, &schedTimer, &onBoardLED0,
-	&onBoardLED1,
-};
-
-sp_t software_prop =
-{
-	.terravisor = &terravisor,
-	add_swdev(sw_devs),
-};
+create_sp(software_prop,
+	  add_swdev(sw_devs),
+	  add_terravisor(terravisor),
+	);
diff --git a/src/platform/sifive/fe310g002/resources/dp.c b/src/platform/sifive/fe310g002/resources/dp.c
index 5cb7c709..1288ec02 100644
--- a/src/platform/sifive/fe310g002/resources/dp.c
+++ b/src/platform/sifive/fe310g002/resources/dp.c
@@ -1,8 +1,8 @@
 /*
  * CYANCORE LICENSE
- * Copyrights (C) 2019, Cyancore Team
+ * Copyrights (C) 2024, Cyancore Team
  *
- * File Name		: platform_dp.c
+ * File Name		: dp.c
  * Description		: This file contains sources for platform
  *			  device properties
  * Primary Author	: Akash Kollipara [akashkollipara@gmail.com]
@@ -19,97 +19,34 @@
 WARN(< ! > XCLK is not defined!)
 #endif
 
-cpu_t core0 =
-{
-	.name = "riscv-e310",
-	.id = 0x0000
-};
+create_cpu(core0, "riscv-e310", 0);
 
-memory_t mem =
-{
-	.start = V_DMEM_START,
-	.size = DMEM_LENGTH
-};
+create_memory(mem, V_DMEM_START, DMEM_LENGTH);
 
-module_t plic0 =
-{
-	.id = plic,
-	.baddr = 0x0c000000,
-	.stride = 0x04000000,
-	.interrupt[0] = {int_local, 11, int_rising_edge},
-};
+create_module(plic0, plic, 0x0c000000, 0x04000000, 0, 0,
+		add_irq(0, int_local, 11, int_rising_edge));
 
-module_t clint0 =
-{
-	.id = clint,
-	.baddr = 0x02000000,
-	.stride = 0xc000,
-};
+create_module(clint0, clint, 0x02000000, 0xc000, 0, 0);
 
-module_t uart0 =
-{
-	.id = uart | 0,
-	.baddr = 0x10013000,
-	.stride = 0x20,
-	.clk = 115200,
-	.interrupt[0] = {int_plat, 3, int_rising_edge},
-};
+create_module(uart0, (uart | 0), 0x10013000, 0x20, 115200, 0,
+		add_irq(0, int_plat, 3, int_rising_edge));
 
-module_t uart1 =
-{
-	.id = uart | 1,
-	.baddr = 0x10023000,
-	.stride = 0x20,
-	.clk = 115200,
-	.interrupt[0] = {int_plat, 4, int_rising_edge},
-};
+create_module(uart1, (uart | 1), 0x10023000, 0x20, 115200, 0,
+		add_irq(0, int_plat, 4, int_rising_edge));
 
-module_t prci0 =
-{
-	.id = prci,
-	.baddr = 0x10008000,
-	.stride = 0x1000,
-};
+create_module(prci0, prci, 0x10008000, 0x1000, 0, 0);
 
-gpio_module_t port0 =
-{
-	.id = gpio | PORTA,
-	.baddr = 0x10012000,
-	.stride = 0x4c,
-};
+create_module(aon0, (aon | 0), 0x10000000, 0x1000, 0, 0);
 
-module_t aon0 =
-{
-	.id = aon | 0,
-	.baddr = 0x10000000,
-	.stride = 0x1000,
-};
+create_module(timer_core0, (timer | 0), 0, 0, 32768, 0,
+		add_irq(0, int_local, 7, int_level));
 
-module_t timer_core0 =
-{
-	.id = timer | 0,
-	.clk = 32768,
-	.interrupt[0] = {int_local, 7, int_level},
-};
+create_gpio_module(port0, (gpio | PORTA), 0x10012000, 0x4c);
 
-gpio_module_t * const port_list[] =
-{
-	&port0,
-};
+create_gpio_list(port_list, &port0);
 
-module_t * const mod_list[] =
-{
-	&plic0, &uart0, &prci0, &clint0, &aon0, &uart1,
-	&timer_core0,
-};
+create_module_list(mod_list, &plic0, &uart0, &prci0,
+		&clint0, &aon0, &uart1, &timer_core0);
 
-dp_t device_prop =
-{
-	.base_clock = XCLK,
-	.core[0] = &core0,
-	.memory = &mem,
-
-	add_ports(port_list),
-
-	add_modules(mod_list),
-};
+create_dp(device_prop, XCLK, mem, port_list, mod_list,
+	add_cpu(0, core0));
diff --git a/src/platform/sifive/fe310g002/resources/sp.c b/src/platform/sifive/fe310g002/resources/sp.c
index 4e668118..950f9663 100644
--- a/src/platform/sifive/fe310g002/resources/sp.c
+++ b/src/platform/sifive/fe310g002/resources/sp.c
@@ -1,8 +1,8 @@
 /*
  * CYANCORE LICENSE
- * Copyrights (C) 2019, Cyancore Team
+ * Copyrights (C) 2024, Cyancore Team
  *
- * File Name		: platform_sp.c
+ * File Name		: sp.c
  * Description		: This file contains sources for platform
  *			  software properties
  * Primary Author	: Akash Kollipara [akashkollipara@gmail.com]
@@ -13,53 +13,23 @@
 #include <plat_defines.h>
 #include <resource.h>
 
-static const uint8_t uart0pins[] = {16, 17};
-static pinmux_t uart0 = addpins(0, uart0pins, serial);
-swdev_t consoleUart =
-{
-	.swdev_id = console_uart,
-	.hwdev_id = uart | 0,
-	.pmux = &uart0
-};
+create_pmux(uart0, 0, serial, 16, 17);
+create_swdev(consoleUart, console_uart, (uart | 0), add_pinmux(uart0));
 
-swdev_t schedTimer =
-{
-	.swdev_id = sched_timer,
-	.hwdev_id = timer | 0,
-};
+create_swdev(schedTimer, sched_timer, (timer | 0));
 
-static const uint8_t led0pins[] = {19, 21};
-static pinmux_t obled0 = addpins(0, led0pins, 0);
-swdev_t onBoardLED0 =
-{
-	.swdev_id = onboard_led | 0,
-	.pmux = &obled0
-};
+create_pmux(obled0, 0, 0, 19, 21);
+create_swdev(onBoardLED0, (onboard_led | 0), 0, add_pinmux(obled0));
 
-static const uint8_t led1pins[] = {20};
-static pinmux_t obled1 = addpins(0, led1pins, 0);
-swdev_t onBoardLED1 =
-{
-	.swdev_id = onboard_led | 1,
-	.pmux = &obled1
-};
+create_pmux(obled1, 0, 0, 20);
+create_swdev(onBoardLED1, (onboard_led | 1), 0, add_pinmux(obled1));
 
-const sw_devid_t terra_devs[] =
-{
-	console_uart, sched_timer, (onboard_led | 0),
-	(onboard_led | 1),
-};
+create_visor(terravisor, console_uart, sched_timer,
+		(onboard_led | 0), (onboard_led | 1));
 
-visor_t terravisor = add_visor_devs(terra_devs);
+create_swdev_list(sw_devs, &consoleUart, &schedTimer, &onBoardLED0, &onBoardLED1);
 
-swdev_t * const sw_devs[] =
-{
-	&consoleUart, &schedTimer, &onBoardLED0,
-	&onBoardLED1,
-};
-
-sp_t software_prop =
-{
-	.terravisor = &terravisor,
-	add_swdev(sw_devs),
-};
+create_sp(software_prop,
+	  add_swdev(sw_devs),
+	  add_terravisor(terravisor),
+	);
diff --git a/src/platform/sifive/qemu-sifive-e-bl/resources/dp.c b/src/platform/sifive/qemu-sifive-e-bl/resources/dp.c
index ca87474f..cdd11dff 100644
--- a/src/platform/sifive/qemu-sifive-e-bl/resources/dp.c
+++ b/src/platform/sifive/qemu-sifive-e-bl/resources/dp.c
@@ -1,8 +1,8 @@
 /*
  * CYANCORE LICENSE
- * Copyrights (C) 2023, Cyancore Team
+ * Copyrights (C) 2024, Cyancore Team
  *
- * File Name		: platform_dp.c
+ * File Name		: dp.c
  * Description		: This file contains sources for platform
  *			  device properties
  * Primary Author	: Akash Kollipara [akashkollipara@gmail.com]
@@ -19,72 +19,25 @@
 WARN(< ! > XCLK is not defined!)
 #endif
 
-cpu_t core0 =
-{
-	.name = "riscv-e310",
-	.id = 0x0000
-};
+create_cpu(core0, "riscv-e310", 0);
 
-memory_t mem =
-{
-	.start = V_DMEM_START,
-	.size = DMEM_LENGTH
-};
+create_memory(mem, V_DMEM_START, DMEM_LENGTH);
 
-module_t clint0 =
-{
-	.id = clint,
-	.baddr = 0x02000000,
-	.stride = 0xc000,
-};
+create_module(clint0, clint, 0x02000000, 0xc000, 0, 0);
 
-module_t uart0 =
-{
-	.id = uart | 0,
-	.baddr = 0x10013000,
-	.stride = 0x20,
-	.clk = 115200,
-	.interrupt[0] = {int_plat, 3, int_rising_edge},
-};
+create_module(uart0, (uart | 0), 0x10013000, 0x20, 115200, 0,
+		add_irq(0, int_plat, 3, int_rising_edge));
 
-gpio_module_t port0 =
-{
-	.id = gpio | PORTA,
-	.baddr = 0x10012000,
-	.stride = 0x4c,
-};
+create_module(aon0, (aon | 0), 0x10000000, 0x1000, 0, 0);
 
-module_t aon0 =
-{
-	.id = aon | 0,
-	.baddr = 0x10000000,
-	.stride = 0x1000,
-};
+create_module(timer_core0, (timer | 0), 0, 0, 32768, 0,
+		add_irq(0, int_local, 7, int_level));
 
-module_t timer_core0 =
-{
-	.id = timer | 0,
-	.clk = 1e7,
-	.interrupt[0] = {int_local, 7, int_level},
-};
+create_gpio_module(port0, (gpio | PORTA), 0x10012000, 0x4c);
 
-gpio_module_t * const port_list[] =
-{
-	&port0,
-};
+create_gpio_list(port_list, &port0);
 
-module_t * const mod_list[] =
-{
-	&uart0, &clint0, &aon0, &timer_core0
-};
+create_module_list(mod_list, &uart0, &clint0, &aon0, &timer_core0);
 
-dp_t device_prop =
-{
-	.base_clock = XCLK,
-	.core[0] = &core0,
-	.memory = &mem,
-
-	add_ports(port_list),
-
-	add_modules(mod_list),
-};
+create_dp(device_prop, XCLK, mem, port_list, mod_list,
+	add_cpu(0, core0));
diff --git a/src/platform/sifive/qemu-sifive-e-bl/resources/sp.c b/src/platform/sifive/qemu-sifive-e-bl/resources/sp.c
index 1163b0c6..c8f40aeb 100644
--- a/src/platform/sifive/qemu-sifive-e-bl/resources/sp.c
+++ b/src/platform/sifive/qemu-sifive-e-bl/resources/sp.c
@@ -1,8 +1,8 @@
 /*
  * CYANCORE LICENSE
- * Copyrights (C) 2023, Cyancore Team
+ * Copyrights (C) 2024, Cyancore Team
  *
- * File Name		: platform_sp.c
+ * File Name		: sp.c
  * Description		: This file contains sources for platform
  *			  software properties
  * Primary Author	: Akash Kollipara [akashkollipara@gmail.com]
@@ -13,35 +13,16 @@
 #include <plat_defines.h>
 #include <resource.h>
 
-static const uint8_t uart0pins[] = {16, 17};
-static pinmux_t uart0 = addpins(0, uart0pins, serial);
-swdev_t consoleUart =
-{
-	.swdev_id = console_uart,
-	.hwdev_id = uart | 0,
-	.pmux = &uart0
-};
+create_pmux(uart0, 0, serial, 16, 17);
+create_swdev(consoleUart, console_uart, (uart | 0), add_pinmux(uart0));
 
-swdev_t schedTimer =
-{
-	.swdev_id = sched_timer,
-	.hwdev_id = timer | 0,
-};
+create_swdev(schedTimer, sched_timer, (timer | 0));
 
-const sw_devid_t terra_devs[] =
-{
-	console_uart, sched_timer,
-};
+create_visor(terravisor, console_uart, sched_timer);
 
-visor_t terravisor = add_visor_devs(terra_devs);
+create_swdev_list(sw_devs, &consoleUart, &schedTimer);
 
-swdev_t * const sw_devs[] =
-{
-	&consoleUart, &schedTimer,
-};
-
-sp_t software_prop =
-{
-	.terravisor = &terravisor,
-	add_swdev(sw_devs),
-};
+create_sp(software_prop,
+	  add_swdev(sw_devs),
+	  add_terravisor(terravisor),
+	);
diff --git a/src/platform/sifive/qemu-sifive-e/resources/dp.c b/src/platform/sifive/qemu-sifive-e/resources/dp.c
index 98c0a00d..d27d8e33 100644
--- a/src/platform/sifive/qemu-sifive-e/resources/dp.c
+++ b/src/platform/sifive/qemu-sifive-e/resources/dp.c
@@ -1,8 +1,8 @@
 /*
  * CYANCORE LICENSE
- * Copyrights (C) 2023, Cyancore Team
+ * Copyrights (C) 2024, Cyancore Team
  *
- * File Name		: platform_dp.c
+ * File Name		: dp.c
  * Description		: This file contains sources for platform
  *			  device properties
  * Primary Author	: Akash Kollipara [akashkollipara@gmail.com]
@@ -19,97 +19,34 @@
 WARN(< ! > XCLK is not defined!)
 #endif
 
-cpu_t core0 =
-{
-	.name = "riscv-e310",
-	.id = 0x0000
-};
+create_cpu(core0, "riscv-e310", 0);
 
-memory_t mem =
-{
-	.start = V_DMEM_START,
-	.size = DMEM_LENGTH
-};
+create_memory(mem, V_DMEM_START, DMEM_LENGTH);
 
-module_t plic0 =
-{
-	.id = plic,
-	.baddr = 0x0c000000,
-	.stride = 0x04000000,
-	.interrupt[0] = {int_local, 11, int_rising_edge},
-};
+create_module(plic0, plic, 0x0c000000, 0x04000000, 0, 0,
+		add_irq(0, int_local, 11, int_rising_edge));
 
-module_t clint0 =
-{
-	.id = clint,
-	.baddr = 0x02000000,
-	.stride = 0xc000,
-};
+create_module(clint0, clint, 0x02000000, 0xc000, 0, 0);
 
-module_t uart0 =
-{
-	.id = uart | 0,
-	.baddr = 0x10013000,
-	.stride = 0x20,
-	.clk = 115200,
-	.interrupt[0] = {int_plat, 3, int_rising_edge},
-};
+create_module(uart0, (uart | 0), 0x10013000, 0x20, 115200, 0,
+		add_irq(0, int_plat, 3, int_rising_edge));
 
-module_t uart1 =
-{
-	.id = uart | 1,
-	.baddr = 0x10023000,
-	.stride = 0x20,
-	.clk = 115200,
-	.interrupt[0] = {int_plat, 4, int_rising_edge},
-};
+create_module(uart1, (uart | 1), 0x10023000, 0x20, 115200, 0,
+		add_irq(0, int_plat, 4, int_rising_edge));
 
-module_t prci0 =
-{
-	.id = prci,
-	.baddr = 0x10008000,
-	.stride = 0x1000,
-};
+create_module(prci0, prci, 0x10008000, 0x1000, 0, 0);
 
-gpio_module_t port0 =
-{
-	.id = gpio | PORTA,
-	.baddr = 0x10012000,
-	.stride = 0x4c,
-};
+create_module(aon0, (aon | 0), 0x10000000, 0x1000, 0, 0);
 
-module_t aon0 =
-{
-	.id = aon | 0,
-	.baddr = 0x10000000,
-	.stride = 0x1000,
-};
+create_module(timer_core0, (timer | 0), 0, 0, 1e7, 0,
+		add_irq(0, int_local, 7, int_level));
 
-module_t timer_core0 =
-{
-	.id = timer | 0,
-	.clk = 1e7,
-	.interrupt[0] = {int_local, 7, int_level},
-};
+create_gpio_module(port0, (gpio | PORTA), 0x10012000, 0x4c);
 
-gpio_module_t * const port_list[] =
-{
-	&port0,
-};
+create_gpio_list(port_list, &port0);
 
-module_t * const mod_list[] =
-{
-	&plic0, &uart0, &prci0, &clint0, &aon0, &uart1,
-	&timer_core0,
-};
+create_module_list(mod_list, &plic0, &uart0, &prci0,
+		&clint0, &aon0, &uart1, &timer_core0);
 
-dp_t device_prop =
-{
-	.base_clock = XCLK,
-	.core[0] = &core0,
-	.memory = &mem,
-
-	add_ports(port_list),
-
-	add_modules(mod_list),
-};
+create_dp(device_prop, XCLK, mem, port_list, mod_list,
+	add_cpu(0, core0));
diff --git a/src/platform/sifive/qemu-sifive-e/resources/sp.c b/src/platform/sifive/qemu-sifive-e/resources/sp.c
index d2e88c3d..950f9663 100644
--- a/src/platform/sifive/qemu-sifive-e/resources/sp.c
+++ b/src/platform/sifive/qemu-sifive-e/resources/sp.c
@@ -1,8 +1,8 @@
 /*
  * CYANCORE LICENSE
- * Copyrights (C) 2023, Cyancore Team
+ * Copyrights (C) 2024, Cyancore Team
  *
- * File Name		: platform_sp.c
+ * File Name		: sp.c
  * Description		: This file contains sources for platform
  *			  software properties
  * Primary Author	: Akash Kollipara [akashkollipara@gmail.com]
@@ -13,53 +13,23 @@
 #include <plat_defines.h>
 #include <resource.h>
 
-static const uint8_t uart0pins[] = {16, 17};
-static pinmux_t uart0 = addpins(0, uart0pins, serial);
-swdev_t consoleUart =
-{
-	.swdev_id = console_uart,
-	.hwdev_id = uart | 0,
-	.pmux = &uart0
-};
+create_pmux(uart0, 0, serial, 16, 17);
+create_swdev(consoleUart, console_uart, (uart | 0), add_pinmux(uart0));
 
-swdev_t schedTimer =
-{
-	.swdev_id = sched_timer,
-	.hwdev_id = timer | 0,
-};
+create_swdev(schedTimer, sched_timer, (timer | 0));
 
-static const uint8_t led0pins[] = {19, 21};
-static pinmux_t obled0 = addpins(0, led0pins, 0);
-swdev_t onBoardLED0 =
-{
-	.swdev_id = onboard_led | 0,
-	.pmux = &obled0
-};
+create_pmux(obled0, 0, 0, 19, 21);
+create_swdev(onBoardLED0, (onboard_led | 0), 0, add_pinmux(obled0));
 
-static const uint8_t led1pins[] = {20};
-static pinmux_t obled1 = addpins(0, led1pins, 0);
-swdev_t onBoardLED1 =
-{
-	.swdev_id = onboard_led | 1,
-	.pmux = &obled1
-};
+create_pmux(obled1, 0, 0, 20);
+create_swdev(onBoardLED1, (onboard_led | 1), 0, add_pinmux(obled1));
 
-const sw_devid_t terra_devs[] =
-{
-	console_uart, sched_timer, (onboard_led | 0),
-	(onboard_led | 1),
-};
+create_visor(terravisor, console_uart, sched_timer,
+		(onboard_led | 0), (onboard_led | 1));
 
-visor_t terravisor = add_visor_devs(terra_devs);
+create_swdev_list(sw_devs, &consoleUart, &schedTimer, &onBoardLED0, &onBoardLED1);
 
-swdev_t * const sw_devs[] =
-{
-	&consoleUart, &schedTimer, &onBoardLED0,
-	&onBoardLED1,
-};
-
-sp_t software_prop =
-{
-	.terravisor = &terravisor,
-	add_swdev(sw_devs),
-};
+create_sp(software_prop,
+	  add_swdev(sw_devs),
+	  add_terravisor(terravisor),
+	);

From eab0cc570428cc4781aa29b7241f91106388ffd1 Mon Sep 17 00:00:00 2001
From: Akash Kollipara <akashkollipara@gmail.com>
Date: Thu, 4 Jan 2024 20:19:41 +0530
Subject: [PATCH 02/10] <BugFix> Incorrect pointer de-ref in arch_rseed_capture

Issue: #236
---
 src/arch/avr/8/common_5x_6/terravisor/arch.c | 4 ++--
 src/arch/riscv/32/i/terravisor/arch.c        | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/src/arch/avr/8/common_5x_6/terravisor/arch.c b/src/arch/avr/8/common_5x_6/terravisor/arch.c
index dc7c6230..a24df852 100644
--- a/src/arch/avr/8/common_5x_6/terravisor/arch.c
+++ b/src/arch/avr/8/common_5x_6/terravisor/arch.c
@@ -1,6 +1,6 @@
 /*
  * CYANCORE LICENSE
- * Copyrights (C) 2019, Cyancore Team
+ * Copyrights (C) 2024, Cyancore Team
  *
  * File Name		: arch.c
  * Description		: This file consists of architecture specific function that
@@ -149,5 +149,5 @@ void arch_signal_resume(void)
 void arch_rseed_capture()
 {
 	extern uintptr_t *_bss_start;
-	srand(*_bss_start);
+	srand((size_t)_bss_start);
 }
diff --git a/src/arch/riscv/32/i/terravisor/arch.c b/src/arch/riscv/32/i/terravisor/arch.c
index def7d996..64eb4026 100644
--- a/src/arch/riscv/32/i/terravisor/arch.c
+++ b/src/arch/riscv/32/i/terravisor/arch.c
@@ -1,6 +1,6 @@
 /*
  * CYANCORE LICENSE
- * Copyrights (C) 2019, Cyancore Team
+ * Copyrights (C) 2024, Cyancore Team
  *
  * File Name		: arch.c
  * Description		: This file consists of architecture specific function that
@@ -170,5 +170,5 @@ _WEAK void arch_unhandled_irq()
 void arch_rseed_capture()
 {
 	extern uintptr_t *_bss_start;
-	srand(*_bss_start);
+	srand((size_t)_bss_start);
 }

From b83a4fb2756353b2adeb3e7ecab9237145c415a7 Mon Sep 17 00:00:00 2001
From: Sagar Ladla <sagarladla@gmail.com>
Date: Mon, 15 Jan 2024 22:12:57 +0530
Subject: [PATCH 03/10] Signed-off-by: Sagar Ladla <sagarladla@gmail.com>

added atoi, atol, atof function signatures.
---
 src/lib/libc/include/stdlib.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/src/lib/libc/include/stdlib.h b/src/lib/libc/include/stdlib.h
index dbe198a7..24b70318 100644
--- a/src/lib/libc/include/stdlib.h
+++ b/src/lib/libc/include/stdlib.h
@@ -28,6 +28,9 @@ void *calloc(size_t, size_t);
 void *realloc(void *, size_t);
 void __heap_status(bool);
 size_t heap_usage(void);
+double atof(char *);
+int atoi(char *);
+long atol(char *);
 
 static inline void heap_status(void)
 {

From ca0af246ac02868b3dfefa0ccce5cdca18fd184d Mon Sep 17 00:00:00 2001
From: Sagar Ladla <sagarladla@gmail.com>
Date: Mon, 15 Jan 2024 22:14:44 +0530
Subject: [PATCH 04/10] Signed-off-by: Sagar Ladla <sagarladla@gmail.com>

implemented atoi, atol, atof functions.
---
 src/lib/libc/strton.c | 191 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 191 insertions(+)
 create mode 100644 src/lib/libc/strton.c

diff --git a/src/lib/libc/strton.c b/src/lib/libc/strton.c
new file mode 100644
index 00000000..dfadd769
--- /dev/null
+++ b/src/lib/libc/strton.c
@@ -0,0 +1,191 @@
+/*
+ * CYANCORE LICENSE
+ * Copyrights (C) 2023, Cyancore Team
+ *
+ * File Name		: strton.c
+ * Description		: This file contains sources of libc-stdlib
+ *			  string/ascii to number functions
+ * Primary Author	: Sagar Ladla [sagarladla@gmail.com]
+ * Organisation		: Cyancore Core-Team
+ */
+
+#include <stdlib.h>
+#include <ctype.h>
+
+#define isSign(c) (c == '-' || c=='+')
+
+/**
+ * trail_whitespace
+ *
+ * @brief This function will trim trailing whitespaces and return resulting string.
+*/
+static inline char * trail_whitespace(char *s)
+{
+	while (isSpace(*s))
+	{
+		s++;
+	}
+	return s;
+}
+
+/**
+ * set_negative_flag
+ *
+ * @brief This function will seg negative flag if found `-` sign.
+*/
+static inline char * set_negative_flag(char *s, bool *N)
+{
+	if (*s != '\0' && isSign(*s))
+	{
+		*N = (*s++ == '-');
+	}
+	return s;
+}
+
+/**
+ * integer_traverse
+ *
+ * @brief This function will parse integral part of number.
+*/
+static inline char * integer_traverse(char *s, long *a)
+{
+	while (*s != '\0' && *s != '.' && !isSpace(*s) && isDigit(*s))
+	{
+		*a = (*a)*10 + (*s++ - '0');
+	}
+	return s;
+}
+
+/**
+ * mantissa traverse
+ *
+ * @brief This function will parse fractional part of number.
+*/
+static inline char * mantissa_traverse(char *s, double *m, double *e)
+{
+	if (*s == '.' && isSpace(*s))
+	{
+		s++;
+	}
+	while (*s != '\0' && *s != '.' && !isSpace(*s) && isDigit(*s))
+	{
+		*e *= 0.1;
+		*m += *e * (*s++ - '0');
+	}
+	return s;
+}
+
+/**
+ * scientific_notation
+ *
+ * @brief This function will parse scientific notations such as `23e-1`.
+*/
+static inline char * scientific_notation(char *s, long *a, double *r, double *e)
+{
+	*a = 0;
+	if ((*s == 'e' || *s == 'E') && isSign(s[1]))
+	{
+		s++;
+		if (*s == '-')
+		{
+			*e = 0.1;
+		}
+		else if (*s == '+')
+		{
+			*e = 10;
+		}
+		s++;
+		while (*s != '\0' && !isSpace(*s) && isDigit(*s))
+		{
+			*a = *a * 10 + (*s++ - '0');
+		}
+		while ((*a)--)
+		{
+			*r *= *e;
+		}
+	}
+	return s;
+}
+
+/**
+ * atof - convert ascii to double
+ *
+ * @brief This function will parse the string
+ * and convert numeric ASCII to its equivalent double.
+ * Trim trailing whitespaces, set negative flag if found sign.
+ * Calculate integral and fractional part of number.
+ * Add both parts to get double result.
+*/
+double atof(char *s)
+{
+	long	a = 0;	/* accumulator	 */
+	double	r = 0;	/* result	 */
+	double	m = 0;	/* mantissa 	 */
+	double	e = 1;	/* exponent 	 */
+	bool	N = 0;	/* negative flag */
+
+	/**
+	 * Trim trailing whitespaces
+	*/
+	s = trail_whitespace(s);
+
+	/**
+	 * Parse and set negative flag if any sign found
+	*/
+	s = set_negative_flag(s, &N);
+
+	/**
+	 * Parse integral part of the number
+	*/
+	s = integer_traverse(s, &a);
+
+	/**
+	 *  Parse fractional part of the number
+	 */
+	s = mantissa_traverse(s, &m, &e);
+	r = (a+m);
+
+	/**
+	 * Parse scientific notation of form xe-2 or xe+2
+	*/
+	s = scientific_notation(s, &a, &r, &e);
+	return (N && r != 0.0) ? -r : r;
+}
+
+/**
+ * atol - convert ascii to long
+ *
+ * @brief This function will parse the string
+ * and convert numeric ascii to its equivalent long value.
+*/
+long atol(char *s)
+{
+	long	a = 0;	/* accumulator	 */
+	bool	N = 0;	/* negative flag */
+
+	/**
+	 * Trim trailing whitespaces
+	*/
+	s = trail_whitespace(s);
+
+	/**
+	 * Parse and set negative flag if any sign found
+	*/
+	s = set_negative_flag(s, &N);
+
+	/**
+	 * Parse integral part of the number
+	*/
+	s = integer_traverse(s, &a);
+	return (N && a != 0) ? -a : a;
+}
+
+/**
+ * atoi - convert ascii to integer
+ *
+ * @brief This function calls atol(char *) and type casts to integer.
+*/
+int atoi(char *s)
+{
+	return (int)atol(s);
+}

From 6acad1ebd320ec69e4e4e5ca142fbda7bf31b5d2 Mon Sep 17 00:00:00 2001
From: Sagar Ladla <sagarladla@gmail.com>
Date: Mon, 15 Jan 2024 23:38:18 +0530
Subject: [PATCH 05/10] <stdlib.c> bugfix warnings

- unused variable after assignment warning
- remove redundant assignment instruction

Issue: #262
---
 src/lib/libc/strton.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/lib/libc/strton.c b/src/lib/libc/strton.c
index dfadd769..f1155047 100644
--- a/src/lib/libc/strton.c
+++ b/src/lib/libc/strton.c
@@ -148,7 +148,7 @@ double atof(char *s)
 	/**
 	 * Parse scientific notation of form xe-2 or xe+2
 	*/
-	s = scientific_notation(s, &a, &r, &e);
+	scientific_notation(s, &a, &r, &e);
 	return (N && r != 0.0) ? -r : r;
 }
 
@@ -176,7 +176,7 @@ long atol(char *s)
 	/**
 	 * Parse integral part of the number
 	*/
-	s = integer_traverse(s, &a);
+	integer_traverse(s, &a);
 	return (N && a != 0) ? -a : a;
 }
 

From c37098ae4c87ef443edcde22712d665af291f62c Mon Sep 17 00:00:00 2001
From: Pranjal Chanda <40349163+pranjalchanda08@users.noreply.github.com>
Date: Mon, 22 Jan 2024 17:01:44 +0530
Subject: [PATCH 06/10] sonar-cloud script updated to latest (#279)

---
 .github/workflows/sonarcloud.yml     | 77 ----------------------------
 .github/workflows/sonarcloud.yml.dep | 59 +++++++++++++++++++++
 2 files changed, 59 insertions(+), 77 deletions(-)
 delete mode 100644 .github/workflows/sonarcloud.yml
 create mode 100644 .github/workflows/sonarcloud.yml.dep

diff --git a/.github/workflows/sonarcloud.yml b/.github/workflows/sonarcloud.yml
deleted file mode 100644
index 7f44dfb0..00000000
--- a/.github/workflows/sonarcloud.yml
+++ /dev/null
@@ -1,77 +0,0 @@
-name: SonarCloud Scan
-
-on:
-  push:
-    branches:
-    - stable
-    - development
-    - helios_stage
-  pull_request:
-    branches:
-    - stable
-    - development
-    - helios_stage
-
-jobs:
-  build:
-
-    runs-on: ubuntu-latest
-    env:
-      SONAR_SCANNER_VERSION: 4.4.0.2170
-      SONAR_SERVER_URL: "https://sonarcloud.io"
-      BUILD_WRAPPER_OUT_DIR: bw-output # Directory where build-wrapper output will be placed
-    steps:
-    - uses: actions/checkout@v2
-      with:
-        fetch-depth: 0  # Shallow clones should be disabled for a better relevancy of analysis
-
-    - name: Install Dependencies
-      run: sudo apt install cppcheck -y
-
-    - name: Configure Git
-      env:
-        TOKEN: ${{ secrets.AKASH_VF }}
-      run: git config --global url."https://${TOKEN}:x-oauth-basic@github.com/".insteadOf "https://github.com/"
-
-    - name: Get Toolchains
-      run: |
-        make get_avr_tc AVR_TC_REPO=https://github.com/VisorFolks/avr-toolchain.git
-        make get_riscv_tc RISC_V_TC_REPO=https://github.com/VisorFolks/risc-v-toolchain.git
-    - name: Set up JDK 17
-      uses: actions/setup-java@v1
-      with:
-        java-version: 17
-    - name: Download and set up sonar-scanner
-      env:
-        SONAR_SCANNER_DOWNLOAD_URL: https://binaries.sonarsource.com/Distribution/sonar-scanner-cli/sonar-scanner-cli-${{ env.SONAR_SCANNER_VERSION }}-linux.zip
-      run: |
-        mkdir -p $HOME/.sonar
-        curl -sSLo $HOME/.sonar/sonar-scanner.zip ${{ env.SONAR_SCANNER_DOWNLOAD_URL }}
-        unzip -o $HOME/.sonar/sonar-scanner.zip -d $HOME/.sonar/
-        echo "$HOME/.sonar/sonar-scanner-${{ env.SONAR_SCANNER_VERSION }}-linux/bin" >> $GITHUB_PATH
-
-    - name: Download and set up build-wrapper
-      env:
-        BUILD_WRAPPER_DOWNLOAD_URL: ${{ env.SONAR_SERVER_URL }}/static/cpp/build-wrapper-linux-x86.zip
-      run: |
-        curl -sSLo $HOME/.sonar/build-wrapper-linux-x86.zip ${{ env.BUILD_WRAPPER_DOWNLOAD_URL }}
-        unzip -o $HOME/.sonar/build-wrapper-linux-x86.zip -d $HOME/.sonar/
-        echo "$HOME/.sonar/build-wrapper-linux-x86" >> $GITHUB_PATH
-
-    - name: Run build-wrapper
-      run: |
-        build-wrapper-linux-x86-64 --out-dir ${{ env.BUILD_WRAPPER_OUT_DIR }} make all_projects
-
-    - name: Run sonar-scanner
-      env:
-        GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
-        SONAR_TOKEN: ${{ secrets.SONAR_TOKEN }}
-      run: |
-        sonar-scanner \
-        --define sonar.host.url="${{ env.SONAR_SERVER_URL }}" \
-        --define sonar.cfamily.build-wrapper-output="${{ env.BUILD_WRAPPER_OUT_DIR }}" \
-        --define sonar.organization=cyancore \
-        --define sonar.projectKey=VisorFolks_cyancore \
-        --define sonar.sources=src \
-        --define sonar.verbose=true \
-        --define sonar.cfamily.threads=4
diff --git a/.github/workflows/sonarcloud.yml.dep b/.github/workflows/sonarcloud.yml.dep
new file mode 100644
index 00000000..67acdfe3
--- /dev/null
+++ b/.github/workflows/sonarcloud.yml.dep
@@ -0,0 +1,59 @@
+name: SonarCloud Scan
+
+on:
+  push:
+    branches:
+    - stable
+    - development
+    - helios_stage
+  pull_request:
+    branches:
+    - stable
+    - development
+    - helios_stage
+
+jobs:
+  build:
+    runs-on: ubuntu-latest
+    env:
+      SONAR_SCANNER_VERSION: 4.4.0.2170
+      SONAR_SERVER_URL: "https://sonarcloud.io"
+      BUILD_WRAPPER_OUT_DIR: bw-output # Directory where build-wrapper output will be placed
+    steps:
+    - uses: actions/checkout@v2
+      with:
+        fetch-depth: 0  # Shallow clones should be disabled for a better relevancy of analysis
+
+    - name: Install Dependencies
+      run: sudo apt install cppcheck -y
+
+    - name: Configure Git
+      env:
+        TOKEN: ${{ secrets.AKASH_VF }}
+      run: git config --global url."https://${TOKEN}:x-oauth-basic@github.com/".insteadOf "https://github.com/"
+
+    - name: Get Toolchains
+      run: |
+        sudo apt-get install bear
+        make get_avr_tc AVR_TC_REPO=https://github.com/VisorFolks/avr-toolchain.git
+        make get_riscv_tc RISC_V_TC_REPO=https://github.com/VisorFolks/risc-v-toolchain.git
+    - name: Build
+      run: |
+        bear make demo_riscv
+    - uses: actions/checkout@v3
+      with:
+        # Disabling shallow clone is recommended for improving relevancy of reporting
+        fetch-depth: 0
+    - name: SonarCloud Scan
+      uses: sonarsource/sonarcloud-github-action@master
+      env:
+        GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
+        SONAR_TOKEN: ${{ secrets.SONAR_TOKEN }}
+      with:
+        args: >
+          -Dsonar.organization=cyancore
+          -Dsonar.projectKey=VisorFolks_cyancore
+          -Dsonar.sources=src
+          -Dsonar.verbose=true
+          -Dsonar.cfamily.threads=4
+          -Dsonar.cfamily.compile-commands=compile_commands.json

From e1e42ab3d85694f306d06ddfebcfcedfdf9b0c24 Mon Sep 17 00:00:00 2001
From: Akash Kollipara <akashkollipara@gmail.com>
Date: Mon, 22 Jan 2024 17:14:57 +0530
Subject: [PATCH 07/10] <Github Actions> Updated codeql version

---
 .github/workflows/github_ci.yml | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/.github/workflows/github_ci.yml b/.github/workflows/github_ci.yml
index 832cbfc2..e1e70071 100644
--- a/.github/workflows/github_ci.yml
+++ b/.github/workflows/github_ci.yml
@@ -39,7 +39,7 @@ jobs:
           make get_riscv_tc RISC_V_TC_REPO=${RISCVTC}
 
       - name: Init CodeQL
-        uses: github/codeql-action/init@v1
+        uses: github/codeql-action/init@v2
         with:
           languages: ${{ matrix.language }}
           debug: true
@@ -53,7 +53,7 @@ jobs:
           make demo_helios_riscv
 
       - name: Perform CodeQL Analysis
-        uses: github/codeql-action/analyze@v1
+        uses: github/codeql-action/analyze@v2
 
       - name: Clean Up
         run: |

From c27b4394f0685d06b5b378e26750db428642b83e Mon Sep 17 00:00:00 2001
From: Akash Kollipara <akashkollipara@gmail.com>
Date: Mon, 22 Jan 2024 17:52:19 +0530
Subject: [PATCH 08/10] <GitHub Actions> Change to duplicate entry of c/cpp

- C is alised as Cpp in newer github action and this commit
  shall remove the duplicate entry
---
 .github/workflows/github_ci.yml | 9 +++------
 1 file changed, 3 insertions(+), 6 deletions(-)

diff --git a/.github/workflows/github_ci.yml b/.github/workflows/github_ci.yml
index e1e70071..dcc74286 100644
--- a/.github/workflows/github_ci.yml
+++ b/.github/workflows/github_ci.yml
@@ -19,7 +19,7 @@ jobs:
     strategy:
       fail-fast: true
       matrix:
-        language: ["c", "cpp"]
+        language: ["cpp"]
 
     steps:
       - uses: actions/checkout@v2
@@ -30,13 +30,10 @@ jobs:
         run: git config --global url."https://${TOKEN}:x-oauth-basic@github.com/".insteadOf "https://github.com/"
 
       - name: Fetch Dependencies
-        env:
-          AVRTC: https://github.com/VisorFolks/avr-toolchain.git
-          RISCVTC: https://github.com/VisorFolks/risc-v-toolchain.git
         run: |
           sudo apt install cppcheck -y
-          make get_avr_tc AVR_TC_REPO=${AVRTC}
-          make get_riscv_tc RISC_V_TC_REPO=${RISCVTC}
+          make get_avr_tc
+          make get_riscv_tc
 
       - name: Init CodeQL
         uses: github/codeql-action/init@v2

From 74503a9f3e520bc8d89cfccb280f04b0a76e2f44 Mon Sep 17 00:00:00 2001
From: Akash Kollipara <akashkollipara@gmail.com>
Date: Mon, 22 Jan 2024 18:08:13 +0530
Subject: [PATCH 09/10] <GitHub Actions> Updated checkout version

---
 .github/workflows/github_ci.yml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/.github/workflows/github_ci.yml b/.github/workflows/github_ci.yml
index dcc74286..8942779d 100644
--- a/.github/workflows/github_ci.yml
+++ b/.github/workflows/github_ci.yml
@@ -22,7 +22,7 @@ jobs:
         language: ["cpp"]
 
     steps:
-      - uses: actions/checkout@v2
+      - uses: actions/checkout@v4
 
       - name: Configure Git
         env:

From dc4b4a6b722323fb4749cb1f9c2462e6b72b7df7 Mon Sep 17 00:00:00 2001
From: Akash Kollipara <akashkollipara@gmail.com>
Date: Sat, 13 Jan 2024 16:32:18 +0530
Subject: [PATCH 10/10] <Boron> Cyancore v1.4.0 release update

- Updated codename and release version
- Updated status badges
---
 README.md            | 4 +---
 src/engine/banner.mk | 5 ++---
 2 files changed, 3 insertions(+), 6 deletions(-)

diff --git a/README.md b/README.md
index b4eb7a05..3cb4dc80 100644
--- a/README.md
+++ b/README.md
@@ -12,11 +12,9 @@
     </div>
 </body>
 
-> **Version (arch:2 | major:4 | minor:2): 1.3.2**
+> **Version (arch:2 | major:4 | minor:2): 1.4.0**
 > 
 [![GitHub CI](https://github.com/VisorFolks/cyancore/actions/workflows/github_ci.yml/badge.svg)](https://github.com/VisorFolks/cyancore/actions/workflows/github_ci.yml)
-[![Quality Gate Status](https://sonarcloud.io/api/project_badges/measure?project=VisorFolks_cyancore&metric=alert_status)](https://sonarcloud.io/summary/new_code?id=VisorFolks_cyancore)
-[![Security Rating](https://sonarcloud.io/api/project_badges/measure?project=VisorFolks_cyancore&metric=security_rating)](https://sonarcloud.io/summary/new_code?id=VisorFolks_cyancore)
 
 Cyancore is an open source unified software platform for embedded system projects. VisorFolks is motivated to develope a framework which enables a developer/user to write a portable project which can run on any of the target. It is designed to be a goto framework for almost all projects, be it an Embedded applications, IoT, firmware, OS, etc. It provides flexibility, tighter integration of features and abilities by utilizing the hardware and software resources better and boost various KPIs of the final product.
 
diff --git a/src/engine/banner.mk b/src/engine/banner.mk
index 37e4d109..20956703 100644
--- a/src/engine/banner.mk
+++ b/src/engine/banner.mk
@@ -8,9 +8,8 @@
 # Organisation		: Cyancore Core-Team
 #
 
-.PHONY:	version
-NAME		= Beryllium
-VERSION		= 0x01000302
+NAME		= Boron
+VERSION		= 0x01000400
 
 $(eval $(call add_define,VERSION))